| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2019 MediaTek Inc. |
| 3 | * |
| 4 | * This program is free software: you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef _CPU_PMU_H_ |
| 15 | #define _CPU_PMU_H_ |
| 16 | |
| 17 | #include <linux/device.h> |
| 18 | #include <linux/perf_event.h> |
| 19 | |
| 20 | #define MODE_DISABLED 0 |
| 21 | #define MODE_INTERRUPT 1 |
| 22 | #define MODE_POLLING 2 |
| 23 | |
| 24 | #define MXSIZE_PMU_DESC 32 |
| 25 | #define MXNR_CPU NR_CPUS |
| 26 | |
| 27 | #define MXNR_PMU_EVENTS 8 /* max number of pmu counter for armv8 is 6+1 */ |
| 28 | struct met_pmu { |
| 29 | unsigned char mode; |
| 30 | unsigned short event; |
| 31 | unsigned long freq; |
| 32 | struct kobject *kobj_cpu_pmu; |
| 33 | }; |
| 34 | |
| 35 | struct cpu_pmu_hw { |
| 36 | const char *name; |
| 37 | const char *cpu_name; |
| 38 | int nr_cnt; |
| 39 | int (*get_event_desc)(int idx, int event, char *event_desc); |
| 40 | int (*check_event)(struct met_pmu *pmu, int idx, int event); |
| 41 | void (*start)(struct met_pmu *pmu, int count); |
| 42 | void (*stop)(int count); |
| 43 | unsigned int (*polling)(struct met_pmu *pmu, int count, unsigned int *pmu_value); |
| 44 | unsigned long (*perf_event_get_evttype)(struct perf_event *ev); |
| 45 | u32 (*pmu_read_clear_overflow_flag)(void); |
| 46 | struct met_pmu *pmu[MXNR_CPU]; |
| 47 | int event_count[MXNR_CPU]; |
| 48 | /* |
| 49 | * used for compensation of pmu counter loss |
| 50 | * between end of polling and start of cpu pm |
| 51 | */ |
| 52 | unsigned int cpu_pm_unpolled_loss[MXNR_CPU][MXNR_PMU_EVENTS]; |
| 53 | }; |
| 54 | |
| 55 | struct pmu_desc { |
| 56 | unsigned int event; |
| 57 | char name[MXSIZE_PMU_DESC]; |
| 58 | }; |
| 59 | |
| 60 | typedef enum { |
| 61 | SET_PMU_EVT_CNT = 0x0, |
| 62 | SET_PMU_CYCCNT_ENABLE = 0x1, |
| 63 | SET_PMU_BASE_OFFSET = 0x02 |
| 64 | } PMU_IPI_Type; |
| 65 | |
| 66 | struct cpu_pmu_hw *cpu_pmu_hw_init(void); |
| 67 | |
| 68 | extern struct cpu_pmu_hw *cpu_pmu; |
| 69 | extern noinline void mp_cpu(unsigned char cnt, unsigned int *value); |
| 70 | |
| 71 | extern int met_perf_cpupmu_status; |
| 72 | extern void met_perf_cpupmu_polling(unsigned long long stamp, int cpu); |
| 73 | |
| 74 | #endif /* _CPU_PMU_H_ */ |