| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /*
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| 2 | * Copyright (C) 2018 MediaTek Inc.
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| 3 | *
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| 4 | * This program is free software: you can redistribute it and/or modify
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| 5 | * it under the terms of the GNU General Public License version 2 as
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| 6 | * published by the Free Software Foundation.
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| 7 | *
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| 8 | * This program is distributed in the hope that it will be useful,
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| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 11 | * GNU General Public License for more details.
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| 12 | */
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| 13 |
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| 14 | #ifndef _PMU_V2_H_
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| 15 | #define _PMU_V2_H_
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| 16 |
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| 17 | #include <linux/device.h>
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| 18 | #include <linux/threads.h> /* NR_CPUS */
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| 19 |
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| 20 | #define MODE_DISABLED 0
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| 21 | #define MODE_INTERRUPT 1
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| 22 | #define MODE_POLLING 2
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| 23 | #define MXSIZE_PMU_DESC 32
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| 24 | #define MXNR_CPU_V2 NR_CPUS
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| 25 |
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| 26 |
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| 27 | /*******************************************************************************
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| 28 | * Type Define
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| 29 | *******************************************************************************/
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| 30 | struct met_pmu_v2 {
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| 31 | unsigned char mode;
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| 32 | unsigned short event;
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| 33 | struct kobject *kobj_cpu_pmu;
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| 34 | const char *cpu_name;
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| 35 | };
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| 36 |
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| 37 | enum ARM_TYPE_v2 {
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| 38 | CORTEX_A53 = 0xD03,
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| 39 | CORTEX_A35 = 0xD04,
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| 40 | CORTEX_A57 = 0xD07,
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| 41 | CORTEX_A72 = 0xD08,
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| 42 | CORTEX_A73 = 0xD09,
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| 43 | CHIP_UNKNOWN = 0xFFF
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| 44 | };
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| 45 |
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| 46 | struct pmu_desc_v2 {
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| 47 | unsigned int event;
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| 48 | char name[MXSIZE_PMU_DESC];
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| 49 | };
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| 50 |
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| 51 | struct chip_pmu_v2 {
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| 52 | enum ARM_TYPE_v2 type;
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| 53 | struct pmu_desc_v2 *desc;
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| 54 | unsigned int pmu_count;
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| 55 | unsigned int hw_count;
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| 56 | const char *cpu_name;
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| 57 | };
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| 58 |
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| 59 | struct cpu_pmu_hw_v2 {
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| 60 | const char *name;
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| 61 | int max_hw_count;
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| 62 | int (*get_event_desc)(int event, char *event_desc);
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| 63 | int (*check_event)(struct met_pmu_v2 *pmu, int idx, int event);
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| 64 | void (*start)(struct met_pmu_v2 *pmu, int count);
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| 65 | void (*stop)(int count);
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| 66 | unsigned int (*polling)(struct met_pmu_v2 *pmu, int count, unsigned int *pmu_value);
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| 67 | struct met_pmu_v2 *met_pmu[MXNR_CPU_V2];
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| 68 | struct chip_pmu_v2 *chip_pmu[MXNR_CPU_V2];
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| 69 | };
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| 70 |
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| 71 |
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| 72 | extern struct cpu_pmu_hw_v2 *cpu_pmu_hw_v2;
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| 73 |
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| 74 |
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| 75 | /*******************************************************************************
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| 76 | * Fuction Pototypes
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| 77 | *******************************************************************************/
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| 78 | extern noinline void mp_cpu_v2(unsigned char cnt, unsigned int *value);
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| 79 | extern void met_perf_cpupmu_online_v2(unsigned int cpu);
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| 80 | extern void met_perf_cpupmu_down_v2(void *cpu);
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| 81 | extern void met_perf_cpupmu_start_v2(void);
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| 82 | extern void met_perf_cpupmu_stop_v2(void);
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| 83 | extern void cpupmu_polling_v2(unsigned long long stamp, int cpu);
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| 84 |
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| 85 | #endif /* _PMU_V2_H_ */
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