blob: 8062953ce77bae478a17afab897e3571aaf0ef8b [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001What: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address
2Date: April 2017
3Contact: Jeremy Kerr <jk@ozlabs.org>
4Description: Configures which IO port the host side of the UART
5 will appear on the host <-> BMC LPC bus.
6Users: OpenBMC. Proposed changes should be mailed to
7 openbmc@lists.ozlabs.org
8
9What: /sys/bus/platform/drivers/aspeed-vuart*/sirq
10Date: April 2017
11Contact: Jeremy Kerr <jk@ozlabs.org>
12Description: Configures which interrupt number the host side of
13 the UART will appear on the host <-> BMC LPC bus.
14Users: OpenBMC. Proposed changes should be mailed to
15 openbmc@lists.ozlabs.org