rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | ============== |
| 2 | Audio Clocking |
| 3 | ============== |
| 4 | |
| 5 | This text describes the audio clocking terms in ASoC and digital audio in |
| 6 | general. Note: Audio clocking can be complex! |
| 7 | |
| 8 | |
| 9 | Master Clock |
| 10 | ------------ |
| 11 | |
| 12 | Every audio subsystem is driven by a master clock (sometimes referred to as MCLK |
| 13 | or SYSCLK). This audio master clock can be derived from a number of sources |
| 14 | (e.g. crystal, PLL, CPU clock) and is responsible for producing the correct |
| 15 | audio playback and capture sample rates. |
| 16 | |
| 17 | Some master clocks (e.g. PLLs and CPU based clocks) are configurable in that |
| 18 | their speed can be altered by software (depending on the system use and to save |
| 19 | power). Other master clocks are fixed at a set frequency (i.e. crystals). |
| 20 | |
| 21 | |
| 22 | DAI Clocks |
| 23 | ---------- |
| 24 | The Digital Audio Interface is usually driven by a Bit Clock (often referred to |
| 25 | as BCLK). This clock is used to drive the digital audio data across the link |
| 26 | between the codec and CPU. |
| 27 | |
| 28 | The DAI also has a frame clock to signal the start of each audio frame. This |
| 29 | clock is sometimes referred to as LRC (left right clock) or FRAME. This clock |
| 30 | runs at exactly the sample rate (LRC = Rate). |
| 31 | |
| 32 | Bit Clock can be generated as follows:- |
| 33 | |
| 34 | - BCLK = MCLK / x, or |
| 35 | - BCLK = LRC * x, or |
| 36 | - BCLK = LRC * Channels * Word Size |
| 37 | |
| 38 | This relationship depends on the codec or SoC CPU in particular. In general |
| 39 | it is best to configure BCLK to the lowest possible speed (depending on your |
| 40 | rate, number of channels and word size) to save on power. |
| 41 | |
| 42 | It is also desirable to use the codec (if possible) to drive (or master) the |
| 43 | audio clocks as it usually gives more accurate sample rates than the CPU. |
| 44 | |
| 45 | |
| 46 | |