blob: fb7c44cdadcb0bd45796ff03ee28a5388ee90699 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * TI DA830/OMAP L137 EVM board
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
6 *
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/console.h>
15#include <linux/interrupt.h>
16#include <linux/gpio.h>
17#include <linux/gpio/machine.h>
18#include <linux/platform_device.h>
19#include <linux/i2c.h>
20#include <linux/platform_data/pcf857x.h>
21#include <linux/platform_data/at24.h>
22#include <linux/mtd/mtd.h>
23#include <linux/mtd/partitions.h>
24#include <linux/spi/spi.h>
25#include <linux/spi/flash.h>
26#include <linux/platform_data/gpio-davinci.h>
27#include <linux/platform_data/mtd-davinci.h>
28#include <linux/platform_data/mtd-davinci-aemif.h>
29#include <linux/platform_data/spi-davinci.h>
30#include <linux/platform_data/usb-davinci.h>
31#include <linux/regulator/machine.h>
32
33#include <asm/mach-types.h>
34#include <asm/mach/arch.h>
35
36#include <mach/common.h>
37#include "cp_intc.h"
38#include <mach/mux.h>
39#include <mach/da8xx.h>
40
41#define DA830_EVM_PHY_ID ""
42/*
43 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
44 */
45#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
46#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
47
48static const short da830_evm_usb11_pins[] = {
49 DA830_GPIO1_15, DA830_GPIO2_4,
50 -1
51};
52
53static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
54
55static int da830_evm_usb_set_power(unsigned port, int on)
56{
57 gpio_set_value(ON_BD_USB_DRV, on);
58 return 0;
59}
60
61static int da830_evm_usb_get_power(unsigned port)
62{
63 return gpio_get_value(ON_BD_USB_DRV);
64}
65
66static int da830_evm_usb_get_oci(unsigned port)
67{
68 return !gpio_get_value(ON_BD_USB_OVC);
69}
70
71static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
72
73static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
74{
75 int irq = gpio_to_irq(ON_BD_USB_OVC);
76 int error = 0;
77
78 if (handler != NULL) {
79 da830_evm_usb_ocic_handler = handler;
80
81 error = request_irq(irq, da830_evm_usb_ocic_irq,
82 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
83 "OHCI over-current indicator", NULL);
84 if (error)
85 pr_err("%s: could not request IRQ to watch over-current indicator changes\n",
86 __func__);
87 } else
88 free_irq(irq, NULL);
89
90 return error;
91}
92
93static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
94 .set_power = da830_evm_usb_set_power,
95 .get_power = da830_evm_usb_get_power,
96 .get_oci = da830_evm_usb_get_oci,
97 .ocic_notify = da830_evm_usb_ocic_notify,
98
99 /* TPS2065 switch @ 5V */
100 .potpgt = (3 + 1) / 2, /* 3 ms max */
101};
102
103static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
104{
105 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
106 return IRQ_HANDLED;
107}
108
109static __init void da830_evm_usb_init(void)
110{
111 int ret;
112
113 /* USB_REFCLKIN is not used. */
114 ret = da8xx_register_usb20_phy_clk(false);
115 if (ret)
116 pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
117 __func__, ret);
118
119 ret = da8xx_register_usb11_phy_clk(false);
120 if (ret)
121 pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
122 __func__, ret);
123
124 ret = da8xx_register_usb_phy();
125 if (ret)
126 pr_warn("%s: USB PHY registration failed: %d\n",
127 __func__, ret);
128
129 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
130 if (ret)
131 pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
132 else {
133 /*
134 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
135 * with the power on to power good time of 3 ms.
136 */
137 ret = da8xx_register_usb20(1000, 3);
138 if (ret)
139 pr_warn("%s: USB 2.0 registration failed: %d\n",
140 __func__, ret);
141 }
142
143 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
144 if (ret) {
145 pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
146 return;
147 }
148
149 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
150 if (ret) {
151 pr_err("%s: failed to request GPIO for USB 1.1 port power control: %d\n",
152 __func__, ret);
153 return;
154 }
155 gpio_direction_output(ON_BD_USB_DRV, 0);
156
157 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
158 if (ret) {
159 pr_err("%s: failed to request GPIO for USB 1.1 port over-current indicator: %d\n",
160 __func__, ret);
161 return;
162 }
163 gpio_direction_input(ON_BD_USB_OVC);
164
165 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
166 if (ret)
167 pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
168}
169
170static const short da830_evm_mcasp1_pins[] = {
171 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
172 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
173 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
174 DA830_AXR1_11,
175 -1
176};
177
178static u8 da830_iis_serializer_direction[] = {
179 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
180 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
181 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
182};
183
184static struct snd_platform_data da830_evm_snd_data = {
185 .tx_dma_offset = 0x2000,
186 .rx_dma_offset = 0x2000,
187 .op_mode = DAVINCI_MCASP_IIS_MODE,
188 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
189 .tdm_slots = 2,
190 .serial_dir = da830_iis_serializer_direction,
191 .asp_chan_q = EVENTQ_0,
192 .version = MCASP_VERSION_2,
193 .txnumevt = 1,
194 .rxnumevt = 1,
195};
196
197/*
198 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
199 */
200static const short da830_evm_mmc_sd_pins[] = {
201 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
202 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
203 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
204 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
205 -1
206};
207
208#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
209#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
210
211static struct gpiod_lookup_table mmc_gpios_table = {
212 .dev_id = "da830-mmc.0",
213 .table = {
214 /* gpio chip 1 contains gpio range 32-63 */
215 GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_CD_PIN, "cd",
216 GPIO_ACTIVE_LOW),
217 GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_WP_PIN, "wp",
218 GPIO_ACTIVE_LOW),
219 },
220};
221
222static struct davinci_mmc_config da830_evm_mmc_config = {
223 .wires = 8,
224 .max_freq = 50000000,
225 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
226};
227
228static inline void da830_evm_init_mmc(void)
229{
230 int ret;
231
232 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
233 if (ret) {
234 pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret);
235 return;
236 }
237
238 gpiod_add_lookup_table(&mmc_gpios_table);
239
240 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
241 if (ret) {
242 pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret);
243 gpiod_remove_lookup_table(&mmc_gpios_table);
244 }
245}
246
247/*
248 * UI board NAND/NOR flashes only use 8-bit data bus.
249 */
250static const short da830_evm_emif25_pins[] = {
251 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
252 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
253 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
254 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
255 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
256 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
257 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
258 -1
259};
260
261#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
262
263#ifdef CONFIG_DA830_UI_NAND
264static struct mtd_partition da830_evm_nand_partitions[] = {
265 /* bootloader (U-Boot, etc) in first sector */
266 [0] = {
267 .name = "bootloader",
268 .offset = 0,
269 .size = SZ_128K,
270 .mask_flags = MTD_WRITEABLE, /* force read-only */
271 },
272 /* bootloader params in the next sector */
273 [1] = {
274 .name = "params",
275 .offset = MTDPART_OFS_APPEND,
276 .size = SZ_128K,
277 .mask_flags = MTD_WRITEABLE, /* force read-only */
278 },
279 /* kernel */
280 [2] = {
281 .name = "kernel",
282 .offset = MTDPART_OFS_APPEND,
283 .size = SZ_2M,
284 .mask_flags = 0,
285 },
286 /* file system */
287 [3] = {
288 .name = "filesystem",
289 .offset = MTDPART_OFS_APPEND,
290 .size = MTDPART_SIZ_FULL,
291 .mask_flags = 0,
292 }
293};
294
295/* flash bbt decriptors */
296static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
297static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
298
299static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
300 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
301 NAND_BBT_WRITE | NAND_BBT_2BIT |
302 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
303 .offs = 2,
304 .len = 4,
305 .veroffs = 16,
306 .maxblocks = 4,
307 .pattern = da830_evm_nand_bbt_pattern
308};
309
310static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
311 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
312 NAND_BBT_WRITE | NAND_BBT_2BIT |
313 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
314 .offs = 2,
315 .len = 4,
316 .veroffs = 16,
317 .maxblocks = 4,
318 .pattern = da830_evm_nand_mirror_pattern
319};
320
321static struct davinci_aemif_timing da830_evm_nandflash_timing = {
322 .wsetup = 24,
323 .wstrobe = 21,
324 .whold = 14,
325 .rsetup = 19,
326 .rstrobe = 50,
327 .rhold = 0,
328 .ta = 20,
329};
330
331static struct davinci_nand_pdata da830_evm_nand_pdata = {
332 .parts = da830_evm_nand_partitions,
333 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
334 .ecc_mode = NAND_ECC_HW,
335 .ecc_bits = 4,
336 .bbt_options = NAND_BBT_USE_FLASH,
337 .bbt_td = &da830_evm_nand_bbt_main_descr,
338 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
339 .timing = &da830_evm_nandflash_timing,
340};
341
342static struct resource da830_evm_nand_resources[] = {
343 [0] = { /* First memory resource is NAND I/O window */
344 .start = DA8XX_AEMIF_CS3_BASE,
345 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
346 .flags = IORESOURCE_MEM,
347 },
348 [1] = { /* Second memory resource is AEMIF control registers */
349 .start = DA8XX_AEMIF_CTL_BASE,
350 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
351 .flags = IORESOURCE_MEM,
352 },
353};
354
355static struct platform_device da830_evm_nand_device = {
356 .name = "davinci_nand",
357 .id = 1,
358 .dev = {
359 .platform_data = &da830_evm_nand_pdata,
360 },
361 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
362 .resource = da830_evm_nand_resources,
363};
364
365static inline void da830_evm_init_nand(int mux_mode)
366{
367 int ret;
368
369 if (HAS_MMC) {
370 pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n"
371 "\tDisable MMC/SD for NAND support\n");
372 return;
373 }
374
375 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
376 if (ret)
377 pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
378
379 ret = platform_device_register(&da830_evm_nand_device);
380 if (ret)
381 pr_warn("%s: NAND device not registered\n", __func__);
382
383 if (davinci_aemif_setup(&da830_evm_nand_device))
384 pr_warn("%s: Cannot configure AEMIF\n", __func__);
385
386 gpio_direction_output(mux_mode, 1);
387}
388#else
389static inline void da830_evm_init_nand(int mux_mode) { }
390#endif
391
392#ifdef CONFIG_DA830_UI_LCD
393static inline void da830_evm_init_lcdc(int mux_mode)
394{
395 int ret;
396
397 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
398 if (ret)
399 pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret);
400
401 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
402 if (ret)
403 pr_warn("%s: lcd setup failed: %d\n", __func__, ret);
404
405 gpio_direction_output(mux_mode, 0);
406}
407#else
408static inline void da830_evm_init_lcdc(int mux_mode) { }
409#endif
410
411static struct at24_platform_data da830_evm_i2c_eeprom_info = {
412 .byte_len = SZ_256K / 8,
413 .page_size = 64,
414 .flags = AT24_FLAG_ADDR16,
415 .setup = davinci_get_mac_addr,
416 .context = (void *)0x7f00,
417};
418
419static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
420 int gpio, unsigned ngpio, void *context)
421{
422 gpio_request(gpio + 6, "UI MUX_MODE");
423
424 /* Drive mux mode low to match the default without UI card */
425 gpio_direction_output(gpio + 6, 0);
426
427 da830_evm_init_lcdc(gpio + 6);
428
429 da830_evm_init_nand(gpio + 6);
430
431 return 0;
432}
433
434static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
435 unsigned ngpio, void *context)
436{
437 gpio_free(gpio + 6);
438 return 0;
439}
440
441static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
442 .gpio_base = DAVINCI_N_GPIO,
443 .setup = da830_evm_ui_expander_setup,
444 .teardown = da830_evm_ui_expander_teardown,
445};
446
447static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
448 {
449 I2C_BOARD_INFO("24c256", 0x50),
450 .platform_data = &da830_evm_i2c_eeprom_info,
451 },
452 {
453 I2C_BOARD_INFO("tlv320aic3x", 0x18),
454 },
455 {
456 I2C_BOARD_INFO("pcf8574", 0x3f),
457 .platform_data = &da830_evm_ui_expander_info,
458 },
459};
460
461static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
462 .bus_freq = 100, /* kHz */
463 .bus_delay = 0, /* usec */
464};
465
466/*
467 * The following EDMA channels/slots are not being used by drivers (for
468 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
469 * they are being reserved for codecs on the DSP side.
470 */
471static const s16 da830_dma_rsv_chans[][2] = {
472 /* (offset, number) */
473 { 8, 2},
474 {12, 2},
475 {24, 4},
476 {30, 2},
477 {-1, -1}
478};
479
480static const s16 da830_dma_rsv_slots[][2] = {
481 /* (offset, number) */
482 { 8, 2},
483 {12, 2},
484 {24, 4},
485 {30, 26},
486 {-1, -1}
487};
488
489static struct edma_rsv_info da830_edma_rsv[] = {
490 {
491 .rsv_chans = da830_dma_rsv_chans,
492 .rsv_slots = da830_dma_rsv_slots,
493 },
494};
495
496static struct mtd_partition da830evm_spiflash_part[] = {
497 [0] = {
498 .name = "DSP-UBL",
499 .offset = 0,
500 .size = SZ_8K,
501 .mask_flags = MTD_WRITEABLE,
502 },
503 [1] = {
504 .name = "ARM-UBL",
505 .offset = MTDPART_OFS_APPEND,
506 .size = SZ_16K + SZ_8K,
507 .mask_flags = MTD_WRITEABLE,
508 },
509 [2] = {
510 .name = "U-Boot",
511 .offset = MTDPART_OFS_APPEND,
512 .size = SZ_256K - SZ_32K,
513 .mask_flags = MTD_WRITEABLE,
514 },
515 [3] = {
516 .name = "U-Boot-Environment",
517 .offset = MTDPART_OFS_APPEND,
518 .size = SZ_16K,
519 .mask_flags = 0,
520 },
521 [4] = {
522 .name = "Kernel",
523 .offset = MTDPART_OFS_APPEND,
524 .size = MTDPART_SIZ_FULL,
525 .mask_flags = 0,
526 },
527};
528
529static struct flash_platform_data da830evm_spiflash_data = {
530 .name = "m25p80",
531 .parts = da830evm_spiflash_part,
532 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
533 .type = "w25x32",
534};
535
536static struct davinci_spi_config da830evm_spiflash_cfg = {
537 .io_type = SPI_IO_TYPE_DMA,
538 .c2tdelay = 8,
539 .t2cdelay = 8,
540};
541
542static struct spi_board_info da830evm_spi_info[] = {
543 {
544 .modalias = "m25p80",
545 .platform_data = &da830evm_spiflash_data,
546 .controller_data = &da830evm_spiflash_cfg,
547 .mode = SPI_MODE_0,
548 .max_speed_hz = 30000000,
549 .bus_num = 0,
550 .chip_select = 0,
551 },
552};
553
554static __init void da830_evm_init(void)
555{
556 struct davinci_soc_info *soc_info = &davinci_soc_info;
557 int ret;
558
559 ret = da8xx_register_cfgchip();
560 if (ret)
561 pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
562
563 ret = da830_register_gpio();
564 if (ret)
565 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
566
567 ret = da830_register_edma(da830_edma_rsv);
568 if (ret)
569 pr_warn("%s: edma registration failed: %d\n", __func__, ret);
570
571 ret = davinci_cfg_reg_list(da830_i2c0_pins);
572 if (ret)
573 pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret);
574
575 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
576 if (ret)
577 pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret);
578
579 da830_evm_usb_init();
580
581 soc_info->emac_pdata->rmii_en = 1;
582 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
583
584 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
585 if (ret)
586 pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret);
587
588 ret = da8xx_register_emac();
589 if (ret)
590 pr_warn("%s: emac registration failed: %d\n", __func__, ret);
591
592 ret = da8xx_register_watchdog();
593 if (ret)
594 pr_warn("%s: watchdog registration failed: %d\n",
595 __func__, ret);
596
597 davinci_serial_init(da8xx_serial_device);
598 i2c_register_board_info(1, da830_evm_i2c_devices,
599 ARRAY_SIZE(da830_evm_i2c_devices));
600
601 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
602 if (ret)
603 pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret);
604
605 da8xx_register_mcasp(1, &da830_evm_snd_data);
606
607 da830_evm_init_mmc();
608
609 ret = da8xx_register_rtc();
610 if (ret)
611 pr_warn("%s: rtc setup failed: %d\n", __func__, ret);
612
613 ret = spi_register_board_info(da830evm_spi_info,
614 ARRAY_SIZE(da830evm_spi_info));
615 if (ret)
616 pr_warn("%s: spi info registration failed: %d\n",
617 __func__, ret);
618
619 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
620 if (ret)
621 pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret);
622
623 regulator_has_full_constraints();
624}
625
626#ifdef CONFIG_SERIAL_8250_CONSOLE
627static int __init da830_evm_console_init(void)
628{
629 if (!machine_is_davinci_da830_evm())
630 return 0;
631
632 return add_preferred_console("ttyS", 2, "115200");
633}
634console_initcall(da830_evm_console_init);
635#endif
636
637static void __init da830_evm_map_io(void)
638{
639 da830_init();
640}
641
642MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
643 .atag_offset = 0x100,
644 .map_io = da830_evm_map_io,
645 .init_irq = cp_intc_init,
646 .init_time = davinci_timer_init,
647 .init_machine = da830_evm_init,
648 .init_late = davinci_init_late,
649 .dma_zone_size = SZ_128M,
650 .restart = da8xx_restart,
651MACHINE_END