rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * linux/arch/arm/mach-footbridge/irq.c |
| 3 | * |
| 4 | * Copyright (C) 1996-2000 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * Changelog: |
| 11 | * 22-Aug-1998 RMK Restructured IRQ routines |
| 12 | * 03-Sep-1998 PJB Merged CATS support |
| 13 | * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder |
| 14 | * 26-Jan-1999 PJB Don't use IACK on CATS |
| 15 | * 16-Mar-1999 RMK Added autodetect of ISA PICs |
| 16 | */ |
| 17 | #include <linux/ioport.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/list.h> |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/io.h> |
| 22 | #include <linux/spinlock.h> |
| 23 | |
| 24 | #include <asm/mach/irq.h> |
| 25 | |
| 26 | #include <mach/hardware.h> |
| 27 | #include <asm/hardware/dec21285.h> |
| 28 | #include <asm/irq.h> |
| 29 | #include <asm/mach-types.h> |
| 30 | |
| 31 | #include "common.h" |
| 32 | |
| 33 | static void isa_mask_pic_lo_irq(struct irq_data *d) |
| 34 | { |
| 35 | unsigned int mask = 1 << (d->irq & 7); |
| 36 | |
| 37 | outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); |
| 38 | } |
| 39 | |
| 40 | static void isa_ack_pic_lo_irq(struct irq_data *d) |
| 41 | { |
| 42 | unsigned int mask = 1 << (d->irq & 7); |
| 43 | |
| 44 | outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); |
| 45 | outb(0x20, PIC_LO); |
| 46 | } |
| 47 | |
| 48 | static void isa_unmask_pic_lo_irq(struct irq_data *d) |
| 49 | { |
| 50 | unsigned int mask = 1 << (d->irq & 7); |
| 51 | |
| 52 | outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO); |
| 53 | } |
| 54 | |
| 55 | static struct irq_chip isa_lo_chip = { |
| 56 | .irq_ack = isa_ack_pic_lo_irq, |
| 57 | .irq_mask = isa_mask_pic_lo_irq, |
| 58 | .irq_unmask = isa_unmask_pic_lo_irq, |
| 59 | }; |
| 60 | |
| 61 | static void isa_mask_pic_hi_irq(struct irq_data *d) |
| 62 | { |
| 63 | unsigned int mask = 1 << (d->irq & 7); |
| 64 | |
| 65 | outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); |
| 66 | } |
| 67 | |
| 68 | static void isa_ack_pic_hi_irq(struct irq_data *d) |
| 69 | { |
| 70 | unsigned int mask = 1 << (d->irq & 7); |
| 71 | |
| 72 | outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); |
| 73 | outb(0x62, PIC_LO); |
| 74 | outb(0x20, PIC_HI); |
| 75 | } |
| 76 | |
| 77 | static void isa_unmask_pic_hi_irq(struct irq_data *d) |
| 78 | { |
| 79 | unsigned int mask = 1 << (d->irq & 7); |
| 80 | |
| 81 | outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI); |
| 82 | } |
| 83 | |
| 84 | static struct irq_chip isa_hi_chip = { |
| 85 | .irq_ack = isa_ack_pic_hi_irq, |
| 86 | .irq_mask = isa_mask_pic_hi_irq, |
| 87 | .irq_unmask = isa_unmask_pic_hi_irq, |
| 88 | }; |
| 89 | |
| 90 | static void isa_irq_handler(struct irq_desc *desc) |
| 91 | { |
| 92 | unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE; |
| 93 | |
| 94 | if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) { |
| 95 | do_bad_IRQ(desc); |
| 96 | return; |
| 97 | } |
| 98 | |
| 99 | generic_handle_irq(isa_irq); |
| 100 | } |
| 101 | |
| 102 | static struct irqaction irq_cascade = { |
| 103 | .handler = no_action, |
| 104 | .name = "cascade", |
| 105 | }; |
| 106 | |
| 107 | static struct resource pic1_resource = { |
| 108 | .name = "pic1", |
| 109 | .start = 0x20, |
| 110 | .end = 0x3f, |
| 111 | }; |
| 112 | |
| 113 | static struct resource pic2_resource = { |
| 114 | .name = "pic2", |
| 115 | .start = 0xa0, |
| 116 | .end = 0xbf, |
| 117 | }; |
| 118 | |
| 119 | void __init isa_init_irq(unsigned int host_irq) |
| 120 | { |
| 121 | unsigned int irq; |
| 122 | |
| 123 | /* |
| 124 | * Setup, and then probe for an ISA PIC |
| 125 | * If the PIC is not there, then we |
| 126 | * ignore the PIC. |
| 127 | */ |
| 128 | outb(0x11, PIC_LO); |
| 129 | outb(_ISA_IRQ(0), PIC_MASK_LO); /* IRQ number */ |
| 130 | outb(0x04, PIC_MASK_LO); /* Slave on Ch2 */ |
| 131 | outb(0x01, PIC_MASK_LO); /* x86 */ |
| 132 | outb(0xf5, PIC_MASK_LO); /* pattern: 11110101 */ |
| 133 | |
| 134 | outb(0x11, PIC_HI); |
| 135 | outb(_ISA_IRQ(8), PIC_MASK_HI); /* IRQ number */ |
| 136 | outb(0x02, PIC_MASK_HI); /* Slave on Ch1 */ |
| 137 | outb(0x01, PIC_MASK_HI); /* x86 */ |
| 138 | outb(0xfa, PIC_MASK_HI); /* pattern: 11111010 */ |
| 139 | |
| 140 | outb(0x0b, PIC_LO); |
| 141 | outb(0x0b, PIC_HI); |
| 142 | |
| 143 | if (inb(PIC_MASK_LO) == 0xf5 && inb(PIC_MASK_HI) == 0xfa) { |
| 144 | outb(0xff, PIC_MASK_LO);/* mask all IRQs */ |
| 145 | outb(0xff, PIC_MASK_HI);/* mask all IRQs */ |
| 146 | } else { |
| 147 | printk(KERN_INFO "IRQ: ISA PIC not found\n"); |
| 148 | host_irq = (unsigned int)-1; |
| 149 | } |
| 150 | |
| 151 | if (host_irq != (unsigned int)-1) { |
| 152 | for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { |
| 153 | irq_set_chip_and_handler(irq, &isa_lo_chip, |
| 154 | handle_level_irq); |
| 155 | irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); |
| 156 | } |
| 157 | |
| 158 | for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { |
| 159 | irq_set_chip_and_handler(irq, &isa_hi_chip, |
| 160 | handle_level_irq); |
| 161 | irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); |
| 162 | } |
| 163 | |
| 164 | request_resource(&ioport_resource, &pic1_resource); |
| 165 | request_resource(&ioport_resource, &pic2_resource); |
| 166 | setup_irq(IRQ_ISA_CASCADE, &irq_cascade); |
| 167 | |
| 168 | irq_set_chained_handler(host_irq, isa_irq_handler); |
| 169 | |
| 170 | /* |
| 171 | * On the NetWinder, don't automatically |
| 172 | * enable ISA IRQ11 when it is requested. |
| 173 | * There appears to be a missing pull-up |
| 174 | * resistor on this line. |
| 175 | */ |
| 176 | if (machine_is_netwinder()) |
| 177 | irq_modify_status(_ISA_IRQ(11), |
| 178 | IRQ_NOREQUEST | IRQ_NOPROBE, IRQ_NOAUTOEN); |
| 179 | } |
| 180 | } |
| 181 | |
| 182 | |