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192.168.1.100 / T103 / 1f884588077ad3476b9c91cbb0ee9ee0332bbb68 / . / src / kernel / linux / v4.14 / arch / arm / mach-shmobile / pm-rcar-gen2.c
blob: e5f215c8b218100af7cc5f2ca079d78420b24571 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +0800[diff] [blame^]1/*
2 * R-Car Generation 2 Power management support
3 *
4 * Copyright (C) 2013 - 2015 Renesas Electronics Corporation
5 * Copyright (C) 2011 Renesas Solutions Corp.
6 * Copyright (C) 2011 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/ioport.h>
15#include <linux/of.h>
16#include <linux/of_address.h>
17#include <linux/smp.h>
18#include <linux/soc/renesas/rcar-sysc.h>
19#include <asm/io.h>
20#include "common.h"
21#include "rcar-gen2.h"
22
23/* RST */
24#define RST 0xe6160000
25
26#define CA15BAR 0x0020 /* CA15 Boot Address Register */
27#define CA7BAR 0x0030 /* CA7 Boot Address Register */
28#define CA15RESCNT 0x0040 /* CA15 Reset Control Register */
29#define CA7RESCNT 0x0044 /* CA7 Reset Control Register */
30
31/* SYS Boot Address Register */
32#define SBAR_BAREN BIT(4) /* SBAR is valid */
33
34/* Reset Control Registers */
35#define CA15RESCNT_CODE 0xa5a50000
36#define CA15RESCNT_CPUS 0xf /* CPU0-3 */
37#define CA7RESCNT_CODE 0x5a5a0000
38#define CA7RESCNT_CPUS 0xf /* CPU0-3 */
39
40
41/* On-chip RAM */
42#define ICRAM1 0xe63c0000 /* Inter Connect RAM1 (4 KiB) */
43
44static inline u32 phys_to_sbar(phys_addr_t addr)
45{
46 return (addr >> 8) & 0xfffffc00;
47}
48
49/* SYSC */
50#define SYSCIER 0x0c
51#define SYSCIMR 0x10
52
53#if defined(CONFIG_SMP)
54
55static void __init rcar_gen2_sysc_init(u32 syscier)
56{
57 rcar_sysc_init(0xe6180000, syscier);
58}
59
60#else /* CONFIG_SMP */
61
62static inline void rcar_gen2_sysc_init(u32 syscier) {}
63
64#endif /* CONFIG_SMP */
65
66void __init rcar_gen2_pm_init(void)
67{
68 void __iomem *p;
69 u32 bar;
70 static int once;
71 struct device_node *np, *cpus;
72 bool has_a7 = false;
73 bool has_a15 = false;
74 struct resource res;
75 u32 syscier = 0;
76 int error;
77
78 if (once++)
79 return;
80
81 cpus = of_find_node_by_path("/cpus");
82 if (!cpus)
83 return;
84
85 for_each_child_of_node(cpus, np) {
86 if (of_device_is_compatible(np, "arm,cortex-a15"))
87 has_a15 = true;
88 else if (of_device_is_compatible(np, "arm,cortex-a7"))
89 has_a7 = true;
90 }
91
92 if (of_machine_is_compatible("renesas,r8a7790"))
93 syscier = 0x013111ef;
94 else if (of_machine_is_compatible("renesas,r8a7791"))
95 syscier = 0x00111003;
96
97 np = of_find_compatible_node(NULL, NULL, "renesas,smp-sram");
98 if (!np) {
99 /* No smp-sram in DT, fall back to hardcoded address */
100 res = (struct resource)DEFINE_RES_MEM(ICRAM1,
101 shmobile_boot_size);
102 goto map;
103 }
104
105 error = of_address_to_resource(np, 0, &res);
106 if (error) {
107 pr_err("Failed to get smp-sram address: %d\n", error);
108 return;
109 }
110
111map:
112 /* RAM for jump stub, because BAR requires 256KB aligned address */
113 if (res.start & (256 * 1024 - 1) ||
114 resource_size(&res) < shmobile_boot_size) {
115 pr_err("Invalid smp-sram region\n");
116 return;
117 }
118
119 p = ioremap(res.start, resource_size(&res));
120 if (!p)
121 return;
122
123 memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
124 iounmap(p);
125
126 /* setup reset vectors */
127 p = ioremap_nocache(RST, 0x63);
128 bar = phys_to_sbar(res.start);
129 if (has_a15) {
130 writel_relaxed(bar, p + CA15BAR);
131 writel_relaxed(bar | SBAR_BAREN, p + CA15BAR);
132
133 /* de-assert reset for CA15 CPUs */
134 writel_relaxed((readl_relaxed(p + CA15RESCNT) &
135 ~CA15RESCNT_CPUS) | CA15RESCNT_CODE,
136 p + CA15RESCNT);
137 }
138 if (has_a7) {
139 writel_relaxed(bar, p + CA7BAR);
140 writel_relaxed(bar | SBAR_BAREN, p + CA7BAR);
141
142 /* de-assert reset for CA7 CPUs */
143 writel_relaxed((readl_relaxed(p + CA7RESCNT) &
144 ~CA7RESCNT_CPUS) | CA7RESCNT_CODE,
145 p + CA7RESCNT);
146 }
147 iounmap(p);
148
149 rcar_gen2_sysc_init(syscier);
150 shmobile_smp_apmu_suspend_init();
151}