blob: 7fa4a0b5f6549287c7db537f36aaabdc48e04093 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * r8a7778 processor support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 * Copyright (C) 2013 Cogent Embedded, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/io.h>
19#include <linux/irqchip.h>
20
21#include <asm/mach/arch.h>
22
23#include "common.h"
24
25#define INT2SMSKCR0 0x82288 /* 0xfe782288 */
26#define INT2SMSKCR1 0x8228c /* 0xfe78228c */
27
28#define INT2NTSR0 0x00018 /* 0xfe700018 */
29#define INT2NTSR1 0x0002c /* 0xfe70002c */
30
31static void __init r8a7778_init_irq_dt(void)
32{
33 void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
34
35 BUG_ON(!base);
36
37 irqchip_init();
38
39 /* route all interrupts to ARM */
40 __raw_writel(0x73ffffff, base + INT2NTSR0);
41 __raw_writel(0xffffffff, base + INT2NTSR1);
42
43 /* unmask all known interrupts in INTCS2 */
44 __raw_writel(0x08330773, base + INT2SMSKCR0);
45 __raw_writel(0x00311110, base + INT2SMSKCR1);
46
47 iounmap(base);
48}
49
50static const char *const r8a7778_compat_dt[] __initconst = {
51 "renesas,r8a7778",
52 NULL,
53};
54
55DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
56 .init_early = shmobile_init_delay,
57 .init_irq = r8a7778_init_irq_dt,
58 .init_late = shmobile_init_late,
59 .dt_compat = r8a7778_compat_dt,
60MACHINE_END