| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | config SIBYTE_SB1250 |
| 3 | bool |
| 4 | select CEVT_SB1250 |
| 5 | select CSRC_SB1250 |
| 6 | select HW_HAS_PCI |
| 7 | select IRQ_MIPS_CPU |
| 8 | select SIBYTE_ENABLE_LDT_IF_PCI |
| 9 | select SIBYTE_HAS_ZBUS_PROFILING |
| 10 | select SIBYTE_SB1xxx_SOC |
| 11 | select SYS_SUPPORTS_SMP |
| 12 | |
| 13 | config SIBYTE_BCM1120 |
| 14 | bool |
| 15 | select CEVT_SB1250 |
| 16 | select CSRC_SB1250 |
| 17 | select IRQ_MIPS_CPU |
| 18 | select SIBYTE_BCM112X |
| 19 | select SIBYTE_HAS_ZBUS_PROFILING |
| 20 | select SIBYTE_SB1xxx_SOC |
| 21 | |
| 22 | config SIBYTE_BCM1125 |
| 23 | bool |
| 24 | select CEVT_SB1250 |
| 25 | select CSRC_SB1250 |
| 26 | select HW_HAS_PCI |
| 27 | select IRQ_MIPS_CPU |
| 28 | select SIBYTE_BCM112X |
| 29 | select SIBYTE_HAS_ZBUS_PROFILING |
| 30 | select SIBYTE_SB1xxx_SOC |
| 31 | |
| 32 | config SIBYTE_BCM1125H |
| 33 | bool |
| 34 | select CEVT_SB1250 |
| 35 | select CSRC_SB1250 |
| 36 | select HW_HAS_PCI |
| 37 | select IRQ_MIPS_CPU |
| 38 | select SIBYTE_BCM112X |
| 39 | select SIBYTE_ENABLE_LDT_IF_PCI |
| 40 | select SIBYTE_HAS_ZBUS_PROFILING |
| 41 | select SIBYTE_SB1xxx_SOC |
| 42 | |
| 43 | config SIBYTE_BCM112X |
| 44 | bool |
| 45 | select CEVT_SB1250 |
| 46 | select CSRC_SB1250 |
| 47 | select IRQ_MIPS_CPU |
| 48 | select SIBYTE_SB1xxx_SOC |
| 49 | select SIBYTE_HAS_ZBUS_PROFILING |
| 50 | |
| 51 | config SIBYTE_BCM1x80 |
| 52 | bool |
| 53 | select CEVT_BCM1480 |
| 54 | select CSRC_BCM1480 |
| 55 | select HW_HAS_PCI |
| 56 | select IRQ_MIPS_CPU |
| 57 | select SIBYTE_HAS_ZBUS_PROFILING |
| 58 | select SIBYTE_SB1xxx_SOC |
| 59 | select SYS_SUPPORTS_SMP |
| 60 | |
| 61 | config SIBYTE_BCM1x55 |
| 62 | bool |
| 63 | select CEVT_BCM1480 |
| 64 | select CSRC_BCM1480 |
| 65 | select HW_HAS_PCI |
| 66 | select IRQ_MIPS_CPU |
| 67 | select SIBYTE_SB1xxx_SOC |
| 68 | select SIBYTE_HAS_ZBUS_PROFILING |
| 69 | select SYS_SUPPORTS_SMP |
| 70 | |
| 71 | config SIBYTE_SB1xxx_SOC |
| 72 | bool |
| 73 | select DMA_COHERENT |
| 74 | select IRQ_MIPS_CPU |
| 75 | select SWAP_IO_SPACE |
| 76 | select SYS_SUPPORTS_32BIT_KERNEL |
| 77 | select SYS_SUPPORTS_64BIT_KERNEL |
| 78 | select FW_CFE |
| 79 | select SYS_HAS_EARLY_PRINTK |
| 80 | |
| 81 | choice |
| 82 | prompt "SiByte SOC Stepping" |
| 83 | depends on SIBYTE_SB1xxx_SOC |
| 84 | |
| 85 | config CPU_SB1_PASS_2_1250 |
| 86 | bool "1250 An" |
| 87 | depends on SIBYTE_SB1250 |
| 88 | select CPU_SB1_PASS_2 |
| 89 | help |
| 90 | Also called BCM1250 Pass 2 |
| 91 | |
| 92 | config CPU_SB1_PASS_2_2 |
| 93 | bool "1250 Bn" |
| 94 | depends on SIBYTE_SB1250 |
| 95 | select CPU_HAS_PREFETCH |
| 96 | help |
| 97 | Also called BCM1250 Pass 2.2 |
| 98 | |
| 99 | config CPU_SB1_PASS_4 |
| 100 | bool "1250 Cn" |
| 101 | depends on SIBYTE_SB1250 |
| 102 | select CPU_HAS_PREFETCH |
| 103 | help |
| 104 | Also called BCM1250 Pass 3 |
| 105 | |
| 106 | config CPU_SB1_PASS_2_112x |
| 107 | bool "112x Hybrid" |
| 108 | depends on SIBYTE_BCM112X |
| 109 | select CPU_SB1_PASS_2 |
| 110 | |
| 111 | config CPU_SB1_PASS_3 |
| 112 | bool "112x An" |
| 113 | depends on SIBYTE_BCM112X |
| 114 | select CPU_HAS_PREFETCH |
| 115 | |
| 116 | endchoice |
| 117 | |
| 118 | config CPU_SB1_PASS_2 |
| 119 | bool |
| 120 | |
| 121 | config SIBYTE_HAS_LDT |
| 122 | bool |
| 123 | |
| 124 | config SIBYTE_ENABLE_LDT_IF_PCI |
| 125 | bool |
| 126 | select SIBYTE_HAS_LDT if PCI |
| 127 | |
| 128 | config SB1_CEX_ALWAYS_FATAL |
| 129 | bool "All cache exceptions considered fatal (no recovery attempted)" |
| 130 | depends on SIBYTE_SB1xxx_SOC |
| 131 | |
| 132 | config SB1_CERR_STALL |
| 133 | bool "Stall (rather than panic) on fatal cache error" |
| 134 | depends on SIBYTE_SB1xxx_SOC |
| 135 | |
| 136 | config SIBYTE_CFE_CONSOLE |
| 137 | bool "Use firmware console" |
| 138 | depends on SIBYTE_SB1xxx_SOC |
| 139 | help |
| 140 | Use the CFE API's console write routines during boot. Other console |
| 141 | options (VT console, sb1250 duart console, etc.) should not be |
| 142 | configured. |
| 143 | |
| 144 | config SIBYTE_BUS_WATCHER |
| 145 | bool "Support for Bus Watcher statistics" |
| 146 | depends on SIBYTE_SB1xxx_SOC && \ |
| 147 | (SIBYTE_BCM112X || SIBYTE_SB1250 || \ |
| 148 | SIBYTE_BCM1x55 || SIBYTE_BCM1x80) |
| 149 | help |
| 150 | Handle and keep statistics on the bus error interrupts (COR_ECC, |
| 151 | BAD_ECC, IO_BUS). |
| 152 | |
| 153 | config SIBYTE_BW_TRACE |
| 154 | bool "Capture bus trace before bus error" |
| 155 | depends on SIBYTE_BUS_WATCHER |
| 156 | help |
| 157 | Run a continuous bus trace, dumping the raw data as soon as |
| 158 | a ZBbus error is detected. Cannot work if ZBbus profiling |
| 159 | is turned on, and also will interfere with JTAG-based trace |
| 160 | buffer activity. Raw buffer data is dumped to console, and |
| 161 | must be processed off-line. |
| 162 | |
| 163 | config SIBYTE_TBPROF |
| 164 | tristate "Support for ZBbus profiling" |
| 165 | depends on SIBYTE_HAS_ZBUS_PROFILING |
| 166 | |
| 167 | config SIBYTE_HAS_ZBUS_PROFILING |
| 168 | bool |