blob: 7ecbd3dde2ea09cc3204a0245f65384996a20d34 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright C 2016, Oracle and/or its affiliates. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 .code32
19 .text
20#define _pa(x) ((x) - __START_KERNEL_map)
21
22#include <linux/elfnote.h>
23#include <linux/init.h>
24#include <linux/linkage.h>
25#include <asm/segment.h>
26#include <asm/asm.h>
27#include <asm/boot.h>
28#include <asm/processor-flags.h>
29#include <asm/msr.h>
30#include <xen/interface/elfnote.h>
31
32 __HEAD
33
34/*
35 * Entry point for PVH guests.
36 *
37 * Xen ABI specifies the following register state when we come here:
38 *
39 * - `ebx`: contains the physical memory address where the loader has placed
40 * the boot start info structure.
41 * - `cr0`: bit 0 (PE) must be set. All the other writeable bits are cleared.
42 * - `cr4`: all bits are cleared.
43 * - `cs `: must be a 32-bit read/execute code segment with a base of ‘0
44 * and a limit of ‘0xFFFFFFFF’. The selector value is unspecified.
45 * - `ds`, `es`: must be a 32-bit read/write data segment with a base of
46 *0’ and a limit of ‘0xFFFFFFFF’. The selector values are all
47 * unspecified.
48 * - `tr`: must be a 32-bit TSS (active) with a base of '0' and a limit
49 * of '0x67'.
50 * - `eflags`: bit 17 (VM) must be cleared. Bit 9 (IF) must be cleared.
51 * Bit 8 (TF) must be cleared. Other bits are all unspecified.
52 *
53 * All other processor registers and flag bits are unspecified. The OS is in
54 * charge of setting up it's own stack, GDT and IDT.
55 */
56
57#define PVH_GDT_ENTRY_CANARY 4
58#define PVH_CANARY_SEL (PVH_GDT_ENTRY_CANARY * 8)
59
60ENTRY(pvh_start_xen)
61 cld
62
63 lgdt (_pa(gdt))
64
65 mov $(__BOOT_DS),%eax
66 mov %eax,%ds
67 mov %eax,%es
68 mov %eax,%ss
69
70 /* Stash hvm_start_info. */
71 mov $_pa(pvh_start_info), %edi
72 mov %ebx, %esi
73 mov _pa(pvh_start_info_sz), %ecx
74 shr $2,%ecx
75 rep
76 movsl
77
78 mov $_pa(early_stack_end), %esp
79
80 /* Enable PAE mode. */
81 mov %cr4, %eax
82 orl $X86_CR4_PAE, %eax
83 mov %eax, %cr4
84
85#ifdef CONFIG_X86_64
86 /* Enable Long mode. */
87 mov $MSR_EFER, %ecx
88 rdmsr
89 btsl $_EFER_LME, %eax
90 wrmsr
91
92 /* Enable pre-constructed page tables. */
93 mov $_pa(init_top_pgt), %eax
94 mov %eax, %cr3
95 mov $(X86_CR0_PG | X86_CR0_PE), %eax
96 mov %eax, %cr0
97
98 /* Jump to 64-bit mode. */
99 ljmp $__KERNEL_CS, $_pa(1f)
100
101 /* 64-bit entry point. */
102 .code64
1031:
104 /* Set base address in stack canary descriptor. */
105 mov $MSR_GS_BASE,%ecx
106 mov $_pa(canary), %eax
107 xor %edx, %edx
108 wrmsr
109
110 call xen_prepare_pvh
111
112 /* startup_64 expects boot_params in %rsi. */
113 mov $_pa(pvh_bootparams), %rsi
114 mov $_pa(startup_64), %rax
115 jmp *%rax
116
117#else /* CONFIG_X86_64 */
118
119 /* Set base address in stack canary descriptor. */
120 movl $_pa(gdt_start),%eax
121 movl $_pa(canary),%ecx
122 movw %cx, (PVH_GDT_ENTRY_CANARY * 8) + 2(%eax)
123 shrl $16, %ecx
124 movb %cl, (PVH_GDT_ENTRY_CANARY * 8) + 4(%eax)
125 movb %ch, (PVH_GDT_ENTRY_CANARY * 8) + 7(%eax)
126
127 mov $PVH_CANARY_SEL,%eax
128 mov %eax,%gs
129
130 call mk_early_pgtbl_32
131
132 mov $_pa(initial_page_table), %eax
133 mov %eax, %cr3
134
135 mov %cr0, %eax
136 or $(X86_CR0_PG | X86_CR0_PE), %eax
137 mov %eax, %cr0
138
139 ljmp $__BOOT_CS, $1f
1401:
141 call xen_prepare_pvh
142 mov $_pa(pvh_bootparams), %esi
143
144 /* startup_32 doesn't expect paging and PAE to be on. */
145 ljmp $__BOOT_CS, $_pa(2f)
1462:
147 mov %cr0, %eax
148 and $~X86_CR0_PG, %eax
149 mov %eax, %cr0
150 mov %cr4, %eax
151 and $~X86_CR4_PAE, %eax
152 mov %eax, %cr4
153
154 ljmp $__BOOT_CS, $_pa(startup_32)
155#endif
156END(pvh_start_xen)
157
158 .section ".init.data","aw"
159 .balign 8
160gdt:
161 .word gdt_end - gdt_start
162 .long _pa(gdt_start)
163 .word 0
164gdt_start:
165 .quad 0x0000000000000000 /* NULL descriptor */
166 .quad 0x0000000000000000 /* reserved */
167#ifdef CONFIG_X86_64
168 .quad GDT_ENTRY(0xa09a, 0, 0xfffff) /* __KERNEL_CS */
169#else
170 .quad GDT_ENTRY(0xc09a, 0, 0xfffff) /* __KERNEL_CS */
171#endif
172 .quad GDT_ENTRY(0xc092, 0, 0xfffff) /* __KERNEL_DS */
173 .quad GDT_ENTRY(0x4090, 0, 0x18) /* PVH_CANARY_SEL */
174gdt_end:
175
176 .balign 16
177canary:
178 .fill 48, 1, 0
179
180early_stack:
181 .fill BOOT_STACK_SIZE, 1, 0
182early_stack_end:
183
184 ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_ENTRY,
185 _ASM_PTR (pvh_start_xen - __START_KERNEL_map))