blob: 64f8e7c7831d124c7eb9e505b1da970811615c98 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Owen Chen <owen.chen@mediatek.com>
5 */
6
7#ifndef __DRV_CLK_MUX_H
8#define __DRV_CLK_MUX_H
9
10#include <linux/clk-provider.h>
11
12struct mtk_clk_mux {
13 struct clk_hw hw;
14 struct regmap *regmap;
15
16 const char *name;
17
18 int mux_set_ofs;
19 int mux_clr_ofs;
20 int mux_ofs;
21 int upd_ofs;
22
23 s8 mux_shift;
24 s8 mux_width;
25 s8 gate_shift;
26 s8 upd_shift;
27
28 spinlock_t *lock;
29};
30
31extern const struct clk_ops mtk_mux_upd_ops;
32extern const struct clk_ops mtk_mux_clr_set_upd_ops;
33
34struct clk *mtk_clk_register_mux(const struct mtk_mux *mux,
35 struct regmap *regmap,
36 spinlock_t *lock);
37
38#endif /* __DRV_CLK_MUX_H */