rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Fence mechanism for dma-buf and to allow for asynchronous dma access |
| 3 | * |
| 4 | * Copyright (C) 2012 Canonical Ltd |
| 5 | * Copyright (C) 2012 Texas Instruments |
| 6 | * |
| 7 | * Authors: |
| 8 | * Rob Clark <robdclark@gmail.com> |
| 9 | * Maarten Lankhorst <maarten.lankhorst@canonical.com> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify it |
| 12 | * under the terms of the GNU General Public License version 2 as published by |
| 13 | * the Free Software Foundation. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 16 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 18 | * more details. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/slab.h> |
| 22 | #include <linux/export.h> |
| 23 | #include <linux/atomic.h> |
| 24 | #include <linux/dma-fence.h> |
| 25 | #include <linux/sched/signal.h> |
| 26 | |
| 27 | #define CREATE_TRACE_POINTS |
| 28 | #include <trace/events/dma_fence.h> |
| 29 | |
| 30 | EXPORT_TRACEPOINT_SYMBOL(dma_fence_annotate_wait_on); |
| 31 | EXPORT_TRACEPOINT_SYMBOL(dma_fence_emit); |
| 32 | EXPORT_TRACEPOINT_SYMBOL(dma_fence_enable_signal); |
| 33 | |
| 34 | /* |
| 35 | * fence context counter: each execution context should have its own |
| 36 | * fence context, this allows checking if fences belong to the same |
| 37 | * context or not. One device can have multiple separate contexts, |
| 38 | * and they're used if some engine can run independently of another. |
| 39 | */ |
| 40 | static atomic64_t dma_fence_context_counter = ATOMIC64_INIT(0); |
| 41 | |
| 42 | /** |
| 43 | * dma_fence_context_alloc - allocate an array of fence contexts |
| 44 | * @num: [in] amount of contexts to allocate |
| 45 | * |
| 46 | * This function will return the first index of the number of fences allocated. |
| 47 | * The fence context is used for setting fence->context to a unique number. |
| 48 | */ |
| 49 | u64 dma_fence_context_alloc(unsigned num) |
| 50 | { |
| 51 | WARN_ON(!num); |
| 52 | return atomic64_add_return(num, &dma_fence_context_counter) - num; |
| 53 | } |
| 54 | EXPORT_SYMBOL(dma_fence_context_alloc); |
| 55 | |
| 56 | /** |
| 57 | * dma_fence_signal_locked - signal completion of a fence |
| 58 | * @fence: the fence to signal |
| 59 | * |
| 60 | * Signal completion for software callbacks on a fence, this will unblock |
| 61 | * dma_fence_wait() calls and run all the callbacks added with |
| 62 | * dma_fence_add_callback(). Can be called multiple times, but since a fence |
| 63 | * can only go from unsignaled to signaled state, it will only be effective |
| 64 | * the first time. |
| 65 | * |
| 66 | * Unlike dma_fence_signal, this function must be called with fence->lock held. |
| 67 | */ |
| 68 | int dma_fence_signal_locked(struct dma_fence *fence) |
| 69 | { |
| 70 | struct dma_fence_cb *cur, *tmp; |
| 71 | int ret = 0; |
| 72 | |
| 73 | lockdep_assert_held(fence->lock); |
| 74 | |
| 75 | if (WARN_ON(!fence)) |
| 76 | return -EINVAL; |
| 77 | |
| 78 | if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { |
| 79 | ret = -EINVAL; |
| 80 | |
| 81 | /* |
| 82 | * we might have raced with the unlocked dma_fence_signal, |
| 83 | * still run through all callbacks |
| 84 | */ |
| 85 | } else { |
| 86 | fence->timestamp = ktime_get(); |
| 87 | set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags); |
| 88 | trace_dma_fence_signaled(fence); |
| 89 | } |
| 90 | |
| 91 | list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) { |
| 92 | list_del_init(&cur->node); |
| 93 | cur->func(fence, cur); |
| 94 | } |
| 95 | return ret; |
| 96 | } |
| 97 | EXPORT_SYMBOL(dma_fence_signal_locked); |
| 98 | |
| 99 | /** |
| 100 | * dma_fence_signal - signal completion of a fence |
| 101 | * @fence: the fence to signal |
| 102 | * |
| 103 | * Signal completion for software callbacks on a fence, this will unblock |
| 104 | * dma_fence_wait() calls and run all the callbacks added with |
| 105 | * dma_fence_add_callback(). Can be called multiple times, but since a fence |
| 106 | * can only go from unsignaled to signaled state, it will only be effective |
| 107 | * the first time. |
| 108 | */ |
| 109 | int dma_fence_signal(struct dma_fence *fence) |
| 110 | { |
| 111 | unsigned long flags; |
| 112 | |
| 113 | if (!fence) |
| 114 | return -EINVAL; |
| 115 | |
| 116 | if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
| 117 | return -EINVAL; |
| 118 | |
| 119 | fence->timestamp = ktime_get(); |
| 120 | set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags); |
| 121 | trace_dma_fence_signaled(fence); |
| 122 | |
| 123 | if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) { |
| 124 | struct dma_fence_cb *cur, *tmp; |
| 125 | |
| 126 | spin_lock_irqsave(fence->lock, flags); |
| 127 | list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) { |
| 128 | list_del_init(&cur->node); |
| 129 | cur->func(fence, cur); |
| 130 | } |
| 131 | spin_unlock_irqrestore(fence->lock, flags); |
| 132 | } |
| 133 | return 0; |
| 134 | } |
| 135 | EXPORT_SYMBOL(dma_fence_signal); |
| 136 | |
| 137 | /** |
| 138 | * dma_fence_wait_timeout - sleep until the fence gets signaled |
| 139 | * or until timeout elapses |
| 140 | * @fence: [in] the fence to wait on |
| 141 | * @intr: [in] if true, do an interruptible wait |
| 142 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT |
| 143 | * |
| 144 | * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the |
| 145 | * remaining timeout in jiffies on success. Other error values may be |
| 146 | * returned on custom implementations. |
| 147 | * |
| 148 | * Performs a synchronous wait on this fence. It is assumed the caller |
| 149 | * directly or indirectly (buf-mgr between reservation and committing) |
| 150 | * holds a reference to the fence, otherwise the fence might be |
| 151 | * freed before return, resulting in undefined behavior. |
| 152 | */ |
| 153 | signed long |
| 154 | dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout) |
| 155 | { |
| 156 | signed long ret; |
| 157 | |
| 158 | if (WARN_ON(timeout < 0)) |
| 159 | return -EINVAL; |
| 160 | |
| 161 | trace_dma_fence_wait_start(fence); |
| 162 | ret = fence->ops->wait(fence, intr, timeout); |
| 163 | trace_dma_fence_wait_end(fence); |
| 164 | return ret; |
| 165 | } |
| 166 | EXPORT_SYMBOL(dma_fence_wait_timeout); |
| 167 | |
| 168 | void dma_fence_release(struct kref *kref) |
| 169 | { |
| 170 | struct dma_fence *fence = |
| 171 | container_of(kref, struct dma_fence, refcount); |
| 172 | |
| 173 | trace_dma_fence_destroy(fence); |
| 174 | |
| 175 | WARN_ON(!list_empty(&fence->cb_list)); |
| 176 | |
| 177 | if (fence->ops->release) |
| 178 | fence->ops->release(fence); |
| 179 | else |
| 180 | dma_fence_free(fence); |
| 181 | } |
| 182 | EXPORT_SYMBOL(dma_fence_release); |
| 183 | |
| 184 | void dma_fence_free(struct dma_fence *fence) |
| 185 | { |
| 186 | kfree_rcu(fence, rcu); |
| 187 | } |
| 188 | EXPORT_SYMBOL(dma_fence_free); |
| 189 | |
| 190 | /** |
| 191 | * dma_fence_enable_sw_signaling - enable signaling on fence |
| 192 | * @fence: [in] the fence to enable |
| 193 | * |
| 194 | * this will request for sw signaling to be enabled, to make the fence |
| 195 | * complete as soon as possible |
| 196 | */ |
| 197 | void dma_fence_enable_sw_signaling(struct dma_fence *fence) |
| 198 | { |
| 199 | unsigned long flags; |
| 200 | |
| 201 | if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
| 202 | &fence->flags) && |
| 203 | !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { |
| 204 | trace_dma_fence_enable_signal(fence); |
| 205 | |
| 206 | spin_lock_irqsave(fence->lock, flags); |
| 207 | |
| 208 | if (!fence->ops->enable_signaling(fence)) |
| 209 | dma_fence_signal_locked(fence); |
| 210 | |
| 211 | spin_unlock_irqrestore(fence->lock, flags); |
| 212 | } |
| 213 | } |
| 214 | EXPORT_SYMBOL(dma_fence_enable_sw_signaling); |
| 215 | |
| 216 | /** |
| 217 | * dma_fence_add_callback - add a callback to be called when the fence |
| 218 | * is signaled |
| 219 | * @fence: [in] the fence to wait on |
| 220 | * @cb: [in] the callback to register |
| 221 | * @func: [in] the function to call |
| 222 | * |
| 223 | * cb will be initialized by dma_fence_add_callback, no initialization |
| 224 | * by the caller is required. Any number of callbacks can be registered |
| 225 | * to a fence, but a callback can only be registered to one fence at a time. |
| 226 | * |
| 227 | * Note that the callback can be called from an atomic context. If |
| 228 | * fence is already signaled, this function will return -ENOENT (and |
| 229 | * *not* call the callback) |
| 230 | * |
| 231 | * Add a software callback to the fence. Same restrictions apply to |
| 232 | * refcount as it does to dma_fence_wait, however the caller doesn't need to |
| 233 | * keep a refcount to fence afterwards: when software access is enabled, |
| 234 | * the creator of the fence is required to keep the fence alive until |
| 235 | * after it signals with dma_fence_signal. The callback itself can be called |
| 236 | * from irq context. |
| 237 | * |
| 238 | * Returns 0 in case of success, -ENOENT if the fence is already signaled |
| 239 | * and -EINVAL in case of error. |
| 240 | */ |
| 241 | int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb, |
| 242 | dma_fence_func_t func) |
| 243 | { |
| 244 | unsigned long flags; |
| 245 | int ret = 0; |
| 246 | bool was_set; |
| 247 | |
| 248 | if (WARN_ON(!fence || !func)) |
| 249 | return -EINVAL; |
| 250 | |
| 251 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { |
| 252 | INIT_LIST_HEAD(&cb->node); |
| 253 | return -ENOENT; |
| 254 | } |
| 255 | |
| 256 | spin_lock_irqsave(fence->lock, flags); |
| 257 | |
| 258 | was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
| 259 | &fence->flags); |
| 260 | |
| 261 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
| 262 | ret = -ENOENT; |
| 263 | else if (!was_set) { |
| 264 | trace_dma_fence_enable_signal(fence); |
| 265 | |
| 266 | if (!fence->ops->enable_signaling(fence)) { |
| 267 | dma_fence_signal_locked(fence); |
| 268 | ret = -ENOENT; |
| 269 | } |
| 270 | } |
| 271 | |
| 272 | if (!ret) { |
| 273 | cb->func = func; |
| 274 | list_add_tail(&cb->node, &fence->cb_list); |
| 275 | } else |
| 276 | INIT_LIST_HEAD(&cb->node); |
| 277 | spin_unlock_irqrestore(fence->lock, flags); |
| 278 | |
| 279 | return ret; |
| 280 | } |
| 281 | EXPORT_SYMBOL(dma_fence_add_callback); |
| 282 | |
| 283 | /** |
| 284 | * dma_fence_get_status - returns the status upon completion |
| 285 | * @fence: [in] the dma_fence to query |
| 286 | * |
| 287 | * This wraps dma_fence_get_status_locked() to return the error status |
| 288 | * condition on a signaled fence. See dma_fence_get_status_locked() for more |
| 289 | * details. |
| 290 | * |
| 291 | * Returns 0 if the fence has not yet been signaled, 1 if the fence has |
| 292 | * been signaled without an error condition, or a negative error code |
| 293 | * if the fence has been completed in err. |
| 294 | */ |
| 295 | int dma_fence_get_status(struct dma_fence *fence) |
| 296 | { |
| 297 | unsigned long flags; |
| 298 | int status; |
| 299 | |
| 300 | spin_lock_irqsave(fence->lock, flags); |
| 301 | status = dma_fence_get_status_locked(fence); |
| 302 | spin_unlock_irqrestore(fence->lock, flags); |
| 303 | |
| 304 | return status; |
| 305 | } |
| 306 | EXPORT_SYMBOL(dma_fence_get_status); |
| 307 | |
| 308 | /** |
| 309 | * dma_fence_remove_callback - remove a callback from the signaling list |
| 310 | * @fence: [in] the fence to wait on |
| 311 | * @cb: [in] the callback to remove |
| 312 | * |
| 313 | * Remove a previously queued callback from the fence. This function returns |
| 314 | * true if the callback is successfully removed, or false if the fence has |
| 315 | * already been signaled. |
| 316 | * |
| 317 | * *WARNING*: |
| 318 | * Cancelling a callback should only be done if you really know what you're |
| 319 | * doing, since deadlocks and race conditions could occur all too easily. For |
| 320 | * this reason, it should only ever be done on hardware lockup recovery, |
| 321 | * with a reference held to the fence. |
| 322 | */ |
| 323 | bool |
| 324 | dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb) |
| 325 | { |
| 326 | unsigned long flags; |
| 327 | bool ret; |
| 328 | |
| 329 | spin_lock_irqsave(fence->lock, flags); |
| 330 | |
| 331 | ret = !list_empty(&cb->node); |
| 332 | if (ret) { |
| 333 | list_del_init(&cb->node); |
| 334 | if (list_empty(&fence->cb_list)) |
| 335 | if (fence->ops->disable_signaling) |
| 336 | fence->ops->disable_signaling(fence); |
| 337 | } |
| 338 | |
| 339 | spin_unlock_irqrestore(fence->lock, flags); |
| 340 | |
| 341 | return ret; |
| 342 | } |
| 343 | EXPORT_SYMBOL(dma_fence_remove_callback); |
| 344 | |
| 345 | struct default_wait_cb { |
| 346 | struct dma_fence_cb base; |
| 347 | struct task_struct *task; |
| 348 | }; |
| 349 | |
| 350 | static void |
| 351 | dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb) |
| 352 | { |
| 353 | struct default_wait_cb *wait = |
| 354 | container_of(cb, struct default_wait_cb, base); |
| 355 | |
| 356 | wake_up_state(wait->task, TASK_NORMAL); |
| 357 | } |
| 358 | |
| 359 | /** |
| 360 | * dma_fence_default_wait - default sleep until the fence gets signaled |
| 361 | * or until timeout elapses |
| 362 | * @fence: [in] the fence to wait on |
| 363 | * @intr: [in] if true, do an interruptible wait |
| 364 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT |
| 365 | * |
| 366 | * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the |
| 367 | * remaining timeout in jiffies on success. If timeout is zero the value one is |
| 368 | * returned if the fence is already signaled for consistency with other |
| 369 | * functions taking a jiffies timeout. |
| 370 | */ |
| 371 | signed long |
| 372 | dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout) |
| 373 | { |
| 374 | struct default_wait_cb cb; |
| 375 | unsigned long flags; |
| 376 | signed long ret = timeout ? timeout : 1; |
| 377 | bool was_set; |
| 378 | |
| 379 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
| 380 | return ret; |
| 381 | |
| 382 | spin_lock_irqsave(fence->lock, flags); |
| 383 | |
| 384 | if (intr && signal_pending(current)) { |
| 385 | ret = -ERESTARTSYS; |
| 386 | goto out; |
| 387 | } |
| 388 | |
| 389 | was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
| 390 | &fence->flags); |
| 391 | |
| 392 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
| 393 | goto out; |
| 394 | |
| 395 | if (!was_set) { |
| 396 | trace_dma_fence_enable_signal(fence); |
| 397 | |
| 398 | if (!fence->ops->enable_signaling(fence)) { |
| 399 | dma_fence_signal_locked(fence); |
| 400 | goto out; |
| 401 | } |
| 402 | } |
| 403 | |
| 404 | if (!timeout) { |
| 405 | ret = 0; |
| 406 | goto out; |
| 407 | } |
| 408 | |
| 409 | cb.base.func = dma_fence_default_wait_cb; |
| 410 | cb.task = current; |
| 411 | list_add(&cb.base.node, &fence->cb_list); |
| 412 | |
| 413 | while (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && ret > 0) { |
| 414 | if (intr) |
| 415 | __set_current_state(TASK_INTERRUPTIBLE); |
| 416 | else |
| 417 | __set_current_state(TASK_UNINTERRUPTIBLE); |
| 418 | spin_unlock_irqrestore(fence->lock, flags); |
| 419 | |
| 420 | ret = schedule_timeout(ret); |
| 421 | |
| 422 | spin_lock_irqsave(fence->lock, flags); |
| 423 | if (ret > 0 && intr && signal_pending(current)) |
| 424 | ret = -ERESTARTSYS; |
| 425 | } |
| 426 | |
| 427 | if (!list_empty(&cb.base.node)) |
| 428 | list_del(&cb.base.node); |
| 429 | __set_current_state(TASK_RUNNING); |
| 430 | |
| 431 | out: |
| 432 | spin_unlock_irqrestore(fence->lock, flags); |
| 433 | return ret; |
| 434 | } |
| 435 | EXPORT_SYMBOL(dma_fence_default_wait); |
| 436 | |
| 437 | static bool |
| 438 | dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count, |
| 439 | uint32_t *idx) |
| 440 | { |
| 441 | int i; |
| 442 | |
| 443 | for (i = 0; i < count; ++i) { |
| 444 | struct dma_fence *fence = fences[i]; |
| 445 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { |
| 446 | if (idx) |
| 447 | *idx = i; |
| 448 | return true; |
| 449 | } |
| 450 | } |
| 451 | return false; |
| 452 | } |
| 453 | |
| 454 | /** |
| 455 | * dma_fence_wait_any_timeout - sleep until any fence gets signaled |
| 456 | * or until timeout elapses |
| 457 | * @fences: [in] array of fences to wait on |
| 458 | * @count: [in] number of fences to wait on |
| 459 | * @intr: [in] if true, do an interruptible wait |
| 460 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT |
| 461 | * @idx: [out] the first signaled fence index, meaningful only on |
| 462 | * positive return |
| 463 | * |
| 464 | * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if |
| 465 | * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies |
| 466 | * on success. |
| 467 | * |
| 468 | * Synchronous waits for the first fence in the array to be signaled. The |
| 469 | * caller needs to hold a reference to all fences in the array, otherwise a |
| 470 | * fence might be freed before return, resulting in undefined behavior. |
| 471 | */ |
| 472 | signed long |
| 473 | dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count, |
| 474 | bool intr, signed long timeout, uint32_t *idx) |
| 475 | { |
| 476 | struct default_wait_cb *cb; |
| 477 | signed long ret = timeout; |
| 478 | unsigned i; |
| 479 | |
| 480 | if (WARN_ON(!fences || !count || timeout < 0)) |
| 481 | return -EINVAL; |
| 482 | |
| 483 | if (timeout == 0) { |
| 484 | for (i = 0; i < count; ++i) |
| 485 | if (dma_fence_is_signaled(fences[i])) { |
| 486 | if (idx) |
| 487 | *idx = i; |
| 488 | return 1; |
| 489 | } |
| 490 | |
| 491 | return 0; |
| 492 | } |
| 493 | |
| 494 | cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL); |
| 495 | if (cb == NULL) { |
| 496 | ret = -ENOMEM; |
| 497 | goto err_free_cb; |
| 498 | } |
| 499 | |
| 500 | for (i = 0; i < count; ++i) { |
| 501 | struct dma_fence *fence = fences[i]; |
| 502 | |
| 503 | if (fence->ops->wait != dma_fence_default_wait) { |
| 504 | ret = -EINVAL; |
| 505 | goto fence_rm_cb; |
| 506 | } |
| 507 | |
| 508 | cb[i].task = current; |
| 509 | if (dma_fence_add_callback(fence, &cb[i].base, |
| 510 | dma_fence_default_wait_cb)) { |
| 511 | /* This fence is already signaled */ |
| 512 | if (idx) |
| 513 | *idx = i; |
| 514 | goto fence_rm_cb; |
| 515 | } |
| 516 | } |
| 517 | |
| 518 | while (ret > 0) { |
| 519 | if (intr) |
| 520 | set_current_state(TASK_INTERRUPTIBLE); |
| 521 | else |
| 522 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 523 | |
| 524 | if (dma_fence_test_signaled_any(fences, count, idx)) |
| 525 | break; |
| 526 | |
| 527 | ret = schedule_timeout(ret); |
| 528 | |
| 529 | if (ret > 0 && intr && signal_pending(current)) |
| 530 | ret = -ERESTARTSYS; |
| 531 | } |
| 532 | |
| 533 | __set_current_state(TASK_RUNNING); |
| 534 | |
| 535 | fence_rm_cb: |
| 536 | while (i-- > 0) |
| 537 | dma_fence_remove_callback(fences[i], &cb[i].base); |
| 538 | |
| 539 | err_free_cb: |
| 540 | kfree(cb); |
| 541 | |
| 542 | return ret; |
| 543 | } |
| 544 | EXPORT_SYMBOL(dma_fence_wait_any_timeout); |
| 545 | |
| 546 | /** |
| 547 | * dma_fence_init - Initialize a custom fence. |
| 548 | * @fence: [in] the fence to initialize |
| 549 | * @ops: [in] the dma_fence_ops for operations on this fence |
| 550 | * @lock: [in] the irqsafe spinlock to use for locking this fence |
| 551 | * @context: [in] the execution context this fence is run on |
| 552 | * @seqno: [in] a linear increasing sequence number for this context |
| 553 | * |
| 554 | * Initializes an allocated fence, the caller doesn't have to keep its |
| 555 | * refcount after committing with this fence, but it will need to hold a |
| 556 | * refcount again if dma_fence_ops.enable_signaling gets called. This can |
| 557 | * be used for other implementing other types of fence. |
| 558 | * |
| 559 | * context and seqno are used for easy comparison between fences, allowing |
| 560 | * to check which fence is later by simply using dma_fence_later. |
| 561 | */ |
| 562 | void |
| 563 | dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, |
| 564 | spinlock_t *lock, u64 context, unsigned seqno) |
| 565 | { |
| 566 | BUG_ON(!lock); |
| 567 | BUG_ON(!ops || !ops->wait || !ops->enable_signaling || |
| 568 | !ops->get_driver_name || !ops->get_timeline_name); |
| 569 | |
| 570 | kref_init(&fence->refcount); |
| 571 | fence->ops = ops; |
| 572 | INIT_LIST_HEAD(&fence->cb_list); |
| 573 | fence->lock = lock; |
| 574 | fence->context = context; |
| 575 | fence->seqno = seqno; |
| 576 | fence->flags = 0UL; |
| 577 | fence->error = 0; |
| 578 | |
| 579 | trace_dma_fence_init(fence); |
| 580 | } |
| 581 | EXPORT_SYMBOL(dma_fence_init); |