blob: a575e1cdb81a80206a97ca2057c738ed7be17802 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 * Philip Edelbrock <phil@netroedge.com>,
6 * and Mark Studebaker <mdsxyz123@yahoo.com>
7 * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25/*
26 * Supports following chips:
27 *
28 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34 *
35 * For other winbond chips, and for i2c support in the above chips,
36 * use w83781d.c.
37 *
38 * Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 * supported yet.
40 */
41
42#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43
44#include <linux/module.h>
45#include <linux/init.h>
46#include <linux/slab.h>
47#include <linux/jiffies.h>
48#include <linux/platform_device.h>
49#include <linux/hwmon.h>
50#include <linux/hwmon-sysfs.h>
51#include <linux/hwmon-vid.h>
52#include <linux/err.h>
53#include <linux/mutex.h>
54#include <linux/ioport.h>
55#include <linux/acpi.h>
56#include <linux/io.h>
57#include "lm75.h"
58
59static struct platform_device *pdev;
60
61#define DRVNAME "w83627hf"
62enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
63
64struct w83627hf_sio_data {
65 enum chips type;
66 int sioaddr;
67};
68
69static u8 force_i2c = 0x1f;
70module_param(force_i2c, byte, 0);
71MODULE_PARM_DESC(force_i2c,
72 "Initialize the i2c address of the sensors");
73
74static bool init = 1;
75module_param(init, bool, 0);
76MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
78static unsigned short force_id;
79module_param(force_id, ushort, 0);
80MODULE_PARM_DESC(force_id, "Override the detected device ID");
81
82/* modified from kernel/include/traps.c */
83#define DEV 0x07 /* Register: Logical device select */
84
85/* logical device numbers for superio_select (below) */
86#define W83627HF_LD_FDC 0x00
87#define W83627HF_LD_PRT 0x01
88#define W83627HF_LD_UART1 0x02
89#define W83627HF_LD_UART2 0x03
90#define W83627HF_LD_KBC 0x05
91#define W83627HF_LD_CIR 0x06 /* w83627hf only */
92#define W83627HF_LD_GAME 0x07
93#define W83627HF_LD_MIDI 0x07
94#define W83627HF_LD_GPIO1 0x07
95#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
96#define W83627HF_LD_GPIO2 0x08
97#define W83627HF_LD_GPIO3 0x09
98#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
99#define W83627HF_LD_ACPI 0x0a
100#define W83627HF_LD_HWM 0x0b
101
102#define DEVID 0x20 /* Register: Device ID */
103
104#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
105#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
106#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
107
108#define W83687THF_VID_EN 0x29 /* w83687thf only */
109#define W83687THF_VID_CFG 0xF0 /* w83687thf only */
110#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
111
112static inline void
113superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
114{
115 outb(reg, sio->sioaddr);
116 outb(val, sio->sioaddr + 1);
117}
118
119static inline int
120superio_inb(struct w83627hf_sio_data *sio, int reg)
121{
122 outb(reg, sio->sioaddr);
123 return inb(sio->sioaddr + 1);
124}
125
126static inline void
127superio_select(struct w83627hf_sio_data *sio, int ld)
128{
129 outb(DEV, sio->sioaddr);
130 outb(ld, sio->sioaddr + 1);
131}
132
133static inline int
134superio_enter(struct w83627hf_sio_data *sio)
135{
136 if (!request_muxed_region(sio->sioaddr, 2, DRVNAME))
137 return -EBUSY;
138
139 outb(0x87, sio->sioaddr);
140 outb(0x87, sio->sioaddr);
141
142 return 0;
143}
144
145static inline void
146superio_exit(struct w83627hf_sio_data *sio)
147{
148 outb(0xAA, sio->sioaddr);
149 release_region(sio->sioaddr, 2);
150}
151
152#define W627_DEVID 0x52
153#define W627THF_DEVID 0x82
154#define W697_DEVID 0x60
155#define W637_DEVID 0x70
156#define W687THF_DEVID 0x85
157#define WINB_ACT_REG 0x30
158#define WINB_BASE_REG 0x60
159/* Constants specified below */
160
161/* Alignment of the base address */
162#define WINB_ALIGNMENT ~7
163
164/* Offset & size of I/O region we are interested in */
165#define WINB_REGION_OFFSET 5
166#define WINB_REGION_SIZE 2
167
168/* Where are the sensors address/data registers relative to the region offset */
169#define W83781D_ADDR_REG_OFFSET 0
170#define W83781D_DATA_REG_OFFSET 1
171
172/* The W83781D registers */
173/* The W83782D registers for nr=7,8 are in bank 5 */
174#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
175 (0x554 + (((nr) - 7) * 2)))
176#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
177 (0x555 + (((nr) - 7) * 2)))
178#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
179 (0x550 + (nr) - 7))
180
181/* nr:0-2 for fans:1-3 */
182#define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
183#define W83627HF_REG_FAN(nr) (0x28 + (nr))
184
185#define W83627HF_REG_TEMP2_CONFIG 0x152
186#define W83627HF_REG_TEMP3_CONFIG 0x252
187/* these are zero-based, unlike config constants above */
188static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
189static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
190static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
191
192#define W83781D_REG_BANK 0x4E
193
194#define W83781D_REG_CONFIG 0x40
195#define W83781D_REG_ALARM1 0x459
196#define W83781D_REG_ALARM2 0x45A
197#define W83781D_REG_ALARM3 0x45B
198
199#define W83781D_REG_BEEP_CONFIG 0x4D
200#define W83781D_REG_BEEP_INTS1 0x56
201#define W83781D_REG_BEEP_INTS2 0x57
202#define W83781D_REG_BEEP_INTS3 0x453
203
204#define W83781D_REG_VID_FANDIV 0x47
205
206#define W83781D_REG_CHIPID 0x49
207#define W83781D_REG_WCHIPID 0x58
208#define W83781D_REG_CHIPMAN 0x4F
209#define W83781D_REG_PIN 0x4B
210
211#define W83781D_REG_VBAT 0x5D
212
213#define W83627HF_REG_PWM1 0x5A
214#define W83627HF_REG_PWM2 0x5B
215
216static const u8 W83627THF_REG_PWM_ENABLE[] = {
217 0x04, /* FAN 1 mode */
218 0x04, /* FAN 2 mode */
219 0x12, /* FAN AUX mode */
220};
221static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
222
223#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
224#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
225#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
226
227#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
228
229static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
230static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
231 W83627THF_REG_PWM3 };
232#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
233 regpwm_627hf[nr] : regpwm[nr])
234
235#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
236
237#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
238#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
239#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
240
241static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
242 W83637HF_REG_PWM_FREQ2,
243 W83637HF_REG_PWM_FREQ3 };
244
245#define W83627HF_BASE_PWM_FREQ 46870
246
247#define W83781D_REG_I2C_ADDR 0x48
248#define W83781D_REG_I2C_SUBADDR 0x4A
249
250/* Sensor selection */
251#define W83781D_REG_SCFG1 0x5D
252static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
253#define W83781D_REG_SCFG2 0x59
254static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
255#define W83781D_DEFAULT_BETA 3435
256
257/*
258 * Conversions. Limit checking is only done on the TO_REG
259 * variants. Note that you should be a bit careful with which arguments
260 * these macros are called: arguments may be evaluated more than once.
261 * Fixing this is just not worth it.
262 */
263#define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
264#define IN_FROM_REG(val) ((val) * 16)
265
266static inline u8 FAN_TO_REG(long rpm, int div)
267{
268 if (rpm == 0)
269 return 255;
270 rpm = clamp_val(rpm, 1, 1000000);
271 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
272}
273
274#define TEMP_MIN (-128000)
275#define TEMP_MAX ( 127000)
276
277/*
278 * TEMP: 0.001C/bit (-128C to +127C)
279 * REG: 1C/bit, two's complement
280 */
281static u8 TEMP_TO_REG(long temp)
282{
283 int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX);
284 ntemp += (ntemp < 0 ? -500 : 500);
285 return (u8)(ntemp / 1000);
286}
287
288static int TEMP_FROM_REG(u8 reg)
289{
290 return (s8)reg * 1000;
291}
292
293#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
294
295#define PWM_TO_REG(val) (clamp_val((val), 0, 255))
296
297static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
298{
299 unsigned long freq;
300 freq = W83627HF_BASE_PWM_FREQ >> reg;
301 return freq;
302}
303static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
304{
305 u8 i;
306 /*
307 * Only 5 dividers (1 2 4 8 16)
308 * Search for the nearest available frequency
309 */
310 for (i = 0; i < 4; i++) {
311 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
312 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
313 break;
314 }
315 return i;
316}
317
318static inline unsigned long pwm_freq_from_reg(u8 reg)
319{
320 /* Clock bit 8 -> 180 kHz or 24 MHz */
321 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
322
323 reg &= 0x7f;
324 /* This should not happen but anyway... */
325 if (reg == 0)
326 reg++;
327 return clock / (reg << 8);
328}
329static inline u8 pwm_freq_to_reg(unsigned long val)
330{
331 /* Minimum divider value is 0x01 and maximum is 0x7F */
332 if (val >= 93750) /* The highest we can do */
333 return 0x01;
334 if (val >= 720) /* Use 24 MHz clock */
335 return 24000000UL / (val << 8);
336 if (val < 6) /* The lowest we can do */
337 return 0xFF;
338 else /* Use 180 kHz clock */
339 return 0x80 | (180000UL / (val << 8));
340}
341
342#define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
343#define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
344
345#define DIV_FROM_REG(val) (1 << (val))
346
347static inline u8 DIV_TO_REG(long val)
348{
349 int i;
350 val = clamp_val(val, 1, 128) >> 1;
351 for (i = 0; i < 7; i++) {
352 if (val == 0)
353 break;
354 val >>= 1;
355 }
356 return (u8)i;
357}
358
359/*
360 * For each registered chip, we need to keep some data in memory.
361 * The structure is dynamically allocated.
362 */
363struct w83627hf_data {
364 unsigned short addr;
365 const char *name;
366 struct device *hwmon_dev;
367 struct mutex lock;
368 enum chips type;
369
370 struct mutex update_lock;
371 char valid; /* !=0 if following fields are valid */
372 unsigned long last_updated; /* In jiffies */
373
374 u8 in[9]; /* Register value */
375 u8 in_max[9]; /* Register value */
376 u8 in_min[9]; /* Register value */
377 u8 fan[3]; /* Register value */
378 u8 fan_min[3]; /* Register value */
379 u16 temp[3]; /* Register value */
380 u16 temp_max[3]; /* Register value */
381 u16 temp_max_hyst[3]; /* Register value */
382 u8 fan_div[3]; /* Register encoding, shifted right */
383 u8 vid; /* Register encoding, combined */
384 u32 alarms; /* Register encoding, combined */
385 u32 beep_mask; /* Register encoding, combined */
386 u8 pwm[3]; /* Register value */
387 u8 pwm_enable[3]; /* 1 = manual
388 * 2 = thermal cruise (also called SmartFan I)
389 * 3 = fan speed cruise
390 */
391 u8 pwm_freq[3]; /* Register value */
392 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
393 * 4 = thermistor
394 */
395 u8 vrm;
396 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
397
398#ifdef CONFIG_PM
399 /* Remember extra register values over suspend/resume */
400 u8 scfg1;
401 u8 scfg2;
402#endif
403};
404
405
406static int w83627hf_probe(struct platform_device *pdev);
407static int w83627hf_remove(struct platform_device *pdev);
408
409static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
410static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
411static void w83627hf_update_fan_div(struct w83627hf_data *data);
412static struct w83627hf_data *w83627hf_update_device(struct device *dev);
413static void w83627hf_init_device(struct platform_device *pdev);
414
415#ifdef CONFIG_PM
416static int w83627hf_suspend(struct device *dev)
417{
418 struct w83627hf_data *data = w83627hf_update_device(dev);
419
420 mutex_lock(&data->update_lock);
421 data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
422 data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
423 mutex_unlock(&data->update_lock);
424
425 return 0;
426}
427
428static int w83627hf_resume(struct device *dev)
429{
430 struct w83627hf_data *data = dev_get_drvdata(dev);
431 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
432
433 /* Restore limits */
434 mutex_lock(&data->update_lock);
435 for (i = 0; i <= 8; i++) {
436 /* skip missing sensors */
437 if (((data->type == w83697hf) && (i == 1)) ||
438 ((data->type != w83627hf && data->type != w83697hf)
439 && (i == 5 || i == 6)))
440 continue;
441 w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
442 data->in_max[i]);
443 w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
444 data->in_min[i]);
445 }
446 for (i = 0; i <= 2; i++)
447 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
448 data->fan_min[i]);
449 for (i = 0; i < num_temps; i++) {
450 w83627hf_write_value(data, w83627hf_reg_temp_over[i],
451 data->temp_max[i]);
452 w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
453 data->temp_max_hyst[i]);
454 }
455
456 /* Fixup BIOS bugs */
457 if (data->type == w83627thf || data->type == w83637hf ||
458 data->type == w83687thf)
459 w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
460 data->vrm_ovt);
461 w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
462 w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
463
464 /* Force re-reading all values */
465 data->valid = 0;
466 mutex_unlock(&data->update_lock);
467
468 return 0;
469}
470
471static const struct dev_pm_ops w83627hf_dev_pm_ops = {
472 .suspend = w83627hf_suspend,
473 .resume = w83627hf_resume,
474};
475
476#define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
477#else
478#define W83627HF_DEV_PM_OPS NULL
479#endif /* CONFIG_PM */
480
481static struct platform_driver w83627hf_driver = {
482 .driver = {
483 .name = DRVNAME,
484 .pm = W83627HF_DEV_PM_OPS,
485 },
486 .probe = w83627hf_probe,
487 .remove = w83627hf_remove,
488};
489
490static ssize_t
491show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
492{
493 int nr = to_sensor_dev_attr(devattr)->index;
494 struct w83627hf_data *data = w83627hf_update_device(dev);
495 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
496}
497static ssize_t
498show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
499{
500 int nr = to_sensor_dev_attr(devattr)->index;
501 struct w83627hf_data *data = w83627hf_update_device(dev);
502 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
503}
504static ssize_t
505show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
506{
507 int nr = to_sensor_dev_attr(devattr)->index;
508 struct w83627hf_data *data = w83627hf_update_device(dev);
509 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
510}
511static ssize_t
512store_in_min(struct device *dev, struct device_attribute *devattr,
513 const char *buf, size_t count)
514{
515 int nr = to_sensor_dev_attr(devattr)->index;
516 struct w83627hf_data *data = dev_get_drvdata(dev);
517 long val;
518 int err;
519
520 err = kstrtol(buf, 10, &val);
521 if (err)
522 return err;
523
524 mutex_lock(&data->update_lock);
525 data->in_min[nr] = IN_TO_REG(val);
526 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
527 mutex_unlock(&data->update_lock);
528 return count;
529}
530static ssize_t
531store_in_max(struct device *dev, struct device_attribute *devattr,
532 const char *buf, size_t count)
533{
534 int nr = to_sensor_dev_attr(devattr)->index;
535 struct w83627hf_data *data = dev_get_drvdata(dev);
536 long val;
537 int err;
538
539 err = kstrtol(buf, 10, &val);
540 if (err)
541 return err;
542
543 mutex_lock(&data->update_lock);
544 data->in_max[nr] = IN_TO_REG(val);
545 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
546 mutex_unlock(&data->update_lock);
547 return count;
548}
549#define sysfs_vin_decl(offset) \
550static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
551 show_in_input, NULL, offset); \
552static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
553 show_in_min, store_in_min, offset); \
554static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
555 show_in_max, store_in_max, offset);
556
557sysfs_vin_decl(1);
558sysfs_vin_decl(2);
559sysfs_vin_decl(3);
560sysfs_vin_decl(4);
561sysfs_vin_decl(5);
562sysfs_vin_decl(6);
563sysfs_vin_decl(7);
564sysfs_vin_decl(8);
565
566/* use a different set of functions for in0 */
567static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
568{
569 long in0;
570
571 if ((data->vrm_ovt & 0x01) &&
572 (w83627thf == data->type || w83637hf == data->type
573 || w83687thf == data->type))
574
575 /* use VRM9 calculation */
576 in0 = (long)((reg * 488 + 70000 + 50) / 100);
577 else
578 /* use VRM8 (standard) calculation */
579 in0 = (long)IN_FROM_REG(reg);
580
581 return sprintf(buf,"%ld\n", in0);
582}
583
584static ssize_t in0_input_show(struct device *dev,
585 struct device_attribute *attr, char *buf)
586{
587 struct w83627hf_data *data = w83627hf_update_device(dev);
588 return show_in_0(data, buf, data->in[0]);
589}
590
591static ssize_t in0_min_show(struct device *dev, struct device_attribute *attr,
592 char *buf)
593{
594 struct w83627hf_data *data = w83627hf_update_device(dev);
595 return show_in_0(data, buf, data->in_min[0]);
596}
597
598static ssize_t in0_max_show(struct device *dev, struct device_attribute *attr,
599 char *buf)
600{
601 struct w83627hf_data *data = w83627hf_update_device(dev);
602 return show_in_0(data, buf, data->in_max[0]);
603}
604
605static ssize_t in0_min_store(struct device *dev,
606 struct device_attribute *attr, const char *buf,
607 size_t count)
608{
609 struct w83627hf_data *data = dev_get_drvdata(dev);
610 unsigned long val;
611 int err;
612
613 err = kstrtoul(buf, 10, &val);
614 if (err)
615 return err;
616
617 mutex_lock(&data->update_lock);
618
619 if ((data->vrm_ovt & 0x01) &&
620 (w83627thf == data->type || w83637hf == data->type
621 || w83687thf == data->type))
622
623 /* use VRM9 calculation */
624 data->in_min[0] =
625 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
626 else
627 /* use VRM8 (standard) calculation */
628 data->in_min[0] = IN_TO_REG(val);
629
630 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
631 mutex_unlock(&data->update_lock);
632 return count;
633}
634
635static ssize_t in0_max_store(struct device *dev,
636 struct device_attribute *attr, const char *buf,
637 size_t count)
638{
639 struct w83627hf_data *data = dev_get_drvdata(dev);
640 unsigned long val;
641 int err;
642
643 err = kstrtoul(buf, 10, &val);
644 if (err)
645 return err;
646
647 mutex_lock(&data->update_lock);
648
649 if ((data->vrm_ovt & 0x01) &&
650 (w83627thf == data->type || w83637hf == data->type
651 || w83687thf == data->type))
652
653 /* use VRM9 calculation */
654 data->in_max[0] =
655 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
656 else
657 /* use VRM8 (standard) calculation */
658 data->in_max[0] = IN_TO_REG(val);
659
660 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
661 mutex_unlock(&data->update_lock);
662 return count;
663}
664
665static DEVICE_ATTR_RO(in0_input);
666static DEVICE_ATTR_RW(in0_min);
667static DEVICE_ATTR_RW(in0_max);
668
669static ssize_t
670show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
671{
672 int nr = to_sensor_dev_attr(devattr)->index;
673 struct w83627hf_data *data = w83627hf_update_device(dev);
674 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
675 (long)DIV_FROM_REG(data->fan_div[nr])));
676}
677static ssize_t
678show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
679{
680 int nr = to_sensor_dev_attr(devattr)->index;
681 struct w83627hf_data *data = w83627hf_update_device(dev);
682 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
683 (long)DIV_FROM_REG(data->fan_div[nr])));
684}
685static ssize_t
686store_fan_min(struct device *dev, struct device_attribute *devattr,
687 const char *buf, size_t count)
688{
689 int nr = to_sensor_dev_attr(devattr)->index;
690 struct w83627hf_data *data = dev_get_drvdata(dev);
691 unsigned long val;
692 int err;
693
694 err = kstrtoul(buf, 10, &val);
695 if (err)
696 return err;
697
698 mutex_lock(&data->update_lock);
699 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
700 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
701 data->fan_min[nr]);
702
703 mutex_unlock(&data->update_lock);
704 return count;
705}
706#define sysfs_fan_decl(offset) \
707static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
708 show_fan_input, NULL, offset - 1); \
709static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
710 show_fan_min, store_fan_min, offset - 1);
711
712sysfs_fan_decl(1);
713sysfs_fan_decl(2);
714sysfs_fan_decl(3);
715
716static ssize_t
717show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
718{
719 int nr = to_sensor_dev_attr(devattr)->index;
720 struct w83627hf_data *data = w83627hf_update_device(dev);
721
722 u16 tmp = data->temp[nr];
723 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
724 : (long) TEMP_FROM_REG(tmp));
725}
726
727static ssize_t
728show_temp_max(struct device *dev, struct device_attribute *devattr,
729 char *buf)
730{
731 int nr = to_sensor_dev_attr(devattr)->index;
732 struct w83627hf_data *data = w83627hf_update_device(dev);
733
734 u16 tmp = data->temp_max[nr];
735 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
736 : (long) TEMP_FROM_REG(tmp));
737}
738
739static ssize_t
740show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
741 char *buf)
742{
743 int nr = to_sensor_dev_attr(devattr)->index;
744 struct w83627hf_data *data = w83627hf_update_device(dev);
745
746 u16 tmp = data->temp_max_hyst[nr];
747 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
748 : (long) TEMP_FROM_REG(tmp));
749}
750
751static ssize_t
752store_temp_max(struct device *dev, struct device_attribute *devattr,
753 const char *buf, size_t count)
754{
755 int nr = to_sensor_dev_attr(devattr)->index;
756 struct w83627hf_data *data = dev_get_drvdata(dev);
757 u16 tmp;
758 long val;
759 int err;
760
761 err = kstrtol(buf, 10, &val);
762 if (err)
763 return err;
764
765 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
766 mutex_lock(&data->update_lock);
767 data->temp_max[nr] = tmp;
768 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
769 mutex_unlock(&data->update_lock);
770 return count;
771}
772
773static ssize_t
774store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
775 const char *buf, size_t count)
776{
777 int nr = to_sensor_dev_attr(devattr)->index;
778 struct w83627hf_data *data = dev_get_drvdata(dev);
779 u16 tmp;
780 long val;
781 int err;
782
783 err = kstrtol(buf, 10, &val);
784 if (err)
785 return err;
786
787 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
788 mutex_lock(&data->update_lock);
789 data->temp_max_hyst[nr] = tmp;
790 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
791 mutex_unlock(&data->update_lock);
792 return count;
793}
794
795#define sysfs_temp_decl(offset) \
796static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
797 show_temp, NULL, offset - 1); \
798static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
799 show_temp_max, store_temp_max, offset - 1); \
800static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
801 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
802
803sysfs_temp_decl(1);
804sysfs_temp_decl(2);
805sysfs_temp_decl(3);
806
807static ssize_t
808cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
809{
810 struct w83627hf_data *data = w83627hf_update_device(dev);
811 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
812}
813static DEVICE_ATTR_RO(cpu0_vid);
814
815static ssize_t
816vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
817{
818 struct w83627hf_data *data = dev_get_drvdata(dev);
819 return sprintf(buf, "%ld\n", (long) data->vrm);
820}
821static ssize_t
822vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
823 size_t count)
824{
825 struct w83627hf_data *data = dev_get_drvdata(dev);
826 unsigned long val;
827 int err;
828
829 err = kstrtoul(buf, 10, &val);
830 if (err)
831 return err;
832
833 if (val > 255)
834 return -EINVAL;
835 data->vrm = val;
836
837 return count;
838}
839static DEVICE_ATTR_RW(vrm);
840
841static ssize_t
842alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
843{
844 struct w83627hf_data *data = w83627hf_update_device(dev);
845 return sprintf(buf, "%ld\n", (long) data->alarms);
846}
847static DEVICE_ATTR_RO(alarms);
848
849static ssize_t
850show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
851{
852 struct w83627hf_data *data = w83627hf_update_device(dev);
853 int bitnr = to_sensor_dev_attr(attr)->index;
854 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
855}
856static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
857static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
858static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
859static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
860static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
861static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
862static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
863static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
864static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
865static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
866static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
867static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
868static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
869static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
870static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
871
872static ssize_t
873beep_mask_show(struct device *dev, struct device_attribute *attr, char *buf)
874{
875 struct w83627hf_data *data = w83627hf_update_device(dev);
876 return sprintf(buf, "%ld\n",
877 (long)BEEP_MASK_FROM_REG(data->beep_mask));
878}
879
880static ssize_t
881beep_mask_store(struct device *dev, struct device_attribute *attr,
882 const char *buf, size_t count)
883{
884 struct w83627hf_data *data = dev_get_drvdata(dev);
885 unsigned long val;
886 int err;
887
888 err = kstrtoul(buf, 10, &val);
889 if (err)
890 return err;
891
892 mutex_lock(&data->update_lock);
893
894 /* preserve beep enable */
895 data->beep_mask = (data->beep_mask & 0x8000)
896 | BEEP_MASK_TO_REG(val);
897 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
898 data->beep_mask & 0xff);
899 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
900 ((data->beep_mask) >> 16) & 0xff);
901 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
902 (data->beep_mask >> 8) & 0xff);
903
904 mutex_unlock(&data->update_lock);
905 return count;
906}
907
908static DEVICE_ATTR_RW(beep_mask);
909
910static ssize_t
911show_beep(struct device *dev, struct device_attribute *attr, char *buf)
912{
913 struct w83627hf_data *data = w83627hf_update_device(dev);
914 int bitnr = to_sensor_dev_attr(attr)->index;
915 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
916}
917
918static ssize_t
919store_beep(struct device *dev, struct device_attribute *attr,
920 const char *buf, size_t count)
921{
922 struct w83627hf_data *data = dev_get_drvdata(dev);
923 int bitnr = to_sensor_dev_attr(attr)->index;
924 u8 reg;
925 unsigned long bit;
926 int err;
927
928 err = kstrtoul(buf, 10, &bit);
929 if (err)
930 return err;
931
932 if (bit & ~1)
933 return -EINVAL;
934
935 mutex_lock(&data->update_lock);
936 if (bit)
937 data->beep_mask |= (1 << bitnr);
938 else
939 data->beep_mask &= ~(1 << bitnr);
940
941 if (bitnr < 8) {
942 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
943 if (bit)
944 reg |= (1 << bitnr);
945 else
946 reg &= ~(1 << bitnr);
947 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
948 } else if (bitnr < 16) {
949 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
950 if (bit)
951 reg |= (1 << (bitnr - 8));
952 else
953 reg &= ~(1 << (bitnr - 8));
954 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
955 } else {
956 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
957 if (bit)
958 reg |= (1 << (bitnr - 16));
959 else
960 reg &= ~(1 << (bitnr - 16));
961 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
962 }
963 mutex_unlock(&data->update_lock);
964
965 return count;
966}
967
968static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
969 show_beep, store_beep, 0);
970static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
971 show_beep, store_beep, 1);
972static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
973 show_beep, store_beep, 2);
974static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
975 show_beep, store_beep, 3);
976static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
977 show_beep, store_beep, 8);
978static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
979 show_beep, store_beep, 9);
980static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
981 show_beep, store_beep, 10);
982static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
983 show_beep, store_beep, 16);
984static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
985 show_beep, store_beep, 17);
986static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
987 show_beep, store_beep, 6);
988static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
989 show_beep, store_beep, 7);
990static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
991 show_beep, store_beep, 11);
992static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
993 show_beep, store_beep, 4);
994static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
995 show_beep, store_beep, 5);
996static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
997 show_beep, store_beep, 13);
998static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
999 show_beep, store_beep, 15);
1000
1001static ssize_t
1002show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
1003{
1004 int nr = to_sensor_dev_attr(devattr)->index;
1005 struct w83627hf_data *data = w83627hf_update_device(dev);
1006 return sprintf(buf, "%ld\n",
1007 (long) DIV_FROM_REG(data->fan_div[nr]));
1008}
1009/*
1010 * Note: we save and restore the fan minimum here, because its value is
1011 * determined in part by the fan divisor. This follows the principle of
1012 * least surprise; the user doesn't expect the fan minimum to change just
1013 * because the divisor changed.
1014 */
1015static ssize_t
1016store_fan_div(struct device *dev, struct device_attribute *devattr,
1017 const char *buf, size_t count)
1018{
1019 int nr = to_sensor_dev_attr(devattr)->index;
1020 struct w83627hf_data *data = dev_get_drvdata(dev);
1021 unsigned long min;
1022 u8 reg;
1023 unsigned long val;
1024 int err;
1025
1026 err = kstrtoul(buf, 10, &val);
1027 if (err)
1028 return err;
1029
1030 mutex_lock(&data->update_lock);
1031
1032 /* Save fan_min */
1033 min = FAN_FROM_REG(data->fan_min[nr],
1034 DIV_FROM_REG(data->fan_div[nr]));
1035
1036 data->fan_div[nr] = DIV_TO_REG(val);
1037
1038 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1039 & (nr==0 ? 0xcf : 0x3f))
1040 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
1041 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1042
1043 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
1044 & ~(1 << (5 + nr)))
1045 | ((data->fan_div[nr] & 0x04) << (3 + nr));
1046 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
1047
1048 /* Restore fan_min */
1049 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1050 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
1051
1052 mutex_unlock(&data->update_lock);
1053 return count;
1054}
1055
1056static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
1057 show_fan_div, store_fan_div, 0);
1058static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
1059 show_fan_div, store_fan_div, 1);
1060static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
1061 show_fan_div, store_fan_div, 2);
1062
1063static ssize_t
1064show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
1065{
1066 int nr = to_sensor_dev_attr(devattr)->index;
1067 struct w83627hf_data *data = w83627hf_update_device(dev);
1068 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
1069}
1070
1071static ssize_t
1072store_pwm(struct device *dev, struct device_attribute *devattr,
1073 const char *buf, size_t count)
1074{
1075 int nr = to_sensor_dev_attr(devattr)->index;
1076 struct w83627hf_data *data = dev_get_drvdata(dev);
1077 unsigned long val;
1078 int err;
1079
1080 err = kstrtoul(buf, 10, &val);
1081 if (err)
1082 return err;
1083
1084 mutex_lock(&data->update_lock);
1085
1086 if (data->type == w83627thf) {
1087 /* bits 0-3 are reserved in 627THF */
1088 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
1089 w83627hf_write_value(data,
1090 W836X7HF_REG_PWM(data->type, nr),
1091 data->pwm[nr] |
1092 (w83627hf_read_value(data,
1093 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
1094 } else {
1095 data->pwm[nr] = PWM_TO_REG(val);
1096 w83627hf_write_value(data,
1097 W836X7HF_REG_PWM(data->type, nr),
1098 data->pwm[nr]);
1099 }
1100
1101 mutex_unlock(&data->update_lock);
1102 return count;
1103}
1104
1105static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
1106static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
1107static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
1108
1109static ssize_t
1110show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
1111{
1112 int nr = to_sensor_dev_attr(devattr)->index;
1113 struct w83627hf_data *data = w83627hf_update_device(dev);
1114 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
1115}
1116
1117static ssize_t
1118store_pwm_enable(struct device *dev, struct device_attribute *devattr,
1119 const char *buf, size_t count)
1120{
1121 int nr = to_sensor_dev_attr(devattr)->index;
1122 struct w83627hf_data *data = dev_get_drvdata(dev);
1123 u8 reg;
1124 unsigned long val;
1125 int err;
1126
1127 err = kstrtoul(buf, 10, &val);
1128 if (err)
1129 return err;
1130
1131 if (!val || val > 3) /* modes 1, 2 and 3 are supported */
1132 return -EINVAL;
1133 mutex_lock(&data->update_lock);
1134 data->pwm_enable[nr] = val;
1135 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
1136 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
1137 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
1138 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
1139 mutex_unlock(&data->update_lock);
1140 return count;
1141}
1142
1143static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1144 store_pwm_enable, 0);
1145static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1146 store_pwm_enable, 1);
1147static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1148 store_pwm_enable, 2);
1149
1150static ssize_t
1151show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
1152{
1153 int nr = to_sensor_dev_attr(devattr)->index;
1154 struct w83627hf_data *data = w83627hf_update_device(dev);
1155 if (data->type == w83627hf)
1156 return sprintf(buf, "%ld\n",
1157 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1158 else
1159 return sprintf(buf, "%ld\n",
1160 pwm_freq_from_reg(data->pwm_freq[nr]));
1161}
1162
1163static ssize_t
1164store_pwm_freq(struct device *dev, struct device_attribute *devattr,
1165 const char *buf, size_t count)
1166{
1167 int nr = to_sensor_dev_attr(devattr)->index;
1168 struct w83627hf_data *data = dev_get_drvdata(dev);
1169 static const u8 mask[]={0xF8, 0x8F};
1170 unsigned long val;
1171 int err;
1172
1173 err = kstrtoul(buf, 10, &val);
1174 if (err)
1175 return err;
1176
1177 mutex_lock(&data->update_lock);
1178
1179 if (data->type == w83627hf) {
1180 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1181 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
1182 (data->pwm_freq[nr] << (nr*4)) |
1183 (w83627hf_read_value(data,
1184 W83627HF_REG_PWM_FREQ) & mask[nr]));
1185 } else {
1186 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1187 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1188 data->pwm_freq[nr]);
1189 }
1190
1191 mutex_unlock(&data->update_lock);
1192 return count;
1193}
1194
1195static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
1196 show_pwm_freq, store_pwm_freq, 0);
1197static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
1198 show_pwm_freq, store_pwm_freq, 1);
1199static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
1200 show_pwm_freq, store_pwm_freq, 2);
1201
1202static ssize_t
1203show_temp_type(struct device *dev, struct device_attribute *devattr,
1204 char *buf)
1205{
1206 int nr = to_sensor_dev_attr(devattr)->index;
1207 struct w83627hf_data *data = w83627hf_update_device(dev);
1208 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1209}
1210
1211static ssize_t
1212store_temp_type(struct device *dev, struct device_attribute *devattr,
1213 const char *buf, size_t count)
1214{
1215 int nr = to_sensor_dev_attr(devattr)->index;
1216 struct w83627hf_data *data = dev_get_drvdata(dev);
1217 unsigned long val;
1218 u32 tmp;
1219 int err;
1220
1221 err = kstrtoul(buf, 10, &val);
1222 if (err)
1223 return err;
1224
1225 mutex_lock(&data->update_lock);
1226
1227 switch (val) {
1228 case 1: /* PII/Celeron diode */
1229 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1230 w83627hf_write_value(data, W83781D_REG_SCFG1,
1231 tmp | BIT_SCFG1[nr]);
1232 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1233 w83627hf_write_value(data, W83781D_REG_SCFG2,
1234 tmp | BIT_SCFG2[nr]);
1235 data->sens[nr] = val;
1236 break;
1237 case 2: /* 3904 */
1238 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1239 w83627hf_write_value(data, W83781D_REG_SCFG1,
1240 tmp | BIT_SCFG1[nr]);
1241 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1242 w83627hf_write_value(data, W83781D_REG_SCFG2,
1243 tmp & ~BIT_SCFG2[nr]);
1244 data->sens[nr] = val;
1245 break;
1246 case W83781D_DEFAULT_BETA:
1247 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1248 "instead\n", W83781D_DEFAULT_BETA);
1249 /* fall through */
1250 case 4: /* thermistor */
1251 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1252 w83627hf_write_value(data, W83781D_REG_SCFG1,
1253 tmp & ~BIT_SCFG1[nr]);
1254 data->sens[nr] = val;
1255 break;
1256 default:
1257 dev_err(dev,
1258 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1259 (long) val);
1260 break;
1261 }
1262
1263 mutex_unlock(&data->update_lock);
1264 return count;
1265}
1266
1267#define sysfs_temp_type(offset) \
1268static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1269 show_temp_type, store_temp_type, offset - 1);
1270
1271sysfs_temp_type(1);
1272sysfs_temp_type(2);
1273sysfs_temp_type(3);
1274
1275static ssize_t
1276name_show(struct device *dev, struct device_attribute *devattr, char *buf)
1277{
1278 struct w83627hf_data *data = dev_get_drvdata(dev);
1279
1280 return sprintf(buf, "%s\n", data->name);
1281}
1282static DEVICE_ATTR_RO(name);
1283
1284static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1285 struct w83627hf_sio_data *sio_data)
1286{
1287 int err;
1288 u16 val;
1289
1290 static __initconst char *const names[] = {
1291 "W83627HF",
1292 "W83627THF",
1293 "W83697HF",
1294 "W83637HF",
1295 "W83687THF",
1296 };
1297
1298 sio_data->sioaddr = sioaddr;
1299 err = superio_enter(sio_data);
1300 if (err)
1301 return err;
1302
1303 err = -ENODEV;
1304 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1305 switch (val) {
1306 case W627_DEVID:
1307 sio_data->type = w83627hf;
1308 break;
1309 case W627THF_DEVID:
1310 sio_data->type = w83627thf;
1311 break;
1312 case W697_DEVID:
1313 sio_data->type = w83697hf;
1314 break;
1315 case W637_DEVID:
1316 sio_data->type = w83637hf;
1317 break;
1318 case W687THF_DEVID:
1319 sio_data->type = w83687thf;
1320 break;
1321 case 0xff: /* No device at all */
1322 goto exit;
1323 default:
1324 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1325 goto exit;
1326 }
1327
1328 superio_select(sio_data, W83627HF_LD_HWM);
1329 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1330 superio_inb(sio_data, WINB_BASE_REG + 1);
1331 *addr = val & WINB_ALIGNMENT;
1332 if (*addr == 0) {
1333 pr_warn("Base address not set, skipping\n");
1334 goto exit;
1335 }
1336
1337 val = superio_inb(sio_data, WINB_ACT_REG);
1338 if (!(val & 0x01)) {
1339 pr_warn("Enabling HWM logical device\n");
1340 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
1341 }
1342
1343 err = 0;
1344 pr_info(DRVNAME ": Found %s chip at %#x\n",
1345 names[sio_data->type], *addr);
1346
1347 exit:
1348 superio_exit(sio_data);
1349 return err;
1350}
1351
1352#define VIN_UNIT_ATTRS(_X_) \
1353 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1354 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
1355 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1356 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1357 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
1358
1359#define FAN_UNIT_ATTRS(_X_) \
1360 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1361 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
1362 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1363 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1364 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
1365
1366#define TEMP_UNIT_ATTRS(_X_) \
1367 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1368 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1369 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
1370 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1371 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1372 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
1373
1374static struct attribute *w83627hf_attributes[] = {
1375 &dev_attr_in0_input.attr,
1376 &dev_attr_in0_min.attr,
1377 &dev_attr_in0_max.attr,
1378 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1379 &sensor_dev_attr_in0_beep.dev_attr.attr,
1380 VIN_UNIT_ATTRS(2),
1381 VIN_UNIT_ATTRS(3),
1382 VIN_UNIT_ATTRS(4),
1383 VIN_UNIT_ATTRS(7),
1384 VIN_UNIT_ATTRS(8),
1385
1386 FAN_UNIT_ATTRS(1),
1387 FAN_UNIT_ATTRS(2),
1388
1389 TEMP_UNIT_ATTRS(1),
1390 TEMP_UNIT_ATTRS(2),
1391
1392 &dev_attr_alarms.attr,
1393 &sensor_dev_attr_beep_enable.dev_attr.attr,
1394 &dev_attr_beep_mask.attr,
1395
1396 &sensor_dev_attr_pwm1.dev_attr.attr,
1397 &sensor_dev_attr_pwm2.dev_attr.attr,
1398 &dev_attr_name.attr,
1399 NULL
1400};
1401
1402static const struct attribute_group w83627hf_group = {
1403 .attrs = w83627hf_attributes,
1404};
1405
1406static struct attribute *w83627hf_attributes_opt[] = {
1407 VIN_UNIT_ATTRS(1),
1408 VIN_UNIT_ATTRS(5),
1409 VIN_UNIT_ATTRS(6),
1410
1411 FAN_UNIT_ATTRS(3),
1412 TEMP_UNIT_ATTRS(3),
1413 &sensor_dev_attr_pwm3.dev_attr.attr,
1414
1415 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1416 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1417 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1418
1419 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1420 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1421 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1422
1423 NULL
1424};
1425
1426static const struct attribute_group w83627hf_group_opt = {
1427 .attrs = w83627hf_attributes_opt,
1428};
1429
1430static int w83627hf_probe(struct platform_device *pdev)
1431{
1432 struct device *dev = &pdev->dev;
1433 struct w83627hf_sio_data *sio_data = dev_get_platdata(dev);
1434 struct w83627hf_data *data;
1435 struct resource *res;
1436 int err, i;
1437
1438 static const char *names[] = {
1439 "w83627hf",
1440 "w83627thf",
1441 "w83697hf",
1442 "w83637hf",
1443 "w83687thf",
1444 };
1445
1446 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1447 if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
1448 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1449 (unsigned long)res->start,
1450 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1451 return -EBUSY;
1452 }
1453
1454 data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
1455 if (!data)
1456 return -ENOMEM;
1457
1458 data->addr = res->start;
1459 data->type = sio_data->type;
1460 data->name = names[sio_data->type];
1461 mutex_init(&data->lock);
1462 mutex_init(&data->update_lock);
1463 platform_set_drvdata(pdev, data);
1464
1465 /* Initialize the chip */
1466 w83627hf_init_device(pdev);
1467
1468 /* A few vars need to be filled upon startup */
1469 for (i = 0; i <= 2; i++)
1470 data->fan_min[i] = w83627hf_read_value(
1471 data, W83627HF_REG_FAN_MIN(i));
1472 w83627hf_update_fan_div(data);
1473
1474 /* Register common device attributes */
1475 err = sysfs_create_group(&dev->kobj, &w83627hf_group);
1476 if (err)
1477 return err;
1478
1479 /* Register chip-specific device attributes */
1480 if (data->type == w83627hf || data->type == w83697hf)
1481 if ((err = device_create_file(dev,
1482 &sensor_dev_attr_in5_input.dev_attr))
1483 || (err = device_create_file(dev,
1484 &sensor_dev_attr_in5_min.dev_attr))
1485 || (err = device_create_file(dev,
1486 &sensor_dev_attr_in5_max.dev_attr))
1487 || (err = device_create_file(dev,
1488 &sensor_dev_attr_in5_alarm.dev_attr))
1489 || (err = device_create_file(dev,
1490 &sensor_dev_attr_in5_beep.dev_attr))
1491 || (err = device_create_file(dev,
1492 &sensor_dev_attr_in6_input.dev_attr))
1493 || (err = device_create_file(dev,
1494 &sensor_dev_attr_in6_min.dev_attr))
1495 || (err = device_create_file(dev,
1496 &sensor_dev_attr_in6_max.dev_attr))
1497 || (err = device_create_file(dev,
1498 &sensor_dev_attr_in6_alarm.dev_attr))
1499 || (err = device_create_file(dev,
1500 &sensor_dev_attr_in6_beep.dev_attr))
1501 || (err = device_create_file(dev,
1502 &sensor_dev_attr_pwm1_freq.dev_attr))
1503 || (err = device_create_file(dev,
1504 &sensor_dev_attr_pwm2_freq.dev_attr)))
1505 goto error;
1506
1507 if (data->type != w83697hf)
1508 if ((err = device_create_file(dev,
1509 &sensor_dev_attr_in1_input.dev_attr))
1510 || (err = device_create_file(dev,
1511 &sensor_dev_attr_in1_min.dev_attr))
1512 || (err = device_create_file(dev,
1513 &sensor_dev_attr_in1_max.dev_attr))
1514 || (err = device_create_file(dev,
1515 &sensor_dev_attr_in1_alarm.dev_attr))
1516 || (err = device_create_file(dev,
1517 &sensor_dev_attr_in1_beep.dev_attr))
1518 || (err = device_create_file(dev,
1519 &sensor_dev_attr_fan3_input.dev_attr))
1520 || (err = device_create_file(dev,
1521 &sensor_dev_attr_fan3_min.dev_attr))
1522 || (err = device_create_file(dev,
1523 &sensor_dev_attr_fan3_div.dev_attr))
1524 || (err = device_create_file(dev,
1525 &sensor_dev_attr_fan3_alarm.dev_attr))
1526 || (err = device_create_file(dev,
1527 &sensor_dev_attr_fan3_beep.dev_attr))
1528 || (err = device_create_file(dev,
1529 &sensor_dev_attr_temp3_input.dev_attr))
1530 || (err = device_create_file(dev,
1531 &sensor_dev_attr_temp3_max.dev_attr))
1532 || (err = device_create_file(dev,
1533 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1534 || (err = device_create_file(dev,
1535 &sensor_dev_attr_temp3_alarm.dev_attr))
1536 || (err = device_create_file(dev,
1537 &sensor_dev_attr_temp3_beep.dev_attr))
1538 || (err = device_create_file(dev,
1539 &sensor_dev_attr_temp3_type.dev_attr)))
1540 goto error;
1541
1542 if (data->type != w83697hf && data->vid != 0xff) {
1543 /* Convert VID to voltage based on VRM */
1544 data->vrm = vid_which_vrm();
1545
1546 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1547 || (err = device_create_file(dev, &dev_attr_vrm)))
1548 goto error;
1549 }
1550
1551 if (data->type == w83627thf || data->type == w83637hf
1552 || data->type == w83687thf) {
1553 err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
1554 if (err)
1555 goto error;
1556 }
1557
1558 if (data->type == w83637hf || data->type == w83687thf)
1559 if ((err = device_create_file(dev,
1560 &sensor_dev_attr_pwm1_freq.dev_attr))
1561 || (err = device_create_file(dev,
1562 &sensor_dev_attr_pwm2_freq.dev_attr))
1563 || (err = device_create_file(dev,
1564 &sensor_dev_attr_pwm3_freq.dev_attr)))
1565 goto error;
1566
1567 if (data->type != w83627hf)
1568 if ((err = device_create_file(dev,
1569 &sensor_dev_attr_pwm1_enable.dev_attr))
1570 || (err = device_create_file(dev,
1571 &sensor_dev_attr_pwm2_enable.dev_attr)))
1572 goto error;
1573
1574 if (data->type == w83627thf || data->type == w83637hf
1575 || data->type == w83687thf) {
1576 err = device_create_file(dev,
1577 &sensor_dev_attr_pwm3_enable.dev_attr);
1578 if (err)
1579 goto error;
1580 }
1581
1582 data->hwmon_dev = hwmon_device_register(dev);
1583 if (IS_ERR(data->hwmon_dev)) {
1584 err = PTR_ERR(data->hwmon_dev);
1585 goto error;
1586 }
1587
1588 return 0;
1589
1590 error:
1591 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1592 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1593 return err;
1594}
1595
1596static int w83627hf_remove(struct platform_device *pdev)
1597{
1598 struct w83627hf_data *data = platform_get_drvdata(pdev);
1599
1600 hwmon_device_unregister(data->hwmon_dev);
1601
1602 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1603 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1604
1605 return 0;
1606}
1607
1608
1609/* Registers 0x50-0x5f are banked */
1610static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1611{
1612 if ((reg & 0x00f0) == 0x50) {
1613 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1614 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1615 }
1616}
1617
1618/* Not strictly necessary, but play it safe for now */
1619static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1620{
1621 if (reg & 0xff00) {
1622 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1623 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1624 }
1625}
1626
1627static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1628{
1629 int res, word_sized;
1630
1631 mutex_lock(&data->lock);
1632 word_sized = (((reg & 0xff00) == 0x100)
1633 || ((reg & 0xff00) == 0x200))
1634 && (((reg & 0x00ff) == 0x50)
1635 || ((reg & 0x00ff) == 0x53)
1636 || ((reg & 0x00ff) == 0x55));
1637 w83627hf_set_bank(data, reg);
1638 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1639 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1640 if (word_sized) {
1641 outb_p((reg & 0xff) + 1,
1642 data->addr + W83781D_ADDR_REG_OFFSET);
1643 res =
1644 (res << 8) + inb_p(data->addr +
1645 W83781D_DATA_REG_OFFSET);
1646 }
1647 w83627hf_reset_bank(data, reg);
1648 mutex_unlock(&data->lock);
1649 return res;
1650}
1651
1652static int w83627thf_read_gpio5(struct platform_device *pdev)
1653{
1654 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1655 int res = 0xff, sel;
1656
1657 if (superio_enter(sio_data)) {
1658 /*
1659 * Some other driver reserved the address space for itself.
1660 * We don't want to fail driver instantiation because of that,
1661 * so display a warning and keep going.
1662 */
1663 dev_warn(&pdev->dev,
1664 "Can not read VID data: Failed to enable SuperIO access\n");
1665 return res;
1666 }
1667
1668 superio_select(sio_data, W83627HF_LD_GPIO5);
1669
1670 res = 0xff;
1671
1672 /* Make sure these GPIO pins are enabled */
1673 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
1674 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1675 goto exit;
1676 }
1677
1678 /*
1679 * Make sure the pins are configured for input
1680 * There must be at least five (VRM 9), and possibly 6 (VRM 10)
1681 */
1682 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1683 if ((sel & 0x1f) != 0x1f) {
1684 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1685 "function\n");
1686 goto exit;
1687 }
1688
1689 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1690 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1691
1692exit:
1693 superio_exit(sio_data);
1694 return res;
1695}
1696
1697static int w83687thf_read_vid(struct platform_device *pdev)
1698{
1699 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1700 int res = 0xff;
1701
1702 if (superio_enter(sio_data)) {
1703 /*
1704 * Some other driver reserved the address space for itself.
1705 * We don't want to fail driver instantiation because of that,
1706 * so display a warning and keep going.
1707 */
1708 dev_warn(&pdev->dev,
1709 "Can not read VID data: Failed to enable SuperIO access\n");
1710 return res;
1711 }
1712
1713 superio_select(sio_data, W83627HF_LD_HWM);
1714
1715 /* Make sure these GPIO pins are enabled */
1716 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
1717 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1718 goto exit;
1719 }
1720
1721 /* Make sure the pins are configured for input */
1722 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
1723 dev_dbg(&pdev->dev, "VID configured as output, "
1724 "no VID function\n");
1725 goto exit;
1726 }
1727
1728 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
1729
1730exit:
1731 superio_exit(sio_data);
1732 return res;
1733}
1734
1735static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1736{
1737 int word_sized;
1738
1739 mutex_lock(&data->lock);
1740 word_sized = (((reg & 0xff00) == 0x100)
1741 || ((reg & 0xff00) == 0x200))
1742 && (((reg & 0x00ff) == 0x53)
1743 || ((reg & 0x00ff) == 0x55));
1744 w83627hf_set_bank(data, reg);
1745 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1746 if (word_sized) {
1747 outb_p(value >> 8,
1748 data->addr + W83781D_DATA_REG_OFFSET);
1749 outb_p((reg & 0xff) + 1,
1750 data->addr + W83781D_ADDR_REG_OFFSET);
1751 }
1752 outb_p(value & 0xff,
1753 data->addr + W83781D_DATA_REG_OFFSET);
1754 w83627hf_reset_bank(data, reg);
1755 mutex_unlock(&data->lock);
1756 return 0;
1757}
1758
1759static void w83627hf_init_device(struct platform_device *pdev)
1760{
1761 struct w83627hf_data *data = platform_get_drvdata(pdev);
1762 int i;
1763 enum chips type = data->type;
1764 u8 tmp;
1765
1766 /* Minimize conflicts with other winbond i2c-only clients... */
1767 /* disable i2c subclients... how to disable main i2c client?? */
1768 /* force i2c address to relatively uncommon address */
1769 if (type == w83627hf) {
1770 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1771 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1772 }
1773
1774 /* Read VID only once */
1775 if (type == w83627hf || type == w83637hf) {
1776 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1777 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1778 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1779 } else if (type == w83627thf) {
1780 data->vid = w83627thf_read_gpio5(pdev);
1781 } else if (type == w83687thf) {
1782 data->vid = w83687thf_read_vid(pdev);
1783 }
1784
1785 /* Read VRM & OVT Config only once */
1786 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1787 data->vrm_ovt =
1788 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1789 }
1790
1791 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1792 for (i = 1; i <= 3; i++) {
1793 if (!(tmp & BIT_SCFG1[i - 1])) {
1794 data->sens[i - 1] = 4;
1795 } else {
1796 if (w83627hf_read_value
1797 (data,
1798 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1799 data->sens[i - 1] = 1;
1800 else
1801 data->sens[i - 1] = 2;
1802 }
1803 if ((type == w83697hf) && (i == 2))
1804 break;
1805 }
1806
1807 if(init) {
1808 /* Enable temp2 */
1809 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1810 if (tmp & 0x01) {
1811 dev_warn(&pdev->dev, "Enabling temp2, readings "
1812 "might not make sense\n");
1813 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1814 tmp & 0xfe);
1815 }
1816
1817 /* Enable temp3 */
1818 if (type != w83697hf) {
1819 tmp = w83627hf_read_value(data,
1820 W83627HF_REG_TEMP3_CONFIG);
1821 if (tmp & 0x01) {
1822 dev_warn(&pdev->dev, "Enabling temp3, "
1823 "readings might not make sense\n");
1824 w83627hf_write_value(data,
1825 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1826 }
1827 }
1828 }
1829
1830 /* Start monitoring */
1831 w83627hf_write_value(data, W83781D_REG_CONFIG,
1832 (w83627hf_read_value(data,
1833 W83781D_REG_CONFIG) & 0xf7)
1834 | 0x01);
1835
1836 /* Enable VBAT monitoring if needed */
1837 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1838 if (!(tmp & 0x01))
1839 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1840}
1841
1842static void w83627hf_update_fan_div(struct w83627hf_data *data)
1843{
1844 int reg;
1845
1846 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1847 data->fan_div[0] = (reg >> 4) & 0x03;
1848 data->fan_div[1] = (reg >> 6) & 0x03;
1849 if (data->type != w83697hf) {
1850 data->fan_div[2] = (w83627hf_read_value(data,
1851 W83781D_REG_PIN) >> 6) & 0x03;
1852 }
1853 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1854 data->fan_div[0] |= (reg >> 3) & 0x04;
1855 data->fan_div[1] |= (reg >> 4) & 0x04;
1856 if (data->type != w83697hf)
1857 data->fan_div[2] |= (reg >> 5) & 0x04;
1858}
1859
1860static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1861{
1862 struct w83627hf_data *data = dev_get_drvdata(dev);
1863 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
1864 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1865
1866 mutex_lock(&data->update_lock);
1867
1868 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1869 || !data->valid) {
1870 for (i = 0; i <= 8; i++) {
1871 /* skip missing sensors */
1872 if (((data->type == w83697hf) && (i == 1)) ||
1873 ((data->type != w83627hf && data->type != w83697hf)
1874 && (i == 5 || i == 6)))
1875 continue;
1876 data->in[i] =
1877 w83627hf_read_value(data, W83781D_REG_IN(i));
1878 data->in_min[i] =
1879 w83627hf_read_value(data,
1880 W83781D_REG_IN_MIN(i));
1881 data->in_max[i] =
1882 w83627hf_read_value(data,
1883 W83781D_REG_IN_MAX(i));
1884 }
1885 for (i = 0; i <= 2; i++) {
1886 data->fan[i] =
1887 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1888 data->fan_min[i] =
1889 w83627hf_read_value(data,
1890 W83627HF_REG_FAN_MIN(i));
1891 }
1892 for (i = 0; i <= 2; i++) {
1893 u8 tmp = w83627hf_read_value(data,
1894 W836X7HF_REG_PWM(data->type, i));
1895 /* bits 0-3 are reserved in 627THF */
1896 if (data->type == w83627thf)
1897 tmp &= 0xf0;
1898 data->pwm[i] = tmp;
1899 if (i == 1 &&
1900 (data->type == w83627hf || data->type == w83697hf))
1901 break;
1902 }
1903 if (data->type == w83627hf) {
1904 u8 tmp = w83627hf_read_value(data,
1905 W83627HF_REG_PWM_FREQ);
1906 data->pwm_freq[0] = tmp & 0x07;
1907 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1908 } else if (data->type != w83627thf) {
1909 for (i = 1; i <= 3; i++) {
1910 data->pwm_freq[i - 1] =
1911 w83627hf_read_value(data,
1912 W83637HF_REG_PWM_FREQ[i - 1]);
1913 if (i == 2 && (data->type == w83697hf))
1914 break;
1915 }
1916 }
1917 if (data->type != w83627hf) {
1918 for (i = 0; i < num_pwms; i++) {
1919 u8 tmp = w83627hf_read_value(data,
1920 W83627THF_REG_PWM_ENABLE[i]);
1921 data->pwm_enable[i] =
1922 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1923 & 0x03) + 1;
1924 }
1925 }
1926 for (i = 0; i < num_temps; i++) {
1927 data->temp[i] = w83627hf_read_value(
1928 data, w83627hf_reg_temp[i]);
1929 data->temp_max[i] = w83627hf_read_value(
1930 data, w83627hf_reg_temp_over[i]);
1931 data->temp_max_hyst[i] = w83627hf_read_value(
1932 data, w83627hf_reg_temp_hyst[i]);
1933 }
1934
1935 w83627hf_update_fan_div(data);
1936
1937 data->alarms =
1938 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1939 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1940 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1941 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1942 data->beep_mask = (i << 8) |
1943 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1944 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1945 data->last_updated = jiffies;
1946 data->valid = 1;
1947 }
1948
1949 mutex_unlock(&data->update_lock);
1950
1951 return data;
1952}
1953
1954static int __init w83627hf_device_add(unsigned short address,
1955 const struct w83627hf_sio_data *sio_data)
1956{
1957 struct resource res = {
1958 .start = address + WINB_REGION_OFFSET,
1959 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1960 .name = DRVNAME,
1961 .flags = IORESOURCE_IO,
1962 };
1963 int err;
1964
1965 err = acpi_check_resource_conflict(&res);
1966 if (err)
1967 goto exit;
1968
1969 pdev = platform_device_alloc(DRVNAME, address);
1970 if (!pdev) {
1971 err = -ENOMEM;
1972 pr_err("Device allocation failed\n");
1973 goto exit;
1974 }
1975
1976 err = platform_device_add_resources(pdev, &res, 1);
1977 if (err) {
1978 pr_err("Device resource addition failed (%d)\n", err);
1979 goto exit_device_put;
1980 }
1981
1982 err = platform_device_add_data(pdev, sio_data,
1983 sizeof(struct w83627hf_sio_data));
1984 if (err) {
1985 pr_err("Platform data allocation failed\n");
1986 goto exit_device_put;
1987 }
1988
1989 err = platform_device_add(pdev);
1990 if (err) {
1991 pr_err("Device addition failed (%d)\n", err);
1992 goto exit_device_put;
1993 }
1994
1995 return 0;
1996
1997exit_device_put:
1998 platform_device_put(pdev);
1999exit:
2000 return err;
2001}
2002
2003static int __init sensors_w83627hf_init(void)
2004{
2005 int err;
2006 unsigned short address;
2007 struct w83627hf_sio_data sio_data;
2008
2009 if (w83627hf_find(0x2e, &address, &sio_data)
2010 && w83627hf_find(0x4e, &address, &sio_data))
2011 return -ENODEV;
2012
2013 err = platform_driver_register(&w83627hf_driver);
2014 if (err)
2015 goto exit;
2016
2017 /* Sets global pdev as a side effect */
2018 err = w83627hf_device_add(address, &sio_data);
2019 if (err)
2020 goto exit_driver;
2021
2022 return 0;
2023
2024exit_driver:
2025 platform_driver_unregister(&w83627hf_driver);
2026exit:
2027 return err;
2028}
2029
2030static void __exit sensors_w83627hf_exit(void)
2031{
2032 platform_device_unregister(pdev);
2033 platform_driver_unregister(&w83627hf_driver);
2034}
2035
2036MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2037 "Philip Edelbrock <phil@netroedge.com>, "
2038 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2039MODULE_DESCRIPTION("W83627HF driver");
2040MODULE_LICENSE("GPL");
2041
2042module_init(sensors_w83627hf_init);
2043module_exit(sensors_w83627hf_exit);