rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters |
| 3 | * |
| 4 | * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * Andrew F. Davis <afd@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but |
| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <linux/device.h> |
| 18 | #include <linux/err.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/regmap.h> |
| 23 | #include <linux/spi/spi.h> |
| 24 | #include <linux/sysfs.h> |
| 25 | #include <linux/regulator/consumer.h> |
| 26 | |
| 27 | #include <linux/iio/iio.h> |
| 28 | #include <linux/iio/sysfs.h> |
| 29 | #include <linux/iio/buffer.h> |
| 30 | #include <linux/iio/trigger.h> |
| 31 | #include <linux/iio/triggered_buffer.h> |
| 32 | #include <linux/iio/trigger_consumer.h> |
| 33 | |
| 34 | #include "afe440x.h" |
| 35 | |
| 36 | #define AFE4403_DRIVER_NAME "afe4403" |
| 37 | |
| 38 | /* AFE4403 Registers */ |
| 39 | #define AFE4403_TIAGAIN 0x20 |
| 40 | #define AFE4403_TIA_AMB_GAIN 0x21 |
| 41 | |
| 42 | enum afe4403_fields { |
| 43 | /* Gains */ |
| 44 | F_RF_LED1, F_CF_LED1, |
| 45 | F_RF_LED, F_CF_LED, |
| 46 | |
| 47 | /* LED Current */ |
| 48 | F_ILED1, F_ILED2, |
| 49 | |
| 50 | /* sentinel */ |
| 51 | F_MAX_FIELDS |
| 52 | }; |
| 53 | |
| 54 | static const struct reg_field afe4403_reg_fields[] = { |
| 55 | /* Gains */ |
| 56 | [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2), |
| 57 | [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7), |
| 58 | [F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2), |
| 59 | [F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7), |
| 60 | /* LED Current */ |
| 61 | [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7), |
| 62 | [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15), |
| 63 | }; |
| 64 | |
| 65 | /** |
| 66 | * struct afe4403_data - AFE4403 device instance data |
| 67 | * @dev: Device structure |
| 68 | * @spi: SPI device handle |
| 69 | * @regmap: Register map of the device |
| 70 | * @fields: Register fields of the device |
| 71 | * @regulator: Pointer to the regulator for the IC |
| 72 | * @trig: IIO trigger for this device |
| 73 | * @irq: ADC_RDY line interrupt number |
| 74 | * @buffer: Used to construct data layout to push into IIO buffer. |
| 75 | */ |
| 76 | struct afe4403_data { |
| 77 | struct device *dev; |
| 78 | struct spi_device *spi; |
| 79 | struct regmap *regmap; |
| 80 | struct regmap_field *fields[F_MAX_FIELDS]; |
| 81 | struct regulator *regulator; |
| 82 | struct iio_trigger *trig; |
| 83 | int irq; |
| 84 | /* Ensure suitable alignment for timestamp */ |
| 85 | s32 buffer[8] __aligned(8); |
| 86 | }; |
| 87 | |
| 88 | enum afe4403_chan_id { |
| 89 | LED2 = 1, |
| 90 | ALED2, |
| 91 | LED1, |
| 92 | ALED1, |
| 93 | LED2_ALED2, |
| 94 | LED1_ALED1, |
| 95 | }; |
| 96 | |
| 97 | static const unsigned int afe4403_channel_values[] = { |
| 98 | [LED2] = AFE440X_LED2VAL, |
| 99 | [ALED2] = AFE440X_ALED2VAL, |
| 100 | [LED1] = AFE440X_LED1VAL, |
| 101 | [ALED1] = AFE440X_ALED1VAL, |
| 102 | [LED2_ALED2] = AFE440X_LED2_ALED2VAL, |
| 103 | [LED1_ALED1] = AFE440X_LED1_ALED1VAL, |
| 104 | }; |
| 105 | |
| 106 | static const unsigned int afe4403_channel_leds[] = { |
| 107 | [LED2] = F_ILED2, |
| 108 | [LED1] = F_ILED1, |
| 109 | }; |
| 110 | |
| 111 | static const struct iio_chan_spec afe4403_channels[] = { |
| 112 | /* ADC values */ |
| 113 | AFE440X_INTENSITY_CHAN(LED2, 0), |
| 114 | AFE440X_INTENSITY_CHAN(ALED2, 0), |
| 115 | AFE440X_INTENSITY_CHAN(LED1, 0), |
| 116 | AFE440X_INTENSITY_CHAN(ALED1, 0), |
| 117 | AFE440X_INTENSITY_CHAN(LED2_ALED2, 0), |
| 118 | AFE440X_INTENSITY_CHAN(LED1_ALED1, 0), |
| 119 | /* LED current */ |
| 120 | AFE440X_CURRENT_CHAN(LED2), |
| 121 | AFE440X_CURRENT_CHAN(LED1), |
| 122 | }; |
| 123 | |
| 124 | static const struct afe440x_val_table afe4403_res_table[] = { |
| 125 | { 500000 }, { 250000 }, { 100000 }, { 50000 }, |
| 126 | { 25000 }, { 10000 }, { 1000000 }, { 0 }, |
| 127 | }; |
| 128 | AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table); |
| 129 | |
| 130 | static const struct afe440x_val_table afe4403_cap_table[] = { |
| 131 | { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 }, |
| 132 | { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 }, |
| 133 | { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 }, |
| 134 | { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 }, |
| 135 | { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 }, |
| 136 | { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 }, |
| 137 | { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 }, |
| 138 | { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 }, |
| 139 | }; |
| 140 | AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table); |
| 141 | |
| 142 | static ssize_t afe440x_show_register(struct device *dev, |
| 143 | struct device_attribute *attr, |
| 144 | char *buf) |
| 145 | { |
| 146 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
| 147 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 148 | struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); |
| 149 | unsigned int reg_val; |
| 150 | int vals[2]; |
| 151 | int ret; |
| 152 | |
| 153 | ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val); |
| 154 | if (ret) |
| 155 | return ret; |
| 156 | |
| 157 | if (reg_val >= afe440x_attr->table_size) |
| 158 | return -EINVAL; |
| 159 | |
| 160 | vals[0] = afe440x_attr->val_table[reg_val].integer; |
| 161 | vals[1] = afe440x_attr->val_table[reg_val].fract; |
| 162 | |
| 163 | return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); |
| 164 | } |
| 165 | |
| 166 | static ssize_t afe440x_store_register(struct device *dev, |
| 167 | struct device_attribute *attr, |
| 168 | const char *buf, size_t count) |
| 169 | { |
| 170 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
| 171 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 172 | struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); |
| 173 | int val, integer, fract, ret; |
| 174 | |
| 175 | ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract); |
| 176 | if (ret) |
| 177 | return ret; |
| 178 | |
| 179 | for (val = 0; val < afe440x_attr->table_size; val++) |
| 180 | if (afe440x_attr->val_table[val].integer == integer && |
| 181 | afe440x_attr->val_table[val].fract == fract) |
| 182 | break; |
| 183 | if (val == afe440x_attr->table_size) |
| 184 | return -EINVAL; |
| 185 | |
| 186 | ret = regmap_field_write(afe->fields[afe440x_attr->field], val); |
| 187 | if (ret) |
| 188 | return ret; |
| 189 | |
| 190 | return count; |
| 191 | } |
| 192 | |
| 193 | static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table); |
| 194 | static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table); |
| 195 | |
| 196 | static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table); |
| 197 | static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table); |
| 198 | |
| 199 | static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table); |
| 200 | static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table); |
| 201 | |
| 202 | static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table); |
| 203 | static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table); |
| 204 | |
| 205 | static struct attribute *afe440x_attributes[] = { |
| 206 | &dev_attr_in_intensity_resistance_available.attr, |
| 207 | &dev_attr_in_intensity_capacitance_available.attr, |
| 208 | &afe440x_attr_in_intensity1_resistance.dev_attr.attr, |
| 209 | &afe440x_attr_in_intensity1_capacitance.dev_attr.attr, |
| 210 | &afe440x_attr_in_intensity2_resistance.dev_attr.attr, |
| 211 | &afe440x_attr_in_intensity2_capacitance.dev_attr.attr, |
| 212 | &afe440x_attr_in_intensity3_resistance.dev_attr.attr, |
| 213 | &afe440x_attr_in_intensity3_capacitance.dev_attr.attr, |
| 214 | &afe440x_attr_in_intensity4_resistance.dev_attr.attr, |
| 215 | &afe440x_attr_in_intensity4_capacitance.dev_attr.attr, |
| 216 | NULL |
| 217 | }; |
| 218 | |
| 219 | static const struct attribute_group afe440x_attribute_group = { |
| 220 | .attrs = afe440x_attributes |
| 221 | }; |
| 222 | |
| 223 | static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val) |
| 224 | { |
| 225 | u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; |
| 226 | u8 rx[3]; |
| 227 | int ret; |
| 228 | |
| 229 | /* Enable reading from the device */ |
| 230 | ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); |
| 231 | if (ret) |
| 232 | return ret; |
| 233 | |
| 234 | ret = spi_write_then_read(afe->spi, ®, 1, rx, 3); |
| 235 | if (ret) |
| 236 | return ret; |
| 237 | |
| 238 | *val = (rx[0] << 16) | |
| 239 | (rx[1] << 8) | |
| 240 | (rx[2]); |
| 241 | |
| 242 | /* Disable reading from the device */ |
| 243 | tx[3] = AFE440X_CONTROL0_WRITE; |
| 244 | ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); |
| 245 | if (ret) |
| 246 | return ret; |
| 247 | |
| 248 | return 0; |
| 249 | } |
| 250 | |
| 251 | static int afe4403_read_raw(struct iio_dev *indio_dev, |
| 252 | struct iio_chan_spec const *chan, |
| 253 | int *val, int *val2, long mask) |
| 254 | { |
| 255 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 256 | unsigned int reg = afe4403_channel_values[chan->address]; |
| 257 | unsigned int field = afe4403_channel_leds[chan->address]; |
| 258 | int ret; |
| 259 | |
| 260 | switch (chan->type) { |
| 261 | case IIO_INTENSITY: |
| 262 | switch (mask) { |
| 263 | case IIO_CHAN_INFO_RAW: |
| 264 | ret = afe4403_read(afe, reg, val); |
| 265 | if (ret) |
| 266 | return ret; |
| 267 | return IIO_VAL_INT; |
| 268 | } |
| 269 | break; |
| 270 | case IIO_CURRENT: |
| 271 | switch (mask) { |
| 272 | case IIO_CHAN_INFO_RAW: |
| 273 | ret = regmap_field_read(afe->fields[field], val); |
| 274 | if (ret) |
| 275 | return ret; |
| 276 | return IIO_VAL_INT; |
| 277 | case IIO_CHAN_INFO_SCALE: |
| 278 | *val = 0; |
| 279 | *val2 = 800000; |
| 280 | return IIO_VAL_INT_PLUS_MICRO; |
| 281 | } |
| 282 | break; |
| 283 | default: |
| 284 | break; |
| 285 | } |
| 286 | |
| 287 | return -EINVAL; |
| 288 | } |
| 289 | |
| 290 | static int afe4403_write_raw(struct iio_dev *indio_dev, |
| 291 | struct iio_chan_spec const *chan, |
| 292 | int val, int val2, long mask) |
| 293 | { |
| 294 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 295 | unsigned int field = afe4403_channel_leds[chan->address]; |
| 296 | |
| 297 | switch (chan->type) { |
| 298 | case IIO_CURRENT: |
| 299 | switch (mask) { |
| 300 | case IIO_CHAN_INFO_RAW: |
| 301 | return regmap_field_write(afe->fields[field], val); |
| 302 | } |
| 303 | break; |
| 304 | default: |
| 305 | break; |
| 306 | } |
| 307 | |
| 308 | return -EINVAL; |
| 309 | } |
| 310 | |
| 311 | static const struct iio_info afe4403_iio_info = { |
| 312 | .attrs = &afe440x_attribute_group, |
| 313 | .read_raw = afe4403_read_raw, |
| 314 | .write_raw = afe4403_write_raw, |
| 315 | .driver_module = THIS_MODULE, |
| 316 | }; |
| 317 | |
| 318 | static irqreturn_t afe4403_trigger_handler(int irq, void *private) |
| 319 | { |
| 320 | struct iio_poll_func *pf = private; |
| 321 | struct iio_dev *indio_dev = pf->indio_dev; |
| 322 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 323 | int ret, bit, i = 0; |
| 324 | u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; |
| 325 | u8 rx[3]; |
| 326 | |
| 327 | /* Enable reading from the device */ |
| 328 | ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); |
| 329 | if (ret) |
| 330 | goto err; |
| 331 | |
| 332 | for_each_set_bit(bit, indio_dev->active_scan_mask, |
| 333 | indio_dev->masklength) { |
| 334 | ret = spi_write_then_read(afe->spi, |
| 335 | &afe4403_channel_values[bit], 1, |
| 336 | rx, 3); |
| 337 | if (ret) |
| 338 | goto err; |
| 339 | |
| 340 | afe->buffer[i++] = (rx[0] << 16) | |
| 341 | (rx[1] << 8) | |
| 342 | (rx[2]); |
| 343 | } |
| 344 | |
| 345 | /* Disable reading from the device */ |
| 346 | tx[3] = AFE440X_CONTROL0_WRITE; |
| 347 | ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); |
| 348 | if (ret) |
| 349 | goto err; |
| 350 | |
| 351 | iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer, |
| 352 | pf->timestamp); |
| 353 | err: |
| 354 | iio_trigger_notify_done(indio_dev->trig); |
| 355 | |
| 356 | return IRQ_HANDLED; |
| 357 | } |
| 358 | |
| 359 | static const struct iio_trigger_ops afe4403_trigger_ops = { |
| 360 | .owner = THIS_MODULE, |
| 361 | }; |
| 362 | |
| 363 | #define AFE4403_TIMING_PAIRS \ |
| 364 | { AFE440X_LED2STC, 0x000050 }, \ |
| 365 | { AFE440X_LED2ENDC, 0x0003e7 }, \ |
| 366 | { AFE440X_LED1LEDSTC, 0x0007d0 }, \ |
| 367 | { AFE440X_LED1LEDENDC, 0x000bb7 }, \ |
| 368 | { AFE440X_ALED2STC, 0x000438 }, \ |
| 369 | { AFE440X_ALED2ENDC, 0x0007cf }, \ |
| 370 | { AFE440X_LED1STC, 0x000820 }, \ |
| 371 | { AFE440X_LED1ENDC, 0x000bb7 }, \ |
| 372 | { AFE440X_LED2LEDSTC, 0x000000 }, \ |
| 373 | { AFE440X_LED2LEDENDC, 0x0003e7 }, \ |
| 374 | { AFE440X_ALED1STC, 0x000c08 }, \ |
| 375 | { AFE440X_ALED1ENDC, 0x000f9f }, \ |
| 376 | { AFE440X_LED2CONVST, 0x0003ef }, \ |
| 377 | { AFE440X_LED2CONVEND, 0x0007cf }, \ |
| 378 | { AFE440X_ALED2CONVST, 0x0007d7 }, \ |
| 379 | { AFE440X_ALED2CONVEND, 0x000bb7 }, \ |
| 380 | { AFE440X_LED1CONVST, 0x000bbf }, \ |
| 381 | { AFE440X_LED1CONVEND, 0x009c3f }, \ |
| 382 | { AFE440X_ALED1CONVST, 0x000fa7 }, \ |
| 383 | { AFE440X_ALED1CONVEND, 0x001387 }, \ |
| 384 | { AFE440X_ADCRSTSTCT0, 0x0003e8 }, \ |
| 385 | { AFE440X_ADCRSTENDCT0, 0x0003eb }, \ |
| 386 | { AFE440X_ADCRSTSTCT1, 0x0007d0 }, \ |
| 387 | { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \ |
| 388 | { AFE440X_ADCRSTSTCT2, 0x000bb8 }, \ |
| 389 | { AFE440X_ADCRSTENDCT2, 0x000bbb }, \ |
| 390 | { AFE440X_ADCRSTSTCT3, 0x000fa0 }, \ |
| 391 | { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \ |
| 392 | { AFE440X_PRPCOUNT, 0x009c3f }, \ |
| 393 | { AFE440X_PDNCYCLESTC, 0x001518 }, \ |
| 394 | { AFE440X_PDNCYCLEENDC, 0x00991f } |
| 395 | |
| 396 | static const struct reg_sequence afe4403_reg_sequences[] = { |
| 397 | AFE4403_TIMING_PAIRS, |
| 398 | { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN }, |
| 399 | { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN }, |
| 400 | }; |
| 401 | |
| 402 | static const struct regmap_range afe4403_yes_ranges[] = { |
| 403 | regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL), |
| 404 | }; |
| 405 | |
| 406 | static const struct regmap_access_table afe4403_volatile_table = { |
| 407 | .yes_ranges = afe4403_yes_ranges, |
| 408 | .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges), |
| 409 | }; |
| 410 | |
| 411 | static const struct regmap_config afe4403_regmap_config = { |
| 412 | .reg_bits = 8, |
| 413 | .val_bits = 24, |
| 414 | |
| 415 | .max_register = AFE440X_PDNCYCLEENDC, |
| 416 | .cache_type = REGCACHE_RBTREE, |
| 417 | .volatile_table = &afe4403_volatile_table, |
| 418 | }; |
| 419 | |
| 420 | static const struct of_device_id afe4403_of_match[] = { |
| 421 | { .compatible = "ti,afe4403", }, |
| 422 | { /* sentinel */ } |
| 423 | }; |
| 424 | MODULE_DEVICE_TABLE(of, afe4403_of_match); |
| 425 | |
| 426 | static int __maybe_unused afe4403_suspend(struct device *dev) |
| 427 | { |
| 428 | struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev)); |
| 429 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 430 | int ret; |
| 431 | |
| 432 | ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, |
| 433 | AFE440X_CONTROL2_PDN_AFE, |
| 434 | AFE440X_CONTROL2_PDN_AFE); |
| 435 | if (ret) |
| 436 | return ret; |
| 437 | |
| 438 | ret = regulator_disable(afe->regulator); |
| 439 | if (ret) { |
| 440 | dev_err(dev, "Unable to disable regulator\n"); |
| 441 | return ret; |
| 442 | } |
| 443 | |
| 444 | return 0; |
| 445 | } |
| 446 | |
| 447 | static int __maybe_unused afe4403_resume(struct device *dev) |
| 448 | { |
| 449 | struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev)); |
| 450 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 451 | int ret; |
| 452 | |
| 453 | ret = regulator_enable(afe->regulator); |
| 454 | if (ret) { |
| 455 | dev_err(dev, "Unable to enable regulator\n"); |
| 456 | return ret; |
| 457 | } |
| 458 | |
| 459 | ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, |
| 460 | AFE440X_CONTROL2_PDN_AFE, 0); |
| 461 | if (ret) |
| 462 | return ret; |
| 463 | |
| 464 | return 0; |
| 465 | } |
| 466 | |
| 467 | static SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend, afe4403_resume); |
| 468 | |
| 469 | static int afe4403_probe(struct spi_device *spi) |
| 470 | { |
| 471 | struct iio_dev *indio_dev; |
| 472 | struct afe4403_data *afe; |
| 473 | int i, ret; |
| 474 | |
| 475 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe)); |
| 476 | if (!indio_dev) |
| 477 | return -ENOMEM; |
| 478 | |
| 479 | afe = iio_priv(indio_dev); |
| 480 | spi_set_drvdata(spi, indio_dev); |
| 481 | |
| 482 | afe->dev = &spi->dev; |
| 483 | afe->spi = spi; |
| 484 | afe->irq = spi->irq; |
| 485 | |
| 486 | afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config); |
| 487 | if (IS_ERR(afe->regmap)) { |
| 488 | dev_err(afe->dev, "Unable to allocate register map\n"); |
| 489 | return PTR_ERR(afe->regmap); |
| 490 | } |
| 491 | |
| 492 | for (i = 0; i < F_MAX_FIELDS; i++) { |
| 493 | afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap, |
| 494 | afe4403_reg_fields[i]); |
| 495 | if (IS_ERR(afe->fields[i])) { |
| 496 | dev_err(afe->dev, "Unable to allocate regmap fields\n"); |
| 497 | return PTR_ERR(afe->fields[i]); |
| 498 | } |
| 499 | } |
| 500 | |
| 501 | afe->regulator = devm_regulator_get(afe->dev, "tx_sup"); |
| 502 | if (IS_ERR(afe->regulator)) { |
| 503 | dev_err(afe->dev, "Unable to get regulator\n"); |
| 504 | return PTR_ERR(afe->regulator); |
| 505 | } |
| 506 | ret = regulator_enable(afe->regulator); |
| 507 | if (ret) { |
| 508 | dev_err(afe->dev, "Unable to enable regulator\n"); |
| 509 | return ret; |
| 510 | } |
| 511 | |
| 512 | ret = regmap_write(afe->regmap, AFE440X_CONTROL0, |
| 513 | AFE440X_CONTROL0_SW_RESET); |
| 514 | if (ret) { |
| 515 | dev_err(afe->dev, "Unable to reset device\n"); |
| 516 | goto err_disable_reg; |
| 517 | } |
| 518 | |
| 519 | ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences, |
| 520 | ARRAY_SIZE(afe4403_reg_sequences)); |
| 521 | if (ret) { |
| 522 | dev_err(afe->dev, "Unable to set register defaults\n"); |
| 523 | goto err_disable_reg; |
| 524 | } |
| 525 | |
| 526 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 527 | indio_dev->dev.parent = afe->dev; |
| 528 | indio_dev->channels = afe4403_channels; |
| 529 | indio_dev->num_channels = ARRAY_SIZE(afe4403_channels); |
| 530 | indio_dev->name = AFE4403_DRIVER_NAME; |
| 531 | indio_dev->info = &afe4403_iio_info; |
| 532 | |
| 533 | if (afe->irq > 0) { |
| 534 | afe->trig = devm_iio_trigger_alloc(afe->dev, |
| 535 | "%s-dev%d", |
| 536 | indio_dev->name, |
| 537 | indio_dev->id); |
| 538 | if (!afe->trig) { |
| 539 | dev_err(afe->dev, "Unable to allocate IIO trigger\n"); |
| 540 | ret = -ENOMEM; |
| 541 | goto err_disable_reg; |
| 542 | } |
| 543 | |
| 544 | iio_trigger_set_drvdata(afe->trig, indio_dev); |
| 545 | |
| 546 | afe->trig->ops = &afe4403_trigger_ops; |
| 547 | afe->trig->dev.parent = afe->dev; |
| 548 | |
| 549 | ret = iio_trigger_register(afe->trig); |
| 550 | if (ret) { |
| 551 | dev_err(afe->dev, "Unable to register IIO trigger\n"); |
| 552 | goto err_disable_reg; |
| 553 | } |
| 554 | |
| 555 | ret = devm_request_threaded_irq(afe->dev, afe->irq, |
| 556 | iio_trigger_generic_data_rdy_poll, |
| 557 | NULL, IRQF_ONESHOT, |
| 558 | AFE4403_DRIVER_NAME, |
| 559 | afe->trig); |
| 560 | if (ret) { |
| 561 | dev_err(afe->dev, "Unable to request IRQ\n"); |
| 562 | goto err_trig; |
| 563 | } |
| 564 | } |
| 565 | |
| 566 | ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, |
| 567 | afe4403_trigger_handler, NULL); |
| 568 | if (ret) { |
| 569 | dev_err(afe->dev, "Unable to setup buffer\n"); |
| 570 | goto err_trig; |
| 571 | } |
| 572 | |
| 573 | ret = iio_device_register(indio_dev); |
| 574 | if (ret) { |
| 575 | dev_err(afe->dev, "Unable to register IIO device\n"); |
| 576 | goto err_buff; |
| 577 | } |
| 578 | |
| 579 | return 0; |
| 580 | |
| 581 | err_buff: |
| 582 | iio_triggered_buffer_cleanup(indio_dev); |
| 583 | err_trig: |
| 584 | if (afe->irq > 0) |
| 585 | iio_trigger_unregister(afe->trig); |
| 586 | err_disable_reg: |
| 587 | regulator_disable(afe->regulator); |
| 588 | |
| 589 | return ret; |
| 590 | } |
| 591 | |
| 592 | static int afe4403_remove(struct spi_device *spi) |
| 593 | { |
| 594 | struct iio_dev *indio_dev = spi_get_drvdata(spi); |
| 595 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 596 | int ret; |
| 597 | |
| 598 | iio_device_unregister(indio_dev); |
| 599 | |
| 600 | iio_triggered_buffer_cleanup(indio_dev); |
| 601 | |
| 602 | if (afe->irq > 0) |
| 603 | iio_trigger_unregister(afe->trig); |
| 604 | |
| 605 | ret = regulator_disable(afe->regulator); |
| 606 | if (ret) { |
| 607 | dev_err(afe->dev, "Unable to disable regulator\n"); |
| 608 | return ret; |
| 609 | } |
| 610 | |
| 611 | return 0; |
| 612 | } |
| 613 | |
| 614 | static const struct spi_device_id afe4403_ids[] = { |
| 615 | { "afe4403", 0 }, |
| 616 | { /* sentinel */ } |
| 617 | }; |
| 618 | MODULE_DEVICE_TABLE(spi, afe4403_ids); |
| 619 | |
| 620 | static struct spi_driver afe4403_spi_driver = { |
| 621 | .driver = { |
| 622 | .name = AFE4403_DRIVER_NAME, |
| 623 | .of_match_table = afe4403_of_match, |
| 624 | .pm = &afe4403_pm_ops, |
| 625 | }, |
| 626 | .probe = afe4403_probe, |
| 627 | .remove = afe4403_remove, |
| 628 | .id_table = afe4403_ids, |
| 629 | }; |
| 630 | module_spi_driver(afe4403_spi_driver); |
| 631 | |
| 632 | MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); |
| 633 | MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE"); |
| 634 | MODULE_LICENSE("GPL v2"); |