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192.168.1.100 / T103 / 1f884588077ad3476b9c91cbb0ee9ee0332bbb68 / . / src / kernel / linux / v4.14 / drivers / pci / dwc / pcie-designware-plat.c
blob: 168e2380f49399f57060b7faf6702ac9c7cd446f [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +0800[diff] [blame^]1/*
2 * PCIe RC driver for Synopsys DesignWare Core
3 *
4 * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
5 *
6 * Authors: Joao Pinto <Joao.Pinto@synopsys.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/clk.h>
13#include <linux/delay.h>
14#include <linux/gpio.h>
15#include <linux/interrupt.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/of_gpio.h>
19#include <linux/pci.h>
20#include <linux/platform_device.h>
21#include <linux/resource.h>
22#include <linux/signal.h>
23#include <linux/types.h>
24
25#include "pcie-designware.h"
26
27struct dw_plat_pcie {
28 struct dw_pcie *pci;
29};
30
31static irqreturn_t dw_plat_pcie_msi_irq_handler(int irq, void *arg)
32{
33 struct pcie_port *pp = arg;
34
35 return dw_handle_msi_irq(pp);
36}
37
38static int dw_plat_pcie_host_init(struct pcie_port *pp)
39{
40 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
41
42 dw_pcie_setup_rc(pp);
43 dw_pcie_wait_for_link(pci);
44
45 if (IS_ENABLED(CONFIG_PCI_MSI))
46 dw_pcie_msi_init(pp);
47
48 return 0;
49}
50
51static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
52 .host_init = dw_plat_pcie_host_init,
53};
54
55static int dw_plat_add_pcie_port(struct pcie_port *pp,
56 struct platform_device *pdev)
57{
58 struct device *dev = &pdev->dev;
59 int ret;
60
61 pp->irq = platform_get_irq(pdev, 1);
62 if (pp->irq < 0)
63 return pp->irq;
64
65 if (IS_ENABLED(CONFIG_PCI_MSI)) {
66 pp->msi_irq = platform_get_irq(pdev, 0);
67 if (pp->msi_irq < 0)
68 return pp->msi_irq;
69
70 ret = devm_request_irq(dev, pp->msi_irq,
71 dw_plat_pcie_msi_irq_handler,
72 IRQF_SHARED | IRQF_NO_THREAD,
73 "dw-plat-pcie-msi", pp);
74 if (ret) {
75 dev_err(dev, "failed to request MSI IRQ\n");
76 return ret;
77 }
78 }
79
80 pp->root_bus_nr = -1;
81 pp->ops = &dw_plat_pcie_host_ops;
82
83 ret = dw_pcie_host_init(pp);
84 if (ret) {
85 dev_err(dev, "failed to initialize host\n");
86 return ret;
87 }
88
89 return 0;
90}
91
92static const struct dw_pcie_ops dw_pcie_ops = {
93};
94
95static int dw_plat_pcie_probe(struct platform_device *pdev)
96{
97 struct device *dev = &pdev->dev;
98 struct dw_plat_pcie *dw_plat_pcie;
99 struct dw_pcie *pci;
100 struct resource *res; /* Resource from DT */
101 int ret;
102
103 dw_plat_pcie = devm_kzalloc(dev, sizeof(*dw_plat_pcie), GFP_KERNEL);
104 if (!dw_plat_pcie)
105 return -ENOMEM;
106
107 pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
108 if (!pci)
109 return -ENOMEM;
110
111 pci->dev = dev;
112 pci->ops = &dw_pcie_ops;
113
114 dw_plat_pcie->pci = pci;
115
116 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
117 pci->dbi_base = devm_ioremap_resource(dev, res);
118 if (IS_ERR(pci->dbi_base))
119 return PTR_ERR(pci->dbi_base);
120
121 platform_set_drvdata(pdev, dw_plat_pcie);
122
123 ret = dw_plat_add_pcie_port(&pci->pp, pdev);
124 if (ret < 0)
125 return ret;
126
127 return 0;
128}
129
130static const struct of_device_id dw_plat_pcie_of_match[] = {
131 { .compatible = "snps,dw-pcie", },
132 {},
133};
134
135static struct platform_driver dw_plat_pcie_driver = {
136 .driver = {
137 .name = "dw-pcie",
138 .of_match_table = dw_plat_pcie_of_match,
139 .suppress_bind_attrs = true,
140 },
141 .probe = dw_plat_pcie_probe,
142};
143builtin_platform_driver(dw_plat_pcie_driver);