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rjw1f884582022-01-06 17:20:42 +08001/*
2 * Renesas R-Car Gen3 for USB2.0 PHY driver
3 *
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 *
6 * This is based on the phy-rcar-gen2 driver:
7 * Copyright (C) 2014 Renesas Solutions Corp.
8 * Copyright (C) 2014 Cogent Embedded, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/extcon.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/phy/phy.h>
22#include <linux/platform_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/regulator/consumer.h>
25#include <linux/string.h>
26#include <linux/workqueue.h>
27
28/******* USB2.0 Host registers (original offset is +0x200) *******/
29#define USB2_INT_ENABLE 0x000
30#define USB2_USBCTR 0x00c
31#define USB2_SPD_RSM_TIMSET 0x10c
32#define USB2_OC_TIMSET 0x110
33#define USB2_COMMCTRL 0x600
34#define USB2_OBINTSTA 0x604
35#define USB2_OBINTEN 0x608
36#define USB2_VBCTRL 0x60c
37#define USB2_LINECTRL1 0x610
38#define USB2_ADPCTRL 0x630
39
40/* INT_ENABLE */
41#define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
42#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
43#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
44#define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN | \
45 USB2_INT_ENABLE_USBH_INTB_EN | \
46 USB2_INT_ENABLE_USBH_INTA_EN)
47
48/* USBCTR */
49#define USB2_USBCTR_DIRPD BIT(2)
50#define USB2_USBCTR_PLL_RST BIT(1)
51
52/* SPD_RSM_TIMSET */
53#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
54
55/* OC_TIMSET */
56#define USB2_OC_TIMSET_INIT 0x000209ab
57
58/* COMMCTRL */
59#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
60
61/* OBINTSTA and OBINTEN */
62#define USB2_OBINT_SESSVLDCHG BIT(12)
63#define USB2_OBINT_IDDIGCHG BIT(11)
64#define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
65 USB2_OBINT_IDDIGCHG)
66
67/* VBCTRL */
68#define USB2_VBCTRL_OCCLREN BIT(16)
69#define USB2_VBCTRL_DRVVBUSSEL BIT(8)
70
71/* LINECTRL1 */
72#define USB2_LINECTRL1_DPRPD_EN BIT(19)
73#define USB2_LINECTRL1_DP_RPD BIT(18)
74#define USB2_LINECTRL1_DMRPD_EN BIT(17)
75#define USB2_LINECTRL1_DM_RPD BIT(16)
76#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
77
78/* ADPCTRL */
79#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
80#define USB2_ADPCTRL_IDDIG BIT(19)
81#define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
82#define USB2_ADPCTRL_DRVVBUS BIT(4)
83
84struct rcar_gen3_chan {
85 void __iomem *base;
86 struct extcon_dev *extcon;
87 struct phy *phy;
88 struct regulator *vbus;
89 struct work_struct work;
90 bool extcon_host;
91 bool has_otg;
92};
93
94static void rcar_gen3_phy_usb2_work(struct work_struct *work)
95{
96 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
97 work);
98
99 if (ch->extcon_host) {
100 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
101 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
102 } else {
103 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
104 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
105 }
106}
107
108static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
109{
110 void __iomem *usb2_base = ch->base;
111 u32 val = readl(usb2_base + USB2_COMMCTRL);
112
113 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
114 if (host)
115 val &= ~USB2_COMMCTRL_OTG_PERI;
116 else
117 val |= USB2_COMMCTRL_OTG_PERI;
118 writel(val, usb2_base + USB2_COMMCTRL);
119}
120
121static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
122{
123 void __iomem *usb2_base = ch->base;
124 u32 val = readl(usb2_base + USB2_LINECTRL1);
125
126 dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
127 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
128 if (dp)
129 val |= USB2_LINECTRL1_DP_RPD;
130 if (dm)
131 val |= USB2_LINECTRL1_DM_RPD;
132 writel(val, usb2_base + USB2_LINECTRL1);
133}
134
135static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
136{
137 void __iomem *usb2_base = ch->base;
138 u32 val = readl(usb2_base + USB2_ADPCTRL);
139
140 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
141 if (vbus)
142 val |= USB2_ADPCTRL_DRVVBUS;
143 else
144 val &= ~USB2_ADPCTRL_DRVVBUS;
145 writel(val, usb2_base + USB2_ADPCTRL);
146}
147
148static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
149{
150 rcar_gen3_set_linectrl(ch, 1, 1);
151 rcar_gen3_set_host_mode(ch, 1);
152 rcar_gen3_enable_vbus_ctrl(ch, 1);
153
154 ch->extcon_host = true;
155 schedule_work(&ch->work);
156}
157
158static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
159{
160 rcar_gen3_set_linectrl(ch, 0, 1);
161 rcar_gen3_set_host_mode(ch, 0);
162 rcar_gen3_enable_vbus_ctrl(ch, 0);
163
164 ch->extcon_host = false;
165 schedule_work(&ch->work);
166}
167
168static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
169{
170 void __iomem *usb2_base = ch->base;
171 u32 val;
172
173 val = readl(usb2_base + USB2_LINECTRL1);
174 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
175
176 rcar_gen3_set_linectrl(ch, 1, 1);
177 rcar_gen3_set_host_mode(ch, 1);
178 rcar_gen3_enable_vbus_ctrl(ch, 0);
179
180 val = readl(usb2_base + USB2_LINECTRL1);
181 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
182}
183
184static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
185{
186 rcar_gen3_set_linectrl(ch, 0, 1);
187 rcar_gen3_set_host_mode(ch, 0);
188 rcar_gen3_enable_vbus_ctrl(ch, 1);
189}
190
191static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
192{
193 void __iomem *usb2_base = ch->base;
194 u32 val;
195
196 val = readl(usb2_base + USB2_OBINTEN);
197 writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
198
199 rcar_gen3_enable_vbus_ctrl(ch, 1);
200 rcar_gen3_init_for_host(ch);
201
202 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
203}
204
205static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
206{
207 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
208}
209
210static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
211{
212 if (!rcar_gen3_check_id(ch))
213 rcar_gen3_init_for_host(ch);
214 else
215 rcar_gen3_init_for_peri(ch);
216}
217
218static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
219{
220 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
221}
222
223static ssize_t role_store(struct device *dev, struct device_attribute *attr,
224 const char *buf, size_t count)
225{
226 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
227 bool is_b_device, is_host, new_mode_is_host;
228
229 if (!ch->has_otg || !ch->phy->init_count)
230 return -EIO;
231
232 /*
233 * is_b_device: true is B-Device. false is A-Device.
234 * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
235 */
236 is_b_device = rcar_gen3_check_id(ch);
237 is_host = rcar_gen3_is_host(ch);
238 if (sysfs_streq(buf, "host"))
239 new_mode_is_host = true;
240 else if (sysfs_streq(buf, "peripheral"))
241 new_mode_is_host = false;
242 else
243 return -EINVAL;
244
245 /* If current and new mode is the same, this returns the error */
246 if (is_host == new_mode_is_host)
247 return -EINVAL;
248
249 if (new_mode_is_host) { /* And is_host must be false */
250 if (!is_b_device) /* A-Peripheral */
251 rcar_gen3_init_from_a_peri_to_a_host(ch);
252 else /* B-Peripheral */
253 rcar_gen3_init_for_b_host(ch);
254 } else { /* And is_host must be true */
255 if (!is_b_device) /* A-Host */
256 rcar_gen3_init_for_a_peri(ch);
257 else /* B-Host */
258 rcar_gen3_init_for_peri(ch);
259 }
260
261 return count;
262}
263
264static ssize_t role_show(struct device *dev, struct device_attribute *attr,
265 char *buf)
266{
267 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
268
269 if (!ch->has_otg || !ch->phy->init_count)
270 return -EIO;
271
272 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
273 "peripheral");
274}
275static DEVICE_ATTR_RW(role);
276
277static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
278{
279 void __iomem *usb2_base = ch->base;
280 u32 val;
281
282 val = readl(usb2_base + USB2_VBCTRL);
283 val &= ~USB2_VBCTRL_OCCLREN;
284 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
285 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
286 val = readl(usb2_base + USB2_OBINTEN);
287 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
288 val = readl(usb2_base + USB2_ADPCTRL);
289 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
290 val = readl(usb2_base + USB2_LINECTRL1);
291 rcar_gen3_set_linectrl(ch, 0, 0);
292 writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN,
293 usb2_base + USB2_LINECTRL1);
294
295 rcar_gen3_device_recognition(ch);
296}
297
298static int rcar_gen3_phy_usb2_init(struct phy *p)
299{
300 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
301 void __iomem *usb2_base = channel->base;
302
303 /* Initialize USB2 part */
304 writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
305 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
306 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
307
308 /* Initialize otg part */
309 if (channel->has_otg)
310 rcar_gen3_init_otg(channel);
311
312 return 0;
313}
314
315static int rcar_gen3_phy_usb2_exit(struct phy *p)
316{
317 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
318
319 writel(0, channel->base + USB2_INT_ENABLE);
320
321 return 0;
322}
323
324static int rcar_gen3_phy_usb2_power_on(struct phy *p)
325{
326 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
327 void __iomem *usb2_base = channel->base;
328 u32 val;
329 int ret;
330
331 if (channel->vbus) {
332 ret = regulator_enable(channel->vbus);
333 if (ret)
334 return ret;
335 }
336
337 val = readl(usb2_base + USB2_USBCTR);
338 val |= USB2_USBCTR_PLL_RST;
339 writel(val, usb2_base + USB2_USBCTR);
340 val &= ~USB2_USBCTR_PLL_RST;
341 writel(val, usb2_base + USB2_USBCTR);
342
343 return 0;
344}
345
346static int rcar_gen3_phy_usb2_power_off(struct phy *p)
347{
348 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
349 int ret = 0;
350
351 if (channel->vbus)
352 ret = regulator_disable(channel->vbus);
353
354 return ret;
355}
356
357static const struct phy_ops rcar_gen3_phy_usb2_ops = {
358 .init = rcar_gen3_phy_usb2_init,
359 .exit = rcar_gen3_phy_usb2_exit,
360 .power_on = rcar_gen3_phy_usb2_power_on,
361 .power_off = rcar_gen3_phy_usb2_power_off,
362 .owner = THIS_MODULE,
363};
364
365static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
366{
367 struct rcar_gen3_chan *ch = _ch;
368 void __iomem *usb2_base = ch->base;
369 u32 status = readl(usb2_base + USB2_OBINTSTA);
370 irqreturn_t ret = IRQ_NONE;
371
372 if (status & USB2_OBINT_BITS) {
373 dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
374 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
375 rcar_gen3_device_recognition(ch);
376 ret = IRQ_HANDLED;
377 }
378
379 return ret;
380}
381
382static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
383 { .compatible = "renesas,usb2-phy-r8a7795" },
384 { .compatible = "renesas,usb2-phy-r8a7796" },
385 { .compatible = "renesas,rcar-gen3-usb2-phy" },
386 { }
387};
388MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
389
390static const unsigned int rcar_gen3_phy_cable[] = {
391 EXTCON_USB,
392 EXTCON_USB_HOST,
393 EXTCON_NONE,
394};
395
396static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
397{
398 struct device *dev = &pdev->dev;
399 struct rcar_gen3_chan *channel;
400 struct phy_provider *provider;
401 struct resource *res;
402 int irq, ret = 0;
403
404 if (!dev->of_node) {
405 dev_err(dev, "This driver needs device tree\n");
406 return -EINVAL;
407 }
408
409 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
410 if (!channel)
411 return -ENOMEM;
412
413 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
414 channel->base = devm_ioremap_resource(dev, res);
415 if (IS_ERR(channel->base))
416 return PTR_ERR(channel->base);
417
418 /* call request_irq for OTG */
419 irq = platform_get_irq(pdev, 0);
420 if (irq >= 0) {
421 int ret;
422
423 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
424 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
425 IRQF_SHARED, dev_name(dev), channel);
426 if (irq < 0)
427 dev_err(dev, "No irq handler (%d)\n", irq);
428 channel->has_otg = true;
429 channel->extcon = devm_extcon_dev_allocate(dev,
430 rcar_gen3_phy_cable);
431 if (IS_ERR(channel->extcon))
432 return PTR_ERR(channel->extcon);
433
434 ret = devm_extcon_dev_register(dev, channel->extcon);
435 if (ret < 0) {
436 dev_err(dev, "Failed to register extcon\n");
437 return ret;
438 }
439 }
440
441 /*
442 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
443 * And then, phy-core will manage runtime pm for this device.
444 */
445 pm_runtime_enable(dev);
446 channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
447 if (IS_ERR(channel->phy)) {
448 dev_err(dev, "Failed to create USB2 PHY\n");
449 ret = PTR_ERR(channel->phy);
450 goto error;
451 }
452
453 channel->vbus = devm_regulator_get_optional(dev, "vbus");
454 if (IS_ERR(channel->vbus)) {
455 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
456 ret = PTR_ERR(channel->vbus);
457 goto error;
458 }
459 channel->vbus = NULL;
460 }
461
462 platform_set_drvdata(pdev, channel);
463 phy_set_drvdata(channel->phy, channel);
464
465 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
466 if (IS_ERR(provider)) {
467 dev_err(dev, "Failed to register PHY provider\n");
468 ret = PTR_ERR(provider);
469 goto error;
470 } else if (channel->has_otg) {
471 int ret;
472
473 ret = device_create_file(dev, &dev_attr_role);
474 if (ret < 0)
475 goto error;
476 }
477
478 return 0;
479
480error:
481 pm_runtime_disable(dev);
482
483 return ret;
484}
485
486static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
487{
488 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
489
490 if (channel->has_otg)
491 device_remove_file(&pdev->dev, &dev_attr_role);
492
493 pm_runtime_disable(&pdev->dev);
494
495 return 0;
496};
497
498static struct platform_driver rcar_gen3_phy_usb2_driver = {
499 .driver = {
500 .name = "phy_rcar_gen3_usb2",
501 .of_match_table = rcar_gen3_phy_usb2_match_table,
502 },
503 .probe = rcar_gen3_phy_usb2_probe,
504 .remove = rcar_gen3_phy_usb2_remove,
505};
506module_platform_driver(rcar_gen3_phy_usb2_driver);
507
508MODULE_LICENSE("GPL v2");
509MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
510MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");