rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Intel Lewisburg pinctrl/GPIO driver |
| 3 | * |
| 4 | * Copyright (C) 2017, Intel Corporation |
| 5 | * Author: Mika Westerberg <mika.westerberg@linux.intel.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/acpi.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/pm.h> |
| 16 | #include <linux/pinctrl/pinctrl.h> |
| 17 | |
| 18 | #include "pinctrl-intel.h" |
| 19 | |
| 20 | #define LBG_PAD_OWN 0x020 |
| 21 | #define LBG_PADCFGLOCK 0x060 |
| 22 | #define LBG_HOSTSW_OWN 0x080 |
| 23 | #define LBG_GPI_IE 0x110 |
| 24 | |
| 25 | #define LBG_COMMUNITY(b, s, e) \ |
| 26 | { \ |
| 27 | .barno = (b), \ |
| 28 | .padown_offset = LBG_PAD_OWN, \ |
| 29 | .padcfglock_offset = LBG_PADCFGLOCK, \ |
| 30 | .hostown_offset = LBG_HOSTSW_OWN, \ |
| 31 | .ie_offset = LBG_GPI_IE, \ |
| 32 | .gpp_size = 24, \ |
| 33 | .pin_base = (s), \ |
| 34 | .npins = ((e) - (s) + 1), \ |
| 35 | } |
| 36 | |
| 37 | /* Lewisburg */ |
| 38 | static const struct pinctrl_pin_desc lbg_pins[] = { |
| 39 | /* GPP_A */ |
| 40 | PINCTRL_PIN(0, "RCINB"), |
| 41 | PINCTRL_PIN(1, "LAD_0"), |
| 42 | PINCTRL_PIN(2, "LAD_1"), |
| 43 | PINCTRL_PIN(3, "LAD_2"), |
| 44 | PINCTRL_PIN(4, "LAD_3"), |
| 45 | PINCTRL_PIN(5, "LFRAMEB"), |
| 46 | PINCTRL_PIN(6, "SERIRQ"), |
| 47 | PINCTRL_PIN(7, "PIRQAB"), |
| 48 | PINCTRL_PIN(8, "CLKRUNB"), |
| 49 | PINCTRL_PIN(9, "CLKOUT_LPC_0"), |
| 50 | PINCTRL_PIN(10, "CLKOUT_LPC_1"), |
| 51 | PINCTRL_PIN(11, "PMEB"), |
| 52 | PINCTRL_PIN(12, "BM_BUSYB"), |
| 53 | PINCTRL_PIN(13, "SUSWARNB_SUSPWRDNACK"), |
| 54 | PINCTRL_PIN(14, "ESPI_RESETB"), |
| 55 | PINCTRL_PIN(15, "SUSACKB"), |
| 56 | PINCTRL_PIN(16, "CLKOUT_LPC_2"), |
| 57 | PINCTRL_PIN(17, "GPP_A_17"), |
| 58 | PINCTRL_PIN(18, "GPP_A_18"), |
| 59 | PINCTRL_PIN(19, "GPP_A_19"), |
| 60 | PINCTRL_PIN(20, "GPP_A_20"), |
| 61 | PINCTRL_PIN(21, "GPP_A_21"), |
| 62 | PINCTRL_PIN(22, "GPP_A_22"), |
| 63 | PINCTRL_PIN(23, "GPP_A_23"), |
| 64 | /* GPP_B */ |
| 65 | PINCTRL_PIN(24, "CORE_VID_0"), |
| 66 | PINCTRL_PIN(25, "CORE_VID_1"), |
| 67 | PINCTRL_PIN(26, "VRALERTB"), |
| 68 | PINCTRL_PIN(27, "CPU_GP_2"), |
| 69 | PINCTRL_PIN(28, "CPU_GP_3"), |
| 70 | PINCTRL_PIN(29, "SRCCLKREQB_0"), |
| 71 | PINCTRL_PIN(30, "SRCCLKREQB_1"), |
| 72 | PINCTRL_PIN(31, "SRCCLKREQB_2"), |
| 73 | PINCTRL_PIN(32, "SRCCLKREQB_3"), |
| 74 | PINCTRL_PIN(33, "SRCCLKREQB_4"), |
| 75 | PINCTRL_PIN(34, "SRCCLKREQB_5"), |
| 76 | PINCTRL_PIN(35, "GPP_B_11"), |
| 77 | PINCTRL_PIN(36, "SLP_S0B"), |
| 78 | PINCTRL_PIN(37, "PLTRSTB"), |
| 79 | PINCTRL_PIN(38, "SPKR"), |
| 80 | PINCTRL_PIN(39, "GPP_B_15"), |
| 81 | PINCTRL_PIN(40, "GPP_B_16"), |
| 82 | PINCTRL_PIN(41, "GPP_B_17"), |
| 83 | PINCTRL_PIN(42, "GPP_B_18"), |
| 84 | PINCTRL_PIN(43, "GPP_B_19"), |
| 85 | PINCTRL_PIN(44, "GPP_B_20"), |
| 86 | PINCTRL_PIN(45, "GPP_B_21"), |
| 87 | PINCTRL_PIN(46, "GPP_B_22"), |
| 88 | PINCTRL_PIN(47, "SML1ALERTB"), |
| 89 | /* GPP_F */ |
| 90 | PINCTRL_PIN(48, "SATAXPCIE_3"), |
| 91 | PINCTRL_PIN(49, "SATAXPCIE_4"), |
| 92 | PINCTRL_PIN(50, "SATAXPCIE_5"), |
| 93 | PINCTRL_PIN(51, "SATAXPCIE_6"), |
| 94 | PINCTRL_PIN(52, "SATAXPCIE_7"), |
| 95 | PINCTRL_PIN(53, "SATA_DEVSLP_3"), |
| 96 | PINCTRL_PIN(54, "SATA_DEVSLP_4"), |
| 97 | PINCTRL_PIN(55, "SATA_DEVSLP_5"), |
| 98 | PINCTRL_PIN(56, "SATA_DEVSLP_6"), |
| 99 | PINCTRL_PIN(57, "SATA_DEVSLP_7"), |
| 100 | PINCTRL_PIN(58, "SATA_SCLOCK"), |
| 101 | PINCTRL_PIN(59, "SATA_SLOAD"), |
| 102 | PINCTRL_PIN(60, "SATA_SDATAOUT1"), |
| 103 | PINCTRL_PIN(61, "SATA_SDATAOUT0"), |
| 104 | PINCTRL_PIN(62, "SSATA_LEDB"), |
| 105 | PINCTRL_PIN(63, "USB2_OCB_4"), |
| 106 | PINCTRL_PIN(64, "USB2_OCB_5"), |
| 107 | PINCTRL_PIN(65, "USB2_OCB_6"), |
| 108 | PINCTRL_PIN(66, "USB2_OCB_7"), |
| 109 | PINCTRL_PIN(67, "GBE_SMBUS_CLK"), |
| 110 | PINCTRL_PIN(68, "GBE_SMBDATA"), |
| 111 | PINCTRL_PIN(69, "GBE_SMBALRTN"), |
| 112 | PINCTRL_PIN(70, "SSATA_SCLOCK"), |
| 113 | PINCTRL_PIN(71, "SSATA_SLOAD"), |
| 114 | /* GPP_C */ |
| 115 | PINCTRL_PIN(72, "SMBCLK"), |
| 116 | PINCTRL_PIN(73, "SMBDATA"), |
| 117 | PINCTRL_PIN(74, "SMBALERTB"), |
| 118 | PINCTRL_PIN(75, "SML0CLK"), |
| 119 | PINCTRL_PIN(76, "SML0DATA"), |
| 120 | PINCTRL_PIN(77, "SML0ALERTB"), |
| 121 | PINCTRL_PIN(78, "SML1CLK"), |
| 122 | PINCTRL_PIN(79, "SML1DATA"), |
| 123 | PINCTRL_PIN(80, "GPP_C_8"), |
| 124 | PINCTRL_PIN(81, "GPP_C_9"), |
| 125 | PINCTRL_PIN(82, "GPP_C_10"), |
| 126 | PINCTRL_PIN(83, "GPP_C_11"), |
| 127 | PINCTRL_PIN(84, "GPP_C_12"), |
| 128 | PINCTRL_PIN(85, "GPP_C_13"), |
| 129 | PINCTRL_PIN(86, "GPP_C_14"), |
| 130 | PINCTRL_PIN(87, "GPP_C_15"), |
| 131 | PINCTRL_PIN(88, "GPP_C_16"), |
| 132 | PINCTRL_PIN(89, "GPP_C_17"), |
| 133 | PINCTRL_PIN(90, "GPP_C_18"), |
| 134 | PINCTRL_PIN(91, "GPP_C_19"), |
| 135 | PINCTRL_PIN(92, "GPP_C_20"), |
| 136 | PINCTRL_PIN(93, "GPP_C_21"), |
| 137 | PINCTRL_PIN(94, "GPP_C_22"), |
| 138 | PINCTRL_PIN(95, "GPP_C_23"), |
| 139 | /* GPP_D */ |
| 140 | PINCTRL_PIN(96, "GPP_D_0"), |
| 141 | PINCTRL_PIN(97, "GPP_D_1"), |
| 142 | PINCTRL_PIN(98, "GPP_D_2"), |
| 143 | PINCTRL_PIN(99, "GPP_D_3"), |
| 144 | PINCTRL_PIN(100, "GPP_D_4"), |
| 145 | PINCTRL_PIN(101, "SSP0_SFRM"), |
| 146 | PINCTRL_PIN(102, "SSP0_TXD"), |
| 147 | PINCTRL_PIN(103, "SSP0_RXD"), |
| 148 | PINCTRL_PIN(104, "SSP0_SCLK"), |
| 149 | PINCTRL_PIN(105, "SSATA_DEVSLP_3"), |
| 150 | PINCTRL_PIN(106, "SSATA_DEVSLP_4"), |
| 151 | PINCTRL_PIN(107, "SSATA_DEVSLP_5"), |
| 152 | PINCTRL_PIN(108, "SSATA_SDATAOUT1"), |
| 153 | PINCTRL_PIN(109, "SML0BCLK_SML0BCLKIE"), |
| 154 | PINCTRL_PIN(110, "SML0BDATA_SML0BDATAIE"), |
| 155 | PINCTRL_PIN(111, "SSATA_SDATAOUT0"), |
| 156 | PINCTRL_PIN(112, "SML0BALERTB_SML0BALERTBIE"), |
| 157 | PINCTRL_PIN(113, "DMIC_CLK_1"), |
| 158 | PINCTRL_PIN(114, "DMIC_DATA_1"), |
| 159 | PINCTRL_PIN(115, "DMIC_CLK_0"), |
| 160 | PINCTRL_PIN(116, "DMIC_DATA_0"), |
| 161 | PINCTRL_PIN(117, "IE_UART_RXD"), |
| 162 | PINCTRL_PIN(118, "IE_UART_TXD"), |
| 163 | PINCTRL_PIN(119, "GPP_D_23"), |
| 164 | /* GPP_E */ |
| 165 | PINCTRL_PIN(120, "SATAXPCIE_0"), |
| 166 | PINCTRL_PIN(121, "SATAXPCIE_1"), |
| 167 | PINCTRL_PIN(122, "SATAXPCIE_2"), |
| 168 | PINCTRL_PIN(123, "CPU_GP_0"), |
| 169 | PINCTRL_PIN(124, "SATA_DEVSLP_0"), |
| 170 | PINCTRL_PIN(125, "SATA_DEVSLP_1"), |
| 171 | PINCTRL_PIN(126, "SATA_DEVSLP_2"), |
| 172 | PINCTRL_PIN(127, "CPU_GP_1"), |
| 173 | PINCTRL_PIN(128, "SATA_LEDB"), |
| 174 | PINCTRL_PIN(129, "USB2_OCB_0"), |
| 175 | PINCTRL_PIN(130, "USB2_OCB_1"), |
| 176 | PINCTRL_PIN(131, "USB2_OCB_2"), |
| 177 | PINCTRL_PIN(132, "USB2_OCB_3"), |
| 178 | /* GPP_I */ |
| 179 | PINCTRL_PIN(133, "GBE_TDO"), |
| 180 | PINCTRL_PIN(134, "GBE_TCK"), |
| 181 | PINCTRL_PIN(135, "GBE_TMS"), |
| 182 | PINCTRL_PIN(136, "GBE_TDI"), |
| 183 | PINCTRL_PIN(137, "DO_RESET_INB"), |
| 184 | PINCTRL_PIN(138, "DO_RESET_OUTB"), |
| 185 | PINCTRL_PIN(139, "RESET_DONE"), |
| 186 | PINCTRL_PIN(140, "GBE_TRST_N"), |
| 187 | PINCTRL_PIN(141, "GBE_PCI_DIS"), |
| 188 | PINCTRL_PIN(142, "GBE_LAN_DIS"), |
| 189 | PINCTRL_PIN(143, "GPP_I_10"), |
| 190 | /* GPP_J */ |
| 191 | PINCTRL_PIN(144, "GBE_LED_0_0"), |
| 192 | PINCTRL_PIN(145, "GBE_LED_0_1"), |
| 193 | PINCTRL_PIN(146, "GBE_LED_1_0"), |
| 194 | PINCTRL_PIN(147, "GBE_LED_1_1"), |
| 195 | PINCTRL_PIN(148, "GBE_LED_2_0"), |
| 196 | PINCTRL_PIN(149, "GBE_LED_2_1"), |
| 197 | PINCTRL_PIN(150, "GBE_LED_3_0"), |
| 198 | PINCTRL_PIN(151, "GBE_LED_3_1"), |
| 199 | PINCTRL_PIN(152, "GBE_SCL_0"), |
| 200 | PINCTRL_PIN(153, "GBE_SDA_0"), |
| 201 | PINCTRL_PIN(154, "GBE_SCL_1"), |
| 202 | PINCTRL_PIN(155, "GBE_SDA_1"), |
| 203 | PINCTRL_PIN(156, "GBE_SCL_2"), |
| 204 | PINCTRL_PIN(157, "GBE_SDA_2"), |
| 205 | PINCTRL_PIN(158, "GBE_SCL_3"), |
| 206 | PINCTRL_PIN(159, "GBE_SDA_3"), |
| 207 | PINCTRL_PIN(160, "GBE_SDP_0_0"), |
| 208 | PINCTRL_PIN(161, "GBE_SDP_0_1"), |
| 209 | PINCTRL_PIN(162, "GBE_SDP_1_0"), |
| 210 | PINCTRL_PIN(163, "GBE_SDP_1_1"), |
| 211 | PINCTRL_PIN(164, "GBE_SDP_2_0"), |
| 212 | PINCTRL_PIN(165, "GBE_SDP_2_1"), |
| 213 | PINCTRL_PIN(166, "GBE_SDP_3_0"), |
| 214 | PINCTRL_PIN(167, "GBE_SDP_3_1"), |
| 215 | /* GPP_K */ |
| 216 | PINCTRL_PIN(168, "GBE_RMIICLK"), |
| 217 | PINCTRL_PIN(169, "GBE_RMII_RXD_0"), |
| 218 | PINCTRL_PIN(170, "GBE_RMII_RXD_1"), |
| 219 | PINCTRL_PIN(171, "GBE_RMII_CRS_DV"), |
| 220 | PINCTRL_PIN(172, "GBE_RMII_TX_EN"), |
| 221 | PINCTRL_PIN(173, "GBE_RMII_TXD_0"), |
| 222 | PINCTRL_PIN(174, "GBE_RMII_TXD_1"), |
| 223 | PINCTRL_PIN(175, "GBE_RMII_RX_ER"), |
| 224 | PINCTRL_PIN(176, "GBE_RMII_ARBIN"), |
| 225 | PINCTRL_PIN(177, "GBE_RMII_ARB_OUT"), |
| 226 | PINCTRL_PIN(178, "PE_RST_N"), |
| 227 | /* GPP_G */ |
| 228 | PINCTRL_PIN(179, "FAN_TACH_0"), |
| 229 | PINCTRL_PIN(180, "FAN_TACH_1"), |
| 230 | PINCTRL_PIN(181, "FAN_TACH_2"), |
| 231 | PINCTRL_PIN(182, "FAN_TACH_3"), |
| 232 | PINCTRL_PIN(183, "FAN_TACH_4"), |
| 233 | PINCTRL_PIN(184, "FAN_TACH_5"), |
| 234 | PINCTRL_PIN(185, "FAN_TACH_6"), |
| 235 | PINCTRL_PIN(186, "FAN_TACH_7"), |
| 236 | PINCTRL_PIN(187, "FAN_PWM_0"), |
| 237 | PINCTRL_PIN(188, "FAN_PWM_1"), |
| 238 | PINCTRL_PIN(189, "FAN_PWM_2"), |
| 239 | PINCTRL_PIN(190, "FAN_PWM_3"), |
| 240 | PINCTRL_PIN(191, "GSXDOUT"), |
| 241 | PINCTRL_PIN(192, "GSXSLOAD"), |
| 242 | PINCTRL_PIN(193, "GSXDIN"), |
| 243 | PINCTRL_PIN(194, "GSXSRESETB"), |
| 244 | PINCTRL_PIN(195, "GSXCLK"), |
| 245 | PINCTRL_PIN(196, "ADR_COMPLETE"), |
| 246 | PINCTRL_PIN(197, "NMIB"), |
| 247 | PINCTRL_PIN(198, "SMIB"), |
| 248 | PINCTRL_PIN(199, "SSATA_DEVSLP_0"), |
| 249 | PINCTRL_PIN(200, "SSATA_DEVSLP_1"), |
| 250 | PINCTRL_PIN(201, "SSATA_DEVSLP_2"), |
| 251 | PINCTRL_PIN(202, "SSATAXPCIE0_SSATAGP0"), |
| 252 | /* GPP_H */ |
| 253 | PINCTRL_PIN(203, "SRCCLKREQB_6"), |
| 254 | PINCTRL_PIN(204, "SRCCLKREQB_7"), |
| 255 | PINCTRL_PIN(205, "SRCCLKREQB_8"), |
| 256 | PINCTRL_PIN(206, "SRCCLKREQB_9"), |
| 257 | PINCTRL_PIN(207, "SRCCLKREQB_10"), |
| 258 | PINCTRL_PIN(208, "SRCCLKREQB_11"), |
| 259 | PINCTRL_PIN(209, "SRCCLKREQB_12"), |
| 260 | PINCTRL_PIN(210, "SRCCLKREQB_13"), |
| 261 | PINCTRL_PIN(211, "SRCCLKREQB_14"), |
| 262 | PINCTRL_PIN(212, "SRCCLKREQB_15"), |
| 263 | PINCTRL_PIN(213, "SML2CLK"), |
| 264 | PINCTRL_PIN(214, "SML2DATA"), |
| 265 | PINCTRL_PIN(215, "SML2ALERTB"), |
| 266 | PINCTRL_PIN(216, "SML3CLK"), |
| 267 | PINCTRL_PIN(217, "SML3DATA"), |
| 268 | PINCTRL_PIN(218, "SML3ALERTB"), |
| 269 | PINCTRL_PIN(219, "SML4CLK"), |
| 270 | PINCTRL_PIN(220, "SML4DATA"), |
| 271 | PINCTRL_PIN(221, "SML4ALERTB"), |
| 272 | PINCTRL_PIN(222, "SSATAXPCIE1_SSATAGP1"), |
| 273 | PINCTRL_PIN(223, "SSATAXPCIE2_SSATAGP2"), |
| 274 | PINCTRL_PIN(224, "SSATAXPCIE3_SSATAGP3"), |
| 275 | PINCTRL_PIN(225, "SSATAXPCIE4_SSATAGP4"), |
| 276 | PINCTRL_PIN(226, "SSATAXPCIE5_SSATAGP5"), |
| 277 | /* GPP_L */ |
| 278 | PINCTRL_PIN(227, "GPP_L_0"), |
| 279 | PINCTRL_PIN(228, "EC_CSME_INTR_OUT"), |
| 280 | PINCTRL_PIN(229, "VISA2CH0_D0"), |
| 281 | PINCTRL_PIN(230, "VISA2CH0_D1"), |
| 282 | PINCTRL_PIN(231, "VISA2CH0_D2"), |
| 283 | PINCTRL_PIN(232, "VISA2CH0_D3"), |
| 284 | PINCTRL_PIN(233, "VISA2CH0_D4"), |
| 285 | PINCTRL_PIN(234, "VISA2CH0_D5"), |
| 286 | PINCTRL_PIN(235, "VISA2CH0_D6"), |
| 287 | PINCTRL_PIN(236, "VISA2CH0_D7"), |
| 288 | PINCTRL_PIN(237, "VISA2CH0_CLK"), |
| 289 | PINCTRL_PIN(238, "VISA2CH1_D0"), |
| 290 | PINCTRL_PIN(239, "VISA2CH1_D1"), |
| 291 | PINCTRL_PIN(240, "VISA2CH1_D2"), |
| 292 | PINCTRL_PIN(241, "VISA2CH1_D3"), |
| 293 | PINCTRL_PIN(242, "VISA2CH1_D4"), |
| 294 | PINCTRL_PIN(243, "VISA2CH1_D5"), |
| 295 | PINCTRL_PIN(244, "VISA2CH1_D6"), |
| 296 | PINCTRL_PIN(245, "VISA2CH1_D7"), |
| 297 | PINCTRL_PIN(246, "VISA2CH1_CLK"), |
| 298 | }; |
| 299 | |
| 300 | static const struct intel_community lbg_communities[] = { |
| 301 | LBG_COMMUNITY(0, 0, 71), |
| 302 | LBG_COMMUNITY(1, 72, 132), |
| 303 | LBG_COMMUNITY(3, 133, 144), |
| 304 | LBG_COMMUNITY(4, 145, 180), |
| 305 | LBG_COMMUNITY(5, 181, 246), |
| 306 | }; |
| 307 | |
| 308 | static const struct intel_pinctrl_soc_data lbg_soc_data = { |
| 309 | .pins = lbg_pins, |
| 310 | .npins = ARRAY_SIZE(lbg_pins), |
| 311 | .communities = lbg_communities, |
| 312 | .ncommunities = ARRAY_SIZE(lbg_communities), |
| 313 | }; |
| 314 | |
| 315 | static int lbg_pinctrl_probe(struct platform_device *pdev) |
| 316 | { |
| 317 | return intel_pinctrl_probe(pdev, &lbg_soc_data); |
| 318 | } |
| 319 | |
| 320 | static const struct dev_pm_ops lbg_pinctrl_pm_ops = { |
| 321 | SET_LATE_SYSTEM_SLEEP_PM_OPS(intel_pinctrl_suspend, |
| 322 | intel_pinctrl_resume) |
| 323 | }; |
| 324 | |
| 325 | static const struct acpi_device_id lbg_pinctrl_acpi_match[] = { |
| 326 | { "INT3536" }, |
| 327 | { } |
| 328 | }; |
| 329 | MODULE_DEVICE_TABLE(acpi, lbg_pinctrl_acpi_match); |
| 330 | |
| 331 | static struct platform_driver lbg_pinctrl_driver = { |
| 332 | .probe = lbg_pinctrl_probe, |
| 333 | .driver = { |
| 334 | .name = "lewisburg-pinctrl", |
| 335 | .acpi_match_table = lbg_pinctrl_acpi_match, |
| 336 | .pm = &lbg_pinctrl_pm_ops, |
| 337 | }, |
| 338 | }; |
| 339 | |
| 340 | module_platform_driver(lbg_pinctrl_driver); |
| 341 | |
| 342 | MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>"); |
| 343 | MODULE_DESCRIPTION("Intel Lewisburg pinctrl/GPIO driver"); |
| 344 | MODULE_LICENSE("GPL v2"); |