rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2018 MediaTek Inc. |
| 4 | * |
| 5 | * Author: Sean Wang <sean.wang@mediatek.com> |
| 6 | * |
| 7 | */ |
| 8 | |
| 9 | #ifndef __PINCTRL_MTK_COMMON_V2_H |
| 10 | #define __PINCTRL_MTK_COMMON_V2_H |
| 11 | |
| 12 | #include <linux/gpio/driver.h> |
| 13 | |
| 14 | #define MTK_INPUT 0 |
| 15 | #define MTK_OUTPUT 1 |
| 16 | #define MTK_DISABLE 0 |
| 17 | #define MTK_ENABLE 1 |
| 18 | #define MTK_PULLDOWN 0 |
| 19 | #define MTK_PULLUP 1 |
| 20 | |
| 21 | #define EINT_NA U16_MAX |
| 22 | #define NO_EINT_SUPPORT EINT_NA |
| 23 | #define EINT_NO_GPIO 9999 |
| 24 | |
| 25 | #define PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, \ |
| 26 | _s_bit, _x_bits, _sz_reg, _fixed) { \ |
| 27 | .s_pin = _s_pin, \ |
| 28 | .e_pin = _e_pin, \ |
| 29 | .i_base = _i_base, \ |
| 30 | .s_addr = _s_addr, \ |
| 31 | .x_addrs = _x_addrs, \ |
| 32 | .s_bit = _s_bit, \ |
| 33 | .x_bits = _x_bits, \ |
| 34 | .sz_reg = _sz_reg, \ |
| 35 | .fixed = _fixed, \ |
| 36 | } |
| 37 | |
| 38 | #define PIN_FIELD(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ |
| 39 | PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ |
| 40 | _x_bits, 32, 0) |
| 41 | |
| 42 | #define PINS_FIELD(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ |
| 43 | PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ |
| 44 | _x_bits, 32, 1) |
| 45 | |
| 46 | /* List these attributes which could be modified for the pin */ |
| 47 | enum { |
| 48 | PINCTRL_PIN_REG_MODE, |
| 49 | PINCTRL_PIN_REG_DIR, |
| 50 | PINCTRL_PIN_REG_DI, |
| 51 | PINCTRL_PIN_REG_DO, |
| 52 | PINCTRL_PIN_REG_SR, |
| 53 | PINCTRL_PIN_REG_SMT, |
| 54 | PINCTRL_PIN_REG_PD, |
| 55 | PINCTRL_PIN_REG_PU, |
| 56 | PINCTRL_PIN_REG_E4, |
| 57 | PINCTRL_PIN_REG_E8, |
| 58 | PINCTRL_PIN_REG_TDSEL, |
| 59 | PINCTRL_PIN_REG_RDSEL, |
| 60 | PINCTRL_PIN_REG_DRV, |
| 61 | PINCTRL_PIN_REG_PUPD, |
| 62 | PINCTRL_PIN_REG_R0, |
| 63 | PINCTRL_PIN_REG_R1, |
| 64 | PINCTRL_PIN_REG_IES, |
| 65 | PINCTRL_PIN_REG_PULLEN, |
| 66 | PINCTRL_PIN_REG_PULLSEL, |
| 67 | PINCTRL_PIN_REG_MAX, |
| 68 | }; |
| 69 | |
| 70 | /* Group the pins by the driving current */ |
| 71 | enum { |
| 72 | DRV_FIXED, |
| 73 | DRV_GRP0, |
| 74 | DRV_GRP1, |
| 75 | DRV_GRP2, |
| 76 | DRV_GRP3, |
| 77 | DRV_GRP4, |
| 78 | DRV_GRP_MAX, |
| 79 | }; |
| 80 | |
| 81 | static const char * const mtk_default_register_base_names[] = { |
| 82 | "base", |
| 83 | }; |
| 84 | |
| 85 | /* struct mtk_pin_field - the structure that holds the information of the field |
| 86 | * used to describe the attribute for the pin |
| 87 | * @base: the index pointing to the entry in base address list |
| 88 | * @offset: the register offset relative to the base address |
| 89 | * @mask: the mask used to filter out the field from the register |
| 90 | * @bitpos: the start bit relative to the register |
| 91 | * @next: the indication that the field would be extended to the |
| 92 | next register |
| 93 | */ |
| 94 | struct mtk_pin_field { |
| 95 | u8 index; |
| 96 | u32 offset; |
| 97 | u32 mask; |
| 98 | u8 bitpos; |
| 99 | u8 next; |
| 100 | }; |
| 101 | |
| 102 | /* struct mtk_pin_field_calc - the structure that holds the range providing |
| 103 | * the guide used to look up the relevant field |
| 104 | * @s_pin: the start pin within the range |
| 105 | * @e_pin: the end pin within the range |
| 106 | * @i_base: the index pointing to the entry in base address list |
| 107 | * @s_addr: the start address for the range |
| 108 | * @x_addrs: the address distance between two consecutive registers |
| 109 | * within the range |
| 110 | * @s_bit: the start bit for the first register within the range |
| 111 | * @x_bits: the bit distance between two consecutive pins within |
| 112 | * the range |
| 113 | * @sz_reg: the size of bits in a register |
| 114 | * @fixed: the consecutive pins share the same bits with the 1st |
| 115 | * pin |
| 116 | */ |
| 117 | struct mtk_pin_field_calc { |
| 118 | u16 s_pin; |
| 119 | u16 e_pin; |
| 120 | u8 i_base; |
| 121 | u32 s_addr; |
| 122 | u8 x_addrs; |
| 123 | u8 s_bit; |
| 124 | u8 x_bits; |
| 125 | u8 sz_reg; |
| 126 | u8 fixed; |
| 127 | }; |
| 128 | |
| 129 | /* struct mtk_pin_reg_calc - the structure that holds all ranges used to |
| 130 | * determine which register the pin would make use of |
| 131 | * for certain pin attribute. |
| 132 | * @range: the start address for the range |
| 133 | * @nranges: the number of items in the range |
| 134 | */ |
| 135 | struct mtk_pin_reg_calc { |
| 136 | const struct mtk_pin_field_calc *range; |
| 137 | unsigned int nranges; |
| 138 | }; |
| 139 | |
| 140 | /** |
| 141 | * struct mtk_func_desc - the structure that providing information |
| 142 | * all the funcs for this pin |
| 143 | * @name: the name of function |
| 144 | * @muxval: the mux to the function |
| 145 | */ |
| 146 | struct mtk_func_desc { |
| 147 | const char *name; |
| 148 | u8 muxval; |
| 149 | }; |
| 150 | |
| 151 | /** |
| 152 | * struct mtk_eint_desc - the structure that providing information |
| 153 | * for eint data per pin |
| 154 | * @eint_m: the eint mux for this pin |
| 155 | * @eitn_n: the eint number for this pin |
| 156 | */ |
| 157 | struct mtk_eint_desc { |
| 158 | u16 eint_m; |
| 159 | u16 eint_n; |
| 160 | }; |
| 161 | |
| 162 | /** |
| 163 | * struct mtk_pin_desc - the structure that providing information |
| 164 | * for each pin of chips |
| 165 | * @number: unique pin number from the global pin number space |
| 166 | * @name: name for this pin |
| 167 | * @eint: the eint data for this pin |
| 168 | * @drv_n: the index with the driving group |
| 169 | * @funcs: all available functions for this pins (only used in |
| 170 | * those drivers compatible to pinctrl-mtk-common.c-like |
| 171 | * ones) |
| 172 | */ |
| 173 | struct mtk_pin_desc { |
| 174 | unsigned int number; |
| 175 | const char *name; |
| 176 | struct mtk_eint_desc eint; |
| 177 | u8 drv_n; |
| 178 | struct mtk_func_desc *funcs; |
| 179 | }; |
| 180 | |
| 181 | struct mtk_pinctrl_group { |
| 182 | const char *name; |
| 183 | unsigned long config; |
| 184 | unsigned int pin; |
| 185 | }; |
| 186 | |
| 187 | struct mtk_pinctrl; |
| 188 | |
| 189 | /* struct mtk_pin_soc - the structure that holds SoC-specific data */ |
| 190 | struct mtk_pin_soc { |
| 191 | const struct mtk_pin_reg_calc *reg_cal; |
| 192 | const struct mtk_pin_desc *pins; |
| 193 | unsigned int npins; |
| 194 | const struct group_desc *grps; |
| 195 | unsigned int ngrps; |
| 196 | const struct function_desc *funcs; |
| 197 | unsigned int nfuncs; |
| 198 | const struct mtk_eint_regs *eint_regs; |
| 199 | const struct mtk_eint_hw *eint_hw; |
| 200 | #ifdef CONFIG_PINCTRL_MTK_DEBUG |
| 201 | const struct pin_bi_dir_mapping *pins_dir; |
| 202 | unsigned int npins_dir; |
| 203 | #endif |
| 204 | |
| 205 | /* Specific parameters per SoC */ |
| 206 | u8 gpio_m; |
| 207 | bool ies_present; |
| 208 | const char * const *base_names; |
| 209 | unsigned int nbase_names; |
| 210 | |
| 211 | /* Specific pinconfig operations */ |
| 212 | int (*bias_disable_set)(struct mtk_pinctrl *hw, |
| 213 | const struct mtk_pin_desc *desc); |
| 214 | int (*bias_disable_get)(struct mtk_pinctrl *hw, |
| 215 | const struct mtk_pin_desc *desc, int *res); |
| 216 | int (*bias_set)(struct mtk_pinctrl *hw, |
| 217 | const struct mtk_pin_desc *desc, bool pullup); |
| 218 | int (*bias_get)(struct mtk_pinctrl *hw, |
| 219 | const struct mtk_pin_desc *desc, bool pullup, int *res); |
| 220 | |
| 221 | int (*drive_set)(struct mtk_pinctrl *hw, |
| 222 | const struct mtk_pin_desc *desc, u32 arg); |
| 223 | int (*drive_get)(struct mtk_pinctrl *hw, |
| 224 | const struct mtk_pin_desc *desc, int *val); |
| 225 | |
| 226 | int (*adv_pull_set)(struct mtk_pinctrl *hw, |
| 227 | const struct mtk_pin_desc *desc, bool pullup, |
| 228 | u32 arg); |
| 229 | int (*adv_pull_get)(struct mtk_pinctrl *hw, |
| 230 | const struct mtk_pin_desc *desc, bool pullup, |
| 231 | u32 *val); |
| 232 | |
| 233 | /* Specific driver data */ |
| 234 | void *driver_data; |
| 235 | }; |
| 236 | |
| 237 | struct mtk_pinctrl { |
| 238 | struct pinctrl_dev *pctrl; |
| 239 | void __iomem **base; |
| 240 | u8 nbase; |
| 241 | struct device *dev; |
| 242 | struct gpio_chip chip; |
| 243 | const struct mtk_pin_soc *soc; |
| 244 | struct mtk_eint *eint; |
| 245 | struct mtk_pinctrl_group *groups; |
| 246 | const char **grp_names; |
| 247 | }; |
| 248 | |
| 249 | #ifdef CONFIG_PINCTRL_MTK_DEBUG |
| 250 | struct pin_bi_dir_mapping { |
| 251 | char *pinmux_func; |
| 252 | int dir_at_suspend; |
| 253 | }; |
| 254 | #endif |
| 255 | |
| 256 | void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set); |
| 257 | |
| 258 | int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, |
| 259 | int field, int value); |
| 260 | int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, |
| 261 | int field, int *value); |
| 262 | |
| 263 | int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev); |
| 264 | |
| 265 | int mtk_pinconf_bias_disable_set(struct mtk_pinctrl *hw, |
| 266 | const struct mtk_pin_desc *desc); |
| 267 | int mtk_pinconf_bias_disable_get(struct mtk_pinctrl *hw, |
| 268 | const struct mtk_pin_desc *desc, int *res); |
| 269 | int mtk_pinconf_bias_set(struct mtk_pinctrl *hw, |
| 270 | const struct mtk_pin_desc *desc, bool pullup); |
| 271 | int mtk_pinconf_bias_get(struct mtk_pinctrl *hw, |
| 272 | const struct mtk_pin_desc *desc, bool pullup, |
| 273 | int *res); |
| 274 | |
| 275 | int mtk_pinconf_bias_disable_set_rev1(struct mtk_pinctrl *hw, |
| 276 | const struct mtk_pin_desc *desc); |
| 277 | int mtk_pinconf_bias_disable_get_rev1(struct mtk_pinctrl *hw, |
| 278 | const struct mtk_pin_desc *desc, |
| 279 | int *res); |
| 280 | int mtk_pinconf_bias_set_rev1(struct mtk_pinctrl *hw, |
| 281 | const struct mtk_pin_desc *desc, bool pullup); |
| 282 | int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw, |
| 283 | const struct mtk_pin_desc *desc, bool pullup, |
| 284 | int *res); |
| 285 | |
| 286 | int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, |
| 287 | const struct mtk_pin_desc *desc, u32 arg); |
| 288 | int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, |
| 289 | const struct mtk_pin_desc *desc, int *val); |
| 290 | |
| 291 | int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, |
| 292 | const struct mtk_pin_desc *desc, u32 arg); |
| 293 | int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, |
| 294 | const struct mtk_pin_desc *desc, int *val); |
| 295 | |
| 296 | int mtk_pinconf_drive_set_direct_val(struct mtk_pinctrl *hw, |
| 297 | const struct mtk_pin_desc *desc, u32 arg); |
| 298 | int mtk_pinconf_drive_get_direct_val(struct mtk_pinctrl *hw, |
| 299 | const struct mtk_pin_desc *desc, int *val); |
| 300 | |
| 301 | int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw, |
| 302 | const struct mtk_pin_desc *desc, bool pullup, |
| 303 | u32 arg); |
| 304 | int mtk_pinconf_adv_pull_get(struct mtk_pinctrl *hw, |
| 305 | const struct mtk_pin_desc *desc, bool pullup, |
| 306 | u32 *val); |
| 307 | |
| 308 | int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, |
| 309 | const struct mtk_pin_desc *desc, |
| 310 | u32 pullup, u32 enable); |
| 311 | |
| 312 | int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, |
| 313 | const struct mtk_pin_desc *desc, |
| 314 | u32 *pullup, u32 *enable); |
| 315 | |
| 316 | #endif /* __PINCTRL_MTK_COMMON_V2_H */ |