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rjw1f884582022-01-06 17:20:42 +08001/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
48#include <linux/rwsem.h>
49#include <linux/workqueue.h>
50#include <linux/errno.h>
51#include <linux/types.h>
52#include <linux/wait.h>
53#include <linux/bitops.h>
54#include <linux/pm_runtime.h>
55#include <linux/clk.h>
56#include <linux/completion.h>
57#include <linux/regulator/consumer.h>
58#include "unipro.h"
59
60#include <asm/irq.h>
61#include <asm/byteorder.h>
62#include <scsi/scsi.h>
63#include <scsi/scsi_cmnd.h>
64#include <scsi/scsi_host.h>
65#include <scsi/scsi_tcq.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
68
69#include "ufs.h"
70#include "ufshci.h"
71
72#define UFSHCD "ufshcd"
73#define UFSHCD_DRIVER_VERSION "0.2"
74
75struct ufs_hba;
76
77enum dev_cmd_type {
78 DEV_CMD_TYPE_NOP = 0x0,
79 DEV_CMD_TYPE_QUERY = 0x1,
80};
81
82/**
83 * struct uic_command - UIC command structure
84 * @command: UIC command
85 * @argument1: UIC command argument 1
86 * @argument2: UIC command argument 2
87 * @argument3: UIC command argument 3
88 * @cmd_active: Indicate if UIC command is outstanding
89 * @result: UIC command result
90 * @done: UIC command completion
91 */
92struct uic_command {
93 u32 command;
94 u32 argument1;
95 u32 argument2;
96 u32 argument3;
97 int cmd_active;
98 int result;
99 struct completion done;
100};
101
102/* Used to differentiate the power management options */
103enum ufs_pm_op {
104 UFS_RUNTIME_PM,
105 UFS_SYSTEM_PM,
106 UFS_SHUTDOWN_PM,
107};
108
109#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
110#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
111#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
112
113/* Host <-> Device UniPro Link state */
114enum uic_link_state {
115 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
116 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
117 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
118};
119
120#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 UIC_LINK_ACTIVE_STATE)
123#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 UIC_LINK_HIBERN8_STATE)
125#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
126#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
127 UIC_LINK_ACTIVE_STATE)
128#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
129 UIC_LINK_HIBERN8_STATE)
130
131/*
132 * UFS Power management levels.
133 * Each level is in increasing order of power savings.
134 */
135enum ufs_pm_level {
136 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
139 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
141 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
142 UFS_PM_LVL_MAX
143};
144
145struct ufs_pm_lvl_states {
146 enum ufs_dev_pwr_mode dev_state;
147 enum uic_link_state link_state;
148};
149
150/**
151 * struct ufshcd_lrb - local reference block
152 * @utr_descriptor_ptr: UTRD address of the command
153 * @ucd_req_ptr: UCD address of the command
154 * @ucd_rsp_ptr: Response UPIU address for this command
155 * @ucd_prdt_ptr: PRDT address of the command
156 * @utrd_dma_addr: UTRD dma address for debug
157 * @ucd_prdt_dma_addr: PRDT dma address for debug
158 * @ucd_rsp_dma_addr: UPIU response dma address for debug
159 * @ucd_req_dma_addr: UPIU request dma address for debug
160 * @cmd: pointer to SCSI command
161 * @sense_buffer: pointer to sense buffer address of the SCSI command
162 * @sense_bufflen: Length of the sense buffer
163 * @scsi_status: SCSI status of the command
164 * @command_type: SCSI, UFS, Query.
165 * @task_tag: Task tag of the command
166 * @lun: LUN of the command
167 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
168 * @issue_time_stamp: time stamp for debug purposes
169 * @req_abort_skip: skip request abort task flag
170 */
171struct ufshcd_lrb {
172 struct utp_transfer_req_desc *utr_descriptor_ptr;
173 struct utp_upiu_req *ucd_req_ptr;
174 struct utp_upiu_rsp *ucd_rsp_ptr;
175 struct ufshcd_sg_entry *ucd_prdt_ptr;
176
177 dma_addr_t utrd_dma_addr;
178 dma_addr_t ucd_req_dma_addr;
179 dma_addr_t ucd_rsp_dma_addr;
180 dma_addr_t ucd_prdt_dma_addr;
181
182 struct scsi_cmnd *cmd;
183 u8 *sense_buffer;
184 unsigned int sense_bufflen;
185 int scsi_status;
186
187 int command_type;
188 int task_tag;
189 u8 lun; /* UPIU LUN id field is only 8-bit wide */
190 bool intr_cmd;
191 ktime_t issue_time_stamp;
192
193 bool req_abort_skip;
194};
195
196/**
197 * struct ufs_query - holds relevant data structures for query request
198 * @request: request upiu and function
199 * @descriptor: buffer for sending/receiving descriptor
200 * @response: response upiu and response
201 */
202struct ufs_query {
203 struct ufs_query_req request;
204 u8 *descriptor;
205 struct ufs_query_res response;
206};
207
208/**
209 * struct ufs_dev_cmd - all assosiated fields with device management commands
210 * @type: device management command type - Query, NOP OUT
211 * @lock: lock to allow one command at a time
212 * @complete: internal commands completion
213 * @tag_wq: wait queue until free command slot is available
214 */
215struct ufs_dev_cmd {
216 enum dev_cmd_type type;
217 struct mutex lock;
218 struct completion *complete;
219 wait_queue_head_t tag_wq;
220 struct ufs_query query;
221};
222
223struct ufs_desc_size {
224 int dev_desc;
225 int pwr_desc;
226 int geom_desc;
227 int interc_desc;
228 int unit_desc;
229 int conf_desc;
230};
231
232/**
233 * struct ufs_clk_info - UFS clock related info
234 * @list: list headed by hba->clk_list_head
235 * @clk: clock node
236 * @name: clock name
237 * @max_freq: maximum frequency supported by the clock
238 * @min_freq: min frequency that can be used for clock scaling
239 * @curr_freq: indicates the current frequency that it is set to
240 * @enabled: variable to check against multiple enable/disable
241 */
242struct ufs_clk_info {
243 struct list_head list;
244 struct clk *clk;
245 const char *name;
246 u32 max_freq;
247 u32 min_freq;
248 u32 curr_freq;
249 bool enabled;
250};
251
252enum ufs_notify_change_status {
253 PRE_CHANGE,
254 POST_CHANGE,
255};
256
257struct ufs_pa_layer_attr {
258 u32 gear_rx;
259 u32 gear_tx;
260 u32 lane_rx;
261 u32 lane_tx;
262 u32 pwr_rx;
263 u32 pwr_tx;
264 u32 hs_rate;
265};
266
267struct ufs_pwr_mode_info {
268 bool is_valid;
269 struct ufs_pa_layer_attr info;
270};
271
272/**
273 * struct ufs_hba_variant_ops - variant specific callbacks
274 * @name: variant name
275 * @init: called when the driver is initialized
276 * @exit: called to cleanup everything done in init
277 * @get_ufs_hci_version: called to get UFS HCI version
278 * @clk_scale_notify: notifies that clks are scaled up/down
279 * @setup_clocks: called before touching any of the controller registers
280 * @setup_regulators: called before accessing the host controller
281 * @hce_enable_notify: called before and after HCE enable bit is set to allow
282 * variant specific Uni-Pro initialization.
283 * @link_startup_notify: called before and after Link startup is carried out
284 * to allow variant specific Uni-Pro initialization.
285 * @pwr_change_notify: called before and after a power mode change
286 * is carried out to allow vendor spesific capabilities
287 * to be set.
288 * @setup_xfer_req: called before any transfer request is issued
289 * to set some things
290 * @setup_task_mgmt: called before any task management request is issued
291 * to set some things
292 * @hibern8_notify: called around hibern8 enter/exit
293 * @apply_dev_quirks: called to apply device specific quirks
294 * @suspend: called during host controller PM callback
295 * @resume: called during host controller PM callback
296 * @dbg_register_dump: used to dump controller debug information
297 * @phy_initialization: used to initialize phys
298 */
299struct ufs_hba_variant_ops {
300 const char *name;
301 int (*init)(struct ufs_hba *);
302 void (*exit)(struct ufs_hba *);
303 u32 (*get_ufs_hci_version)(struct ufs_hba *);
304 int (*clk_scale_notify)(struct ufs_hba *, bool,
305 enum ufs_notify_change_status);
306 int (*setup_clocks)(struct ufs_hba *, bool,
307 enum ufs_notify_change_status);
308 int (*setup_regulators)(struct ufs_hba *, bool);
309 int (*hce_enable_notify)(struct ufs_hba *,
310 enum ufs_notify_change_status);
311 int (*link_startup_notify)(struct ufs_hba *,
312 enum ufs_notify_change_status);
313 int (*pwr_change_notify)(struct ufs_hba *,
314 enum ufs_notify_change_status status,
315 struct ufs_pa_layer_attr *,
316 struct ufs_pa_layer_attr *);
317 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
318 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
319 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
320 enum ufs_notify_change_status);
321 int (*apply_dev_quirks)(struct ufs_hba *);
322 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
323 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
324 void (*dbg_register_dump)(struct ufs_hba *hba);
325 int (*phy_initialization)(struct ufs_hba *);
326};
327
328/* clock gating state */
329enum clk_gating_state {
330 CLKS_OFF,
331 CLKS_ON,
332 REQ_CLKS_OFF,
333 REQ_CLKS_ON,
334};
335
336/**
337 * struct ufs_clk_gating - UFS clock gating related info
338 * @gate_work: worker to turn off clocks after some delay as specified in
339 * delay_ms
340 * @ungate_work: worker to turn on clocks that will be used in case of
341 * interrupt context
342 * @state: the current clocks state
343 * @delay_ms: gating delay in ms
344 * @is_suspended: clk gating is suspended when set to 1 which can be used
345 * during suspend/resume
346 * @delay_attr: sysfs attribute to control delay_attr
347 * @enable_attr: sysfs attribute to enable/disable clock gating
348 * @is_enabled: Indicates the current status of clock gating
349 * @active_reqs: number of requests that are pending and should be waited for
350 * completion before gating clocks.
351 */
352struct ufs_clk_gating {
353 struct delayed_work gate_work;
354 struct work_struct ungate_work;
355 enum clk_gating_state state;
356 unsigned long delay_ms;
357 bool is_suspended;
358 struct device_attribute delay_attr;
359 struct device_attribute enable_attr;
360 bool is_enabled;
361 int active_reqs;
362};
363
364struct ufs_saved_pwr_info {
365 struct ufs_pa_layer_attr info;
366 bool is_valid;
367};
368
369/**
370 * struct ufs_clk_scaling - UFS clock scaling related data
371 * @active_reqs: number of requests that are pending. If this is zero when
372 * devfreq ->target() function is called then schedule "suspend_work" to
373 * suspend devfreq.
374 * @tot_busy_t: Total busy time in current polling window
375 * @window_start_t: Start time (in jiffies) of the current polling window
376 * @busy_start_t: Start time of current busy period
377 * @enable_attr: sysfs attribute to enable/disable clock scaling
378 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
379 * one keeps track of previous power mode.
380 * @workq: workqueue to schedule devfreq suspend/resume work
381 * @suspend_work: worker to suspend devfreq
382 * @resume_work: worker to resume devfreq
383 * @is_allowed: tracks if scaling is currently allowed or not
384 * @is_busy_started: tracks if busy period has started or not
385 * @is_suspended: tracks if devfreq is suspended or not
386 */
387struct ufs_clk_scaling {
388 int active_reqs;
389 unsigned long tot_busy_t;
390 unsigned long window_start_t;
391 ktime_t busy_start_t;
392 struct device_attribute enable_attr;
393 struct ufs_saved_pwr_info saved_pwr_info;
394 struct workqueue_struct *workq;
395 struct work_struct suspend_work;
396 struct work_struct resume_work;
397 bool is_allowed;
398 bool is_busy_started;
399 bool is_suspended;
400};
401
402/**
403 * struct ufs_init_prefetch - contains data that is pre-fetched once during
404 * initialization
405 * @icc_level: icc level which was read during initialization
406 */
407struct ufs_init_prefetch {
408 u32 icc_level;
409};
410
411#define UIC_ERR_REG_HIST_LENGTH 8
412/**
413 * struct ufs_uic_err_reg_hist - keeps history of uic errors
414 * @pos: index to indicate cyclic buffer position
415 * @reg: cyclic buffer for registers value
416 * @tstamp: cyclic buffer for time stamp
417 */
418struct ufs_uic_err_reg_hist {
419 int pos;
420 u32 reg[UIC_ERR_REG_HIST_LENGTH];
421 ktime_t tstamp[UIC_ERR_REG_HIST_LENGTH];
422};
423
424/**
425 * struct ufs_stats - keeps usage/err statistics
426 * @hibern8_exit_cnt: Counter to keep track of number of exits,
427 * reset this after link-startup.
428 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
429 * Clear after the first successful command completion.
430 * @pa_err: tracks pa-uic errors
431 * @dl_err: tracks dl-uic errors
432 * @nl_err: tracks nl-uic errors
433 * @tl_err: tracks tl-uic errors
434 * @dme_err: tracks dme errors
435 */
436struct ufs_stats {
437 u32 hibern8_exit_cnt;
438 ktime_t last_hibern8_exit_tstamp;
439 struct ufs_uic_err_reg_hist pa_err;
440 struct ufs_uic_err_reg_hist dl_err;
441 struct ufs_uic_err_reg_hist nl_err;
442 struct ufs_uic_err_reg_hist tl_err;
443 struct ufs_uic_err_reg_hist dme_err;
444};
445
446/**
447 * struct ufs_hba - per adapter private structure
448 * @mmio_base: UFSHCI base register address
449 * @ucdl_base_addr: UFS Command Descriptor base address
450 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
451 * @utmrdl_base_addr: UTP Task Management Descriptor base address
452 * @ucdl_dma_addr: UFS Command Descriptor DMA address
453 * @utrdl_dma_addr: UTRDL DMA address
454 * @utmrdl_dma_addr: UTMRDL DMA address
455 * @host: Scsi_Host instance of the driver
456 * @dev: device handle
457 * @lrb: local reference block
458 * @lrb_in_use: lrb in use
459 * @outstanding_tasks: Bits representing outstanding task requests
460 * @outstanding_reqs: Bits representing outstanding transfer requests
461 * @capabilities: UFS Controller Capabilities
462 * @nutrs: Transfer Request Queue depth supported by controller
463 * @nutmrs: Task Management Queue depth supported by controller
464 * @ufs_version: UFS Version to which controller complies
465 * @vops: pointer to variant specific operations
466 * @priv: pointer to variant specific private data
467 * @irq: Irq number of the controller
468 * @active_uic_cmd: handle of active UIC command
469 * @uic_cmd_mutex: mutex for uic command
470 * @tm_wq: wait queue for task management
471 * @tm_tag_wq: wait queue for free task management slots
472 * @tm_slots_in_use: bit map of task management request slots in use
473 * @pwr_done: completion for power mode change
474 * @tm_condition: condition variable for task management
475 * @ufshcd_state: UFSHCD states
476 * @eh_flags: Error handling flags
477 * @intr_mask: Interrupt Mask Bits
478 * @ee_ctrl_mask: Exception event control mask
479 * @is_powered: flag to check if HBA is powered
480 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
481 * @init_prefetch_data: data pre-fetched during initialization
482 * @eh_work: Worker to handle UFS errors that require s/w attention
483 * @eeh_work: Worker to handle exception events
484 * @errors: HBA errors
485 * @uic_error: UFS interconnect layer error status
486 * @saved_err: sticky error mask
487 * @saved_uic_err: sticky UIC error mask
488 * @silence_err_logs: flag to silence error logs
489 * @dev_cmd: ufs device management command information
490 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
491 * @auto_bkops_enabled: to track whether bkops is enabled in device
492 * @vreg_info: UFS device voltage regulator information
493 * @clk_list_head: UFS host controller clocks list node head
494 * @pwr_info: holds current power mode
495 * @max_pwr_info: keeps the device max valid pwm
496 * @desc_size: descriptor sizes reported by device
497 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
498 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
499 * device is known or not.
500 */
501struct ufs_hba {
502 void __iomem *mmio_base;
503
504 /* Virtual memory reference */
505 struct utp_transfer_cmd_desc *ucdl_base_addr;
506 struct utp_transfer_req_desc *utrdl_base_addr;
507 struct utp_task_req_desc *utmrdl_base_addr;
508
509 /* DMA memory reference */
510 dma_addr_t ucdl_dma_addr;
511 dma_addr_t utrdl_dma_addr;
512 dma_addr_t utmrdl_dma_addr;
513
514 struct Scsi_Host *host;
515 struct device *dev;
516 /*
517 * This field is to keep a reference to "scsi_device" corresponding to
518 * "UFS device" W-LU.
519 */
520 struct scsi_device *sdev_ufs_device;
521
522 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
523 enum uic_link_state uic_link_state;
524 /* Desired UFS power management level during runtime PM */
525 enum ufs_pm_level rpm_lvl;
526 /* Desired UFS power management level during system PM */
527 enum ufs_pm_level spm_lvl;
528 struct device_attribute rpm_lvl_attr;
529 struct device_attribute spm_lvl_attr;
530 int pm_op_in_progress;
531
532 struct ufshcd_lrb *lrb;
533 unsigned long lrb_in_use;
534
535 unsigned long outstanding_tasks;
536 unsigned long outstanding_reqs;
537
538 u32 capabilities;
539 int nutrs;
540 int nutmrs;
541 u32 ufs_version;
542 struct ufs_hba_variant_ops *vops;
543 void *priv;
544 unsigned int irq;
545 bool is_irq_enabled;
546
547 /* Interrupt aggregation support is broken */
548 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
549
550 /*
551 * delay before each dme command is required as the unipro
552 * layer has shown instabilities
553 */
554 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
555
556 /*
557 * If UFS host controller is having issue in processing LCC (Line
558 * Control Command) coming from device then enable this quirk.
559 * When this quirk is enabled, host controller driver should disable
560 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
561 * attribute of device to 0).
562 */
563 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
564
565 /*
566 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
567 * inbound Link supports unterminated line in HS mode. Setting this
568 * attribute to 1 fixes moving to HS gear.
569 */
570 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
571
572 /*
573 * This quirk needs to be enabled if the host contoller only allows
574 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
575 * SLOW AUTO).
576 */
577 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
578
579 /*
580 * This quirk needs to be enabled if the host contoller doesn't
581 * advertise the correct version in UFS_VER register. If this quirk
582 * is enabled, standard UFS host driver will call the vendor specific
583 * ops (get_ufs_hci_version) to get the correct version.
584 */
585 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
586
587 /*
588 * This quirk needs to be enabled if the host contoller regards
589 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
590 */
591 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN UFS_BIT(7)
592
593 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
594
595 /* Device deviations from standard UFS device spec. */
596 unsigned int dev_quirks;
597
598 wait_queue_head_t tm_wq;
599 wait_queue_head_t tm_tag_wq;
600 unsigned long tm_condition;
601 unsigned long tm_slots_in_use;
602
603 struct uic_command *active_uic_cmd;
604 struct mutex uic_cmd_mutex;
605 struct completion *uic_async_done;
606
607 u32 ufshcd_state;
608 u32 eh_flags;
609 u32 intr_mask;
610 u16 ee_ctrl_mask;
611 bool is_powered;
612 bool is_init_prefetch;
613 struct ufs_init_prefetch init_prefetch_data;
614
615 /* Work Queues */
616 struct work_struct eh_work;
617 struct work_struct eeh_work;
618
619 /* HBA Errors */
620 u32 errors;
621 u32 uic_error;
622 u32 saved_err;
623 u32 saved_uic_err;
624 struct ufs_stats ufs_stats;
625 bool silence_err_logs;
626
627 /* Device management request data */
628 struct ufs_dev_cmd dev_cmd;
629 ktime_t last_dme_cmd_tstamp;
630
631 /* Keeps information of the UFS device connected to this host */
632 struct ufs_dev_info dev_info;
633 bool auto_bkops_enabled;
634 struct ufs_vreg_info vreg_info;
635 struct list_head clk_list_head;
636
637 bool wlun_dev_clr_ua;
638
639 /* Number of requests aborts */
640 int req_abort_count;
641
642 /* Number of lanes available (1 or 2) for Rx/Tx */
643 u32 lanes_per_direction;
644 struct ufs_pa_layer_attr pwr_info;
645 struct ufs_pwr_mode_info max_pwr_info;
646
647 struct ufs_clk_gating clk_gating;
648 /* Control to enable/disable host capabilities */
649 u32 caps;
650 /* Allow dynamic clk gating */
651#define UFSHCD_CAP_CLK_GATING (1 << 0)
652 /* Allow hiberb8 with clk gating */
653#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
654 /* Allow dynamic clk scaling */
655#define UFSHCD_CAP_CLK_SCALING (1 << 2)
656 /* Allow auto bkops to enabled during runtime suspend */
657#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
658 /*
659 * This capability allows host controller driver to use the UFS HCI's
660 * interrupt aggregation capability.
661 * CAUTION: Enabling this might reduce overall UFS throughput.
662 */
663#define UFSHCD_CAP_INTR_AGGR (1 << 4)
664 /*
665 * This capability allows the device auto-bkops to be always enabled
666 * except during suspend (both runtime and suspend).
667 * Enabling this capability means that device will always be allowed
668 * to do background operation when it's active but it might degrade
669 * the performance of ongoing read/write operations.
670 */
671#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
672
673 struct devfreq *devfreq;
674 struct ufs_clk_scaling clk_scaling;
675 bool is_sys_suspended;
676
677 enum bkops_status urgent_bkops_lvl;
678 bool is_urgent_bkops_lvl_checked;
679
680 struct rw_semaphore clk_scaling_lock;
681 struct ufs_desc_size desc_size;
682};
683
684/* Returns true if clocks can be gated. Otherwise false */
685static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
686{
687 return hba->caps & UFSHCD_CAP_CLK_GATING;
688}
689static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
690{
691 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
692}
693static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
694{
695 return hba->caps & UFSHCD_CAP_CLK_SCALING;
696}
697static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
698{
699 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
700}
701
702static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
703{
704/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
705#ifndef CONFIG_SCSI_UFS_DWC
706 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
707 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
708 return true;
709 else
710 return false;
711#else
712return true;
713#endif
714}
715
716#define ufshcd_writel(hba, val, reg) \
717 writel((val), (hba)->mmio_base + (reg))
718#define ufshcd_readl(hba, reg) \
719 readl((hba)->mmio_base + (reg))
720
721/**
722 * ufshcd_rmwl - read modify write into a register
723 * @hba - per adapter instance
724 * @mask - mask to apply on read value
725 * @val - actual value to write
726 * @reg - register address
727 */
728static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
729{
730 u32 tmp;
731
732 tmp = ufshcd_readl(hba, reg);
733 tmp &= ~mask;
734 tmp |= (val & mask);
735 ufshcd_writel(hba, tmp, reg);
736}
737
738int ufshcd_alloc_host(struct device *, struct ufs_hba **);
739void ufshcd_dealloc_host(struct ufs_hba *);
740int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
741void ufshcd_remove(struct ufs_hba *);
742int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
743 u32 val, unsigned long interval_us,
744 unsigned long timeout_ms, bool can_sleep);
745
746static inline void check_upiu_size(void)
747{
748 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
749 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
750}
751
752/**
753 * ufshcd_set_variant - set variant specific data to the hba
754 * @hba - per adapter instance
755 * @variant - pointer to variant specific data
756 */
757static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
758{
759 BUG_ON(!hba);
760 hba->priv = variant;
761}
762
763/**
764 * ufshcd_get_variant - get variant specific data from the hba
765 * @hba - per adapter instance
766 */
767static inline void *ufshcd_get_variant(struct ufs_hba *hba)
768{
769 BUG_ON(!hba);
770 return hba->priv;
771}
772static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
773 struct ufs_hba *hba)
774{
775 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
776}
777
778extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
779extern int ufshcd_runtime_resume(struct ufs_hba *hba);
780extern int ufshcd_runtime_idle(struct ufs_hba *hba);
781extern int ufshcd_system_suspend(struct ufs_hba *hba);
782extern int ufshcd_system_resume(struct ufs_hba *hba);
783extern int ufshcd_shutdown(struct ufs_hba *hba);
784extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
785 u8 attr_set, u32 mib_val, u8 peer);
786extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
787 u32 *mib_val, u8 peer);
788
789/* UIC command interfaces for DME primitives */
790#define DME_LOCAL 0
791#define DME_PEER 1
792#define ATTR_SET_NOR 0 /* NORMAL */
793#define ATTR_SET_ST 1 /* STATIC */
794
795static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
796 u32 mib_val)
797{
798 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
799 mib_val, DME_LOCAL);
800}
801
802static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
803 u32 mib_val)
804{
805 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
806 mib_val, DME_LOCAL);
807}
808
809static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
810 u32 mib_val)
811{
812 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
813 mib_val, DME_PEER);
814}
815
816static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
817 u32 mib_val)
818{
819 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
820 mib_val, DME_PEER);
821}
822
823static inline int ufshcd_dme_get(struct ufs_hba *hba,
824 u32 attr_sel, u32 *mib_val)
825{
826 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
827}
828
829static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
830 u32 attr_sel, u32 *mib_val)
831{
832 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
833}
834
835static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
836{
837 return (pwr_info->pwr_rx == FAST_MODE ||
838 pwr_info->pwr_rx == FASTAUTO_MODE) &&
839 (pwr_info->pwr_tx == FAST_MODE ||
840 pwr_info->pwr_tx == FASTAUTO_MODE);
841}
842
843/* Expose Query-Request API */
844int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
845 enum flag_idn idn, bool *flag_res);
846int ufshcd_hold(struct ufs_hba *hba, bool async);
847void ufshcd_release(struct ufs_hba *hba);
848
849int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
850 int *desc_length);
851
852u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
853
854/* Wrapper functions for safely calling variant operations */
855static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
856{
857 if (hba->vops)
858 return hba->vops->name;
859 return "";
860}
861
862static inline int ufshcd_vops_init(struct ufs_hba *hba)
863{
864 if (hba->vops && hba->vops->init)
865 return hba->vops->init(hba);
866
867 return 0;
868}
869
870static inline void ufshcd_vops_exit(struct ufs_hba *hba)
871{
872 if (hba->vops && hba->vops->exit)
873 return hba->vops->exit(hba);
874}
875
876static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
877{
878 if (hba->vops && hba->vops->get_ufs_hci_version)
879 return hba->vops->get_ufs_hci_version(hba);
880
881 return ufshcd_readl(hba, REG_UFS_VERSION);
882}
883
884static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
885 bool up, enum ufs_notify_change_status status)
886{
887 if (hba->vops && hba->vops->clk_scale_notify)
888 return hba->vops->clk_scale_notify(hba, up, status);
889 return 0;
890}
891
892static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
893 enum ufs_notify_change_status status)
894{
895 if (hba->vops && hba->vops->setup_clocks)
896 return hba->vops->setup_clocks(hba, on, status);
897 return 0;
898}
899
900static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
901{
902 if (hba->vops && hba->vops->setup_regulators)
903 return hba->vops->setup_regulators(hba, status);
904
905 return 0;
906}
907
908static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
909 bool status)
910{
911 if (hba->vops && hba->vops->hce_enable_notify)
912 return hba->vops->hce_enable_notify(hba, status);
913
914 return 0;
915}
916static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
917 bool status)
918{
919 if (hba->vops && hba->vops->link_startup_notify)
920 return hba->vops->link_startup_notify(hba, status);
921
922 return 0;
923}
924
925static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
926 bool status,
927 struct ufs_pa_layer_attr *dev_max_params,
928 struct ufs_pa_layer_attr *dev_req_params)
929{
930 if (hba->vops && hba->vops->pwr_change_notify)
931 return hba->vops->pwr_change_notify(hba, status,
932 dev_max_params, dev_req_params);
933
934 return -ENOTSUPP;
935}
936
937static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
938 bool is_scsi_cmd)
939{
940 if (hba->vops && hba->vops->setup_xfer_req)
941 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
942}
943
944static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
945 int tag, u8 tm_function)
946{
947 if (hba->vops && hba->vops->setup_task_mgmt)
948 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
949}
950
951static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
952 enum uic_cmd_dme cmd,
953 enum ufs_notify_change_status status)
954{
955 if (hba->vops && hba->vops->hibern8_notify)
956 return hba->vops->hibern8_notify(hba, cmd, status);
957}
958
959static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
960{
961 if (hba->vops && hba->vops->apply_dev_quirks)
962 return hba->vops->apply_dev_quirks(hba);
963 return 0;
964}
965
966static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
967{
968 if (hba->vops && hba->vops->suspend)
969 return hba->vops->suspend(hba, op);
970
971 return 0;
972}
973
974static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
975{
976 if (hba->vops && hba->vops->resume)
977 return hba->vops->resume(hba, op);
978
979 return 0;
980}
981
982static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
983{
984 if (hba->vops && hba->vops->dbg_register_dump)
985 hba->vops->dbg_register_dump(hba);
986}
987
988#endif /* End of Header */