rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * host.c - ChipIdea USB host controller driver |
| 3 | * |
| 4 | * Copyright (c) 2012 Intel Corporation |
| 5 | * |
| 6 | * Author: Alexander Shishkin |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | */ |
| 21 | |
| 22 | #include <linux/kernel.h> |
| 23 | #include <linux/io.h> |
| 24 | #include <linux/usb.h> |
| 25 | #include <linux/usb/hcd.h> |
| 26 | #include <linux/usb/chipidea.h> |
| 27 | #include <linux/regulator/consumer.h> |
| 28 | |
| 29 | #include "../host/ehci.h" |
| 30 | |
| 31 | #include "ci.h" |
| 32 | #include "bits.h" |
| 33 | #include "host.h" |
| 34 | |
| 35 | static struct hc_driver __read_mostly ci_ehci_hc_driver; |
| 36 | static int (*orig_bus_suspend)(struct usb_hcd *hcd); |
| 37 | |
| 38 | struct ehci_ci_priv { |
| 39 | struct regulator *reg_vbus; |
| 40 | bool enabled; |
| 41 | }; |
| 42 | |
| 43 | static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable) |
| 44 | { |
| 45 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 46 | struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv; |
| 47 | struct device *dev = hcd->self.controller; |
| 48 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 49 | int ret = 0; |
| 50 | int port = HCS_N_PORTS(ehci->hcs_params); |
| 51 | |
| 52 | if (priv->reg_vbus && enable != priv->enabled) { |
| 53 | if (port > 1) { |
| 54 | dev_warn(dev, |
| 55 | "Not support multi-port regulator control\n"); |
| 56 | return 0; |
| 57 | } |
| 58 | if (enable) |
| 59 | ret = regulator_enable(priv->reg_vbus); |
| 60 | else |
| 61 | ret = regulator_disable(priv->reg_vbus); |
| 62 | if (ret) { |
| 63 | dev_err(dev, |
| 64 | "Failed to %s vbus regulator, ret=%d\n", |
| 65 | enable ? "enable" : "disable", ret); |
| 66 | return ret; |
| 67 | } |
| 68 | priv->enabled = enable; |
| 69 | } |
| 70 | |
| 71 | if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { |
| 72 | /* |
| 73 | * Marvell 28nm HSIC PHY requires forcing the port to HS mode. |
| 74 | * As HSIC is always HS, this should be safe for others. |
| 75 | */ |
| 76 | hw_port_test_set(ci, 5); |
| 77 | hw_port_test_set(ci, 0); |
| 78 | } |
| 79 | return 0; |
| 80 | }; |
| 81 | |
| 82 | static int ehci_ci_reset(struct usb_hcd *hcd) |
| 83 | { |
| 84 | struct device *dev = hcd->self.controller; |
| 85 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 86 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 87 | int ret; |
| 88 | |
| 89 | ret = ehci_setup(hcd); |
| 90 | if (ret) |
| 91 | return ret; |
| 92 | |
| 93 | ehci->need_io_watchdog = 0; |
| 94 | |
| 95 | if (ci->platdata->notify_event) { |
| 96 | ret = ci->platdata->notify_event(ci, |
| 97 | CI_HDRC_CONTROLLER_RESET_EVENT); |
| 98 | if (ret) |
| 99 | return ret; |
| 100 | } |
| 101 | |
| 102 | ci_platform_configure(ci); |
| 103 | |
| 104 | return ret; |
| 105 | } |
| 106 | |
| 107 | static const struct ehci_driver_overrides ehci_ci_overrides = { |
| 108 | .extra_priv_size = sizeof(struct ehci_ci_priv), |
| 109 | .port_power = ehci_ci_portpower, |
| 110 | .reset = ehci_ci_reset, |
| 111 | }; |
| 112 | |
| 113 | static irqreturn_t host_irq(struct ci_hdrc *ci) |
| 114 | { |
| 115 | return usb_hcd_irq(ci->irq, ci->hcd); |
| 116 | } |
| 117 | |
| 118 | static int host_start(struct ci_hdrc *ci) |
| 119 | { |
| 120 | struct usb_hcd *hcd; |
| 121 | struct ehci_hcd *ehci; |
| 122 | struct ehci_ci_priv *priv; |
| 123 | int ret; |
| 124 | |
| 125 | if (usb_disabled()) |
| 126 | return -ENODEV; |
| 127 | |
| 128 | hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent, |
| 129 | ci->dev, dev_name(ci->dev), NULL); |
| 130 | if (!hcd) |
| 131 | return -ENOMEM; |
| 132 | |
| 133 | dev_set_drvdata(ci->dev, ci); |
| 134 | hcd->rsrc_start = ci->hw_bank.phys; |
| 135 | hcd->rsrc_len = ci->hw_bank.size; |
| 136 | hcd->regs = ci->hw_bank.abs; |
| 137 | hcd->has_tt = 1; |
| 138 | |
| 139 | hcd->power_budget = ci->platdata->power_budget; |
| 140 | hcd->tpl_support = ci->platdata->tpl_support; |
| 141 | if (ci->phy) |
| 142 | hcd->phy = ci->phy; |
| 143 | else |
| 144 | hcd->usb_phy = ci->usb_phy; |
| 145 | |
| 146 | ehci = hcd_to_ehci(hcd); |
| 147 | ehci->caps = ci->hw_bank.cap; |
| 148 | ehci->has_hostpc = ci->hw_bank.lpm; |
| 149 | ehci->has_tdi_phy_lpm = ci->hw_bank.lpm; |
| 150 | ehci->imx28_write_fix = ci->imx28_write_fix; |
| 151 | |
| 152 | priv = (struct ehci_ci_priv *)ehci->priv; |
| 153 | priv->reg_vbus = NULL; |
| 154 | |
| 155 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) { |
| 156 | if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) { |
| 157 | ret = regulator_enable(ci->platdata->reg_vbus); |
| 158 | if (ret) { |
| 159 | dev_err(ci->dev, |
| 160 | "Failed to enable vbus regulator, ret=%d\n", |
| 161 | ret); |
| 162 | goto put_hcd; |
| 163 | } |
| 164 | } else { |
| 165 | priv->reg_vbus = ci->platdata->reg_vbus; |
| 166 | } |
| 167 | } |
| 168 | |
| 169 | ret = usb_add_hcd(hcd, 0, 0); |
| 170 | if (ret) { |
| 171 | goto disable_reg; |
| 172 | } else { |
| 173 | struct usb_otg *otg = &ci->otg; |
| 174 | |
| 175 | ci->hcd = hcd; |
| 176 | |
| 177 | if (ci_otg_is_fsm_mode(ci)) { |
| 178 | otg->host = &hcd->self; |
| 179 | hcd->self.otg_port = 1; |
| 180 | } |
| 181 | } |
| 182 | |
| 183 | return ret; |
| 184 | |
| 185 | disable_reg: |
| 186 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && |
| 187 | (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) |
| 188 | regulator_disable(ci->platdata->reg_vbus); |
| 189 | put_hcd: |
| 190 | usb_put_hcd(hcd); |
| 191 | |
| 192 | return ret; |
| 193 | } |
| 194 | |
| 195 | static void host_stop(struct ci_hdrc *ci) |
| 196 | { |
| 197 | struct usb_hcd *hcd = ci->hcd; |
| 198 | |
| 199 | if (hcd) { |
| 200 | if (ci->platdata->notify_event) |
| 201 | ci->platdata->notify_event(ci, |
| 202 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
| 203 | usb_remove_hcd(hcd); |
| 204 | ci->role = CI_ROLE_END; |
| 205 | synchronize_irq(ci->irq); |
| 206 | usb_put_hcd(hcd); |
| 207 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && |
| 208 | (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) |
| 209 | regulator_disable(ci->platdata->reg_vbus); |
| 210 | } |
| 211 | ci->hcd = NULL; |
| 212 | ci->otg.host = NULL; |
| 213 | } |
| 214 | |
| 215 | |
| 216 | void ci_hdrc_host_destroy(struct ci_hdrc *ci) |
| 217 | { |
| 218 | if (ci->role == CI_ROLE_HOST && ci->hcd) |
| 219 | host_stop(ci); |
| 220 | } |
| 221 | |
| 222 | static int ci_ehci_bus_suspend(struct usb_hcd *hcd) |
| 223 | { |
| 224 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 225 | int port; |
| 226 | u32 tmp; |
| 227 | |
| 228 | int ret = orig_bus_suspend(hcd); |
| 229 | |
| 230 | if (ret) |
| 231 | return ret; |
| 232 | |
| 233 | port = HCS_N_PORTS(ehci->hcs_params); |
| 234 | while (port--) { |
| 235 | u32 __iomem *reg = &ehci->regs->port_status[port]; |
| 236 | u32 portsc = ehci_readl(ehci, reg); |
| 237 | |
| 238 | if (portsc & PORT_CONNECT) { |
| 239 | /* |
| 240 | * For chipidea, the resume signal will be ended |
| 241 | * automatically, so for remote wakeup case, the |
| 242 | * usbcmd.rs may not be set before the resume has |
| 243 | * ended if other resume paths consumes too much |
| 244 | * time (~24ms), in that case, the SOF will not |
| 245 | * send out within 3ms after resume ends, then the |
| 246 | * high speed device will enter full speed mode. |
| 247 | */ |
| 248 | |
| 249 | tmp = ehci_readl(ehci, &ehci->regs->command); |
| 250 | tmp |= CMD_RUN; |
| 251 | ehci_writel(ehci, tmp, &ehci->regs->command); |
| 252 | /* |
| 253 | * It needs a short delay between set RS bit and PHCD. |
| 254 | */ |
| 255 | usleep_range(150, 200); |
| 256 | break; |
| 257 | } |
| 258 | } |
| 259 | |
| 260 | return 0; |
| 261 | } |
| 262 | |
| 263 | int ci_hdrc_host_init(struct ci_hdrc *ci) |
| 264 | { |
| 265 | struct ci_role_driver *rdrv; |
| 266 | |
| 267 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC)) |
| 268 | return -ENXIO; |
| 269 | |
| 270 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); |
| 271 | if (!rdrv) |
| 272 | return -ENOMEM; |
| 273 | |
| 274 | rdrv->start = host_start; |
| 275 | rdrv->stop = host_stop; |
| 276 | rdrv->irq = host_irq; |
| 277 | rdrv->name = "host"; |
| 278 | ci->roles[CI_ROLE_HOST] = rdrv; |
| 279 | |
| 280 | return 0; |
| 281 | } |
| 282 | |
| 283 | void ci_hdrc_host_driver_init(void) |
| 284 | { |
| 285 | ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides); |
| 286 | orig_bus_suspend = ci_ehci_hc_driver.bus_suspend; |
| 287 | ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend; |
| 288 | } |