rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * udc.c - ChipIdea UDC driver |
| 3 | * |
| 4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. |
| 5 | * |
| 6 | * Author: David Lopo |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/delay.h> |
| 14 | #include <linux/device.h> |
| 15 | #include <linux/dmapool.h> |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/irqreturn.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/pm_runtime.h> |
| 21 | #include <linux/usb/ch9.h> |
| 22 | #include <linux/usb/gadget.h> |
| 23 | #include <linux/usb/otg-fsm.h> |
| 24 | #include <linux/usb/chipidea.h> |
| 25 | |
| 26 | #include "ci.h" |
| 27 | #include "udc.h" |
| 28 | #include "bits.h" |
| 29 | #include "otg.h" |
| 30 | #include "otg_fsm.h" |
| 31 | |
| 32 | /* control endpoint description */ |
| 33 | static const struct usb_endpoint_descriptor |
| 34 | ctrl_endpt_out_desc = { |
| 35 | .bLength = USB_DT_ENDPOINT_SIZE, |
| 36 | .bDescriptorType = USB_DT_ENDPOINT, |
| 37 | |
| 38 | .bEndpointAddress = USB_DIR_OUT, |
| 39 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
| 40 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), |
| 41 | }; |
| 42 | |
| 43 | static const struct usb_endpoint_descriptor |
| 44 | ctrl_endpt_in_desc = { |
| 45 | .bLength = USB_DT_ENDPOINT_SIZE, |
| 46 | .bDescriptorType = USB_DT_ENDPOINT, |
| 47 | |
| 48 | .bEndpointAddress = USB_DIR_IN, |
| 49 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
| 50 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), |
| 51 | }; |
| 52 | |
| 53 | /** |
| 54 | * hw_ep_bit: calculates the bit number |
| 55 | * @num: endpoint number |
| 56 | * @dir: endpoint direction |
| 57 | * |
| 58 | * This function returns bit number |
| 59 | */ |
| 60 | static inline int hw_ep_bit(int num, int dir) |
| 61 | { |
| 62 | return num + ((dir == TX) ? 16 : 0); |
| 63 | } |
| 64 | |
| 65 | static inline int ep_to_bit(struct ci_hdrc *ci, int n) |
| 66 | { |
| 67 | int fill = 16 - ci->hw_ep_max / 2; |
| 68 | |
| 69 | if (n >= ci->hw_ep_max / 2) |
| 70 | n += fill; |
| 71 | |
| 72 | return n; |
| 73 | } |
| 74 | |
| 75 | /** |
| 76 | * hw_device_state: enables/disables interrupts (execute without interruption) |
| 77 | * @dma: 0 => disable, !0 => enable and set dma engine |
| 78 | * |
| 79 | * This function returns an error code |
| 80 | */ |
| 81 | static int hw_device_state(struct ci_hdrc *ci, u32 dma) |
| 82 | { |
| 83 | if (dma) { |
| 84 | hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); |
| 85 | /* interrupt, error, port change, reset, sleep/suspend */ |
| 86 | hw_write(ci, OP_USBINTR, ~0, |
| 87 | USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); |
| 88 | } else { |
| 89 | hw_write(ci, OP_USBINTR, ~0, 0); |
| 90 | } |
| 91 | return 0; |
| 92 | } |
| 93 | |
| 94 | /** |
| 95 | * hw_ep_flush: flush endpoint fifo (execute without interruption) |
| 96 | * @num: endpoint number |
| 97 | * @dir: endpoint direction |
| 98 | * |
| 99 | * This function returns an error code |
| 100 | */ |
| 101 | static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) |
| 102 | { |
| 103 | int n = hw_ep_bit(num, dir); |
| 104 | |
| 105 | do { |
| 106 | /* flush any pending transfer */ |
| 107 | hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); |
| 108 | while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) |
| 109 | cpu_relax(); |
| 110 | } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); |
| 111 | |
| 112 | return 0; |
| 113 | } |
| 114 | |
| 115 | /** |
| 116 | * hw_ep_disable: disables endpoint (execute without interruption) |
| 117 | * @num: endpoint number |
| 118 | * @dir: endpoint direction |
| 119 | * |
| 120 | * This function returns an error code |
| 121 | */ |
| 122 | static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) |
| 123 | { |
| 124 | hw_write(ci, OP_ENDPTCTRL + num, |
| 125 | (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); |
| 126 | return 0; |
| 127 | } |
| 128 | |
| 129 | /** |
| 130 | * hw_ep_enable: enables endpoint (execute without interruption) |
| 131 | * @num: endpoint number |
| 132 | * @dir: endpoint direction |
| 133 | * @type: endpoint type |
| 134 | * |
| 135 | * This function returns an error code |
| 136 | */ |
| 137 | static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) |
| 138 | { |
| 139 | u32 mask, data; |
| 140 | |
| 141 | if (dir == TX) { |
| 142 | mask = ENDPTCTRL_TXT; /* type */ |
| 143 | data = type << __ffs(mask); |
| 144 | |
| 145 | mask |= ENDPTCTRL_TXS; /* unstall */ |
| 146 | mask |= ENDPTCTRL_TXR; /* reset data toggle */ |
| 147 | data |= ENDPTCTRL_TXR; |
| 148 | mask |= ENDPTCTRL_TXE; /* enable */ |
| 149 | data |= ENDPTCTRL_TXE; |
| 150 | } else { |
| 151 | mask = ENDPTCTRL_RXT; /* type */ |
| 152 | data = type << __ffs(mask); |
| 153 | |
| 154 | mask |= ENDPTCTRL_RXS; /* unstall */ |
| 155 | mask |= ENDPTCTRL_RXR; /* reset data toggle */ |
| 156 | data |= ENDPTCTRL_RXR; |
| 157 | mask |= ENDPTCTRL_RXE; /* enable */ |
| 158 | data |= ENDPTCTRL_RXE; |
| 159 | } |
| 160 | hw_write(ci, OP_ENDPTCTRL + num, mask, data); |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | /** |
| 165 | * hw_ep_get_halt: return endpoint halt status |
| 166 | * @num: endpoint number |
| 167 | * @dir: endpoint direction |
| 168 | * |
| 169 | * This function returns 1 if endpoint halted |
| 170 | */ |
| 171 | static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) |
| 172 | { |
| 173 | u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
| 174 | |
| 175 | return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; |
| 176 | } |
| 177 | |
| 178 | /** |
| 179 | * hw_ep_prime: primes endpoint (execute without interruption) |
| 180 | * @num: endpoint number |
| 181 | * @dir: endpoint direction |
| 182 | * @is_ctrl: true if control endpoint |
| 183 | * |
| 184 | * This function returns an error code |
| 185 | */ |
| 186 | static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) |
| 187 | { |
| 188 | int n = hw_ep_bit(num, dir); |
| 189 | |
| 190 | /* Synchronize before ep prime */ |
| 191 | wmb(); |
| 192 | |
| 193 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
| 194 | return -EAGAIN; |
| 195 | |
| 196 | hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); |
| 197 | |
| 198 | while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
| 199 | cpu_relax(); |
| 200 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
| 201 | return -EAGAIN; |
| 202 | |
| 203 | /* status shoult be tested according with manual but it doesn't work */ |
| 204 | return 0; |
| 205 | } |
| 206 | |
| 207 | /** |
| 208 | * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute |
| 209 | * without interruption) |
| 210 | * @num: endpoint number |
| 211 | * @dir: endpoint direction |
| 212 | * @value: true => stall, false => unstall |
| 213 | * |
| 214 | * This function returns an error code |
| 215 | */ |
| 216 | static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) |
| 217 | { |
| 218 | if (value != 0 && value != 1) |
| 219 | return -EINVAL; |
| 220 | |
| 221 | do { |
| 222 | enum ci_hw_regs reg = OP_ENDPTCTRL + num; |
| 223 | u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
| 224 | u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; |
| 225 | |
| 226 | /* data toggle - reserved for EP0 but it's in ESS */ |
| 227 | hw_write(ci, reg, mask_xs|mask_xr, |
| 228 | value ? mask_xs : mask_xr); |
| 229 | } while (value != hw_ep_get_halt(ci, num, dir)); |
| 230 | |
| 231 | return 0; |
| 232 | } |
| 233 | |
| 234 | /** |
| 235 | * hw_is_port_high_speed: test if port is high speed |
| 236 | * |
| 237 | * This function returns true if high speed port |
| 238 | */ |
| 239 | static int hw_port_is_high_speed(struct ci_hdrc *ci) |
| 240 | { |
| 241 | return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : |
| 242 | hw_read(ci, OP_PORTSC, PORTSC_HSP); |
| 243 | } |
| 244 | |
| 245 | /** |
| 246 | * hw_test_and_clear_complete: test & clear complete status (execute without |
| 247 | * interruption) |
| 248 | * @n: endpoint number |
| 249 | * |
| 250 | * This function returns complete status |
| 251 | */ |
| 252 | static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) |
| 253 | { |
| 254 | n = ep_to_bit(ci, n); |
| 255 | return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); |
| 256 | } |
| 257 | |
| 258 | /** |
| 259 | * hw_test_and_clear_intr_active: test & clear active interrupts (execute |
| 260 | * without interruption) |
| 261 | * |
| 262 | * This function returns active interrutps |
| 263 | */ |
| 264 | static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) |
| 265 | { |
| 266 | u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); |
| 267 | |
| 268 | hw_write(ci, OP_USBSTS, ~0, reg); |
| 269 | return reg; |
| 270 | } |
| 271 | |
| 272 | /** |
| 273 | * hw_test_and_clear_setup_guard: test & clear setup guard (execute without |
| 274 | * interruption) |
| 275 | * |
| 276 | * This function returns guard value |
| 277 | */ |
| 278 | static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) |
| 279 | { |
| 280 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); |
| 281 | } |
| 282 | |
| 283 | /** |
| 284 | * hw_test_and_set_setup_guard: test & set setup guard (execute without |
| 285 | * interruption) |
| 286 | * |
| 287 | * This function returns guard value |
| 288 | */ |
| 289 | static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) |
| 290 | { |
| 291 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); |
| 292 | } |
| 293 | |
| 294 | /** |
| 295 | * hw_usb_set_address: configures USB address (execute without interruption) |
| 296 | * @value: new USB address |
| 297 | * |
| 298 | * This function explicitly sets the address, without the "USBADRA" (advance) |
| 299 | * feature, which is not supported by older versions of the controller. |
| 300 | */ |
| 301 | static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) |
| 302 | { |
| 303 | hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, |
| 304 | value << __ffs(DEVICEADDR_USBADR)); |
| 305 | } |
| 306 | |
| 307 | /** |
| 308 | * hw_usb_reset: restart device after a bus reset (execute without |
| 309 | * interruption) |
| 310 | * |
| 311 | * This function returns an error code |
| 312 | */ |
| 313 | static int hw_usb_reset(struct ci_hdrc *ci) |
| 314 | { |
| 315 | hw_usb_set_address(ci, 0); |
| 316 | |
| 317 | /* ESS flushes only at end?!? */ |
| 318 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
| 319 | |
| 320 | /* clear setup token semaphores */ |
| 321 | hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); |
| 322 | |
| 323 | /* clear complete status */ |
| 324 | hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); |
| 325 | |
| 326 | /* wait until all bits cleared */ |
| 327 | while (hw_read(ci, OP_ENDPTPRIME, ~0)) |
| 328 | udelay(10); /* not RTOS friendly */ |
| 329 | |
| 330 | /* reset all endpoints ? */ |
| 331 | |
| 332 | /* reset internal status and wait for further instructions |
| 333 | no need to verify the port reset status (ESS does it) */ |
| 334 | |
| 335 | return 0; |
| 336 | } |
| 337 | |
| 338 | /****************************************************************************** |
| 339 | * UTIL block |
| 340 | *****************************************************************************/ |
| 341 | |
| 342 | static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, |
| 343 | unsigned length) |
| 344 | { |
| 345 | int i; |
| 346 | u32 temp; |
| 347 | struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), |
| 348 | GFP_ATOMIC); |
| 349 | |
| 350 | if (node == NULL) |
| 351 | return -ENOMEM; |
| 352 | |
| 353 | node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma); |
| 354 | if (node->ptr == NULL) { |
| 355 | kfree(node); |
| 356 | return -ENOMEM; |
| 357 | } |
| 358 | |
| 359 | node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); |
| 360 | node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); |
| 361 | node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); |
| 362 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { |
| 363 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; |
| 364 | |
| 365 | if (hwreq->req.length == 0 |
| 366 | || hwreq->req.length % hwep->ep.maxpacket) |
| 367 | mul++; |
| 368 | node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO)); |
| 369 | } |
| 370 | |
| 371 | temp = (u32) (hwreq->req.dma + hwreq->req.actual); |
| 372 | if (length) { |
| 373 | node->ptr->page[0] = cpu_to_le32(temp); |
| 374 | for (i = 1; i < TD_PAGE_COUNT; i++) { |
| 375 | u32 page = temp + i * CI_HDRC_PAGE_SIZE; |
| 376 | page &= ~TD_RESERVED_MASK; |
| 377 | node->ptr->page[i] = cpu_to_le32(page); |
| 378 | } |
| 379 | } |
| 380 | |
| 381 | hwreq->req.actual += length; |
| 382 | |
| 383 | if (!list_empty(&hwreq->tds)) { |
| 384 | /* get the last entry */ |
| 385 | lastnode = list_entry(hwreq->tds.prev, |
| 386 | struct td_node, td); |
| 387 | lastnode->ptr->next = cpu_to_le32(node->dma); |
| 388 | } |
| 389 | |
| 390 | INIT_LIST_HEAD(&node->td); |
| 391 | list_add_tail(&node->td, &hwreq->tds); |
| 392 | |
| 393 | return 0; |
| 394 | } |
| 395 | |
| 396 | /** |
| 397 | * _usb_addr: calculates endpoint address from direction & number |
| 398 | * @ep: endpoint |
| 399 | */ |
| 400 | static inline u8 _usb_addr(struct ci_hw_ep *ep) |
| 401 | { |
| 402 | return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; |
| 403 | } |
| 404 | |
| 405 | /** |
| 406 | * _hardware_enqueue: configures a request at hardware level |
| 407 | * @hwep: endpoint |
| 408 | * @hwreq: request |
| 409 | * |
| 410 | * This function returns an error code |
| 411 | */ |
| 412 | static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
| 413 | { |
| 414 | struct ci_hdrc *ci = hwep->ci; |
| 415 | int ret = 0; |
| 416 | unsigned rest = hwreq->req.length; |
| 417 | int pages = TD_PAGE_COUNT; |
| 418 | struct td_node *firstnode, *lastnode; |
| 419 | |
| 420 | /* don't queue twice */ |
| 421 | if (hwreq->req.status == -EALREADY) |
| 422 | return -EALREADY; |
| 423 | |
| 424 | hwreq->req.status = -EALREADY; |
| 425 | |
| 426 | ret = usb_gadget_map_request_by_dev(ci->dev->parent, |
| 427 | &hwreq->req, hwep->dir); |
| 428 | if (ret) |
| 429 | return ret; |
| 430 | |
| 431 | /* |
| 432 | * The first buffer could be not page aligned. |
| 433 | * In that case we have to span into one extra td. |
| 434 | */ |
| 435 | if (hwreq->req.dma % PAGE_SIZE) |
| 436 | pages--; |
| 437 | |
| 438 | if (rest == 0) { |
| 439 | ret = add_td_to_list(hwep, hwreq, 0); |
| 440 | if (ret < 0) |
| 441 | goto done; |
| 442 | } |
| 443 | |
| 444 | while (rest > 0) { |
| 445 | unsigned count = min(hwreq->req.length - hwreq->req.actual, |
| 446 | (unsigned)(pages * CI_HDRC_PAGE_SIZE)); |
| 447 | ret = add_td_to_list(hwep, hwreq, count); |
| 448 | if (ret < 0) |
| 449 | goto done; |
| 450 | |
| 451 | rest -= count; |
| 452 | } |
| 453 | |
| 454 | if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX |
| 455 | && (hwreq->req.length % hwep->ep.maxpacket == 0)) { |
| 456 | ret = add_td_to_list(hwep, hwreq, 0); |
| 457 | if (ret < 0) |
| 458 | goto done; |
| 459 | } |
| 460 | |
| 461 | firstnode = list_first_entry(&hwreq->tds, struct td_node, td); |
| 462 | |
| 463 | lastnode = list_entry(hwreq->tds.prev, |
| 464 | struct td_node, td); |
| 465 | |
| 466 | lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); |
| 467 | if (!hwreq->req.no_interrupt) |
| 468 | lastnode->ptr->token |= cpu_to_le32(TD_IOC); |
| 469 | wmb(); |
| 470 | |
| 471 | hwreq->req.actual = 0; |
| 472 | if (!list_empty(&hwep->qh.queue)) { |
| 473 | struct ci_hw_req *hwreqprev; |
| 474 | int n = hw_ep_bit(hwep->num, hwep->dir); |
| 475 | int tmp_stat; |
| 476 | struct td_node *prevlastnode; |
| 477 | u32 next = firstnode->dma & TD_ADDR_MASK; |
| 478 | |
| 479 | hwreqprev = list_entry(hwep->qh.queue.prev, |
| 480 | struct ci_hw_req, queue); |
| 481 | prevlastnode = list_entry(hwreqprev->tds.prev, |
| 482 | struct td_node, td); |
| 483 | |
| 484 | prevlastnode->ptr->next = cpu_to_le32(next); |
| 485 | wmb(); |
| 486 | if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
| 487 | goto done; |
| 488 | do { |
| 489 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); |
| 490 | tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); |
| 491 | } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); |
| 492 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); |
| 493 | if (tmp_stat) |
| 494 | goto done; |
| 495 | } |
| 496 | |
| 497 | /* QH configuration */ |
| 498 | hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); |
| 499 | hwep->qh.ptr->td.token &= |
| 500 | cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); |
| 501 | |
| 502 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { |
| 503 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; |
| 504 | |
| 505 | if (hwreq->req.length == 0 |
| 506 | || hwreq->req.length % hwep->ep.maxpacket) |
| 507 | mul++; |
| 508 | hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT)); |
| 509 | } |
| 510 | |
| 511 | ret = hw_ep_prime(ci, hwep->num, hwep->dir, |
| 512 | hwep->type == USB_ENDPOINT_XFER_CONTROL); |
| 513 | done: |
| 514 | return ret; |
| 515 | } |
| 516 | |
| 517 | /* |
| 518 | * free_pending_td: remove a pending request for the endpoint |
| 519 | * @hwep: endpoint |
| 520 | */ |
| 521 | static void free_pending_td(struct ci_hw_ep *hwep) |
| 522 | { |
| 523 | struct td_node *pending = hwep->pending_td; |
| 524 | |
| 525 | dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); |
| 526 | hwep->pending_td = NULL; |
| 527 | kfree(pending); |
| 528 | } |
| 529 | |
| 530 | static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep, |
| 531 | struct td_node *node) |
| 532 | { |
| 533 | hwep->qh.ptr->td.next = cpu_to_le32(node->dma); |
| 534 | hwep->qh.ptr->td.token &= |
| 535 | cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE)); |
| 536 | |
| 537 | return hw_ep_prime(ci, hwep->num, hwep->dir, |
| 538 | hwep->type == USB_ENDPOINT_XFER_CONTROL); |
| 539 | } |
| 540 | |
| 541 | /** |
| 542 | * _hardware_dequeue: handles a request at hardware level |
| 543 | * @gadget: gadget |
| 544 | * @hwep: endpoint |
| 545 | * |
| 546 | * This function returns an error code |
| 547 | */ |
| 548 | static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
| 549 | { |
| 550 | u32 tmptoken; |
| 551 | struct td_node *node, *tmpnode; |
| 552 | unsigned remaining_length; |
| 553 | unsigned actual = hwreq->req.length; |
| 554 | struct ci_hdrc *ci = hwep->ci; |
| 555 | |
| 556 | if (hwreq->req.status != -EALREADY) |
| 557 | return -EINVAL; |
| 558 | |
| 559 | hwreq->req.status = 0; |
| 560 | |
| 561 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
| 562 | tmptoken = le32_to_cpu(node->ptr->token); |
| 563 | if ((TD_STATUS_ACTIVE & tmptoken) != 0) { |
| 564 | int n = hw_ep_bit(hwep->num, hwep->dir); |
| 565 | |
| 566 | if (ci->rev == CI_REVISION_24) |
| 567 | if (!hw_read(ci, OP_ENDPTSTAT, BIT(n))) |
| 568 | reprime_dtd(ci, hwep, node); |
| 569 | hwreq->req.status = -EALREADY; |
| 570 | return -EBUSY; |
| 571 | } |
| 572 | |
| 573 | remaining_length = (tmptoken & TD_TOTAL_BYTES); |
| 574 | remaining_length >>= __ffs(TD_TOTAL_BYTES); |
| 575 | actual -= remaining_length; |
| 576 | |
| 577 | hwreq->req.status = tmptoken & TD_STATUS; |
| 578 | if ((TD_STATUS_HALTED & hwreq->req.status)) { |
| 579 | hwreq->req.status = -EPIPE; |
| 580 | break; |
| 581 | } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { |
| 582 | hwreq->req.status = -EPROTO; |
| 583 | break; |
| 584 | } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { |
| 585 | hwreq->req.status = -EILSEQ; |
| 586 | break; |
| 587 | } |
| 588 | |
| 589 | if (remaining_length) { |
| 590 | if (hwep->dir == TX) { |
| 591 | hwreq->req.status = -EPROTO; |
| 592 | break; |
| 593 | } |
| 594 | } |
| 595 | /* |
| 596 | * As the hardware could still address the freed td |
| 597 | * which will run the udc unusable, the cleanup of the |
| 598 | * td has to be delayed by one. |
| 599 | */ |
| 600 | if (hwep->pending_td) |
| 601 | free_pending_td(hwep); |
| 602 | |
| 603 | hwep->pending_td = node; |
| 604 | list_del_init(&node->td); |
| 605 | } |
| 606 | |
| 607 | usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent, |
| 608 | &hwreq->req, hwep->dir); |
| 609 | |
| 610 | hwreq->req.actual += actual; |
| 611 | |
| 612 | if (hwreq->req.status) |
| 613 | return hwreq->req.status; |
| 614 | |
| 615 | return hwreq->req.actual; |
| 616 | } |
| 617 | |
| 618 | /** |
| 619 | * _ep_nuke: dequeues all endpoint requests |
| 620 | * @hwep: endpoint |
| 621 | * |
| 622 | * This function returns an error code |
| 623 | * Caller must hold lock |
| 624 | */ |
| 625 | static int _ep_nuke(struct ci_hw_ep *hwep) |
| 626 | __releases(hwep->lock) |
| 627 | __acquires(hwep->lock) |
| 628 | { |
| 629 | struct td_node *node, *tmpnode; |
| 630 | if (hwep == NULL) |
| 631 | return -EINVAL; |
| 632 | |
| 633 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
| 634 | |
| 635 | while (!list_empty(&hwep->qh.queue)) { |
| 636 | |
| 637 | /* pop oldest request */ |
| 638 | struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, |
| 639 | struct ci_hw_req, queue); |
| 640 | |
| 641 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
| 642 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); |
| 643 | list_del_init(&node->td); |
| 644 | node->ptr = NULL; |
| 645 | kfree(node); |
| 646 | } |
| 647 | |
| 648 | list_del_init(&hwreq->queue); |
| 649 | hwreq->req.status = -ESHUTDOWN; |
| 650 | |
| 651 | if (hwreq->req.complete != NULL) { |
| 652 | spin_unlock(hwep->lock); |
| 653 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
| 654 | spin_lock(hwep->lock); |
| 655 | } |
| 656 | } |
| 657 | |
| 658 | if (hwep->pending_td) |
| 659 | free_pending_td(hwep); |
| 660 | |
| 661 | return 0; |
| 662 | } |
| 663 | |
| 664 | static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer) |
| 665 | { |
| 666 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 667 | int direction, retval = 0; |
| 668 | unsigned long flags; |
| 669 | |
| 670 | if (ep == NULL || hwep->ep.desc == NULL) |
| 671 | return -EINVAL; |
| 672 | |
| 673 | if (usb_endpoint_xfer_isoc(hwep->ep.desc)) |
| 674 | return -EOPNOTSUPP; |
| 675 | |
| 676 | spin_lock_irqsave(hwep->lock, flags); |
| 677 | |
| 678 | if (value && hwep->dir == TX && check_transfer && |
| 679 | !list_empty(&hwep->qh.queue) && |
| 680 | !usb_endpoint_xfer_control(hwep->ep.desc)) { |
| 681 | spin_unlock_irqrestore(hwep->lock, flags); |
| 682 | return -EAGAIN; |
| 683 | } |
| 684 | |
| 685 | direction = hwep->dir; |
| 686 | do { |
| 687 | retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); |
| 688 | |
| 689 | if (!value) |
| 690 | hwep->wedge = 0; |
| 691 | |
| 692 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
| 693 | hwep->dir = (hwep->dir == TX) ? RX : TX; |
| 694 | |
| 695 | } while (hwep->dir != direction); |
| 696 | |
| 697 | spin_unlock_irqrestore(hwep->lock, flags); |
| 698 | return retval; |
| 699 | } |
| 700 | |
| 701 | |
| 702 | /** |
| 703 | * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts |
| 704 | * @gadget: gadget |
| 705 | * |
| 706 | * This function returns an error code |
| 707 | */ |
| 708 | static int _gadget_stop_activity(struct usb_gadget *gadget) |
| 709 | { |
| 710 | struct usb_ep *ep; |
| 711 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
| 712 | unsigned long flags; |
| 713 | |
| 714 | /* flush all endpoints */ |
| 715 | gadget_for_each_ep(ep, gadget) { |
| 716 | usb_ep_fifo_flush(ep); |
| 717 | } |
| 718 | usb_ep_fifo_flush(&ci->ep0out->ep); |
| 719 | usb_ep_fifo_flush(&ci->ep0in->ep); |
| 720 | |
| 721 | /* make sure to disable all endpoints */ |
| 722 | gadget_for_each_ep(ep, gadget) { |
| 723 | usb_ep_disable(ep); |
| 724 | } |
| 725 | |
| 726 | if (ci->status != NULL) { |
| 727 | usb_ep_free_request(&ci->ep0in->ep, ci->status); |
| 728 | ci->status = NULL; |
| 729 | } |
| 730 | |
| 731 | spin_lock_irqsave(&ci->lock, flags); |
| 732 | ci->gadget.speed = USB_SPEED_UNKNOWN; |
| 733 | ci->remote_wakeup = 0; |
| 734 | ci->suspended = 0; |
| 735 | spin_unlock_irqrestore(&ci->lock, flags); |
| 736 | |
| 737 | return 0; |
| 738 | } |
| 739 | |
| 740 | /****************************************************************************** |
| 741 | * ISR block |
| 742 | *****************************************************************************/ |
| 743 | /** |
| 744 | * isr_reset_handler: USB reset interrupt handler |
| 745 | * @ci: UDC device |
| 746 | * |
| 747 | * This function resets USB engine after a bus reset occurred |
| 748 | */ |
| 749 | static void isr_reset_handler(struct ci_hdrc *ci) |
| 750 | __releases(ci->lock) |
| 751 | __acquires(ci->lock) |
| 752 | { |
| 753 | int retval; |
| 754 | |
| 755 | spin_unlock(&ci->lock); |
| 756 | if (ci->gadget.speed != USB_SPEED_UNKNOWN) |
| 757 | usb_gadget_udc_reset(&ci->gadget, ci->driver); |
| 758 | |
| 759 | retval = _gadget_stop_activity(&ci->gadget); |
| 760 | if (retval) |
| 761 | goto done; |
| 762 | |
| 763 | retval = hw_usb_reset(ci); |
| 764 | if (retval) |
| 765 | goto done; |
| 766 | |
| 767 | ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); |
| 768 | if (ci->status == NULL) |
| 769 | retval = -ENOMEM; |
| 770 | |
| 771 | done: |
| 772 | spin_lock(&ci->lock); |
| 773 | |
| 774 | if (retval) |
| 775 | dev_err(ci->dev, "error: %i\n", retval); |
| 776 | } |
| 777 | |
| 778 | /** |
| 779 | * isr_get_status_complete: get_status request complete function |
| 780 | * @ep: endpoint |
| 781 | * @req: request handled |
| 782 | * |
| 783 | * Caller must release lock |
| 784 | */ |
| 785 | static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) |
| 786 | { |
| 787 | if (ep == NULL || req == NULL) |
| 788 | return; |
| 789 | |
| 790 | kfree(req->buf); |
| 791 | usb_ep_free_request(ep, req); |
| 792 | } |
| 793 | |
| 794 | /** |
| 795 | * _ep_queue: queues (submits) an I/O request to an endpoint |
| 796 | * @ep: endpoint |
| 797 | * @req: request |
| 798 | * @gfp_flags: GFP flags (not used) |
| 799 | * |
| 800 | * Caller must hold lock |
| 801 | * This function returns an error code |
| 802 | */ |
| 803 | static int _ep_queue(struct usb_ep *ep, struct usb_request *req, |
| 804 | gfp_t __maybe_unused gfp_flags) |
| 805 | { |
| 806 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 807 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); |
| 808 | struct ci_hdrc *ci = hwep->ci; |
| 809 | int retval = 0; |
| 810 | |
| 811 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
| 812 | return -EINVAL; |
| 813 | |
| 814 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
| 815 | if (req->length) |
| 816 | hwep = (ci->ep0_dir == RX) ? |
| 817 | ci->ep0out : ci->ep0in; |
| 818 | if (!list_empty(&hwep->qh.queue)) { |
| 819 | _ep_nuke(hwep); |
| 820 | dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", |
| 821 | _usb_addr(hwep)); |
| 822 | } |
| 823 | } |
| 824 | |
| 825 | if (usb_endpoint_xfer_isoc(hwep->ep.desc) && |
| 826 | hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) { |
| 827 | dev_err(hwep->ci->dev, "request length too big for isochronous\n"); |
| 828 | return -EMSGSIZE; |
| 829 | } |
| 830 | |
| 831 | /* first nuke then test link, e.g. previous status has not sent */ |
| 832 | if (!list_empty(&hwreq->queue)) { |
| 833 | dev_err(hwep->ci->dev, "request already in queue\n"); |
| 834 | return -EBUSY; |
| 835 | } |
| 836 | |
| 837 | /* push request */ |
| 838 | hwreq->req.status = -EINPROGRESS; |
| 839 | hwreq->req.actual = 0; |
| 840 | |
| 841 | retval = _hardware_enqueue(hwep, hwreq); |
| 842 | |
| 843 | if (retval == -EALREADY) |
| 844 | retval = 0; |
| 845 | if (!retval) |
| 846 | list_add_tail(&hwreq->queue, &hwep->qh.queue); |
| 847 | |
| 848 | return retval; |
| 849 | } |
| 850 | |
| 851 | /** |
| 852 | * isr_get_status_response: get_status request response |
| 853 | * @ci: ci struct |
| 854 | * @setup: setup request packet |
| 855 | * |
| 856 | * This function returns an error code |
| 857 | */ |
| 858 | static int isr_get_status_response(struct ci_hdrc *ci, |
| 859 | struct usb_ctrlrequest *setup) |
| 860 | __releases(hwep->lock) |
| 861 | __acquires(hwep->lock) |
| 862 | { |
| 863 | struct ci_hw_ep *hwep = ci->ep0in; |
| 864 | struct usb_request *req = NULL; |
| 865 | gfp_t gfp_flags = GFP_ATOMIC; |
| 866 | int dir, num, retval; |
| 867 | |
| 868 | if (hwep == NULL || setup == NULL) |
| 869 | return -EINVAL; |
| 870 | |
| 871 | spin_unlock(hwep->lock); |
| 872 | req = usb_ep_alloc_request(&hwep->ep, gfp_flags); |
| 873 | spin_lock(hwep->lock); |
| 874 | if (req == NULL) |
| 875 | return -ENOMEM; |
| 876 | |
| 877 | req->complete = isr_get_status_complete; |
| 878 | req->length = 2; |
| 879 | req->buf = kzalloc(req->length, gfp_flags); |
| 880 | if (req->buf == NULL) { |
| 881 | retval = -ENOMEM; |
| 882 | goto err_free_req; |
| 883 | } |
| 884 | |
| 885 | if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { |
| 886 | *(u16 *)req->buf = (ci->remote_wakeup << 1) | |
| 887 | ci->gadget.is_selfpowered; |
| 888 | } else if ((setup->bRequestType & USB_RECIP_MASK) \ |
| 889 | == USB_RECIP_ENDPOINT) { |
| 890 | dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? |
| 891 | TX : RX; |
| 892 | num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; |
| 893 | *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); |
| 894 | } |
| 895 | /* else do nothing; reserved for future use */ |
| 896 | |
| 897 | retval = _ep_queue(&hwep->ep, req, gfp_flags); |
| 898 | if (retval) |
| 899 | goto err_free_buf; |
| 900 | |
| 901 | return 0; |
| 902 | |
| 903 | err_free_buf: |
| 904 | kfree(req->buf); |
| 905 | err_free_req: |
| 906 | spin_unlock(hwep->lock); |
| 907 | usb_ep_free_request(&hwep->ep, req); |
| 908 | spin_lock(hwep->lock); |
| 909 | return retval; |
| 910 | } |
| 911 | |
| 912 | /** |
| 913 | * isr_setup_status_complete: setup_status request complete function |
| 914 | * @ep: endpoint |
| 915 | * @req: request handled |
| 916 | * |
| 917 | * Caller must release lock. Put the port in test mode if test mode |
| 918 | * feature is selected. |
| 919 | */ |
| 920 | static void |
| 921 | isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) |
| 922 | { |
| 923 | struct ci_hdrc *ci = req->context; |
| 924 | unsigned long flags; |
| 925 | |
| 926 | if (ci->setaddr) { |
| 927 | hw_usb_set_address(ci, ci->address); |
| 928 | ci->setaddr = false; |
| 929 | if (ci->address) |
| 930 | usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS); |
| 931 | } |
| 932 | |
| 933 | spin_lock_irqsave(&ci->lock, flags); |
| 934 | if (ci->test_mode) |
| 935 | hw_port_test_set(ci, ci->test_mode); |
| 936 | spin_unlock_irqrestore(&ci->lock, flags); |
| 937 | } |
| 938 | |
| 939 | /** |
| 940 | * isr_setup_status_phase: queues the status phase of a setup transation |
| 941 | * @ci: ci struct |
| 942 | * |
| 943 | * This function returns an error code |
| 944 | */ |
| 945 | static int isr_setup_status_phase(struct ci_hdrc *ci) |
| 946 | { |
| 947 | struct ci_hw_ep *hwep; |
| 948 | |
| 949 | /* |
| 950 | * Unexpected USB controller behavior, caused by bad signal integrity |
| 951 | * or ground reference problems, can lead to isr_setup_status_phase |
| 952 | * being called with ci->status equal to NULL. |
| 953 | * If this situation occurs, you should review your USB hardware design. |
| 954 | */ |
| 955 | if (WARN_ON_ONCE(!ci->status)) |
| 956 | return -EPIPE; |
| 957 | |
| 958 | hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; |
| 959 | ci->status->context = ci; |
| 960 | ci->status->complete = isr_setup_status_complete; |
| 961 | |
| 962 | return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); |
| 963 | } |
| 964 | |
| 965 | /** |
| 966 | * isr_tr_complete_low: transaction complete low level handler |
| 967 | * @hwep: endpoint |
| 968 | * |
| 969 | * This function returns an error code |
| 970 | * Caller must hold lock |
| 971 | */ |
| 972 | static int isr_tr_complete_low(struct ci_hw_ep *hwep) |
| 973 | __releases(hwep->lock) |
| 974 | __acquires(hwep->lock) |
| 975 | { |
| 976 | struct ci_hw_req *hwreq, *hwreqtemp; |
| 977 | struct ci_hw_ep *hweptemp = hwep; |
| 978 | int retval = 0; |
| 979 | |
| 980 | list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, |
| 981 | queue) { |
| 982 | retval = _hardware_dequeue(hwep, hwreq); |
| 983 | if (retval < 0) |
| 984 | break; |
| 985 | list_del_init(&hwreq->queue); |
| 986 | if (hwreq->req.complete != NULL) { |
| 987 | spin_unlock(hwep->lock); |
| 988 | if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && |
| 989 | hwreq->req.length) |
| 990 | hweptemp = hwep->ci->ep0in; |
| 991 | usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req); |
| 992 | spin_lock(hwep->lock); |
| 993 | } |
| 994 | } |
| 995 | |
| 996 | if (retval == -EBUSY) |
| 997 | retval = 0; |
| 998 | |
| 999 | return retval; |
| 1000 | } |
| 1001 | |
| 1002 | static int otg_a_alt_hnp_support(struct ci_hdrc *ci) |
| 1003 | { |
| 1004 | dev_warn(&ci->gadget.dev, |
| 1005 | "connect the device to an alternate port if you want HNP\n"); |
| 1006 | return isr_setup_status_phase(ci); |
| 1007 | } |
| 1008 | |
| 1009 | /** |
| 1010 | * isr_setup_packet_handler: setup packet handler |
| 1011 | * @ci: UDC descriptor |
| 1012 | * |
| 1013 | * This function handles setup packet |
| 1014 | */ |
| 1015 | static void isr_setup_packet_handler(struct ci_hdrc *ci) |
| 1016 | __releases(ci->lock) |
| 1017 | __acquires(ci->lock) |
| 1018 | { |
| 1019 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[0]; |
| 1020 | struct usb_ctrlrequest req; |
| 1021 | int type, num, dir, err = -EINVAL; |
| 1022 | u8 tmode = 0; |
| 1023 | |
| 1024 | /* |
| 1025 | * Flush data and handshake transactions of previous |
| 1026 | * setup packet. |
| 1027 | */ |
| 1028 | _ep_nuke(ci->ep0out); |
| 1029 | _ep_nuke(ci->ep0in); |
| 1030 | |
| 1031 | /* read_setup_packet */ |
| 1032 | do { |
| 1033 | hw_test_and_set_setup_guard(ci); |
| 1034 | memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); |
| 1035 | } while (!hw_test_and_clear_setup_guard(ci)); |
| 1036 | |
| 1037 | type = req.bRequestType; |
| 1038 | |
| 1039 | ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; |
| 1040 | |
| 1041 | switch (req.bRequest) { |
| 1042 | case USB_REQ_CLEAR_FEATURE: |
| 1043 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && |
| 1044 | le16_to_cpu(req.wValue) == |
| 1045 | USB_ENDPOINT_HALT) { |
| 1046 | if (req.wLength != 0) |
| 1047 | break; |
| 1048 | num = le16_to_cpu(req.wIndex); |
| 1049 | dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX; |
| 1050 | num &= USB_ENDPOINT_NUMBER_MASK; |
| 1051 | if (dir == TX) |
| 1052 | num += ci->hw_ep_max / 2; |
| 1053 | if (!ci->ci_hw_ep[num].wedge) { |
| 1054 | spin_unlock(&ci->lock); |
| 1055 | err = usb_ep_clear_halt( |
| 1056 | &ci->ci_hw_ep[num].ep); |
| 1057 | spin_lock(&ci->lock); |
| 1058 | if (err) |
| 1059 | break; |
| 1060 | } |
| 1061 | err = isr_setup_status_phase(ci); |
| 1062 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && |
| 1063 | le16_to_cpu(req.wValue) == |
| 1064 | USB_DEVICE_REMOTE_WAKEUP) { |
| 1065 | if (req.wLength != 0) |
| 1066 | break; |
| 1067 | ci->remote_wakeup = 0; |
| 1068 | err = isr_setup_status_phase(ci); |
| 1069 | } else { |
| 1070 | goto delegate; |
| 1071 | } |
| 1072 | break; |
| 1073 | case USB_REQ_GET_STATUS: |
| 1074 | if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) || |
| 1075 | le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) && |
| 1076 | type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && |
| 1077 | type != (USB_DIR_IN|USB_RECIP_INTERFACE)) |
| 1078 | goto delegate; |
| 1079 | if (le16_to_cpu(req.wLength) != 2 || |
| 1080 | le16_to_cpu(req.wValue) != 0) |
| 1081 | break; |
| 1082 | err = isr_get_status_response(ci, &req); |
| 1083 | break; |
| 1084 | case USB_REQ_SET_ADDRESS: |
| 1085 | if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) |
| 1086 | goto delegate; |
| 1087 | if (le16_to_cpu(req.wLength) != 0 || |
| 1088 | le16_to_cpu(req.wIndex) != 0) |
| 1089 | break; |
| 1090 | ci->address = (u8)le16_to_cpu(req.wValue); |
| 1091 | ci->setaddr = true; |
| 1092 | err = isr_setup_status_phase(ci); |
| 1093 | break; |
| 1094 | case USB_REQ_SET_FEATURE: |
| 1095 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && |
| 1096 | le16_to_cpu(req.wValue) == |
| 1097 | USB_ENDPOINT_HALT) { |
| 1098 | if (req.wLength != 0) |
| 1099 | break; |
| 1100 | num = le16_to_cpu(req.wIndex); |
| 1101 | dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX; |
| 1102 | num &= USB_ENDPOINT_NUMBER_MASK; |
| 1103 | if (dir == TX) |
| 1104 | num += ci->hw_ep_max / 2; |
| 1105 | |
| 1106 | spin_unlock(&ci->lock); |
| 1107 | err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false); |
| 1108 | spin_lock(&ci->lock); |
| 1109 | if (!err) |
| 1110 | isr_setup_status_phase(ci); |
| 1111 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { |
| 1112 | if (req.wLength != 0) |
| 1113 | break; |
| 1114 | switch (le16_to_cpu(req.wValue)) { |
| 1115 | case USB_DEVICE_REMOTE_WAKEUP: |
| 1116 | ci->remote_wakeup = 1; |
| 1117 | err = isr_setup_status_phase(ci); |
| 1118 | break; |
| 1119 | case USB_DEVICE_TEST_MODE: |
| 1120 | tmode = le16_to_cpu(req.wIndex) >> 8; |
| 1121 | switch (tmode) { |
| 1122 | case TEST_J: |
| 1123 | case TEST_K: |
| 1124 | case TEST_SE0_NAK: |
| 1125 | case TEST_PACKET: |
| 1126 | case TEST_FORCE_EN: |
| 1127 | ci->test_mode = tmode; |
| 1128 | err = isr_setup_status_phase( |
| 1129 | ci); |
| 1130 | break; |
| 1131 | default: |
| 1132 | break; |
| 1133 | } |
| 1134 | break; |
| 1135 | case USB_DEVICE_B_HNP_ENABLE: |
| 1136 | if (ci_otg_is_fsm_mode(ci)) { |
| 1137 | ci->gadget.b_hnp_enable = 1; |
| 1138 | err = isr_setup_status_phase( |
| 1139 | ci); |
| 1140 | } |
| 1141 | break; |
| 1142 | case USB_DEVICE_A_ALT_HNP_SUPPORT: |
| 1143 | if (ci_otg_is_fsm_mode(ci)) |
| 1144 | err = otg_a_alt_hnp_support(ci); |
| 1145 | break; |
| 1146 | case USB_DEVICE_A_HNP_SUPPORT: |
| 1147 | if (ci_otg_is_fsm_mode(ci)) { |
| 1148 | ci->gadget.a_hnp_support = 1; |
| 1149 | err = isr_setup_status_phase( |
| 1150 | ci); |
| 1151 | } |
| 1152 | break; |
| 1153 | default: |
| 1154 | goto delegate; |
| 1155 | } |
| 1156 | } else { |
| 1157 | goto delegate; |
| 1158 | } |
| 1159 | break; |
| 1160 | default: |
| 1161 | delegate: |
| 1162 | if (req.wLength == 0) /* no data phase */ |
| 1163 | ci->ep0_dir = TX; |
| 1164 | |
| 1165 | spin_unlock(&ci->lock); |
| 1166 | err = ci->driver->setup(&ci->gadget, &req); |
| 1167 | spin_lock(&ci->lock); |
| 1168 | break; |
| 1169 | } |
| 1170 | |
| 1171 | if (err < 0) { |
| 1172 | spin_unlock(&ci->lock); |
| 1173 | if (_ep_set_halt(&hwep->ep, 1, false)) |
| 1174 | dev_err(ci->dev, "error: _ep_set_halt\n"); |
| 1175 | spin_lock(&ci->lock); |
| 1176 | } |
| 1177 | } |
| 1178 | |
| 1179 | /** |
| 1180 | * isr_tr_complete_handler: transaction complete interrupt handler |
| 1181 | * @ci: UDC descriptor |
| 1182 | * |
| 1183 | * This function handles traffic events |
| 1184 | */ |
| 1185 | static void isr_tr_complete_handler(struct ci_hdrc *ci) |
| 1186 | __releases(ci->lock) |
| 1187 | __acquires(ci->lock) |
| 1188 | { |
| 1189 | unsigned i; |
| 1190 | int err; |
| 1191 | |
| 1192 | for (i = 0; i < ci->hw_ep_max; i++) { |
| 1193 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
| 1194 | |
| 1195 | if (hwep->ep.desc == NULL) |
| 1196 | continue; /* not configured */ |
| 1197 | |
| 1198 | if (hw_test_and_clear_complete(ci, i)) { |
| 1199 | err = isr_tr_complete_low(hwep); |
| 1200 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
| 1201 | if (err > 0) /* needs status phase */ |
| 1202 | err = isr_setup_status_phase(ci); |
| 1203 | if (err < 0) { |
| 1204 | spin_unlock(&ci->lock); |
| 1205 | if (_ep_set_halt(&hwep->ep, 1, false)) |
| 1206 | dev_err(ci->dev, |
| 1207 | "error: _ep_set_halt\n"); |
| 1208 | spin_lock(&ci->lock); |
| 1209 | } |
| 1210 | } |
| 1211 | } |
| 1212 | |
| 1213 | /* Only handle setup packet below */ |
| 1214 | if (i == 0 && |
| 1215 | hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0))) |
| 1216 | isr_setup_packet_handler(ci); |
| 1217 | } |
| 1218 | } |
| 1219 | |
| 1220 | /****************************************************************************** |
| 1221 | * ENDPT block |
| 1222 | *****************************************************************************/ |
| 1223 | /** |
| 1224 | * ep_enable: configure endpoint, making it usable |
| 1225 | * |
| 1226 | * Check usb_ep_enable() at "usb_gadget.h" for details |
| 1227 | */ |
| 1228 | static int ep_enable(struct usb_ep *ep, |
| 1229 | const struct usb_endpoint_descriptor *desc) |
| 1230 | { |
| 1231 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 1232 | int retval = 0; |
| 1233 | unsigned long flags; |
| 1234 | u32 cap = 0; |
| 1235 | |
| 1236 | if (ep == NULL || desc == NULL) |
| 1237 | return -EINVAL; |
| 1238 | |
| 1239 | spin_lock_irqsave(hwep->lock, flags); |
| 1240 | |
| 1241 | /* only internal SW should enable ctrl endpts */ |
| 1242 | |
| 1243 | if (!list_empty(&hwep->qh.queue)) { |
| 1244 | dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); |
| 1245 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1246 | return -EBUSY; |
| 1247 | } |
| 1248 | |
| 1249 | hwep->ep.desc = desc; |
| 1250 | |
| 1251 | hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; |
| 1252 | hwep->num = usb_endpoint_num(desc); |
| 1253 | hwep->type = usb_endpoint_type(desc); |
| 1254 | |
| 1255 | hwep->ep.maxpacket = usb_endpoint_maxp(desc); |
| 1256 | hwep->ep.mult = usb_endpoint_maxp_mult(desc); |
| 1257 | |
| 1258 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
| 1259 | cap |= QH_IOS; |
| 1260 | |
| 1261 | cap |= QH_ZLT; |
| 1262 | cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; |
| 1263 | /* |
| 1264 | * For ISO-TX, we set mult at QH as the largest value, and use |
| 1265 | * MultO at TD as real mult value. |
| 1266 | */ |
| 1267 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) |
| 1268 | cap |= 3 << __ffs(QH_MULT); |
| 1269 | |
| 1270 | hwep->qh.ptr->cap = cpu_to_le32(cap); |
| 1271 | |
| 1272 | hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ |
| 1273 | |
| 1274 | if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
| 1275 | dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n"); |
| 1276 | retval = -EINVAL; |
| 1277 | } |
| 1278 | |
| 1279 | /* |
| 1280 | * Enable endpoints in the HW other than ep0 as ep0 |
| 1281 | * is always enabled |
| 1282 | */ |
| 1283 | if (hwep->num) |
| 1284 | retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, |
| 1285 | hwep->type); |
| 1286 | |
| 1287 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1288 | return retval; |
| 1289 | } |
| 1290 | |
| 1291 | /** |
| 1292 | * ep_disable: endpoint is no longer usable |
| 1293 | * |
| 1294 | * Check usb_ep_disable() at "usb_gadget.h" for details |
| 1295 | */ |
| 1296 | static int ep_disable(struct usb_ep *ep) |
| 1297 | { |
| 1298 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 1299 | int direction, retval = 0; |
| 1300 | unsigned long flags; |
| 1301 | |
| 1302 | if (ep == NULL) |
| 1303 | return -EINVAL; |
| 1304 | else if (hwep->ep.desc == NULL) |
| 1305 | return -EBUSY; |
| 1306 | |
| 1307 | spin_lock_irqsave(hwep->lock, flags); |
| 1308 | if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) { |
| 1309 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1310 | return 0; |
| 1311 | } |
| 1312 | |
| 1313 | /* only internal SW should disable ctrl endpts */ |
| 1314 | |
| 1315 | direction = hwep->dir; |
| 1316 | do { |
| 1317 | retval |= _ep_nuke(hwep); |
| 1318 | retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); |
| 1319 | |
| 1320 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
| 1321 | hwep->dir = (hwep->dir == TX) ? RX : TX; |
| 1322 | |
| 1323 | } while (hwep->dir != direction); |
| 1324 | |
| 1325 | hwep->ep.desc = NULL; |
| 1326 | |
| 1327 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1328 | return retval; |
| 1329 | } |
| 1330 | |
| 1331 | /** |
| 1332 | * ep_alloc_request: allocate a request object to use with this endpoint |
| 1333 | * |
| 1334 | * Check usb_ep_alloc_request() at "usb_gadget.h" for details |
| 1335 | */ |
| 1336 | static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) |
| 1337 | { |
| 1338 | struct ci_hw_req *hwreq = NULL; |
| 1339 | |
| 1340 | if (ep == NULL) |
| 1341 | return NULL; |
| 1342 | |
| 1343 | hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); |
| 1344 | if (hwreq != NULL) { |
| 1345 | INIT_LIST_HEAD(&hwreq->queue); |
| 1346 | INIT_LIST_HEAD(&hwreq->tds); |
| 1347 | } |
| 1348 | |
| 1349 | return (hwreq == NULL) ? NULL : &hwreq->req; |
| 1350 | } |
| 1351 | |
| 1352 | /** |
| 1353 | * ep_free_request: frees a request object |
| 1354 | * |
| 1355 | * Check usb_ep_free_request() at "usb_gadget.h" for details |
| 1356 | */ |
| 1357 | static void ep_free_request(struct usb_ep *ep, struct usb_request *req) |
| 1358 | { |
| 1359 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 1360 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); |
| 1361 | struct td_node *node, *tmpnode; |
| 1362 | unsigned long flags; |
| 1363 | |
| 1364 | if (ep == NULL || req == NULL) { |
| 1365 | return; |
| 1366 | } else if (!list_empty(&hwreq->queue)) { |
| 1367 | dev_err(hwep->ci->dev, "freeing queued request\n"); |
| 1368 | return; |
| 1369 | } |
| 1370 | |
| 1371 | spin_lock_irqsave(hwep->lock, flags); |
| 1372 | |
| 1373 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
| 1374 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); |
| 1375 | list_del_init(&node->td); |
| 1376 | node->ptr = NULL; |
| 1377 | kfree(node); |
| 1378 | } |
| 1379 | |
| 1380 | kfree(hwreq); |
| 1381 | |
| 1382 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1383 | } |
| 1384 | |
| 1385 | /** |
| 1386 | * ep_queue: queues (submits) an I/O request to an endpoint |
| 1387 | * |
| 1388 | * Check usb_ep_queue()* at usb_gadget.h" for details |
| 1389 | */ |
| 1390 | static int ep_queue(struct usb_ep *ep, struct usb_request *req, |
| 1391 | gfp_t __maybe_unused gfp_flags) |
| 1392 | { |
| 1393 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 1394 | int retval = 0; |
| 1395 | unsigned long flags; |
| 1396 | |
| 1397 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
| 1398 | return -EINVAL; |
| 1399 | |
| 1400 | spin_lock_irqsave(hwep->lock, flags); |
| 1401 | if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) { |
| 1402 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1403 | return 0; |
| 1404 | } |
| 1405 | retval = _ep_queue(ep, req, gfp_flags); |
| 1406 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1407 | return retval; |
| 1408 | } |
| 1409 | |
| 1410 | /** |
| 1411 | * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint |
| 1412 | * |
| 1413 | * Check usb_ep_dequeue() at "usb_gadget.h" for details |
| 1414 | */ |
| 1415 | static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) |
| 1416 | { |
| 1417 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 1418 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); |
| 1419 | unsigned long flags; |
| 1420 | struct td_node *node, *tmpnode; |
| 1421 | |
| 1422 | if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || |
| 1423 | hwep->ep.desc == NULL || list_empty(&hwreq->queue) || |
| 1424 | list_empty(&hwep->qh.queue)) |
| 1425 | return -EINVAL; |
| 1426 | |
| 1427 | spin_lock_irqsave(hwep->lock, flags); |
| 1428 | if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN) |
| 1429 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
| 1430 | |
| 1431 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
| 1432 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); |
| 1433 | list_del(&node->td); |
| 1434 | kfree(node); |
| 1435 | } |
| 1436 | |
| 1437 | /* pop request */ |
| 1438 | list_del_init(&hwreq->queue); |
| 1439 | |
| 1440 | usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); |
| 1441 | |
| 1442 | req->status = -ECONNRESET; |
| 1443 | |
| 1444 | if (hwreq->req.complete != NULL) { |
| 1445 | spin_unlock(hwep->lock); |
| 1446 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
| 1447 | spin_lock(hwep->lock); |
| 1448 | } |
| 1449 | |
| 1450 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1451 | return 0; |
| 1452 | } |
| 1453 | |
| 1454 | /** |
| 1455 | * ep_set_halt: sets the endpoint halt feature |
| 1456 | * |
| 1457 | * Check usb_ep_set_halt() at "usb_gadget.h" for details |
| 1458 | */ |
| 1459 | static int ep_set_halt(struct usb_ep *ep, int value) |
| 1460 | { |
| 1461 | return _ep_set_halt(ep, value, true); |
| 1462 | } |
| 1463 | |
| 1464 | /** |
| 1465 | * ep_set_wedge: sets the halt feature and ignores clear requests |
| 1466 | * |
| 1467 | * Check usb_ep_set_wedge() at "usb_gadget.h" for details |
| 1468 | */ |
| 1469 | static int ep_set_wedge(struct usb_ep *ep) |
| 1470 | { |
| 1471 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 1472 | unsigned long flags; |
| 1473 | |
| 1474 | if (ep == NULL || hwep->ep.desc == NULL) |
| 1475 | return -EINVAL; |
| 1476 | |
| 1477 | spin_lock_irqsave(hwep->lock, flags); |
| 1478 | hwep->wedge = 1; |
| 1479 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1480 | |
| 1481 | return usb_ep_set_halt(ep); |
| 1482 | } |
| 1483 | |
| 1484 | /** |
| 1485 | * ep_fifo_flush: flushes contents of a fifo |
| 1486 | * |
| 1487 | * Check usb_ep_fifo_flush() at "usb_gadget.h" for details |
| 1488 | */ |
| 1489 | static void ep_fifo_flush(struct usb_ep *ep) |
| 1490 | { |
| 1491 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
| 1492 | unsigned long flags; |
| 1493 | |
| 1494 | if (ep == NULL) { |
| 1495 | dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); |
| 1496 | return; |
| 1497 | } |
| 1498 | |
| 1499 | spin_lock_irqsave(hwep->lock, flags); |
| 1500 | if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) { |
| 1501 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1502 | return; |
| 1503 | } |
| 1504 | |
| 1505 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
| 1506 | |
| 1507 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1508 | } |
| 1509 | |
| 1510 | /** |
| 1511 | * Endpoint-specific part of the API to the USB controller hardware |
| 1512 | * Check "usb_gadget.h" for details |
| 1513 | */ |
| 1514 | static const struct usb_ep_ops usb_ep_ops = { |
| 1515 | .enable = ep_enable, |
| 1516 | .disable = ep_disable, |
| 1517 | .alloc_request = ep_alloc_request, |
| 1518 | .free_request = ep_free_request, |
| 1519 | .queue = ep_queue, |
| 1520 | .dequeue = ep_dequeue, |
| 1521 | .set_halt = ep_set_halt, |
| 1522 | .set_wedge = ep_set_wedge, |
| 1523 | .fifo_flush = ep_fifo_flush, |
| 1524 | }; |
| 1525 | |
| 1526 | /****************************************************************************** |
| 1527 | * GADGET block |
| 1528 | *****************************************************************************/ |
| 1529 | static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) |
| 1530 | { |
| 1531 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
| 1532 | unsigned long flags; |
| 1533 | int gadget_ready = 0; |
| 1534 | |
| 1535 | spin_lock_irqsave(&ci->lock, flags); |
| 1536 | ci->vbus_active = is_active; |
| 1537 | if (ci->driver) |
| 1538 | gadget_ready = 1; |
| 1539 | spin_unlock_irqrestore(&ci->lock, flags); |
| 1540 | |
| 1541 | if (gadget_ready) { |
| 1542 | if (is_active) { |
| 1543 | pm_runtime_get_sync(&_gadget->dev); |
| 1544 | hw_device_reset(ci); |
| 1545 | hw_device_state(ci, ci->ep0out->qh.dma); |
| 1546 | usb_gadget_set_state(_gadget, USB_STATE_POWERED); |
| 1547 | usb_udc_vbus_handler(_gadget, true); |
| 1548 | } else { |
| 1549 | usb_udc_vbus_handler(_gadget, false); |
| 1550 | if (ci->driver) |
| 1551 | ci->driver->disconnect(&ci->gadget); |
| 1552 | hw_device_state(ci, 0); |
| 1553 | if (ci->platdata->notify_event) |
| 1554 | ci->platdata->notify_event(ci, |
| 1555 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
| 1556 | _gadget_stop_activity(&ci->gadget); |
| 1557 | pm_runtime_put_sync(&_gadget->dev); |
| 1558 | usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED); |
| 1559 | } |
| 1560 | } |
| 1561 | |
| 1562 | return 0; |
| 1563 | } |
| 1564 | |
| 1565 | static int ci_udc_wakeup(struct usb_gadget *_gadget) |
| 1566 | { |
| 1567 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
| 1568 | unsigned long flags; |
| 1569 | int ret = 0; |
| 1570 | |
| 1571 | spin_lock_irqsave(&ci->lock, flags); |
| 1572 | if (ci->gadget.speed == USB_SPEED_UNKNOWN) { |
| 1573 | spin_unlock_irqrestore(&ci->lock, flags); |
| 1574 | return 0; |
| 1575 | } |
| 1576 | if (!ci->remote_wakeup) { |
| 1577 | ret = -EOPNOTSUPP; |
| 1578 | goto out; |
| 1579 | } |
| 1580 | if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { |
| 1581 | ret = -EINVAL; |
| 1582 | goto out; |
| 1583 | } |
| 1584 | hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); |
| 1585 | out: |
| 1586 | spin_unlock_irqrestore(&ci->lock, flags); |
| 1587 | return ret; |
| 1588 | } |
| 1589 | |
| 1590 | static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) |
| 1591 | { |
| 1592 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
| 1593 | |
| 1594 | if (ci->usb_phy) |
| 1595 | return usb_phy_set_power(ci->usb_phy, ma); |
| 1596 | return -ENOTSUPP; |
| 1597 | } |
| 1598 | |
| 1599 | static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on) |
| 1600 | { |
| 1601 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
| 1602 | struct ci_hw_ep *hwep = ci->ep0in; |
| 1603 | unsigned long flags; |
| 1604 | |
| 1605 | spin_lock_irqsave(hwep->lock, flags); |
| 1606 | _gadget->is_selfpowered = (is_on != 0); |
| 1607 | spin_unlock_irqrestore(hwep->lock, flags); |
| 1608 | |
| 1609 | return 0; |
| 1610 | } |
| 1611 | |
| 1612 | /* Change Data+ pullup status |
| 1613 | * this func is used by usb_gadget_connect/disconnet |
| 1614 | */ |
| 1615 | static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) |
| 1616 | { |
| 1617 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
| 1618 | |
| 1619 | /* |
| 1620 | * Data+ pullup controlled by OTG state machine in OTG fsm mode; |
| 1621 | * and don't touch Data+ in host mode for dual role config. |
| 1622 | */ |
| 1623 | if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST) |
| 1624 | return 0; |
| 1625 | |
| 1626 | pm_runtime_get_sync(&ci->gadget.dev); |
| 1627 | if (is_on) |
| 1628 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); |
| 1629 | else |
| 1630 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); |
| 1631 | pm_runtime_put_sync(&ci->gadget.dev); |
| 1632 | |
| 1633 | return 0; |
| 1634 | } |
| 1635 | |
| 1636 | static int ci_udc_start(struct usb_gadget *gadget, |
| 1637 | struct usb_gadget_driver *driver); |
| 1638 | static int ci_udc_stop(struct usb_gadget *gadget); |
| 1639 | |
| 1640 | /* Match ISOC IN from the highest endpoint */ |
| 1641 | static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget, |
| 1642 | struct usb_endpoint_descriptor *desc, |
| 1643 | struct usb_ss_ep_comp_descriptor *comp_desc) |
| 1644 | { |
| 1645 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
| 1646 | struct usb_ep *ep; |
| 1647 | |
| 1648 | if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) { |
| 1649 | list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) { |
| 1650 | if (ep->caps.dir_in && !ep->claimed) |
| 1651 | return ep; |
| 1652 | } |
| 1653 | } |
| 1654 | |
| 1655 | return NULL; |
| 1656 | } |
| 1657 | |
| 1658 | /** |
| 1659 | * Device operations part of the API to the USB controller hardware, |
| 1660 | * which don't involve endpoints (or i/o) |
| 1661 | * Check "usb_gadget.h" for details |
| 1662 | */ |
| 1663 | static const struct usb_gadget_ops usb_gadget_ops = { |
| 1664 | .vbus_session = ci_udc_vbus_session, |
| 1665 | .wakeup = ci_udc_wakeup, |
| 1666 | .set_selfpowered = ci_udc_selfpowered, |
| 1667 | .pullup = ci_udc_pullup, |
| 1668 | .vbus_draw = ci_udc_vbus_draw, |
| 1669 | .udc_start = ci_udc_start, |
| 1670 | .udc_stop = ci_udc_stop, |
| 1671 | .match_ep = ci_udc_match_ep, |
| 1672 | }; |
| 1673 | |
| 1674 | static int init_eps(struct ci_hdrc *ci) |
| 1675 | { |
| 1676 | int retval = 0, i, j; |
| 1677 | |
| 1678 | for (i = 0; i < ci->hw_ep_max/2; i++) |
| 1679 | for (j = RX; j <= TX; j++) { |
| 1680 | int k = i + j * ci->hw_ep_max/2; |
| 1681 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; |
| 1682 | |
| 1683 | scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, |
| 1684 | (j == TX) ? "in" : "out"); |
| 1685 | |
| 1686 | hwep->ci = ci; |
| 1687 | hwep->lock = &ci->lock; |
| 1688 | hwep->td_pool = ci->td_pool; |
| 1689 | |
| 1690 | hwep->ep.name = hwep->name; |
| 1691 | hwep->ep.ops = &usb_ep_ops; |
| 1692 | |
| 1693 | if (i == 0) { |
| 1694 | hwep->ep.caps.type_control = true; |
| 1695 | } else { |
| 1696 | hwep->ep.caps.type_iso = true; |
| 1697 | hwep->ep.caps.type_bulk = true; |
| 1698 | hwep->ep.caps.type_int = true; |
| 1699 | } |
| 1700 | |
| 1701 | if (j == TX) |
| 1702 | hwep->ep.caps.dir_in = true; |
| 1703 | else |
| 1704 | hwep->ep.caps.dir_out = true; |
| 1705 | |
| 1706 | /* |
| 1707 | * for ep0: maxP defined in desc, for other |
| 1708 | * eps, maxP is set by epautoconfig() called |
| 1709 | * by gadget layer |
| 1710 | */ |
| 1711 | usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); |
| 1712 | |
| 1713 | INIT_LIST_HEAD(&hwep->qh.queue); |
| 1714 | hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL, |
| 1715 | &hwep->qh.dma); |
| 1716 | if (hwep->qh.ptr == NULL) |
| 1717 | retval = -ENOMEM; |
| 1718 | |
| 1719 | /* |
| 1720 | * set up shorthands for ep0 out and in endpoints, |
| 1721 | * don't add to gadget's ep_list |
| 1722 | */ |
| 1723 | if (i == 0) { |
| 1724 | if (j == RX) |
| 1725 | ci->ep0out = hwep; |
| 1726 | else |
| 1727 | ci->ep0in = hwep; |
| 1728 | |
| 1729 | usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); |
| 1730 | continue; |
| 1731 | } |
| 1732 | |
| 1733 | list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); |
| 1734 | } |
| 1735 | |
| 1736 | return retval; |
| 1737 | } |
| 1738 | |
| 1739 | static void destroy_eps(struct ci_hdrc *ci) |
| 1740 | { |
| 1741 | int i; |
| 1742 | |
| 1743 | for (i = 0; i < ci->hw_ep_max; i++) { |
| 1744 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
| 1745 | |
| 1746 | if (hwep->pending_td) |
| 1747 | free_pending_td(hwep); |
| 1748 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
| 1749 | } |
| 1750 | } |
| 1751 | |
| 1752 | /** |
| 1753 | * ci_udc_start: register a gadget driver |
| 1754 | * @gadget: our gadget |
| 1755 | * @driver: the driver being registered |
| 1756 | * |
| 1757 | * Interrupts are enabled here. |
| 1758 | */ |
| 1759 | static int ci_udc_start(struct usb_gadget *gadget, |
| 1760 | struct usb_gadget_driver *driver) |
| 1761 | { |
| 1762 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
| 1763 | int retval = -ENOMEM; |
| 1764 | |
| 1765 | if (driver->disconnect == NULL) |
| 1766 | return -EINVAL; |
| 1767 | |
| 1768 | |
| 1769 | ci->ep0out->ep.desc = &ctrl_endpt_out_desc; |
| 1770 | retval = usb_ep_enable(&ci->ep0out->ep); |
| 1771 | if (retval) |
| 1772 | return retval; |
| 1773 | |
| 1774 | ci->ep0in->ep.desc = &ctrl_endpt_in_desc; |
| 1775 | retval = usb_ep_enable(&ci->ep0in->ep); |
| 1776 | if (retval) |
| 1777 | return retval; |
| 1778 | |
| 1779 | ci->driver = driver; |
| 1780 | |
| 1781 | /* Start otg fsm for B-device */ |
| 1782 | if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) { |
| 1783 | ci_hdrc_otg_fsm_start(ci); |
| 1784 | return retval; |
| 1785 | } |
| 1786 | |
| 1787 | pm_runtime_get_sync(&ci->gadget.dev); |
| 1788 | if (ci->vbus_active) { |
| 1789 | hw_device_reset(ci); |
| 1790 | } else { |
| 1791 | usb_udc_vbus_handler(&ci->gadget, false); |
| 1792 | pm_runtime_put_sync(&ci->gadget.dev); |
| 1793 | return retval; |
| 1794 | } |
| 1795 | |
| 1796 | retval = hw_device_state(ci, ci->ep0out->qh.dma); |
| 1797 | if (retval) |
| 1798 | pm_runtime_put_sync(&ci->gadget.dev); |
| 1799 | |
| 1800 | return retval; |
| 1801 | } |
| 1802 | |
| 1803 | static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci) |
| 1804 | { |
| 1805 | if (!ci_otg_is_fsm_mode(ci)) |
| 1806 | return; |
| 1807 | |
| 1808 | mutex_lock(&ci->fsm.lock); |
| 1809 | if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) { |
| 1810 | ci->fsm.a_bidl_adis_tmout = 1; |
| 1811 | ci_hdrc_otg_fsm_start(ci); |
| 1812 | } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) { |
| 1813 | ci->fsm.protocol = PROTO_UNDEF; |
| 1814 | ci->fsm.otg->state = OTG_STATE_UNDEFINED; |
| 1815 | } |
| 1816 | mutex_unlock(&ci->fsm.lock); |
| 1817 | } |
| 1818 | |
| 1819 | /** |
| 1820 | * ci_udc_stop: unregister a gadget driver |
| 1821 | */ |
| 1822 | static int ci_udc_stop(struct usb_gadget *gadget) |
| 1823 | { |
| 1824 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
| 1825 | unsigned long flags; |
| 1826 | |
| 1827 | spin_lock_irqsave(&ci->lock, flags); |
| 1828 | |
| 1829 | if (ci->vbus_active) { |
| 1830 | hw_device_state(ci, 0); |
| 1831 | spin_unlock_irqrestore(&ci->lock, flags); |
| 1832 | if (ci->platdata->notify_event) |
| 1833 | ci->platdata->notify_event(ci, |
| 1834 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
| 1835 | _gadget_stop_activity(&ci->gadget); |
| 1836 | spin_lock_irqsave(&ci->lock, flags); |
| 1837 | pm_runtime_put(&ci->gadget.dev); |
| 1838 | } |
| 1839 | |
| 1840 | ci->driver = NULL; |
| 1841 | spin_unlock_irqrestore(&ci->lock, flags); |
| 1842 | |
| 1843 | ci_udc_stop_for_otg_fsm(ci); |
| 1844 | return 0; |
| 1845 | } |
| 1846 | |
| 1847 | /****************************************************************************** |
| 1848 | * BUS block |
| 1849 | *****************************************************************************/ |
| 1850 | /** |
| 1851 | * udc_irq: ci interrupt handler |
| 1852 | * |
| 1853 | * This function returns IRQ_HANDLED if the IRQ has been handled |
| 1854 | * It locks access to registers |
| 1855 | */ |
| 1856 | static irqreturn_t udc_irq(struct ci_hdrc *ci) |
| 1857 | { |
| 1858 | irqreturn_t retval; |
| 1859 | u32 intr; |
| 1860 | |
| 1861 | if (ci == NULL) |
| 1862 | return IRQ_HANDLED; |
| 1863 | |
| 1864 | spin_lock(&ci->lock); |
| 1865 | |
| 1866 | if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { |
| 1867 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != |
| 1868 | USBMODE_CM_DC) { |
| 1869 | spin_unlock(&ci->lock); |
| 1870 | return IRQ_NONE; |
| 1871 | } |
| 1872 | } |
| 1873 | intr = hw_test_and_clear_intr_active(ci); |
| 1874 | |
| 1875 | if (intr) { |
| 1876 | /* order defines priority - do NOT change it */ |
| 1877 | if (USBi_URI & intr) |
| 1878 | isr_reset_handler(ci); |
| 1879 | |
| 1880 | if (USBi_PCI & intr) { |
| 1881 | ci->gadget.speed = hw_port_is_high_speed(ci) ? |
| 1882 | USB_SPEED_HIGH : USB_SPEED_FULL; |
| 1883 | if (ci->suspended) { |
| 1884 | if (ci->driver->resume) { |
| 1885 | spin_unlock(&ci->lock); |
| 1886 | ci->driver->resume(&ci->gadget); |
| 1887 | spin_lock(&ci->lock); |
| 1888 | } |
| 1889 | ci->suspended = 0; |
| 1890 | usb_gadget_set_state(&ci->gadget, |
| 1891 | ci->resume_state); |
| 1892 | } |
| 1893 | } |
| 1894 | |
| 1895 | if (USBi_UI & intr) |
| 1896 | isr_tr_complete_handler(ci); |
| 1897 | |
| 1898 | if ((USBi_SLI & intr) && !(ci->suspended)) { |
| 1899 | ci->suspended = 1; |
| 1900 | ci->resume_state = ci->gadget.state; |
| 1901 | if (ci->gadget.speed != USB_SPEED_UNKNOWN && |
| 1902 | ci->driver->suspend) { |
| 1903 | spin_unlock(&ci->lock); |
| 1904 | ci->driver->suspend(&ci->gadget); |
| 1905 | spin_lock(&ci->lock); |
| 1906 | } |
| 1907 | usb_gadget_set_state(&ci->gadget, |
| 1908 | USB_STATE_SUSPENDED); |
| 1909 | } |
| 1910 | retval = IRQ_HANDLED; |
| 1911 | } else { |
| 1912 | retval = IRQ_NONE; |
| 1913 | } |
| 1914 | spin_unlock(&ci->lock); |
| 1915 | |
| 1916 | return retval; |
| 1917 | } |
| 1918 | |
| 1919 | /** |
| 1920 | * udc_start: initialize gadget role |
| 1921 | * @ci: chipidea controller |
| 1922 | */ |
| 1923 | static int udc_start(struct ci_hdrc *ci) |
| 1924 | { |
| 1925 | struct device *dev = ci->dev; |
| 1926 | struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps; |
| 1927 | int retval = 0; |
| 1928 | |
| 1929 | ci->gadget.ops = &usb_gadget_ops; |
| 1930 | ci->gadget.speed = USB_SPEED_UNKNOWN; |
| 1931 | ci->gadget.max_speed = USB_SPEED_HIGH; |
| 1932 | ci->gadget.name = ci->platdata->name; |
| 1933 | ci->gadget.otg_caps = otg_caps; |
| 1934 | |
| 1935 | if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) |
| 1936 | ci->gadget.quirk_avoids_skb_reserve = 1; |
| 1937 | |
| 1938 | if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support || |
| 1939 | otg_caps->adp_support)) |
| 1940 | ci->gadget.is_otg = 1; |
| 1941 | |
| 1942 | INIT_LIST_HEAD(&ci->gadget.ep_list); |
| 1943 | |
| 1944 | /* alloc resources */ |
| 1945 | ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent, |
| 1946 | sizeof(struct ci_hw_qh), |
| 1947 | 64, CI_HDRC_PAGE_SIZE); |
| 1948 | if (ci->qh_pool == NULL) |
| 1949 | return -ENOMEM; |
| 1950 | |
| 1951 | ci->td_pool = dma_pool_create("ci_hw_td", dev->parent, |
| 1952 | sizeof(struct ci_hw_td), |
| 1953 | 64, CI_HDRC_PAGE_SIZE); |
| 1954 | if (ci->td_pool == NULL) { |
| 1955 | retval = -ENOMEM; |
| 1956 | goto free_qh_pool; |
| 1957 | } |
| 1958 | |
| 1959 | retval = init_eps(ci); |
| 1960 | if (retval) |
| 1961 | goto free_pools; |
| 1962 | |
| 1963 | ci->gadget.ep0 = &ci->ep0in->ep; |
| 1964 | |
| 1965 | retval = usb_add_gadget_udc(dev, &ci->gadget); |
| 1966 | if (retval) |
| 1967 | goto destroy_eps; |
| 1968 | |
| 1969 | pm_runtime_no_callbacks(&ci->gadget.dev); |
| 1970 | pm_runtime_enable(&ci->gadget.dev); |
| 1971 | |
| 1972 | return retval; |
| 1973 | |
| 1974 | destroy_eps: |
| 1975 | destroy_eps(ci); |
| 1976 | free_pools: |
| 1977 | dma_pool_destroy(ci->td_pool); |
| 1978 | free_qh_pool: |
| 1979 | dma_pool_destroy(ci->qh_pool); |
| 1980 | return retval; |
| 1981 | } |
| 1982 | |
| 1983 | /** |
| 1984 | * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC |
| 1985 | * |
| 1986 | * No interrupts active, the IRQ has been released |
| 1987 | */ |
| 1988 | void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) |
| 1989 | { |
| 1990 | if (!ci->roles[CI_ROLE_GADGET]) |
| 1991 | return; |
| 1992 | |
| 1993 | usb_del_gadget_udc(&ci->gadget); |
| 1994 | |
| 1995 | destroy_eps(ci); |
| 1996 | |
| 1997 | dma_pool_destroy(ci->td_pool); |
| 1998 | dma_pool_destroy(ci->qh_pool); |
| 1999 | } |
| 2000 | |
| 2001 | static int udc_id_switch_for_device(struct ci_hdrc *ci) |
| 2002 | { |
| 2003 | if (ci->is_otg) |
| 2004 | /* Clear and enable BSV irq */ |
| 2005 | hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE, |
| 2006 | OTGSC_BSVIS | OTGSC_BSVIE); |
| 2007 | |
| 2008 | return 0; |
| 2009 | } |
| 2010 | |
| 2011 | static void udc_id_switch_for_host(struct ci_hdrc *ci) |
| 2012 | { |
| 2013 | /* |
| 2014 | * host doesn't care B_SESSION_VALID event |
| 2015 | * so clear and disbale BSV irq |
| 2016 | */ |
| 2017 | if (ci->is_otg) |
| 2018 | hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS); |
| 2019 | |
| 2020 | ci->vbus_active = 0; |
| 2021 | } |
| 2022 | |
| 2023 | /** |
| 2024 | * ci_hdrc_gadget_init - initialize device related bits |
| 2025 | * ci: the controller |
| 2026 | * |
| 2027 | * This function initializes the gadget, if the device is "device capable". |
| 2028 | */ |
| 2029 | int ci_hdrc_gadget_init(struct ci_hdrc *ci) |
| 2030 | { |
| 2031 | struct ci_role_driver *rdrv; |
| 2032 | int ret; |
| 2033 | |
| 2034 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) |
| 2035 | return -ENXIO; |
| 2036 | |
| 2037 | rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL); |
| 2038 | if (!rdrv) |
| 2039 | return -ENOMEM; |
| 2040 | |
| 2041 | rdrv->start = udc_id_switch_for_device; |
| 2042 | rdrv->stop = udc_id_switch_for_host; |
| 2043 | rdrv->irq = udc_irq; |
| 2044 | rdrv->name = "gadget"; |
| 2045 | |
| 2046 | ret = udc_start(ci); |
| 2047 | if (!ret) |
| 2048 | ci->roles[CI_ROLE_GADGET] = rdrv; |
| 2049 | |
| 2050 | return ret; |
| 2051 | } |