blob: 7120dbfaacaba38513662d178b69bf641ce125e8 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2015 MediaTek Inc.
3 * Author:
4 * Zhigang.Wei <zhigang.wei@mediatek.com>
5 * Chunfeng.Yun <chunfeng.yun@mediatek.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/slab.h>
21
22#include "xhci.h"
23#include "xhci-mtk.h"
24
25#define SS_BW_BOUNDARY 51000
26/* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
27#define HS_BW_BOUNDARY 6144
28/* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
29#define FS_PAYLOAD_MAX 188
30
31/* mtk scheduler bitmasks */
32#define EP_BPKTS(p) ((p) & 0x3f)
33#define EP_BCSCOUNT(p) (((p) & 0x7) << 8)
34#define EP_BBM(p) ((p) << 11)
35#define EP_BOFFSET(p) ((p) & 0x3fff)
36#define EP_BREPEAT(p) (((p) & 0x7fff) << 16)
37
38static int is_fs_or_ls(enum usb_device_speed speed)
39{
40 return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
41}
42
43/*
44* get the index of bandwidth domains array which @ep belongs to.
45*
46* the bandwidth domain array is saved to @sch_array of struct xhci_hcd_mtk,
47* each HS root port is treated as a single bandwidth domain,
48* but each SS root port is treated as two bandwidth domains, one for IN eps,
49* one for OUT eps.
50* @real_port value is defined as follow according to xHCI spec:
51* 1 for SSport0, ..., N+1 for SSportN, N+2 for HSport0, N+3 for HSport1, etc
52* so the bandwidth domain array is organized as follow for simplification:
53* SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY
54*/
55static int get_bw_index(struct xhci_hcd *xhci, struct usb_device *udev,
56 struct usb_host_endpoint *ep)
57{
58 struct xhci_virt_device *virt_dev;
59 int bw_index;
60
61 virt_dev = xhci->devs[udev->slot_id];
62
63 if (udev->speed == USB_SPEED_SUPER) {
64 if (usb_endpoint_dir_out(&ep->desc))
65 bw_index = (virt_dev->real_port - 1) * 2;
66 else
67 bw_index = (virt_dev->real_port - 1) * 2 + 1;
68 } else {
69 /* add one more for each SS port */
70 bw_index = virt_dev->real_port + xhci->num_usb3_ports - 1;
71 }
72
73 return bw_index;
74}
75
76static void setup_sch_info(struct usb_device *udev,
77 struct xhci_ep_ctx *ep_ctx, struct mu3h_sch_ep_info *sch_ep)
78{
79 u32 ep_type;
80 u32 ep_interval;
81 u32 max_packet_size;
82 u32 max_burst;
83 u32 mult;
84 u32 esit_pkts;
85
86 ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
87 ep_interval = CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx->ep_info));
88 max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
89 max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2));
90 mult = CTX_TO_EP_MULT(le32_to_cpu(ep_ctx->ep_info));
91
92 sch_ep->esit = 1 << ep_interval;
93 sch_ep->offset = 0;
94 sch_ep->burst_mode = 0;
95
96 if (udev->speed == USB_SPEED_HIGH) {
97 sch_ep->cs_count = 0;
98
99 /*
100 * usb_20 spec section5.9
101 * a single microframe is enough for HS synchromous endpoints
102 * in a interval
103 */
104 sch_ep->num_budget_microframes = 1;
105 sch_ep->repeat = 0;
106
107 /*
108 * xHCI spec section6.2.3.4
109 * @max_burst is the number of additional transactions
110 * opportunities per microframe
111 */
112 sch_ep->pkts = max_burst + 1;
113 sch_ep->bw_cost_per_microframe = max_packet_size * sch_ep->pkts;
114 } else if (udev->speed == USB_SPEED_SUPER) {
115 /* usb3_r1 spec section4.4.7 & 4.4.8 */
116 sch_ep->cs_count = 0;
117 esit_pkts = (mult + 1) * (max_burst + 1);
118 if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
119 sch_ep->pkts = esit_pkts;
120 sch_ep->num_budget_microframes = 1;
121 sch_ep->repeat = 0;
122 }
123
124 if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) {
125 if (sch_ep->esit == 1)
126 sch_ep->pkts = esit_pkts;
127 else if (esit_pkts <= sch_ep->esit)
128 sch_ep->pkts = 1;
129 else
130 sch_ep->pkts = roundup_pow_of_two(esit_pkts)
131 / sch_ep->esit;
132
133 sch_ep->num_budget_microframes =
134 DIV_ROUND_UP(esit_pkts, sch_ep->pkts);
135
136 if (sch_ep->num_budget_microframes > 1)
137 sch_ep->repeat = 1;
138 else
139 sch_ep->repeat = 0;
140 }
141 sch_ep->bw_cost_per_microframe = max_packet_size * sch_ep->pkts;
142 } else if (is_fs_or_ls(udev->speed)) {
143
144 /*
145 * usb_20 spec section11.18.4
146 * assume worst cases
147 */
148 sch_ep->repeat = 0;
149 sch_ep->pkts = 1; /* at most one packet for each microframe */
150 if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
151 sch_ep->cs_count = 3; /* at most need 3 CS*/
152 /* one for SS and one for budgeted transaction */
153 sch_ep->num_budget_microframes = sch_ep->cs_count + 2;
154 sch_ep->bw_cost_per_microframe = max_packet_size;
155 }
156 if (ep_type == ISOC_OUT_EP) {
157
158 /*
159 * the best case FS budget assumes that 188 FS bytes
160 * occur in each microframe
161 */
162 sch_ep->num_budget_microframes = DIV_ROUND_UP(
163 max_packet_size, FS_PAYLOAD_MAX);
164 sch_ep->bw_cost_per_microframe = FS_PAYLOAD_MAX;
165 sch_ep->cs_count = sch_ep->num_budget_microframes;
166 }
167 if (ep_type == ISOC_IN_EP) {
168 /* at most need additional two CS. */
169 sch_ep->cs_count = DIV_ROUND_UP(
170 max_packet_size, FS_PAYLOAD_MAX) + 2;
171 sch_ep->num_budget_microframes = sch_ep->cs_count + 2;
172 sch_ep->bw_cost_per_microframe = FS_PAYLOAD_MAX;
173 }
174 }
175}
176
177/* Get maximum bandwidth when we schedule at offset slot. */
178static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw,
179 struct mu3h_sch_ep_info *sch_ep, u32 offset)
180{
181 u32 num_esit;
182 u32 max_bw = 0;
183 int i;
184 int j;
185
186 num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
187 for (i = 0; i < num_esit; i++) {
188 u32 base = offset + i * sch_ep->esit;
189
190 for (j = 0; j < sch_ep->num_budget_microframes; j++) {
191 if (sch_bw->bus_bw[base + j] > max_bw)
192 max_bw = sch_bw->bus_bw[base + j];
193 }
194 }
195 return max_bw;
196}
197
198static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw,
199 struct mu3h_sch_ep_info *sch_ep, int bw_cost)
200{
201 u32 num_esit;
202 u32 base;
203 int i;
204 int j;
205
206 num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
207 for (i = 0; i < num_esit; i++) {
208 base = sch_ep->offset + i * sch_ep->esit;
209 for (j = 0; j < sch_ep->num_budget_microframes; j++)
210 sch_bw->bus_bw[base + j] += bw_cost;
211 }
212}
213
214static int check_sch_bw(struct usb_device *udev,
215 struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep)
216{
217 u32 offset;
218 u32 esit;
219 u32 num_budget_microframes;
220 u32 min_bw;
221 u32 min_index;
222 u32 worst_bw;
223 u32 bw_boundary;
224
225 if (sch_ep->esit > XHCI_MTK_MAX_ESIT)
226 sch_ep->esit = XHCI_MTK_MAX_ESIT;
227
228 esit = sch_ep->esit;
229 num_budget_microframes = sch_ep->num_budget_microframes;
230
231 /*
232 * Search through all possible schedule microframes.
233 * and find a microframe where its worst bandwidth is minimum.
234 */
235 min_bw = ~0;
236 min_index = 0;
237 for (offset = 0; offset < esit; offset++) {
238 if ((offset + num_budget_microframes) > sch_ep->esit)
239 break;
240
241 /*
242 * usb_20 spec section11.18:
243 * must never schedule Start-Split in Y6
244 */
245 if (is_fs_or_ls(udev->speed) && (offset % 8 == 6))
246 continue;
247
248 worst_bw = get_max_bw(sch_bw, sch_ep, offset);
249 if (min_bw > worst_bw) {
250 min_bw = worst_bw;
251 min_index = offset;
252 }
253 if (min_bw == 0)
254 break;
255 }
256 sch_ep->offset = min_index;
257
258 bw_boundary = (udev->speed == USB_SPEED_SUPER)
259 ? SS_BW_BOUNDARY : HS_BW_BOUNDARY;
260
261 /* check bandwidth */
262 if (min_bw + sch_ep->bw_cost_per_microframe > bw_boundary)
263 return -ERANGE;
264
265 /* update bus bandwidth info */
266 update_bus_bw(sch_bw, sch_ep, sch_ep->bw_cost_per_microframe);
267
268 return 0;
269}
270
271static bool need_bw_sch(struct usb_host_endpoint *ep,
272 enum usb_device_speed speed, int has_tt)
273{
274 /* only for periodic endpoints */
275 if (usb_endpoint_xfer_control(&ep->desc)
276 || usb_endpoint_xfer_bulk(&ep->desc))
277 return false;
278
279 /*
280 * for LS & FS periodic endpoints which its device is not behind
281 * a TT are also ignored, root-hub will schedule them directly,
282 * but need set @bpkts field of endpoint context to 1.
283 */
284 if (is_fs_or_ls(speed) && !has_tt)
285 return false;
286
287 /* skip endpoint with zero maxpkt */
288 if (usb_endpoint_maxp(&ep->desc) == 0)
289 return false;
290
291 return true;
292}
293
294int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
295{
296 struct mu3h_sch_bw_info *sch_array;
297 int num_usb_bus;
298 int i;
299
300 /* ss IN and OUT are separated */
301 num_usb_bus = mtk->num_u3_ports * 2 + mtk->num_u2_ports;
302
303 sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL);
304 if (sch_array == NULL)
305 return -ENOMEM;
306
307 for (i = 0; i < num_usb_bus; i++)
308 INIT_LIST_HEAD(&sch_array[i].bw_ep_list);
309
310 mtk->sch_array = sch_array;
311
312 return 0;
313}
314EXPORT_SYMBOL_GPL(xhci_mtk_sch_init);
315
316void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk)
317{
318 kfree(mtk->sch_array);
319}
320EXPORT_SYMBOL_GPL(xhci_mtk_sch_exit);
321
322int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
323 struct usb_host_endpoint *ep)
324{
325 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
326 struct xhci_hcd *xhci;
327 struct xhci_ep_ctx *ep_ctx;
328 struct xhci_slot_ctx *slot_ctx;
329 struct xhci_virt_device *virt_dev;
330 struct mu3h_sch_bw_info *sch_bw;
331 struct mu3h_sch_ep_info *sch_ep;
332 struct mu3h_sch_bw_info *sch_array;
333 unsigned int ep_index;
334 int bw_index;
335 int ret = 0;
336
337 xhci = hcd_to_xhci(hcd);
338 virt_dev = xhci->devs[udev->slot_id];
339 ep_index = xhci_get_endpoint_index(&ep->desc);
340 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
341 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
342 sch_array = mtk->sch_array;
343
344 xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
345 __func__, usb_endpoint_type(&ep->desc), udev->speed,
346 usb_endpoint_maxp(&ep->desc),
347 usb_endpoint_dir_in(&ep->desc), ep);
348
349 if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) {
350 /*
351 * set @bpkts to 1 if it is LS or FS periodic endpoint, and its
352 * device does not connected through an external HS hub
353 */
354 if (usb_endpoint_xfer_int(&ep->desc)
355 || usb_endpoint_xfer_isoc(&ep->desc))
356 ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(1));
357
358 return 0;
359 }
360
361 bw_index = get_bw_index(xhci, udev, ep);
362 sch_bw = &sch_array[bw_index];
363
364 sch_ep = kzalloc(sizeof(struct mu3h_sch_ep_info), GFP_NOIO);
365 if (!sch_ep)
366 return -ENOMEM;
367
368 setup_sch_info(udev, ep_ctx, sch_ep);
369
370 ret = check_sch_bw(udev, sch_bw, sch_ep);
371 if (ret) {
372 xhci_err(xhci, "Not enough bandwidth!\n");
373 kfree(sch_ep);
374 return -ENOSPC;
375 }
376
377 list_add_tail(&sch_ep->endpoint, &sch_bw->bw_ep_list);
378 sch_ep->ep = ep;
379
380 ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(sch_ep->pkts)
381 | EP_BCSCOUNT(sch_ep->cs_count) | EP_BBM(sch_ep->burst_mode));
382 ep_ctx->reserved[1] |= cpu_to_le32(EP_BOFFSET(sch_ep->offset)
383 | EP_BREPEAT(sch_ep->repeat));
384
385 xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n",
386 sch_ep->pkts, sch_ep->cs_count, sch_ep->burst_mode,
387 sch_ep->offset, sch_ep->repeat);
388
389 return 0;
390}
391EXPORT_SYMBOL_GPL(xhci_mtk_add_ep_quirk);
392
393void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
394 struct usb_host_endpoint *ep)
395{
396 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
397 struct xhci_hcd *xhci;
398 struct xhci_slot_ctx *slot_ctx;
399 struct xhci_virt_device *virt_dev;
400 struct mu3h_sch_bw_info *sch_array;
401 struct mu3h_sch_bw_info *sch_bw;
402 struct mu3h_sch_ep_info *sch_ep;
403 int bw_index;
404
405 xhci = hcd_to_xhci(hcd);
406 virt_dev = xhci->devs[udev->slot_id];
407 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
408 sch_array = mtk->sch_array;
409
410 xhci_dbg(xhci, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n",
411 __func__, usb_endpoint_type(&ep->desc), udev->speed,
412 usb_endpoint_maxp(&ep->desc),
413 usb_endpoint_dir_in(&ep->desc), ep);
414
415 if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
416 return;
417
418 bw_index = get_bw_index(xhci, udev, ep);
419 sch_bw = &sch_array[bw_index];
420
421 list_for_each_entry(sch_ep, &sch_bw->bw_ep_list, endpoint) {
422 if (sch_ep->ep == ep) {
423 update_bus_bw(sch_bw, sch_ep,
424 -sch_ep->bw_cost_per_microframe);
425 list_del(&sch_ep->endpoint);
426 kfree(sch_ep);
427 break;
428 }
429 }
430}
431EXPORT_SYMBOL_GPL(xhci_mtk_drop_ep_quirk);