| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2018 MediaTek Inc. |
| 3 | |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
| 11 | * See http://www.gnu.org/licenses/gpl-2.0.html for more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef _DT_BINDINGS_MT635X_AUXADC_H |
| 15 | #define _DT_BINDINGS_MT635X_AUXADC_H |
| 16 | |
| 17 | /* PMIC MT635x AUXADC channels */ |
| 18 | /*TODO*/ |
| 19 | #define AUXADC_BATADC 0x00 |
| 20 | //#define AUXADC_ISENSE 0x01 |
| 21 | #define AUXADC_VCDT 0x02 |
| 22 | //#define AUXADC_BATTEMP 0x03 |
| 23 | #define AUXADC_BATID 0x04 |
| 24 | #define AUXADC_CHIP_TEMP 0x05 |
| 25 | #define AUXADC_VCORE_TEMP 0x06 |
| 26 | #define AUXADC_VPROC_TEMP 0x07 |
| 27 | #define AUXADC_VGPU_TEMP 0x08 |
| 28 | #define AUXADC_ACCDET 0x09 |
| 29 | #define AUXADC_VDCXO 0x0a |
| 30 | #define AUXADC_TSX_TEMP 0x0b |
| 31 | #define AUXADC_HPOFS_CAL 0x0c |
| 32 | #define AUXADC_DCXO_TEMP 0x0d |
| 33 | #define AUXADC_VBIF 0x0e |
| 34 | #define AUXADC_VTREF 0x0f |
| 35 | #define AUXADC_EXT1 0x10 |
| 36 | #define AUXADC_EXT2 0x11 |
| 37 | #define AUXADC_EXT3 0x12 |
| 38 | #define AUXADC_EXT4 0x13 |
| 39 | #define AUXADC_MDDRDI 0x14 |
| 40 | /* |
| 41 | #define AUXADC_GPS_ANT 0x15 |
| 42 | #define AUXADC_MAIN_ANT 0x16 |
| 43 | #define AUXADC_DRX_ANT 0x17 |
| 44 | */ |
| 45 | /*modify by chencheng 0913 */ |
| 46 | #define AUXADC_ADC2 0x15 |
| 47 | #define AUXADC_ADC1 0x16 |
| 48 | #define AUXADC_ADC0 0x17 |
| 49 | |
| 50 | |
| 51 | #endif /* _DT_BINDINGS_MT635X_AUXADC_H */ |