blob: f759e0918037baa4286328281cc9efcd416be61d [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (C) 2014 NVIDIA Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __SOC_TEGRA_MC_H__
10#define __SOC_TEGRA_MC_H__
11
12#include <linux/types.h>
13
14struct clk;
15struct device;
16struct page;
17
18struct tegra_smmu_enable {
19 unsigned int reg;
20 unsigned int bit;
21};
22
23struct tegra_mc_timing {
24 unsigned long rate;
25
26 u32 *emem_data;
27};
28
29/* latency allowance */
30struct tegra_mc_la {
31 unsigned int reg;
32 unsigned int shift;
33 unsigned int mask;
34 unsigned int def;
35};
36
37struct tegra_mc_client {
38 unsigned int id;
39 const char *name;
40 unsigned int swgroup;
41
42 unsigned int fifo_size;
43
44 struct tegra_smmu_enable smmu;
45 struct tegra_mc_la la;
46};
47
48struct tegra_smmu_swgroup {
49 const char *name;
50 unsigned int swgroup;
51 unsigned int reg;
52};
53
54struct tegra_smmu_soc {
55 const struct tegra_mc_client *clients;
56 unsigned int num_clients;
57
58 const struct tegra_smmu_swgroup *swgroups;
59 unsigned int num_swgroups;
60
61 bool supports_round_robin_arbitration;
62 bool supports_request_limit;
63
64 unsigned int num_tlb_lines;
65 unsigned int num_asids;
66};
67
68struct tegra_mc;
69struct tegra_smmu;
70
71#ifdef CONFIG_TEGRA_IOMMU_SMMU
72struct tegra_smmu *tegra_smmu_probe(struct device *dev,
73 const struct tegra_smmu_soc *soc,
74 struct tegra_mc *mc);
75void tegra_smmu_remove(struct tegra_smmu *smmu);
76#else
77static inline struct tegra_smmu *
78tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc,
79 struct tegra_mc *mc)
80{
81 return NULL;
82}
83
84static inline void tegra_smmu_remove(struct tegra_smmu *smmu)
85{
86}
87#endif
88
89struct tegra_mc_soc {
90 const struct tegra_mc_client *clients;
91 unsigned int num_clients;
92
93 const unsigned long *emem_regs;
94 unsigned int num_emem_regs;
95
96 unsigned int num_address_bits;
97 unsigned int atom_size;
98
99 u8 client_id_mask;
100
101 const struct tegra_smmu_soc *smmu;
102
103 u32 intmask;
104};
105
106struct tegra_mc {
107 struct device *dev;
108 struct tegra_smmu *smmu;
109 void __iomem *regs;
110 struct clk *clk;
111 int irq;
112
113 const struct tegra_mc_soc *soc;
114 unsigned long tick;
115
116 struct tegra_mc_timing *timings;
117 unsigned int num_timings;
118};
119
120void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
121unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
122
123#endif /* __SOC_TEGRA_MC_H__ */