rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * HD-audio core stuff |
| 4 | */ |
| 5 | |
| 6 | #ifndef __SOUND_HDAUDIO_H |
| 7 | #define __SOUND_HDAUDIO_H |
| 8 | |
| 9 | #include <linux/device.h> |
| 10 | #include <linux/interrupt.h> |
| 11 | #include <linux/timecounter.h> |
| 12 | #include <sound/core.h> |
| 13 | #include <sound/memalloc.h> |
| 14 | #include <sound/hda_verbs.h> |
| 15 | #include <drm/i915_component.h> |
| 16 | |
| 17 | /* codec node id */ |
| 18 | typedef u16 hda_nid_t; |
| 19 | |
| 20 | struct hdac_bus; |
| 21 | struct hdac_stream; |
| 22 | struct hdac_device; |
| 23 | struct hdac_driver; |
| 24 | struct hdac_widget_tree; |
| 25 | struct hda_device_id; |
| 26 | |
| 27 | /* |
| 28 | * exported bus type |
| 29 | */ |
| 30 | extern struct bus_type snd_hda_bus_type; |
| 31 | |
| 32 | /* |
| 33 | * generic arrays |
| 34 | */ |
| 35 | struct snd_array { |
| 36 | unsigned int used; |
| 37 | unsigned int alloced; |
| 38 | unsigned int elem_size; |
| 39 | unsigned int alloc_align; |
| 40 | void *list; |
| 41 | }; |
| 42 | |
| 43 | /* |
| 44 | * HD-audio codec base device |
| 45 | */ |
| 46 | struct hdac_device { |
| 47 | struct device dev; |
| 48 | int type; |
| 49 | struct hdac_bus *bus; |
| 50 | unsigned int addr; /* codec address */ |
| 51 | struct list_head list; /* list point for bus codec_list */ |
| 52 | |
| 53 | hda_nid_t afg; /* AFG node id */ |
| 54 | hda_nid_t mfg; /* MFG node id */ |
| 55 | |
| 56 | /* ids */ |
| 57 | unsigned int vendor_id; |
| 58 | unsigned int subsystem_id; |
| 59 | unsigned int revision_id; |
| 60 | unsigned int afg_function_id; |
| 61 | unsigned int mfg_function_id; |
| 62 | unsigned int afg_unsol:1; |
| 63 | unsigned int mfg_unsol:1; |
| 64 | |
| 65 | unsigned int power_caps; /* FG power caps */ |
| 66 | |
| 67 | const char *vendor_name; /* codec vendor name */ |
| 68 | const char *chip_name; /* codec chip name */ |
| 69 | |
| 70 | /* verb exec op override */ |
| 71 | int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, |
| 72 | unsigned int flags, unsigned int *res); |
| 73 | |
| 74 | /* widgets */ |
| 75 | unsigned int num_nodes; |
| 76 | hda_nid_t start_nid, end_nid; |
| 77 | |
| 78 | /* misc flags */ |
| 79 | atomic_t in_pm; /* suspend/resume being performed */ |
| 80 | bool link_power_control:1; |
| 81 | |
| 82 | /* sysfs */ |
| 83 | struct hdac_widget_tree *widgets; |
| 84 | |
| 85 | /* regmap */ |
| 86 | struct regmap *regmap; |
| 87 | struct snd_array vendor_verbs; |
| 88 | bool lazy_cache:1; /* don't wake up for writes */ |
| 89 | bool caps_overwriting:1; /* caps overwrite being in process */ |
| 90 | bool cache_coef:1; /* cache COEF read/write too */ |
| 91 | }; |
| 92 | |
| 93 | /* device/driver type used for matching */ |
| 94 | enum { |
| 95 | HDA_DEV_CORE, |
| 96 | HDA_DEV_LEGACY, |
| 97 | HDA_DEV_ASOC, |
| 98 | }; |
| 99 | |
| 100 | /* direction */ |
| 101 | enum { |
| 102 | HDA_INPUT, HDA_OUTPUT |
| 103 | }; |
| 104 | |
| 105 | #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) |
| 106 | |
| 107 | int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, |
| 108 | const char *name, unsigned int addr); |
| 109 | void snd_hdac_device_exit(struct hdac_device *dev); |
| 110 | int snd_hdac_device_register(struct hdac_device *codec); |
| 111 | void snd_hdac_device_unregister(struct hdac_device *codec); |
| 112 | int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name); |
| 113 | int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size); |
| 114 | |
| 115 | int snd_hdac_refresh_widgets(struct hdac_device *codec); |
| 116 | int snd_hdac_refresh_widget_sysfs(struct hdac_device *codec); |
| 117 | |
| 118 | unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid, |
| 119 | unsigned int verb, unsigned int parm); |
| 120 | int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd, |
| 121 | unsigned int flags, unsigned int *res); |
| 122 | int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, |
| 123 | unsigned int verb, unsigned int parm, unsigned int *res); |
| 124 | int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, |
| 125 | unsigned int *res); |
| 126 | int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, |
| 127 | int parm); |
| 128 | int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, |
| 129 | unsigned int parm, unsigned int val); |
| 130 | int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, |
| 131 | hda_nid_t *conn_list, int max_conns); |
| 132 | int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, |
| 133 | hda_nid_t *start_id); |
| 134 | unsigned int snd_hdac_calc_stream_format(unsigned int rate, |
| 135 | unsigned int channels, |
| 136 | unsigned int format, |
| 137 | unsigned int maxbps, |
| 138 | unsigned short spdif_ctls); |
| 139 | int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, |
| 140 | u32 *ratesp, u64 *formatsp, unsigned int *bpsp); |
| 141 | bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, |
| 142 | unsigned int format); |
| 143 | |
| 144 | int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid, |
| 145 | int flags, unsigned int verb, unsigned int parm); |
| 146 | int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid, |
| 147 | int flags, unsigned int verb, unsigned int parm); |
| 148 | bool snd_hdac_check_power_state(struct hdac_device *hdac, |
| 149 | hda_nid_t nid, unsigned int target_state); |
| 150 | /** |
| 151 | * snd_hdac_read_parm - read a codec parameter |
| 152 | * @codec: the codec object |
| 153 | * @nid: NID to read a parameter |
| 154 | * @parm: parameter to read |
| 155 | * |
| 156 | * Returns -1 for error. If you need to distinguish the error more |
| 157 | * strictly, use _snd_hdac_read_parm() directly. |
| 158 | */ |
| 159 | static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, |
| 160 | int parm) |
| 161 | { |
| 162 | unsigned int val; |
| 163 | |
| 164 | return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; |
| 165 | } |
| 166 | |
| 167 | #ifdef CONFIG_PM |
| 168 | int snd_hdac_power_up(struct hdac_device *codec); |
| 169 | int snd_hdac_power_down(struct hdac_device *codec); |
| 170 | int snd_hdac_power_up_pm(struct hdac_device *codec); |
| 171 | int snd_hdac_power_down_pm(struct hdac_device *codec); |
| 172 | int snd_hdac_keep_power_up(struct hdac_device *codec); |
| 173 | #else |
| 174 | static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } |
| 175 | static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } |
| 176 | static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } |
| 177 | static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } |
| 178 | static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; } |
| 179 | #endif |
| 180 | |
| 181 | /* |
| 182 | * HD-audio codec base driver |
| 183 | */ |
| 184 | struct hdac_driver { |
| 185 | struct device_driver driver; |
| 186 | int type; |
| 187 | const struct hda_device_id *id_table; |
| 188 | int (*match)(struct hdac_device *dev, struct hdac_driver *drv); |
| 189 | void (*unsol_event)(struct hdac_device *dev, unsigned int event); |
| 190 | }; |
| 191 | |
| 192 | #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) |
| 193 | |
| 194 | const struct hda_device_id * |
| 195 | hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); |
| 196 | |
| 197 | /* |
| 198 | * Bus verb operators |
| 199 | */ |
| 200 | struct hdac_bus_ops { |
| 201 | /* send a single command */ |
| 202 | int (*command)(struct hdac_bus *bus, unsigned int cmd); |
| 203 | /* get a response from the last command */ |
| 204 | int (*get_response)(struct hdac_bus *bus, unsigned int addr, |
| 205 | unsigned int *res); |
| 206 | /* control the link power */ |
| 207 | int (*link_power)(struct hdac_bus *bus, bool enable); |
| 208 | }; |
| 209 | |
| 210 | /* |
| 211 | * Lowlevel I/O operators |
| 212 | */ |
| 213 | struct hdac_io_ops { |
| 214 | /* mapped register accesses */ |
| 215 | void (*reg_writel)(u32 value, u32 __iomem *addr); |
| 216 | u32 (*reg_readl)(u32 __iomem *addr); |
| 217 | void (*reg_writew)(u16 value, u16 __iomem *addr); |
| 218 | u16 (*reg_readw)(u16 __iomem *addr); |
| 219 | void (*reg_writeb)(u8 value, u8 __iomem *addr); |
| 220 | u8 (*reg_readb)(u8 __iomem *addr); |
| 221 | /* Allocation ops */ |
| 222 | int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size, |
| 223 | struct snd_dma_buffer *buf); |
| 224 | void (*dma_free_pages)(struct hdac_bus *bus, |
| 225 | struct snd_dma_buffer *buf); |
| 226 | }; |
| 227 | |
| 228 | #define HDA_UNSOL_QUEUE_SIZE 64 |
| 229 | #define HDA_MAX_CODECS 8 /* limit by controller side */ |
| 230 | |
| 231 | /* |
| 232 | * CORB/RIRB |
| 233 | * |
| 234 | * Each CORB entry is 4byte, RIRB is 8byte |
| 235 | */ |
| 236 | struct hdac_rb { |
| 237 | __le32 *buf; /* virtual address of CORB/RIRB buffer */ |
| 238 | dma_addr_t addr; /* physical address of CORB/RIRB buffer */ |
| 239 | unsigned short rp, wp; /* RIRB read/write pointers */ |
| 240 | int cmds[HDA_MAX_CODECS]; /* number of pending requests */ |
| 241 | u32 res[HDA_MAX_CODECS]; /* last read value */ |
| 242 | }; |
| 243 | |
| 244 | /* |
| 245 | * HD-audio bus base driver |
| 246 | * |
| 247 | * @ppcap: pp capabilities pointer |
| 248 | * @spbcap: SPIB capabilities pointer |
| 249 | * @mlcap: MultiLink capabilities pointer |
| 250 | * @gtscap: gts capabilities pointer |
| 251 | * @drsmcap: dma resume capabilities pointer |
| 252 | */ |
| 253 | struct hdac_bus { |
| 254 | struct device *dev; |
| 255 | const struct hdac_bus_ops *ops; |
| 256 | const struct hdac_io_ops *io_ops; |
| 257 | |
| 258 | /* h/w resources */ |
| 259 | unsigned long addr; |
| 260 | void __iomem *remap_addr; |
| 261 | int irq; |
| 262 | |
| 263 | void __iomem *ppcap; |
| 264 | void __iomem *spbcap; |
| 265 | void __iomem *mlcap; |
| 266 | void __iomem *gtscap; |
| 267 | void __iomem *drsmcap; |
| 268 | |
| 269 | /* codec linked list */ |
| 270 | struct list_head codec_list; |
| 271 | unsigned int num_codecs; |
| 272 | |
| 273 | /* link caddr -> codec */ |
| 274 | struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; |
| 275 | |
| 276 | /* unsolicited event queue */ |
| 277 | u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ |
| 278 | unsigned int unsol_rp, unsol_wp; |
| 279 | struct work_struct unsol_work; |
| 280 | |
| 281 | /* bit flags of detected codecs */ |
| 282 | unsigned long codec_mask; |
| 283 | |
| 284 | /* bit flags of powered codecs */ |
| 285 | unsigned long codec_powered; |
| 286 | |
| 287 | /* CORB/RIRB */ |
| 288 | struct hdac_rb corb; |
| 289 | struct hdac_rb rirb; |
| 290 | unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ |
| 291 | |
| 292 | /* CORB/RIRB and position buffers */ |
| 293 | struct snd_dma_buffer rb; |
| 294 | struct snd_dma_buffer posbuf; |
| 295 | |
| 296 | /* hdac_stream linked list */ |
| 297 | struct list_head stream_list; |
| 298 | |
| 299 | /* operation state */ |
| 300 | bool chip_init:1; /* h/w initialized */ |
| 301 | |
| 302 | /* behavior flags */ |
| 303 | bool sync_write:1; /* sync after verb write */ |
| 304 | bool use_posbuf:1; /* use position buffer */ |
| 305 | bool snoop:1; /* enable snooping */ |
| 306 | bool align_bdle_4k:1; /* BDLE align 4K boundary */ |
| 307 | bool reverse_assign:1; /* assign devices in reverse order */ |
| 308 | bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ |
| 309 | |
| 310 | int bdl_pos_adj; /* BDL position adjustment */ |
| 311 | |
| 312 | /* locks */ |
| 313 | spinlock_t reg_lock; |
| 314 | struct mutex cmd_mutex; |
| 315 | |
| 316 | /* i915 component interface */ |
| 317 | struct i915_audio_component *audio_component; |
| 318 | int i915_power_refcount; |
| 319 | }; |
| 320 | |
| 321 | int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, |
| 322 | const struct hdac_bus_ops *ops, |
| 323 | const struct hdac_io_ops *io_ops); |
| 324 | void snd_hdac_bus_exit(struct hdac_bus *bus); |
| 325 | int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr, |
| 326 | unsigned int cmd, unsigned int *res); |
| 327 | int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, |
| 328 | unsigned int cmd, unsigned int *res); |
| 329 | void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex); |
| 330 | |
| 331 | int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec); |
| 332 | void snd_hdac_bus_remove_device(struct hdac_bus *bus, |
| 333 | struct hdac_device *codec); |
| 334 | |
| 335 | static inline void snd_hdac_codec_link_up(struct hdac_device *codec) |
| 336 | { |
| 337 | set_bit(codec->addr, &codec->bus->codec_powered); |
| 338 | } |
| 339 | |
| 340 | static inline void snd_hdac_codec_link_down(struct hdac_device *codec) |
| 341 | { |
| 342 | clear_bit(codec->addr, &codec->bus->codec_powered); |
| 343 | } |
| 344 | |
| 345 | int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); |
| 346 | int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, |
| 347 | unsigned int *res); |
| 348 | int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus); |
| 349 | int snd_hdac_link_power(struct hdac_device *codec, bool enable); |
| 350 | |
| 351 | bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); |
| 352 | void snd_hdac_bus_stop_chip(struct hdac_bus *bus); |
| 353 | void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); |
| 354 | void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); |
| 355 | void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); |
| 356 | void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); |
| 357 | int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset); |
| 358 | |
| 359 | void snd_hdac_bus_update_rirb(struct hdac_bus *bus); |
| 360 | int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, |
| 361 | void (*ack)(struct hdac_bus *, |
| 362 | struct hdac_stream *)); |
| 363 | |
| 364 | int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); |
| 365 | void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); |
| 366 | |
| 367 | /* |
| 368 | * macros for easy use |
| 369 | */ |
| 370 | #define _snd_hdac_chip_writeb(chip, reg, value) \ |
| 371 | ((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + (reg))) |
| 372 | #define _snd_hdac_chip_readb(chip, reg) \ |
| 373 | ((chip)->io_ops->reg_readb((chip)->remap_addr + (reg))) |
| 374 | #define _snd_hdac_chip_writew(chip, reg, value) \ |
| 375 | ((chip)->io_ops->reg_writew(value, (chip)->remap_addr + (reg))) |
| 376 | #define _snd_hdac_chip_readw(chip, reg) \ |
| 377 | ((chip)->io_ops->reg_readw((chip)->remap_addr + (reg))) |
| 378 | #define _snd_hdac_chip_writel(chip, reg, value) \ |
| 379 | ((chip)->io_ops->reg_writel(value, (chip)->remap_addr + (reg))) |
| 380 | #define _snd_hdac_chip_readl(chip, reg) \ |
| 381 | ((chip)->io_ops->reg_readl((chip)->remap_addr + (reg))) |
| 382 | |
| 383 | /* read/write a register, pass without AZX_REG_ prefix */ |
| 384 | #define snd_hdac_chip_writel(chip, reg, value) \ |
| 385 | _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value) |
| 386 | #define snd_hdac_chip_writew(chip, reg, value) \ |
| 387 | _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value) |
| 388 | #define snd_hdac_chip_writeb(chip, reg, value) \ |
| 389 | _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value) |
| 390 | #define snd_hdac_chip_readl(chip, reg) \ |
| 391 | _snd_hdac_chip_readl(chip, AZX_REG_ ## reg) |
| 392 | #define snd_hdac_chip_readw(chip, reg) \ |
| 393 | _snd_hdac_chip_readw(chip, AZX_REG_ ## reg) |
| 394 | #define snd_hdac_chip_readb(chip, reg) \ |
| 395 | _snd_hdac_chip_readb(chip, AZX_REG_ ## reg) |
| 396 | |
| 397 | /* update a register, pass without AZX_REG_ prefix */ |
| 398 | #define snd_hdac_chip_updatel(chip, reg, mask, val) \ |
| 399 | snd_hdac_chip_writel(chip, reg, \ |
| 400 | (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) |
| 401 | #define snd_hdac_chip_updatew(chip, reg, mask, val) \ |
| 402 | snd_hdac_chip_writew(chip, reg, \ |
| 403 | (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) |
| 404 | #define snd_hdac_chip_updateb(chip, reg, mask, val) \ |
| 405 | snd_hdac_chip_writeb(chip, reg, \ |
| 406 | (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) |
| 407 | |
| 408 | /* |
| 409 | * HD-audio stream |
| 410 | */ |
| 411 | struct hdac_stream { |
| 412 | struct hdac_bus *bus; |
| 413 | struct snd_dma_buffer bdl; /* BDL buffer */ |
| 414 | __le32 *posbuf; /* position buffer pointer */ |
| 415 | int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ |
| 416 | |
| 417 | unsigned int bufsize; /* size of the play buffer in bytes */ |
| 418 | unsigned int period_bytes; /* size of the period in bytes */ |
| 419 | unsigned int frags; /* number for period in the play buffer */ |
| 420 | unsigned int fifo_size; /* FIFO size */ |
| 421 | |
| 422 | void __iomem *sd_addr; /* stream descriptor pointer */ |
| 423 | |
| 424 | u32 sd_int_sta_mask; /* stream int status mask */ |
| 425 | |
| 426 | /* pcm support */ |
| 427 | struct snd_pcm_substream *substream; /* assigned substream, |
| 428 | * set in PCM open |
| 429 | */ |
| 430 | unsigned int format_val; /* format value to be set in the |
| 431 | * controller and the codec |
| 432 | */ |
| 433 | unsigned char stream_tag; /* assigned stream */ |
| 434 | unsigned char index; /* stream index */ |
| 435 | int assigned_key; /* last device# key assigned to */ |
| 436 | |
| 437 | bool opened:1; |
| 438 | bool running:1; |
| 439 | bool prepared:1; |
| 440 | bool no_period_wakeup:1; |
| 441 | bool locked:1; |
| 442 | |
| 443 | /* timestamp */ |
| 444 | unsigned long start_wallclk; /* start + minimum wallclk */ |
| 445 | unsigned long period_wallclk; /* wallclk for period */ |
| 446 | struct timecounter tc; |
| 447 | struct cyclecounter cc; |
| 448 | int delay_negative_threshold; |
| 449 | |
| 450 | struct list_head list; |
| 451 | #ifdef CONFIG_SND_HDA_DSP_LOADER |
| 452 | /* DSP access mutex */ |
| 453 | struct mutex dsp_mutex; |
| 454 | #endif |
| 455 | }; |
| 456 | |
| 457 | void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, |
| 458 | int idx, int direction, int tag); |
| 459 | struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, |
| 460 | struct snd_pcm_substream *substream); |
| 461 | void snd_hdac_stream_release(struct hdac_stream *azx_dev); |
| 462 | struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, |
| 463 | int dir, int stream_tag); |
| 464 | |
| 465 | int snd_hdac_stream_setup(struct hdac_stream *azx_dev); |
| 466 | void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); |
| 467 | int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); |
| 468 | int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, |
| 469 | unsigned int format_val); |
| 470 | void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start); |
| 471 | void snd_hdac_stream_clear(struct hdac_stream *azx_dev); |
| 472 | void snd_hdac_stream_stop(struct hdac_stream *azx_dev); |
| 473 | void snd_hdac_stream_reset(struct hdac_stream *azx_dev); |
| 474 | void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, |
| 475 | unsigned int streams, unsigned int reg); |
| 476 | void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, |
| 477 | unsigned int streams); |
| 478 | void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, |
| 479 | unsigned int streams); |
| 480 | /* |
| 481 | * macros for easy use |
| 482 | */ |
| 483 | #define _snd_hdac_stream_write(type, dev, reg, value) \ |
| 484 | ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg))) |
| 485 | #define _snd_hdac_stream_read(type, dev, reg) \ |
| 486 | ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg))) |
| 487 | |
| 488 | /* read/write a register, pass without AZX_REG_ prefix */ |
| 489 | #define snd_hdac_stream_writel(dev, reg, value) \ |
| 490 | _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value) |
| 491 | #define snd_hdac_stream_writew(dev, reg, value) \ |
| 492 | _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value) |
| 493 | #define snd_hdac_stream_writeb(dev, reg, value) \ |
| 494 | _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value) |
| 495 | #define snd_hdac_stream_readl(dev, reg) \ |
| 496 | _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg) |
| 497 | #define snd_hdac_stream_readw(dev, reg) \ |
| 498 | _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg) |
| 499 | #define snd_hdac_stream_readb(dev, reg) \ |
| 500 | _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg) |
| 501 | |
| 502 | /* update a register, pass without AZX_REG_ prefix */ |
| 503 | #define snd_hdac_stream_updatel(dev, reg, mask, val) \ |
| 504 | snd_hdac_stream_writel(dev, reg, \ |
| 505 | (snd_hdac_stream_readl(dev, reg) & \ |
| 506 | ~(mask)) | (val)) |
| 507 | #define snd_hdac_stream_updatew(dev, reg, mask, val) \ |
| 508 | snd_hdac_stream_writew(dev, reg, \ |
| 509 | (snd_hdac_stream_readw(dev, reg) & \ |
| 510 | ~(mask)) | (val)) |
| 511 | #define snd_hdac_stream_updateb(dev, reg, mask, val) \ |
| 512 | snd_hdac_stream_writeb(dev, reg, \ |
| 513 | (snd_hdac_stream_readb(dev, reg) & \ |
| 514 | ~(mask)) | (val)) |
| 515 | |
| 516 | #ifdef CONFIG_SND_HDA_DSP_LOADER |
| 517 | /* DSP lock helpers */ |
| 518 | #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) |
| 519 | #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) |
| 520 | #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) |
| 521 | #define snd_hdac_stream_is_locked(dev) ((dev)->locked) |
| 522 | /* DSP loader helpers */ |
| 523 | int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, |
| 524 | unsigned int byte_size, struct snd_dma_buffer *bufp); |
| 525 | void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); |
| 526 | void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, |
| 527 | struct snd_dma_buffer *dmab); |
| 528 | #else /* CONFIG_SND_HDA_DSP_LOADER */ |
| 529 | #define snd_hdac_dsp_lock_init(dev) do {} while (0) |
| 530 | #define snd_hdac_dsp_lock(dev) do {} while (0) |
| 531 | #define snd_hdac_dsp_unlock(dev) do {} while (0) |
| 532 | #define snd_hdac_stream_is_locked(dev) 0 |
| 533 | |
| 534 | static inline int |
| 535 | snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, |
| 536 | unsigned int byte_size, struct snd_dma_buffer *bufp) |
| 537 | { |
| 538 | return 0; |
| 539 | } |
| 540 | |
| 541 | static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) |
| 542 | { |
| 543 | } |
| 544 | |
| 545 | static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, |
| 546 | struct snd_dma_buffer *dmab) |
| 547 | { |
| 548 | } |
| 549 | #endif /* CONFIG_SND_HDA_DSP_LOADER */ |
| 550 | |
| 551 | |
| 552 | /* |
| 553 | * generic array helpers |
| 554 | */ |
| 555 | void *snd_array_new(struct snd_array *array); |
| 556 | void snd_array_free(struct snd_array *array); |
| 557 | static inline void snd_array_init(struct snd_array *array, unsigned int size, |
| 558 | unsigned int align) |
| 559 | { |
| 560 | array->elem_size = size; |
| 561 | array->alloc_align = align; |
| 562 | } |
| 563 | |
| 564 | static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) |
| 565 | { |
| 566 | return array->list + idx * array->elem_size; |
| 567 | } |
| 568 | |
| 569 | static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) |
| 570 | { |
| 571 | return (unsigned long)(ptr - array->list) / array->elem_size; |
| 572 | } |
| 573 | |
| 574 | #endif /* __SOUND_HDAUDIO_H */ |