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rjw1f884582022-01-06 17:20:42 +08001/*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/init.h>
28#include <linux/pci.h>
29#include <linux/slab.h>
30#include <linux/module.h>
31#include <linux/mutex.h>
32#include <sound/core.h>
33#include <sound/info.h>
34#include <sound/rawmidi.h>
35#include <sound/initval.h>
36
37#include <sound/asoundef.h>
38
39#include "ice1712.h"
40#include "envy24ht.h"
41
42/* lowlevel routines */
43#include "amp.h"
44#include "revo.h"
45#include "aureon.h"
46#include "vt1720_mobo.h"
47#include "pontis.h"
48#include "prodigy192.h"
49#include "prodigy_hifi.h"
50#include "juli.h"
51#include "maya44.h"
52#include "phase.h"
53#include "wtm.h"
54#include "se.h"
55#include "quartet.h"
56#include "psc724.h"
57
58MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
59MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
60MODULE_LICENSE("GPL");
61MODULE_SUPPORTED_DEVICE("{"
62 REVO_DEVICE_DESC
63 AMP_AUDIO2000_DEVICE_DESC
64 AUREON_DEVICE_DESC
65 VT1720_MOBO_DEVICE_DESC
66 PONTIS_DEVICE_DESC
67 PRODIGY192_DEVICE_DESC
68 PRODIGY_HIFI_DEVICE_DESC
69 JULI_DEVICE_DESC
70 MAYA44_DEVICE_DESC
71 PHASE_DEVICE_DESC
72 WTM_DEVICE_DESC
73 SE_DEVICE_DESC
74 QTET_DEVICE_DESC
75 "{VIA,VT1720},"
76 "{VIA,VT1724},"
77 "{ICEnsemble,Generic ICE1724},"
78 "{ICEnsemble,Generic Envy24HT}"
79 "{ICEnsemble,Generic Envy24PT}}");
80
81static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
82static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
83static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
84static char *model[SNDRV_CARDS];
85
86module_param_array(index, int, NULL, 0444);
87MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
88module_param_array(id, charp, NULL, 0444);
89MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
90module_param_array(enable, bool, NULL, 0444);
91MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
92module_param_array(model, charp, NULL, 0444);
93MODULE_PARM_DESC(model, "Use the given board model.");
94
95
96/* Both VT1720 and VT1724 have the same PCI IDs */
97static const struct pci_device_id snd_vt1724_ids[] = {
98 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
99 { 0, }
100};
101
102MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
103
104
105static int PRO_RATE_LOCKED;
106static int PRO_RATE_RESET = 1;
107static unsigned int PRO_RATE_DEFAULT = 44100;
108
109static const char * const ext_clock_names[1] = { "IEC958 In" };
110
111/*
112 * Basic I/O
113 */
114
115/*
116 * default rates, default clock routines
117 */
118
119/* check whether the clock mode is spdif-in */
120static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
121{
122 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
123}
124
125/*
126 * locking rate makes sense only for internal clock mode
127 */
128static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
129{
130 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
131}
132
133/*
134 * ac97 section
135 */
136
137static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
138{
139 unsigned char old_cmd;
140 int tm;
141 for (tm = 0; tm < 0x10000; tm++) {
142 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
143 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
144 continue;
145 if (!(old_cmd & VT1724_AC97_READY))
146 continue;
147 return old_cmd;
148 }
149 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n");
150 return old_cmd;
151}
152
153static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
154{
155 int tm;
156 for (tm = 0; tm < 0x10000; tm++)
157 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
158 return 0;
159 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n");
160 return -EIO;
161}
162
163static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
164 unsigned short reg,
165 unsigned short val)
166{
167 struct snd_ice1712 *ice = ac97->private_data;
168 unsigned char old_cmd;
169
170 old_cmd = snd_vt1724_ac97_ready(ice);
171 old_cmd &= ~VT1724_AC97_ID_MASK;
172 old_cmd |= ac97->num;
173 outb(reg, ICEMT1724(ice, AC97_INDEX));
174 outw(val, ICEMT1724(ice, AC97_DATA));
175 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
176 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
177}
178
179static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
180{
181 struct snd_ice1712 *ice = ac97->private_data;
182 unsigned char old_cmd;
183
184 old_cmd = snd_vt1724_ac97_ready(ice);
185 old_cmd &= ~VT1724_AC97_ID_MASK;
186 old_cmd |= ac97->num;
187 outb(reg, ICEMT1724(ice, AC97_INDEX));
188 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
189 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
190 return ~0;
191 return inw(ICEMT1724(ice, AC97_DATA));
192}
193
194
195/*
196 * GPIO operations
197 */
198
199/* set gpio direction 0 = read, 1 = write */
200static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
201{
202 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
203 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
204}
205
206/* get gpio direction 0 = read, 1 = write */
207static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
208{
209 return inl(ICEREG1724(ice, GPIO_DIRECTION));
210}
211
212/* set the gpio mask (0 = writable) */
213static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
214{
215 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
216 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
217 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
218 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
219}
220
221static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
222{
223 unsigned int mask;
224 if (!ice->vt1720)
225 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
226 else
227 mask = 0;
228 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
229 return mask;
230}
231
232static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
233{
234 outw(data, ICEREG1724(ice, GPIO_DATA));
235 if (!ice->vt1720)
236 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
237 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
238}
239
240static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
241{
242 unsigned int data;
243 if (!ice->vt1720)
244 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
245 else
246 data = 0;
247 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
248 return data;
249}
250
251/*
252 * MIDI
253 */
254
255static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
256{
257 unsigned int count;
258
259 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
260 inb(ICEREG1724(ice, MPU_DATA));
261}
262
263static inline struct snd_rawmidi_substream *
264get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
265{
266 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
267 struct snd_rawmidi_substream, list);
268}
269
270static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
271
272static void vt1724_midi_write(struct snd_ice1712 *ice)
273{
274 struct snd_rawmidi_substream *s;
275 int count, i;
276 u8 buffer[32];
277
278 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
279 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
280 if (count > 0) {
281 count = snd_rawmidi_transmit(s, buffer, count);
282 for (i = 0; i < count; ++i)
283 outb(buffer[i], ICEREG1724(ice, MPU_DATA));
284 }
285 /* mask irq when all bytes have been transmitted.
286 * enabled again in output_trigger when the new data comes in.
287 */
288 enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
289 !snd_rawmidi_transmit_empty(s));
290}
291
292static void vt1724_midi_read(struct snd_ice1712 *ice)
293{
294 struct snd_rawmidi_substream *s;
295 int count, i;
296 u8 buffer[32];
297
298 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
299 count = inb(ICEREG1724(ice, MPU_RXFIFO));
300 if (count > 0) {
301 count = min(count, 32);
302 for (i = 0; i < count; ++i)
303 buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
304 snd_rawmidi_receive(s, buffer, count);
305 }
306}
307
308/* call with ice->reg_lock */
309static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
310{
311 u8 mask = inb(ICEREG1724(ice, IRQMASK));
312 if (enable)
313 mask &= ~flag;
314 else
315 mask |= flag;
316 outb(mask, ICEREG1724(ice, IRQMASK));
317}
318
319static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
320 u8 flag, int enable)
321{
322 struct snd_ice1712 *ice = substream->rmidi->private_data;
323
324 spin_lock_irq(&ice->reg_lock);
325 enable_midi_irq(ice, flag, enable);
326 spin_unlock_irq(&ice->reg_lock);
327}
328
329static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
330{
331 return 0;
332}
333
334static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
335{
336 return 0;
337}
338
339static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
340{
341 struct snd_ice1712 *ice = s->rmidi->private_data;
342 unsigned long flags;
343
344 spin_lock_irqsave(&ice->reg_lock, flags);
345 if (up) {
346 ice->midi_output = 1;
347 vt1724_midi_write(ice);
348 } else {
349 ice->midi_output = 0;
350 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
351 }
352 spin_unlock_irqrestore(&ice->reg_lock, flags);
353}
354
355static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
356{
357 struct snd_ice1712 *ice = s->rmidi->private_data;
358 unsigned long timeout;
359
360 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
361 /* 32 bytes should be transmitted in less than about 12 ms */
362 timeout = jiffies + msecs_to_jiffies(15);
363 do {
364 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
365 break;
366 schedule_timeout_uninterruptible(1);
367 } while (time_after(timeout, jiffies));
368}
369
370static const struct snd_rawmidi_ops vt1724_midi_output_ops = {
371 .open = vt1724_midi_output_open,
372 .close = vt1724_midi_output_close,
373 .trigger = vt1724_midi_output_trigger,
374 .drain = vt1724_midi_output_drain,
375};
376
377static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
378{
379 vt1724_midi_clear_rx(s->rmidi->private_data);
380 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
381 return 0;
382}
383
384static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
385{
386 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
387 return 0;
388}
389
390static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
391{
392 struct snd_ice1712 *ice = s->rmidi->private_data;
393 unsigned long flags;
394
395 spin_lock_irqsave(&ice->reg_lock, flags);
396 if (up) {
397 ice->midi_input = 1;
398 vt1724_midi_read(ice);
399 } else {
400 ice->midi_input = 0;
401 }
402 spin_unlock_irqrestore(&ice->reg_lock, flags);
403}
404
405static const struct snd_rawmidi_ops vt1724_midi_input_ops = {
406 .open = vt1724_midi_input_open,
407 .close = vt1724_midi_input_close,
408 .trigger = vt1724_midi_input_trigger,
409};
410
411
412/*
413 * Interrupt handler
414 */
415
416static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
417{
418 struct snd_ice1712 *ice = dev_id;
419 unsigned char status;
420 unsigned char status_mask =
421 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
422 int handled = 0;
423 int timeout = 0;
424
425 while (1) {
426 status = inb(ICEREG1724(ice, IRQSTAT));
427 status &= status_mask;
428 if (status == 0)
429 break;
430 spin_lock(&ice->reg_lock);
431 if (++timeout > 10) {
432 status = inb(ICEREG1724(ice, IRQSTAT));
433 dev_err(ice->card->dev,
434 "Too long irq loop, status = 0x%x\n", status);
435 if (status & VT1724_IRQ_MPU_TX) {
436 dev_err(ice->card->dev, "Disabling MPU_TX\n");
437 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
438 }
439 spin_unlock(&ice->reg_lock);
440 break;
441 }
442 handled = 1;
443 if (status & VT1724_IRQ_MPU_TX) {
444 if (ice->midi_output)
445 vt1724_midi_write(ice);
446 else
447 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
448 /* Due to mysterical reasons, MPU_TX is always
449 * generated (and can't be cleared) when a PCM
450 * playback is going. So let's ignore at the
451 * next loop.
452 */
453 status_mask &= ~VT1724_IRQ_MPU_TX;
454 }
455 if (status & VT1724_IRQ_MPU_RX) {
456 if (ice->midi_input)
457 vt1724_midi_read(ice);
458 else
459 vt1724_midi_clear_rx(ice);
460 }
461 /* ack MPU irq */
462 outb(status, ICEREG1724(ice, IRQSTAT));
463 spin_unlock(&ice->reg_lock);
464 if (status & VT1724_IRQ_MTPCM) {
465 /*
466 * Multi-track PCM
467 * PCM assignment are:
468 * Playback DMA0 (M/C) = playback_pro_substream
469 * Playback DMA1 = playback_con_substream_ds[0]
470 * Playback DMA2 = playback_con_substream_ds[1]
471 * Playback DMA3 = playback_con_substream_ds[2]
472 * Playback DMA4 (SPDIF) = playback_con_substream
473 * Record DMA0 = capture_pro_substream
474 * Record DMA1 = capture_con_substream
475 */
476 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
477 if (mtstat & VT1724_MULTI_PDMA0) {
478 if (ice->playback_pro_substream)
479 snd_pcm_period_elapsed(ice->playback_pro_substream);
480 }
481 if (mtstat & VT1724_MULTI_RDMA0) {
482 if (ice->capture_pro_substream)
483 snd_pcm_period_elapsed(ice->capture_pro_substream);
484 }
485 if (mtstat & VT1724_MULTI_PDMA1) {
486 if (ice->playback_con_substream_ds[0])
487 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
488 }
489 if (mtstat & VT1724_MULTI_PDMA2) {
490 if (ice->playback_con_substream_ds[1])
491 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
492 }
493 if (mtstat & VT1724_MULTI_PDMA3) {
494 if (ice->playback_con_substream_ds[2])
495 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
496 }
497 if (mtstat & VT1724_MULTI_PDMA4) {
498 if (ice->playback_con_substream)
499 snd_pcm_period_elapsed(ice->playback_con_substream);
500 }
501 if (mtstat & VT1724_MULTI_RDMA1) {
502 if (ice->capture_con_substream)
503 snd_pcm_period_elapsed(ice->capture_con_substream);
504 }
505 /* ack anyway to avoid freeze */
506 outb(mtstat, ICEMT1724(ice, IRQ));
507 /* ought to really handle this properly */
508 if (mtstat & VT1724_MULTI_FIFO_ERR) {
509 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
510 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
511 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
512 /* If I don't do this, I get machine lockup due to continual interrupts */
513 }
514
515 }
516 }
517 return IRQ_RETVAL(handled);
518}
519
520/*
521 * PCM code - professional part (multitrack)
522 */
523
524static const unsigned int rates[] = {
525 8000, 9600, 11025, 12000, 16000, 22050, 24000,
526 32000, 44100, 48000, 64000, 88200, 96000,
527 176400, 192000,
528};
529
530static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
531 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
532 .list = rates,
533 .mask = 0,
534};
535
536static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
537 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
538 .list = rates,
539 .mask = 0,
540};
541
542static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
543 .count = ARRAY_SIZE(rates),
544 .list = rates,
545 .mask = 0,
546};
547
548struct vt1724_pcm_reg {
549 unsigned int addr; /* ADDR register offset */
550 unsigned int size; /* SIZE register offset */
551 unsigned int count; /* COUNT register offset */
552 unsigned int start; /* start & pause bit */
553};
554
555static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
556{
557 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
558 unsigned char what;
559 unsigned char old;
560 struct snd_pcm_substream *s;
561
562 what = 0;
563 snd_pcm_group_for_each_entry(s, substream) {
564 if (snd_pcm_substream_chip(s) == ice) {
565 const struct vt1724_pcm_reg *reg;
566 reg = s->runtime->private_data;
567 what |= reg->start;
568 snd_pcm_trigger_done(s, substream);
569 }
570 }
571
572 switch (cmd) {
573 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
574 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
575 spin_lock(&ice->reg_lock);
576 old = inb(ICEMT1724(ice, DMA_PAUSE));
577 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
578 old |= what;
579 else
580 old &= ~what;
581 outb(old, ICEMT1724(ice, DMA_PAUSE));
582 spin_unlock(&ice->reg_lock);
583 break;
584
585 case SNDRV_PCM_TRIGGER_START:
586 case SNDRV_PCM_TRIGGER_STOP:
587 case SNDRV_PCM_TRIGGER_SUSPEND:
588 spin_lock(&ice->reg_lock);
589 old = inb(ICEMT1724(ice, DMA_CONTROL));
590 if (cmd == SNDRV_PCM_TRIGGER_START)
591 old |= what;
592 else
593 old &= ~what;
594 outb(old, ICEMT1724(ice, DMA_CONTROL));
595 spin_unlock(&ice->reg_lock);
596 break;
597
598 case SNDRV_PCM_TRIGGER_RESUME:
599 /* apps will have to restart stream */
600 break;
601
602 default:
603 return -EINVAL;
604 }
605 return 0;
606}
607
608/*
609 */
610
611#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
612 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
613#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
614 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
615
616static const unsigned int stdclock_rate_list[16] = {
617 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
618 22050, 11025, 88200, 176400, 0, 192000, 64000
619};
620
621static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
622{
623 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
624}
625
626static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
627{
628 int i;
629 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
630 if (stdclock_rate_list[i] == rate) {
631 outb(i, ICEMT1724(ice, RATE));
632 return;
633 }
634 }
635}
636
637static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
638 unsigned int rate)
639{
640 unsigned char val, old;
641 /* check MT02 */
642 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
643 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
644 if (rate > 96000)
645 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
646 else
647 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
648 if (val != old) {
649 outb(val, ICEMT1724(ice, I2S_FORMAT));
650 /* master clock changed */
651 return 1;
652 }
653 }
654 /* no change in master clock */
655 return 0;
656}
657
658static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
659 int force)
660{
661 unsigned long flags;
662 unsigned char mclk_change;
663 unsigned int i, old_rate;
664 bool call_set_rate = false;
665
666 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
667 return -EINVAL;
668
669 spin_lock_irqsave(&ice->reg_lock, flags);
670 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
671 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
672 /* running? we cannot change the rate now... */
673 spin_unlock_irqrestore(&ice->reg_lock, flags);
674 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
675 }
676 if (!force && is_pro_rate_locked(ice)) {
677 /* comparing required and current rate - makes sense for
678 * internal clock only */
679 spin_unlock_irqrestore(&ice->reg_lock, flags);
680 return (rate == ice->cur_rate) ? 0 : -EBUSY;
681 }
682
683 if (force || !ice->is_spdif_master(ice)) {
684 /* force means the rate was switched by ucontrol, otherwise
685 * setting clock rate for internal clock mode */
686 old_rate = ice->get_rate(ice);
687 if (force || (old_rate != rate))
688 call_set_rate = true;
689 else if (rate == ice->cur_rate) {
690 spin_unlock_irqrestore(&ice->reg_lock, flags);
691 return 0;
692 }
693 }
694
695 ice->cur_rate = rate;
696 spin_unlock_irqrestore(&ice->reg_lock, flags);
697
698 if (call_set_rate)
699 ice->set_rate(ice, rate);
700
701 /* setting master clock */
702 mclk_change = ice->set_mclk(ice, rate);
703
704 if (mclk_change && ice->gpio.i2s_mclk_changed)
705 ice->gpio.i2s_mclk_changed(ice);
706 if (ice->gpio.set_pro_rate)
707 ice->gpio.set_pro_rate(ice, rate);
708
709 /* set up codecs */
710 for (i = 0; i < ice->akm_codecs; i++) {
711 if (ice->akm[i].ops.set_rate_val)
712 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
713 }
714 if (ice->spdif.ops.setup_rate)
715 ice->spdif.ops.setup_rate(ice, rate);
716
717 return 0;
718}
719
720static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
721 struct snd_pcm_hw_params *hw_params)
722{
723 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
724 int i, chs, err;
725
726 chs = params_channels(hw_params);
727 mutex_lock(&ice->open_mutex);
728 /* mark surround channels */
729 if (substream == ice->playback_pro_substream) {
730 /* PDMA0 can be multi-channel up to 8 */
731 chs = chs / 2 - 1;
732 for (i = 0; i < chs; i++) {
733 if (ice->pcm_reserved[i] &&
734 ice->pcm_reserved[i] != substream) {
735 mutex_unlock(&ice->open_mutex);
736 return -EBUSY;
737 }
738 ice->pcm_reserved[i] = substream;
739 }
740 for (; i < 3; i++) {
741 if (ice->pcm_reserved[i] == substream)
742 ice->pcm_reserved[i] = NULL;
743 }
744 } else {
745 for (i = 0; i < 3; i++) {
746 /* check individual playback stream */
747 if (ice->playback_con_substream_ds[i] == substream) {
748 if (ice->pcm_reserved[i] &&
749 ice->pcm_reserved[i] != substream) {
750 mutex_unlock(&ice->open_mutex);
751 return -EBUSY;
752 }
753 ice->pcm_reserved[i] = substream;
754 break;
755 }
756 }
757 }
758 mutex_unlock(&ice->open_mutex);
759
760 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
761 if (err < 0)
762 return err;
763
764 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
765}
766
767static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
768{
769 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
770 int i;
771
772 mutex_lock(&ice->open_mutex);
773 /* unmark surround channels */
774 for (i = 0; i < 3; i++)
775 if (ice->pcm_reserved[i] == substream)
776 ice->pcm_reserved[i] = NULL;
777 mutex_unlock(&ice->open_mutex);
778 return snd_pcm_lib_free_pages(substream);
779}
780
781static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
782{
783 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
784 unsigned char val;
785 unsigned int size;
786
787 spin_lock_irq(&ice->reg_lock);
788 val = (8 - substream->runtime->channels) >> 1;
789 outb(val, ICEMT1724(ice, BURST));
790
791 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
792
793 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
794 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
795 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
796 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
797 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
798 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
799 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
800 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
801
802 spin_unlock_irq(&ice->reg_lock);
803
804 /*
805 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, "
806 "buffer = 0x%x, period = 0x%x\n",
807 substream->runtime->channels,
808 (unsigned int)substream->runtime->dma_addr,
809 snd_pcm_lib_buffer_bytes(substream),
810 snd_pcm_lib_period_bytes(substream));
811 */
812 return 0;
813}
814
815static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
816{
817 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
818 size_t ptr;
819
820 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
821 return 0;
822#if 0 /* read PLAYBACK_ADDR */
823 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
824 if (ptr < substream->runtime->dma_addr) {
825 dev_dbg(ice->card->dev, "invalid negative ptr\n");
826 return 0;
827 }
828 ptr -= substream->runtime->dma_addr;
829 ptr = bytes_to_frames(substream->runtime, ptr);
830 if (ptr >= substream->runtime->buffer_size) {
831 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
832 (int)ptr, (int)substream->runtime->period_size);
833 return 0;
834 }
835#else /* read PLAYBACK_SIZE */
836 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
837 ptr = (ptr + 1) << 2;
838 ptr = bytes_to_frames(substream->runtime, ptr);
839 if (!ptr)
840 ;
841 else if (ptr <= substream->runtime->buffer_size)
842 ptr = substream->runtime->buffer_size - ptr;
843 else {
844 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
845 (int)ptr, (int)substream->runtime->buffer_size);
846 ptr = 0;
847 }
848#endif
849 return ptr;
850}
851
852static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
853{
854 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
855 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
856
857 spin_lock_irq(&ice->reg_lock);
858 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
859 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
860 ice->profi_port + reg->size);
861 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
862 ice->profi_port + reg->count);
863 spin_unlock_irq(&ice->reg_lock);
864 return 0;
865}
866
867static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
868{
869 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
870 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
871 size_t ptr;
872
873 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
874 return 0;
875#if 0 /* use ADDR register */
876 ptr = inl(ice->profi_port + reg->addr);
877 ptr -= substream->runtime->dma_addr;
878 return bytes_to_frames(substream->runtime, ptr);
879#else /* use SIZE register */
880 ptr = inw(ice->profi_port + reg->size);
881 ptr = (ptr + 1) << 2;
882 ptr = bytes_to_frames(substream->runtime, ptr);
883 if (!ptr)
884 ;
885 else if (ptr <= substream->runtime->buffer_size)
886 ptr = substream->runtime->buffer_size - ptr;
887 else {
888 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
889 (int)ptr, (int)substream->runtime->buffer_size);
890 ptr = 0;
891 }
892 return ptr;
893#endif
894}
895
896static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
897 .addr = VT1724_MT_PLAYBACK_ADDR,
898 .size = VT1724_MT_PLAYBACK_SIZE,
899 .count = VT1724_MT_PLAYBACK_COUNT,
900 .start = VT1724_PDMA0_START,
901};
902
903static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
904 .addr = VT1724_MT_PDMA4_ADDR,
905 .size = VT1724_MT_PDMA4_SIZE,
906 .count = VT1724_MT_PDMA4_COUNT,
907 .start = VT1724_PDMA4_START,
908};
909
910static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
911 .addr = VT1724_MT_CAPTURE_ADDR,
912 .size = VT1724_MT_CAPTURE_SIZE,
913 .count = VT1724_MT_CAPTURE_COUNT,
914 .start = VT1724_RDMA0_START,
915};
916
917static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
918 .addr = VT1724_MT_RDMA1_ADDR,
919 .size = VT1724_MT_RDMA1_SIZE,
920 .count = VT1724_MT_RDMA1_COUNT,
921 .start = VT1724_RDMA1_START,
922};
923
924#define vt1724_playback_pro_reg vt1724_pdma0_reg
925#define vt1724_playback_spdif_reg vt1724_pdma4_reg
926#define vt1724_capture_pro_reg vt1724_rdma0_reg
927#define vt1724_capture_spdif_reg vt1724_rdma1_reg
928
929static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
930 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
931 SNDRV_PCM_INFO_BLOCK_TRANSFER |
932 SNDRV_PCM_INFO_MMAP_VALID |
933 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
934 .formats = SNDRV_PCM_FMTBIT_S32_LE,
935 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
936 .rate_min = 8000,
937 .rate_max = 192000,
938 .channels_min = 2,
939 .channels_max = 8,
940 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
941 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
942 .period_bytes_max = (1UL << 21),
943 .periods_min = 2,
944 .periods_max = 1024,
945};
946
947static const struct snd_pcm_hardware snd_vt1724_spdif = {
948 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
949 SNDRV_PCM_INFO_BLOCK_TRANSFER |
950 SNDRV_PCM_INFO_MMAP_VALID |
951 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
952 .formats = SNDRV_PCM_FMTBIT_S32_LE,
953 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
954 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
955 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
956 SNDRV_PCM_RATE_192000),
957 .rate_min = 32000,
958 .rate_max = 192000,
959 .channels_min = 2,
960 .channels_max = 2,
961 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
962 .period_bytes_min = 2 * 4 * 2,
963 .period_bytes_max = (1UL << 18),
964 .periods_min = 2,
965 .periods_max = 1024,
966};
967
968static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
969 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
970 SNDRV_PCM_INFO_BLOCK_TRANSFER |
971 SNDRV_PCM_INFO_MMAP_VALID |
972 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
973 .formats = SNDRV_PCM_FMTBIT_S32_LE,
974 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
975 .rate_min = 8000,
976 .rate_max = 192000,
977 .channels_min = 2,
978 .channels_max = 2,
979 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
980 .period_bytes_min = 2 * 4 * 2,
981 .period_bytes_max = (1UL << 18),
982 .periods_min = 2,
983 .periods_max = 1024,
984};
985
986/*
987 * set rate constraints
988 */
989static void set_std_hw_rates(struct snd_ice1712 *ice)
990{
991 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
992 /* I2S */
993 /* VT1720 doesn't support more than 96kHz */
994 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
995 ice->hw_rates = &hw_constraints_rates_192;
996 else
997 ice->hw_rates = &hw_constraints_rates_96;
998 } else {
999 /* ACLINK */
1000 ice->hw_rates = &hw_constraints_rates_48;
1001 }
1002}
1003
1004static int set_rate_constraints(struct snd_ice1712 *ice,
1005 struct snd_pcm_substream *substream)
1006{
1007 struct snd_pcm_runtime *runtime = substream->runtime;
1008
1009 runtime->hw.rate_min = ice->hw_rates->list[0];
1010 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
1011 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1012 return snd_pcm_hw_constraint_list(runtime, 0,
1013 SNDRV_PCM_HW_PARAM_RATE,
1014 ice->hw_rates);
1015}
1016
1017/* if the card has the internal rate locked (is_pro_locked), limit runtime
1018 hw rates to the current internal rate only.
1019*/
1020static void constrain_rate_if_locked(struct snd_pcm_substream *substream)
1021{
1022 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1023 struct snd_pcm_runtime *runtime = substream->runtime;
1024 unsigned int rate;
1025 if (is_pro_rate_locked(ice)) {
1026 rate = ice->get_rate(ice);
1027 if (rate >= runtime->hw.rate_min
1028 && rate <= runtime->hw.rate_max) {
1029 runtime->hw.rate_min = rate;
1030 runtime->hw.rate_max = rate;
1031 }
1032 }
1033}
1034
1035
1036/* multi-channel playback needs alignment 8x32bit regardless of the channels
1037 * actually used
1038 */
1039#define VT1724_BUFFER_ALIGN 0x20
1040
1041static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1042{
1043 struct snd_pcm_runtime *runtime = substream->runtime;
1044 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1045 int chs, num_indeps;
1046
1047 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1048 ice->playback_pro_substream = substream;
1049 runtime->hw = snd_vt1724_playback_pro;
1050 snd_pcm_set_sync(substream);
1051 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1052 set_rate_constraints(ice, substream);
1053 mutex_lock(&ice->open_mutex);
1054 /* calculate the currently available channels */
1055 num_indeps = ice->num_total_dacs / 2 - 1;
1056 for (chs = 0; chs < num_indeps; chs++) {
1057 if (ice->pcm_reserved[chs])
1058 break;
1059 }
1060 chs = (chs + 1) * 2;
1061 runtime->hw.channels_max = chs;
1062 if (chs > 2) /* channels must be even */
1063 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1064 mutex_unlock(&ice->open_mutex);
1065 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1066 VT1724_BUFFER_ALIGN);
1067 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1068 VT1724_BUFFER_ALIGN);
1069 constrain_rate_if_locked(substream);
1070 if (ice->pro_open)
1071 ice->pro_open(ice, substream);
1072 return 0;
1073}
1074
1075static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1076{
1077 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1078 struct snd_pcm_runtime *runtime = substream->runtime;
1079
1080 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1081 ice->capture_pro_substream = substream;
1082 runtime->hw = snd_vt1724_2ch_stereo;
1083 snd_pcm_set_sync(substream);
1084 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1085 set_rate_constraints(ice, substream);
1086 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1087 VT1724_BUFFER_ALIGN);
1088 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1089 VT1724_BUFFER_ALIGN);
1090 constrain_rate_if_locked(substream);
1091 if (ice->pro_open)
1092 ice->pro_open(ice, substream);
1093 return 0;
1094}
1095
1096static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1097{
1098 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1099
1100 if (PRO_RATE_RESET)
1101 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1102 ice->playback_pro_substream = NULL;
1103
1104 return 0;
1105}
1106
1107static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1108{
1109 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1110
1111 if (PRO_RATE_RESET)
1112 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1113 ice->capture_pro_substream = NULL;
1114 return 0;
1115}
1116
1117static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1118 .open = snd_vt1724_playback_pro_open,
1119 .close = snd_vt1724_playback_pro_close,
1120 .ioctl = snd_pcm_lib_ioctl,
1121 .hw_params = snd_vt1724_pcm_hw_params,
1122 .hw_free = snd_vt1724_pcm_hw_free,
1123 .prepare = snd_vt1724_playback_pro_prepare,
1124 .trigger = snd_vt1724_pcm_trigger,
1125 .pointer = snd_vt1724_playback_pro_pointer,
1126};
1127
1128static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1129 .open = snd_vt1724_capture_pro_open,
1130 .close = snd_vt1724_capture_pro_close,
1131 .ioctl = snd_pcm_lib_ioctl,
1132 .hw_params = snd_vt1724_pcm_hw_params,
1133 .hw_free = snd_vt1724_pcm_hw_free,
1134 .prepare = snd_vt1724_pcm_prepare,
1135 .trigger = snd_vt1724_pcm_trigger,
1136 .pointer = snd_vt1724_pcm_pointer,
1137};
1138
1139static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1140{
1141 struct snd_pcm *pcm;
1142 int capt, err;
1143
1144 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) ==
1145 VT1724_CFG_ADC_NONE)
1146 capt = 0;
1147 else
1148 capt = 1;
1149 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm);
1150 if (err < 0)
1151 return err;
1152
1153 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
1154 if (capt)
1155 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1156 &snd_vt1724_capture_pro_ops);
1157
1158 pcm->private_data = ice;
1159 pcm->info_flags = 0;
1160 strcpy(pcm->name, "ICE1724");
1161
1162 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1163 snd_dma_pci_data(ice->pci),
1164 256*1024, 256*1024);
1165
1166 ice->pcm_pro = pcm;
1167
1168 return 0;
1169}
1170
1171
1172/*
1173 * SPDIF PCM
1174 */
1175
1176/* update spdif control bits; call with reg_lock */
1177static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1178{
1179 unsigned char cbit, disabled;
1180
1181 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1182 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
1183 if (cbit != disabled)
1184 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1185 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1186 if (cbit != disabled)
1187 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1188 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1189}
1190
1191/* update SPDIF control bits according to the given rate */
1192static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1193{
1194 unsigned int val, nval;
1195 unsigned long flags;
1196
1197 spin_lock_irqsave(&ice->reg_lock, flags);
1198 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1199 nval &= ~(7 << 12);
1200 switch (rate) {
1201 case 44100: break;
1202 case 48000: nval |= 2 << 12; break;
1203 case 32000: nval |= 3 << 12; break;
1204 case 88200: nval |= 4 << 12; break;
1205 case 96000: nval |= 5 << 12; break;
1206 case 192000: nval |= 6 << 12; break;
1207 case 176400: nval |= 7 << 12; break;
1208 }
1209 if (val != nval)
1210 update_spdif_bits(ice, nval);
1211 spin_unlock_irqrestore(&ice->reg_lock, flags);
1212}
1213
1214static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1215{
1216 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1217 if (!ice->force_pdma4)
1218 update_spdif_rate(ice, substream->runtime->rate);
1219 return snd_vt1724_pcm_prepare(substream);
1220}
1221
1222static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1223{
1224 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1225 struct snd_pcm_runtime *runtime = substream->runtime;
1226
1227 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1228 ice->playback_con_substream = substream;
1229 if (ice->force_pdma4) {
1230 runtime->hw = snd_vt1724_2ch_stereo;
1231 set_rate_constraints(ice, substream);
1232 } else
1233 runtime->hw = snd_vt1724_spdif;
1234 snd_pcm_set_sync(substream);
1235 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1236 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1237 VT1724_BUFFER_ALIGN);
1238 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1239 VT1724_BUFFER_ALIGN);
1240 constrain_rate_if_locked(substream);
1241 if (ice->spdif.ops.open)
1242 ice->spdif.ops.open(ice, substream);
1243 return 0;
1244}
1245
1246static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1247{
1248 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1249
1250 if (PRO_RATE_RESET)
1251 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1252 ice->playback_con_substream = NULL;
1253 if (ice->spdif.ops.close)
1254 ice->spdif.ops.close(ice, substream);
1255
1256 return 0;
1257}
1258
1259static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1260{
1261 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1262 struct snd_pcm_runtime *runtime = substream->runtime;
1263
1264 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1265 ice->capture_con_substream = substream;
1266 if (ice->force_rdma1) {
1267 runtime->hw = snd_vt1724_2ch_stereo;
1268 set_rate_constraints(ice, substream);
1269 } else
1270 runtime->hw = snd_vt1724_spdif;
1271 snd_pcm_set_sync(substream);
1272 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1273 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1274 VT1724_BUFFER_ALIGN);
1275 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1276 VT1724_BUFFER_ALIGN);
1277 constrain_rate_if_locked(substream);
1278 if (ice->spdif.ops.open)
1279 ice->spdif.ops.open(ice, substream);
1280 return 0;
1281}
1282
1283static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1284{
1285 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1286
1287 if (PRO_RATE_RESET)
1288 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1289 ice->capture_con_substream = NULL;
1290 if (ice->spdif.ops.close)
1291 ice->spdif.ops.close(ice, substream);
1292
1293 return 0;
1294}
1295
1296static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1297 .open = snd_vt1724_playback_spdif_open,
1298 .close = snd_vt1724_playback_spdif_close,
1299 .ioctl = snd_pcm_lib_ioctl,
1300 .hw_params = snd_vt1724_pcm_hw_params,
1301 .hw_free = snd_vt1724_pcm_hw_free,
1302 .prepare = snd_vt1724_playback_spdif_prepare,
1303 .trigger = snd_vt1724_pcm_trigger,
1304 .pointer = snd_vt1724_pcm_pointer,
1305};
1306
1307static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1308 .open = snd_vt1724_capture_spdif_open,
1309 .close = snd_vt1724_capture_spdif_close,
1310 .ioctl = snd_pcm_lib_ioctl,
1311 .hw_params = snd_vt1724_pcm_hw_params,
1312 .hw_free = snd_vt1724_pcm_hw_free,
1313 .prepare = snd_vt1724_pcm_prepare,
1314 .trigger = snd_vt1724_pcm_trigger,
1315 .pointer = snd_vt1724_pcm_pointer,
1316};
1317
1318
1319static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1320{
1321 char *name;
1322 struct snd_pcm *pcm;
1323 int play, capt;
1324 int err;
1325
1326 if (ice->force_pdma4 ||
1327 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1328 play = 1;
1329 ice->has_spdif = 1;
1330 } else
1331 play = 0;
1332 if (ice->force_rdma1 ||
1333 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1334 capt = 1;
1335 ice->has_spdif = 1;
1336 } else
1337 capt = 0;
1338 if (!play && !capt)
1339 return 0; /* no spdif device */
1340
1341 if (ice->force_pdma4 || ice->force_rdma1)
1342 name = "ICE1724 Secondary";
1343 else
1344 name = "ICE1724 IEC958";
1345 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1346 if (err < 0)
1347 return err;
1348
1349 if (play)
1350 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1351 &snd_vt1724_playback_spdif_ops);
1352 if (capt)
1353 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1354 &snd_vt1724_capture_spdif_ops);
1355
1356 pcm->private_data = ice;
1357 pcm->info_flags = 0;
1358 strcpy(pcm->name, name);
1359
1360 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1361 snd_dma_pci_data(ice->pci),
1362 256*1024, 256*1024);
1363
1364 ice->pcm = pcm;
1365
1366 return 0;
1367}
1368
1369
1370/*
1371 * independent surround PCMs
1372 */
1373
1374static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1375 {
1376 .addr = VT1724_MT_PDMA1_ADDR,
1377 .size = VT1724_MT_PDMA1_SIZE,
1378 .count = VT1724_MT_PDMA1_COUNT,
1379 .start = VT1724_PDMA1_START,
1380 },
1381 {
1382 .addr = VT1724_MT_PDMA2_ADDR,
1383 .size = VT1724_MT_PDMA2_SIZE,
1384 .count = VT1724_MT_PDMA2_COUNT,
1385 .start = VT1724_PDMA2_START,
1386 },
1387 {
1388 .addr = VT1724_MT_PDMA3_ADDR,
1389 .size = VT1724_MT_PDMA3_SIZE,
1390 .count = VT1724_MT_PDMA3_COUNT,
1391 .start = VT1724_PDMA3_START,
1392 },
1393};
1394
1395static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1396{
1397 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1398 unsigned char val;
1399
1400 spin_lock_irq(&ice->reg_lock);
1401 val = 3 - substream->number;
1402 if (inb(ICEMT1724(ice, BURST)) < val)
1403 outb(val, ICEMT1724(ice, BURST));
1404 spin_unlock_irq(&ice->reg_lock);
1405 return snd_vt1724_pcm_prepare(substream);
1406}
1407
1408static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1409{
1410 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1411 struct snd_pcm_runtime *runtime = substream->runtime;
1412
1413 mutex_lock(&ice->open_mutex);
1414 /* already used by PDMA0? */
1415 if (ice->pcm_reserved[substream->number]) {
1416 mutex_unlock(&ice->open_mutex);
1417 return -EBUSY; /* FIXME: should handle blocking mode properly */
1418 }
1419 mutex_unlock(&ice->open_mutex);
1420 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1421 ice->playback_con_substream_ds[substream->number] = substream;
1422 runtime->hw = snd_vt1724_2ch_stereo;
1423 snd_pcm_set_sync(substream);
1424 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1425 set_rate_constraints(ice, substream);
1426 return 0;
1427}
1428
1429static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1430{
1431 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1432
1433 if (PRO_RATE_RESET)
1434 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1435 ice->playback_con_substream_ds[substream->number] = NULL;
1436 ice->pcm_reserved[substream->number] = NULL;
1437
1438 return 0;
1439}
1440
1441static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1442 .open = snd_vt1724_playback_indep_open,
1443 .close = snd_vt1724_playback_indep_close,
1444 .ioctl = snd_pcm_lib_ioctl,
1445 .hw_params = snd_vt1724_pcm_hw_params,
1446 .hw_free = snd_vt1724_pcm_hw_free,
1447 .prepare = snd_vt1724_playback_indep_prepare,
1448 .trigger = snd_vt1724_pcm_trigger,
1449 .pointer = snd_vt1724_pcm_pointer,
1450};
1451
1452
1453static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1454{
1455 struct snd_pcm *pcm;
1456 int play;
1457 int err;
1458
1459 play = ice->num_total_dacs / 2 - 1;
1460 if (play <= 0)
1461 return 0;
1462
1463 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1464 if (err < 0)
1465 return err;
1466
1467 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1468 &snd_vt1724_playback_indep_ops);
1469
1470 pcm->private_data = ice;
1471 pcm->info_flags = 0;
1472 strcpy(pcm->name, "ICE1724 Surround PCM");
1473
1474 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1475 snd_dma_pci_data(ice->pci),
1476 256*1024, 256*1024);
1477
1478 ice->pcm_ds = pcm;
1479
1480 return 0;
1481}
1482
1483
1484/*
1485 * Mixer section
1486 */
1487
1488static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1489{
1490 int err;
1491
1492 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1493 struct snd_ac97_bus *pbus;
1494 struct snd_ac97_template ac97;
1495 static struct snd_ac97_bus_ops ops = {
1496 .write = snd_vt1724_ac97_write,
1497 .read = snd_vt1724_ac97_read,
1498 };
1499
1500 /* cold reset */
1501 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1502 mdelay(5); /* FIXME */
1503 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1504
1505 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1506 if (err < 0)
1507 return err;
1508 memset(&ac97, 0, sizeof(ac97));
1509 ac97.private_data = ice;
1510 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1511 if (err < 0)
1512 dev_warn(ice->card->dev,
1513 "cannot initialize pro ac97, skipped\n");
1514 else
1515 return 0;
1516 }
1517 /* I2S mixer only */
1518 strcat(ice->card->mixername, "ICE1724 - multitrack");
1519 return 0;
1520}
1521
1522/*
1523 *
1524 */
1525
1526static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1527{
1528 return (unsigned int)ice->eeprom.data[idx] | \
1529 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1530 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1531}
1532
1533static void snd_vt1724_proc_read(struct snd_info_entry *entry,
1534 struct snd_info_buffer *buffer)
1535{
1536 struct snd_ice1712 *ice = entry->private_data;
1537 unsigned int idx;
1538
1539 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1540 snd_iprintf(buffer, "EEPROM:\n");
1541
1542 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1543 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1544 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1545 snd_iprintf(buffer, " System Config : 0x%x\n",
1546 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1547 snd_iprintf(buffer, " ACLink : 0x%x\n",
1548 ice->eeprom.data[ICE_EEP2_ACLINK]);
1549 snd_iprintf(buffer, " I2S : 0x%x\n",
1550 ice->eeprom.data[ICE_EEP2_I2S]);
1551 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1552 ice->eeprom.data[ICE_EEP2_SPDIF]);
1553 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1554 ice->eeprom.gpiodir);
1555 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1556 ice->eeprom.gpiomask);
1557 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1558 ice->eeprom.gpiostate);
1559 for (idx = 0x12; idx < ice->eeprom.size; idx++)
1560 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1561 idx, ice->eeprom.data[idx]);
1562
1563 snd_iprintf(buffer, "\nRegisters:\n");
1564
1565 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1566 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1567 for (idx = 0x0; idx < 0x20 ; idx++)
1568 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1569 idx, inb(ice->port+idx));
1570 for (idx = 0x0; idx < 0x30 ; idx++)
1571 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1572 idx, inb(ice->profi_port+idx));
1573}
1574
1575static void snd_vt1724_proc_init(struct snd_ice1712 *ice)
1576{
1577 struct snd_info_entry *entry;
1578
1579 if (!snd_card_proc_new(ice->card, "ice1724", &entry))
1580 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1581}
1582
1583/*
1584 *
1585 */
1586
1587static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1588 struct snd_ctl_elem_info *uinfo)
1589{
1590 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1591 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1592 return 0;
1593}
1594
1595static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1596 struct snd_ctl_elem_value *ucontrol)
1597{
1598 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1599
1600 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1601 return 0;
1602}
1603
1604static const struct snd_kcontrol_new snd_vt1724_eeprom = {
1605 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1606 .name = "ICE1724 EEPROM",
1607 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1608 .info = snd_vt1724_eeprom_info,
1609 .get = snd_vt1724_eeprom_get
1610};
1611
1612/*
1613 */
1614static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1615 struct snd_ctl_elem_info *uinfo)
1616{
1617 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1618 uinfo->count = 1;
1619 return 0;
1620}
1621
1622static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1623{
1624 unsigned int val, rbits;
1625
1626 val = diga->status[0] & 0x03; /* professional, non-audio */
1627 if (val & 0x01) {
1628 /* professional */
1629 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1630 IEC958_AES0_PRO_EMPHASIS_5015)
1631 val |= 1U << 3;
1632 rbits = (diga->status[4] >> 3) & 0x0f;
1633 if (rbits) {
1634 switch (rbits) {
1635 case 2: val |= 5 << 12; break; /* 96k */
1636 case 3: val |= 6 << 12; break; /* 192k */
1637 case 10: val |= 4 << 12; break; /* 88.2k */
1638 case 11: val |= 7 << 12; break; /* 176.4k */
1639 }
1640 } else {
1641 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1642 case IEC958_AES0_PRO_FS_44100:
1643 break;
1644 case IEC958_AES0_PRO_FS_32000:
1645 val |= 3U << 12;
1646 break;
1647 default:
1648 val |= 2U << 12;
1649 break;
1650 }
1651 }
1652 } else {
1653 /* consumer */
1654 val |= diga->status[1] & 0x04; /* copyright */
1655 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1656 IEC958_AES0_CON_EMPHASIS_5015)
1657 val |= 1U << 3;
1658 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1659 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1660 }
1661 return val;
1662}
1663
1664static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1665{
1666 memset(diga->status, 0, sizeof(diga->status));
1667 diga->status[0] = val & 0x03; /* professional, non-audio */
1668 if (val & 0x01) {
1669 /* professional */
1670 if (val & (1U << 3))
1671 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1672 switch ((val >> 12) & 0x7) {
1673 case 0:
1674 break;
1675 case 2:
1676 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1677 break;
1678 default:
1679 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1680 break;
1681 }
1682 } else {
1683 /* consumer */
1684 diga->status[0] |= val & (1U << 2); /* copyright */
1685 if (val & (1U << 3))
1686 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1687 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1688 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1689 }
1690}
1691
1692static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1693 struct snd_ctl_elem_value *ucontrol)
1694{
1695 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1696 unsigned int val;
1697 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1698 decode_spdif_bits(&ucontrol->value.iec958, val);
1699 return 0;
1700}
1701
1702static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1703 struct snd_ctl_elem_value *ucontrol)
1704{
1705 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1706 unsigned int val, old;
1707
1708 val = encode_spdif_bits(&ucontrol->value.iec958);
1709 spin_lock_irq(&ice->reg_lock);
1710 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1711 if (val != old)
1712 update_spdif_bits(ice, val);
1713 spin_unlock_irq(&ice->reg_lock);
1714 return val != old;
1715}
1716
1717static const struct snd_kcontrol_new snd_vt1724_spdif_default =
1718{
1719 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1720 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1721 .info = snd_vt1724_spdif_info,
1722 .get = snd_vt1724_spdif_default_get,
1723 .put = snd_vt1724_spdif_default_put
1724};
1725
1726static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1727 struct snd_ctl_elem_value *ucontrol)
1728{
1729 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1730 IEC958_AES0_PROFESSIONAL |
1731 IEC958_AES0_CON_NOT_COPYRIGHT |
1732 IEC958_AES0_CON_EMPHASIS;
1733 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1734 IEC958_AES1_CON_CATEGORY;
1735 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1736 return 0;
1737}
1738
1739static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1740 struct snd_ctl_elem_value *ucontrol)
1741{
1742 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1743 IEC958_AES0_PROFESSIONAL |
1744 IEC958_AES0_PRO_FS |
1745 IEC958_AES0_PRO_EMPHASIS;
1746 return 0;
1747}
1748
1749static const struct snd_kcontrol_new snd_vt1724_spdif_maskc =
1750{
1751 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1752 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1753 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1754 .info = snd_vt1724_spdif_info,
1755 .get = snd_vt1724_spdif_maskc_get,
1756};
1757
1758static const struct snd_kcontrol_new snd_vt1724_spdif_maskp =
1759{
1760 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1761 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1762 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1763 .info = snd_vt1724_spdif_info,
1764 .get = snd_vt1724_spdif_maskp_get,
1765};
1766
1767#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1768
1769static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1770 struct snd_ctl_elem_value *ucontrol)
1771{
1772 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1773 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1774 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1775 return 0;
1776}
1777
1778static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1779 struct snd_ctl_elem_value *ucontrol)
1780{
1781 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1782 unsigned char old, val;
1783
1784 spin_lock_irq(&ice->reg_lock);
1785 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1786 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1787 if (ucontrol->value.integer.value[0])
1788 val |= VT1724_CFG_SPDIF_OUT_EN;
1789 if (old != val)
1790 outb(val, ICEREG1724(ice, SPDIF_CFG));
1791 spin_unlock_irq(&ice->reg_lock);
1792 return old != val;
1793}
1794
1795static const struct snd_kcontrol_new snd_vt1724_spdif_switch =
1796{
1797 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1798 /* FIXME: the following conflict with IEC958 Playback Route */
1799 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
1800 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
1801 .info = snd_vt1724_spdif_sw_info,
1802 .get = snd_vt1724_spdif_sw_get,
1803 .put = snd_vt1724_spdif_sw_put
1804};
1805
1806
1807#if 0 /* NOT USED YET */
1808/*
1809 * GPIO access from extern
1810 */
1811
1812#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
1813
1814int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1815 struct snd_ctl_elem_value *ucontrol)
1816{
1817 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1818 int shift = kcontrol->private_value & 0xff;
1819 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1820
1821 snd_ice1712_save_gpio_status(ice);
1822 ucontrol->value.integer.value[0] =
1823 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1824 snd_ice1712_restore_gpio_status(ice);
1825 return 0;
1826}
1827
1828int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1829 struct snd_ctl_elem_value *ucontrol)
1830{
1831 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1832 int shift = kcontrol->private_value & 0xff;
1833 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1834 unsigned int val, nval;
1835
1836 if (kcontrol->private_value & (1 << 31))
1837 return -EPERM;
1838 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1839 snd_ice1712_save_gpio_status(ice);
1840 val = snd_ice1712_gpio_read(ice);
1841 nval |= val & ~(1 << shift);
1842 if (val != nval)
1843 snd_ice1712_gpio_write(ice, nval);
1844 snd_ice1712_restore_gpio_status(ice);
1845 return val != nval;
1846}
1847#endif /* NOT USED YET */
1848
1849/*
1850 * rate
1851 */
1852static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1853 struct snd_ctl_elem_info *uinfo)
1854{
1855 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1856 int hw_rates_count = ice->hw_rates->count;
1857 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1858 uinfo->count = 1;
1859
1860 /* internal clocks */
1861 uinfo->value.enumerated.items = hw_rates_count;
1862 /* external clocks */
1863 if (ice->force_rdma1 ||
1864 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN))
1865 uinfo->value.enumerated.items += ice->ext_clock_count;
1866 /* upper limit - keep at top */
1867 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1868 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1869 if (uinfo->value.enumerated.item >= hw_rates_count)
1870 /* ext_clock items */
1871 strcpy(uinfo->value.enumerated.name,
1872 ice->ext_clock_names[
1873 uinfo->value.enumerated.item - hw_rates_count]);
1874 else
1875 /* int clock items */
1876 sprintf(uinfo->value.enumerated.name, "%d",
1877 ice->hw_rates->list[uinfo->value.enumerated.item]);
1878 return 0;
1879}
1880
1881static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1882 struct snd_ctl_elem_value *ucontrol)
1883{
1884 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1885 unsigned int i, rate;
1886
1887 spin_lock_irq(&ice->reg_lock);
1888 if (ice->is_spdif_master(ice)) {
1889 ucontrol->value.enumerated.item[0] = ice->hw_rates->count +
1890 ice->get_spdif_master_type(ice);
1891 } else {
1892 rate = ice->get_rate(ice);
1893 ucontrol->value.enumerated.item[0] = 0;
1894 for (i = 0; i < ice->hw_rates->count; i++) {
1895 if (ice->hw_rates->list[i] == rate) {
1896 ucontrol->value.enumerated.item[0] = i;
1897 break;
1898 }
1899 }
1900 }
1901 spin_unlock_irq(&ice->reg_lock);
1902 return 0;
1903}
1904
1905static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice)
1906{
1907 /* standard external clock - only single type - SPDIF IN */
1908 return 0;
1909}
1910
1911/* setting clock to external - SPDIF */
1912static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type)
1913{
1914 unsigned char oval;
1915 unsigned char i2s_oval;
1916 oval = inb(ICEMT1724(ice, RATE));
1917 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1918 /* setting 256fs */
1919 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1920 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1921 return 0;
1922}
1923
1924
1925static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1926 struct snd_ctl_elem_value *ucontrol)
1927{
1928 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1929 unsigned int old_rate, new_rate;
1930 unsigned int item = ucontrol->value.enumerated.item[0];
1931 unsigned int first_ext_clock = ice->hw_rates->count;
1932
1933 if (item > first_ext_clock + ice->ext_clock_count - 1)
1934 return -EINVAL;
1935
1936 /* if rate = 0 => external clock */
1937 spin_lock_irq(&ice->reg_lock);
1938 if (ice->is_spdif_master(ice))
1939 old_rate = 0;
1940 else
1941 old_rate = ice->get_rate(ice);
1942 if (item >= first_ext_clock) {
1943 /* switching to external clock */
1944 ice->set_spdif_clock(ice, item - first_ext_clock);
1945 new_rate = 0;
1946 } else {
1947 /* internal on-card clock */
1948 new_rate = ice->hw_rates->list[item];
1949 ice->pro_rate_default = new_rate;
1950 spin_unlock_irq(&ice->reg_lock);
1951 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1952 spin_lock_irq(&ice->reg_lock);
1953 }
1954 spin_unlock_irq(&ice->reg_lock);
1955
1956 /* the first switch to the ext. clock mode? */
1957 if (old_rate != new_rate && !new_rate) {
1958 /* notify akm chips as well */
1959 unsigned int i;
1960 if (ice->gpio.set_pro_rate)
1961 ice->gpio.set_pro_rate(ice, 0);
1962 for (i = 0; i < ice->akm_codecs; i++) {
1963 if (ice->akm[i].ops.set_rate_val)
1964 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1965 }
1966 }
1967 return old_rate != new_rate;
1968}
1969
1970static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = {
1971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1972 .name = "Multi Track Internal Clock",
1973 .info = snd_vt1724_pro_internal_clock_info,
1974 .get = snd_vt1724_pro_internal_clock_get,
1975 .put = snd_vt1724_pro_internal_clock_put
1976};
1977
1978#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1979
1980static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1981 struct snd_ctl_elem_value *ucontrol)
1982{
1983 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1984 return 0;
1985}
1986
1987static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1988 struct snd_ctl_elem_value *ucontrol)
1989{
1990 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1991 int change = 0, nval;
1992
1993 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1994 spin_lock_irq(&ice->reg_lock);
1995 change = PRO_RATE_LOCKED != nval;
1996 PRO_RATE_LOCKED = nval;
1997 spin_unlock_irq(&ice->reg_lock);
1998 return change;
1999}
2000
2001static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = {
2002 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2003 .name = "Multi Track Rate Locking",
2004 .info = snd_vt1724_pro_rate_locking_info,
2005 .get = snd_vt1724_pro_rate_locking_get,
2006 .put = snd_vt1724_pro_rate_locking_put
2007};
2008
2009#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
2010
2011static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2012 struct snd_ctl_elem_value *ucontrol)
2013{
2014 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
2015 return 0;
2016}
2017
2018static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2019 struct snd_ctl_elem_value *ucontrol)
2020{
2021 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2022 int change = 0, nval;
2023
2024 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2025 spin_lock_irq(&ice->reg_lock);
2026 change = PRO_RATE_RESET != nval;
2027 PRO_RATE_RESET = nval;
2028 spin_unlock_irq(&ice->reg_lock);
2029 return change;
2030}
2031
2032static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = {
2033 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2034 .name = "Multi Track Rate Reset",
2035 .info = snd_vt1724_pro_rate_reset_info,
2036 .get = snd_vt1724_pro_rate_reset_get,
2037 .put = snd_vt1724_pro_rate_reset_put
2038};
2039
2040
2041/*
2042 * routing
2043 */
2044static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
2045 struct snd_ctl_elem_info *uinfo)
2046{
2047 static const char * const texts[] = {
2048 "PCM Out", /* 0 */
2049 "H/W In 0", "H/W In 1", /* 1-2 */
2050 "IEC958 In L", "IEC958 In R", /* 3-4 */
2051 };
2052
2053 return snd_ctl_enum_info(uinfo, 1, 5, texts);
2054}
2055
2056static inline int analog_route_shift(int idx)
2057{
2058 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
2059}
2060
2061static inline int digital_route_shift(int idx)
2062{
2063 return idx * 3;
2064}
2065
2066int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
2067{
2068 unsigned long val;
2069 unsigned char eitem;
2070 static const unsigned char xlate[8] = {
2071 0, 255, 1, 2, 255, 255, 3, 4,
2072 };
2073
2074 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2075 val >>= shift;
2076 val &= 7; /* we now have 3 bits per output */
2077 eitem = xlate[val];
2078 if (eitem == 255) {
2079 snd_BUG();
2080 return 0;
2081 }
2082 return eitem;
2083}
2084
2085int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
2086 int shift)
2087{
2088 unsigned int old_val, nval;
2089 int change;
2090 static const unsigned char xroute[8] = {
2091 0, /* PCM */
2092 2, /* PSDIN0 Left */
2093 3, /* PSDIN0 Right */
2094 6, /* SPDIN Left */
2095 7, /* SPDIN Right */
2096 };
2097
2098 nval = xroute[val % 5];
2099 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2100 val &= ~(0x07 << shift);
2101 val |= nval << shift;
2102 change = val != old_val;
2103 if (change)
2104 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
2105 return change;
2106}
2107
2108static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2109 struct snd_ctl_elem_value *ucontrol)
2110{
2111 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2112 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2113 ucontrol->value.enumerated.item[0] =
2114 snd_ice1724_get_route_val(ice, analog_route_shift(idx));
2115 return 0;
2116}
2117
2118static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2119 struct snd_ctl_elem_value *ucontrol)
2120{
2121 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2122 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2123 return snd_ice1724_put_route_val(ice,
2124 ucontrol->value.enumerated.item[0],
2125 analog_route_shift(idx));
2126}
2127
2128static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2129 struct snd_ctl_elem_value *ucontrol)
2130{
2131 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2132 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2133 ucontrol->value.enumerated.item[0] =
2134 snd_ice1724_get_route_val(ice, digital_route_shift(idx));
2135 return 0;
2136}
2137
2138static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2139 struct snd_ctl_elem_value *ucontrol)
2140{
2141 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2142 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2143 return snd_ice1724_put_route_val(ice,
2144 ucontrol->value.enumerated.item[0],
2145 digital_route_shift(idx));
2146}
2147
2148static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route =
2149{
2150 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2151 .name = "H/W Playback Route",
2152 .info = snd_vt1724_pro_route_info,
2153 .get = snd_vt1724_pro_route_analog_get,
2154 .put = snd_vt1724_pro_route_analog_put,
2155};
2156
2157static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = {
2158 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2159 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2160 .info = snd_vt1724_pro_route_info,
2161 .get = snd_vt1724_pro_route_spdif_get,
2162 .put = snd_vt1724_pro_route_spdif_put,
2163 .count = 2,
2164};
2165
2166
2167static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
2168 struct snd_ctl_elem_info *uinfo)
2169{
2170 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2171 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
2172 uinfo->value.integer.min = 0;
2173 uinfo->value.integer.max = 255;
2174 return 0;
2175}
2176
2177static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
2178 struct snd_ctl_elem_value *ucontrol)
2179{
2180 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2181 int idx;
2182
2183 spin_lock_irq(&ice->reg_lock);
2184 for (idx = 0; idx < 22; idx++) {
2185 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
2186 ucontrol->value.integer.value[idx] =
2187 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
2188 }
2189 spin_unlock_irq(&ice->reg_lock);
2190 return 0;
2191}
2192
2193static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = {
2194 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2195 .name = "Multi Track Peak",
2196 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2197 .info = snd_vt1724_pro_peak_info,
2198 .get = snd_vt1724_pro_peak_get
2199};
2200
2201/*
2202 *
2203 */
2204
2205static struct snd_ice1712_card_info no_matched;
2206
2207
2208/*
2209 ooAoo cards with no controls
2210*/
2211static unsigned char ooaoo_sq210_eeprom[] = {
2212 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC,
2213 1xDACs */
2214 [ICE_EEP2_ACLINK] = 0x80, /* I2S */
2215 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */
2216 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */
2217 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */
2218 [ICE_EEP2_GPIO_DIR1] = 0x00,
2219 [ICE_EEP2_GPIO_DIR2] = 0x00,
2220 [ICE_EEP2_GPIO_MASK] = 0xff,
2221 [ICE_EEP2_GPIO_MASK1] = 0xff,
2222 [ICE_EEP2_GPIO_MASK2] = 0xff,
2223
2224 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */
2225 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW
2226 and GPIO15 always zero */
2227 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */
2228};
2229
2230
2231static struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = {
2232 {
2233 .name = "ooAoo SQ210a",
2234 .model = "sq210a",
2235 .eeprom_size = sizeof(ooaoo_sq210_eeprom),
2236 .eeprom_data = ooaoo_sq210_eeprom,
2237 },
2238 { } /* terminator */
2239};
2240
2241static struct snd_ice1712_card_info *card_tables[] = {
2242 snd_vt1724_revo_cards,
2243 snd_vt1724_amp_cards,
2244 snd_vt1724_aureon_cards,
2245 snd_vt1720_mobo_cards,
2246 snd_vt1720_pontis_cards,
2247 snd_vt1724_prodigy_hifi_cards,
2248 snd_vt1724_prodigy192_cards,
2249 snd_vt1724_juli_cards,
2250 snd_vt1724_maya44_cards,
2251 snd_vt1724_phase_cards,
2252 snd_vt1724_wtm_cards,
2253 snd_vt1724_se_cards,
2254 snd_vt1724_qtet_cards,
2255 snd_vt1724_ooaoo_cards,
2256 snd_vt1724_psc724_cards,
2257 NULL,
2258};
2259
2260
2261/*
2262 */
2263
2264static void wait_i2c_busy(struct snd_ice1712 *ice)
2265{
2266 int t = 0x10000;
2267 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2268 ;
2269 if (t == -1)
2270 dev_err(ice->card->dev, "i2c busy timeout\n");
2271}
2272
2273unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2274 unsigned char dev, unsigned char addr)
2275{
2276 unsigned char val;
2277
2278 mutex_lock(&ice->i2c_mutex);
2279 wait_i2c_busy(ice);
2280 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2281 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2282 wait_i2c_busy(ice);
2283 val = inb(ICEREG1724(ice, I2C_DATA));
2284 mutex_unlock(&ice->i2c_mutex);
2285 /*
2286 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
2287 */
2288 return val;
2289}
2290
2291void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2292 unsigned char dev, unsigned char addr, unsigned char data)
2293{
2294 mutex_lock(&ice->i2c_mutex);
2295 wait_i2c_busy(ice);
2296 /*
2297 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
2298 */
2299 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2300 outb(data, ICEREG1724(ice, I2C_DATA));
2301 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2302 wait_i2c_busy(ice);
2303 mutex_unlock(&ice->i2c_mutex);
2304}
2305
2306static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2307 const char *modelname)
2308{
2309 const int dev = 0xa0; /* EEPROM device address */
2310 unsigned int i, size;
2311 struct snd_ice1712_card_info * const *tbl, *c;
2312
2313 if (!modelname || !*modelname) {
2314 ice->eeprom.subvendor = 0;
2315 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2316 ice->eeprom.subvendor =
2317 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
2318 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2319 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
2320 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
2321 if (ice->eeprom.subvendor == 0 ||
2322 ice->eeprom.subvendor == (unsigned int)-1) {
2323 /* invalid subvendor from EEPROM, try the PCI
2324 * subststem ID instead
2325 */
2326 u16 vendor, device;
2327 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2328 &vendor);
2329 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2330 ice->eeprom.subvendor =
2331 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2332 if (ice->eeprom.subvendor == 0 ||
2333 ice->eeprom.subvendor == (unsigned int)-1) {
2334 dev_err(ice->card->dev,
2335 "No valid ID is found\n");
2336 return -ENXIO;
2337 }
2338 }
2339 }
2340 for (tbl = card_tables; *tbl; tbl++) {
2341 for (c = *tbl; c->name; c++) {
2342 if (modelname && c->model &&
2343 !strcmp(modelname, c->model)) {
2344 dev_info(ice->card->dev,
2345 "Using board model %s\n",
2346 c->name);
2347 ice->eeprom.subvendor = c->subvendor;
2348 } else if (c->subvendor != ice->eeprom.subvendor)
2349 continue;
2350 ice->card_info = c;
2351 if (!c->eeprom_size || !c->eeprom_data)
2352 goto found;
2353 /* if the EEPROM is given by the driver, use it */
2354 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2355 ice->eeprom.version = 2;
2356 ice->eeprom.size = c->eeprom_size + 6;
2357 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2358 goto read_skipped;
2359 }
2360 }
2361 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2362 ice->eeprom.subvendor);
2363#ifdef CONFIG_PM_SLEEP
2364 /* assume AC97-only card which can suspend without additional code */
2365 ice->pm_suspend_enabled = 1;
2366#endif
2367
2368 found:
2369 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2370 if (ice->eeprom.size < 6)
2371 ice->eeprom.size = 32;
2372 else if (ice->eeprom.size > 32) {
2373 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n",
2374 ice->eeprom.size);
2375 return -EIO;
2376 }
2377 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2378 if (ice->eeprom.version != 1 && ice->eeprom.version != 2)
2379 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n",
2380 ice->eeprom.version);
2381 size = ice->eeprom.size - 6;
2382 for (i = 0; i < size; i++)
2383 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2384
2385 read_skipped:
2386 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2387 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2388 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2389
2390 return 0;
2391}
2392
2393
2394
2395static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
2396{
2397 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2398 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2399 msleep(10);
2400 outb(0, ICEREG1724(ice, CONTROL));
2401 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2402 msleep(10);
2403}
2404
2405static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
2406{
2407 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2408 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2409 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2410 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2411
2412 ice->gpio.write_mask = ice->eeprom.gpiomask;
2413 ice->gpio.direction = ice->eeprom.gpiodir;
2414 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2415 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2416 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2417
2418 outb(0, ICEREG1724(ice, POWERDOWN));
2419
2420 /* MPU_RX and TX irq masks are cleared later dynamically */
2421 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
2422
2423 /* don't handle FIFO overrun/underruns (just yet),
2424 * since they cause machine lockups
2425 */
2426 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2427
2428 return 0;
2429}
2430
2431static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
2432{
2433 int err;
2434 struct snd_kcontrol *kctl;
2435
2436 if (snd_BUG_ON(!ice->pcm))
2437 return -EIO;
2438
2439 if (!ice->own_routing) {
2440 err = snd_ctl_add(ice->card,
2441 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2442 if (err < 0)
2443 return err;
2444 }
2445
2446 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2447 if (err < 0)
2448 return err;
2449
2450 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2451 if (err < 0)
2452 return err;
2453 kctl->id.device = ice->pcm->device;
2454 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2455 if (err < 0)
2456 return err;
2457 kctl->id.device = ice->pcm->device;
2458 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2459 if (err < 0)
2460 return err;
2461 kctl->id.device = ice->pcm->device;
2462#if 0 /* use default only */
2463 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2464 if (err < 0)
2465 return err;
2466 kctl->id.device = ice->pcm->device;
2467 ice->spdif.stream_ctl = kctl;
2468#endif
2469 return 0;
2470}
2471
2472
2473static int snd_vt1724_build_controls(struct snd_ice1712 *ice)
2474{
2475 int err;
2476
2477 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2478 if (err < 0)
2479 return err;
2480 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2481 if (err < 0)
2482 return err;
2483
2484 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2485 if (err < 0)
2486 return err;
2487 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2488 if (err < 0)
2489 return err;
2490
2491 if (!ice->own_routing && ice->num_total_dacs > 0) {
2492 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
2493 tmp.count = ice->num_total_dacs;
2494 if (ice->vt1720 && tmp.count > 2)
2495 tmp.count = 2;
2496 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2497 if (err < 0)
2498 return err;
2499 }
2500
2501 return snd_ctl_add(ice->card,
2502 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2503}
2504
2505static int snd_vt1724_free(struct snd_ice1712 *ice)
2506{
2507 if (!ice->port)
2508 goto __hw_end;
2509 /* mask all interrupts */
2510 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2511 outb(0xff, ICEREG1724(ice, IRQMASK));
2512 /* --- */
2513__hw_end:
2514 if (ice->irq >= 0)
2515 free_irq(ice->irq, ice);
2516 pci_release_regions(ice->pci);
2517 snd_ice1712_akm4xxx_free(ice);
2518 pci_disable_device(ice->pci);
2519 kfree(ice->spec);
2520 kfree(ice);
2521 return 0;
2522}
2523
2524static int snd_vt1724_dev_free(struct snd_device *device)
2525{
2526 struct snd_ice1712 *ice = device->device_data;
2527 return snd_vt1724_free(ice);
2528}
2529
2530static int snd_vt1724_create(struct snd_card *card,
2531 struct pci_dev *pci,
2532 const char *modelname,
2533 struct snd_ice1712 **r_ice1712)
2534{
2535 struct snd_ice1712 *ice;
2536 int err;
2537 static struct snd_device_ops ops = {
2538 .dev_free = snd_vt1724_dev_free,
2539 };
2540
2541 *r_ice1712 = NULL;
2542
2543 /* enable PCI device */
2544 err = pci_enable_device(pci);
2545 if (err < 0)
2546 return err;
2547
2548 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2549 if (ice == NULL) {
2550 pci_disable_device(pci);
2551 return -ENOMEM;
2552 }
2553 ice->vt1724 = 1;
2554 spin_lock_init(&ice->reg_lock);
2555 mutex_init(&ice->gpio_mutex);
2556 mutex_init(&ice->open_mutex);
2557 mutex_init(&ice->i2c_mutex);
2558 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2559 ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
2560 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2561 ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
2562 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2563 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2564 ice->card = card;
2565 ice->pci = pci;
2566 ice->irq = -1;
2567 pci_set_master(pci);
2568 snd_vt1724_proc_init(ice);
2569 synchronize_irq(pci->irq);
2570
2571 card->private_data = ice;
2572
2573 err = pci_request_regions(pci, "ICE1724");
2574 if (err < 0) {
2575 kfree(ice);
2576 pci_disable_device(pci);
2577 return err;
2578 }
2579 ice->port = pci_resource_start(pci, 0);
2580 ice->profi_port = pci_resource_start(pci, 1);
2581
2582 if (request_irq(pci->irq, snd_vt1724_interrupt,
2583 IRQF_SHARED, KBUILD_MODNAME, ice)) {
2584 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2585 snd_vt1724_free(ice);
2586 return -EIO;
2587 }
2588
2589 ice->irq = pci->irq;
2590
2591 snd_vt1724_chip_reset(ice);
2592 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2593 snd_vt1724_free(ice);
2594 return -EIO;
2595 }
2596 if (snd_vt1724_chip_init(ice) < 0) {
2597 snd_vt1724_free(ice);
2598 return -EIO;
2599 }
2600
2601 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2602 if (err < 0) {
2603 snd_vt1724_free(ice);
2604 return err;
2605 }
2606
2607 *r_ice1712 = ice;
2608 return 0;
2609}
2610
2611
2612/*
2613 *
2614 * Registration
2615 *
2616 */
2617
2618static int snd_vt1724_probe(struct pci_dev *pci,
2619 const struct pci_device_id *pci_id)
2620{
2621 static int dev;
2622 struct snd_card *card;
2623 struct snd_ice1712 *ice;
2624 int pcm_dev = 0, err;
2625 struct snd_ice1712_card_info * const *tbl, *c;
2626
2627 if (dev >= SNDRV_CARDS)
2628 return -ENODEV;
2629 if (!enable[dev]) {
2630 dev++;
2631 return -ENOENT;
2632 }
2633
2634 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2635 0, &card);
2636 if (err < 0)
2637 return err;
2638
2639 strcpy(card->driver, "ICE1724");
2640 strcpy(card->shortname, "ICEnsemble ICE1724");
2641
2642 err = snd_vt1724_create(card, pci, model[dev], &ice);
2643 if (err < 0) {
2644 snd_card_free(card);
2645 return err;
2646 }
2647
2648 /* field init before calling chip_init */
2649 ice->ext_clock_count = 0;
2650
2651 for (tbl = card_tables; *tbl; tbl++) {
2652 for (c = *tbl; c->name; c++) {
2653 if ((model[dev] && c->model &&
2654 !strcmp(model[dev], c->model)) ||
2655 (c->subvendor == ice->eeprom.subvendor)) {
2656 strcpy(card->shortname, c->name);
2657 if (c->driver) /* specific driver? */
2658 strcpy(card->driver, c->driver);
2659 if (c->chip_init) {
2660 err = c->chip_init(ice);
2661 if (err < 0) {
2662 snd_card_free(card);
2663 return err;
2664 }
2665 }
2666 goto __found;
2667 }
2668 }
2669 }
2670 c = &no_matched;
2671__found:
2672 /*
2673 * VT1724 has separate DMAs for the analog and the SPDIF streams while
2674 * ICE1712 has only one for both (mixed up).
2675 *
2676 * Confusingly the analog PCM is named "professional" here because it
2677 * was called so in ice1712 driver, and vt1724 driver is derived from
2678 * ice1712 driver.
2679 */
2680 ice->pro_rate_default = PRO_RATE_DEFAULT;
2681 if (!ice->is_spdif_master)
2682 ice->is_spdif_master = stdclock_is_spdif_master;
2683 if (!ice->get_rate)
2684 ice->get_rate = stdclock_get_rate;
2685 if (!ice->set_rate)
2686 ice->set_rate = stdclock_set_rate;
2687 if (!ice->set_mclk)
2688 ice->set_mclk = stdclock_set_mclk;
2689 if (!ice->set_spdif_clock)
2690 ice->set_spdif_clock = stdclock_set_spdif_clock;
2691 if (!ice->get_spdif_master_type)
2692 ice->get_spdif_master_type = stdclock_get_spdif_master_type;
2693 if (!ice->ext_clock_names)
2694 ice->ext_clock_names = ext_clock_names;
2695 if (!ice->ext_clock_count)
2696 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
2697
2698 if (!ice->hw_rates)
2699 set_std_hw_rates(ice);
2700
2701 err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2702 if (err < 0) {
2703 snd_card_free(card);
2704 return err;
2705 }
2706
2707 err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2708 if (err < 0) {
2709 snd_card_free(card);
2710 return err;
2711 }
2712
2713 err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2714 if (err < 0) {
2715 snd_card_free(card);
2716 return err;
2717 }
2718
2719 err = snd_vt1724_ac97_mixer(ice);
2720 if (err < 0) {
2721 snd_card_free(card);
2722 return err;
2723 }
2724
2725 err = snd_vt1724_build_controls(ice);
2726 if (err < 0) {
2727 snd_card_free(card);
2728 return err;
2729 }
2730
2731 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2732 err = snd_vt1724_spdif_build_controls(ice);
2733 if (err < 0) {
2734 snd_card_free(card);
2735 return err;
2736 }
2737 }
2738
2739 if (c->build_controls) {
2740 err = c->build_controls(ice);
2741 if (err < 0) {
2742 snd_card_free(card);
2743 return err;
2744 }
2745 }
2746
2747 if (!c->no_mpu401) {
2748 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2749 struct snd_rawmidi *rmidi;
2750
2751 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
2752 if (err < 0) {
2753 snd_card_free(card);
2754 return err;
2755 }
2756 ice->rmidi[0] = rmidi;
2757 rmidi->private_data = ice;
2758 strcpy(rmidi->name, "ICE1724 MIDI");
2759 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
2760 SNDRV_RAWMIDI_INFO_INPUT |
2761 SNDRV_RAWMIDI_INFO_DUPLEX;
2762 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
2763 &vt1724_midi_output_ops);
2764 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
2765 &vt1724_midi_input_ops);
2766
2767 /* set watermarks */
2768 outb(VT1724_MPU_RX_FIFO | 0x1,
2769 ICEREG1724(ice, MPU_FIFO_WM));
2770 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
2771 /* set UART mode */
2772 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
2773 }
2774 }
2775
2776 sprintf(card->longname, "%s at 0x%lx, irq %i",
2777 card->shortname, ice->port, ice->irq);
2778
2779 err = snd_card_register(card);
2780 if (err < 0) {
2781 snd_card_free(card);
2782 return err;
2783 }
2784 pci_set_drvdata(pci, card);
2785 dev++;
2786 return 0;
2787}
2788
2789static void snd_vt1724_remove(struct pci_dev *pci)
2790{
2791 struct snd_card *card = pci_get_drvdata(pci);
2792 struct snd_ice1712 *ice = card->private_data;
2793
2794 if (ice->card_info && ice->card_info->chip_exit)
2795 ice->card_info->chip_exit(ice);
2796 snd_card_free(card);
2797}
2798
2799#ifdef CONFIG_PM_SLEEP
2800static int snd_vt1724_suspend(struct device *dev)
2801{
2802 struct snd_card *card = dev_get_drvdata(dev);
2803 struct snd_ice1712 *ice = card->private_data;
2804
2805 if (!ice->pm_suspend_enabled)
2806 return 0;
2807
2808 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2809
2810 snd_pcm_suspend_all(ice->pcm);
2811 snd_pcm_suspend_all(ice->pcm_pro);
2812 snd_pcm_suspend_all(ice->pcm_ds);
2813 snd_ac97_suspend(ice->ac97);
2814
2815 spin_lock_irq(&ice->reg_lock);
2816 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
2817 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
2818 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
2819 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2820 spin_unlock_irq(&ice->reg_lock);
2821
2822 if (ice->pm_suspend)
2823 ice->pm_suspend(ice);
2824 return 0;
2825}
2826
2827static int snd_vt1724_resume(struct device *dev)
2828{
2829 struct snd_card *card = dev_get_drvdata(dev);
2830 struct snd_ice1712 *ice = card->private_data;
2831
2832 if (!ice->pm_suspend_enabled)
2833 return 0;
2834
2835 snd_vt1724_chip_reset(ice);
2836
2837 if (snd_vt1724_chip_init(ice) < 0) {
2838 snd_card_disconnect(card);
2839 return -EIO;
2840 }
2841
2842 if (ice->pm_resume)
2843 ice->pm_resume(ice);
2844
2845 if (ice->pm_saved_is_spdif_master) {
2846 /* switching to external clock via SPDIF */
2847 ice->set_spdif_clock(ice, 0);
2848 } else {
2849 /* internal on-card clock */
2850 int rate;
2851 if (ice->cur_rate)
2852 rate = ice->cur_rate;
2853 else
2854 rate = ice->pro_rate_default;
2855 snd_vt1724_set_pro_rate(ice, rate, 1);
2856 }
2857
2858 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
2859
2860 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
2861 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
2862
2863 snd_ac97_resume(ice->ac97);
2864
2865 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2866 return 0;
2867}
2868
2869static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume);
2870#define SND_VT1724_PM_OPS &snd_vt1724_pm
2871#else
2872#define SND_VT1724_PM_OPS NULL
2873#endif /* CONFIG_PM_SLEEP */
2874
2875static struct pci_driver vt1724_driver = {
2876 .name = KBUILD_MODNAME,
2877 .id_table = snd_vt1724_ids,
2878 .probe = snd_vt1724_probe,
2879 .remove = snd_vt1724_remove,
2880 .driver = {
2881 .pm = SND_VT1724_PM_OPS,
2882 },
2883};
2884
2885module_pci_driver(vt1724_driver);