blob: e00f5f49f21d1d8b444e81f7a946ef5b9edb7e28 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * ALSA SoC codec for HDMI encoder drivers
3 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
4 * Author: Jyri Sarha <jsarha@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 */
15#include <linux/module.h>
16#include <linux/string.h>
17#include <sound/core.h>
18#include <sound/pcm.h>
19#include <sound/pcm_params.h>
20#include <sound/soc.h>
21#include <sound/tlv.h>
22#include <sound/pcm_drm_eld.h>
23#include <sound/hdmi-codec.h>
24#include <sound/pcm_iec958.h>
25
26#include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */
27
28#define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1
29
30struct hdmi_codec_channel_map_table {
31 unsigned char map; /* ALSA API channel map position */
32 unsigned long spk_mask; /* speaker position bit mask */
33};
34
35/*
36 * CEA speaker placement for HDMI 1.4:
37 *
38 * FL FLC FC FRC FR FRW
39 *
40 * LFE
41 *
42 * RL RLC RC RRC RR
43 *
44 * Speaker placement has to be extended to support HDMI 2.0
45 */
46enum hdmi_codec_cea_spk_placement {
47 FL = BIT(0), /* Front Left */
48 FC = BIT(1), /* Front Center */
49 FR = BIT(2), /* Front Right */
50 FLC = BIT(3), /* Front Left Center */
51 FRC = BIT(4), /* Front Right Center */
52 RL = BIT(5), /* Rear Left */
53 RC = BIT(6), /* Rear Center */
54 RR = BIT(7), /* Rear Right */
55 RLC = BIT(8), /* Rear Left Center */
56 RRC = BIT(9), /* Rear Right Center */
57 LFE = BIT(10), /* Low Frequency Effect */
58};
59
60/*
61 * cea Speaker allocation structure
62 */
63struct hdmi_codec_cea_spk_alloc {
64 const int ca_id;
65 unsigned int n_ch;
66 unsigned long mask;
67};
68
69/* Channel maps stereo HDMI */
70static const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = {
71 { .channels = 2,
72 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
73 { }
74};
75
76/* Channel maps for multi-channel playbacks, up to 8 n_ch */
77static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
78 { .channels = 2, /* CA_ID 0x00 */
79 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
80 { .channels = 4, /* CA_ID 0x01 */
81 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
82 SNDRV_CHMAP_NA } },
83 { .channels = 4, /* CA_ID 0x02 */
84 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
85 SNDRV_CHMAP_FC } },
86 { .channels = 4, /* CA_ID 0x03 */
87 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
88 SNDRV_CHMAP_FC } },
89 { .channels = 6, /* CA_ID 0x04 */
90 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
91 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
92 { .channels = 6, /* CA_ID 0x05 */
93 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
94 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
95 { .channels = 6, /* CA_ID 0x06 */
96 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
97 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
98 { .channels = 6, /* CA_ID 0x07 */
99 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
100 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
101 { .channels = 6, /* CA_ID 0x08 */
102 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
103 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
104 { .channels = 6, /* CA_ID 0x09 */
105 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
106 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
107 { .channels = 6, /* CA_ID 0x0A */
108 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
109 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
110 { .channels = 6, /* CA_ID 0x0B */
111 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
112 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
113 { .channels = 8, /* CA_ID 0x0C */
114 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
115 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
116 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
117 { .channels = 8, /* CA_ID 0x0D */
118 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
119 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
120 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
121 { .channels = 8, /* CA_ID 0x0E */
122 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
123 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
124 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
125 { .channels = 8, /* CA_ID 0x0F */
126 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
127 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
128 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
129 { .channels = 8, /* CA_ID 0x10 */
130 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
131 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
132 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
133 { .channels = 8, /* CA_ID 0x11 */
134 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
135 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
136 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
137 { .channels = 8, /* CA_ID 0x12 */
138 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
139 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
140 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
141 { .channels = 8, /* CA_ID 0x13 */
142 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
143 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
144 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
145 { .channels = 8, /* CA_ID 0x14 */
146 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
147 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
148 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
149 { .channels = 8, /* CA_ID 0x15 */
150 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
151 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
152 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
153 { .channels = 8, /* CA_ID 0x16 */
154 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
155 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
156 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
157 { .channels = 8, /* CA_ID 0x17 */
158 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
159 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
160 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
161 { .channels = 8, /* CA_ID 0x18 */
162 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
163 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
164 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
165 { .channels = 8, /* CA_ID 0x19 */
166 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
167 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
168 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
169 { .channels = 8, /* CA_ID 0x1A */
170 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
171 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
172 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
173 { .channels = 8, /* CA_ID 0x1B */
174 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
175 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
176 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
177 { .channels = 8, /* CA_ID 0x1C */
178 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
179 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
180 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
181 { .channels = 8, /* CA_ID 0x1D */
182 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
183 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
184 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
185 { .channels = 8, /* CA_ID 0x1E */
186 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
187 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
188 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
189 { .channels = 8, /* CA_ID 0x1F */
190 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
191 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
192 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
193 { }
194};
195
196/*
197 * hdmi_codec_channel_alloc: speaker configuration available for CEA
198 *
199 * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct
200 * The preceding ones have better chances to be selected by
201 * hdmi_codec_get_ch_alloc_table_idx().
202 */
203static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
204 { .ca_id = 0x00, .n_ch = 2,
205 .mask = FL | FR},
206 /* 2.1 */
207 { .ca_id = 0x01, .n_ch = 4,
208 .mask = FL | FR | LFE},
209 /* Dolby Surround */
210 { .ca_id = 0x02, .n_ch = 4,
211 .mask = FL | FR | FC },
212 /* surround51 */
213 { .ca_id = 0x0b, .n_ch = 6,
214 .mask = FL | FR | LFE | FC | RL | RR},
215 /* surround40 */
216 { .ca_id = 0x08, .n_ch = 6,
217 .mask = FL | FR | RL | RR },
218 /* surround41 */
219 { .ca_id = 0x09, .n_ch = 6,
220 .mask = FL | FR | LFE | RL | RR },
221 /* surround50 */
222 { .ca_id = 0x0a, .n_ch = 6,
223 .mask = FL | FR | FC | RL | RR },
224 /* 6.1 */
225 { .ca_id = 0x0f, .n_ch = 8,
226 .mask = FL | FR | LFE | FC | RL | RR | RC },
227 /* surround71 */
228 { .ca_id = 0x13, .n_ch = 8,
229 .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
230 /* others */
231 { .ca_id = 0x03, .n_ch = 8,
232 .mask = FL | FR | LFE | FC },
233 { .ca_id = 0x04, .n_ch = 8,
234 .mask = FL | FR | RC},
235 { .ca_id = 0x05, .n_ch = 8,
236 .mask = FL | FR | LFE | RC },
237 { .ca_id = 0x06, .n_ch = 8,
238 .mask = FL | FR | FC | RC },
239 { .ca_id = 0x07, .n_ch = 8,
240 .mask = FL | FR | LFE | FC | RC },
241 { .ca_id = 0x0c, .n_ch = 8,
242 .mask = FL | FR | RC | RL | RR },
243 { .ca_id = 0x0d, .n_ch = 8,
244 .mask = FL | FR | LFE | RL | RR | RC },
245 { .ca_id = 0x0e, .n_ch = 8,
246 .mask = FL | FR | FC | RL | RR | RC },
247 { .ca_id = 0x10, .n_ch = 8,
248 .mask = FL | FR | RL | RR | RLC | RRC },
249 { .ca_id = 0x11, .n_ch = 8,
250 .mask = FL | FR | LFE | RL | RR | RLC | RRC },
251 { .ca_id = 0x12, .n_ch = 8,
252 .mask = FL | FR | FC | RL | RR | RLC | RRC },
253 { .ca_id = 0x14, .n_ch = 8,
254 .mask = FL | FR | FLC | FRC },
255 { .ca_id = 0x15, .n_ch = 8,
256 .mask = FL | FR | LFE | FLC | FRC },
257 { .ca_id = 0x16, .n_ch = 8,
258 .mask = FL | FR | FC | FLC | FRC },
259 { .ca_id = 0x17, .n_ch = 8,
260 .mask = FL | FR | LFE | FC | FLC | FRC },
261 { .ca_id = 0x18, .n_ch = 8,
262 .mask = FL | FR | RC | FLC | FRC },
263 { .ca_id = 0x19, .n_ch = 8,
264 .mask = FL | FR | LFE | RC | FLC | FRC },
265 { .ca_id = 0x1a, .n_ch = 8,
266 .mask = FL | FR | RC | FC | FLC | FRC },
267 { .ca_id = 0x1b, .n_ch = 8,
268 .mask = FL | FR | LFE | RC | FC | FLC | FRC },
269 { .ca_id = 0x1c, .n_ch = 8,
270 .mask = FL | FR | RL | RR | FLC | FRC },
271 { .ca_id = 0x1d, .n_ch = 8,
272 .mask = FL | FR | LFE | RL | RR | FLC | FRC },
273 { .ca_id = 0x1e, .n_ch = 8,
274 .mask = FL | FR | FC | RL | RR | FLC | FRC },
275 { .ca_id = 0x1f, .n_ch = 8,
276 .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
277};
278
279struct hdmi_codec_priv {
280 struct hdmi_codec_pdata hcd;
281 struct snd_soc_dai_driver *daidrv;
282 struct hdmi_codec_daifmt daifmt[2];
283 struct mutex current_stream_lock;
284 struct snd_pcm_substream *current_stream;
285 uint8_t eld[MAX_ELD_BYTES];
286 struct snd_pcm_chmap *chmap_info;
287 unsigned int chmap_idx;
288};
289
290static const struct snd_soc_dapm_widget hdmi_widgets[] = {
291 SND_SOC_DAPM_OUTPUT("TX"),
292};
293
294static const struct snd_soc_dapm_route hdmi_routes[] = {
295 { "TX", NULL, "Playback" },
296};
297
298enum {
299 DAI_ID_I2S = 0,
300 DAI_ID_SPDIF,
301};
302
303static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
304 struct snd_ctl_elem_info *uinfo)
305{
306 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
307 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
308
309 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
310 uinfo->count = sizeof(hcp->eld);
311
312 return 0;
313}
314
315static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
316 struct snd_ctl_elem_value *ucontrol)
317{
318 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
319 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
320
321 memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld));
322
323 return 0;
324}
325
326static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc)
327{
328 int i;
329 static const unsigned long hdmi_codec_eld_spk_alloc_bits[] = {
330 [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR,
331 [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC,
332 };
333 unsigned long spk_mask = 0;
334
335 for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) {
336 if (spk_alloc & (1 << i))
337 spk_mask |= hdmi_codec_eld_spk_alloc_bits[i];
338 }
339
340 return spk_mask;
341}
342
343static void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp)
344{
345 u8 spk_alloc;
346 unsigned long spk_mask;
347
348 spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
349 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
350
351 /* Detect if only stereo supported, else return 8 channels mappings */
352 if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2)
353 hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps;
354 else
355 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
356}
357
358static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp,
359 unsigned char channels)
360{
361 int i;
362 u8 spk_alloc;
363 unsigned long spk_mask;
364 const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc;
365
366 spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
367 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
368
369 for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) {
370 /* If spk_alloc == 0, HDMI is unplugged return stereo config*/
371 if (!spk_alloc && cap->ca_id == 0)
372 return i;
373 if (cap->n_ch != channels)
374 continue;
375 if (!(cap->mask == (spk_mask & cap->mask)))
376 continue;
377 return i;
378 }
379
380 return -EINVAL;
381}
382static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
383 struct snd_ctl_elem_value *ucontrol)
384{
385 unsigned const char *map;
386 unsigned int i;
387 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
388 struct hdmi_codec_priv *hcp = info->private_data;
389
390 map = info->chmap[hcp->chmap_idx].map;
391
392 for (i = 0; i < info->max_channels; i++) {
393 if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN)
394 ucontrol->value.integer.value[i] = 0;
395 else
396 ucontrol->value.integer.value[i] = map[i];
397 }
398
399 return 0;
400}
401
402static int hdmi_codec_new_stream(struct snd_pcm_substream *substream,
403 struct snd_soc_dai *dai)
404{
405 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
406 int ret = 0;
407
408 mutex_lock(&hcp->current_stream_lock);
409 if (!hcp->current_stream) {
410 hcp->current_stream = substream;
411 } else if (hcp->current_stream != substream) {
412 dev_err(dai->dev, "Only one simultaneous stream supported!\n");
413 ret = -EINVAL;
414 }
415 mutex_unlock(&hcp->current_stream_lock);
416
417 return ret;
418}
419
420static int hdmi_codec_startup(struct snd_pcm_substream *substream,
421 struct snd_soc_dai *dai)
422{
423 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
424 int ret = 0;
425
426 dev_dbg(dai->dev, "%s()\n", __func__);
427
428 ret = hdmi_codec_new_stream(substream, dai);
429 if (ret)
430 return ret;
431
432 if (hcp->hcd.ops->audio_startup) {
433 ret = hcp->hcd.ops->audio_startup(dai->dev->parent, hcp->hcd.data);
434 if (ret) {
435 mutex_lock(&hcp->current_stream_lock);
436 hcp->current_stream = NULL;
437 mutex_unlock(&hcp->current_stream_lock);
438 return ret;
439 }
440 }
441
442 if (hcp->hcd.ops->get_eld) {
443 ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->hcd.data,
444 hcp->eld, sizeof(hcp->eld));
445
446 if (!ret) {
447 ret = snd_pcm_hw_constraint_eld(substream->runtime,
448 hcp->eld);
449 if (ret) {
450 mutex_lock(&hcp->current_stream_lock);
451 hcp->current_stream = NULL;
452 mutex_unlock(&hcp->current_stream_lock);
453 return ret;
454 }
455 }
456 /* Select chmap supported */
457 hdmi_codec_eld_chmap(hcp);
458 }
459 return 0;
460}
461
462static void hdmi_codec_shutdown(struct snd_pcm_substream *substream,
463 struct snd_soc_dai *dai)
464{
465 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
466
467 dev_dbg(dai->dev, "%s()\n", __func__);
468
469 WARN_ON(hcp->current_stream != substream);
470
471 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
472 hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data);
473
474 mutex_lock(&hcp->current_stream_lock);
475 hcp->current_stream = NULL;
476 mutex_unlock(&hcp->current_stream_lock);
477}
478
479static int hdmi_codec_hw_params(struct snd_pcm_substream *substream,
480 struct snd_pcm_hw_params *params,
481 struct snd_soc_dai *dai)
482{
483 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
484 struct hdmi_codec_params hp = {
485 .iec = {
486 .status = { 0 },
487 .subcode = { 0 },
488 .pad = 0,
489 .dig_subframe = { 0 },
490 }
491 };
492 int ret, idx;
493
494 dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__,
495 params_width(params), params_rate(params),
496 params_channels(params));
497
498 if (params_width(params) > 24)
499 params->msbits = 24;
500
501 ret = snd_pcm_create_iec958_consumer_hw_params(params, hp.iec.status,
502 sizeof(hp.iec.status));
503 if (ret < 0) {
504 dev_err(dai->dev, "Creating IEC958 channel status failed %d\n",
505 ret);
506 return ret;
507 }
508
509 ret = hdmi_codec_new_stream(substream, dai);
510 if (ret)
511 return ret;
512
513 hdmi_audio_infoframe_init(&hp.cea);
514 hp.cea.channels = params_channels(params);
515 hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
516 hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
517 hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
518
519 /* Select a channel allocation that matches with ELD and pcm channels */
520 idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels);
521 if (idx < 0) {
522 dev_err(dai->dev, "Not able to map channels to speakers (%d)\n",
523 idx);
524 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
525 return idx;
526 }
527 hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id;
528 hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id;
529
530 hp.sample_width = params_width(params);
531 hp.sample_rate = params_rate(params);
532 hp.channels = params_channels(params);
533
534 return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data,
535 &hcp->daifmt[dai->id], &hp);
536}
537
538static int hdmi_codec_set_fmt(struct snd_soc_dai *dai,
539 unsigned int fmt)
540{
541 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
542 struct hdmi_codec_daifmt cf = { 0 };
543
544 dev_dbg(dai->dev, "%s()\n", __func__);
545
546 if (dai->id == DAI_ID_SPDIF)
547 return 0;
548
549 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
550 case SND_SOC_DAIFMT_CBM_CFM:
551 cf.bit_clk_master = 1;
552 cf.frame_clk_master = 1;
553 break;
554 case SND_SOC_DAIFMT_CBS_CFM:
555 cf.frame_clk_master = 1;
556 break;
557 case SND_SOC_DAIFMT_CBM_CFS:
558 cf.bit_clk_master = 1;
559 break;
560 case SND_SOC_DAIFMT_CBS_CFS:
561 break;
562 default:
563 return -EINVAL;
564 }
565
566 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
567 case SND_SOC_DAIFMT_NB_NF:
568 break;
569 case SND_SOC_DAIFMT_NB_IF:
570 cf.frame_clk_inv = 1;
571 break;
572 case SND_SOC_DAIFMT_IB_NF:
573 cf.bit_clk_inv = 1;
574 break;
575 case SND_SOC_DAIFMT_IB_IF:
576 cf.frame_clk_inv = 1;
577 cf.bit_clk_inv = 1;
578 break;
579 }
580
581 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
582 case SND_SOC_DAIFMT_I2S:
583 cf.fmt = HDMI_I2S;
584 break;
585 case SND_SOC_DAIFMT_DSP_A:
586 cf.fmt = HDMI_DSP_A;
587 break;
588 case SND_SOC_DAIFMT_DSP_B:
589 cf.fmt = HDMI_DSP_B;
590 break;
591 case SND_SOC_DAIFMT_RIGHT_J:
592 cf.fmt = HDMI_RIGHT_J;
593 break;
594 case SND_SOC_DAIFMT_LEFT_J:
595 cf.fmt = HDMI_LEFT_J;
596 break;
597 case SND_SOC_DAIFMT_AC97:
598 cf.fmt = HDMI_AC97;
599 break;
600 default:
601 dev_err(dai->dev, "Invalid DAI interface format\n");
602 return -EINVAL;
603 }
604
605 hcp->daifmt[dai->id] = cf;
606
607 return 0;
608}
609
610static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute)
611{
612 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
613
614 dev_dbg(dai->dev, "%s()\n", __func__);
615
616 if (hcp->hcd.ops->digital_mute)
617 return hcp->hcd.ops->digital_mute(dai->dev->parent,
618 hcp->hcd.data, mute);
619
620 return 0;
621}
622
623static const struct snd_soc_dai_ops hdmi_dai_ops = {
624 .startup = hdmi_codec_startup,
625 .shutdown = hdmi_codec_shutdown,
626 .hw_params = hdmi_codec_hw_params,
627 .set_fmt = hdmi_codec_set_fmt,
628 .digital_mute = hdmi_codec_digital_mute,
629};
630
631
632#define HDMI_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
633 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
634 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
635 SNDRV_PCM_RATE_192000)
636
637#define SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
638 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
639 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
640 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
641
642/*
643 * This list is only for formats allowed on the I2S bus. So there is
644 * some formats listed that are not supported by HDMI interface. For
645 * instance allowing the 32-bit formats enables 24-precision with CPU
646 * DAIs that do not support 24-bit formats. If the extra formats cause
647 * problems, we should add the video side driver an option to disable
648 * them.
649 */
650#define I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
651 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
652 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
653 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\
654 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE)
655
656static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
657 struct snd_soc_dai *dai)
658{
659 struct snd_soc_dai_driver *drv = dai->driver;
660 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
661 struct snd_kcontrol *kctl;
662 struct snd_kcontrol_new hdmi_eld_ctl = {
663 .access = SNDRV_CTL_ELEM_ACCESS_READ |
664 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
665 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
666 .name = "ELD",
667 .info = hdmi_eld_ctl_info,
668 .get = hdmi_eld_ctl_get,
669 .device = rtd->pcm->device,
670 };
671 int ret;
672
673 dev_dbg(dai->dev, "%s()\n", __func__);
674
675 ret = snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK,
676 NULL, drv->playback.channels_max, 0,
677 &hcp->chmap_info);
678 if (ret < 0)
679 return ret;
680
681 /* override handlers */
682 hcp->chmap_info->private_data = hcp;
683 hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get;
684
685 /* default chmap supported is stereo */
686 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
687 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
688
689 /* add ELD ctl with the device number corresponding to the PCM stream */
690 kctl = snd_ctl_new1(&hdmi_eld_ctl, dai->component);
691 if (!kctl)
692 return -ENOMEM;
693
694 return snd_ctl_add(rtd->card->snd_card, kctl);
695}
696
697static const struct snd_soc_dai_driver hdmi_i2s_dai = {
698 .name = "i2s-hifi",
699 .id = DAI_ID_I2S,
700 .playback = {
701 .stream_name = "I2S Playback",
702 .channels_min = 2,
703 .channels_max = 8,
704 .rates = HDMI_RATES,
705 .formats = I2S_FORMATS,
706 .sig_bits = 24,
707 },
708 .ops = &hdmi_dai_ops,
709 .pcm_new = hdmi_codec_pcm_new,
710};
711
712static const struct snd_soc_dai_driver hdmi_spdif_dai = {
713 .name = "spdif-hifi",
714 .id = DAI_ID_SPDIF,
715 .playback = {
716 .stream_name = "SPDIF Playback",
717 .channels_min = 2,
718 .channels_max = 2,
719 .rates = HDMI_RATES,
720 .formats = SPDIF_FORMATS,
721 },
722 .ops = &hdmi_dai_ops,
723 .pcm_new = hdmi_codec_pcm_new,
724};
725
726static int hdmi_of_xlate_dai_id(struct snd_soc_component *component,
727 struct device_node *endpoint)
728{
729 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
730 int ret = -ENOTSUPP; /* see snd_soc_get_dai_id() */
731
732 if (hcp->hcd.ops->get_dai_id)
733 ret = hcp->hcd.ops->get_dai_id(component, endpoint);
734
735 return ret;
736}
737
738static const struct snd_soc_codec_driver hdmi_codec = {
739 .component_driver = {
740 .dapm_widgets = hdmi_widgets,
741 .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets),
742 .dapm_routes = hdmi_routes,
743 .num_dapm_routes = ARRAY_SIZE(hdmi_routes),
744 .of_xlate_dai_id = hdmi_of_xlate_dai_id,
745 },
746};
747
748static int hdmi_codec_probe(struct platform_device *pdev)
749{
750 struct hdmi_codec_pdata *hcd = pdev->dev.platform_data;
751 struct device *dev = &pdev->dev;
752 struct hdmi_codec_priv *hcp;
753 int dai_count, i = 0;
754 int ret;
755
756 dev_dbg(dev, "%s()\n", __func__);
757
758 if (!hcd) {
759 dev_err(dev, "%s: No plalform data\n", __func__);
760 return -EINVAL;
761 }
762
763 dai_count = hcd->i2s + hcd->spdif;
764 if (dai_count < 1 || !hcd->ops || !hcd->ops->hw_params ||
765 !hcd->ops->audio_shutdown) {
766 dev_err(dev, "%s: Invalid parameters\n", __func__);
767 return -EINVAL;
768 }
769
770 hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL);
771 if (!hcp)
772 return -ENOMEM;
773
774 hcp->hcd = *hcd;
775 mutex_init(&hcp->current_stream_lock);
776
777 hcp->daidrv = devm_kzalloc(dev, dai_count * sizeof(*hcp->daidrv),
778 GFP_KERNEL);
779 if (!hcp->daidrv)
780 return -ENOMEM;
781
782 if (hcd->i2s) {
783 hcp->daidrv[i] = hdmi_i2s_dai;
784 hcp->daidrv[i].playback.channels_max =
785 hcd->max_i2s_channels;
786 i++;
787 }
788
789 if (hcd->spdif) {
790 hcp->daidrv[i] = hdmi_spdif_dai;
791 hcp->daifmt[DAI_ID_SPDIF].fmt = HDMI_SPDIF;
792 }
793
794 ret = snd_soc_register_codec(dev, &hdmi_codec, hcp->daidrv,
795 dai_count);
796 if (ret) {
797 dev_err(dev, "%s: snd_soc_register_codec() failed (%d)\n",
798 __func__, ret);
799 return ret;
800 }
801
802 dev_set_drvdata(dev, hcp);
803 return 0;
804}
805
806static int hdmi_codec_remove(struct platform_device *pdev)
807{
808 snd_soc_unregister_codec(&pdev->dev);
809
810 return 0;
811}
812
813static struct platform_driver hdmi_codec_driver = {
814 .driver = {
815 .name = HDMI_CODEC_DRV_NAME,
816 },
817 .probe = hdmi_codec_probe,
818 .remove = hdmi_codec_remove,
819};
820
821module_platform_driver(hdmi_codec_driver);
822
823MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
824MODULE_DESCRIPTION("HDMI Audio Codec Driver");
825MODULE_LICENSE("GPL");
826MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME);