blob: e8e05e7838b26501ae76e5930a7b5cbc41b94a57 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * intel_pt.c: Intel Processor Trace support
3 * Copyright (c) 2013-2015, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 */
15
16#include <inttypes.h>
17#include <stdio.h>
18#include <stdbool.h>
19#include <errno.h>
20#include <linux/kernel.h>
21#include <linux/types.h>
22
23#include "../perf.h"
24#include "session.h"
25#include "machine.h"
26#include "memswap.h"
27#include "sort.h"
28#include "tool.h"
29#include "event.h"
30#include "evlist.h"
31#include "evsel.h"
32#include "map.h"
33#include "color.h"
34#include "util.h"
35#include "thread.h"
36#include "thread-stack.h"
37#include "symbol.h"
38#include "callchain.h"
39#include "dso.h"
40#include "debug.h"
41#include "auxtrace.h"
42#include "tsc.h"
43#include "intel-pt.h"
44#include "config.h"
45
46#include "intel-pt-decoder/intel-pt-log.h"
47#include "intel-pt-decoder/intel-pt-decoder.h"
48#include "intel-pt-decoder/intel-pt-insn-decoder.h"
49#include "intel-pt-decoder/intel-pt-pkt-decoder.h"
50
51#define MAX_TIMESTAMP (~0ULL)
52
53struct intel_pt {
54 struct auxtrace auxtrace;
55 struct auxtrace_queues queues;
56 struct auxtrace_heap heap;
57 u32 auxtrace_type;
58 struct perf_session *session;
59 struct machine *machine;
60 struct perf_evsel *switch_evsel;
61 struct thread *unknown_thread;
62 bool timeless_decoding;
63 bool sampling_mode;
64 bool snapshot_mode;
65 bool per_cpu_mmaps;
66 bool have_tsc;
67 bool data_queued;
68 bool est_tsc;
69 bool sync_switch;
70 bool mispred_all;
71 int have_sched_switch;
72 u32 pmu_type;
73 u64 kernel_start;
74 u64 switch_ip;
75 u64 ptss_ip;
76
77 struct perf_tsc_conversion tc;
78 bool cap_user_time_zero;
79
80 struct itrace_synth_opts synth_opts;
81
82 bool sample_instructions;
83 u64 instructions_sample_type;
84 u64 instructions_id;
85
86 bool sample_branches;
87 u32 branches_filter;
88 u64 branches_sample_type;
89 u64 branches_id;
90
91 bool sample_transactions;
92 u64 transactions_sample_type;
93 u64 transactions_id;
94
95 bool sample_ptwrites;
96 u64 ptwrites_sample_type;
97 u64 ptwrites_id;
98
99 bool sample_pwr_events;
100 u64 pwr_events_sample_type;
101 u64 mwait_id;
102 u64 pwre_id;
103 u64 exstop_id;
104 u64 pwrx_id;
105 u64 cbr_id;
106
107 bool synth_needs_swap;
108
109 u64 tsc_bit;
110 u64 mtc_bit;
111 u64 mtc_freq_bits;
112 u32 tsc_ctc_ratio_n;
113 u32 tsc_ctc_ratio_d;
114 u64 cyc_bit;
115 u64 noretcomp_bit;
116 unsigned max_non_turbo_ratio;
117 unsigned cbr2khz;
118
119 unsigned long num_events;
120
121 char *filter;
122 struct addr_filters filts;
123};
124
125enum switch_state {
126 INTEL_PT_SS_NOT_TRACING,
127 INTEL_PT_SS_UNKNOWN,
128 INTEL_PT_SS_TRACING,
129 INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
130 INTEL_PT_SS_EXPECTING_SWITCH_IP,
131};
132
133struct intel_pt_queue {
134 struct intel_pt *pt;
135 unsigned int queue_nr;
136 struct auxtrace_buffer *buffer;
137 void *decoder;
138 const struct intel_pt_state *state;
139 struct ip_callchain *chain;
140 struct branch_stack *last_branch;
141 struct branch_stack *last_branch_rb;
142 size_t last_branch_pos;
143 union perf_event *event_buf;
144 bool on_heap;
145 bool stop;
146 bool step_through_buffers;
147 bool use_buffer_pid_tid;
148 bool sync_switch;
149 pid_t pid, tid;
150 int cpu;
151 int switch_state;
152 pid_t next_tid;
153 struct thread *thread;
154 bool exclude_kernel;
155 bool have_sample;
156 u64 time;
157 u64 timestamp;
158 u32 flags;
159 u16 insn_len;
160 u64 last_insn_cnt;
161 char insn[INTEL_PT_INSN_BUF_SZ];
162};
163
164static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
165 unsigned char *buf, size_t len)
166{
167 struct intel_pt_pkt packet;
168 size_t pos = 0;
169 int ret, pkt_len, i;
170 char desc[INTEL_PT_PKT_DESC_MAX];
171 const char *color = PERF_COLOR_BLUE;
172
173 color_fprintf(stdout, color,
174 ". ... Intel Processor Trace data: size %zu bytes\n",
175 len);
176
177 while (len) {
178 ret = intel_pt_get_packet(buf, len, &packet);
179 if (ret > 0)
180 pkt_len = ret;
181 else
182 pkt_len = 1;
183 printf(".");
184 color_fprintf(stdout, color, " %08x: ", pos);
185 for (i = 0; i < pkt_len; i++)
186 color_fprintf(stdout, color, " %02x", buf[i]);
187 for (; i < 16; i++)
188 color_fprintf(stdout, color, " ");
189 if (ret > 0) {
190 ret = intel_pt_pkt_desc(&packet, desc,
191 INTEL_PT_PKT_DESC_MAX);
192 if (ret > 0)
193 color_fprintf(stdout, color, " %s\n", desc);
194 } else {
195 color_fprintf(stdout, color, " Bad packet!\n");
196 }
197 pos += pkt_len;
198 buf += pkt_len;
199 len -= pkt_len;
200 }
201}
202
203static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
204 size_t len)
205{
206 printf(".\n");
207 intel_pt_dump(pt, buf, len);
208}
209
210static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
211 struct auxtrace_buffer *b)
212{
213 bool consecutive = false;
214 void *start;
215
216 start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
217 pt->have_tsc, &consecutive);
218 if (!start)
219 return -EINVAL;
220 b->use_size = b->data + b->size - start;
221 b->use_data = start;
222 if (b->use_size && consecutive)
223 b->consecutive = true;
224 return 0;
225}
226
227static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
228 struct auxtrace_queue *queue,
229 struct auxtrace_buffer *buffer)
230{
231 if (queue->cpu == -1 && buffer->cpu != -1)
232 ptq->cpu = buffer->cpu;
233
234 ptq->pid = buffer->pid;
235 ptq->tid = buffer->tid;
236
237 intel_pt_log("queue %u cpu %d pid %d tid %d\n",
238 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
239
240 thread__zput(ptq->thread);
241
242 if (ptq->tid != -1) {
243 if (ptq->pid != -1)
244 ptq->thread = machine__findnew_thread(ptq->pt->machine,
245 ptq->pid,
246 ptq->tid);
247 else
248 ptq->thread = machine__find_thread(ptq->pt->machine, -1,
249 ptq->tid);
250 }
251}
252
253/* This function assumes data is processed sequentially only */
254static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
255{
256 struct intel_pt_queue *ptq = data;
257 struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
258 struct auxtrace_queue *queue;
259
260 if (ptq->stop) {
261 b->len = 0;
262 return 0;
263 }
264
265 queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
266next:
267 buffer = auxtrace_buffer__next(queue, buffer);
268 if (!buffer) {
269 if (old_buffer)
270 auxtrace_buffer__drop_data(old_buffer);
271 b->len = 0;
272 return 0;
273 }
274
275 ptq->buffer = buffer;
276
277 if (!buffer->data) {
278 int fd = perf_data_file__fd(ptq->pt->session->file);
279
280 buffer->data = auxtrace_buffer__get_data(buffer, fd);
281 if (!buffer->data)
282 return -ENOMEM;
283 }
284
285 if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
286 intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
287 return -ENOMEM;
288
289 if (buffer->use_data) {
290 b->len = buffer->use_size;
291 b->buf = buffer->use_data;
292 } else {
293 b->len = buffer->size;
294 b->buf = buffer->data;
295 }
296 b->ref_timestamp = buffer->reference;
297
298 /*
299 * If in snapshot mode and the buffer has no usable data, get next
300 * buffer and again check overlap against old_buffer.
301 */
302 if (ptq->pt->snapshot_mode && !b->len)
303 goto next;
304
305 if (old_buffer)
306 auxtrace_buffer__drop_data(old_buffer);
307
308 if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
309 !buffer->consecutive)) {
310 b->consecutive = false;
311 b->trace_nr = buffer->buffer_nr + 1;
312 } else {
313 b->consecutive = true;
314 }
315
316 if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
317 ptq->tid != buffer->tid))
318 intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
319
320 if (ptq->step_through_buffers)
321 ptq->stop = true;
322
323 if (!b->len)
324 return intel_pt_get_trace(b, data);
325
326 return 0;
327}
328
329struct intel_pt_cache_entry {
330 struct auxtrace_cache_entry entry;
331 u64 insn_cnt;
332 u64 byte_cnt;
333 enum intel_pt_insn_op op;
334 enum intel_pt_insn_branch branch;
335 int length;
336 int32_t rel;
337 char insn[INTEL_PT_INSN_BUF_SZ];
338};
339
340static int intel_pt_config_div(const char *var, const char *value, void *data)
341{
342 int *d = data;
343 long val;
344
345 if (!strcmp(var, "intel-pt.cache-divisor")) {
346 val = strtol(value, NULL, 0);
347 if (val > 0 && val <= INT_MAX)
348 *d = val;
349 }
350
351 return 0;
352}
353
354static int intel_pt_cache_divisor(void)
355{
356 static int d;
357
358 if (d)
359 return d;
360
361 perf_config(intel_pt_config_div, &d);
362
363 if (!d)
364 d = 64;
365
366 return d;
367}
368
369static unsigned int intel_pt_cache_size(struct dso *dso,
370 struct machine *machine)
371{
372 off_t size;
373
374 size = dso__data_size(dso, machine);
375 size /= intel_pt_cache_divisor();
376 if (size < 1000)
377 return 10;
378 if (size > (1 << 21))
379 return 21;
380 return 32 - __builtin_clz(size);
381}
382
383static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
384 struct machine *machine)
385{
386 struct auxtrace_cache *c;
387 unsigned int bits;
388
389 if (dso->auxtrace_cache)
390 return dso->auxtrace_cache;
391
392 bits = intel_pt_cache_size(dso, machine);
393
394 /* Ignoring cache creation failure */
395 c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
396
397 dso->auxtrace_cache = c;
398
399 return c;
400}
401
402static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
403 u64 offset, u64 insn_cnt, u64 byte_cnt,
404 struct intel_pt_insn *intel_pt_insn)
405{
406 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
407 struct intel_pt_cache_entry *e;
408 int err;
409
410 if (!c)
411 return -ENOMEM;
412
413 e = auxtrace_cache__alloc_entry(c);
414 if (!e)
415 return -ENOMEM;
416
417 e->insn_cnt = insn_cnt;
418 e->byte_cnt = byte_cnt;
419 e->op = intel_pt_insn->op;
420 e->branch = intel_pt_insn->branch;
421 e->length = intel_pt_insn->length;
422 e->rel = intel_pt_insn->rel;
423 memcpy(e->insn, intel_pt_insn->buf, INTEL_PT_INSN_BUF_SZ);
424
425 err = auxtrace_cache__add(c, offset, &e->entry);
426 if (err)
427 auxtrace_cache__free_entry(c, e);
428
429 return err;
430}
431
432static struct intel_pt_cache_entry *
433intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
434{
435 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
436
437 if (!c)
438 return NULL;
439
440 return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
441}
442
443static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
444 uint64_t *insn_cnt_ptr, uint64_t *ip,
445 uint64_t to_ip, uint64_t max_insn_cnt,
446 void *data)
447{
448 struct intel_pt_queue *ptq = data;
449 struct machine *machine = ptq->pt->machine;
450 struct thread *thread;
451 struct addr_location al;
452 unsigned char buf[INTEL_PT_INSN_BUF_SZ];
453 ssize_t len;
454 int x86_64;
455 u8 cpumode;
456 u64 offset, start_offset, start_ip;
457 u64 insn_cnt = 0;
458 bool one_map = true;
459
460 intel_pt_insn->length = 0;
461
462 if (to_ip && *ip == to_ip)
463 goto out_no_cache;
464
465 if (*ip >= ptq->pt->kernel_start)
466 cpumode = PERF_RECORD_MISC_KERNEL;
467 else
468 cpumode = PERF_RECORD_MISC_USER;
469
470 thread = ptq->thread;
471 if (!thread) {
472 if (cpumode != PERF_RECORD_MISC_KERNEL)
473 return -EINVAL;
474 thread = ptq->pt->unknown_thread;
475 }
476
477 while (1) {
478 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
479 if (!al.map || !al.map->dso)
480 return -EINVAL;
481
482 if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
483 dso__data_status_seen(al.map->dso,
484 DSO_DATA_STATUS_SEEN_ITRACE))
485 return -ENOENT;
486
487 offset = al.map->map_ip(al.map, *ip);
488
489 if (!to_ip && one_map) {
490 struct intel_pt_cache_entry *e;
491
492 e = intel_pt_cache_lookup(al.map->dso, machine, offset);
493 if (e &&
494 (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
495 *insn_cnt_ptr = e->insn_cnt;
496 *ip += e->byte_cnt;
497 intel_pt_insn->op = e->op;
498 intel_pt_insn->branch = e->branch;
499 intel_pt_insn->length = e->length;
500 intel_pt_insn->rel = e->rel;
501 memcpy(intel_pt_insn->buf, e->insn,
502 INTEL_PT_INSN_BUF_SZ);
503 intel_pt_log_insn_no_data(intel_pt_insn, *ip);
504 return 0;
505 }
506 }
507
508 start_offset = offset;
509 start_ip = *ip;
510
511 /* Load maps to ensure dso->is_64_bit has been updated */
512 map__load(al.map);
513
514 x86_64 = al.map->dso->is_64_bit;
515
516 while (1) {
517 len = dso__data_read_offset(al.map->dso, machine,
518 offset, buf,
519 INTEL_PT_INSN_BUF_SZ);
520 if (len <= 0)
521 return -EINVAL;
522
523 if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
524 return -EINVAL;
525
526 intel_pt_log_insn(intel_pt_insn, *ip);
527
528 insn_cnt += 1;
529
530 if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
531 goto out;
532
533 if (max_insn_cnt && insn_cnt >= max_insn_cnt)
534 goto out_no_cache;
535
536 *ip += intel_pt_insn->length;
537
538 if (to_ip && *ip == to_ip)
539 goto out_no_cache;
540
541 if (*ip >= al.map->end)
542 break;
543
544 offset += intel_pt_insn->length;
545 }
546 one_map = false;
547 }
548out:
549 *insn_cnt_ptr = insn_cnt;
550
551 if (!one_map)
552 goto out_no_cache;
553
554 /*
555 * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
556 * entries.
557 */
558 if (to_ip) {
559 struct intel_pt_cache_entry *e;
560
561 e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
562 if (e)
563 return 0;
564 }
565
566 /* Ignore cache errors */
567 intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
568 *ip - start_ip, intel_pt_insn);
569
570 return 0;
571
572out_no_cache:
573 *insn_cnt_ptr = insn_cnt;
574 return 0;
575}
576
577static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
578 uint64_t offset, const char *filename)
579{
580 struct addr_filter *filt;
581 bool have_filter = false;
582 bool hit_tracestop = false;
583 bool hit_filter = false;
584
585 list_for_each_entry(filt, &pt->filts.head, list) {
586 if (filt->start)
587 have_filter = true;
588
589 if ((filename && !filt->filename) ||
590 (!filename && filt->filename) ||
591 (filename && strcmp(filename, filt->filename)))
592 continue;
593
594 if (!(offset >= filt->addr && offset < filt->addr + filt->size))
595 continue;
596
597 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
598 ip, offset, filename ? filename : "[kernel]",
599 filt->start ? "filter" : "stop",
600 filt->addr, filt->size);
601
602 if (filt->start)
603 hit_filter = true;
604 else
605 hit_tracestop = true;
606 }
607
608 if (!hit_tracestop && !hit_filter)
609 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
610 ip, offset, filename ? filename : "[kernel]");
611
612 return hit_tracestop || (have_filter && !hit_filter);
613}
614
615static int __intel_pt_pgd_ip(uint64_t ip, void *data)
616{
617 struct intel_pt_queue *ptq = data;
618 struct thread *thread;
619 struct addr_location al;
620 u8 cpumode;
621 u64 offset;
622
623 if (ip >= ptq->pt->kernel_start)
624 return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
625
626 cpumode = PERF_RECORD_MISC_USER;
627
628 thread = ptq->thread;
629 if (!thread)
630 return -EINVAL;
631
632 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al);
633 if (!al.map || !al.map->dso)
634 return -EINVAL;
635
636 offset = al.map->map_ip(al.map, ip);
637
638 return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
639 al.map->dso->long_name);
640}
641
642static bool intel_pt_pgd_ip(uint64_t ip, void *data)
643{
644 return __intel_pt_pgd_ip(ip, data) > 0;
645}
646
647static bool intel_pt_get_config(struct intel_pt *pt,
648 struct perf_event_attr *attr, u64 *config)
649{
650 if (attr->type == pt->pmu_type) {
651 if (config)
652 *config = attr->config;
653 return true;
654 }
655
656 return false;
657}
658
659static bool intel_pt_exclude_kernel(struct intel_pt *pt)
660{
661 struct perf_evsel *evsel;
662
663 evlist__for_each_entry(pt->session->evlist, evsel) {
664 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
665 !evsel->attr.exclude_kernel)
666 return false;
667 }
668 return true;
669}
670
671static bool intel_pt_return_compression(struct intel_pt *pt)
672{
673 struct perf_evsel *evsel;
674 u64 config;
675
676 if (!pt->noretcomp_bit)
677 return true;
678
679 evlist__for_each_entry(pt->session->evlist, evsel) {
680 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
681 (config & pt->noretcomp_bit))
682 return false;
683 }
684 return true;
685}
686
687static bool intel_pt_branch_enable(struct intel_pt *pt)
688{
689 struct perf_evsel *evsel;
690 u64 config;
691
692 evlist__for_each_entry(pt->session->evlist, evsel) {
693 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
694 (config & 1) && !(config & 0x2000))
695 return false;
696 }
697 return true;
698}
699
700static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
701{
702 struct perf_evsel *evsel;
703 unsigned int shift;
704 u64 config;
705
706 if (!pt->mtc_freq_bits)
707 return 0;
708
709 for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
710 config >>= 1;
711
712 evlist__for_each_entry(pt->session->evlist, evsel) {
713 if (intel_pt_get_config(pt, &evsel->attr, &config))
714 return (config & pt->mtc_freq_bits) >> shift;
715 }
716 return 0;
717}
718
719static bool intel_pt_timeless_decoding(struct intel_pt *pt)
720{
721 struct perf_evsel *evsel;
722 bool timeless_decoding = true;
723 u64 config;
724
725 if (!pt->tsc_bit || !pt->cap_user_time_zero)
726 return true;
727
728 evlist__for_each_entry(pt->session->evlist, evsel) {
729 if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
730 return true;
731 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
732 if (config & pt->tsc_bit)
733 timeless_decoding = false;
734 else
735 return true;
736 }
737 }
738 return timeless_decoding;
739}
740
741static bool intel_pt_tracing_kernel(struct intel_pt *pt)
742{
743 struct perf_evsel *evsel;
744
745 evlist__for_each_entry(pt->session->evlist, evsel) {
746 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
747 !evsel->attr.exclude_kernel)
748 return true;
749 }
750 return false;
751}
752
753static bool intel_pt_have_tsc(struct intel_pt *pt)
754{
755 struct perf_evsel *evsel;
756 bool have_tsc = false;
757 u64 config;
758
759 if (!pt->tsc_bit)
760 return false;
761
762 evlist__for_each_entry(pt->session->evlist, evsel) {
763 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
764 if (config & pt->tsc_bit)
765 have_tsc = true;
766 else
767 return false;
768 }
769 }
770 return have_tsc;
771}
772
773static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
774{
775 u64 quot, rem;
776
777 quot = ns / pt->tc.time_mult;
778 rem = ns % pt->tc.time_mult;
779 return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
780 pt->tc.time_mult;
781}
782
783static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
784 unsigned int queue_nr)
785{
786 struct intel_pt_params params = { .get_trace = 0, };
787 struct perf_env *env = pt->machine->env;
788 struct intel_pt_queue *ptq;
789
790 ptq = zalloc(sizeof(struct intel_pt_queue));
791 if (!ptq)
792 return NULL;
793
794 if (pt->synth_opts.callchain) {
795 size_t sz = sizeof(struct ip_callchain);
796
797 sz += pt->synth_opts.callchain_sz * sizeof(u64);
798 ptq->chain = zalloc(sz);
799 if (!ptq->chain)
800 goto out_free;
801 }
802
803 if (pt->synth_opts.last_branch) {
804 size_t sz = sizeof(struct branch_stack);
805
806 sz += pt->synth_opts.last_branch_sz *
807 sizeof(struct branch_entry);
808 ptq->last_branch = zalloc(sz);
809 if (!ptq->last_branch)
810 goto out_free;
811 ptq->last_branch_rb = zalloc(sz);
812 if (!ptq->last_branch_rb)
813 goto out_free;
814 }
815
816 ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
817 if (!ptq->event_buf)
818 goto out_free;
819
820 ptq->pt = pt;
821 ptq->queue_nr = queue_nr;
822 ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
823 ptq->pid = -1;
824 ptq->tid = -1;
825 ptq->cpu = -1;
826 ptq->next_tid = -1;
827
828 params.get_trace = intel_pt_get_trace;
829 params.walk_insn = intel_pt_walk_next_insn;
830 params.data = ptq;
831 params.return_compression = intel_pt_return_compression(pt);
832 params.branch_enable = intel_pt_branch_enable(pt);
833 params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
834 params.mtc_period = intel_pt_mtc_period(pt);
835 params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
836 params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
837
838 if (pt->filts.cnt > 0)
839 params.pgd_ip = intel_pt_pgd_ip;
840
841 if (pt->synth_opts.instructions) {
842 if (pt->synth_opts.period) {
843 switch (pt->synth_opts.period_type) {
844 case PERF_ITRACE_PERIOD_INSTRUCTIONS:
845 params.period_type =
846 INTEL_PT_PERIOD_INSTRUCTIONS;
847 params.period = pt->synth_opts.period;
848 break;
849 case PERF_ITRACE_PERIOD_TICKS:
850 params.period_type = INTEL_PT_PERIOD_TICKS;
851 params.period = pt->synth_opts.period;
852 break;
853 case PERF_ITRACE_PERIOD_NANOSECS:
854 params.period_type = INTEL_PT_PERIOD_TICKS;
855 params.period = intel_pt_ns_to_ticks(pt,
856 pt->synth_opts.period);
857 break;
858 default:
859 break;
860 }
861 }
862
863 if (!params.period) {
864 params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
865 params.period = 1;
866 }
867 }
868
869 if (env->cpuid && !strncmp(env->cpuid, "GenuineIntel,6,92,", 18))
870 params.flags |= INTEL_PT_FUP_WITH_NLIP;
871
872 ptq->decoder = intel_pt_decoder_new(&params);
873 if (!ptq->decoder)
874 goto out_free;
875
876 return ptq;
877
878out_free:
879 zfree(&ptq->event_buf);
880 zfree(&ptq->last_branch);
881 zfree(&ptq->last_branch_rb);
882 zfree(&ptq->chain);
883 free(ptq);
884 return NULL;
885}
886
887static void intel_pt_free_queue(void *priv)
888{
889 struct intel_pt_queue *ptq = priv;
890
891 if (!ptq)
892 return;
893 thread__zput(ptq->thread);
894 intel_pt_decoder_free(ptq->decoder);
895 zfree(&ptq->event_buf);
896 zfree(&ptq->last_branch);
897 zfree(&ptq->last_branch_rb);
898 zfree(&ptq->chain);
899 free(ptq);
900}
901
902static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
903 struct auxtrace_queue *queue)
904{
905 struct intel_pt_queue *ptq = queue->priv;
906
907 if (queue->tid == -1 || pt->have_sched_switch) {
908 ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
909 thread__zput(ptq->thread);
910 }
911
912 if (!ptq->thread && ptq->tid != -1)
913 ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
914
915 if (ptq->thread) {
916 ptq->pid = ptq->thread->pid_;
917 if (queue->cpu == -1)
918 ptq->cpu = ptq->thread->cpu;
919 }
920}
921
922static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
923{
924 if (ptq->state->flags & INTEL_PT_ABORT_TX) {
925 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
926 } else if (ptq->state->flags & INTEL_PT_ASYNC) {
927 if (ptq->state->to_ip)
928 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
929 PERF_IP_FLAG_ASYNC |
930 PERF_IP_FLAG_INTERRUPT;
931 else
932 ptq->flags = PERF_IP_FLAG_BRANCH |
933 PERF_IP_FLAG_TRACE_END;
934 ptq->insn_len = 0;
935 } else {
936 if (ptq->state->from_ip)
937 ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
938 else
939 ptq->flags = PERF_IP_FLAG_BRANCH |
940 PERF_IP_FLAG_TRACE_BEGIN;
941 if (ptq->state->flags & INTEL_PT_IN_TX)
942 ptq->flags |= PERF_IP_FLAG_IN_TX;
943 ptq->insn_len = ptq->state->insn_len;
944 memcpy(ptq->insn, ptq->state->insn, INTEL_PT_INSN_BUF_SZ);
945 }
946}
947
948static int intel_pt_setup_queue(struct intel_pt *pt,
949 struct auxtrace_queue *queue,
950 unsigned int queue_nr)
951{
952 struct intel_pt_queue *ptq = queue->priv;
953
954 if (list_empty(&queue->head))
955 return 0;
956
957 if (!ptq) {
958 ptq = intel_pt_alloc_queue(pt, queue_nr);
959 if (!ptq)
960 return -ENOMEM;
961 queue->priv = ptq;
962
963 if (queue->cpu != -1)
964 ptq->cpu = queue->cpu;
965 ptq->tid = queue->tid;
966
967 if (pt->sampling_mode) {
968 if (pt->timeless_decoding)
969 ptq->step_through_buffers = true;
970 if (pt->timeless_decoding || !pt->have_sched_switch)
971 ptq->use_buffer_pid_tid = true;
972 }
973
974 ptq->sync_switch = pt->sync_switch;
975 }
976
977 if (!ptq->on_heap &&
978 (!ptq->sync_switch ||
979 ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
980 const struct intel_pt_state *state;
981 int ret;
982
983 if (pt->timeless_decoding)
984 return 0;
985
986 intel_pt_log("queue %u getting timestamp\n", queue_nr);
987 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
988 queue_nr, ptq->cpu, ptq->pid, ptq->tid);
989 while (1) {
990 state = intel_pt_decode(ptq->decoder);
991 if (state->err) {
992 if (state->err == INTEL_PT_ERR_NODATA) {
993 intel_pt_log("queue %u has no timestamp\n",
994 queue_nr);
995 return 0;
996 }
997 continue;
998 }
999 if (state->timestamp)
1000 break;
1001 }
1002
1003 ptq->timestamp = state->timestamp;
1004 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
1005 queue_nr, ptq->timestamp);
1006 ptq->state = state;
1007 ptq->have_sample = true;
1008 intel_pt_sample_flags(ptq);
1009 ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
1010 if (ret)
1011 return ret;
1012 ptq->on_heap = true;
1013 }
1014
1015 return 0;
1016}
1017
1018static int intel_pt_setup_queues(struct intel_pt *pt)
1019{
1020 unsigned int i;
1021 int ret;
1022
1023 for (i = 0; i < pt->queues.nr_queues; i++) {
1024 ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
1025 if (ret)
1026 return ret;
1027 }
1028 return 0;
1029}
1030
1031static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
1032{
1033 struct branch_stack *bs_src = ptq->last_branch_rb;
1034 struct branch_stack *bs_dst = ptq->last_branch;
1035 size_t nr = 0;
1036
1037 bs_dst->nr = bs_src->nr;
1038
1039 if (!bs_src->nr)
1040 return;
1041
1042 nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
1043 memcpy(&bs_dst->entries[0],
1044 &bs_src->entries[ptq->last_branch_pos],
1045 sizeof(struct branch_entry) * nr);
1046
1047 if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
1048 memcpy(&bs_dst->entries[nr],
1049 &bs_src->entries[0],
1050 sizeof(struct branch_entry) * ptq->last_branch_pos);
1051 }
1052}
1053
1054static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
1055{
1056 ptq->last_branch_pos = 0;
1057 ptq->last_branch_rb->nr = 0;
1058}
1059
1060static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
1061{
1062 const struct intel_pt_state *state = ptq->state;
1063 struct branch_stack *bs = ptq->last_branch_rb;
1064 struct branch_entry *be;
1065
1066 if (!ptq->last_branch_pos)
1067 ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
1068
1069 ptq->last_branch_pos -= 1;
1070
1071 be = &bs->entries[ptq->last_branch_pos];
1072 be->from = state->from_ip;
1073 be->to = state->to_ip;
1074 be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
1075 be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
1076 /* No support for mispredict */
1077 be->flags.mispred = ptq->pt->mispred_all;
1078
1079 if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
1080 bs->nr += 1;
1081}
1082
1083static inline bool intel_pt_skip_event(struct intel_pt *pt)
1084{
1085 return pt->synth_opts.initial_skip &&
1086 pt->num_events++ < pt->synth_opts.initial_skip;
1087}
1088
1089static void intel_pt_prep_b_sample(struct intel_pt *pt,
1090 struct intel_pt_queue *ptq,
1091 union perf_event *event,
1092 struct perf_sample *sample)
1093{
1094 event->sample.header.type = PERF_RECORD_SAMPLE;
1095 event->sample.header.misc = PERF_RECORD_MISC_USER;
1096 event->sample.header.size = sizeof(struct perf_event_header);
1097
1098 if (!pt->timeless_decoding)
1099 sample->time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1100
1101 sample->cpumode = PERF_RECORD_MISC_USER;
1102 sample->ip = ptq->state->from_ip;
1103 sample->pid = ptq->pid;
1104 sample->tid = ptq->tid;
1105 sample->addr = ptq->state->to_ip;
1106 sample->period = 1;
1107 sample->cpu = ptq->cpu;
1108 sample->flags = ptq->flags;
1109 sample->insn_len = ptq->insn_len;
1110 memcpy(sample->insn, ptq->insn, INTEL_PT_INSN_BUF_SZ);
1111}
1112
1113static int intel_pt_inject_event(union perf_event *event,
1114 struct perf_sample *sample, u64 type,
1115 bool swapped)
1116{
1117 event->header.size = perf_event__sample_event_size(sample, type, 0);
1118 return perf_event__synthesize_sample(event, type, 0, sample, swapped);
1119}
1120
1121static inline int intel_pt_opt_inject(struct intel_pt *pt,
1122 union perf_event *event,
1123 struct perf_sample *sample, u64 type)
1124{
1125 if (!pt->synth_opts.inject)
1126 return 0;
1127
1128 return intel_pt_inject_event(event, sample, type, pt->synth_needs_swap);
1129}
1130
1131static int intel_pt_deliver_synth_b_event(struct intel_pt *pt,
1132 union perf_event *event,
1133 struct perf_sample *sample, u64 type)
1134{
1135 int ret;
1136
1137 ret = intel_pt_opt_inject(pt, event, sample, type);
1138 if (ret)
1139 return ret;
1140
1141 ret = perf_session__deliver_synth_event(pt->session, event, sample);
1142 if (ret)
1143 pr_err("Intel PT: failed to deliver event, error %d\n", ret);
1144
1145 return ret;
1146}
1147
1148static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
1149{
1150 struct intel_pt *pt = ptq->pt;
1151 union perf_event *event = ptq->event_buf;
1152 struct perf_sample sample = { .ip = 0, };
1153 struct dummy_branch_stack {
1154 u64 nr;
1155 struct branch_entry entries;
1156 } dummy_bs;
1157
1158 if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
1159 return 0;
1160
1161 if (intel_pt_skip_event(pt))
1162 return 0;
1163
1164 intel_pt_prep_b_sample(pt, ptq, event, &sample);
1165
1166 sample.id = ptq->pt->branches_id;
1167 sample.stream_id = ptq->pt->branches_id;
1168
1169 /*
1170 * perf report cannot handle events without a branch stack when using
1171 * SORT_MODE__BRANCH so make a dummy one.
1172 */
1173 if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
1174 dummy_bs = (struct dummy_branch_stack){
1175 .nr = 1,
1176 .entries = {
1177 .from = sample.ip,
1178 .to = sample.addr,
1179 },
1180 };
1181 sample.branch_stack = (struct branch_stack *)&dummy_bs;
1182 }
1183
1184 return intel_pt_deliver_synth_b_event(pt, event, &sample,
1185 pt->branches_sample_type);
1186}
1187
1188static void intel_pt_prep_sample(struct intel_pt *pt,
1189 struct intel_pt_queue *ptq,
1190 union perf_event *event,
1191 struct perf_sample *sample)
1192{
1193 intel_pt_prep_b_sample(pt, ptq, event, sample);
1194
1195 if (pt->synth_opts.callchain) {
1196 thread_stack__sample(ptq->thread, ptq->chain,
1197 pt->synth_opts.callchain_sz, sample->ip);
1198 sample->callchain = ptq->chain;
1199 }
1200
1201 if (pt->synth_opts.last_branch) {
1202 intel_pt_copy_last_branch_rb(ptq);
1203 sample->branch_stack = ptq->last_branch;
1204 }
1205}
1206
1207static inline int intel_pt_deliver_synth_event(struct intel_pt *pt,
1208 struct intel_pt_queue *ptq,
1209 union perf_event *event,
1210 struct perf_sample *sample,
1211 u64 type)
1212{
1213 int ret;
1214
1215 ret = intel_pt_deliver_synth_b_event(pt, event, sample, type);
1216
1217 if (pt->synth_opts.last_branch)
1218 intel_pt_reset_last_branch_rb(ptq);
1219
1220 return ret;
1221}
1222
1223static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
1224{
1225 struct intel_pt *pt = ptq->pt;
1226 union perf_event *event = ptq->event_buf;
1227 struct perf_sample sample = { .ip = 0, };
1228
1229 if (intel_pt_skip_event(pt))
1230 return 0;
1231
1232 intel_pt_prep_sample(pt, ptq, event, &sample);
1233
1234 sample.id = ptq->pt->instructions_id;
1235 sample.stream_id = ptq->pt->instructions_id;
1236 sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
1237
1238 ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
1239
1240 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1241 pt->instructions_sample_type);
1242}
1243
1244static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
1245{
1246 struct intel_pt *pt = ptq->pt;
1247 union perf_event *event = ptq->event_buf;
1248 struct perf_sample sample = { .ip = 0, };
1249
1250 if (intel_pt_skip_event(pt))
1251 return 0;
1252
1253 intel_pt_prep_sample(pt, ptq, event, &sample);
1254
1255 sample.id = ptq->pt->transactions_id;
1256 sample.stream_id = ptq->pt->transactions_id;
1257
1258 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1259 pt->transactions_sample_type);
1260}
1261
1262static void intel_pt_prep_p_sample(struct intel_pt *pt,
1263 struct intel_pt_queue *ptq,
1264 union perf_event *event,
1265 struct perf_sample *sample)
1266{
1267 intel_pt_prep_sample(pt, ptq, event, sample);
1268
1269 /*
1270 * Zero IP is used to mean "trace start" but that is not the case for
1271 * power or PTWRITE events with no IP, so clear the flags.
1272 */
1273 if (!sample->ip)
1274 sample->flags = 0;
1275}
1276
1277static int intel_pt_synth_ptwrite_sample(struct intel_pt_queue *ptq)
1278{
1279 struct intel_pt *pt = ptq->pt;
1280 union perf_event *event = ptq->event_buf;
1281 struct perf_sample sample = { .ip = 0, };
1282 struct perf_synth_intel_ptwrite raw;
1283
1284 if (intel_pt_skip_event(pt))
1285 return 0;
1286
1287 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1288
1289 sample.id = ptq->pt->ptwrites_id;
1290 sample.stream_id = ptq->pt->ptwrites_id;
1291
1292 raw.flags = 0;
1293 raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1294 raw.payload = cpu_to_le64(ptq->state->ptw_payload);
1295
1296 sample.raw_size = perf_synth__raw_size(raw);
1297 sample.raw_data = perf_synth__raw_data(&raw);
1298
1299 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1300 pt->ptwrites_sample_type);
1301}
1302
1303static int intel_pt_synth_cbr_sample(struct intel_pt_queue *ptq)
1304{
1305 struct intel_pt *pt = ptq->pt;
1306 union perf_event *event = ptq->event_buf;
1307 struct perf_sample sample = { .ip = 0, };
1308 struct perf_synth_intel_cbr raw;
1309 u32 flags;
1310
1311 if (intel_pt_skip_event(pt))
1312 return 0;
1313
1314 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1315
1316 sample.id = ptq->pt->cbr_id;
1317 sample.stream_id = ptq->pt->cbr_id;
1318
1319 flags = (u16)ptq->state->cbr_payload | (pt->max_non_turbo_ratio << 16);
1320 raw.flags = cpu_to_le32(flags);
1321 raw.freq = cpu_to_le32(raw.cbr * pt->cbr2khz);
1322 raw.reserved3 = 0;
1323
1324 sample.raw_size = perf_synth__raw_size(raw);
1325 sample.raw_data = perf_synth__raw_data(&raw);
1326
1327 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1328 pt->pwr_events_sample_type);
1329}
1330
1331static int intel_pt_synth_mwait_sample(struct intel_pt_queue *ptq)
1332{
1333 struct intel_pt *pt = ptq->pt;
1334 union perf_event *event = ptq->event_buf;
1335 struct perf_sample sample = { .ip = 0, };
1336 struct perf_synth_intel_mwait raw;
1337
1338 if (intel_pt_skip_event(pt))
1339 return 0;
1340
1341 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1342
1343 sample.id = ptq->pt->mwait_id;
1344 sample.stream_id = ptq->pt->mwait_id;
1345
1346 raw.reserved = 0;
1347 raw.payload = cpu_to_le64(ptq->state->mwait_payload);
1348
1349 sample.raw_size = perf_synth__raw_size(raw);
1350 sample.raw_data = perf_synth__raw_data(&raw);
1351
1352 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1353 pt->pwr_events_sample_type);
1354}
1355
1356static int intel_pt_synth_pwre_sample(struct intel_pt_queue *ptq)
1357{
1358 struct intel_pt *pt = ptq->pt;
1359 union perf_event *event = ptq->event_buf;
1360 struct perf_sample sample = { .ip = 0, };
1361 struct perf_synth_intel_pwre raw;
1362
1363 if (intel_pt_skip_event(pt))
1364 return 0;
1365
1366 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1367
1368 sample.id = ptq->pt->pwre_id;
1369 sample.stream_id = ptq->pt->pwre_id;
1370
1371 raw.reserved = 0;
1372 raw.payload = cpu_to_le64(ptq->state->pwre_payload);
1373
1374 sample.raw_size = perf_synth__raw_size(raw);
1375 sample.raw_data = perf_synth__raw_data(&raw);
1376
1377 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1378 pt->pwr_events_sample_type);
1379}
1380
1381static int intel_pt_synth_exstop_sample(struct intel_pt_queue *ptq)
1382{
1383 struct intel_pt *pt = ptq->pt;
1384 union perf_event *event = ptq->event_buf;
1385 struct perf_sample sample = { .ip = 0, };
1386 struct perf_synth_intel_exstop raw;
1387
1388 if (intel_pt_skip_event(pt))
1389 return 0;
1390
1391 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1392
1393 sample.id = ptq->pt->exstop_id;
1394 sample.stream_id = ptq->pt->exstop_id;
1395
1396 raw.flags = 0;
1397 raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1398
1399 sample.raw_size = perf_synth__raw_size(raw);
1400 sample.raw_data = perf_synth__raw_data(&raw);
1401
1402 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1403 pt->pwr_events_sample_type);
1404}
1405
1406static int intel_pt_synth_pwrx_sample(struct intel_pt_queue *ptq)
1407{
1408 struct intel_pt *pt = ptq->pt;
1409 union perf_event *event = ptq->event_buf;
1410 struct perf_sample sample = { .ip = 0, };
1411 struct perf_synth_intel_pwrx raw;
1412
1413 if (intel_pt_skip_event(pt))
1414 return 0;
1415
1416 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1417
1418 sample.id = ptq->pt->pwrx_id;
1419 sample.stream_id = ptq->pt->pwrx_id;
1420
1421 raw.reserved = 0;
1422 raw.payload = cpu_to_le64(ptq->state->pwrx_payload);
1423
1424 sample.raw_size = perf_synth__raw_size(raw);
1425 sample.raw_data = perf_synth__raw_data(&raw);
1426
1427 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1428 pt->pwr_events_sample_type);
1429}
1430
1431static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
1432 pid_t pid, pid_t tid, u64 ip)
1433{
1434 union perf_event event;
1435 char msg[MAX_AUXTRACE_ERROR_MSG];
1436 int err;
1437
1438 intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
1439
1440 auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
1441 code, cpu, pid, tid, ip, msg);
1442
1443 err = perf_session__deliver_synth_event(pt->session, &event, NULL);
1444 if (err)
1445 pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
1446 err);
1447
1448 return err;
1449}
1450
1451static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
1452{
1453 struct auxtrace_queue *queue;
1454 pid_t tid = ptq->next_tid;
1455 int err;
1456
1457 if (tid == -1)
1458 return 0;
1459
1460 intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
1461
1462 err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
1463
1464 queue = &pt->queues.queue_array[ptq->queue_nr];
1465 intel_pt_set_pid_tid_cpu(pt, queue);
1466
1467 ptq->next_tid = -1;
1468
1469 return err;
1470}
1471
1472static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1473{
1474 struct intel_pt *pt = ptq->pt;
1475
1476 return ip == pt->switch_ip &&
1477 (ptq->flags & PERF_IP_FLAG_BRANCH) &&
1478 !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
1479 PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
1480}
1481
1482#define INTEL_PT_PWR_EVT (INTEL_PT_MWAIT_OP | INTEL_PT_PWR_ENTRY | \
1483 INTEL_PT_EX_STOP | INTEL_PT_PWR_EXIT | \
1484 INTEL_PT_CBR_CHG)
1485
1486static int intel_pt_sample(struct intel_pt_queue *ptq)
1487{
1488 const struct intel_pt_state *state = ptq->state;
1489 struct intel_pt *pt = ptq->pt;
1490 int err;
1491
1492 if (!ptq->have_sample)
1493 return 0;
1494
1495 ptq->have_sample = false;
1496
1497 if (pt->sample_pwr_events && (state->type & INTEL_PT_PWR_EVT)) {
1498 if (state->type & INTEL_PT_CBR_CHG) {
1499 err = intel_pt_synth_cbr_sample(ptq);
1500 if (err)
1501 return err;
1502 }
1503 if (state->type & INTEL_PT_MWAIT_OP) {
1504 err = intel_pt_synth_mwait_sample(ptq);
1505 if (err)
1506 return err;
1507 }
1508 if (state->type & INTEL_PT_PWR_ENTRY) {
1509 err = intel_pt_synth_pwre_sample(ptq);
1510 if (err)
1511 return err;
1512 }
1513 if (state->type & INTEL_PT_EX_STOP) {
1514 err = intel_pt_synth_exstop_sample(ptq);
1515 if (err)
1516 return err;
1517 }
1518 if (state->type & INTEL_PT_PWR_EXIT) {
1519 err = intel_pt_synth_pwrx_sample(ptq);
1520 if (err)
1521 return err;
1522 }
1523 }
1524
1525 if (pt->sample_instructions && (state->type & INTEL_PT_INSTRUCTION)) {
1526 err = intel_pt_synth_instruction_sample(ptq);
1527 if (err)
1528 return err;
1529 }
1530
1531 if (pt->sample_transactions && (state->type & INTEL_PT_TRANSACTION)) {
1532 err = intel_pt_synth_transaction_sample(ptq);
1533 if (err)
1534 return err;
1535 }
1536
1537 if (pt->sample_ptwrites && (state->type & INTEL_PT_PTW)) {
1538 err = intel_pt_synth_ptwrite_sample(ptq);
1539 if (err)
1540 return err;
1541 }
1542
1543 if (!(state->type & INTEL_PT_BRANCH))
1544 return 0;
1545
1546 if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
1547 thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
1548 state->to_ip, ptq->insn_len,
1549 state->trace_nr);
1550 else
1551 thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
1552
1553 if (pt->sample_branches) {
1554 err = intel_pt_synth_branch_sample(ptq);
1555 if (err)
1556 return err;
1557 }
1558
1559 if (pt->synth_opts.last_branch)
1560 intel_pt_update_last_branch_rb(ptq);
1561
1562 if (!ptq->sync_switch)
1563 return 0;
1564
1565 if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
1566 switch (ptq->switch_state) {
1567 case INTEL_PT_SS_NOT_TRACING:
1568 case INTEL_PT_SS_UNKNOWN:
1569 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1570 err = intel_pt_next_tid(pt, ptq);
1571 if (err)
1572 return err;
1573 ptq->switch_state = INTEL_PT_SS_TRACING;
1574 break;
1575 default:
1576 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
1577 return 1;
1578 }
1579 } else if (!state->to_ip) {
1580 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
1581 } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
1582 ptq->switch_state = INTEL_PT_SS_UNKNOWN;
1583 } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1584 state->to_ip == pt->ptss_ip &&
1585 (ptq->flags & PERF_IP_FLAG_CALL)) {
1586 ptq->switch_state = INTEL_PT_SS_TRACING;
1587 }
1588
1589 return 0;
1590}
1591
1592static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
1593{
1594 struct machine *machine = pt->machine;
1595 struct map *map;
1596 struct symbol *sym, *start;
1597 u64 ip, switch_ip = 0;
1598 const char *ptss;
1599
1600 if (ptss_ip)
1601 *ptss_ip = 0;
1602
1603 map = machine__kernel_map(machine);
1604 if (!map)
1605 return 0;
1606
1607 if (map__load(map))
1608 return 0;
1609
1610 start = dso__first_symbol(map->dso, MAP__FUNCTION);
1611
1612 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1613 if (sym->binding == STB_GLOBAL &&
1614 !strcmp(sym->name, "__switch_to")) {
1615 ip = map->unmap_ip(map, sym->start);
1616 if (ip >= map->start && ip < map->end) {
1617 switch_ip = ip;
1618 break;
1619 }
1620 }
1621 }
1622
1623 if (!switch_ip || !ptss_ip)
1624 return 0;
1625
1626 if (pt->have_sched_switch == 1)
1627 ptss = "perf_trace_sched_switch";
1628 else
1629 ptss = "__perf_event_task_sched_out";
1630
1631 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1632 if (!strcmp(sym->name, ptss)) {
1633 ip = map->unmap_ip(map, sym->start);
1634 if (ip >= map->start && ip < map->end) {
1635 *ptss_ip = ip;
1636 break;
1637 }
1638 }
1639 }
1640
1641 return switch_ip;
1642}
1643
1644static void intel_pt_enable_sync_switch(struct intel_pt *pt)
1645{
1646 unsigned int i;
1647
1648 pt->sync_switch = true;
1649
1650 for (i = 0; i < pt->queues.nr_queues; i++) {
1651 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1652 struct intel_pt_queue *ptq = queue->priv;
1653
1654 if (ptq)
1655 ptq->sync_switch = true;
1656 }
1657}
1658
1659static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
1660{
1661 const struct intel_pt_state *state = ptq->state;
1662 struct intel_pt *pt = ptq->pt;
1663 int err;
1664
1665 if (!pt->kernel_start) {
1666 pt->kernel_start = machine__kernel_start(pt->machine);
1667 if (pt->per_cpu_mmaps &&
1668 (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
1669 !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
1670 !pt->sampling_mode) {
1671 pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
1672 if (pt->switch_ip) {
1673 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
1674 pt->switch_ip, pt->ptss_ip);
1675 intel_pt_enable_sync_switch(pt);
1676 }
1677 }
1678 }
1679
1680 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1681 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1682 while (1) {
1683 err = intel_pt_sample(ptq);
1684 if (err)
1685 return err;
1686
1687 state = intel_pt_decode(ptq->decoder);
1688 if (state->err) {
1689 if (state->err == INTEL_PT_ERR_NODATA)
1690 return 1;
1691 if (ptq->sync_switch &&
1692 state->from_ip >= pt->kernel_start) {
1693 ptq->sync_switch = false;
1694 intel_pt_next_tid(pt, ptq);
1695 }
1696 if (pt->synth_opts.errors) {
1697 err = intel_pt_synth_error(pt, state->err,
1698 ptq->cpu, ptq->pid,
1699 ptq->tid,
1700 state->from_ip);
1701 if (err)
1702 return err;
1703 }
1704 continue;
1705 }
1706
1707 ptq->state = state;
1708 ptq->have_sample = true;
1709 intel_pt_sample_flags(ptq);
1710
1711 /* Use estimated TSC upon return to user space */
1712 if (pt->est_tsc &&
1713 (state->from_ip >= pt->kernel_start || !state->from_ip) &&
1714 state->to_ip && state->to_ip < pt->kernel_start) {
1715 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1716 state->timestamp, state->est_timestamp);
1717 ptq->timestamp = state->est_timestamp;
1718 /* Use estimated TSC in unknown switch state */
1719 } else if (ptq->sync_switch &&
1720 ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1721 intel_pt_is_switch_ip(ptq, state->to_ip) &&
1722 ptq->next_tid == -1) {
1723 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1724 state->timestamp, state->est_timestamp);
1725 ptq->timestamp = state->est_timestamp;
1726 } else if (state->timestamp > ptq->timestamp) {
1727 ptq->timestamp = state->timestamp;
1728 }
1729
1730 if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
1731 *timestamp = ptq->timestamp;
1732 return 0;
1733 }
1734 }
1735 return 0;
1736}
1737
1738static inline int intel_pt_update_queues(struct intel_pt *pt)
1739{
1740 if (pt->queues.new_data) {
1741 pt->queues.new_data = false;
1742 return intel_pt_setup_queues(pt);
1743 }
1744 return 0;
1745}
1746
1747static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
1748{
1749 unsigned int queue_nr;
1750 u64 ts;
1751 int ret;
1752
1753 while (1) {
1754 struct auxtrace_queue *queue;
1755 struct intel_pt_queue *ptq;
1756
1757 if (!pt->heap.heap_cnt)
1758 return 0;
1759
1760 if (pt->heap.heap_array[0].ordinal >= timestamp)
1761 return 0;
1762
1763 queue_nr = pt->heap.heap_array[0].queue_nr;
1764 queue = &pt->queues.queue_array[queue_nr];
1765 ptq = queue->priv;
1766
1767 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
1768 queue_nr, pt->heap.heap_array[0].ordinal,
1769 timestamp);
1770
1771 auxtrace_heap__pop(&pt->heap);
1772
1773 if (pt->heap.heap_cnt) {
1774 ts = pt->heap.heap_array[0].ordinal + 1;
1775 if (ts > timestamp)
1776 ts = timestamp;
1777 } else {
1778 ts = timestamp;
1779 }
1780
1781 intel_pt_set_pid_tid_cpu(pt, queue);
1782
1783 ret = intel_pt_run_decoder(ptq, &ts);
1784
1785 if (ret < 0) {
1786 auxtrace_heap__add(&pt->heap, queue_nr, ts);
1787 return ret;
1788 }
1789
1790 if (!ret) {
1791 ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
1792 if (ret < 0)
1793 return ret;
1794 } else {
1795 ptq->on_heap = false;
1796 }
1797 }
1798
1799 return 0;
1800}
1801
1802static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
1803 u64 time_)
1804{
1805 struct auxtrace_queues *queues = &pt->queues;
1806 unsigned int i;
1807 u64 ts = 0;
1808
1809 for (i = 0; i < queues->nr_queues; i++) {
1810 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1811 struct intel_pt_queue *ptq = queue->priv;
1812
1813 if (ptq && (tid == -1 || ptq->tid == tid)) {
1814 ptq->time = time_;
1815 intel_pt_set_pid_tid_cpu(pt, queue);
1816 intel_pt_run_decoder(ptq, &ts);
1817 }
1818 }
1819 return 0;
1820}
1821
1822static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
1823{
1824 return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
1825 sample->pid, sample->tid, 0);
1826}
1827
1828static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
1829{
1830 unsigned i, j;
1831
1832 if (cpu < 0 || !pt->queues.nr_queues)
1833 return NULL;
1834
1835 if ((unsigned)cpu >= pt->queues.nr_queues)
1836 i = pt->queues.nr_queues - 1;
1837 else
1838 i = cpu;
1839
1840 if (pt->queues.queue_array[i].cpu == cpu)
1841 return pt->queues.queue_array[i].priv;
1842
1843 for (j = 0; i > 0; j++) {
1844 if (pt->queues.queue_array[--i].cpu == cpu)
1845 return pt->queues.queue_array[i].priv;
1846 }
1847
1848 for (; j < pt->queues.nr_queues; j++) {
1849 if (pt->queues.queue_array[j].cpu == cpu)
1850 return pt->queues.queue_array[j].priv;
1851 }
1852
1853 return NULL;
1854}
1855
1856static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
1857 u64 timestamp)
1858{
1859 struct intel_pt_queue *ptq;
1860 int err;
1861
1862 if (!pt->sync_switch)
1863 return 1;
1864
1865 ptq = intel_pt_cpu_to_ptq(pt, cpu);
1866 if (!ptq || !ptq->sync_switch)
1867 return 1;
1868
1869 switch (ptq->switch_state) {
1870 case INTEL_PT_SS_NOT_TRACING:
1871 ptq->next_tid = -1;
1872 break;
1873 case INTEL_PT_SS_UNKNOWN:
1874 case INTEL_PT_SS_TRACING:
1875 ptq->next_tid = tid;
1876 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
1877 return 0;
1878 case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
1879 if (!ptq->on_heap) {
1880 ptq->timestamp = perf_time_to_tsc(timestamp,
1881 &pt->tc);
1882 err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
1883 ptq->timestamp);
1884 if (err)
1885 return err;
1886 ptq->on_heap = true;
1887 }
1888 ptq->switch_state = INTEL_PT_SS_TRACING;
1889 break;
1890 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1891 ptq->next_tid = tid;
1892 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
1893 break;
1894 default:
1895 break;
1896 }
1897
1898 return 1;
1899}
1900
1901static int intel_pt_process_switch(struct intel_pt *pt,
1902 struct perf_sample *sample)
1903{
1904 struct perf_evsel *evsel;
1905 pid_t tid;
1906 int cpu, ret;
1907
1908 evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
1909 if (evsel != pt->switch_evsel)
1910 return 0;
1911
1912 tid = perf_evsel__intval(evsel, sample, "next_pid");
1913 cpu = sample->cpu;
1914
1915 intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1916 cpu, tid, sample->time, perf_time_to_tsc(sample->time,
1917 &pt->tc));
1918
1919 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1920 if (ret <= 0)
1921 return ret;
1922
1923 return machine__set_current_tid(pt->machine, cpu, -1, tid);
1924}
1925
1926static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
1927 struct perf_sample *sample)
1928{
1929 bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
1930 pid_t pid, tid;
1931 int cpu, ret;
1932
1933 cpu = sample->cpu;
1934
1935 if (pt->have_sched_switch == 3) {
1936 if (!out)
1937 return 0;
1938 if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
1939 pr_err("Expecting CPU-wide context switch event\n");
1940 return -EINVAL;
1941 }
1942 pid = event->context_switch.next_prev_pid;
1943 tid = event->context_switch.next_prev_tid;
1944 } else {
1945 if (out)
1946 return 0;
1947 pid = sample->pid;
1948 tid = sample->tid;
1949 }
1950
1951 if (tid == -1) {
1952 pr_err("context_switch event has no tid\n");
1953 return -EINVAL;
1954 }
1955
1956 intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1957 cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
1958 &pt->tc));
1959
1960 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1961 if (ret <= 0)
1962 return ret;
1963
1964 return machine__set_current_tid(pt->machine, cpu, pid, tid);
1965}
1966
1967static int intel_pt_process_itrace_start(struct intel_pt *pt,
1968 union perf_event *event,
1969 struct perf_sample *sample)
1970{
1971 if (!pt->per_cpu_mmaps)
1972 return 0;
1973
1974 intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1975 sample->cpu, event->itrace_start.pid,
1976 event->itrace_start.tid, sample->time,
1977 perf_time_to_tsc(sample->time, &pt->tc));
1978
1979 return machine__set_current_tid(pt->machine, sample->cpu,
1980 event->itrace_start.pid,
1981 event->itrace_start.tid);
1982}
1983
1984static int intel_pt_process_event(struct perf_session *session,
1985 union perf_event *event,
1986 struct perf_sample *sample,
1987 struct perf_tool *tool)
1988{
1989 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1990 auxtrace);
1991 u64 timestamp;
1992 int err = 0;
1993
1994 if (dump_trace)
1995 return 0;
1996
1997 if (!tool->ordered_events) {
1998 pr_err("Intel Processor Trace requires ordered events\n");
1999 return -EINVAL;
2000 }
2001
2002 if (sample->time && sample->time != (u64)-1)
2003 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
2004 else
2005 timestamp = 0;
2006
2007 if (timestamp || pt->timeless_decoding) {
2008 err = intel_pt_update_queues(pt);
2009 if (err)
2010 return err;
2011 }
2012
2013 if (pt->timeless_decoding) {
2014 if (event->header.type == PERF_RECORD_EXIT) {
2015 err = intel_pt_process_timeless_queues(pt,
2016 event->fork.tid,
2017 sample->time);
2018 }
2019 } else if (timestamp) {
2020 err = intel_pt_process_queues(pt, timestamp);
2021 }
2022 if (err)
2023 return err;
2024
2025 if (event->header.type == PERF_RECORD_AUX &&
2026 (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
2027 pt->synth_opts.errors) {
2028 err = intel_pt_lost(pt, sample);
2029 if (err)
2030 return err;
2031 }
2032
2033 if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
2034 err = intel_pt_process_switch(pt, sample);
2035 else if (event->header.type == PERF_RECORD_ITRACE_START)
2036 err = intel_pt_process_itrace_start(pt, event, sample);
2037 else if (event->header.type == PERF_RECORD_SWITCH ||
2038 event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
2039 err = intel_pt_context_switch(pt, event, sample);
2040
2041 intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
2042 perf_event__name(event->header.type), event->header.type,
2043 sample->cpu, sample->time, timestamp);
2044
2045 return err;
2046}
2047
2048static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
2049{
2050 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2051 auxtrace);
2052 int ret;
2053
2054 if (dump_trace)
2055 return 0;
2056
2057 if (!tool->ordered_events)
2058 return -EINVAL;
2059
2060 ret = intel_pt_update_queues(pt);
2061 if (ret < 0)
2062 return ret;
2063
2064 if (pt->timeless_decoding)
2065 return intel_pt_process_timeless_queues(pt, -1,
2066 MAX_TIMESTAMP - 1);
2067
2068 return intel_pt_process_queues(pt, MAX_TIMESTAMP);
2069}
2070
2071static void intel_pt_free_events(struct perf_session *session)
2072{
2073 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2074 auxtrace);
2075 struct auxtrace_queues *queues = &pt->queues;
2076 unsigned int i;
2077
2078 for (i = 0; i < queues->nr_queues; i++) {
2079 intel_pt_free_queue(queues->queue_array[i].priv);
2080 queues->queue_array[i].priv = NULL;
2081 }
2082 intel_pt_log_disable();
2083 auxtrace_queues__free(queues);
2084}
2085
2086static void intel_pt_free(struct perf_session *session)
2087{
2088 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2089 auxtrace);
2090
2091 auxtrace_heap__free(&pt->heap);
2092 intel_pt_free_events(session);
2093 session->auxtrace = NULL;
2094 thread__put(pt->unknown_thread);
2095 addr_filters__exit(&pt->filts);
2096 zfree(&pt->filter);
2097 free(pt);
2098}
2099
2100static int intel_pt_process_auxtrace_event(struct perf_session *session,
2101 union perf_event *event,
2102 struct perf_tool *tool __maybe_unused)
2103{
2104 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2105 auxtrace);
2106
2107 if (pt->sampling_mode)
2108 return 0;
2109
2110 if (!pt->data_queued) {
2111 struct auxtrace_buffer *buffer;
2112 off_t data_offset;
2113 int fd = perf_data_file__fd(session->file);
2114 int err;
2115
2116 if (perf_data_file__is_pipe(session->file)) {
2117 data_offset = 0;
2118 } else {
2119 data_offset = lseek(fd, 0, SEEK_CUR);
2120 if (data_offset == -1)
2121 return -errno;
2122 }
2123
2124 err = auxtrace_queues__add_event(&pt->queues, session, event,
2125 data_offset, &buffer);
2126 if (err)
2127 return err;
2128
2129 /* Dump here now we have copied a piped trace out of the pipe */
2130 if (dump_trace) {
2131 if (auxtrace_buffer__get_data(buffer, fd)) {
2132 intel_pt_dump_event(pt, buffer->data,
2133 buffer->size);
2134 auxtrace_buffer__put_data(buffer);
2135 }
2136 }
2137 }
2138
2139 return 0;
2140}
2141
2142struct intel_pt_synth {
2143 struct perf_tool dummy_tool;
2144 struct perf_session *session;
2145};
2146
2147static int intel_pt_event_synth(struct perf_tool *tool,
2148 union perf_event *event,
2149 struct perf_sample *sample __maybe_unused,
2150 struct machine *machine __maybe_unused)
2151{
2152 struct intel_pt_synth *intel_pt_synth =
2153 container_of(tool, struct intel_pt_synth, dummy_tool);
2154
2155 return perf_session__deliver_synth_event(intel_pt_synth->session, event,
2156 NULL);
2157}
2158
2159static int intel_pt_synth_event(struct perf_session *session, const char *name,
2160 struct perf_event_attr *attr, u64 id)
2161{
2162 struct intel_pt_synth intel_pt_synth;
2163 int err;
2164
2165 pr_debug("Synthesizing '%s' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
2166 name, id, (u64)attr->sample_type);
2167
2168 memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
2169 intel_pt_synth.session = session;
2170
2171 err = perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
2172 &id, intel_pt_event_synth);
2173 if (err)
2174 pr_err("%s: failed to synthesize '%s' event type\n",
2175 __func__, name);
2176
2177 return err;
2178}
2179
2180static void intel_pt_set_event_name(struct perf_evlist *evlist, u64 id,
2181 const char *name)
2182{
2183 struct perf_evsel *evsel;
2184
2185 evlist__for_each_entry(evlist, evsel) {
2186 if (evsel->id && evsel->id[0] == id) {
2187 if (evsel->name)
2188 zfree(&evsel->name);
2189 evsel->name = strdup(name);
2190 break;
2191 }
2192 }
2193}
2194
2195static struct perf_evsel *intel_pt_evsel(struct intel_pt *pt,
2196 struct perf_evlist *evlist)
2197{
2198 struct perf_evsel *evsel;
2199
2200 evlist__for_each_entry(evlist, evsel) {
2201 if (evsel->attr.type == pt->pmu_type && evsel->ids)
2202 return evsel;
2203 }
2204
2205 return NULL;
2206}
2207
2208static int intel_pt_synth_events(struct intel_pt *pt,
2209 struct perf_session *session)
2210{
2211 struct perf_evlist *evlist = session->evlist;
2212 struct perf_evsel *evsel = intel_pt_evsel(pt, evlist);
2213 struct perf_event_attr attr;
2214 u64 id;
2215 int err;
2216
2217 if (!evsel) {
2218 pr_debug("There are no selected events with Intel Processor Trace data\n");
2219 return 0;
2220 }
2221
2222 memset(&attr, 0, sizeof(struct perf_event_attr));
2223 attr.size = sizeof(struct perf_event_attr);
2224 attr.type = PERF_TYPE_HARDWARE;
2225 attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
2226 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
2227 PERF_SAMPLE_PERIOD;
2228 if (pt->timeless_decoding)
2229 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
2230 else
2231 attr.sample_type |= PERF_SAMPLE_TIME;
2232 if (!pt->per_cpu_mmaps)
2233 attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
2234 attr.exclude_user = evsel->attr.exclude_user;
2235 attr.exclude_kernel = evsel->attr.exclude_kernel;
2236 attr.exclude_hv = evsel->attr.exclude_hv;
2237 attr.exclude_host = evsel->attr.exclude_host;
2238 attr.exclude_guest = evsel->attr.exclude_guest;
2239 attr.sample_id_all = evsel->attr.sample_id_all;
2240 attr.read_format = evsel->attr.read_format;
2241
2242 id = evsel->id[0] + 1000000000;
2243 if (!id)
2244 id = 1;
2245
2246 if (pt->synth_opts.branches) {
2247 attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
2248 attr.sample_period = 1;
2249 attr.sample_type |= PERF_SAMPLE_ADDR;
2250 err = intel_pt_synth_event(session, "branches", &attr, id);
2251 if (err)
2252 return err;
2253 pt->sample_branches = true;
2254 pt->branches_sample_type = attr.sample_type;
2255 pt->branches_id = id;
2256 id += 1;
2257 attr.sample_type &= ~(u64)PERF_SAMPLE_ADDR;
2258 }
2259
2260 if (pt->synth_opts.callchain)
2261 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
2262 if (pt->synth_opts.last_branch)
2263 attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
2264
2265 if (pt->synth_opts.instructions) {
2266 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2267 if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
2268 attr.sample_period =
2269 intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
2270 else
2271 attr.sample_period = pt->synth_opts.period;
2272 err = intel_pt_synth_event(session, "instructions", &attr, id);
2273 if (err)
2274 return err;
2275 pt->sample_instructions = true;
2276 pt->instructions_sample_type = attr.sample_type;
2277 pt->instructions_id = id;
2278 id += 1;
2279 }
2280
2281 attr.sample_type &= ~(u64)PERF_SAMPLE_PERIOD;
2282 attr.sample_period = 1;
2283
2284 if (pt->synth_opts.transactions) {
2285 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2286 err = intel_pt_synth_event(session, "transactions", &attr, id);
2287 if (err)
2288 return err;
2289 pt->sample_transactions = true;
2290 pt->transactions_sample_type = attr.sample_type;
2291 pt->transactions_id = id;
2292 intel_pt_set_event_name(evlist, id, "transactions");
2293 id += 1;
2294 }
2295
2296 attr.type = PERF_TYPE_SYNTH;
2297 attr.sample_type |= PERF_SAMPLE_RAW;
2298
2299 if (pt->synth_opts.ptwrites) {
2300 attr.config = PERF_SYNTH_INTEL_PTWRITE;
2301 err = intel_pt_synth_event(session, "ptwrite", &attr, id);
2302 if (err)
2303 return err;
2304 pt->sample_ptwrites = true;
2305 pt->ptwrites_sample_type = attr.sample_type;
2306 pt->ptwrites_id = id;
2307 intel_pt_set_event_name(evlist, id, "ptwrite");
2308 id += 1;
2309 }
2310
2311 if (pt->synth_opts.pwr_events) {
2312 pt->sample_pwr_events = true;
2313 pt->pwr_events_sample_type = attr.sample_type;
2314
2315 attr.config = PERF_SYNTH_INTEL_CBR;
2316 err = intel_pt_synth_event(session, "cbr", &attr, id);
2317 if (err)
2318 return err;
2319 pt->cbr_id = id;
2320 intel_pt_set_event_name(evlist, id, "cbr");
2321 id += 1;
2322 }
2323
2324 if (pt->synth_opts.pwr_events && (evsel->attr.config & 0x10)) {
2325 attr.config = PERF_SYNTH_INTEL_MWAIT;
2326 err = intel_pt_synth_event(session, "mwait", &attr, id);
2327 if (err)
2328 return err;
2329 pt->mwait_id = id;
2330 intel_pt_set_event_name(evlist, id, "mwait");
2331 id += 1;
2332
2333 attr.config = PERF_SYNTH_INTEL_PWRE;
2334 err = intel_pt_synth_event(session, "pwre", &attr, id);
2335 if (err)
2336 return err;
2337 pt->pwre_id = id;
2338 intel_pt_set_event_name(evlist, id, "pwre");
2339 id += 1;
2340
2341 attr.config = PERF_SYNTH_INTEL_EXSTOP;
2342 err = intel_pt_synth_event(session, "exstop", &attr, id);
2343 if (err)
2344 return err;
2345 pt->exstop_id = id;
2346 intel_pt_set_event_name(evlist, id, "exstop");
2347 id += 1;
2348
2349 attr.config = PERF_SYNTH_INTEL_PWRX;
2350 err = intel_pt_synth_event(session, "pwrx", &attr, id);
2351 if (err)
2352 return err;
2353 pt->pwrx_id = id;
2354 intel_pt_set_event_name(evlist, id, "pwrx");
2355 id += 1;
2356 }
2357
2358 pt->synth_needs_swap = evsel->needs_swap;
2359
2360 return 0;
2361}
2362
2363static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
2364{
2365 struct perf_evsel *evsel;
2366
2367 evlist__for_each_entry_reverse(evlist, evsel) {
2368 const char *name = perf_evsel__name(evsel);
2369
2370 if (!strcmp(name, "sched:sched_switch"))
2371 return evsel;
2372 }
2373
2374 return NULL;
2375}
2376
2377static bool intel_pt_find_switch(struct perf_evlist *evlist)
2378{
2379 struct perf_evsel *evsel;
2380
2381 evlist__for_each_entry(evlist, evsel) {
2382 if (evsel->attr.context_switch)
2383 return true;
2384 }
2385
2386 return false;
2387}
2388
2389static int intel_pt_perf_config(const char *var, const char *value, void *data)
2390{
2391 struct intel_pt *pt = data;
2392
2393 if (!strcmp(var, "intel-pt.mispred-all"))
2394 pt->mispred_all = perf_config_bool(var, value);
2395
2396 return 0;
2397}
2398
2399static const char * const intel_pt_info_fmts[] = {
2400 [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
2401 [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
2402 [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
2403 [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
2404 [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
2405 [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
2406 [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
2407 [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
2408 [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
2409 [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
2410 [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
2411 [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
2412 [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
2413 [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
2414 [INTEL_PT_MAX_NONTURBO_RATIO] = " Max non-turbo ratio %"PRIu64"\n",
2415 [INTEL_PT_FILTER_STR_LEN] = " Filter string len. %"PRIu64"\n",
2416};
2417
2418static void intel_pt_print_info(u64 *arr, int start, int finish)
2419{
2420 int i;
2421
2422 if (!dump_trace)
2423 return;
2424
2425 for (i = start; i <= finish; i++)
2426 fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
2427}
2428
2429static void intel_pt_print_info_str(const char *name, const char *str)
2430{
2431 if (!dump_trace)
2432 return;
2433
2434 fprintf(stdout, " %-20s%s\n", name, str ? str : "");
2435}
2436
2437static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
2438{
2439 return auxtrace_info->header.size >=
2440 sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
2441}
2442
2443int intel_pt_process_auxtrace_info(union perf_event *event,
2444 struct perf_session *session)
2445{
2446 struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
2447 size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
2448 struct intel_pt *pt;
2449 void *info_end;
2450 u64 *info;
2451 int err;
2452
2453 if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
2454 min_sz)
2455 return -EINVAL;
2456
2457 pt = zalloc(sizeof(struct intel_pt));
2458 if (!pt)
2459 return -ENOMEM;
2460
2461 addr_filters__init(&pt->filts);
2462
2463 err = perf_config(intel_pt_perf_config, pt);
2464 if (err)
2465 goto err_free;
2466
2467 err = auxtrace_queues__init(&pt->queues);
2468 if (err)
2469 goto err_free;
2470
2471 intel_pt_log_set_name(INTEL_PT_PMU_NAME);
2472
2473 pt->session = session;
2474 pt->machine = &session->machines.host; /* No kvm support */
2475 pt->auxtrace_type = auxtrace_info->type;
2476 pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
2477 pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
2478 pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
2479 pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
2480 pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
2481 pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
2482 pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
2483 pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
2484 pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
2485 pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
2486 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
2487 INTEL_PT_PER_CPU_MMAPS);
2488
2489 if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
2490 pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
2491 pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
2492 pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
2493 pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
2494 pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
2495 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
2496 INTEL_PT_CYC_BIT);
2497 }
2498
2499 if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
2500 pt->max_non_turbo_ratio =
2501 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
2502 intel_pt_print_info(&auxtrace_info->priv[0],
2503 INTEL_PT_MAX_NONTURBO_RATIO,
2504 INTEL_PT_MAX_NONTURBO_RATIO);
2505 }
2506
2507 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
2508 info_end = (void *)info + auxtrace_info->header.size;
2509
2510 if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
2511 size_t len;
2512
2513 len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
2514 intel_pt_print_info(&auxtrace_info->priv[0],
2515 INTEL_PT_FILTER_STR_LEN,
2516 INTEL_PT_FILTER_STR_LEN);
2517 if (len) {
2518 const char *filter = (const char *)info;
2519
2520 len = roundup(len + 1, 8);
2521 info += len >> 3;
2522 if ((void *)info > info_end) {
2523 pr_err("%s: bad filter string length\n", __func__);
2524 err = -EINVAL;
2525 goto err_free_queues;
2526 }
2527 pt->filter = memdup(filter, len);
2528 if (!pt->filter) {
2529 err = -ENOMEM;
2530 goto err_free_queues;
2531 }
2532 if (session->header.needs_swap)
2533 mem_bswap_64(pt->filter, len);
2534 if (pt->filter[len - 1]) {
2535 pr_err("%s: filter string not null terminated\n", __func__);
2536 err = -EINVAL;
2537 goto err_free_queues;
2538 }
2539 err = addr_filters__parse_bare_filter(&pt->filts,
2540 filter);
2541 if (err)
2542 goto err_free_queues;
2543 }
2544 intel_pt_print_info_str("Filter string", pt->filter);
2545 }
2546
2547 pt->timeless_decoding = intel_pt_timeless_decoding(pt);
2548 if (pt->timeless_decoding && !pt->tc.time_mult)
2549 pt->tc.time_mult = 1;
2550 pt->have_tsc = intel_pt_have_tsc(pt);
2551 pt->sampling_mode = false;
2552 pt->est_tsc = !pt->timeless_decoding;
2553
2554 pt->unknown_thread = thread__new(999999999, 999999999);
2555 if (!pt->unknown_thread) {
2556 err = -ENOMEM;
2557 goto err_free_queues;
2558 }
2559
2560 /*
2561 * Since this thread will not be kept in any rbtree not in a
2562 * list, initialize its list node so that at thread__put() the
2563 * current thread lifetime assuption is kept and we don't segfault
2564 * at list_del_init().
2565 */
2566 INIT_LIST_HEAD(&pt->unknown_thread->node);
2567
2568 err = thread__set_comm(pt->unknown_thread, "unknown", 0);
2569 if (err)
2570 goto err_delete_thread;
2571 if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
2572 err = -ENOMEM;
2573 goto err_delete_thread;
2574 }
2575
2576 pt->auxtrace.process_event = intel_pt_process_event;
2577 pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
2578 pt->auxtrace.flush_events = intel_pt_flush;
2579 pt->auxtrace.free_events = intel_pt_free_events;
2580 pt->auxtrace.free = intel_pt_free;
2581 session->auxtrace = &pt->auxtrace;
2582
2583 if (dump_trace)
2584 return 0;
2585
2586 if (pt->have_sched_switch == 1) {
2587 pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
2588 if (!pt->switch_evsel) {
2589 pr_err("%s: missing sched_switch event\n", __func__);
2590 err = -EINVAL;
2591 goto err_delete_thread;
2592 }
2593 } else if (pt->have_sched_switch == 2 &&
2594 !intel_pt_find_switch(session->evlist)) {
2595 pr_err("%s: missing context_switch attribute flag\n", __func__);
2596 err = -EINVAL;
2597 goto err_delete_thread;
2598 }
2599
2600 if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
2601 pt->synth_opts = *session->itrace_synth_opts;
2602 } else {
2603 itrace_synth_opts__set_default(&pt->synth_opts);
2604 if (use_browser != -1) {
2605 pt->synth_opts.branches = false;
2606 pt->synth_opts.callchain = true;
2607 }
2608 if (session->itrace_synth_opts)
2609 pt->synth_opts.thread_stack =
2610 session->itrace_synth_opts->thread_stack;
2611 }
2612
2613 if (pt->synth_opts.log)
2614 intel_pt_log_enable();
2615
2616 /* Maximum non-turbo ratio is TSC freq / 100 MHz */
2617 if (pt->tc.time_mult) {
2618 u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
2619
2620 if (!pt->max_non_turbo_ratio)
2621 pt->max_non_turbo_ratio =
2622 (tsc_freq + 50000000) / 100000000;
2623 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
2624 intel_pt_log("Maximum non-turbo ratio %u\n",
2625 pt->max_non_turbo_ratio);
2626 pt->cbr2khz = tsc_freq / pt->max_non_turbo_ratio / 1000;
2627 }
2628
2629 if (pt->synth_opts.calls)
2630 pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
2631 PERF_IP_FLAG_TRACE_END;
2632 if (pt->synth_opts.returns)
2633 pt->branches_filter |= PERF_IP_FLAG_RETURN |
2634 PERF_IP_FLAG_TRACE_BEGIN;
2635
2636 if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
2637 symbol_conf.use_callchain = true;
2638 if (callchain_register_param(&callchain_param) < 0) {
2639 symbol_conf.use_callchain = false;
2640 pt->synth_opts.callchain = false;
2641 }
2642 }
2643
2644 err = intel_pt_synth_events(pt, session);
2645 if (err)
2646 goto err_delete_thread;
2647
2648 err = auxtrace_queues__process_index(&pt->queues, session);
2649 if (err)
2650 goto err_delete_thread;
2651
2652 if (pt->queues.populated)
2653 pt->data_queued = true;
2654
2655 if (pt->timeless_decoding)
2656 pr_debug2("Intel PT decoding without timestamps\n");
2657
2658 return 0;
2659
2660err_delete_thread:
2661 thread__zput(pt->unknown_thread);
2662err_free_queues:
2663 intel_pt_log_disable();
2664 auxtrace_queues__free(&pt->queues);
2665 session->auxtrace = NULL;
2666err_free:
2667 addr_filters__exit(&pt->filts);
2668 zfree(&pt->filter);
2669 free(pt);
2670 return err;
2671}