| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame] | 1 | menuconfig MTD_ONENAND |
| 2 | tristate "OneNAND Device Support" |
| 3 | depends on MTD |
| 4 | depends on HAS_IOMEM |
| 5 | help |
| 6 | This enables support for accessing all type of OneNAND flash |
| 7 | devices. For further information see |
| 8 | <http://www.samsung.com/Products/Semiconductor/OneNAND/index.htm> |
| 9 | |
| 10 | if MTD_ONENAND |
| 11 | |
| 12 | config MTD_ONENAND_VERIFY_WRITE |
| 13 | bool "Verify OneNAND page writes" |
| 14 | help |
| 15 | This adds an extra check when data is written to the flash. The |
| 16 | OneNAND flash device internally checks only bits transitioning |
| 17 | from 1 to 0. There is a rare possibility that even though the |
| 18 | device thinks the write was successful, a bit could have been |
| 19 | flipped accidentally due to device wear or something else. |
| 20 | |
| 21 | config MTD_ONENAND_GENERIC |
| 22 | tristate "OneNAND Flash device via platform device driver" |
| 23 | help |
| 24 | Support for OneNAND flash via platform device driver. |
| 25 | |
| 26 | config MTD_ONENAND_OMAP2 |
| 27 | tristate "OneNAND on OMAP2/OMAP3 support" |
| 28 | depends on ARCH_OMAP2 || ARCH_OMAP3 |
| 29 | help |
| 30 | Support for a OneNAND flash device connected to an OMAP2/OMAP3 CPU |
| 31 | via the GPMC memory controller. |
| 32 | |
| 33 | config MTD_ONENAND_SAMSUNG |
| 34 | tristate "OneNAND on Samsung SOC controller support" |
| 35 | depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS4 |
| 36 | help |
| 37 | Support for a OneNAND flash device connected to an Samsung SOC. |
| 38 | S3C64XX uses command mapping method. |
| 39 | S5PC110/S5PC210 use generic OneNAND method. |
| 40 | |
| 41 | config MTD_ONENAND_OTP |
| 42 | bool "OneNAND OTP Support" |
| 43 | help |
| 44 | One Block of the NAND Flash Array memory is reserved as |
| 45 | a One-Time Programmable Block memory area. |
| 46 | Also, 1st Block of NAND Flash Array can be used as OTP. |
| 47 | |
| 48 | The OTP block can be read, programmed and locked using the same |
| 49 | operations as any other NAND Flash Array memory block. |
| 50 | OTP block cannot be erased. |
| 51 | |
| 52 | OTP block is fully-guaranteed to be a valid block. |
| 53 | |
| 54 | config MTD_ONENAND_2X_PROGRAM |
| 55 | bool "OneNAND 2X program support" |
| 56 | help |
| 57 | The 2X Program is an extension of Program Operation. |
| 58 | Since the device is equipped with two DataRAMs, and two-plane NAND |
| 59 | Flash memory array, these two component enables simultaneous program |
| 60 | of 4KiB. Plane1 has only even blocks such as block0, block2, block4 |
| 61 | while Plane2 has only odd blocks such as block1, block3, block5. |
| 62 | So MTD regards it as 4KiB page size and 256KiB block size |
| 63 | |
| 64 | Now the following chips support it. (KFXXX16Q2M) |
| 65 | Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M, |
| 66 | Mux: KFM2G16Q2M, KFN4G16Q2M, |
| 67 | |
| 68 | And more recent chips |
| 69 | |
| 70 | endif # MTD_ONENAND |