| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame] | 1 | /* |
| 2 | * r8a7779 processor support |
| 3 | * |
| 4 | * Copyright (C) 2011, 2013 Renesas Solutions Corp. |
| 5 | * Copyright (C) 2011 Magnus Damm |
| 6 | * Copyright (C) 2013 Cogent Embedded, Inc. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/irq.h> |
| 19 | #include <linux/irqchip.h> |
| 20 | #include <linux/irqchip/arm-gic.h> |
| 21 | |
| 22 | #include <asm/mach/arch.h> |
| 23 | #include <asm/mach/map.h> |
| 24 | |
| 25 | #include "common.h" |
| 26 | #include "r8a7779.h" |
| 27 | |
| 28 | static struct map_desc r8a7779_io_desc[] __initdata = { |
| 29 | /* 2M identity mapping for 0xf0000000 (MPCORE) */ |
| 30 | { |
| 31 | .virtual = 0xf0000000, |
| 32 | .pfn = __phys_to_pfn(0xf0000000), |
| 33 | .length = SZ_2M, |
| 34 | .type = MT_DEVICE_NONSHARED |
| 35 | }, |
| 36 | /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */ |
| 37 | { |
| 38 | .virtual = 0xfe000000, |
| 39 | .pfn = __phys_to_pfn(0xfe000000), |
| 40 | .length = SZ_16M, |
| 41 | .type = MT_DEVICE_NONSHARED |
| 42 | }, |
| 43 | }; |
| 44 | |
| 45 | static void __init r8a7779_map_io(void) |
| 46 | { |
| 47 | debug_ll_io_init(); |
| 48 | iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); |
| 49 | } |
| 50 | |
| 51 | /* IRQ */ |
| 52 | #define INT2SMSKCR0 IOMEM(0xfe7822a0) |
| 53 | #define INT2SMSKCR1 IOMEM(0xfe7822a4) |
| 54 | #define INT2SMSKCR2 IOMEM(0xfe7822a8) |
| 55 | #define INT2SMSKCR3 IOMEM(0xfe7822ac) |
| 56 | #define INT2SMSKCR4 IOMEM(0xfe7822b0) |
| 57 | |
| 58 | #define INT2NTSR0 IOMEM(0xfe700060) |
| 59 | #define INT2NTSR1 IOMEM(0xfe700064) |
| 60 | |
| 61 | static void __init r8a7779_init_irq_dt(void) |
| 62 | { |
| 63 | irqchip_init(); |
| 64 | |
| 65 | /* route all interrupts to ARM */ |
| 66 | __raw_writel(0xffffffff, INT2NTSR0); |
| 67 | __raw_writel(0x3fffffff, INT2NTSR1); |
| 68 | |
| 69 | /* unmask all known interrupts in INTCS2 */ |
| 70 | __raw_writel(0xfffffff0, INT2SMSKCR0); |
| 71 | __raw_writel(0xfff7ffff, INT2SMSKCR1); |
| 72 | __raw_writel(0xfffbffdf, INT2SMSKCR2); |
| 73 | __raw_writel(0xbffffffc, INT2SMSKCR3); |
| 74 | __raw_writel(0x003fee3f, INT2SMSKCR4); |
| 75 | } |
| 76 | |
| 77 | static const char *const r8a7779_compat_dt[] __initconst = { |
| 78 | "renesas,r8a7779", |
| 79 | NULL, |
| 80 | }; |
| 81 | |
| 82 | DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") |
| 83 | .smp = smp_ops(r8a7779_smp_ops), |
| 84 | .map_io = r8a7779_map_io, |
| 85 | .init_early = shmobile_init_delay, |
| 86 | .init_irq = r8a7779_init_irq_dt, |
| 87 | .init_late = shmobile_init_late, |
| 88 | .dt_compat = r8a7779_compat_dt, |
| 89 | MACHINE_END |