| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018 MediaTek Inc. |
| 3 | * Author: Weiyi Lu <weiyi.lu@mediatek.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/clk-provider.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | |
| 18 | #include "clk-mtk.h" |
| 19 | #include "clk-gate.h" |
| 20 | |
| 21 | #include <dt-bindings/clock/mt8183-clk.h> |
| 22 | |
| 23 | static const struct mtk_gate_regs cam_cg_regs = { |
| 24 | .set_ofs = 0x4, |
| 25 | .clr_ofs = 0x8, |
| 26 | .sta_ofs = 0x0, |
| 27 | }; |
| 28 | |
| 29 | #define GATE_CAM(_id, _name, _parent, _shift) { \ |
| 30 | .id = _id, \ |
| 31 | .name = _name, \ |
| 32 | .parent_name = _parent, \ |
| 33 | .regs = &cam_cg_regs, \ |
| 34 | .shift = _shift, \ |
| 35 | .ops = &mtk_clk_gate_ops_setclr, \ |
| 36 | } |
| 37 | |
| 38 | static const struct mtk_gate cam_clks[] = { |
| 39 | GATE_CAM(CLK_CAM_LARB6, "cam_larb6", "cam_sel", 0), |
| 40 | GATE_CAM(CLK_CAM_DFP_VAD, "cam_dfp_vad", "cam_sel", 1), |
| 41 | GATE_CAM(CLK_CAM_LARB3, "cam_larb3", "cam_sel", 2), |
| 42 | GATE_CAM(CLK_CAM_CAM, "cam_cam", "cam_sel", 6), |
| 43 | GATE_CAM(CLK_CAM_CAMTG, "cam_camtg", "cam_sel", 7), |
| 44 | GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "cam_sel", 8), |
| 45 | GATE_CAM(CLK_CAM_CAMSV0, "cam_camsv0", "cam_sel", 9), |
| 46 | GATE_CAM(CLK_CAM_CAMSV1, "cam_camsv1", "cam_sel", 10), |
| 47 | GATE_CAM(CLK_CAM_CAMSV2, "cam_camsv2", "cam_sel", 11), |
| 48 | GATE_CAM(CLK_CAM_CCU, "cam_ccu", "cam_sel", 12), |
| 49 | }; |
| 50 | |
| 51 | static int clk_mt8183_cam_probe(struct platform_device *pdev) |
| 52 | { |
| 53 | struct clk_onecell_data *clk_data; |
| 54 | int r; |
| 55 | struct device_node *node = pdev->dev.of_node; |
| 56 | |
| 57 | clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK); |
| 58 | |
| 59 | mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), |
| 60 | clk_data); |
| 61 | |
| 62 | r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
| 63 | |
| 64 | if (r) |
| 65 | pr_err("%s(): could not register clock provider: %d\n", |
| 66 | __func__, r); |
| 67 | |
| 68 | return r; |
| 69 | } |
| 70 | |
| 71 | static const struct of_device_id of_match_clk_mt8183_cam[] = { |
| 72 | { .compatible = "mediatek,mt8183-camsys", }, |
| 73 | {} |
| 74 | }; |
| 75 | |
| 76 | static struct platform_driver clk_mt8183_cam_drv = { |
| 77 | .probe = clk_mt8183_cam_probe, |
| 78 | .driver = { |
| 79 | .name = "clk-mt8183-cam", |
| 80 | .of_match_table = of_match_clk_mt8183_cam, |
| 81 | }, |
| 82 | }; |
| 83 | |
| 84 | builtin_platform_driver(clk_mt8183_cam_drv); |