| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2016 MediaTek Inc. |
| 3 | * Author: Honghui Zhang <honghui.zhang@mediatek.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #ifndef _MTK_IOMMU_H_ |
| 16 | #define _MTK_IOMMU_H_ |
| 17 | |
| 18 | #include <linux/clk.h> |
| 19 | #include <linux/component.h> |
| 20 | #include <linux/device.h> |
| 21 | #include <linux/io.h> |
| 22 | #include <linux/iommu.h> |
| 23 | #include <linux/list.h> |
| 24 | #include <linux/spinlock.h> |
| 25 | #include <soc/mediatek/smi.h> |
| 26 | |
| 27 | #include "io-pgtable.h" |
| 28 | |
| 29 | struct mtk_iommu_suspend_reg { |
| 30 | u32 standard_axi_mode; |
| 31 | u32 dcm_dis; |
| 32 | u32 ctrl_reg; |
| 33 | u32 int_control0; |
| 34 | u32 int_main_control; |
| 35 | u32 ivrp_paddr; |
| 36 | u32 vld_pa_range; |
| 37 | }; |
| 38 | |
| 39 | enum mtk_iommu_plat { |
| 40 | M4U_MT2701, |
| 41 | M4U_MT2712, |
| 42 | M4U_MT8173, |
| 43 | M4U_MT8183, |
| 44 | }; |
| 45 | |
| 46 | struct mtk_iommu_plat_data { |
| 47 | enum mtk_iommu_plat m4u_plat; |
| 48 | bool has_4gb_mode; |
| 49 | |
| 50 | /* The larb-id may be remapped in the smi-common. */ |
| 51 | bool larbid_remap_enable; |
| 52 | unsigned int larbid_in_common[MTK_LARB_NR_MAX]; |
| 53 | }; |
| 54 | |
| 55 | struct mtk_iommu_domain; |
| 56 | |
| 57 | struct mtk_iommu_data { |
| 58 | void __iomem *base; |
| 59 | int irq; |
| 60 | struct device *dev; |
| 61 | struct clk *bclk; |
| 62 | phys_addr_t protect_base; /* protect memory base */ |
| 63 | struct mtk_iommu_suspend_reg reg; |
| 64 | struct mtk_iommu_domain *m4u_dom; |
| 65 | struct iommu_group *m4u_group; |
| 66 | struct mtk_smi_iommu smi_imu; /* SMI larb iommu info */ |
| 67 | bool enable_4GB; /* Dram is over 4gb */ |
| 68 | bool tlb_flush_active; |
| 69 | |
| 70 | struct iommu_device iommu; |
| 71 | const struct mtk_iommu_plat_data *plat_data; |
| 72 | |
| 73 | struct list_head list; |
| 74 | }; |
| 75 | |
| 76 | static inline int compare_of(struct device *dev, void *data) |
| 77 | { |
| 78 | return dev->of_node == data; |
| 79 | } |
| 80 | |
| 81 | static inline void release_of(struct device *dev, void *data) |
| 82 | { |
| 83 | of_node_put(data); |
| 84 | } |
| 85 | |
| 86 | static inline int mtk_iommu_bind(struct device *dev) |
| 87 | { |
| 88 | struct mtk_iommu_data *data = dev_get_drvdata(dev); |
| 89 | |
| 90 | return component_bind_all(dev, &data->smi_imu); |
| 91 | } |
| 92 | |
| 93 | static inline void mtk_iommu_unbind(struct device *dev) |
| 94 | { |
| 95 | struct mtk_iommu_data *data = dev_get_drvdata(dev); |
| 96 | |
| 97 | component_unbind_all(dev, &data->smi_imu); |
| 98 | } |
| 99 | |
| 100 | #endif |