| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame] | 1 | /* sbni.h:  definitions for a Granch SBNI12 driver, version 5.0.0 | 
|  | 2 | * Written 2001 Denis I.Timofeev (timofeev@granch.ru) | 
|  | 3 | * This file is distributed under the GNU GPL | 
|  | 4 | */ | 
|  | 5 |  | 
|  | 6 | #ifndef SBNI_H | 
|  | 7 | #define SBNI_H | 
|  | 8 |  | 
|  | 9 | #ifdef SBNI_DEBUG | 
|  | 10 | #define DP( A ) A | 
|  | 11 | #else | 
|  | 12 | #define DP( A ) | 
|  | 13 | #endif | 
|  | 14 |  | 
|  | 15 |  | 
|  | 16 | /* We don't have official vendor id yet... */ | 
|  | 17 | #define SBNI_PCI_VENDOR 	0x55 | 
|  | 18 | #define SBNI_PCI_DEVICE 	0x9f | 
|  | 19 |  | 
|  | 20 | #define ISA_MODE 0x00 | 
|  | 21 | #define PCI_MODE 0x01 | 
|  | 22 |  | 
|  | 23 | #define	SBNI_IO_EXTENT	4 | 
|  | 24 |  | 
|  | 25 | enum sbni_reg { | 
|  | 26 | CSR0 = 0, | 
|  | 27 | CSR1 = 1, | 
|  | 28 | DAT  = 2 | 
|  | 29 | }; | 
|  | 30 |  | 
|  | 31 | /* CSR0 mapping */ | 
|  | 32 | enum { | 
|  | 33 | BU_EMP = 0x02, | 
|  | 34 | RC_CHK = 0x04, | 
|  | 35 | CT_ZER = 0x08, | 
|  | 36 | TR_REQ = 0x10, | 
|  | 37 | TR_RDY = 0x20, | 
|  | 38 | EN_INT = 0x40, | 
|  | 39 | RC_RDY = 0x80 | 
|  | 40 | }; | 
|  | 41 |  | 
|  | 42 |  | 
|  | 43 | /* CSR1 mapping */ | 
|  | 44 | #define PR_RES 0x80 | 
|  | 45 |  | 
|  | 46 | struct sbni_csr1 { | 
|  | 47 | #ifdef __LITTLE_ENDIAN_BITFIELD | 
|  | 48 | u8 rxl	: 5; | 
|  | 49 | u8 rate	: 2; | 
|  | 50 | u8 	: 1; | 
|  | 51 | #else | 
|  | 52 | u8 	: 1; | 
|  | 53 | u8 rate	: 2; | 
|  | 54 | u8 rxl	: 5; | 
|  | 55 | #endif | 
|  | 56 | }; | 
|  | 57 |  | 
|  | 58 | /* fields in frame header */ | 
|  | 59 | #define FRAME_ACK_MASK  (unsigned short)0x7000 | 
|  | 60 | #define FRAME_LEN_MASK  (unsigned short)0x03FF | 
|  | 61 | #define FRAME_FIRST     (unsigned short)0x8000 | 
|  | 62 | #define FRAME_RETRY     (unsigned short)0x0800 | 
|  | 63 |  | 
|  | 64 | #define FRAME_SENT_BAD  (unsigned short)0x4000 | 
|  | 65 | #define FRAME_SENT_OK   (unsigned short)0x3000 | 
|  | 66 |  | 
|  | 67 |  | 
|  | 68 | /* state flags */ | 
|  | 69 | enum { | 
|  | 70 | FL_WAIT_ACK    = 0x01, | 
|  | 71 | FL_NEED_RESEND = 0x02, | 
|  | 72 | FL_PREV_OK     = 0x04, | 
|  | 73 | FL_SLOW_MODE   = 0x08, | 
|  | 74 | FL_SECONDARY   = 0x10, | 
|  | 75 | #ifdef CONFIG_SBNI_MULTILINE | 
|  | 76 | FL_SLAVE       = 0x20, | 
|  | 77 | #endif | 
|  | 78 | FL_LINE_DOWN   = 0x40 | 
|  | 79 | }; | 
|  | 80 |  | 
|  | 81 |  | 
|  | 82 | enum { | 
|  | 83 | DEFAULT_IOBASEADDR = 0x210, | 
|  | 84 | DEFAULT_INTERRUPTNUMBER = 5, | 
|  | 85 | DEFAULT_RATE = 0, | 
|  | 86 | DEFAULT_FRAME_LEN = 1012 | 
|  | 87 | }; | 
|  | 88 |  | 
|  | 89 | #define DEF_RXL_DELTA	-1 | 
|  | 90 | #define DEF_RXL		0xf | 
|  | 91 |  | 
|  | 92 | #define SBNI_SIG 0x5a | 
|  | 93 |  | 
|  | 94 | #define	SBNI_MIN_LEN	60	/* Shortest Ethernet frame without FCS */ | 
|  | 95 | #define SBNI_MAX_FRAME	1023 | 
|  | 96 | #define ETHER_MAX_LEN	1518 | 
|  | 97 |  | 
|  | 98 | #define SBNI_TIMEOUT	(HZ/10) | 
|  | 99 |  | 
|  | 100 | #define TR_ERROR_COUNT	32 | 
|  | 101 | #define CHANGE_LEVEL_START_TICKS 4 | 
|  | 102 |  | 
|  | 103 | #define SBNI_MAX_NUM_CARDS	16 | 
|  | 104 |  | 
|  | 105 | /* internal SBNI-specific statistics */ | 
|  | 106 | struct sbni_in_stats { | 
|  | 107 | u32	all_rx_number; | 
|  | 108 | u32	bad_rx_number; | 
|  | 109 | u32	timeout_number; | 
|  | 110 | u32	all_tx_number; | 
|  | 111 | u32	resend_tx_number; | 
|  | 112 | }; | 
|  | 113 |  | 
|  | 114 | /* SBNI ioctl params */ | 
|  | 115 | #define SIOCDEVGETINSTATS 	SIOCDEVPRIVATE | 
|  | 116 | #define SIOCDEVRESINSTATS 	SIOCDEVPRIVATE+1 | 
|  | 117 | #define SIOCDEVGHWSTATE   	SIOCDEVPRIVATE+2 | 
|  | 118 | #define SIOCDEVSHWSTATE   	SIOCDEVPRIVATE+3 | 
|  | 119 | #define SIOCDEVENSLAVE  	SIOCDEVPRIVATE+4 | 
|  | 120 | #define SIOCDEVEMANSIPATE  	SIOCDEVPRIVATE+5 | 
|  | 121 |  | 
|  | 122 |  | 
|  | 123 | /* data packet for SIOCDEVGHWSTATE/SIOCDEVSHWSTATE ioctl requests */ | 
|  | 124 | struct sbni_flags { | 
|  | 125 | u32	rxl		: 4; | 
|  | 126 | u32	rate		: 2; | 
|  | 127 | u32	fixed_rxl	: 1; | 
|  | 128 | u32	slow_mode	: 1; | 
|  | 129 | u32	mac_addr	: 24; | 
|  | 130 | }; | 
|  | 131 |  | 
|  | 132 | /* | 
|  | 133 | * CRC-32 stuff | 
|  | 134 | */ | 
|  | 135 | #define CRC32(c,crc) (crc32tab[((size_t)(crc) ^ (c)) & 0xff] ^ (((crc) >> 8) & 0x00FFFFFF)) | 
|  | 136 | /* CRC generator 0xEDB88320 */ | 
|  | 137 | /* CRC remainder 0x2144DF1C */ | 
|  | 138 | /* CRC initial value 0x00000000 */ | 
|  | 139 | #define CRC32_REMAINDER 0x2144DF1C | 
|  | 140 | #define CRC32_INITIAL 0x00000000 | 
|  | 141 |  | 
|  | 142 | #ifndef __initdata | 
|  | 143 | #define __initdata | 
|  | 144 | #endif | 
|  | 145 |  | 
|  | 146 | #endif | 
|  | 147 |  |