rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Generic PCI host driver common code |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License |
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 15 | * |
| 16 | * Copyright (C) 2014 ARM Limited |
| 17 | * |
| 18 | * Author: Will Deacon <will.deacon@arm.com> |
| 19 | */ |
| 20 | |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/of_address.h> |
| 23 | #include <linux/of_pci.h> |
| 24 | #include <linux/pci-ecam.h> |
| 25 | #include <linux/platform_device.h> |
| 26 | |
| 27 | static int gen_pci_parse_request_of_pci_ranges(struct device *dev, |
| 28 | struct list_head *resources, struct resource **bus_range) |
| 29 | { |
| 30 | int err, res_valid = 0; |
| 31 | struct device_node *np = dev->of_node; |
| 32 | resource_size_t iobase; |
| 33 | struct resource_entry *win, *tmp; |
| 34 | |
| 35 | err = of_pci_get_host_bridge_resources(np, 0, 0xff, resources, &iobase); |
| 36 | if (err) |
| 37 | return err; |
| 38 | |
| 39 | err = devm_request_pci_bus_resources(dev, resources); |
| 40 | if (err) |
| 41 | return err; |
| 42 | |
| 43 | resource_list_for_each_entry_safe(win, tmp, resources) { |
| 44 | struct resource *res = win->res; |
| 45 | |
| 46 | switch (resource_type(res)) { |
| 47 | case IORESOURCE_IO: |
| 48 | err = devm_pci_remap_iospace(dev, res, iobase); |
| 49 | if (err) { |
| 50 | dev_warn(dev, "error %d: failed to map resource %pR\n", |
| 51 | err, res); |
| 52 | resource_list_destroy_entry(win); |
| 53 | } |
| 54 | break; |
| 55 | case IORESOURCE_MEM: |
| 56 | res_valid |= !(res->flags & IORESOURCE_PREFETCH); |
| 57 | break; |
| 58 | case IORESOURCE_BUS: |
| 59 | *bus_range = res; |
| 60 | break; |
| 61 | } |
| 62 | } |
| 63 | |
| 64 | if (res_valid) |
| 65 | return 0; |
| 66 | |
| 67 | dev_err(dev, "non-prefetchable memory resource required\n"); |
| 68 | return -EINVAL; |
| 69 | } |
| 70 | |
| 71 | static void gen_pci_unmap_cfg(void *ptr) |
| 72 | { |
| 73 | pci_ecam_free((struct pci_config_window *)ptr); |
| 74 | } |
| 75 | |
| 76 | static struct pci_config_window *gen_pci_init(struct device *dev, |
| 77 | struct list_head *resources, struct pci_ecam_ops *ops) |
| 78 | { |
| 79 | int err; |
| 80 | struct resource cfgres; |
| 81 | struct resource *bus_range = NULL; |
| 82 | struct pci_config_window *cfg; |
| 83 | |
| 84 | /* Parse our PCI ranges and request their resources */ |
| 85 | err = gen_pci_parse_request_of_pci_ranges(dev, resources, &bus_range); |
| 86 | if (err) |
| 87 | goto err_out; |
| 88 | |
| 89 | err = of_address_to_resource(dev->of_node, 0, &cfgres); |
| 90 | if (err) { |
| 91 | dev_err(dev, "missing \"reg\" property\n"); |
| 92 | goto err_out; |
| 93 | } |
| 94 | |
| 95 | cfg = pci_ecam_create(dev, &cfgres, bus_range, ops); |
| 96 | if (IS_ERR(cfg)) { |
| 97 | err = PTR_ERR(cfg); |
| 98 | goto err_out; |
| 99 | } |
| 100 | |
| 101 | err = devm_add_action(dev, gen_pci_unmap_cfg, cfg); |
| 102 | if (err) { |
| 103 | gen_pci_unmap_cfg(cfg); |
| 104 | goto err_out; |
| 105 | } |
| 106 | return cfg; |
| 107 | |
| 108 | err_out: |
| 109 | pci_free_resource_list(resources); |
| 110 | return ERR_PTR(err); |
| 111 | } |
| 112 | |
| 113 | int pci_host_common_probe(struct platform_device *pdev, |
| 114 | struct pci_ecam_ops *ops) |
| 115 | { |
| 116 | const char *type; |
| 117 | struct device *dev = &pdev->dev; |
| 118 | struct device_node *np = dev->of_node; |
| 119 | struct pci_bus *bus, *child; |
| 120 | struct pci_host_bridge *bridge; |
| 121 | struct pci_config_window *cfg; |
| 122 | struct list_head resources; |
| 123 | int ret; |
| 124 | |
| 125 | bridge = devm_pci_alloc_host_bridge(dev, 0); |
| 126 | if (!bridge) |
| 127 | return -ENOMEM; |
| 128 | |
| 129 | type = of_get_property(np, "device_type", NULL); |
| 130 | if (!type || strcmp(type, "pci")) { |
| 131 | dev_err(dev, "invalid \"device_type\" %s\n", type); |
| 132 | return -EINVAL; |
| 133 | } |
| 134 | |
| 135 | of_pci_check_probe_only(); |
| 136 | |
| 137 | /* Parse and map our Configuration Space windows */ |
| 138 | INIT_LIST_HEAD(&resources); |
| 139 | cfg = gen_pci_init(dev, &resources, ops); |
| 140 | if (IS_ERR(cfg)) |
| 141 | return PTR_ERR(cfg); |
| 142 | |
| 143 | /* Do not reassign resources if probe only */ |
| 144 | if (!pci_has_flag(PCI_PROBE_ONLY)) |
| 145 | pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS); |
| 146 | |
| 147 | list_splice_init(&resources, &bridge->windows); |
| 148 | bridge->dev.parent = dev; |
| 149 | bridge->sysdata = cfg; |
| 150 | bridge->busnr = cfg->busr.start; |
| 151 | bridge->ops = &ops->pci_ops; |
| 152 | bridge->map_irq = of_irq_parse_and_map_pci; |
| 153 | bridge->swizzle_irq = pci_common_swizzle; |
| 154 | |
| 155 | ret = pci_scan_root_bus_bridge(bridge); |
| 156 | if (ret < 0) { |
| 157 | dev_err(dev, "Scanning root bridge failed"); |
| 158 | return ret; |
| 159 | } |
| 160 | |
| 161 | bus = bridge->bus; |
| 162 | |
| 163 | /* |
| 164 | * We insert PCI resources into the iomem_resource and |
| 165 | * ioport_resource trees in either pci_bus_claim_resources() |
| 166 | * or pci_bus_assign_resources(). |
| 167 | */ |
| 168 | if (pci_has_flag(PCI_PROBE_ONLY)) { |
| 169 | pci_bus_claim_resources(bus); |
| 170 | } else { |
| 171 | pci_bus_size_bridges(bus); |
| 172 | pci_bus_assign_resources(bus); |
| 173 | |
| 174 | list_for_each_entry(child, &bus->children, node) |
| 175 | pcie_bus_configure_settings(child); |
| 176 | } |
| 177 | |
| 178 | pci_bus_add_devices(bus); |
| 179 | return 0; |
| 180 | } |