blob: 456ba3c8214f119bf77b4787e6820eb71b2da348 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __PINCTRL_MTK_COMMON_H
16#define __PINCTRL_MTK_COMMON_H
17
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/regmap.h>
20#include <linux/pinctrl/pinconf-generic.h>
21
22#define NO_EINT_SUPPORT 255
23#define MT_EDGE_SENSITIVE 0
24#define MT_LEVEL_SENSITIVE 1
25#define EINT_DBNC_SET_DBNC_BITS 4
26#define EINT_DBNC_RST_BIT (0x1 << 1)
27#define EINT_DBNC_SET_EN (0x1 << 0)
28#define MAX_IP_BASE 10
29#define MTK_PINCTRL_NOT_SUPPORT (0xffff)
30
31struct mtk_desc_function {
32 const char *name;
33 unsigned char muxval;
34};
35
36struct mtk_desc_eint {
37 unsigned char eintmux;
38 unsigned char eintnum;
39};
40
41struct mtk_desc_pin {
42 struct pinctrl_pin_desc pin;
43 const struct mtk_desc_eint eint;
44 const struct mtk_desc_function *functions;
45};
46
47#define MTK_PIN(_pin, _pad, _chip, _eint, ...) \
48 { \
49 .pin = _pin, \
50 .eint = _eint, \
51 .functions = (struct mtk_desc_function[]){ \
52 __VA_ARGS__, { } }, \
53 }
54
55#define MTK_EINT_FUNCTION(_eintmux, _eintnum) \
56 { \
57 .eintmux = _eintmux, \
58 .eintnum = _eintnum, \
59 }
60
61#define MTK_FUNCTION(_val, _name) \
62 { \
63 .muxval = _val, \
64 .name = _name, \
65 }
66
67#define SET_ADDR(x, y) (x + (y->devdata->port_align))
68#define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1))
69
70struct mtk_pinctrl_group {
71 const char *name;
72 unsigned long config;
73 unsigned pin;
74};
75
76/**
77 * struct mtk_drv_group_desc - Provide driving group data.
78 * @max_drv: The maximum current of this group.
79 * @min_drv: The minimum current of this group.
80 * @low_bit: The lowest bit of this group.
81 * @high_bit: The highest bit of this group.
82 * @step: The step current of this group.
83 */
84struct mtk_drv_group_desc {
85 unsigned char min_drv;
86 unsigned char max_drv;
87 unsigned char low_bit;
88 unsigned char high_bit;
89 unsigned char step;
90};
91
92#define MTK_DRV_GRP(_min, _max, _low, _high, _step) \
93 { \
94 .min_drv = _min, \
95 .max_drv = _max, \
96 .low_bit = _low, \
97 .high_bit = _high, \
98 .step = _step, \
99 }
100
101/**
102 * struct mtk_pin_drv_grp - Provide each pin driving info.
103 * @pin: The pin number.
104 * @offset: The offset of driving register for this pin.
105 * @bit: The bit of driving register for this pin.
106 * @grp: The group for this pin belongs to.
107 */
108struct mtk_pin_drv_grp {
109 unsigned short pin;
110 unsigned short offset;
111 unsigned char bit;
112 unsigned char grp;
113};
114
115#define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \
116 { \
117 .pin = _pin, \
118 .offset = _offset, \
119 .bit = _bit, \
120 .grp = _grp, \
121 }
122
123/**
124 * struct mtk_pin_spec_pupd_set_samereg
125 * - For special pins' pull up/down setting which resides in same register
126 * @pin: The pin number.
127 * @offset: The offset of special pull up/down setting register.
128 * @pupd_bit: The pull up/down bit in this register.
129 * @r0_bit: The r0 bit of pull resistor.
130 * @r1_bit: The r1 bit of pull resistor.
131 */
132struct mtk_pin_spec_pupd_set_samereg {
133 unsigned short pin;
134 unsigned short offset;
135 unsigned char pupd_bit;
136 unsigned char r1_bit;
137 unsigned char r0_bit;
138 unsigned char ip_num;
139};
140
141#define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0, _ip_num) \
142 { \
143 .pin = _pin, \
144 .offset = _offset, \
145 .pupd_bit = _pupd, \
146 .r1_bit = _r1, \
147 .r0_bit = _r0, \
148 .ip_num = _ip_num,\
149 }
150
151/**
152 * struct mtk_pin_ies_set - For special pins' ies and smt setting.
153 * @start: The start pin number of those special pins.
154 * @end: The end pin number of those special pins.
155 * @offset: The offset of special setting register.
156 * @bit: The bit of special setting register.
157 */
158struct mtk_pin_ies_smt_set {
159 unsigned short start;
160 unsigned short end;
161 unsigned short offset;
162 unsigned char bit;
163};
164
165#define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \
166 { \
167 .start = _start, \
168 .end = _end, \
169 .bit = _bit, \
170 .offset = _offset, \
171 }
172
173struct mtk_eint_offsets {
174 const char *name;
175 unsigned int stat;
176 unsigned int ack;
177 unsigned int mask;
178 unsigned int mask_set;
179 unsigned int mask_clr;
180 unsigned int sens;
181 unsigned int sens_set;
182 unsigned int sens_clr;
183 unsigned int soft;
184 unsigned int soft_set;
185 unsigned int soft_clr;
186 unsigned int pol;
187 unsigned int pol_set;
188 unsigned int pol_clr;
189 unsigned int dom_en;
190 unsigned int dbnc_ctrl;
191 unsigned int dbnc_set;
192 unsigned int dbnc_clr;
193 u8 port_mask;
194 u8 ports;
195};
196
197/**
198 * struct mt_pin_info - For all pins' setting
199 * @pin: The pin number
200 * @offset: The address offset of pin setting register
201 * @bit: The bit shift at setting register
202 * @width: The bit width at setting register
203 * @ip_num: The IOConfiguration base index
204 */
205struct mtk_pin_info {
206 unsigned int pin;
207 unsigned int offset;
208 unsigned char bit;
209 unsigned char width;
210 unsigned char ip_num;
211};
212
213#define MTK_PIN_INFO(_pin, _offset, _bit, _width, _ip_num) \
214 { \
215 .pin = _pin, \
216 .offset = _offset, \
217 .bit = _bit, \
218 .width = _width, \
219 .ip_num = _ip_num,\
220 }
221
222struct mtk_pinctrl {
223 struct regmap *regmap1;
224 struct regmap *regmap2;
225 struct regmap *regmap[MAX_IP_BASE];
226 struct pinctrl_desc pctl_desc;
227 struct device *dev;
228 struct gpio_chip *chip;
229 struct mtk_pinctrl_group *groups;
230 unsigned int ngroups;
231 const char **grp_names;
232 struct pinctrl_dev *pctl_dev;
233 const struct mtk_pinctrl_devdata *devdata;
234 void __iomem *eint_reg_base;
235 struct irq_domain *domain;
236 int *eint_dual_edges;
237 u32 *wake_mask;
238 u32 *cur_mask;
239};
240
241/**
242 * struct mtk_pinctrl_devdata - Provide HW GPIO related data.
243 * @pins: An array describing all pins the pin controller affects.
244 * @npins: The number of entries in @pins.
245 *
246 * @grp_desc: The driving group info.
247 * @pin_drv_grp: The driving group for all pins.
248 * @spec_pull_set: Each SoC may have special pins for pull up/down setting,
249 * these pins' pull setting are very different, they have separate pull
250 * up/down bit, R0 and R1 resistor bit, so they need special pull setting.
251 * If special setting is success, this should return 0, otherwise it should
252 * return non-zero value.
253 * @spec_ies_smt_set: Some pins are irregular, their input enable and smt
254 * control register are discontinuous, but they are mapping together. That
255 * means when user set smt, input enable is set at the same time. So they
256 * also need special control. If special control is success, this should
257 * return 0, otherwise return non-zero value.
258 * @spec_pinmux_set: In some cases, there are two pinmux functions share
259 * the same value in the same segment of pinmux control register. If user
260 * want to use one of the two functions, they need an extra bit setting to
261 * select the right one.
262 * @spec_dir_set: In very few SoCs, direction control registers are not
263 * arranged continuously, they may be cut to parts. So they need special
264 * dir setting.
265
266 * @dir_offset: The direction register offset.
267 * @pullen_offset: The pull-up/pull-down enable register offset.
268 * @pinmux_offset: The pinmux register offset.
269 *
270 * @type1_start: Some chips have two base addresses for pull select register,
271 * that means some pins use the first address and others use the second. This
272 * member record the start of pin number to use the second address.
273 * @type1_end: The end of pin number to use the second address.
274 *
275 * @port_shf: The shift between two registers.
276 * @port_mask: The mask of register.
277 * @port_align: Provide clear register and set register step.
278 */
279struct mtk_pinctrl_devdata {
280 const struct mtk_desc_pin *pins;
281 unsigned int npins;
282 const struct mtk_drv_group_desc *grp_desc;
283 unsigned int n_grp_cls;
284 const struct mtk_pin_drv_grp *pin_drv_grp;
285 unsigned int n_pin_drv_grps;
286 const struct mtk_pin_info *pin_drv_grps;
287 unsigned int n_pin_drv;
288 const struct mtk_pin_info *pin_mode_grps;
289 unsigned int n_pin_mode;
290 const struct mtk_pin_info *pin_ies_grps;
291 unsigned int n_pin_ies;
292 const struct mtk_pin_info *pin_smt_grps;
293 unsigned int n_pin_smt;
294 const struct mtk_pin_info *pin_dout_grps;
295 unsigned int n_pin_dout;
296 const struct mtk_pin_info *pin_din_grps;
297 unsigned int n_pin_din;
298 const struct mtk_pin_info *pin_dir_grps;
299 unsigned int n_pin_dir;
300 const struct mtk_pin_info *pin_pullen_grps;
301 unsigned int n_pin_pullen;
302 const struct mtk_pin_info *pin_pullsel_grps;
303 unsigned int n_pin_pullsel;
304 const struct mtk_pin_info *pin_pupd_r1r0_grps;
305 unsigned int n_pin_pupd_r1r0;
306 int (*spec_pull_set)(struct mtk_pinctrl *pctl,
307 struct regmap *reg, unsigned int pin,
308 unsigned char align, bool isup, unsigned int arg);
309 int (*spec_ies_smt_set)(struct mtk_pinctrl *pctl,
310 struct regmap *reg, unsigned int pin,
311 unsigned char align, int value, enum pin_config_param arg);
312 void (*spec_pinmux_set)(struct regmap *reg, unsigned int pin,
313 unsigned int mode);
314 void (*spec_dir_set)(unsigned int *reg_addr, unsigned int pin);
315 unsigned int dir_offset;
316 unsigned int ies_offset;
317 unsigned int smt_offset;
318 unsigned int pullen_offset;
319 unsigned int pullsel_offset;
320 unsigned int drv_offset;
321 unsigned int dout_offset;
322 unsigned int din_offset;
323 unsigned int pinmux_offset;
324 unsigned short type1_start;
325 unsigned short type1_end;
326 unsigned char port_shf;
327 unsigned char port_mask;
328 unsigned char port_align;
329 unsigned char port_pin_shf;
330 unsigned int regmap_num;
331 struct mtk_eint_offsets eint_offsets;
332 unsigned int ap_num;
333 unsigned int db_cnt;
334};
335
336int mtk_pctrl_init(struct platform_device *pdev,
337 const struct mtk_pinctrl_devdata *data,
338 struct regmap *regmap);
339
340int mtk_pctrl_spec_pull_set_samereg(struct mtk_pinctrl *pctl,
341 struct regmap *regmap,
342 const struct mtk_pin_spec_pupd_set_samereg *pupd_infos,
343 unsigned int info_num, unsigned int pin,
344 unsigned char align, bool isup, unsigned int r1r0);
345
346int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap,
347 const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num,
348 unsigned int pin, unsigned char align, int value);
349
350int mtk_pinctrl_get_gpio_value(struct mtk_pinctrl *pctl,
351 int pin, int size, const struct mtk_pin_info pin_info[]);
352
353int mtk_pinctrl_update_gpio_value(struct mtk_pinctrl *pctl, int pin,
354 unsigned char value, int size, const struct mtk_pin_info pin_info[]);
355
356int mtk_pinctrl_set_gpio_value(struct mtk_pinctrl *pctl, int pin,
357 bool value, int size, const struct mtk_pin_info pin_info[]);
358extern const struct dev_pm_ops mtk_eint_pm_ops;
359
360#endif /* __PINCTRL_MTK_COMMON_H */