| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * Driver for the Texas Instruments DP83848 PHY | 
 | 3 |  * | 
 | 4 |  * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ | 
 | 5 |  * | 
 | 6 |  * This program is free software; you can redistribute it and/or modify | 
 | 7 |  * it under the terms of the GNU General Public License as published by | 
 | 8 |  * the Free Software Foundation; either version 2 of the License. | 
 | 9 |  * | 
 | 10 |  * This program is distributed in the hope that it will be useful, | 
 | 11 |  * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
 | 12 |  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
 | 13 |  * GNU General Public License for more details. | 
 | 14 |  */ | 
 | 15 |  | 
 | 16 | #include <linux/module.h> | 
 | 17 | #include <linux/phy.h> | 
 | 18 |  | 
 | 19 | #define TI_DP83848C_PHY_ID		0x20005ca0 | 
 | 20 | #define TI_DP83620_PHY_ID		0x20005ce0 | 
 | 21 | #define NS_DP83848C_PHY_ID		0x20005c90 | 
 | 22 | #define TLK10X_PHY_ID			0x2000a210 | 
 | 23 | #define TI_DP83822_PHY_ID		0x2000a240 | 
 | 24 |  | 
 | 25 | /* Registers */ | 
 | 26 | #define DP83848_MICR			0x11 /* MII Interrupt Control Register */ | 
 | 27 | #define DP83848_MISR			0x12 /* MII Interrupt Status Register */ | 
 | 28 |  | 
 | 29 | /* MICR Register Fields */ | 
 | 30 | #define DP83848_MICR_INT_OE		BIT(0) /* Interrupt Output Enable */ | 
 | 31 | #define DP83848_MICR_INTEN		BIT(1) /* Interrupt Enable */ | 
 | 32 |  | 
 | 33 | /* MISR Register Fields */ | 
 | 34 | #define DP83848_MISR_RHF_INT_EN		BIT(0) /* Receive Error Counter */ | 
 | 35 | #define DP83848_MISR_FHF_INT_EN		BIT(1) /* False Carrier Counter */ | 
 | 36 | #define DP83848_MISR_ANC_INT_EN		BIT(2) /* Auto-negotiation complete */ | 
 | 37 | #define DP83848_MISR_DUP_INT_EN		BIT(3) /* Duplex Status */ | 
 | 38 | #define DP83848_MISR_SPD_INT_EN		BIT(4) /* Speed status */ | 
 | 39 | #define DP83848_MISR_LINK_INT_EN	BIT(5) /* Link status */ | 
 | 40 | #define DP83848_MISR_ED_INT_EN		BIT(6) /* Energy detect */ | 
 | 41 | #define DP83848_MISR_LQM_INT_EN		BIT(7) /* Link Quality Monitor */ | 
 | 42 |  | 
 | 43 | #define DP83848_INT_EN_MASK		\ | 
 | 44 | 	(DP83848_MISR_ANC_INT_EN |	\ | 
 | 45 | 	 DP83848_MISR_DUP_INT_EN |	\ | 
 | 46 | 	 DP83848_MISR_SPD_INT_EN |	\ | 
 | 47 | 	 DP83848_MISR_LINK_INT_EN) | 
 | 48 |  | 
 | 49 | static int dp83848_ack_interrupt(struct phy_device *phydev) | 
 | 50 | { | 
 | 51 | 	int err = phy_read(phydev, DP83848_MISR); | 
 | 52 |  | 
 | 53 | 	return err < 0 ? err : 0; | 
 | 54 | } | 
 | 55 |  | 
 | 56 | static int dp83848_config_intr(struct phy_device *phydev) | 
 | 57 | { | 
 | 58 | 	int control, ret; | 
 | 59 |  | 
 | 60 | 	control = phy_read(phydev, DP83848_MICR); | 
 | 61 | 	if (control < 0) | 
 | 62 | 		return control; | 
 | 63 |  | 
 | 64 | 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { | 
 | 65 | 		control |= DP83848_MICR_INT_OE; | 
 | 66 | 		control |= DP83848_MICR_INTEN; | 
 | 67 |  | 
 | 68 | 		ret = phy_write(phydev, DP83848_MISR, DP83848_INT_EN_MASK); | 
 | 69 | 		if (ret < 0) | 
 | 70 | 			return ret; | 
 | 71 | 	} else { | 
 | 72 | 		control &= ~DP83848_MICR_INTEN; | 
 | 73 | 	} | 
 | 74 |  | 
 | 75 | 	return phy_write(phydev, DP83848_MICR, control); | 
 | 76 | } | 
 | 77 |  | 
 | 78 | static struct mdio_device_id __maybe_unused dp83848_tbl[] = { | 
 | 79 | 	{ TI_DP83848C_PHY_ID, 0xfffffff0 }, | 
 | 80 | 	{ NS_DP83848C_PHY_ID, 0xfffffff0 }, | 
 | 81 | 	{ TI_DP83620_PHY_ID, 0xfffffff0 }, | 
 | 82 | 	{ TLK10X_PHY_ID, 0xfffffff0 }, | 
 | 83 | 	{ TI_DP83822_PHY_ID, 0xfffffff0 }, | 
 | 84 | 	{ } | 
 | 85 | }; | 
 | 86 | MODULE_DEVICE_TABLE(mdio, dp83848_tbl); | 
 | 87 |  | 
 | 88 | #define DP83848_PHY_DRIVER(_id, _name)				\ | 
 | 89 | 	{							\ | 
 | 90 | 		.phy_id		= _id,				\ | 
 | 91 | 		.phy_id_mask	= 0xfffffff0,			\ | 
 | 92 | 		.name		= _name,			\ | 
 | 93 | 		.features	= PHY_BASIC_FEATURES,		\ | 
 | 94 | 		.flags		= PHY_HAS_INTERRUPT,		\ | 
 | 95 | 								\ | 
 | 96 | 		.soft_reset	= genphy_soft_reset,		\ | 
 | 97 | 		.config_init	= genphy_config_init,		\ | 
 | 98 | 		.suspend	= genphy_suspend,		\ | 
 | 99 | 		.resume		= genphy_resume,		\ | 
 | 100 | 		.config_aneg	= genphy_config_aneg,		\ | 
 | 101 | 		.read_status	= genphy_read_status,		\ | 
 | 102 | 								\ | 
 | 103 | 		/* IRQ related */				\ | 
 | 104 | 		.ack_interrupt	= dp83848_ack_interrupt,	\ | 
 | 105 | 		.config_intr	= dp83848_config_intr,		\ | 
 | 106 | 	} | 
 | 107 |  | 
 | 108 | static struct phy_driver dp83848_driver[] = { | 
 | 109 | 	DP83848_PHY_DRIVER(TI_DP83848C_PHY_ID, "TI DP83848C 10/100 Mbps PHY"), | 
 | 110 | 	DP83848_PHY_DRIVER(NS_DP83848C_PHY_ID, "NS DP83848C 10/100 Mbps PHY"), | 
 | 111 | 	DP83848_PHY_DRIVER(TI_DP83620_PHY_ID, "TI DP83620 10/100 Mbps PHY"), | 
 | 112 | 	DP83848_PHY_DRIVER(TLK10X_PHY_ID, "TI TLK10X 10/100 Mbps PHY"), | 
 | 113 | 	DP83848_PHY_DRIVER(TI_DP83822_PHY_ID, "TI DP83822 10/100 Mbps PHY"), | 
 | 114 | }; | 
 | 115 | module_phy_driver(dp83848_driver); | 
 | 116 |  | 
 | 117 | MODULE_DESCRIPTION("Texas Instruments DP83848 PHY driver"); | 
 | 118 | MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); | 
 | 119 | MODULE_LICENSE("GPL"); |