[Feature][ZXW-76]merged P48U04 base code
Change-Id: Ia14632a24eb4e8ddf720d8f53f2fe3a1b52a0a8e
diff --git a/cap/zx297520v3/sources/meta-zxic/recipes-app/fota-upi-ab/fota-upi-ab.bb b/cap/zx297520v3/sources/meta-zxic/recipes-app/fota-upi-ab/fota-upi-ab.bb
index 7c0e66e..e2f1edb 100755
--- a/cap/zx297520v3/sources/meta-zxic/recipes-app/fota-upi-ab/fota-upi-ab.bb
+++ b/cap/zx297520v3/sources/meta-zxic/recipes-app/fota-upi-ab/fota-upi-ab.bb
@@ -1,6 +1,6 @@
DESCRIPTION = "fota_upi_ab"
#ota-upgrade依赖库
-DEPENDS = "libmtd libnvram libsoftap libsofttimer libatutils libupi-ab"
+DEPENDS = "libnvram libsoftap libsofttimer libatutils libupi-ab"
SECTION = "app"
LICENSE = "zte"
PV = "1.0.0"
@@ -9,7 +9,7 @@
#配置code路径信息。
FILESEXTRAPATHS_prepend :="${APP-OPEN-PATH}/platform:"
SRC_URI = " \
- ${@bb.utils.contains("MK_SDK_VERSION", "yes", "", "file://fota_upi_ab", d)} \
+ file://fota_upi_ab \
"
LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/zte;md5=c075689d1d1e06d4ab5bbe53623a6808"
@@ -23,30 +23,21 @@
#编译
do_compile() {
- if [ ${MK_SDK_VERSION} = "no" ]; then
- make -C fota_upi_ab
- fi
+ make -C fota_upi_ab
}
#库文件的安装,封库的宏MK_SDK_VERSION
-do_install () {
- if [ ${MK_SDK_VERSION} = "no" ]; then
- install -d ${RELEASE-PATH}/executable
- install -m 0755 ${S}/fota_upi_ab/fota_upi_ab_static ${RELEASE-PATH}/executable
-
- #install elfs
- install -d ${ELFS-PATH}/
- install -m 0755 ${S}/fota_upi_ab/fota_upi_ab_static ${ELFS-PATH}/
- fi
-
+do_install () {
install -d ${D}${bindir}/
- install -m 0755 ${RELEASE-PATH}/executable/fota_upi_ab_static ${D}${bindir}/
+ install -m 0755 ${S}/fota_upi_ab/fota_upi_ab_static ${D}${bindir}/
+
+ #install elfs
+ install -d ${ELFS-PATH}/
+ install -m 0755 ${S}/fota_upi_ab/fota_upi_ab_static ${ELFS-PATH}/
}
#清库
do_cleanlibs () {
- if [ ${MK_SDK_VERSION} = "no" ]; then
- rm -fr ${ELFS-PATH}/fota_upi_ab
- fi
+ rm -fr ${ELFS-PATH}/fota_upi_ab
}
addtask cleanlibs after do_clean before do_cleansstate
diff --git a/cap/zx297520v3/sources/meta-zxic/recipes-app/libupi-ab/libupi-ab.bb b/cap/zx297520v3/sources/meta-zxic/recipes-app/libupi-ab/libupi-ab.bb
index cecb662..b54d5e7 100755
--- a/cap/zx297520v3/sources/meta-zxic/recipes-app/libupi-ab/libupi-ab.bb
+++ b/cap/zx297520v3/sources/meta-zxic/recipes-app/libupi-ab/libupi-ab.bb
@@ -1,5 +1,5 @@
DESCRIPTION = "libupi_ab"
-DEPENDS = "libnvram libsoftap libsofttimer libatutils zlib openssl libmtd"
+DEPENDS = "libnvram libsoftap libsofttimer libatutils zlib openssl"
SECTION = "lib"
LICENSE = "zte"
PV = "1.0.0"
@@ -7,7 +7,7 @@
LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/zte;md5=c075689d1d1e06d4ab5bbe53623a6808"
#配置code路径信息。
-FILESEXTRAPATHS_prepend :="${APP-OPEN-PATH}/sdk:"
+FILESEXTRAPATHS_prepend :="${APP-PATH}:"
SRC_URI = " \
${@bb.utils.contains("MK_SDK_VERSION", "yes", "", "file://libupi_ab", d)} \
"
@@ -22,7 +22,7 @@
do_compile () {
if [ ${MK_SDK_VERSION} = "no" ]; then
make -C libupi_ab
- fi
+ fi
}
do_install () {
@@ -32,18 +32,19 @@
install -m 0755 ${S}/libupi_ab/libupi_ab.so ${RELEASE-PATH}/lib
install -m 0755 ${S}/libupi_ab/libupi_ab.a ${RELEASE-PATH}/lib
- install -m 0644 ${S}/libupi_ab/inc/*.h ${RELEASE-PATH}/include/upi_ab
+ install -m 0644 ${S}/libupi_ab/inc/zxic_fota_ab_upgrade.h ${RELEASE-PATH}/include/upi_ab
#install elfs
install -d ${ELFS-PATH}/
install -m 0755 ${S}/libupi_ab/libupi_ab.so ${ELFS-PATH}/
- fi
+ fi
+
install -d ${D}${libdir}/
install -d ${D}/usr/include
install -m 0755 ${RELEASE-PATH}/lib/libupi_ab.so ${D}${libdir}/
install -m 0755 ${RELEASE-PATH}/lib/libupi_ab.a ${D}${libdir}/
- install -m 0644 ${RELEASE-PATH}/include/upi_ab/*.h ${D}/usr/include/
+ install -m 0644 ${RELEASE-PATH}/include/upi_ab/*.h ${D}/usr/include/
}
#清库
@@ -63,4 +64,4 @@
FILES_SOLIBSDEV = ""
INSANE_SKIP_${PN} = "dev-so"
-RDEPENDS_${PN} = "libnvram libsoftap libsofttimer libatutils zlib libmtd"
+RDEPENDS_${PN} = "libnvram libsoftap libsofttimer libatutils zlib"
diff --git a/cap/zx297520v3/sources/poky/meta/classes/reproducible_build.bbclass b/cap/zx297520v3/sources/poky/meta/classes/reproducible_build.bbclass
old mode 100644
new mode 100755
index ec86255..2b402b9
--- a/cap/zx297520v3/sources/poky/meta/classes/reproducible_build.bbclass
+++ b/cap/zx297520v3/sources/poky/meta/classes/reproducible_build.bbclass
@@ -64,7 +64,6 @@
SSTATETASKS += "do_deploy_source_date_epoch"
do_deploy_source_date_epoch () {
-
mkdir -p ${SDE_DEPLOYDIR}
if [ -e ${SDE_FILE} ]; then
echo "Deploying SDE from ${SDE_FILE} -> ${SDE_DEPLOYDIR}."
diff --git a/cap/zx297520v3/zxic_code/zxic_binary/zxic_app_release/glibc/include/upi_ab/zxic_fota_ab_upgrade.h b/cap/zx297520v3/zxic_code/zxic_binary/zxic_app_release/glibc/include/upi_ab/zxic_fota_ab_upgrade.h
new file mode 100755
index 0000000..3757f91
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_binary/zxic_app_release/glibc/include/upi_ab/zxic_fota_ab_upgrade.h
@@ -0,0 +1,384 @@
+/**
+* @file zxic_fota_ab_upgrade.h
+* @brief ABϵͳFOTAÉý¼¶¶ÔÍâ½Ó¿Ú
+*
+* Copyright (C) 2017 Sanechips Technology Co., Ltd.
+* @author
+*
+*/
+
+#ifndef ZXIC_FOTA_AB_UPGRADE_H
+#define ZXIC_FOTA_AB_UPGRADE_H
+
+/*******************************************************************************
+ * Include header files *
+ ******************************************************************************/
+
+
+
+/*******************************************************************************
+ * Macro definitions *
+ ******************************************************************************/
+
+#define Z_FOTA_SUCCESS (0)
+#define Z_FOTA_FAIL (-1)
+
+/*
+ ºê¶¨Ò壺Éý¼¶×´Ì¬ºê
+ */
+#define Z_UPGRAGE_STATUS_FREE (-1)
+#define Z_UPGRADE_STATUS_VERIFING (0)
+#define Z_UPGRADE_STATUS_VERIFY_SUCCESS (1)
+#define Z_UPGRADE_STATUS_VERIFY_FAIL (2)
+#define Z_UPGRADE_STATUS_UPDATING (3)
+#define Z_UPGRADE_STATUS_UPDATE_SUCCESS (4)
+#define Z_UPGRADE_STATUS_UPDATE_FAIL (5)
+
+
+/*
+ * ºê¶¨Ò壺˫ϵͳÆô¶¯£¬ÏµÍ³×´Ì¬
+ */
+#define Z_DUALSYSTEM_STATUS_BOOTABLE (0xB0AB) /* ¿ÉÆô¶¯ */
+#define Z_DUALSYSTEM_STATUS_SUCCESSFUL (0x5CCF) /* Äܳɹ¦Æô¶¯ */
+#define Z_DUALSYSTEM_STATUS_UNBOOTABLE (0xBABE) /* ²»¿ÉÆô¶¯ */
+
+
+#define Z_DUAL_SYSTEM (0x875A)
+#define Z_DUAL_SYSTEM2 (0x986B)
+
+
+/*
+ *ºê¶¨Ò壺Éý¼¶ÀàÐÍ
+ */
+#define Z_UPGRADE_TYPE_ALL (0) /* È«°æ±¾ÀàÐÍ */
+#define Z_UPGRADE_TYPE_PLATFORM (1) /* ƽ̨ÀàÐÍ */
+#define Z_UPGRADE_TYPE_OEM (2) /* OEMÀàÐÍ */
+#define Z_UPGRADE_TYPE_INVALID (-1) /* ÎÞЧÀàÐÍ */
+
+
+/*******************************************************************************
+ * Type definitions *
+ ******************************************************************************/
+
+
+
+/*
+ * ˵Ã÷£ºÉý¼¶×´Ì¬ÐÅÏ¢½á¹¹Ìå
+ * upgrade_status:Éý¼¶×´Ì¬£¬È¡Öµ²Î¿¼¡¾Éý¼¶×´Ì¬ºê¡¿
+ * total_size:´ýдÈëÉý¼¶·ÖÇø×ܳ¤¶È
+ * upgraded_size:ÒÑÉý¼¶·ÖÇø³¤¶È
+ * ×¢Ò⣺
+ * ³¤¶ÈÐÅÏ¢½öÔÚÉý¼¶×´Ì¬ÎªUPGRADE_STATUS_UPDATINGʱÓÐЧ£¬ÆäËü״̬²ÎÊýÖµÎÞʵ¼ÊÒâÒå
+ */
+
+typedef struct
+{
+ int upgrade_status;
+ int total_size;
+ int upgraded_size;
+} z_upgrade_status_info_t;
+
+
+/*
+ * ˵Ã÷£ºµ¥ÏµÍ³×´Ì¬
+ * system:µ±Ç°ÏµÍ³ Z_DUAL_SYSTEM¡¢Z_DUAL_SYSTEM2
+ * status:ϵͳ״̬ Z_DUALSYSTEM_STATUS_BOOTABLE¡¢Z_DUALSYSTEM_STATUS_SUCCESSFUL¡¢Z_DUALSYSTEM_STATUS_UNBOOTABLE
+ * try_cnt:ÖØÆô´ÎÊý
+ * ×¢Ò⣺
+ * ³¤¶ÈÐÅÏ¢½öÔÚÉý¼¶×´Ì¬ÎªUPGRADE_STATUS_UPDATINGʱÓÐЧ£¬ÆäËü״̬²ÎÊýÖµÎÞʵ¼ÊÒâÒå
+ */
+typedef struct
+{
+ int system;
+ int status; /* bootable/successful/unbootable */
+ int try_cnt;
+} z_system_info_t;
+
+
+/*
+ * ˵Ã÷£ºÏµÍ³×´Ì¬
+ * boot_to:ÏÂ´ÎÆô¶¯ÏµÍ³
+ * system_1:ϵͳ1״̬
+ * system_2:ϵͳ2״̬
+ * ×¢Ò⣺
+ *
+ */
+typedef struct
+{
+ int boot_to; /* µ±Ç°Æô¶¯ÏµÍ³±êÖ¾*/
+ int fota_status;
+ z_system_info_t system_1;
+ z_system_info_t system_2;
+} z_upgrade_system_info_t;
+
+
+typedef struct
+{
+ z_upgrade_status_info_t *status;
+ void(* status_cb)(z_upgrade_status_info_t *status);
+} z_upgrade_flush_status_t;
+
+
+//typedef void(* flush_upgrade_status)(z_upgrade_status_info_t *status);
+
+
+/*******************************************************************************
+ * Global variable declarations *
+ ******************************************************************************/
+
+
+/*******************************************************************************
+ * Global function declarations *
+ ******************************************************************************/
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_verify
+ * ¹¦ÄÜÃèÊö:Éý¼¶°üºÏ·¨ÐÔУÑé
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý:ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS УÑé³É¹¦
+ * Z_FOTA_FAILУÑéʧ°Ü
+ * ×¢Òâ:
+ * ͬ²½½Ó¿Ú£¬½¨ÒéÒì²½µ÷ÓÃ
+ ********************************************************************************/
+int zxic_dual_verify();
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_upgrade
+ * ¹¦ÄÜÃèÊö:¿ªÊ¼Éý¼¶
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£º
+ * flush_upgrade_status ״̬»Øµ÷½Ó¿Ú
+ * Êä³ö²ÎÊý:ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS Éý¼¶³É¹¦
+ * Z_FOTA_FAILÉý¼¶Ê§°Ü
+ * ×¢Òâ:
+ * ͬ²½½Ó¿Ú£¬½¨ÒéÒì²½µ÷Ó㬱ÜÃâ×èÈû
+ * ״̬»Øµ÷½Ó¿ÚÖнûÖ¹×ö¸´ÔÓ²Ù×÷£¬½¨Òé½ö½øÐÐ״̬Êä³ö
+********************************************************************************/
+
+int zxic_dual_upgrade(z_upgrade_flush_status_t* flush_status);
+
+
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_get_upgrade_status
+ * ¹¦ÄÜÃèÊö:Éý¼¶×´Ì¬»ñÈ¡
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý:
+ * upgrade_info_t *upgrade_info Éý¼¶×´Ì¬
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS Éý¼¶³É¹¦
+ * Z_FOTA_FAILÉý¼¶Ê§°Ü
+ * ×¢Òâ:
+********************************************************************************/
+int zxic_dual_get_upgrade_status(z_upgrade_status_info_t *upgrade_info);
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_get_current_system
+ * ¹¦ÄÜÃèÊö:»ñÈ¡µ±Ç°ÔËÐÐϵͳ
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý:ÎÞ
+ * ·µ»ØÖµ£º
+ * µ±Ç°ÔËÐÐϵͳ
+ * ×¢Òâ:
+********************************************************************************/
+int zxic_dual_get_current_system();
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_get_boot_to_system
+ * ¹¦ÄÜÃèÊö:»ñÈ¡ÖØÆôºóÄ¿±êÆô¶¯ÏµÍ³
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý:ÎÞ
+ * ·µ»ØÖµ£º
+ * µ±Ç°ÔËÐÐϵͳ
+ * ×¢Òâ:
+********************************************************************************/
+int zxic_dual_get_boot_to_system();
+
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_set_boot_to_system
+ * ¹¦ÄÜÃèÊö:ÉèÖÃÄ¿±êÔËÐÐϵͳ
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£º
+ * system:Ä¿±êϵͳ
+ * reboot_flag:ÉèÖÃÍê±ÏºóÊÇ·ñÁ¢¼´ÖØÆô 0:²»ÖØÆô,1:ÖØÆô
+ * Êä³ö²ÎÊý:
+ * ϵͳ״̬ÐÅÏ¢
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS »ñÈ¡ÐÅÏ¢³É¹¦
+ * Z_FOTA_FAIL»ñÈ¡ÐÅϢʧ°Ü
+ * ×¢Òâ:
+ * ·µ»ØÖµ£ºÖ»ÔÚ²»ÐèÒªÖØÆôʱÓÐЧ
+********************************************************************************/
+int zxic_dual_set_boot_to_system(int system, int reboot_flag);
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_get_system_status
+ * ¹¦ÄÜÃèÊö:²éѯABϵͳ״̬
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý:
+ * system_info ϵͳ״̬ÐÅÏ¢
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS »ñÈ¡ÐÅÏ¢³É¹¦
+ * Z_FOTA_FAIL»ñÈ¡ÐÅϢʧ°Ü
+ * ×¢Òâ:
+********************************************************************************/
+int zxic_dual_get_system_status(z_upgrade_system_info_t *system_info);
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_set_system_status
+ * ¹¦ÄÜÃèÊö:ÉèÖÃϵͳ״̬
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£º
+ * system:´ýÉèÖÃϵͳ
+ * status:ÉèÖÃϵͳ״̬
+ * Êä³ö²ÎÊý:ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS »ñÈ¡ÐÅÏ¢³É¹¦
+ * Z_FOTA_FAIL»ñÈ¡ÐÅϢʧ°Ü
+ * ×¢Òâ:
+********************************************************************************/
+int zxic_dual_set_system_status(int system, int status);
+
+/*******************************************************************************
+ * Inline function implementations *
+ ******************************************************************************/
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_init_flag_partition
+ * ¹¦ÄÜÃèÊö:³õʼ»¯flag·ÖÇøÐÅÏ¢,²âÊÔ½Ó¿Ú£¬Õý³£Á÷³Ì²»¿ÉʹÓÃ
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý:ÎÞ
+ * Êä³ö²ÎÊý:ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS »ñÈ¡ÐÅÏ¢³É¹¦
+ * Z_FOTA_FAIL»ñÈ¡ÐÅϢʧ°Ü
+ * ×¢Òâ:
+********************************************************************************/
+
+int zxic_init_flag_partition();
+
+
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_get_fota_status_for_nv
+ * ¹¦ÄÜÃèÊö:»ñȡϵͳNVÊÇ·ñͬ²½±êÖ¾
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý:ÎÞ
+ * ·µ»ØÖµ£º
+ * ״̬±êÖ¾ 0£º²»ÐèҪͬ²½£¬1£ºÐèҪͬ²½
+ * ×¢Òâ:
+********************************************************************************/
+int zxic_dual_get_fota_status_for_nv();
+int dual_AB_get_fota_status_for_nv();
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_set_fota_status_for_nv
+ * ¹¦ÄÜÃèÊö:ÉèÖÃϵͳNVÊÇ·ñͬ²½±êÖ¾
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£º
+ * status:״̬±êÖ¾£¬0£º²»ÐèҪͬ²½£¬1£ºÐèҪͬ²½
+ * Êä³ö²ÎÊý:ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS ÉèÖóɹ¦
+ * Z_FOTA_FAIL ÉèÖÃʧ°Ü
+ * ×¢Òâ:
+********************************************************************************/
+int zxic_dual_set_fota_status_for_nv(int status);
+int dual_AB_set_fota_status_for_nv(int status);
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_sync_system
+ * ¹¦ÄÜÃèÊö: AB-AAϵͳͬ²½
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý: ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS ͬ²½³É¹¦
+ * Z_FOTA_FAIL ͬ²½Ê§°Ü
+ * ×¢Òâ:
+ ********************************************************************************/
+int zxic_dual_sync_system(void);
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_get_upgrade_type
+ * ¹¦ÄÜÃèÊö: »ñÈ¡Éý¼¶ÀàÐÍ
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý: ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_UPGRADE_TYPE_ALL È«°æ±¾ÀàÐÍ
+ * Z_UPGRADE_TYPE_PLATFORM ƽ̨ÀàÐÍ
+ * Z_UPGRADE_TYPE_OEM OEMÀàÐÍ
+ * Z_UPGRADE_TYPE_INVALID ÎÞЧÀàÐÍ
+ * ×¢Òâ:
+ ********************************************************************************/
+int zxic_dual_get_upgrade_type(void);
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_get_sync_status
+ * ¹¦ÄÜÃèÊö: »ñȡͬ²½×´Ì¬
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£ºÎÞ
+ * Êä³ö²ÎÊý:
+ * sync_status ͬ²½×´Ì¬
+ * ·µ»ØÖµ£ºÎÞ
+ * ×¢Òâ:
+ ********************************************************************************/
+void zxic_dual_get_sync_status(int *sync_status);
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_set_sync_status
+ * ¹¦ÄÜÃèÊö: ÉèÖÃͬ²½×´Ì¬
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£º
+ * sync_status ͬ²½×´Ì¬
+ * Êä³ö²ÎÊý: ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS ÉèÖóɹ¦
+ * Z_FOTA_FAIL ÉèÖÃʧ°Ü
+ * ×¢Òâ:
+ ********************************************************************************/
+int zxic_dual_set_sync_status(int sync_status);
+
+
+/********************************************************************************
+ * º¯ÊýÃû: zxic_dual_config_package_path
+ * ¹¦ÄÜÃèÊö: ÉèÖÃÉý¼¶°ü·¾¶
+ * ²ÎÊý˵Ã÷£º
+ * ÊäÈë²ÎÊý£º
+ * upgrade_package_path Éý¼¶°ü·¾¶
+ * length Éý¼¶°ü·¾¶³¤¶È
+ * Êä³ö²ÎÊý: ÎÞ
+ * ·µ»ØÖµ£º
+ * Z_FOTA_SUCCESS ÉèÖóɹ¦
+ * Z_FOTA_FAIL ÉèÖÃʧ°Ü
+ * ×¢Òâ:
+ ********************************************************************************/
+int zxic_dual_config_package_path(char *upgrade_package_path, int length);
+
+
+#endif // ZXIC_FOTA_AB_UPGRADE_H
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/Makefile b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/Makefile
deleted file mode 100644
index 55a9fca..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-obj-$(CONFIG_ARCH_ZX297520V3) += zx297520v3_dma.o
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/zx297520v3_dma.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/zx297520v3_dma.c
deleted file mode 100644
index 1753798..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/zx297520v3_dma.c
+++ /dev/null
@@ -1,1454 +0,0 @@
-/*******************************************************************************
- * Copyright (C) 2013, ZTE Corporation.
- *
- * File Name:dma.c
- * File Mark:
- * Description:
- * Others:
- * Version: 0.1
- * Author: limeifeng
- * Date:
- * modify
-
-
- ********************************************************************************/
-
-/****************************************************************************
-* Include files
-****************************************************************************/
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/spinlock.h>
-#include <linux/dma-mapping.h>
-#include <linux/mutex.h>
-#include <linux/platform_device.h>
-#include <linux/err.h>
-#include <linux/ioport.h>
-#include <linux/module.h>
-#include <linux/clk.h>
-#include <linux/slab.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/delay.h>
-#include <linux/kthread.h>
-
-#include <asm/cacheflush.h>
-#include <asm/io.h>
-#include "../dmaengine.h"
-#include <linux/soc/zte/common.h>
-#include <linux/soc/zte/spinlock.h>
-
-#include "zx297520v3_dma.h"
-
-//#pragma GCC optimize("O0")
-#define DMA_SUCCESS DMA_COMPLETE
-
-#define DMA_CHANNEL_CONFIG(peripheral_id, is_used , enable_mem2mem) {peripheral_id, is_used, enable_mem2mem}
-
-/*dma channel config define*/
-typedef struct
-{
- dma_peripheral_id peripheral_id; /* hw channel id */
- unsigned int is_used;
- unsigned int enable_mem2mem;
-#if 0
- void * data;
- dma_callback_func channel_callback;
-#endif
-}dma_channel_config;
-
-static dma_channel_config dma_chan_config[] =
-{
- DMA_CHANNEL_CONFIG(DMA_CH_UART0_TX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_UART0_RX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_UART1_TX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_UART1_RX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_SSP0_TX, false, false),
-
- DMA_CHANNEL_CONFIG(DMA_CH_SSP0_RX, false, true),
-#if 1 /* only ps core used */
- DMA_CHANNEL_CONFIG(DMA_CH_GPRS0, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_GPRS1, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_USIM, false, false),
-#endif
- DMA_CHANNEL_CONFIG(DMA_CH_I2S0_TX, false, false),
-
- DMA_CHANNEL_CONFIG(DMA_CH_I2S0_RX0, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_I2S1_TX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_I2S1_RX0, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_SPIFC_TX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_SPIFC_RX, false, false),
-
- DMA_CHANNEL_CONFIG(DMA_CH_SSP1_TX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_SSP1_RX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_UART2_TX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_UART2_RX, false, true),
-
- DMA_CHANNEL_CONFIG(DMA_CH_EMBMS, false, false),
- #if 1 /* only ps core used */
- DMA_CHANNEL_CONFIG(DMA_CH_USIM1, false, false),
- #endif
- DMA_CHANNEL_CONFIG(DMA_CH_M2M_TX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_M2M_RX, false, true),
-};
-
-/****************************************************************************
-* Local Macros
-****************************************************************************/
-#define BIT_SHIFT_L(value,BIT_NO) ((unsigned int)(value << (BIT_NO)))
-#define GET_HIGH_16BIT(val) (unsigned int)(val >> (16))
-#define GET_LOW_16BIT(val) (unsigned int)(val & (0xffff))
-#define DMA_CHANNEL(dmac,channel) (unsigned int)(dmac << (16)|(channel) )
-
-/*dma control reg bit */
-#define DMA_CTRL_ENABLE(value) BIT_SHIFT_L(value,0)
-#define DMA_CTRL_SOFT_B_REQ(value) BIT_SHIFT_L(value,1)
-#define DMA_CTRL_SRC_FIFO_MOD(value) BIT_SHIFT_L(value,2)
-#define DMA_CTRL_DEST_FIFO_MOD(value) BIT_SHIFT_L(value,3)
-#define DMA_CTRL_IRQ_MOD(value) BIT_SHIFT_L(value,4)
-#define DMA_CTRL_SRC_BURST_SIZE(value) BIT_SHIFT_L(value,6)
-#define DMA_CTRL_SRC_BURST_LENGTH(value) BIT_SHIFT_L(value,9)
-#define DMA_CTRL_DEST_BURST_SIZE(value) BIT_SHIFT_L(value,13)
-#define DMA_CTRL_DEST_BURST_LENGTH(value) BIT_SHIFT_L(value,16)
-#define DMA_CTRL_INTERRUPT_SEL(value) BIT_SHIFT_L(value,20)
-#define DMA_CTRL_FORCE_CLOSE(value) BIT_SHIFT_L(value,31)
-
-#define MAX(a,b) ((a) > (b) ? (a) : (b))
-
-/* Ò»¸öÁ´±íÖÐ×î´óµÄÁ´±íÏî¸öÊý */
-#define MAX_LLI_PARA_CNT (32)
-
-
-/* config dma reused */
-#define DMA_SEL_CFG_REG (get_socsys_base() + 0x120)
-
-#if defined(CONFIG_ARCH_ZX297520V2)
-#define DMA_SEL_UART2_I2S (1U << 0)
-#define DMA_SEL_UART1_HASH (1U << 1)
-#define DMA_SEL_I2S0_TDM (1U << 2)
-#define DMA_SEL_I2S1_TDM (1U << 3)
-#elif defined(CONFIG_ARCH_ZX297520V3)
-#define DMA_SEL_UART2TX_I2S0RX1 (1U << 0)
-#define DMA_SEL_UART2RX_I2S1RX1 (1U << 1)
-#define DMA_SEL_UART1RX_HASH (1U << 2)
-#define DMA_SEL_I2S0TX_TDMTX0 (1U << 3)
-#define DMA_SEL_I2S0RX0_TDMRX0 (1U << 4)
-#define DMA_SEL_I2S1TX_TDMTX1 (1U << 5)
-#define DMA_SEL_I2S1RX0_TDMRX1 (1U << 6)
-#endif
-
-typedef struct
-{
- volatile unsigned int src_addr;
- volatile unsigned int dest_addr;
- volatile unsigned int xpara;
- volatile unsigned int yzpara;
- volatile unsigned int src_yzstep;
- volatile unsigned int dest_yzstep;
- volatile unsigned int reserved0;
- volatile unsigned int link_addr;
- volatile unsigned int control;
-}dma_lli_param;
-
-#define MAX_LLI_PARAMS_CNT (sizeof(dma_lli_param)*MAX_LLI_PARA_CNT)
-static dma_lli_param *dma_lli_params[DMA_CH_NUM];
-static dma_addr_t dma_lli_phy_addr[DMA_CH_NUM];
-
-#define ZX29_DMA_TEST 0
-
-typedef struct
-{
- volatile unsigned short core_id; /* zte_coreid -- for debug */
- volatile unsigned short is_used;
-}dma_pub_config;
-
-static dma_pub_config *dma_pub_configs;
-
-#define ZX29_DMA_INT_SEL DMA_INT_TO_A9
-
-/****************************************************************************
-* Local Types
-****************************************************************************/
-static DEFINE_MUTEX(dma_mutex);
-
-struct zx29_dma_channel
-{
- dma_peripheral_id peripheral_id;
- struct zx29_dma * dma_device;
- struct dma_chan chan;
- struct dma_async_tx_descriptor desc;
- struct tasklet_struct tasklet;
- enum dma_status status;
- unsigned int cyclic;
- dma_peripheral_id req_peripheral_id;
-// dma_channel_def dma_chan_par;
- dma_cookie_t zx29_dma_cookie;
-};
-
-struct zx29_dma
-{
- struct dma_device dma;
- dma_regs __iomem * reg;
- dma_channel_config * chan_config;
- unsigned int channel_count;
- struct zx29_dma_channel dma_chan[DMA_CH_NUM];
-};
-/****************************************************************************
-* DMA trace
-****************************************************************************/
-/* #define ZX_TRACE_DMA */
-
-#ifdef ZX_TRACE_DMA
-/*#pragma GCC optimize("O0")*/
-
-extern unsigned int test_timer_read( void );
-
-#define TRACE_DMA_COUNT 1000
-
-typedef enum
-{
- DMA_DO_SUBMIT = 0,
- DMA_DO_START = 1,
- DMA_DO_ERR = 2,
- DMA_DO_SUCCESS = 3,
-}dma_behavior_t;
-
-typedef struct
-{
- dma_peripheral_id peripheral_id;
- dma_behavior_t behavior;
-}dma_trace_t;
-
-volatile dma_trace_t dma_trace_view[TRACE_DMA_COUNT+10];
-volatile unsigned int dma_trace_index = 0;
-
-#define dma_trace_index_inc() \
-do{ \
- dma_trace_index++;\
- if(dma_trace_index>=TRACE_DMA_COUNT)\
- dma_trace_index=0;\
-}while(0)
-
-static struct zx29_dma_channel *to_zx29_dma_chan(struct dma_chan *chan);
-static void dma_trace_submit(struct dma_async_tx_descriptor *tx)
-{
- struct zx29_dma_channel *dma_channel = to_zx29_dma_chan(tx->chan);
-
- dma_trace_view[dma_trace_index].peripheral_id = dma_channel->peripheral_id;
- dma_trace_view[dma_trace_index].behavior = DMA_DO_SUBMIT;
- dma_trace_index_inc();
-}
-
-static void dma_trace_pending(dma_peripheral_id peripheral_id)
-{
- dma_trace_view[dma_trace_index].peripheral_id = peripheral_id;
- dma_trace_view[dma_trace_index].behavior = DMA_DO_START;
- dma_trace_index_inc();
-}
-
-static void dma_trace_err(dma_peripheral_id peripheral_id)
-{
- dma_trace_view[dma_trace_index].peripheral_id = peripheral_id;
- dma_trace_view[dma_trace_index].behavior = DMA_DO_ERR;
- dma_trace_index_inc();
-}
-
-static void dma_trace_success(dma_peripheral_id peripheral_id)
-{
- dma_trace_view[dma_trace_index].peripheral_id = peripheral_id;
- dma_trace_view[dma_trace_index].behavior = DMA_DO_SUCCESS;
- dma_trace_index_inc();
-}
-#else
-static void dma_trace_submit(struct dma_async_tx_descriptor *tx){}
-static void dma_trace_pending(dma_peripheral_id peripheral_id){}
-static void dma_trace_err(dma_peripheral_id peripheral_id){}
-static void dma_trace_success(dma_peripheral_id peripheral_id){}
-#endif
-
-static struct zx29_dma dma_dev;
-
-unsigned int dma_err_num = 0;
-
-#if 0
-#define DMA_CHANNEL_CONFIG(peripheral_id, is_used , enable_mem2mem) {peripheral_id, is_used, enable_mem2mem}
-static dma_channel_config dma_chan_config[] =
-{
- DMA_CHANNEL_CONFIG(DMA_CH_UART0_TX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_UART0_RX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_UART1_TX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_UART1_RX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_SSP0_TX, false, true),
-
- DMA_CHANNEL_CONFIG(DMA_CH_SSP0_RX, false, true),
-#if 0 /* only ps core used */
- DMA_CHANNEL_CONFIG(DMA_CH_GPRS0, true, true),
- DMA_CHANNEL_CONFIG(DMA_CH_GPRS1, true, true),
- DMA_CHANNEL_CONFIG(DMA_CH_USIM, true, true),
-#endif
- DMA_CHANNEL_CONFIG(DMA_CH_I2S0_TX, false, false),
-
- DMA_CHANNEL_CONFIG(DMA_CH_I2S0_RX0, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_I2S1_TX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_I2S1_RX0, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_SPIFC_TX, false, false),
- DMA_CHANNEL_CONFIG(DMA_CH_SPIFC_RX, false, false),
-
- DMA_CHANNEL_CONFIG(DMA_CH_SSP1_TX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_SSP1_RX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_UART2_TX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_UART2_RX, false, true),
-
-#ifdef CONFIG_ARCH_ZX297520V2
-#else
- DMA_CHANNEL_CONFIG(DMA_CH_EMBMS, false, true),
- #if 0 /* only ps core used */
- DMA_CHANNEL_CONFIG(DMA_CH_USIM1, false, true),
- #endif
- DMA_CHANNEL_CONFIG(DMA_CH_M2M_TX, false, true),
- DMA_CHANNEL_CONFIG(DMA_CH_M2M_RX, false, true),
-#endif
-};
-
-#endif
-static unsigned short dma_chan_check_lock(dma_peripheral_id peripheral_id)
-{
- if((peripheral_id == DMA_CH_SPIFC_TX) || (peripheral_id == DMA_CH_SPIFC_RX))
- return false;
-
- return dma_pub_configs[peripheral_id].is_used;
-}
-
-static void dma_chan_lock(dma_peripheral_id peripheral_id)
-{
- if((peripheral_id == DMA_CH_SPIFC_TX) || (peripheral_id == DMA_CH_SPIFC_RX))
- return;
- dma_pub_configs[peripheral_id].core_id = 208 /*for cap CORE_ID_AP*/;
- dma_pub_configs[peripheral_id].is_used = true;
-}
-
-static void dma_chan_unlock(dma_peripheral_id peripheral_id)
-{
- if((peripheral_id == DMA_CH_SPIFC_TX) || (peripheral_id == DMA_CH_SPIFC_RX))
- return;
- dma_pub_configs[peripheral_id].core_id = CORE_ID_NUM;
- dma_pub_configs[peripheral_id].is_used = false;
-}
-
-/* some channel need config reuse register */
-static void dma_reuse_config(dma_peripheral_id peripheral_id)
-{
- switch(peripheral_id)
- {
-#if defined(CONFIG_ARCH_ZX297520V2)
- case DMA_CH_UART2_TX:
- case DMA_CH_UART2_RX:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_UART2_I2S);
- break;
-
- case DMA_CH_I2S0_RX1:
- case DMA_CH_I2S1_RX1:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_UART2_I2S);
- break;
-
- case DMA_CH_UART1_RX:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_UART1_HASH);
- break;
-
- case DMA_CH_HASH_RX:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_UART1_HASH);
- break;
-
- case DMA_CH_I2S0_TX:
- case DMA_CH_I2S0_RX0:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S0_TDM);
- break;
-
- case DMA_CH_TDM_TX0:
- case DMA_CH_TDM_RX0:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S0_TDM);
- break;
-
- case DMA_CH_I2S1_TX:
- case DMA_CH_I2S1_RX0:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S1_TDM);
- break;
-
- case DMA_CH_TDM_TX1:
- case DMA_CH_TDM_RX1:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S1_TDM);
- break;
-
-#elif defined(CONFIG_ARCH_ZX297520V3)
- case DMA_CH_UART1_RX:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_UART1RX_HASH);
- break;
- case DMA_CH_I2S0_TX:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S0TX_TDMTX0);
- break;
- case DMA_CH_I2S0_RX0:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S0RX0_TDMRX0);
- break;
- case DMA_CH_I2S1_TX:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S1TX_TDMTX1);
- break;
- case DMA_CH_I2S1_RX0:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S1RX0_TDMRX1);
- break;
- case DMA_CH_UART2_TX:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_UART2TX_I2S0RX1);
- break;
- case DMA_CH_UART2_RX:
- zx_clr_reg(DMA_SEL_CFG_REG, DMA_SEL_UART2RX_I2S1RX1);
- break;
- case DMA_CH_HASH_RX:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_UART1RX_HASH);
- break;
- case DMA_CH_TDM_TX0:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S0TX_TDMTX0);
- break;
- case DMA_CH_TDM_RX0:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S0RX0_TDMRX0);
- break;
- case DMA_CH_TDM_TX1:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S1TX_TDMTX1);
- break;
- case DMA_CH_TDM_RX1:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_I2S1RX0_TDMRX1);
- break;
- case DMA_CH_I2S0_RX1:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_UART2TX_I2S0RX1);
- break;
- case DMA_CH_I2S1_RX1:
- zx_set_reg(DMA_SEL_CFG_REG, DMA_SEL_UART2RX_I2S1RX1);
- break;
-#endif
-
- default:
- break;
- }
-}
-
-static dma_peripheral_id get_real_peri_id(dma_peripheral_id peripheral_id)
-{
- if(peripheral_id < DMA_CH_NUM)
- return peripheral_id;
-
- switch(peripheral_id)
- {
- case DMA_CH_HASH_RX:
- return DMA_CH_UART1_RX;
- case DMA_CH_TDM_TX0:
- return DMA_CH_I2S0_TX;
- case DMA_CH_TDM_RX0:
- return DMA_CH_I2S0_RX0;
- case DMA_CH_TDM_TX1:
- return DMA_CH_I2S1_TX;
- case DMA_CH_TDM_RX1:
- return DMA_CH_I2S1_RX0;
- case DMA_CH_I2S0_RX1:
- return DMA_CH_UART2_TX;
- case DMA_CH_I2S1_RX1:
- return DMA_CH_UART2_RX;
- default:
- return 0xff;
- }
-}
-
-static unsigned int get_channel_id(dma_peripheral_id peripheral_id)
-{
- int i;
- dma_channel_config *chan_config = dma_dev.chan_config;
- dma_peripheral_id real_peripheral_id = 0xff;
-
- real_peripheral_id = get_real_peri_id(peripheral_id);
-
- for(i=0; i<dma_dev.channel_count; i++)
- {
- if ( (chan_config[i].peripheral_id==real_peripheral_id))
- return i;
- }
-
- return 0xff;
-}
-
-static void dma_sync_lli_for_cpu(unsigned int channel_id)
-{
- dma_sync_single_for_cpu(dma_dev.dma.dev, dma_lli_phy_addr[channel_id], MAX_LLI_PARAMS_CNT, DMA_BIDIRECTIONAL);
-}
-
-static void dma_sync_lli_for_device(unsigned int channel_id)
-{
- dma_sync_single_for_device(dma_dev.dma.dev, dma_lli_phy_addr[channel_id], MAX_LLI_PARAMS_CNT, DMA_BIDIRECTIONAL);
-}
-
-static signed int dma_find_chan(dma_peripheral_id channel_id);
-static signed int dma_reset_chan(struct zx29_dma_channel *channel);
-
-static void dma_tasklet(unsigned long data)
-{
- struct zx29_dma_channel *chan = (struct zx29_dma_channel *)data;
-
- if (chan->desc.callback)
- chan->desc.callback(chan->desc.callback_param);
-}
-
-static struct zx29_dma_channel *to_zx29_dma_chan(struct dma_chan *chan)
-{
- return container_of(chan, struct zx29_dma_channel, chan);
-}
-
-static signed int dma_disable_chan(struct zx29_dma_channel *chan)
-{
- dma_chan_reg __iomem* chan_reg_ptr=NULL;
-
- if (chan->peripheral_id >= DMA_CH_NUM)
- {
- return -EINVAL;
- }
-
- chan_reg_ptr= &(dma_dev.reg->channel[chan->peripheral_id]);
- chan_reg_ptr->control |= DMA_CTRL_FORCE_CLOSE(1);
-
- return 0;
-}
-
-/*reset channel para*/
-static signed int dma_reset_chan(struct zx29_dma_channel *chan)
-{
- unsigned int peripheral_id;
- unsigned int channel_id;
- dma_regs __iomem* pReg;
- dma_chan_reg __iomem* chan_reg_ptr;
-
- if (!chan) {
- return -EINVAL;
- }
-
- peripheral_id = (unsigned int)chan->peripheral_id;
- if (peripheral_id >= DMA_CH_NUM) {
- return -EINVAL;
- }
-
- channel_id = get_channel_id(chan->peripheral_id);
- if(channel_id == 0xff)
- return -EINVAL;
-
- pReg= dma_dev.reg;
- chan_reg_ptr= &(pReg->channel[peripheral_id]);
-
- /*force close current channel*/
- chan_reg_ptr->control |= DMA_CTRL_FORCE_CLOSE(1);
-
- //memset((void*) chan_reg_ptr,0,sizeof(dma_chan_reg));
- pReg->raw_int_tc_status |= BIT_SHIFT_L(0x1,peripheral_id);
- pReg->raw_int_src_err_status |= BIT_SHIFT_L(0x1,peripheral_id);
- pReg->raw_int_dest_err_status |= BIT_SHIFT_L(0x1,peripheral_id);
- pReg->raw_int_cfg_err_status |= BIT_SHIFT_L(0x1,peripheral_id);
- memset((void*) chan_reg_ptr,0,sizeof(dma_chan_reg));
- //dma_dev[dmac_id].chan_config[channel_id].channelCbk = NULL;
- //dma_dev[dmac_id].chan_config[channel_id].data = NULL;
- chan->status = DMA_SUCCESS;
- chan->cyclic = 0;
- dma_dev.chan_config[channel_id].is_used = false;
- dma_chan_unlock(dma_dev.chan_config[channel_id].peripheral_id);
-
- return 0;
-}
-
-/*find the fixed free channel for peripheralID*/
-static signed int dma_find_chan(dma_peripheral_id peripheral_id)
-{
- unsigned int channel_id = 0xff;
- dma_channel_config *chan_config = dma_dev.chan_config;
-
-#if 0/*move to zx29_dma_filter_fn*/
- /*in case there is free channel,allocate it to M2M*/
- if (DMA_CH_MEMORY==peripheral_id)
- {
- for(i=0; i<dma_dev.channel_count; i++)
- {
- if((chan_config[i].is_used==false) && \
- (dma_chan_check_lock(chan_config[i].peripheral_id)==false) && \
- (chan_config[i].enable_mem2mem==true))
- {
- chan_config[i].is_used = true;
- dma_chan_lock(chan_config[i].peripheral_id);
- return i;
- }
- }
- return -EAGAIN;
- }
-#endif
-
- channel_id = get_channel_id(peripheral_id);
- if(channel_id==0xff)
- return -EAGAIN;
-
- reg_spin_lock();
- /*if channle has been used,return error*/
- if((chan_config[channel_id].is_used==true) || \
- (dma_chan_check_lock(chan_config[channel_id].peripheral_id)==true))
- {
- reg_spin_unlock();
- return -EAGAIN;
- }
-
- /*get the channel number*/
- chan_config[channel_id].is_used =true;
- dma_chan_lock(chan_config[channel_id].peripheral_id);
- reg_spin_unlock();
-
- /* channel reuse*/
- dma_reuse_config(peripheral_id);
-
- return channel_id;
-}
-
-static u32 dma_get_residue(struct zx29_dma_channel *chan)
-{
- dma_regs __iomem* pReg = NULL;
- dma_chan_reg __iomem* chan_reg_ptr = NULL;
-
- pReg= dma_dev.reg;
- chan_reg_ptr= &(pReg->channel[chan->peripheral_id]);
-
- return chan_reg_ptr->xpara;
-}
-
-static enum dma_status zx29_dma_tx_status(struct dma_chan *chan,
- dma_cookie_t cookie, struct dma_tx_state *txstate)
-{
- struct zx29_dma_channel *zx29_chan = to_zx29_dma_chan(chan);
- dma_cookie_t last_used;
- u32 bytes;
-
- bytes = dma_get_residue(zx29_chan);
- last_used = chan->cookie;
- dma_set_tx_state(txstate, chan->completed_cookie, last_used, bytes);
-
- return zx29_chan->status;
-}
-
-static unsigned int parse_dma_req(dma_transfer_mode trans_mode)
-{
- unsigned int control = 0;
-
- switch(trans_mode)
- {
- case TRAN_PERI_TO_PERI:
- control = DMA_CTRL_SOFT_B_REQ(DMA_PERIPHERAL_REQ)\
- | DMA_CTRL_SRC_FIFO_MOD(DMA_ADDRMOD_FIFO) \
- | DMA_CTRL_DEST_FIFO_MOD(DMA_ADDRMOD_FIFO);
- break;
-
- case TRAN_PERI_TO_MEM:
- control = DMA_CTRL_SOFT_B_REQ(DMA_PERIPHERAL_REQ)\
- | DMA_CTRL_SRC_FIFO_MOD(DMA_ADDRMOD_FIFO) \
- | DMA_CTRL_DEST_FIFO_MOD(DMA_ADDRMOD_RAM);
- break;
-
- case TRAN_MEM_TO_PERI:
- control = DMA_CTRL_SOFT_B_REQ(DMA_PERIPHERAL_REQ)\
- | DMA_CTRL_SRC_FIFO_MOD(DMA_ADDRMOD_RAM) \
- | DMA_CTRL_DEST_FIFO_MOD(DMA_ADDRMOD_FIFO);
- break;
-
- case TRAN_MEM_TO_MEM:
- default:
- control = DMA_CTRL_SOFT_B_REQ(DMA_SOFT_REQ)\
- | DMA_CTRL_SRC_FIFO_MOD(DMA_ADDRMOD_RAM) \
- | DMA_CTRL_DEST_FIFO_MOD(DMA_ADDRMOD_RAM);
- break;
- }
-
- return control;
-}
-
-static signed int dma_set_chan_para(unsigned int channel)//,dma_channel_def * chan_para)
-{
- volatile dma_chan_reg __iomem* chan_reg = &(dma_dev.reg->channel[channel]);
- unsigned int channel_id = get_channel_id(channel);
- dma_lli_param *temp_dma_lli_params = NULL;
-
- if(channel_id>= DMA_CH_NUM)
- return -EAGAIN;
-
- temp_dma_lli_params = dma_lli_params[channel_id];
-
-/* chan_reg->src_addr = chan_para->src_addr;
- chan_reg->dest_addr = chan_para->dest_addr;
- chan_reg->xpara = chan_para->count;
- chan_reg->link_addr = chan_para->link_addr;
-
- if(chan_para->link_addr)
- chan_reg->link_addr = dma_lli_phy_addr[get_channel_id(channel)];
-
- chan_reg->control = parse_dma_req(chan_para->dma_control.tran_mode)\
- | DMA_CTRL_SRC_BURST_SIZE(chan_para->dma_control.src_burst_size) \
- | DMA_CTRL_SRC_BURST_LENGTH((chan_para->dma_control.src_burst_len )) \
- | DMA_CTRL_DEST_BURST_SIZE(chan_para->dma_control.dest_burst_size) \
- | DMA_CTRL_DEST_BURST_LENGTH((chan_para->dma_control.dest_burst_len ))\
- | DMA_CTRL_INTERRUPT_SEL(DMA_INT_TO_PS) ;
-
- if(chan_para->dma_control.irq_mode)
- {
- if(chan_para->link_addr)
- chan_reg->control |= DMA_CTRL_IRQ_MOD(DMA_ERR_IRQ_ENABLE);
- else
- chan_reg->control |= DMA_CTRL_IRQ_MOD(DMA_ALL_IRQ_ENABLE);
- }*/
-
- chan_reg->src_addr = temp_dma_lli_params[0].src_addr;
- chan_reg->dest_addr = temp_dma_lli_params[0].dest_addr;
- chan_reg->xpara = temp_dma_lli_params[0].xpara;
- chan_reg->link_addr = temp_dma_lli_params[0].link_addr;
- chan_reg->control = temp_dma_lli_params[0].control &
- (~(DMA_CTRL_ENABLE(DMA_ENABLE)));
-
- return 0;
-}
-
-/*allocate a channel for peripheralID,
-and return the channel number.if failed return -EAGAIN
-*/
-signed int zx29_dma_request(dma_peripheral_id peripheral_id)
-{
- signed int errCode = -EAGAIN;
-
- mutex_lock(&dma_mutex);
- errCode=dma_find_chan(peripheral_id);
- mutex_unlock(&dma_mutex);
-
- return errCode;
-}
-
-static void dma_config_lli(unsigned int channel_id, dma_channel_def *chan_para)
-{
- int i = 0;
- dma_lli_param *temp_dma_lli_params = dma_lli_params[channel_id];
-
- dma_sync_lli_for_cpu(channel_id);
- do{
- temp_dma_lli_params[i].src_addr = chan_para[i].src_addr;
- temp_dma_lli_params[i].dest_addr = chan_para[i].dest_addr;
- temp_dma_lli_params[i].xpara = chan_para[i].count;
- temp_dma_lli_params[i].yzpara = chan_para[i].ycount | (chan_para[i].zcount << 16);
- temp_dma_lli_params[i].src_yzstep = chan_para[i].src_ystep | (chan_para[i].src_zstep << 16);
- temp_dma_lli_params[i].dest_yzstep = chan_para[i].dest_ystep | (chan_para[i].dest_zstep << 16);
- temp_dma_lli_params[i].control = parse_dma_req(chan_para[i].dma_control.tran_mode)\
- | DMA_CTRL_SRC_BURST_SIZE(chan_para[i].dma_control.src_burst_size) \
- | DMA_CTRL_SRC_BURST_LENGTH((chan_para[i].dma_control.src_burst_len )) \
- | DMA_CTRL_DEST_BURST_SIZE(chan_para[i].dma_control.dest_burst_size) \
- | DMA_CTRL_DEST_BURST_LENGTH((chan_para[i].dma_control.dest_burst_len ))\
- | DMA_CTRL_INTERRUPT_SEL(ZX29_DMA_INT_SEL)\
- | DMA_CTRL_ENABLE(DMA_ENABLE);
-
- if(chan_para[i].dma_control.irq_mode > DMA_ALL_IRQ_DISABLE)
- temp_dma_lli_params[i].control |= DMA_CTRL_IRQ_MOD(DMA_ERR_IRQ_ENABLE);
-
- if(chan_para[i].link_addr > 0)
- temp_dma_lli_params[i].link_addr = dma_lli_phy_addr[channel_id] + sizeof(dma_lli_param)*(i+1);
- else
- {
- if(chan_para[i].dma_control.irq_mode > DMA_ALL_IRQ_DISABLE)
- temp_dma_lli_params[i].control |= DMA_CTRL_IRQ_MOD(DMA_ALL_IRQ_ENABLE);
-
- temp_dma_lli_params[i].link_addr = 0;
- }
-
-// i++;
- }while(chan_para[i++].link_addr);
-
- dma_sync_lli_for_device(channel_id);
-}
-
-signed int zx29_dma_config(struct dma_chan *chan,
- struct dma_slave_config *cfg)
-{
- struct zx29_dma_channel *dma_channel;
- dma_peripheral_id peripheral_id;
- unsigned int channel_id;
- dma_channel_def *chan_para;
-
- if (!cfg || !chan)
- return -EINVAL;
-
- dma_channel = to_zx29_dma_chan(chan);
- peripheral_id = dma_channel->peripheral_id;
-
- channel_id = get_channel_id(peripheral_id);
-
- if(dma_dev.chan_config[channel_id].is_used == false)
- return -EINVAL;
-
- chan_para = (dma_channel_def *)cfg;
- if (chan_para->dma_control.tran_mode>=DMA_TRAN_MOD_ALL\
- ||chan_para->dma_control.irq_mode>=DMA_IRQMOD_ALL\
- ||chan_para->dma_control.src_burst_size>=DMA_BURST_SIZE_ALL\
- ||chan_para->dma_control.src_burst_len>=DMA_BURST_LEN_ALL\
- ||chan_para->dma_control.dest_burst_size>=DMA_BURST_SIZE_ALL\
- ||chan_para->dma_control.dest_burst_len>=DMA_BURST_LEN_ALL)
- {
- return -EINVAL;
- }
-
- /* config lli */
- dma_config_lli(channel_id, chan_para);
-
- /* config regs */
-#if 0
- dma_dev.chan_config[channel_id].channel_callback = chan_para->callback;
- dma_dev.chan_config[channel_id].data = chan_para->data;
-#endif
-
- return 0;//dma_set_chan_para((unsigned int)peripheral_id, chan_para);
-}
-
-signed int zx29_dma_start(unsigned int channel_id)
-{
- volatile dma_regs __iomem * pReg = dma_dev.reg;
-
- if(channel_id >= DMA_CH_NUM)
- {
- BUG();
- return -EINVAL;
- }
-
- dsb();
-
- pReg->channel[channel_id].control |= DMA_CTRL_ENABLE(DMA_ENABLE);
-
- return 0;
-}
-
-signed int zx29_dma_stop(unsigned int channel_id)
-{
- volatile dma_regs __iomem * pReg = dma_dev.reg;
-
- if(channel_id >= DMA_CH_NUM)
- return -EINVAL;
-
- //pReg->channel[channel_id].control &= ~(DMA_CTRL_ENABLE(DMA_ENABLE));
- pReg->channel[channel_id].control |= DMA_CTRL_FORCE_CLOSE(1);//change by gsn for linuxDMA
- return 0;
-}
-signed int zx29_dma_get_transfer_num(unsigned int channel_id)
-{
- volatile dma_regs __iomem * pReg = dma_dev.reg;
- if(channel_id >= DMA_CH_NUM)
- return -EINVAL;
- return (pReg->channel[channel_id].xpara);
-}
-
-signed int zx29_dma_set_priority(dma_group_order groupOrder, dma_group_mode groupMode)
-{
- if(groupOrder >= DMA_GROUP_ALL ||groupMode >= DMA_MODE_ALL)
- return -EINVAL;
-
- dma_dev.reg->group_order = groupOrder;
- dma_dev.reg->arbit_mode = groupMode;
-
- return 0;
-}
-
-static dma_cookie_t zx29_dma_tx_submit(struct dma_async_tx_descriptor *tx)
-{
- dma_trace_submit(tx);
-
- return dma_cookie_assign(tx);
-}
-
-static int zx29_dma_alloc_chan_resources(struct dma_chan *chan)
-{
- int ret = 0;
- struct zx29_dma_channel *dma_channel = to_zx29_dma_chan(chan);
-
- ret = zx29_dma_request(dma_channel->req_peripheral_id);
- if(ret < 0)
- return ret;
-
- dma_async_tx_descriptor_init(&dma_channel->desc, chan);
- dma_channel->desc.tx_submit = zx29_dma_tx_submit;
-
- /* the descriptor is ready */
- async_tx_ack(&dma_channel->desc);
-
- return ret;
-}
-
-void zx29_dma_free_chan_resource(struct dma_chan *chan)
-{
- struct zx29_dma_channel *dma_channel = to_zx29_dma_chan(chan);
- dma_reset_chan(dma_channel);
-}
-
-static struct dma_async_tx_descriptor *zx29_prep_dma_cyclic(
- struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
- size_t period_len, enum dma_transfer_direction direction,
- unsigned long context)
-{
- struct zx29_dma_channel *dma_channel = to_zx29_dma_chan(chan);
- struct dma_async_tx_descriptor *desc = &dma_channel->desc;
- unsigned int channel_id = get_channel_id(dma_channel->peripheral_id);
- int num_periods = buf_len / period_len;
- int i = 0;
- dma_lli_param *temp_dma_lli_params;
-
- if (channel_id >= DMA_CH_NUM)
- return NULL;
-// change by gsn for linuxDMA
- //if(dma_channel->status == DMA_IN_PROGRESS)
- //return NULL;
- dma_channel->status = DMA_IN_PROGRESS;
-
- temp_dma_lli_params = dma_lli_params[channel_id];
-
- dma_sync_lli_for_cpu(channel_id);
- for (i = 0; i < num_periods; i++)
- {
- temp_dma_lli_params[i].control |= DMA_CTRL_IRQ_MOD(DMA_ALL_IRQ_ENABLE);
- }
- temp_dma_lli_params[num_periods - 1].link_addr = dma_lli_phy_addr[channel_id];
- dma_sync_lli_for_device(channel_id);
-
- dma_channel->cyclic = 1;
-
- desc->callback = NULL;
- desc->callback_param = NULL;
-
- dma_set_chan_para(dma_channel->peripheral_id);
-
- return desc;
-}
-
-static struct dma_async_tx_descriptor *zx29_prep_dma_interleaved(
- struct dma_chan *chan,
- struct dma_interleaved_template *xt,
- unsigned long flags)
-{
- struct zx29_dma_channel *dma_channel = to_zx29_dma_chan(chan);
- struct dma_async_tx_descriptor *desc = &dma_channel->desc;
-
-// change by gsn for linuxDMA
- //if(dma_channel->status == DMA_IN_PROGRESS)
- //return NULL;
- dma_channel->status = DMA_IN_PROGRESS;
-
- desc->callback = NULL;
- desc->callback_param = NULL;
-
- dma_set_chan_para(dma_channel->peripheral_id);
-
- return desc;
-}
-
-static int zx29_dma_terminate_all(struct dma_chan *chan)
-{
- struct zx29_dma_channel *dma_channel = to_zx29_dma_chan(chan);
-
- return dma_disable_chan(dma_channel);
-}
-
-static void zx29_dma_issue_pending(struct dma_chan *chan)
-{
- struct zx29_dma_channel *dma_channel = to_zx29_dma_chan(chan);
-
- dma_trace_pending(dma_channel->peripheral_id);
-
- zx29_dma_start(dma_channel->peripheral_id);
-}
-
-unsigned int zx29_dma_get_status(void)
-{
- volatile dma_regs __iomem * pReg = dma_dev.reg;
-
- return pReg->working_status;
-}
-
-bool zx29_dma_filter_fn(struct dma_chan *chan, void *param)
-{
- struct zx29_dma_channel * channel = to_zx29_dma_chan(chan);
- unsigned int channel_id = 0;
- dma_peripheral_id peri_id = 0;
-
- peri_id = get_real_peri_id((dma_peripheral_id)param);
- if(peri_id >= DMA_CH_NUM)
- return false;
-
- channel_id = get_channel_id(channel->peripheral_id);
- if(channel_id == 0xff)
- return false;
-
- if(peri_id == DMA_CH_MEMORY)
- {
-
- if ((dma_dev.chan_config[channel_id].is_used == false)&& \
- (dma_chan_check_lock(dma_dev.chan_config[channel_id].peripheral_id)==false)&& \
- (dma_dev.chan_config[channel_id].enable_mem2mem==true))
- {
- channel->req_peripheral_id = channel->peripheral_id;
- return true;
- }
- else
- return false;
- }
-
- if (channel->peripheral_id != peri_id)
- return false;
-
- if ((dma_dev.chan_config[channel_id].is_used == false)&& \
- (dma_chan_check_lock(dma_dev.chan_config[channel_id].peripheral_id)==false))
- {
- channel->req_peripheral_id = (dma_peripheral_id)param;
- return true;
- }
- else
- return false;
-}
-EXPORT_SYMBOL(zx29_dma_filter_fn);
-
-irqreturn_t dma_Isr(int irq, void *dev)
-{
- unsigned int need_continue = 0;
- unsigned int i;
- struct zx29_dma *dmac_ptr = dev;
- dma_regs __iomem * dma_reg=dmac_ptr->reg;
- volatile unsigned int control;
- volatile unsigned int raw_tc_int = dma_reg->raw_int_tc_status;
- volatile unsigned int raw_src_err_int = dma_reg->raw_int_src_err_status;
- volatile unsigned int raw_dest_err_int = dma_reg->raw_int_dest_err_status;
- volatile unsigned int raw_cfg_err_int = dma_reg->raw_int_cfg_err_status;
- volatile unsigned int tc_int = dma_reg->int_tc_status;
-
- unsigned int channel_id;
-
- /* error */
- if (raw_src_err_int!=0 || raw_dest_err_int!=0 || raw_cfg_err_int!=0)
- {
- for (i=0; i<DMA_CH_NUM; i++)
- {
- if ((raw_src_err_int|raw_dest_err_int|raw_cfg_err_int)&(0x01<<i))
- {
- channel_id = get_channel_id(i);
- if(channel_id >= DMA_CH_NUM)
- continue;
-
- dmac_ptr->dma_chan[channel_id].status = DMA_ERROR;
- dma_trace_err(i);
- }
- }
-
- BUG();
-
-/* dma_reg->raw_int_src_err_status |= raw_src_err_int ;
- dma_reg->raw_int_dest_err_status |= raw_dest_err_int ;
- dma_reg->raw_int_cfg_err_status |= raw_cfg_err_int ;
-
- return IRQ_HANDLED;*/
- }
-
-
- do
- {
- need_continue = 0;
-
- tc_int = dma_reg->int_tc_status;
- raw_tc_int = dma_reg->raw_int_tc_status;
-
- for (i = 0;(i< DMA_CH_NUM)&&(raw_tc_int!=0); i++)
- {
- if (raw_tc_int&(0x01<<i))
- {
- control = dma_reg->channel[i].control;
- channel_id = get_channel_id(i);
- /*dma_reg->raw_int_tc_status = (0x1<<i);*//*clear here may create error clear*/
-
- if(channel_id >= DMA_CH_NUM)
- continue;
-
- if(((control&DMA_CTRL_INTERRUPT_SEL(0xf))==DMA_CTRL_INTERRUPT_SEL(ZX29_DMA_INT_SEL))&&\
- (control&DMA_CTRL_IRQ_MOD(1))&&\
- ( ((control&DMA_CTRL_ENABLE(1)) == 0) || ((dmac_ptr->dma_chan[channel_id].cyclic)&&(tc_int&(0x1<<i))) ) )
- {
- dma_reg->raw_int_tc_status = (0x1<<i);
- need_continue = 1;
- dma_trace_success(i);
-
- //channel_id = get_channel_id(i);
- dmac_ptr->dma_chan[channel_id].status = DMA_SUCCESS;
- if(dmac_ptr->dma_chan[channel_id].cyclic == 0)
- {
- dma_cookie_complete(&dmac_ptr->dma_chan[channel_id].desc);
- }
-#ifdef CONFIG_PREEMPT_RT_FULL
- if (dmac_ptr->dma_chan[channel_id].desc.callback)
- dmac_ptr->dma_chan[channel_id].desc.callback(dmac_ptr->dma_chan[channel_id].desc.callback_param);
-#else
- /* schedule tasklet on this channel */
- tasklet_schedule(&dmac_ptr->dma_chan[channel_id].tasklet);
-#endif
- }
- }
- }
- }while(need_continue);
-
- return IRQ_HANDLED;
-}
-
-#if ZX29_DMA_TEST
-
-#define DMA_LLI_TEST 0
-
-#if DMA_LLI_TEST
-#define MEM_CPY_CNT (3)
-#else
-#define MEM_CPY_CNT (1)
-#endif
-
-#define MEM_TEST_COUNT (0x200)
-
-static unsigned int dma_int_count = 0;
-static unsigned char * test_buffer = NULL;
-static dma_addr_t test_phy_addr;
-static struct dma_chan * test_chan = NULL;
-
-void dma_cb(struct zx29_dma_channel * chan)
-{
- int i;
-
-// dma_sync_single_for_cpu(dma_dev.dma.dev, test_phy_addr, MEM_TEST_COUNT*2, DMA_BIDIRECTIONAL);
- dma_unmap_single(dma_dev.dma.dev, test_phy_addr, MEM_TEST_COUNT*2*MEM_CPY_CNT, DMA_BIDIRECTIONAL);
-
- for(i=0; i<MEM_CPY_CNT; i++)
- {
- if(memcmp(test_buffer+MEM_TEST_COUNT*2*i,
- test_buffer+MEM_TEST_COUNT+MEM_TEST_COUNT*2*i,
- MEM_TEST_COUNT))
- {
- pr_info("[DMA] m2m test copy failed(%d). \n", i+1);
- }
- }
-
- kfree(test_buffer);
- if (test_chan)
- dma_release_channel(test_chan);
-
- pr_info("[DMA] m2m test copy succeeded (%d). \n", ++dma_int_count);
-
-}
-
-static void *test_prepare_buff(size_t size)
-{
- int i;
-
- /* alloc buffer */
- test_buffer = kzalloc(size, GFP_KERNEL);
- if (!test_buffer) {
- dev_err(dma_dev.dma.dev, "%s: could not alloc DMA memory\n",
- __func__);
- BUG();
- }
- pr_info("[DMA] m2m test alloc buffer (%x). \n", (unsigned int)test_buffer);
-
- /* prepare data */
- for(i=0; i<MEM_CPY_CNT; i++)
- memset(test_buffer+MEM_TEST_COUNT*2*i, 0x11+0x11*i, MEM_TEST_COUNT);
-
- return test_buffer;
-}
-
-static struct dma_chan *test_alloc_channel(void)
-{
- dma_cap_mask_t mask;
-
- dma_cap_zero(mask);
- dma_cap_set(DMA_SLAVE, mask);
-
- return dma_request_channel(mask, zx29_dma_filter_fn, (void*)DMA_CH_MEMORY);
-}
-
-static signed int test_dma_config(struct dma_chan *chan, dma_addr_t phy_addr)
-{
- dma_channel_def temp[MEM_CPY_CNT];
- int i;
-
- memset(temp, 0, sizeof(temp));
- for(i=0; i<MEM_CPY_CNT; i++)
- {
- temp[i].src_addr = phy_addr + MEM_TEST_COUNT*2*i;
- temp[i].dest_addr = temp[i].src_addr + MEM_TEST_COUNT;
- temp[i].count = MEM_TEST_COUNT;
-// temp[i].callback = (dma_callback_func)dma_cb;
-
- temp[i].dma_control.tran_mode = TRAN_MEM_TO_MEM;
- temp[i].dma_control.src_burst_size = DMA_BURST_SIZE_8BIT;
- temp[i].dma_control.src_burst_len = DMA_BURST_LEN_16;
- temp[i].dma_control.dest_burst_size = DMA_BURST_SIZE_8BIT;
- temp[i].dma_control.dest_burst_len = DMA_BURST_LEN_16;
- temp[i].dma_control.irq_mode = DMA_ALL_IRQ_ENABLE;
-
- temp[i].link_addr = 1;
- }
- temp[MEM_CPY_CNT-1].link_addr = 0;
-
- return dmaengine_slave_config(chan,(struct dma_slave_config*)&temp);
-}
-
-
-//static
-void dma_m2m_test(struct device *dev)
-{
- struct dma_async_tx_descriptor *desc =NULL;
- struct zx29_dma_channel * zx29_chan = NULL;
- unsigned char *p = NULL;
- int ret = 0;
-
- p = test_prepare_buff(MEM_TEST_COUNT*2*MEM_CPY_CNT);
-
- /* alloc dma channel */
- test_chan = test_alloc_channel();
- if (!test_chan)
- {
- pr_info("[DMA]test request channel failed \n");
- return;
- }
-
- /* map dma address */
- test_phy_addr = dma_map_single(dma_dev.dma.dev, (void *)p, MEM_TEST_COUNT*2*MEM_CPY_CNT, DMA_BIDIRECTIONAL);
- if (dma_mapping_error(dma_dev.dma.dev, test_phy_addr)) {
- dev_err(dma_dev.dma.dev, "Failed to dma_map_single\n");
- BUG();
- }
-
- /* config dma */
- ret = test_dma_config(test_chan, test_phy_addr);
- if(ret < 0)
- printk("dmaengine_slave_config failed(%d)~~~~~~", ret);
-
- /* start transfer */
- zx29_chan = to_zx29_dma_chan(test_chan);
-#if 0
- desc = zx29_chan->dma_device->dma.device_prep_interleaved_dma(test_chan,NULL,0);
- desc->callback = (dma_async_tx_callback)dma_cb;
- desc->callback_param = (void *) zx29_chan;
-#else
- desc = test_chan->device->device_prep_interleaved_dma(test_chan,NULL,0);
- desc->callback = (dma_async_tx_callback)dma_cb;
- desc->callback_param = (void *) zx29_chan;
-#endif
- zx29_chan->zx29_dma_cookie = dmaengine_submit(desc);
- dma_async_issue_pending(test_chan);
-
- return ;
-}
-
-
-static ssize_t dma_m2m_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- return sprintf(buf, "dma_int_count:%d\n", dma_int_count);
-}
-
-static ssize_t dma_m2m_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
-{
- dma_m2m_test(dev);
-
- return (count);
-}
-
-static DEVICE_ATTR(dma,0600,dma_m2m_show,dma_m2m_store);
-static struct attribute *zx29_dma_attributes[] = {
- &dev_attr_dma.attr,
- NULL,
-};
-
-static const struct attribute_group zx29_dma_attribute_group = {
- .attrs = (struct attribute **) zx29_dma_attributes,
-};
-#endif
-
-static void dma_init_channels(void)
-{
- int i = 0;
- struct zx29_dma_channel * dma_chan_ptr = NULL;
-
- dma_dev.chan_config = dma_chan_config;
- dma_dev.channel_count = ARRAY_SIZE(dma_chan_config);
-
- INIT_LIST_HEAD(&dma_dev.dma.channels);
-
- for(i=0;i<dma_dev.channel_count;i++)
- {
- dma_chan_ptr = &dma_dev.dma_chan[i];
- dma_chan_ptr->peripheral_id = dma_dev.chan_config[i].peripheral_id;
- dma_chan_ptr->dma_device = &(dma_dev);
- dma_chan_ptr->chan.device = &(dma_dev.dma);
- dma_cookie_init(&dma_chan_ptr->chan);
-
- tasklet_init(&dma_chan_ptr->tasklet, dma_tasklet, (unsigned long)(dma_chan_ptr));
-
- list_add_tail(&dma_chan_ptr->chan.device_node, &dma_dev.dma.channels);
- }
-}
-
-static u64 general_dma_mask = DMA_BIT_MASK(32);
-
-static int dma_init_resource(struct platform_device* pdev)
-{
- int ret = 0;
- int irq;
- int i;
- struct device_node *np = pdev->dev.of_node;
-
- /* registers */
- dma_dev.reg = (dma_regs *)of_iomap(np, 0);
- if ( !dma_dev.reg ) {
- dev_err(&pdev->dev, "[DMA]Cannot get IORESOURCE_MEM\n");
- return -ENOENT;
- }
-
- dma_pub_configs = (dma_pub_config *)(dma_regs *)of_iomap(np, 1);
- if ( !dma_pub_configs ) {
- dev_err(&pdev->dev, "[DMA]Cannot get IORESOURCE_MEM 1\n");
- return -ENOENT;
- }
- // only for test
-// memset((u8 *)dma_pub_configs, 0, 0x80);
-
- /* irq */
- irq = irq_of_parse_and_map(np, 0);
- if( !irq ) {
- dev_err(&pdev->dev, "[DMA]Cannot get IORESOURCE_IRQ\n");
- return -ENOENT;
- }
- dma_dev.reg->irq_type = 0xF; /* high level for all cores */
- ret = request_irq(irq, dma_Isr, IRQF_NO_THREAD, "zx29dma", &dma_dev);
- if(ret)
- return ret;
-
- /* memory for lli */
- for(i=0; i<ARRAY_SIZE(dma_chan_config); i++)
- {
- dma_lli_params[i] = kzalloc(MAX_LLI_PARAMS_CNT, GFP_KERNEL);
- if (!dma_lli_params[i]) {
- int j;
- dev_err(&pdev->dev, "[DMA]%s: could not alloc memory for lli[%d].\n",
- __func__, i);
- for(j=0; j<i; j++)
- {
- dma_unmap_single(&pdev->dev, dma_lli_phy_addr[j], MAX_LLI_PARAMS_CNT, DMA_BIDIRECTIONAL);
- kfree(dma_lli_params[j]);
- dma_lli_phy_addr[j]=0;
- dma_lli_params[j]=NULL;
- }
- return -ENOENT;
- }
-
- dma_lli_phy_addr[i] = dma_map_single(&pdev->dev, dma_lli_params[i], MAX_LLI_PARAMS_CNT, DMA_BIDIRECTIONAL);
- }
-
- return 0;
-}
-
-static int dma_register_device(struct platform_device* pdev)
-{
- dma_cap_zero(dma_dev.dma.cap_mask);
- dma_cap_set(DMA_SLAVE, dma_dev.dma.cap_mask);
- dma_cap_set(DMA_CYCLIC, dma_dev.dma.cap_mask);
- dma_cap_set(DMA_INTERLEAVE, dma_dev.dma.cap_mask);
-
- dma_dev.dma.device_alloc_chan_resources = zx29_dma_alloc_chan_resources;
- dma_dev.dma.device_free_chan_resources = zx29_dma_free_chan_resource;
- dma_dev.dma.device_tx_status = zx29_dma_tx_status;
- dma_dev.dma.device_config = zx29_dma_config;
- dma_dev.dma.device_terminate_all = zx29_dma_terminate_all;
- dma_dev.dma.device_prep_dma_cyclic = zx29_prep_dma_cyclic;
- dma_dev.dma.device_prep_interleaved_dma = zx29_prep_dma_interleaved;
- dma_dev.dma.device_issue_pending = zx29_dma_issue_pending;
-
- dma_dev.dma.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
- BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
- BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
- BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
- dma_dev.dma.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
- BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
- BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
- BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
- dma_dev.dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) | BIT(DMA_MEM_TO_MEM);
-
- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
- pdev->dev.dma_mask = &general_dma_mask;
-
- dma_dev.dma.dev = &pdev->dev;
- return dma_async_device_register(&dma_dev.dma);
-}
-
-static int zx29_dma_probe(struct platform_device* pdev)
-{
- int ret = 0;
-
- /* resource */
- ret = dma_init_resource(pdev);
- if(ret)
- {
- pr_info("[DMA]get resource failed!\n");
- return ret;
- }
-
- /* channel info */
- dma_init_channels();
-
- /* register device */
- ret = dma_register_device(pdev);
- if (ret)
- {
- dev_info(dma_dev.dma.dev, "[DMA]unable to register\n");
- return -EINVAL;
- }
-
- pr_info("[DMA]zx297520v DMA initialized\n");
-
- return 0;
-}
-
-static const struct of_device_id zx29_dma_dt_ids[] = {
- { .compatible = "arm,zx297520v3-dma" },
- {}
-};
-MODULE_DEVICE_TABLE(of, zx29_dma_dt_ids);
-
-struct platform_driver zx29_dma_driver = {
- .driver = {
- .name = "zx29_dma",
- .of_match_table = of_match_ptr(zx29_dma_dt_ids),
- },
- .probe = zx29_dma_probe,
-};
-static int __init zx29_dma_driver_init(void)
-{
- return platform_driver_register(&zx29_dma_driver);
-}
-subsys_initcall(zx29_dma_driver_init);
-
-
-/**
- * "/sys/zte/test/dma_test"
- */
-extern struct kobject *zx_test_kobj;
-int __init zx_dma_test_init(void)
-{
-#if ZX29_DMA_TEST
- int ret;
-
- ret = sysfs_create_group(zx_test_kobj, &zx29_dma_attribute_group);
- if (!ret)
- pr_debug("[DEBUG] create test dma sysfs interface OK.\n");
-#endif
-
- return 0;
-}
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/zx297520v3_dma.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/zx297520v3_dma.h
deleted file mode 100644
index 816fb08..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/zx297520v3_dma.h
+++ /dev/null
@@ -1,132 +0,0 @@
-#ifndef _MACH_ZX297520V3_DMA_H
-#define _MACH_ZX297520V3_DMA_H
-
-#include <linux/dma/zx-dma.h>
-
-typedef enum
-{
- DMA_INT_ERR, //transmission error
- DMA_INT_END, //transmission done
-
- MAX_DMA_INT
-}dma_int_status;
-
-//typedef void (*dma_callback_func)(unsigned int channel, dma_int_status status,void *data);
-
-
-/*----DMA Transfer Control Set------*/
-typedef enum
-{
- DMA_DISABLE = 0, //disable DMA transmission
- DMA_ENABLE = 1, //enable DMA transmission
- DMA_ENABLE_ALL
-}dma_control_enable;
-
-/*----DMA Request mode set------*/
-typedef enum
-{
- DMA_PERIPHERAL_REQ = 0, //peripheral request
- DMA_SOFT_REQ = 1, //soft request for single transfer
-
- DMA_REQ_MOD_ALL
-}dma_req_mode;
-
-/*----DMA SingleRequest mode set------*/
-typedef enum
-{
- DMA_SOFT_SINGLE_REQ_DISABLE = 0, //soft request for single transfer
- DMA_SOFT_SINGLE_REQ_ENABLE = 1, //soft request for burst transfer
-
- DMA_SINGLE_REQ_MOD_ALL
-}dma_single_req_mod;
-
-
-/*----DMA Source or Dest address mode------*/
-typedef enum
-{
- DMA_ADDRMOD_RAM = 0, //RAM mode, address will increase during transmission
- DMA_ADDRMOD_FIFO = 1, //FIFO mode, address will not change during transmission
-
- DMA_ADDRMOD_ALL
-}dma_addr_mode;
-
-
-typedef enum
-{
- DMA_INT_TO_PHY=0,
- DMA_INT_TO_PS,
- DMA_INT_TO_M0,
- DMA_INT_TO_A9,
-
-
- DMA_INT_SEL_ALL
-}dma_int_sel;
-
-typedef enum
-{
- CHANNEL_DISABLE,
- CHANNEL_ENABLE,
-
- MAX_CHANNEL_STATUS
-}dma_channel_satus;
-
-typedef enum
-{
- SYS_RST_ACTIVE=0,
- SYS_RST_RELEASE=1
-}sys_reset_state;
-
-/*----DMA priorty------*/
-typedef enum
-{
- DMA_PRIORTY_LEVEL0 = 0,
- DMA_PRIORTY_LEVEL1, /* ÿ¸öͨµÀ4×éÓÅÏȼ¶£¬00 ×î¸ß */
- DMA_PRIORTY_LEVEL2, /* ÓÅÏȼ¶ÏàͬµÄͨµÀÂÖѯ */
- DMA_PRIORTY_LEVEL3,
- DMA_PRIORTY_ALL
-} dma_priorty;
-
-/*dma channel reg define*/
-typedef struct
-{
- volatile unsigned int src_addr; /**< offset:0x0, R/W */
- volatile unsigned int dest_addr; /**< offset:0x4, R/W */
- volatile unsigned int xpara; /**< offset:0x8, R/W */
- volatile unsigned int yzpara; /**< offset:0xc, R/W */
- volatile unsigned int src_yzstep; /**< offset:0x10, R/W */
- volatile unsigned int dest_yzstep; /**< offset:0x14, R/W */
- volatile unsigned int reserved0; /**< offset:0x18, R/W */
- volatile unsigned int link_addr; /**< offset:0x1c, R/W */
- volatile unsigned int control; /**< offset:0x20, R/W */
- volatile unsigned int reserved1[7];
-}dma_chan_reg;
-
-/*dma device reg module define*/
-typedef struct
-{
- dma_chan_reg channel[32];
- volatile unsigned int int_tc_status; /**< offset:0x800, R */
- volatile unsigned int int_src_err_status; /**< offset:0x804, R */
- volatile unsigned int int_dest_err_status; /**< offset:0x808, R */
- volatile unsigned int int_cfg_err_status; /**< offset:0x80c, R */
- volatile unsigned int raw_int_tc_status; /**< offset:0x810, R/C */
- volatile unsigned int raw_int_src_err_status; /**< offset:0x814, R/C */
- volatile unsigned int raw_int_dest_err_status; /**< offset:0x818, R/C */
- volatile unsigned int raw_int_cfg_err_status; /**< offset:0x81c, R/C */
- volatile unsigned int working_status; /**< offset:0x820, R */
- volatile unsigned int group_order; /**< offset:0x824, R/W */
- volatile unsigned int arbit_mode; /**< offset:0x828, R/W */
- volatile unsigned int irq_type; /**< offset:0x82c, R/W */
-}dma_regs;
-
-signed int zx298501_dma_request(dma_peripheral_id peripheralID);
-//signed int zx298501_dma_config(unsigned int channel,dma_channel_def *tChanPar);
-signed int zx298501_dma_start(unsigned int channel);
-signed int zx298501_dma_stop(unsigned int channel);
-
-unsigned int zx298501_dma_get_status(void);
-
-extern void dma_m2m_test(struct device *dev);
-
-#endif
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/pinctrl/zte/pinctrl-zx297520v3.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/pinctrl/zte/pinctrl-zx297520v3.c
deleted file mode 100644
index 9a8fc10..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/pinctrl/zte/pinctrl-zx297520v3.c
+++ /dev/null
@@ -1,1617 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2017 Sanechips Technology Co., Ltd.
- * Copyright 2017 Linaro Ltd.
- */
-
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_device.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/pinctrl/pinmux.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-
-#include "../core.h"
-#include "../pinctrl-utils.h"
-#include "../pinmux.h"
-
-#include <dt-bindings/pinctrl/zx297520v3-pinctrl.h>
-#include "pinctrl-zx297520v3.h"
-#include <linux/soc/zte/spinlock.h>
-
-#define pin_log pr_debug
-
-/* 2bit */
-#define ZX_PE BIT(0) /* pull enable */
-#define ZX_PS BIT(1) /* 1-PU 0-PD */
-
-/* 8bit */
-#define ZX_PULL_UP BIT(5)
-#define ZX_PULL_DOWN BIT(6)
-#define ZX_ST BIT(4) /* schmitt trigger */
-#define ZX_DS_SHIFT 0
-#define ZX_DS_MASK (0x7 << ZX_DS_SHIFT)
-#define ZX_DS_VALUE(x) (((x) << ZX_DS_SHIFT) & ZX_DS_MASK)
-#define ZX_INPUT_ENABLE BIT(3)
-#define ZX_SLEW BIT(7)
-
-#define ZX_PINMUX_LOCK reg_spin_lock();
-#define ZX_PINMUX_UNLOCK reg_spin_unlock();
-
-struct zx_pinctrl {
- struct pinctrl_dev *pctldev;
- struct device *dev;
- void __iomem *base;
- void __iomem *pd_base;
- spinlock_t lock;
- struct zx_pinctrl_soc_info *info;
-};
-
-static const struct pinctrl_ops zx_pinctrl_ops = {
- .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
- .dt_free_map = pinctrl_utils_free_map,
- .get_groups_count = pinctrl_generic_get_group_count,
- .get_group_name = pinctrl_generic_get_group_name,
- .get_group_pins = pinctrl_generic_get_group_pins,
-};
-
-static void zx_write_mux(struct zx_pinctrl *zpctl, struct zx_pin_data *data, struct zx_mux_desc *mux)
-{
- u32 toffset, tbitpos;
- u32 mask, bitpos, width;
- void __iomem *reg;
- unsigned long flags;
- u32 val;
-
- if (data->top) {
- toffset = data->toffset;
- tbitpos = data->tbitpos;
- }
-
- if (mux->mux_val & PD_MUX_FLAG) {
- width = data->pwidth;
- mask = (1 << data->pwidth) - 1;
- bitpos = data->pbitpos;
- reg = zpctl->pd_base + data->poffset;
- } else {
- width = data->awidth;
- mask = (1 << data->awidth) - 1;
- bitpos = data->abitpos;
- reg = zpctl->base + data->aoffset;
- }
-
- spin_lock_irqsave(&zpctl->lock, flags);
-
- ZX_PINMUX_LOCK
-
- if (data->top) {
- val = readl(zpctl->base + toffset);
- pin_log("%s: top off(0x%x) bit(%d) cur_val(0x%x)\n", __func__, toffset, tbitpos, val);
- if (mux->mux_val & PD_MUX_FLAG)
- val |= (1 << tbitpos);
- else
- val &= ~(1 << tbitpos);
- writel(val, zpctl->base + toffset);
- pin_log("%s: top off(0x%x) bit(%d) rb_val(0x%x)\n", __func__, toffset, tbitpos, readl(zpctl->base + toffset));
- }
-
- if (width != 0) {
- val = readl(reg);
- pin_log("%s: pin reg(0x%x) bit(%d) mux_val(%d) cur_val(0x%x)\n", __func__, (u32)reg, bitpos, mux->mux_val, val);
- val &= ~(mask << bitpos);
- val |= (mux->mux_val & mask) << bitpos;
- writel(val, reg);
- pin_log("%s: pin off(0x%x) bit(%d) mux_val(%d) val(0x%x)\n", __func__, (u32)reg, bitpos, mux->mux_val, readl(reg));
- }
-
- ZX_PINMUX_UNLOCK
-
- spin_unlock_irqrestore(&zpctl->lock, flags);
-}
-
-static int zx_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector,
- unsigned int group_selector)
-{
- struct zx_pinctrl *zpctl = pinctrl_dev_get_drvdata(pctldev);
- struct zx_pinctrl_soc_info *info = zpctl->info;
- const struct pinctrl_pin_desc *pindesc = info->pins + group_selector;
- struct zx_pin_data *data = pindesc->drv_data;
- struct zx_mux_desc *mux;
- struct function_desc *func;
-
- /* Skip reserved pin */
- if (!data)
- return -EINVAL;
-
- mux = data->muxes;
-
- func = pinmux_generic_get_function(pctldev, func_selector);
- if (!func)
- return -EINVAL;
-
- if (strcmp(func->name, FUNC_NOMUX) == 0)
- return 0;
-
- while (mux->name) {
- if (strcmp(mux->name, func->name) == 0)
- break;
- mux++;
- }
-
- pin_log("%s:pin(%s) func(%s)\n", __func__, pindesc->name, mux->name);
- zx_write_mux(zpctl, data, mux);
-
- return 0;
-}
-
-static int zx_gpio_request_enable(struct pinctrl_dev *pctldev,
- struct pinctrl_gpio_range *range,
- unsigned pin_num)
-{
- struct zx_pinctrl *zpctl = pinctrl_dev_get_drvdata(pctldev);
- struct zx_pinctrl_soc_info *info = zpctl->info;
- const struct pinctrl_pin_desc *pindesc = info->pins + pin_num;
- struct zx_pin_data *data = pindesc->drv_data;
- struct zx_mux_desc *mux;
-
- /* Skip reserved pin */
- if (!data)
- return -EINVAL;
-
- mux = data->muxes;
-
- while (mux->name) {
- if (strcmp(mux->name, FUNC_GPIO) == 0)
- break;
- mux++;
- }
-
- pin_log("%s:pin(%s) func(%s)\n", __func__, pindesc->name, mux->name);
- zx_write_mux(zpctl, data, mux);
-
- /* pinconf also ... */
-/* return zx_write_config(zpctl, data, configs, num_configs); */
-
- return 0;
-
-}
-
-static const struct pinmux_ops zx_pinmux_ops = {
- .get_functions_count = pinmux_generic_get_function_count,
- .get_function_name = pinmux_generic_get_function_name,
- .get_function_groups = pinmux_generic_get_function_groups,
- .set_mux = zx_set_mux,
- .gpio_request_enable = zx_gpio_request_enable,
-};
-
-static int zx_pin_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
- unsigned long *config)
-{
- struct zx_pinctrl *zpctl = pinctrl_dev_get_drvdata(pctldev);
- struct zx_pinctrl_soc_info *info = zpctl->info;
- const struct pinctrl_pin_desc *pindesc = info->pins + pin;
- struct zx_pin_data *data = pindesc->drv_data;
- enum pin_config_param param = pinconf_to_config_param(*config);
- u32 val;
-
- /* Skip reserved pin */
- if (!data)
- return -EINVAL;
-
- val = readl(zpctl->base + data->coffset);
- val = val >> data->cbitpos;
-
- switch (param) {
- case PIN_CONFIG_BIAS_PULL_DOWN:
- if (data->cwidth == 2) {
- if (val & ZX_PE) {
- val &= ZX_PS;
- val = !!val;
- if (val==0) {
- val = 1;
- break;
- }
- }
- return -EINVAL;
- } else {
- val &= ZX_PULL_DOWN;
- val = !!val;
- if (val == 0)
- return -EINVAL;
- }
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- if (data->cwidth == 2) {
- if (val & ZX_PE) {
- val &= ZX_PS;
- val = !!val;
- if (val==1) {
- break;
- }
- }
- return -EINVAL;
- } else {
- val &= ZX_PULL_UP;
- val = !!val;
- if (val == 0)
- return -EINVAL;
- }
- break;
- case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
- if (data->cwidth == 2)
- return -ENOTSUPP;
-
- val &= ZX_ST;
- val = !!val;
- if (val == 0)
- return -EINVAL;
- break;
- case PIN_CONFIG_DRIVE_STRENGTH:
- if (data->cwidth == 2)
- return -ENOTSUPP;
-
- val &= ZX_DS_MASK;
- val = val >> ZX_DS_SHIFT;
- break;
-
- case PIN_CONFIG_INPUT_ENABLE:
- if (data->cwidth == 2)
- return -ENOTSUPP;
-
- val &= ZX_INPUT_ENABLE;
- val = !!val;
- if (val == 0)
- return -EINVAL;
- break;
- default:
- return -ENOTSUPP;
- }
-
- *config = pinconf_to_config_packed(param, val);
-
- return 0;
-}
-
-static int zx_write_config(struct zx_pinctrl *zpctl, struct zx_pin_data *data,
- unsigned long *configs, unsigned int num_configs)
-{
- enum pin_config_param param;
- u32 val, arg;
- unsigned long flags;
- int i;
-
- spin_lock_irqsave(&zpctl->lock, flags);
- ZX_PINMUX_LOCK
-
- val = readl(zpctl->base + data->coffset);
- pin_log("%s: coffset(0x%x) bp(%d) wid(%d) cur value (0x%x)\n", __func__, data->coffset,
- data->cbitpos, data->cwidth, val);
-
- for (i = 0; i < num_configs; i++) {
- param = pinconf_to_config_param(configs[i]);
- arg = pinconf_to_config_argument(configs[i]);
-
- switch (param) {
- case PIN_CONFIG_BIAS_PULL_DOWN:
- if (data->cwidth == 2) {
- val |= ZX_PE << data->cbitpos;
- val &= ~(ZX_PS << data->cbitpos);
- } else {
- val |= ZX_PULL_DOWN << data->cbitpos;
- }
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- if (data->cwidth == 2) {
- val |= ZX_PE << data->cbitpos;
- val |= ZX_PS << data->cbitpos;
- } else {
- val |= ZX_PULL_UP << data->cbitpos;
- }
- break;
- case PIN_CONFIG_BIAS_DISABLE:
- if (data->cwidth == 2) {
- val &= ~(ZX_PE << data->cbitpos);
- } else {
- val &= ~(ZX_PULL_DOWN << data->cbitpos);
- val &= ~(ZX_PULL_UP << data->cbitpos);
- }
- break;
- case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
- if (data->cwidth == 2)
- break;
-
- if (arg)
- val |= ZX_ST << data->cbitpos;
- else
- val &= ~(ZX_ST << data->cbitpos);
- break;
- case PIN_CONFIG_SLEW_RATE:
- if (data->cwidth == 2)
- break;
-
- if (arg)
- val |= ZX_SLEW << data->cbitpos;
- else
- val &= ~(ZX_SLEW << data->cbitpos);
- break;
- case PIN_CONFIG_INPUT_ENABLE:
- val |= ZX_INPUT_ENABLE << data->cbitpos;
- break;
- case PIN_CONFIG_DRIVE_STRENGTH:
- if (data->cwidth == 2)
- break;
-
- val &= ~(ZX_DS_MASK << data->cbitpos);
- val |= ZX_DS_VALUE(arg) << data->cbitpos;
- break;
- default:
- ZX_PINMUX_UNLOCK
- spin_unlock_irqrestore(&zpctl->lock, flags);
- return -EINVAL;
- break;
- }
- }
-
- writel(val, zpctl->base + data->coffset);
- pin_log("%s:off(0x%x) pos(%d) wr_val(0x%x) rd_val(0x%x)\n", __func__, data->coffset, data->cbitpos, val, readl(zpctl->base + data->coffset));
-
- ZX_PINMUX_UNLOCK
- spin_unlock_irqrestore(&zpctl->lock, flags);
-
- return 0;
-
-}
-
-static int zx_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
- unsigned long *configs, unsigned int num_configs)
-{
- struct zx_pinctrl *zpctl = pinctrl_dev_get_drvdata(pctldev);
- struct zx_pinctrl_soc_info *info = zpctl->info;
- const struct pinctrl_pin_desc *pindesc = info->pins + pin;
- struct zx_pin_data *data = pindesc->drv_data;
-
- /* Skip reserved pin */
- if (!data)
- return -EINVAL;
-
- return zx_write_config(zpctl, data, configs, num_configs);
-}
-
-static const struct pinconf_ops zx_pinconf_ops = {
- .pin_config_set = zx_pin_config_set,
- .pin_config_get = zx_pin_config_get,
- .is_generic = true,
-};
-
-static int zx_pinctrl_build_state(struct platform_device *pdev)
-{
- struct zx_pinctrl *zpctl = platform_get_drvdata(pdev);
- struct zx_pinctrl_soc_info *info = zpctl->info;
- struct pinctrl_dev *pctldev = zpctl->pctldev;
- struct function_desc *functions;
- int nfunctions;
- struct group_desc *groups;
- int ngroups;
- int i;
-
- /* Every single pin composes a group */
- ngroups = info->npins;
- groups = devm_kcalloc(&pdev->dev, ngroups, sizeof(*groups),
- GFP_KERNEL);
- if (!groups)
- return -ENOMEM;
-
- for (i = 0; i < ngroups; i++) {
- const struct pinctrl_pin_desc *pindesc = info->pins + i;
- struct group_desc *group = groups + i;
-
- group->name = pindesc->name;
- group->pins = (int *) &pindesc->number;
- group->num_pins = 1;
- radix_tree_insert(&pctldev->pin_group_tree, i, group);
- }
-
- pctldev->num_groups = ngroups;
-
- /* Build function list from pin mux functions */
- functions = kcalloc(info->npins*6, sizeof(*functions), GFP_KERNEL);
- if (!functions)
- return -ENOMEM;
-
- nfunctions = 0;
- for (i = 0; i < info->npins; i++) {
- const struct pinctrl_pin_desc *pindesc = info->pins + i;
- struct zx_pin_data *data = pindesc->drv_data;
- struct zx_mux_desc *mux;
-
- /* Reserved pins do not have a drv_data at all */
- if (!data)
- continue;
-
- /* Loop over all muxes for the pin */
- mux = data->muxes;
- while (mux->name) {
- struct function_desc *func = functions;
-
- /* Search function list for given mux */
- while (func->name) {
- if (strcmp(mux->name, func->name) == 0) {
- /* Function exists */
- func->num_group_names++;
- break;
- }
- func++;
- }
-
- if (!func->name) {
- /* New function */
- func->name = mux->name;
- func->num_group_names = 1;
- radix_tree_insert(&pctldev->pin_function_tree,
- nfunctions++, func);
- }
-
- mux++;
- }
- }
-
- pctldev->num_functions = nfunctions;
- functions = krealloc(functions, nfunctions * sizeof(*functions),
- GFP_KERNEL);
- if (!functions)
- return -ENOMEM;
-
- /* Find pin groups for every single function */
- for (i = 0; i < info->npins; i++) {
- const struct pinctrl_pin_desc *pindesc = info->pins + i;
- struct zx_pin_data *data = pindesc->drv_data;
- struct zx_mux_desc *mux;
-
- if (!data)
- continue;
-
- mux = data->muxes;
- while (mux->name) {
- struct function_desc *func;
- const char **group;
- int j;
-
- /* Find function for given mux */
- for (j = 0; j < nfunctions; j++)
- if (strcmp(functions[j].name, mux->name) == 0)
- break;
-
- func = functions + j;
- if (!func->group_names) {
- func->group_names = devm_kcalloc(&pdev->dev,
- func->num_group_names,
- sizeof(*func->group_names),
- GFP_KERNEL);
- if (!func->group_names) {
- kfree(functions);
- return -ENOMEM;
- }
- }
-
- group = func->group_names;
- while (*group)
- group++;
- *group = pindesc->name;
-
- mux++;
- }
- }
-
- return 0;
-}
-
-int zx_pinctrl_init(struct platform_device *pdev,
- struct zx_pinctrl_soc_info *info)
-{
- struct pinctrl_desc *pctldesc;
- struct zx_pinctrl *zpctl;
- struct resource *res;
- int ret;
-
- zpctl = devm_kzalloc(&pdev->dev, sizeof(*zpctl), GFP_KERNEL);
- if (!zpctl)
- return -ENOMEM;
-
- spin_lock_init(&zpctl->lock);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- zpctl->base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(zpctl->base))
- return PTR_ERR(zpctl->base);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- zpctl->pd_base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(zpctl->pd_base))
- return PTR_ERR(zpctl->pd_base);
-
- zpctl->dev = &pdev->dev;
- zpctl->info = info;
-
- pctldesc = devm_kzalloc(&pdev->dev, sizeof(*pctldesc), GFP_KERNEL);
- if (!pctldesc)
- return -ENOMEM;
-
- pctldesc->name = dev_name(&pdev->dev);
- pctldesc->owner = THIS_MODULE;
- pctldesc->pins = info->pins;
- pctldesc->npins = info->npins;
- pctldesc->pctlops = &zx_pinctrl_ops;
- pctldesc->pmxops = &zx_pinmux_ops;
- pctldesc->confops = &zx_pinconf_ops;
-
- zpctl->pctldev = devm_pinctrl_register(&pdev->dev, pctldesc, zpctl);
- if (IS_ERR(zpctl->pctldev)) {
- ret = PTR_ERR(zpctl->pctldev);
- dev_err(&pdev->dev, "failed to register pinctrl: %d\n", ret);
- return ret;
- }
-
- platform_set_drvdata(pdev, zpctl);
-
- ret = zx_pinctrl_build_state(pdev);
- if (ret) {
- dev_err(&pdev->dev, "failed to build state: %d\n", ret);
- return ret;
- }
-
- dev_info(&pdev->dev, "initialized pinctrl driver\n");
- return 0;
-}
-
-/*------------------------------------------------------------------------------------*/
-#define PMM_REG0 0x00
-#define PMM_REG1 0x04
-#define PMM_REG2 0x08
-#define PMM_REG3 0x0C
-#define PMM_REG4 0x10
-#define PMM_REG5 0x14
-#define PMM_REG6 0x18
-#define PMM_REG7 0x1C
-#define PMM_REG8 0x20
-#define PMM_REG9 0x24
-#define PMM_REG10 0x28
-#define PMM_REG11 0x2C
-#define PMM_REG12 0x30
-#define PMM_REG13 0x34
-#define PMM_REG14 0x38
-#define PMM_REG15 0x3C
-#define PMM_REG16 0x40
-#define PMM_REG17 0x44
-#define PMM_REG18 0x48
-#define PMM_REG19 0x4C
-#define PMM_REG20 0x50
-
-#define PMM_REG_INV 0xFF
-
-static const struct pinctrl_pin_desc zx297520v3_pins[] = {
-
- ZX_PIN(NAND_WE, true, PMM_REG7, 0,
- 0, 0, 0,
- PMM_REG0, 0, 1,
- PMM_REG0, 0, 2,
- PD_MUX(0x0, "NAND"), /* nand_we */
- PD_MUX(0x1, "LCD"), /* lcd_oe_n */
- AON_MUX(0x0, "BGPIO")), /* gpio0 */
-
- ZX_PIN(NAND_CSN, true, PMM_REG7, 1,
- 0, 0, 0,
- PMM_REG0, 1, 1,
- PMM_REG0, 2, 2,
- PD_MUX(0x0, "NAND"), /* nand_csn */
- PD_MUX(0x1, "LCD"), /* lcd_cs_n */
- AON_MUX(0x0, "BGPIO")), /* gpio1 */
-
- ZX_PIN(NAND_READY, true, PMM_REG7, 2,
- 0, 0, 0,
- PMM_REG0, 2, 1,
- PMM_REG0, 4, 2,
- PD_MUX(0x0, "NAND"), /* nand_ready */
- PD_MUX(0x1, "LCD"), /* lcd_rs */
- AON_MUX(0x0, "BGPIO")), /* gpio2 */
-
- ZX_PIN(NAND_CLE, true, PMM_REG7, 3,
- 0, 0, 0,
- PMM_REG0, 3, 1,
- PMM_REG0, 6, 2,
- PD_MUX(0x0, "NAND"), /* nand_ready */
- PD_MUX(0x1, "LCD"), /* lcd_rst_n */
- AON_MUX(0x0, "BGPIO")), /* gpio3 */
-
- ZX_PIN(NAND_ALE, true, PMM_REG7, 4,
- 0, 0, 0,
- PMM_REG0, 4, 1,
- PMM_REG0, 8, 2,
- PD_MUX(0x0, "NAND"), /* nand_ale */
- PD_MUX(0x1, "LCD"), /* lcd_we_n */
- AON_MUX(0x0, "BGPIO")), /* gpio4 */
-
- ZX_PIN(NAND_RE, true, PMM_REG7, 5,
- 0, 0, 0,
- PMM_REG0, 5, 1,
- PMM_REG0, 10, 2,
- PD_MUX(0x0, "NAND"), /* nand_re */
- PD_MUX(0x1, "LCD"), /* lcd_te */
- AON_MUX(0x0, "BGPIO")), /* gpio5 */
-
- ZX_PIN(NAND_WP, true, PMM_REG7, 6,
- 0, 0, 0,
- PMM_REG0, 6, 1,
- PMM_REG0, 12, 2,
- PD_MUX(0x0, "NAND"), /* nand_wp */
- PD_MUX(0x1, "LCD"), /* lcd_d0 */
- AON_MUX(0x0, "BGPIO")), /* gpio6 */
-
- ZX_PIN(NAND_D0, true, PMM_REG7, 7,
- 0, 0, 0,
- PMM_REG0, 7, 1,
- PMM_REG0, 14, 2,
- PD_MUX(0x0, "NAND"), /* nand_d0 */
- PD_MUX(0x1, "LCD"), /* lcd_d1 */
- AON_MUX(0x0, "BGPIO")), /* gpio7 */
-
- ZX_PIN(NAND_D1, true, PMM_REG7, 8,
- 0, 0, 0,
- PMM_REG0, 8, 1,
- PMM_REG0, 16, 2,
- PD_MUX(0x0, "NAND"), /* nand_d1 */
- PD_MUX(0x1, "LCD"), /* lcd_d2 */
- AON_MUX(0x0, "BGPIO")), /* gpio8 */
-
- ZX_PIN(NAND_D2, true, PMM_REG7, 9,
- 0, 0, 0,
- PMM_REG0, 9, 1,
- PMM_REG0, 18, 2,
- PD_MUX(0x0, "NAND"), /* nand_d2 */
- PD_MUX(0x1, "LCD"), /* lcd_d3 */
- AON_MUX(0x0, "BGPIO")), /* gpio9 */
-
- ZX_PIN(NAND_D3, true, PMM_REG7, 10,
- 0, 0, 0,
- PMM_REG0, 10, 1,
- PMM_REG0, 20, 2,
- PD_MUX(0x0, "NAND"), /* nand_d3 */
- PD_MUX(0x1, "LCD"), /* lcd_d4 */
- AON_MUX(0x0, "BGPIO")), /* gpio10 */
-
- ZX_PIN(NAND_D4, true, PMM_REG7, 11,
- 0, 0, 0,
- PMM_REG0, 11, 1,
- PMM_REG0, 22, 2,
- PD_MUX(0x0, "NAND"), /* nand_d4 */
- PD_MUX(0x1, "LCD"), /* lcd_d5 */
- AON_MUX(0x0, "BGPIO")), /* gpio11 */
-
- ZX_PIN(NAND_D5, true, PMM_REG7, 12,
- 0, 0, 0,
- PMM_REG0, 12, 1,
- PMM_REG0, 24, 2,
- PD_MUX(0x0, "NAND"), /* nand_d5 */
- PD_MUX(0x1, "LCD"), /* lcd_d6 */
- AON_MUX(0x0, "BGPIO")), /* gpio12 */
-
- ZX_PIN(NAND_D6, true, PMM_REG7, 13,
- 0, 0, 0,
- PMM_REG0, 13, 1,
- PMM_REG0, 26, 2,
- PD_MUX(0x0, "NAND"), /* nand_d6 */
- PD_MUX(0x1, "LCD"), /* lcd_d7 */
- AON_MUX(0x0, "BGPIO")), /* gpio13 */
-
- ZX_PIN(NAND_D7, true, PMM_REG7, 14,
- 0, 0, 0,
- PMM_REG0, 14, 1,
- PMM_REG0, 28, 2,
- PD_MUX(0x0, "NAND"), /* nand_d7 */
- PD_MUX(0x1, "LCD"), /* lcd_d8 */
- AON_MUX(0x0, "BGPIO")), /* gpio14 */
-
- ZX_PIN(CLK_OUT0, false, 0, 0,
- PMM_REG0, 0, 2,
- 0, 0, 0,
- PMM_REG1, 10, 2,
- AON_MUX(0x0, "CLK_OUT0"), /* clk_out0 */
- AON_MUX(0x1, "BGPIO")), /* gpio15 */
-
- ZX_PIN(CLK_OUT1, false, 0, 0,
- PMM_REG0, 2, 2,
- 0, 0, 0,
- PMM_REG1, 12, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio16 */
- AON_MUX(0x1, "CLK_OUT1")), /* clk_out1 */
-
- ZX_PIN(CLK_OUT2, true, PMM_REG12, 0,
- PMM_REG0, 4, 2,
- PMM_REG0, 15, 2,
- PMM_REG1, 14, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio17 */
- AON_MUX(0x1, "CLK_OUT2"), /* clk_out2 */
- AON_MUX(0x2, "TEST_CLK_OUT"), /* test_clk_out */
- PD_MUX(0x0, "TDM"), /* tdm_mclk_out */
- PD_MUX(0x1, "I2S0"), /* i2s0_mclk_out */
- PD_MUX(0x2, "I2S1")), /* i2s1_mclk_out */
-
- ZX_PIN(CLK_32K_OUT, false, 0, 0,
- PMM_REG0, 6, 2,
- 0, 0, 0,
- PMM_REG1, 16, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio18 */
- AON_MUX(0x1, "CLK_32K_OUT")), /* clk_32k_out */
-
- ZX_PIN(RMII_CLKI, true, PMM_REG7, 15,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio19 */
- PD_MUX(0x0, "RMII")), /* rmii_clk_i */
-
- ZX_PIN(RMII_CLKO, true, PMM_REG7, 16,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio20 */
- PD_MUX(0x0, "RMII")), /* rmii_clk_o */
-
- ZX_PIN(CLK_REQ0, false, 0, 0,
- PMM_REG0, 8, 2,
- 0, 0, 0,
- PMM_REG1, 18, 2,
- AON_MUX(0x0, "CLK_REQ0"), /* clk_req0 */
- AON_MUX(0x1, "BGPIO")), /* gpio21 */
-
- ZX_PIN(CLK_REQ1, false, 0, 0,
- PMM_REG0, 10, 2,
- 0, 0, 0,
- PMM_REG1, 20, 2,
- AON_MUX(0x0, "CLK_REQ1"), /* clk_req1 */
- AON_MUX(0x1, "BGPIO")), /* gpio22 */
-
- ZX_PIN(PWRCTRL, false, 0, 0,
- PMM_REG0, 12, 2,
- 0, 0, 0,
- PMM_REG1, 22, 2,
- AON_MUX(0x0, "PWRCTRL"), /* pwrctrl0 */
- AON_MUX(0x1, "BGPIO")), /* gpio23 */
-
- ZX_PIN_NOMUX(PSHOLD, PMM_REG1, 28, 2,
- AON_MUX(0, FUNC_NOMUX)),
-
- ZX_PIN(SSP0_CS, true, PMM_REG7, 17,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG2, 0, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio25 */
- PD_MUX(0x0, "SSP0")), /* ssp0_cs */
-
- ZX_PIN(SSP0_CLK, true, PMM_REG7, 18,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG2, 2, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio26 */
- PD_MUX(0x0, "SSP0")), /* ssp0_clk */
-
- ZX_PIN(SSP0_RXD, true, PMM_REG7, 19,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG2, 4, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio27 */
- PD_MUX(0x0, "SSP0")), /* ssp0_rxd */
-
- ZX_PIN(SSP0_TXD, true, PMM_REG7, 20,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG2, 6, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio28 */
- PD_MUX(0x0, "SSP0")), /* ssp0_txd */
-
- ZX_PIN(UART0_RXD, true, PMM_REG8, 0,
- PMM_REG0, 14, 2,
- PMM_REG1, 0, 1,
- PMM_REG2, 10, 2,
- AON_MUX(0x0, "UART0"), /* uart0_rxd */
- AON_MUX(0x1, "BGPIO"), /* gpio29 */
- AON_MUX(0x2, "UART00"), /* uart00_txd */
- PD_MUX(0x1, "TEST")), /* test_10 */
-
- ZX_PIN(UART0_TXD, true, PMM_REG8, 1,
- PMM_REG0, 16, 2,
- PMM_REG1, 1, 1,
- PMM_REG2, 12, 2,
- AON_MUX(0x0, "UART0"), /* uart0_txd */
- AON_MUX(0x1, "BGPIO"), /* gpio30 */
- AON_MUX(0x2, "UART00"), /* uart00_rxd */
- PD_MUX(0x1, "TEST")), /* test_11 */
-
- ZX_PIN(UART0_CTS, true, PMM_REG8, 2,
- PMM_REG0, 18, 2,
- PMM_REG1, 2, 2,
- PMM_REG2, 14, 2,
- AON_MUX(0x0, "UART0"), /* uart0_cts */
- AON_MUX(0x1, "BGPIO"), /* gpio31 */
- PD_MUX(0x1, "UART1"), /* uart1_txd */
- PD_MUX(0x2, "TEST")), /* test_12 */
-
- ZX_PIN(UART0_RTS, true, PMM_REG8, 3,
- PMM_REG0, 20, 2,
- PMM_REG1, 4, 2,
- PMM_REG2, 16, 2,
- AON_MUX(0x0, "UART0"), /* uart0_rts */
- AON_MUX(0x1, "BGPIO"), /* gpio32 */
- PD_MUX(0x1, "UART1")), /* uart1_rxd */
-
- ZX_PIN(UART1_RXD, true, PMM_REG8, 4,
- 0, 0, 0,
- PMM_REG1, 6, 2,
- PMM_REG2, 18, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio33 */
- PD_MUX(0x0, "UART1"), /* uart1_rxd */
- PD_MUX(0x1, "UART2"), /* uart2_txd */
- PD_MUX(0x2, "UART22")), /* uart22_rxd */
-
- ZX_PIN(UART1_TXD, true, PMM_REG8, 5,
- 0, 0, 0,
- PMM_REG1, 8, 2,
- PMM_REG2, 20, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio34 */
- PD_MUX(0x0, "UART1"), /* uart1_rxd */
- PD_MUX(0x1, "UART2"), /* uart2_xxd */
- PD_MUX(0x2, "UART22")), /* uart22_txd */
-
- ZX_PIN(I2S0_WS, true, PMM_REG8, 6,
- 0, 0, 0,
- PMM_REG1, 10, 2,
- PMM_REG2, 22, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio35 */
- PD_MUX(0x0, "I2S0"), /* i2s0_ws */
- PD_MUX(0x1, "TEST")), /* test_0 */
-
- ZX_PIN(I2S0_CLK, true, PMM_REG8, 7,
- 0, 0, 0,
- PMM_REG1, 12, 2,
- PMM_REG2, 24, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio36 */
- PD_MUX(0x0, "I2S0"), /* i2s0_clk */
- PD_MUX(0x1, "TEST"), /* test_1 */
- PD_MUX(0x2, "TDM")), /* tdm_clk */
-
- ZX_PIN(I2S0_DIN, true, PMM_REG8, 8,
- 0, 0, 0,
- PMM_REG1, 14, 2,
- PMM_REG2, 26, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio37 */
- PD_MUX(0x0, "I2S0"), /* i2s0_din */
- PD_MUX(0x1, "TEST"), /* test_2 */
- PD_MUX(0x2, "TDM")), /* tdm_din */
-
- ZX_PIN(I2S0_DOUT, true, PMM_REG8, 9,
- 0, 0, 0,
- PMM_REG1, 16, 2,
- PMM_REG2, 28, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio38 */
- PD_MUX(0x0, "I2S0"), /* i2s0_dout */
- PD_MUX(0x1, "TEST"), /* test_3 */
- PD_MUX(0x2, "TDM")), /* tdm_dout */
-
- ZX_PIN(I2S1_WS, true, PMM_REG8, 10,
- 0, 0, 0,
- PMM_REG1, 18, 2,
- PMM_REG2, 30, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio39 */
- PD_MUX(0x0, "I2S1"), /* i2s0_ws */
- PD_MUX(0x1, "TEST"), /* test_4 */
- PD_MUX(0x2, "TDM"), /* tdm_fs */
- PD_MUX(0x3, "PWM0")), /* pwm0 */
-
- ZX_PIN(I2S1_CLK, true, PMM_REG8, 11,
- 0, 0, 0,
- PMM_REG1, 20, 2,
- PMM_REG3, 0, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio40 */
- PD_MUX(0x0, "I2S1"), /* i2s0_clk */
- PD_MUX(0x1, "TEST"), /* test_5 */
- PD_MUX(0x2, "TDM"), /* tdm_clk */
- PD_MUX(0x3, "PWM1")), /* pwm1 */
-
- ZX_PIN(I2S1_DIN, true, PMM_REG8, 12,
- 0, 0, 0,
- PMM_REG1, 22, 2,
- PMM_REG3, 2, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio41 */
- PD_MUX(0x0, "I2S1"), /* i2s0_din */
- PD_MUX(0x1, "TEST"), /* test_6 */
- PD_MUX(0x2, "TDM")), /* tdm_din */
-
- ZX_PIN(I2S1_DOUT, true, PMM_REG8, 13,
- 0, 0, 0,
- PMM_REG1, 24, 2,
- PMM_REG3, 4, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio42 */
- PD_MUX(0x0, "I2S1"), /* i2s0_dout */
- PD_MUX(0x1, "TEST"), /* test_7 */
- PD_MUX(0x2, "TDM")), /* tdm_dout */
-
- ZX_PIN(I2C0_SCL, false, 0, 0,
- PMM_REG1, 0, 2,
- 0, 0, 0,
- PMM_REG3, 6, 2,
- AON_MUX(0x0, "I2C0"), /* i2c0_scl */
- AON_MUX(0x1, "BGPIO")), /* gpio43 */
-
- ZX_PIN(I2C0_SDA, false, 0, 0,
- PMM_REG1, 2, 2,
- 0, 0, 0,
- PMM_REG3, 8, 2,
- AON_MUX(0x0, "I2C0"), /* i2c0_sda */
- AON_MUX(0x1, "BGPIO")), /* gpio44 */
-
- ZX_PIN(I2C1_SCL, true, PMM_REG8, 14,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG3, 10, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio45 */
- PD_MUX(0x0, "I2C1")), /* i2c1_scl */
-
- ZX_PIN(I2C1_SDA, true, PMM_REG8, 15,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG3, 12, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio46 */
- PD_MUX(0x0, "I2C1")), /* i2c1_sda */
-
- ZX_PIN(EXT_INT0, false, 0, 0,
- PMM_REG1, 4, 2,
- 0, 0, 0,
- PMM_REG3, 14, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio47 */
- AON_MUX(0x1, "EXT_INT0")), /* ext_int0 */
-
- ZX_PIN(EXT_INT1, false, 0, 0,
- PMM_REG1, 6, 2,
- 0, 0, 0,
- PMM_REG3, 16, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio48 */
- AON_MUX(0x1, "EXT_INT1")), /* ext_int1 */
-
- ZX_PIN(EXT_INT2, false, 0, 0,
- PMM_REG1, 8, 2,
- 0, 0, 0,
- PMM_REG3, 18, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio49 */
- AON_MUX(0x1, "EXT_INT2")), /* ext_int2 */
-
- ZX_PIN(EXT_INT3, true, PMM_REG8, 16,
- PMM_REG1, 10, 2,
- 0, 0, 0,
- PMM_REG3, 20, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio50 */
- AON_MUX(0x1, "EXT_INT3"), /* ext_int3 */
- PD_MUX(0x0, "TEST")), /* test_8 */
-
- ZX_PIN(EXT_INT4, true, PMM_REG8, 17,
- PMM_REG1, 12, 2,
- 0, 0, 0,
- PMM_REG3, 22, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio51 */
- AON_MUX(0x1, "EXT_INT4"), /* ext_int4 */
- PD_MUX(0x0, "TEST")), /* test_9 */
-
- ZX_PIN(EXT_INT5, true, PMM_REG8, 18,
- PMM_REG1, 14, 2,
- 0, 0, 0,
- PMM_REG3, 24, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio52 */
- AON_MUX(0x1, "EXT_INT5"), /* ext_int5 */
- PD_MUX(0x0, "TEST")), /* test_13 */
-
- ZX_PIN(EXT_INT6, true, PMM_REG8, 19,
- PMM_REG1, 16, 2,
- 0, 0, 0,
- PMM_REG3, 26, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio53 */
- AON_MUX(0x1, "EXT_INT6"), /* ext_int6 */
- PD_MUX(0x0, "TEST")), /* test_14 */
-
- ZX_PIN(EXT_INT7, true, PMM_REG8, 20,
- PMM_REG1, 18, 2,
- 0, 0, 0,
- PMM_REG3, 28, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio54 */
- AON_MUX(0x1, "EXT_INT7"), /* ext_int7 */
- PD_MUX(0x0, "TEST")), /* test_15 */
-
- ZX_PIN(RMII_TXEN, true, PMM_REG9, 0,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio55 */
- PD_MUX(0x0, "RMII")), /* rmii_txen */
-
- ZX_PIN(RMII_RXEN, true, PMM_REG9, 1,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio56 */
- PD_MUX(0x0, "RMII")), /* rmii_rxen */
-
- ZX_PIN(RMII_RXD0, true, PMM_REG9, 2,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio57 */
- PD_MUX(0x0, "RMII")), /* rmii_rxd0 */
-
- ZX_PIN(RMII_RXD1, true, PMM_REG9, 3,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio58 */
- PD_MUX(0x0, "RMII")), /* rmii_rxd1 */
-
- ZX_PIN(RMII_TXD0, true, PMM_REG9, 4,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio59 */
- PD_MUX(0x0, "RMII")), /* rmii_txd0 */
-
- ZX_PIN(RMII_TXD1, true, PMM_REG9, 5,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio60 */
- PD_MUX(0x0, "RMII")), /* rmii_txd1 */
-
- ZX_PIN(MDC_SCLK, true, PMM_REG9, 6,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio61 */
- PD_MUX(0x0, "MDC")), /* mdc_sclk */
-
- ZX_PIN(MDC_SDIO, true, PMM_REG9, 7,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio62 */
- PD_MUX(0x0, "MDC")), /* mdc_sdio */
-
- ZX_PIN(PHY_RST, true, PMM_REG9, 8,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio63 */
- PD_MUX(0x0, "PHY")), /* phy_rst */
-
- ZX_PIN(PHY_INT, true, PMM_REG9, 9,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG15, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio64 */
- PD_MUX(0x0, "PHY")), /* phy_int */
-
- ZX_PIN_NOMUX(PHY_WAKE, PMM_REG15, 0, 8,
- AON_MUX(0, FUNC_NOMUX)),
-
- ZX_PIN(SD0_CLK, true, PMM_REG9, 10,
- PMM_REG2, 0, 2,
- 0, 0, 0,
- PMM_REG4, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio66 */
- AON_MUX(0x1, "KEY"), /* key_col2 */
- PD_MUX(0x0, "SD0")), /* sd0_clk */
-
- ZX_PIN(SD0_CMD, true, PMM_REG9, 11,
- PMM_REG2, 2, 2,
- 0, 0, 0,
- PMM_REG4, 8, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio67 */
- AON_MUX(0x1, "KEY"), /* key_col3 */
- PD_MUX(0x0, "SD0")), /* sd0_cmd */
-
- ZX_PIN(SD0_D0, true, PMM_REG9, 12,
- PMM_REG2, 4, 2,
- 0, 0, 0,
- PMM_REG4, 16, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio68 */
- AON_MUX(0x1, "KEY"), /* key_col4 */
- PD_MUX(0x0, "SD0")), /* sd0_d0 */
-
- ZX_PIN(SD0_D1, true, PMM_REG9, 13,
- PMM_REG2, 6, 2,
- 0, 0, 0,
- PMM_REG4, 24, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio69 */
- AON_MUX(0x1, "KEY"), /* key_row2 */
- PD_MUX(0x0, "SD0")), /* sd0_d1 */
-
- ZX_PIN(SD0_D2, true, PMM_REG9, 14,
- PMM_REG2, 8, 2,
- 0, 0, 0,
- PMM_REG5, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio70 */
- AON_MUX(0x1, "KEY"), /* key_row3 */
- PD_MUX(0x0, "SD0")), /* sd0_d2 */
-
- ZX_PIN(SD0_D3, true, PMM_REG9, 15,
- PMM_REG2, 10, 2,
- 0, 0, 0,
- PMM_REG5, 8, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio71 */
- AON_MUX(0x1, "KEY"), /* key_row4 */
- PD_MUX(0x0, "SD0")), /* sd0_d3 */
-
- ZX_PIN(SD1_CLK, true, PMM_REG9, 16,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG5, 16, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio72 */
- PD_MUX(0x0, "SD1")), /* sd1_clk */
-
- ZX_PIN(SD1_CMD, true, PMM_REG9, 17,
- PMM_REG2, 12, 2,
- PMM_REG2, 0, 2,
- PMM_REG5, 24, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio73 */
- PD_MUX(0x0, "SD1")), /* sd1_cmd */
-
- ZX_PIN(SD1_D0, true, PMM_REG9, 18,
- PMM_REG2, 14, 2,
- PMM_REG2, 2, 2,
- PMM_REG6, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio74 */
- PD_MUX(0x0, "SD1")), /* sd1_d0 */
-
- ZX_PIN(SD1_D1, true, PMM_REG9, 19,
- PMM_REG2, 16, 2,
- PMM_REG2, 4, 2,
- PMM_REG6, 8, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio75 */
- PD_MUX(0x0, "SD1")), /* sd1_d1 */
-
- ZX_PIN(SD1_D2, true, PMM_REG9, 20,
- PMM_REG2, 18, 2,
- PMM_REG2, 6, 2,
- PMM_REG6, 16, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio76 */
- PD_MUX(0x0, "SD1")), /* sd1_d2 */
-
- ZX_PIN(SD1_D3, true, PMM_REG9, 21,
- PMM_REG2, 20, 2,
- PMM_REG2, 8, 2,
- PMM_REG6, 24, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio77 */
- PD_MUX(0x0, "SD1")), /* sd1_d3 */
-
- ZX_PIN(GPIO78, true, PMM_REG9, 22,
- PMM_REG3, 0, 2,
- PMM_REG3, 0, 2,
- PMM_REG7, 0, 2,
- AON_MUX(0x1, "BGPIO")), /* gpio78 */
-
- ZX_PIN(GPIO79, true, PMM_REG9, 23,
- PMM_REG3, 2, 2,
- PMM_REG3, 2, 2,
- PMM_REG7, 2, 2,
- AON_MUX(0x1, "BGPIO")), /* gpio79 */
-
- ZX_PIN(GPIO80, true, PMM_REG9, 24,
- PMM_REG3, 4, 2,
- PMM_REG3, 4, 2,
- PMM_REG7, 4, 2,
- AON_MUX(0x1, "BGPIO")), /* gpio80 */
-
- ZX_PIN(GPIO81, true, PMM_REG9, 25,
- PMM_REG3, 6, 2,
- PMM_REG3, 6, 2,
- PMM_REG7, 6, 2,
- AON_MUX(0x1, "BGPIO")), /* gpio81 */
-
- ZX_PIN(GPIO82, true, PMM_REG9, 26,
- PMM_REG3, 8, 2,
- PMM_REG3, 8, 2,
- PMM_REG7, 8, 2,
- AON_MUX(0x1, "BGPIO")), /* gpio82 */
-
- ZX_PIN(KEY_COL0, false, 0, 0,
- PMM_REG3, 10, 2,
- 0, 0, 0,
- PMM_REG7, 10, 2,
- AON_MUX(0x0, "KEY"), /* key_col0 */
- AON_MUX(0x1, "BGPIO")), /* gpio83 */
-
- ZX_PIN(KEY_COL1, false, 0, 0,
- PMM_REG3, 12, 2,
- 0, 0, 0,
- PMM_REG7, 12, 2,
- AON_MUX(0x0, "KEY"), /* key_col1 */
- AON_MUX(0x1, "BGPIO")), /* gpio84 */
-
- ZX_PIN(KEY_ROW0, false, 0, 0,
- PMM_REG3, 14, 2,
- 0, 0, 0,
- PMM_REG7, 14, 2,
- AON_MUX(0x0, "KEY"), /* key_row0 */
- AON_MUX(0x1, "BGPIO")), /* gpio85 */
-
- ZX_PIN(KEY_ROW1, false, 0, 0,
- PMM_REG3, 16, 2,
- 0, 0, 0,
- PMM_REG7, 16, 2,
- AON_MUX(0x0, "KEY"), /* key_row1 */
- AON_MUX(0x1, "BGPIO")), /* gpio86 */
-
- ZX_PIN(CAM_SPI_CS, true, PMM_REG10, 0,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG7, 18, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio87 */
- PD_MUX(0x0, "CAM_SPI")), /* cam_spi_cs */
-
- ZX_PIN(CAM_SPI_CLK, true, PMM_REG10, 1,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG7, 20, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio88 */
- PD_MUX(0x0, "CAM_SPI")), /* cam_spi_clk */
-
- ZX_PIN(CAM_SPI_D0, true, PMM_REG10, 2,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG7, 22, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio89 */
- PD_MUX(0x0, "CAM_SPI")), /* cam_spi_d0 */
-
- ZX_PIN(CAM_SPI_D1, true, PMM_REG10, 3,
- 0, 0, 0,
- PMM_REG3, 10, 1,
- PMM_REG7, 24, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio90 */
- PD_MUX(0x0, "CAM_SPI"), /* cam_spi_d1 */
- PD_MUX(0x1, "CAM_SPI0")), /* cam_spi_txd ??? */
-
- ZX_PIN(CAM_SPI_D2, true, PMM_REG10, 4,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG7, 26, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio91 */
- PD_MUX(0x0, "CAM_SPI")), /* cam_spi_d2 */
-
- ZX_PIN(CAM_SPI_D3, true, PMM_REG10, 5,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG7, 28, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio92 */
- PD_MUX(0x0, "CAM_SPI")), /* cam_spi_d3 */
-
- ZX_PIN(SPIFC_CS, true, PMM_REG10, 6,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 0, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio93 */
- PD_MUX(0x0, "SPIFC")), /* spifc_cs */
-
- ZX_PIN(SPIFC_CLK, true, PMM_REG10, 7,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 2, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio94 */
- PD_MUX(0x0, "SPIFC")), /* spifc_clk */
-
- ZX_PIN(SPIFC_D0, true, PMM_REG10, 8,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 4, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio95 */
- PD_MUX(0x0, "SPIFC")), /* spifc_d0 */
-
- ZX_PIN(SPIFC_D1, true, PMM_REG10, 9,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 6, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio96 */
- PD_MUX(0x0, "SPIFC")), /* spifc_d1 */
-
- ZX_PIN(SPIFC_D2, true, PMM_REG10, 10,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 8, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio97 */
- PD_MUX(0x0, "SPIFC")), /* spifc_d2 */
-
- ZX_PIN(SPIFC_D3, true, PMM_REG10, 11,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 10, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio98 */
- PD_MUX(0x0, "SPIFC")), /* spifc_d3 */
-
- ZX_PIN(GPIO100, true, PMM_REG10, 12,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 14, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio100 */
-
- ZX_PIN(GPIO101, true, PMM_REG10, 13,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 16, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio101 */
-
- ZX_PIN(GPIO102, true, PMM_REG10, 14,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG8, 18, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio102 */
-
- ZX_PIN(GPIO104, true, PMM_REG10, 15,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 0, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio104 */
-
- ZX_PIN(GPIO105, true, PMM_REG10, 16,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 2, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio105 */
-
- ZX_PIN(GPIO106, true, PMM_REG10, 17,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 4, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio106 */
-
- ZX_PIN(GPIO107, true, PMM_REG10, 18,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 6, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio107 */
-
- ZX_PIN(GPIO108, true, PMM_REG10, 19,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 8, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio108 */
-
- ZX_PIN(GPIO109, true, PMM_REG10, 20,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 10, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio109 */
-
- ZX_PIN(GPIO110, true, PMM_REG10, 21,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 12, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio110 */
-
- ZX_PIN(GPIO111, true, PMM_REG10, 22,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 14, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio111 */
-
- ZX_PIN(GPIO112, true, PMM_REG10, 23,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 16, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio112 */
-
- ZX_PIN(GPIO113, true, PMM_REG10, 24,
- 0, 0, 0,
- 0, 0, 0,
- PMM_REG9, 18, 2,
- AON_MUX(0x0, "BGPIO")), /* gpio113 */
-
- ZX_PIN(GPIO114, true, PMM_REG10, 25,
- PMM_REG3, 18, 2,
- 0, 0, 0,
- PMM_REG9, 20, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio114 */
- AON_MUX(0x1, "ABB_I2C")), /* abb_i2c_scl */
-
- ZX_PIN(GPIO115, true, PMM_REG10, 26,
- PMM_REG3, 20, 2,
- 0, 0, 0,
- PMM_REG9, 22, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio115 */
- AON_MUX(0x1, "ABB_I2C")), /* abb_i2c_sda */
-
- ZX_PIN(SIM_RST, false, 0, 0,
- PMM_REG3, 22, 2,
- 0, 0, 0,
- PMM_REG10, 0, 8,
- AON_MUX(0x0, "SIM"), /* sim_rst */
- AON_MUX(0x1, "BGPIO")), /* gpio116 */
-
- ZX_PIN(SIM_CLK, false, 0, 0,
- PMM_REG3, 24, 2,
- 0, 0, 0,
- PMM_REG10, 0, 8,
- AON_MUX(0x0, "SIM"), /* sim_clk */
- AON_MUX(0x1, "BGPIO")), /* gpio117 */
-
- ZX_PIN(SIM_DATA, false, 0, 0,
- PMM_REG3, 26, 2,
- 0, 0, 0,
- PMM_REG10, 0, 8,
- AON_MUX(0x0, "SIM"), /* sim_data */
- AON_MUX(0x1, "BGPIO")), /* gpio118 */
-
- ZX_PIN(EXT_INT8, true, PMM_REG11, 0,
- PMM_REG4, 0, 2,
- PMM_REG10, 0, 2,
- PMM_REG11, 0, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio119 */
- AON_MUX(0x1, "EXT_INT8"), /* ext_int8 */
- AON_MUX(0x2, "UART0"), /* uart0_rts */
- PD_MUX(0x3, "PWM0")), /* pwm0 */
-
- ZX_PIN(EXT_INT9, true, PMM_REG11, 1,
- PMM_REG4, 2, 2,
- PMM_REG10, 2, 2,
- PMM_REG11, 2, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio120 */
- AON_MUX(0x1, "EXT_INT9"), /* ext_int9 */
- AON_MUX(0x2, "UART0"), /* uart0_cts */
- PD_MUX(0x3, "PWM1")), /* pwm1 */
-
- ZX_PIN(EXT_INT10, true, PMM_REG11, 2,
- PMM_REG4, 4, 2,
- PMM_REG10, 4, 2,
- PMM_REG11, 4, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio121 */
- AON_MUX(0x1, "EXT_INT10"), /* ext_int10 */
- PD_MUX(0x3, "UART2")), /* uart2_rxd */
-
- ZX_PIN(EXT_INT11, true, PMM_REG11, 3,
- PMM_REG4, 6, 2,
- PMM_REG10, 6, 2,
- PMM_REG11, 6, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio122 */
- AON_MUX(0x1, "EXT_INT11"), /* ext_int11 */
- PD_MUX(0x3, "UART2")), /* uart2_txd */
-
- ZX_PIN(EXT_INT12, true, PMM_REG11, 4,
- PMM_REG4, 8, 2,
- PMM_REG10, 8, 2,
- PMM_REG11, 8, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio123 */
- AON_MUX(0x1, "EXT_INT12"), /* ext_int12 */
- PD_MUX(0x3, "UART2")), /* uart2_rts */
-
- ZX_PIN(EXT_INT13, true, PMM_REG11, 5,
- PMM_REG4, 10, 2,
- PMM_REG10, 10, 2,
- PMM_REG11, 10, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio124 */
- AON_MUX(0x1, "EXT_INT13"), /* ext_int13 */
- PD_MUX(0x3, "UART2")), /* uart2_cts */
-
- ZX_PIN(EXT_INT14, true, PMM_REG11, 6,
- PMM_REG4, 12, 2,
- 0, 0, 0,
- PMM_REG11, 12, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio125 */
- AON_MUX(0x1, "EXT_INT14"), /* ext_int14 */
- PD_MUX(0x0, "UART1")), /* uart1_rts */
-
- ZX_PIN(EXT_INT15, true, PMM_REG11, 7,
- PMM_REG4, 14, 2,
- 0, 0, 0,
- PMM_REG11, 14, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio126 */
- AON_MUX(0x1, "EXT_INT15"), /* ext_int15 */
- PD_MUX(0x0, "UART1")), /* uart1_cts */
-
- ZX_PIN(GPIO127, false, 0, 0,
- PMM_REG4, 16, 2,
- 0, 0, 0,
- PMM_REG11, 16, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio127 */
- AON_MUX(0x1, "EXT_INT8"), /* ext_int8 */
- AON_MUX(0x2, "KEY")), /* key_col3 */
-
- ZX_PIN(GPIO128, false, 0, 0,
- PMM_REG4, 18, 2,
- 0, 0, 0,
- PMM_REG11, 18, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio128 */
- AON_MUX(0x1, "EXT_INT9"), /* ext_int9 */
- AON_MUX(0x2, "KEY")), /* key_col4 */
-
- ZX_PIN(GPIO129, false, 0, 0,
- PMM_REG4, 20, 2,
- 0, 0, 0,
- PMM_REG11, 20, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio129 */
- AON_MUX(0x1, "EXT_INT10"), /* ext_int10 */
- AON_MUX(0x2, "KEY")), /* key_col5 */
-
- ZX_PIN(GPIO130, false, 0, 0,
- PMM_REG4, 22, 2,
- 0, 0, 0,
- PMM_REG11, 22, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio130 */
- AON_MUX(0x1, "EXT_INT11"), /* ext_int11 */
- AON_MUX(0x2, "KEY")), /* key_row2 */
-
- ZX_PIN(GPIO131, false, 0, 0,
- PMM_REG4, 24, 2,
- 0, 0, 0,
- PMM_REG11, 24, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio131 */
- AON_MUX(0x1, "EXT_INT12"), /* ext_int12 */
- AON_MUX(0x2, "KEY")), /* key_row3 */
-
- ZX_PIN(GPIO132, false, 0, 0,
- PMM_REG4, 26, 2,
- 0, 0, 0,
- PMM_REG11, 26, 2,
- AON_MUX(0x0, "BGPIO"), /* gpio132 */
- AON_MUX(0x1, "EXT_INT13"), /* ext_int13 */
- AON_MUX(0x2, "KEY")), /* key_row4 */
-
- ZX_PIN(SIM1_RST, true, PMM_REG10, 27,
- PMM_REG2, 22, 2,
- 0, 0, 0,
- PMM_REG16, 0, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio133 */
- AON_MUX(0x1, "SIM1")), /* sim1_rst */
-
- ZX_PIN(SIM1_CLK, true, PMM_REG10, 28,
- PMM_REG2, 24, 2,
- 0, 0, 0,
- PMM_REG16, 8, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio134 */
- AON_MUX(0x1, "SIM1")), /* sim1_clk */
-
- ZX_PIN(SIM1_DATA, true, PMM_REG10, 29,
- PMM_REG2, 26, 2,
- 0, 0, 0,
- PMM_REG16, 16, 8,
- AON_MUX(0x0, "BGPIO"), /* gpio135 */
- AON_MUX(0x1, "SIM1")), /* sim1_data */
-
-
- /* nomux pins */
-// ZX_PIN_NOMUX(SYS_CLK_IN, PMM_REG1, 0, ZX_MUX(0, FUNC_NOMUX)),
-// ZX_PIN_NOMUX(DIG_32K_IN, PMM_REG1, 7, ZX_MUX(0, FUNC_NOMUX)),
-};
-
-static struct zx_pinctrl_soc_info zx297520v3_pinctrl_info = {
- .pins = zx297520v3_pins,
- .npins = ARRAY_SIZE(zx297520v3_pins),
-};
-
-static int zx297520v3_pinctrl_probe(struct platform_device *pdev)
-{
- return zx_pinctrl_init(pdev, &zx297520v3_pinctrl_info);
-}
-
-static const struct of_device_id zx297520v3_pinctrl_match[] = {
- { .compatible = "zte,zx297520v3-pmm" },
- {},
-};
-
-static struct platform_driver zx297520v3_pinctrl_driver = {
- .probe = zx297520v3_pinctrl_probe,
- .driver = {
- .name = "zx297520v3-pinctrl",
- .of_match_table = zx297520v3_pinctrl_match,
- },
-};
-
-static int __init zx297520v3_pinctrl_init(void)
-{
- return platform_driver_register(&zx297520v3_pinctrl_driver);
-}
-arch_initcall(zx297520v3_pinctrl_init);
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/pinctrl/zte/pinctrl-zx297520v3.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/pinctrl/zte/pinctrl-zx297520v3.h
deleted file mode 100644
index 23a729a..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/pinctrl/zte/pinctrl-zx297520v3.h
+++ /dev/null
@@ -1,243 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2021 ZTE Technology Co., Ltd.
- */
-
-#ifndef __PINCTRL_ZX297520V3_H
-#define __PINCTRL_ZX297520V3_H
-
-#define NAND_WE 0
-#define NAND_CSN 1
-#define NAND_READY 2
-#define NAND_CLE 3
-#define NAND_ALE 4
-#define NAND_RE 5
-#define NAND_WP 6
-#define NAND_D0 7
-#define NAND_D1 8
-#define NAND_D2 9
-#define NAND_D3 10
-#define NAND_D4 11
-#define NAND_D5 12
-#define NAND_D6 13
-#define NAND_D7 14
-#define CLK_OUT0 15
-#define CLK_OUT1 16
-#define CLK_OUT2 17
-#define CLK_32K_OUT 18
-#define RMII_CLKI 19
-#define RMII_CLKO 20
-#define CLK_REQ0 21
-#define CLK_REQ1 22
-#define PWRCTRL 23
-#define PSHOLD 24 /* gpio65 */
-#define SSP0_CS 25
-#define SSP0_CLK 26
-#define SSP0_RXD 27
-#define SSP0_TXD 28
-#define UART0_RXD 29
-#define UART0_TXD 30
-#define UART0_CTS 31
-#define UART0_RTS 32
-#define UART1_RXD 33
-#define UART1_TXD 34
-#define I2S0_WS 35
-#define I2S0_CLK 36
-#define I2S0_DIN 37
-#define I2S0_DOUT 38
-#define I2S1_WS 39
-#define I2S1_CLK 40
-#define I2S1_DIN 41
-#define I2S1_DOUT 42
-#define I2C0_SCL 43
-#define I2C0_SDA 44
-#define I2C1_SCL 45
-#define I2C1_SDA 46
-#define EXT_INT0 47
-#define EXT_INT1 48
-#define EXT_INT2 49
-#define EXT_INT3 50
-#define EXT_INT4 51
-#define EXT_INT5 52
-#define EXT_INT6 53
-#define EXT_INT7 54
-#define RMII_TXEN 55
-#define RMII_RXEN 56
-#define RMII_RXD0 57
-#define RMII_RXD1 58
-#define RMII_TXD0 59
-#define RMII_TXD1 60
-#define MDC_SCLK 61
-#define MDC_SDIO 62
-#define PHY_RST 63
-#define PHY_INT 64
-#define PHY_WAKE 65 /* gpio65 */
-#define SD0_CLK 66
-#define SD0_CMD 67
-#define SD0_D0 68
-#define SD0_D1 69
-#define SD0_D2 70
-#define SD0_D3 71
-#define SD1_CLK 72
-#define SD1_CMD 73
-#define SD1_D0 74
-#define SD1_D1 75
-#define SD1_D2 76
-#define SD1_D3 77
-#define GPIO78 78
-#define GPIO79 79
-#define GPIO80 80
-#define GPIO81 81
-#define GPIO82 82
-#define KEY_COL0 83
-#define KEY_COL1 84
-#define KEY_ROW0 85
-#define KEY_ROW1 86
-#define CAM_SPI_CS 87
-#define CAM_SPI_CLK 88
-#define CAM_SPI_D0 89
-#define CAM_SPI_D1 90
-#define CAM_SPI_D2 91
-#define CAM_SPI_D3 92
-#define SPIFC_CS 93
-#define SPIFC_CLK 94
-#define SPIFC_D0 95
-#define SPIFC_D1 96
-#define SPIFC_D2 97
-#define SPIFC_D3 98
-#define GPIO99 99
-#define GPIO100 100
-#define GPIO101 101
-#define GPIO102 102
-#define GPIO103 103
-#define GPIO104 104
-#define GPIO105 105
-#define GPIO106 106
-#define GPIO107 107
-#define GPIO108 108
-#define GPIO109 109
-#define GPIO110 110
-#define GPIO111 111
-#define GPIO112 112
-#define GPIO113 113
-#define GPIO114 114
-#define GPIO115 115
-#define SIM_RST 116
-#define SIM_CLK 117
-#define SIM_DATA 118
-#define EXT_INT8 119
-#define EXT_INT9 120
-#define EXT_INT10 121
-#define EXT_INT11 122
-#define EXT_INT12 123
-#define EXT_INT13 124
-#define EXT_INT14 125
-#define EXT_INT15 126
-#define GPIO127 127
-#define GPIO128 128
-#define GPIO129 129
-#define GPIO130 130
-#define GPIO131 131
-#define GPIO132 132
-#define SIM1_RST 133
-#define SIM1_CLK 134
-#define SIM1_DATA 135
-
-
-#define FUNC_GPIO "BGPIO"
-#define FUNC_NOMUX "NOMUX"
-
-struct zx_pinctrl_soc_info {
- const struct pinctrl_pin_desc *pins;
- unsigned int npins;
-};
-
-struct zx_mux_desc {
- const char *name;
- unsigned char mux_val;
-};
-
-struct zx_pin_data {
- /* top: when true, bit set -- pd bit clr -- aon */
- bool top;
- unsigned short toffset;
- unsigned short tbitpos;
-
- unsigned short aoffset;
- unsigned short abitpos;
- unsigned short awidth;
-
- unsigned short poffset;
- unsigned short pbitpos;
- unsigned short pwidth;
-
- unsigned short coffset;
- unsigned short cbitpos;
- unsigned short cwidth;
-
- struct zx_mux_desc *muxes;
-};
-
-#define ZX_PIN(pin, ten, toff, tbp, \
- aoff, abp, awid, \
- poff, pbp, pwid, \
- coff, cbp, cwid, ...) { \
- .number = pin, \
- .name = #pin, \
- .drv_data = &(struct zx_pin_data) { \
- .top = ten, \
- .toffset = toff, \
- .tbitpos = tbp, \
- .aoffset = aoff, \
- .abitpos = abp, \
- .awidth = awid, \
- .poffset = poff, \
- .pbitpos = pbp, \
- .pwidth = pwid, \
- .coffset = coff+0x800, \
- .cbitpos = cbp, \
- .cwidth = cwid, \
- .muxes = (struct zx_mux_desc[]) { \
- __VA_ARGS__, { } }, \
- }, \
-}
-
-#define ZX_PIN_NOMUX(pin, coff, cbp, cwid, ...) { \
- .number = pin, \
- .name = #pin, \
- .drv_data = &(struct zx_pin_data) { \
- .top = false, \
- .toffset = 0, \
- .tbitpos = 0, \
- .aoffset = 0, \
- .abitpos = 0, \
- .awidth = 0, \
- .poffset = 0, \
- .pbitpos = 0, \
- .pwidth = 0, \
- .coffset = coff+0x800, \
- .cbitpos = cbp, \
- .cwidth = cwid, \
- .muxes = (struct zx_mux_desc[]) { \
- __VA_ARGS__, { } }, \
- }, \
-}
-
-
-#define ZX_RESERVED(pin) PINCTRL_PIN(pin, #pin)
-
-#define PD_MUX_FLAG BIT(7)
-#define PD_MUX(_val, _name) { \
- .name = _name, \
- .mux_val = _val | PD_MUX_FLAG, \
-}
-
-#define AON_MUX(_val, _name) { \
- .name = _name, \
- .mux_val = _val, \
-}
-
-int zx_pinctrl_init(struct platform_device *pdev,
- struct zx_pinctrl_soc_info *info);
-
-#endif /* __PINCTRL_ZX297520V3_H */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/sc/pcu/pcu-zx297520v3.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/sc/pcu/pcu-zx297520v3.c
old mode 100644
new mode 100755
index 9481361..cac6ac9
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/sc/pcu/pcu-zx297520v3.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/sc/pcu/pcu-zx297520v3.c
@@ -344,9 +344,9 @@
.pcu_index = PCU_UART0_RXD_INT,
.gic_index = UART0_RXD_INT,
.status_index = 59,
- .wake_index = 0xff,
+ .wake_index = 42,
.int_name = "uart0_rxd",
- .irq_type = IRQ_TYPE_LEVEL_LOW,
+ .irq_type = IRQ_TYPE_EDGE_FALLING,
.wl_type = 0xff,
},
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/Kconfig
deleted file mode 100644
index 971b841..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/Kconfig
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# pcu options
-#
-config ZTE_PCU
- bool "zte pcu support"
- depends on ARCH_ZX298501 || ARCH_ZX297520V3
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/Makefile b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/Makefile
deleted file mode 100644
index 7c6dc44..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Makefile for the soc plat drivers
-#
-
-obj-y += pcu-common.o
-obj-$(CONFIG_ARCH_ZX298501) += pcu-zx298501.o
-obj-$(CONFIG_ARCH_ZX297520V3) += pcu-zx297520v3.o
-
-#
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-common.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-common.c
deleted file mode 100644
index faa4942..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-common.c
+++ /dev/null
@@ -1,410 +0,0 @@
-/*
- *
- * Copyright (C) 2015-2021 ZTE-TSP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/of_device.h>
-#include <linux/of_irq.h>
-#include <linux/of_address.h>
-
-#include <linux/soc/zte/spinlock.h>
-#include <linux/soc/zte/common.h>
-#include <linux/soc/zte/pcu.h>
-
-#include "pcu-common.h"
-
-struct zx_pcu_dev pcu_dev = {0};
-
-#define PCU_INT_CNT (pcu_dev.int_count)
-#define PCU_INT_INFO (pcu_dev.int_info)
-#define PCU_TOP (pcu_dev.top_reg_base)
-
-#define PCU_INT_CLR_BASE (PCU_TOP + INT_CLEAR1_REG)
-#define PCU_INT_POL_BASE (PCU_TOP + INT_POL1_REG)
-#define PCU_INT_TYPE_BASE (PCU_TOP + INT_TYPE1_REG)
-#define PCU_INT_WAKE_BASE (PCU_TOP + AP_INT_WAKE_DIS1_REG)
-
-#define pcu_int_reg_off(index) (index_to_reg32_off(index))
-#define pcu_int_bit_off(index) (index_to_reg32_bit_off(index))
-
-#define PCU_LOCK reg_spin_lock();
-#define PCU_UNLOCK reg_spin_unlock();
-
-#if 0
-#define pm_ram_log printk
-#else
-#define pm_ram_log(fmt, args...) \
-{ \
- zx_ramlog_printk("[PM] " fmt, ##args); \
-}
-#endif
-/**
- * helper function
- *
- */
-static unsigned int pcu_get_index_by_gic(unsigned int gic_index)
-{
- unsigned int i;
- struct zx_pcu_int_info *int_info = PCU_INT_INFO;
-
- for(i=0; i<PCU_INT_CNT; i++)
- {
- if(gic_index == int_info[i].gic_index)
- return int_info[i].pcu_index;
- }
-
- return 0xff;
-}
-
-static unsigned int pcu_get_index_by_wake(unsigned int wake_index)
-{
- unsigned int i;
- struct zx_pcu_int_info *int_info = PCU_INT_INFO;
-
- for(i=0; i<PCU_INT_CNT; i++)
- {
- if(wake_index == int_info[i].wake_index)
- return i;
- }
-
- return 0xff;
-}
-
-
-static unsigned int pcu_get_wake_index_by_gic(unsigned int gic_index)
-{
- unsigned int i;
- struct zx_pcu_int_info *int_info = PCU_INT_INFO;
-
- for(i=0; i<PCU_INT_CNT; i++)
- {
- if(gic_index == int_info[i].gic_index)
- return int_info[i].wake_index;
- }
-
- return 0xff;
-}
-
-bool irq_type_valid(unsigned int int_type)
-{
- return ((int_type==IRQ_TYPE_LEVEL_HIGH) || (int_type==IRQ_TYPE_LEVEL_LOW) || \
- (int_type==IRQ_TYPE_EDGE_RISING) || (int_type==IRQ_TYPE_EDGE_FALLING));
-}
-
-/*only pulse int need be clear*/
-void pcu_int_clear(unsigned int pcu_index)
-{
- void __iomem *reg;
- unsigned int val;
-
- reg = PCU_INT_CLR_BASE + pcu_int_reg_off(pcu_index);
- val = 1 << pcu_int_bit_off(pcu_index);
-
- PCU_LOCK
- zx_set_reg(reg, val);
- PCU_UNLOCK
-}
-EXPORT_SYMBOL(pcu_int_clear);
-
-/**
- * helper function
- *
- * get pcu level/pol configuration.
- */
-static void pcu_split_int_type(unsigned int type, unsigned int *level, unsigned int *pol)
-{
- switch (type) {
- case IRQ_TYPE_LEVEL_HIGH:
- *level = 1;
- *pol = 1;
- break;
- case IRQ_TYPE_EDGE_RISING:
- *level = 0;
- *pol = 1;
- break;
- case IRQ_TYPE_LEVEL_LOW:
- *level = 1;
- *pol= 0;
- break;
- case IRQ_TYPE_EDGE_FALLING:
- *level = 0;
- *pol = 0;
- break;
- default:
- BUG();
- }
-}
-
-/*
- * set pcu int type,
- *
- */
-void pcu_int_set_type(unsigned int pcu_index, unsigned int type)
-{
- void __iomem *type_reg;
- void __iomem *pol_reg;
- unsigned int bit_off;
- unsigned int level;
- unsigned int pol;
-
- type_reg = PCU_INT_TYPE_BASE + pcu_int_reg_off(pcu_index);
- pol_reg = PCU_INT_POL_BASE + pcu_int_reg_off(pcu_index);
- bit_off = pcu_int_bit_off(pcu_index);
-
- pcu_split_int_type(type, &level, &pol);
-
- PCU_LOCK
- zx_wrie_bit(type_reg, bit_off, level);
- zx_wrie_bit(pol_reg, bit_off, pol);
- PCU_UNLOCK
-
- pcu_int_clear(pcu_index);
-}
-EXPORT_SYMBOL(pcu_int_set_type);
-
-/**
- * set wakeup enable.
- *
- *
- */
-static void pcu_int_wakeup(unsigned int wake_index, bool enable)
-{
- void __iomem *reg;
- unsigned int off;
- unsigned int val;
-
- reg = PCU_INT_WAKE_BASE + pcu_int_reg_off(wake_index);
- off = pcu_int_bit_off(wake_index);
- val = enable ? 0 : 1;
-
- PCU_LOCK
- zx_wrie_bit(reg, off, val);
- PCU_UNLOCK
-}
-
-/**
- * get wakeup enable status.
- *
- * return: 1 - int wakeup enabled
- */
-static bool pcu_get_int_wakeup(unsigned int wake_index)
-{
- void __iomem *reg;
- unsigned int off;
- unsigned int val;
-
- reg = PCU_INT_WAKE_BASE + pcu_int_reg_off(wake_index);
- off = pcu_int_bit_off(wake_index);
-
- PCU_LOCK
- val = zx_read_reg(reg);
- PCU_UNLOCK
-
- if (BIT(off) & val)
- return false;
-
- return true;
-}
-
-/**
- * init pcu before open irq when system start.
- *
- */
-void __init pcu_init(void)
-{
- int i;
- struct zx_pcu_int_info *int_info = PCU_INT_INFO;
-
- pr_info("[PCU] PCU_INIT begin.\n");
-
- /*set default int type/pol, and clear fake int*/
-#if 0
- for(i=0; i<PCU_INT_CNT; i++)
- {
- if(!irq_type_valid(int_info[i].irq_type))
- continue;
-
- pcu_int_set_type(int_info[i].pcu_index, int_info[i].irq_type);
- }
-#endif
-
- /* all wake src disabled */
- for(i=0; i<AP_INT_WAKE_CNT; i++)
- pcu_int_wakeup(i, false);
-
- pr_info("[PCU] PCU_INIT end.\n");
-}
-
-#ifdef CONFIG_ARCH_ZX297520V3
-extern unsigned int gic_wake_enable[3];
-#endif
-
-/**
- * set wakeup enable by gic.
- *
- *
- */
-int pcu_set_irq_wake(unsigned int gic_index, bool enable)
-{
- unsigned int wake_index;
-
- wake_index = pcu_get_wake_index_by_gic(gic_index);
- if(wake_index == 0xff)
- return -EINVAL;
-
-#ifdef CONFIG_ARCH_ZX297520V3
- if(gic_index<32)
- ;
- else if(gic_index < (32 + 32))
- gic_wake_enable[0] |=1<<(gic_index -32);
- else if(gic_index < (32 + 64))
- gic_wake_enable[1] |=1<<(gic_index -64);
- else if (gic_index < 77)
- gic_wake_enable[2] |=1<<(gic_index -96);
-#endif
-
- pcu_int_wakeup(wake_index, enable);
-
- return 0;
-}
-
-/**
- * set pcu type by gic.
- *
- *
- */
-int pcu_set_irq_type(unsigned int gic_index, unsigned int type)
-{
- unsigned int pcu_index;
-
- pcu_index = pcu_get_index_by_gic(gic_index);
- if(pcu_index == 0xff)
- return -EINVAL;
-
- pcu_int_set_type(pcu_index, type);
-
- return 0;
-}
-EXPORT_SYMBOL(pcu_set_irq_type);
-
-/**
- * clr pcu int by gic.
- *
- *
- */
-int pcu_clr_irq_pending(unsigned int gic_index)
-{
- unsigned int pcu_index;
-
- pcu_index = pcu_get_index_by_gic(gic_index);
- if(pcu_index == 0xff)
- return -EINVAL;
-
- pcu_int_clear(pcu_index);
-
- return 0;
-}
-EXPORT_SYMBOL(pcu_clr_irq_pending);
-
-#if 0
-void pcu_get_wake_cause(void)
-{
- unsigned int int_status[2];
- u64 int_status_64;
- int i;
- int index_found = 0xff;
- int info_index;
- struct zx_pcu_int_info *int_info = PCU_INT_INFO;
-
- /* when wake up, the level is high&the value is 0*/
- PCU_LOCK
- int_status[0] = zx_read_reg(PCU_TOP + INT_READOUT1_REG);
- int_status[1] = zx_read_reg(PCU_TOP + INT_READOUT2_REG);
- PCU_UNLOCK
- int_status_64 = (u64)int_status[0] | ((u64)int_status[1] << 32);
-
- pm_ram_log(" int_status_64: 0x%llx \n", int_status_64);
-
- for(i=0; i<AP_INT_WAKE_CNT; i++) {
- if (!pcu_get_int_wakeup(i))
- continue;
-
- info_index = pcu_get_index_by_wake(i);
- pm_ram_log(" wake src: %d [%s]\n", i, int_info[info_index].int_name);
-
- if (BIT_ULL(i) & int_status_64)
- continue;
-
- index_found = info_index;
- break;
- }
-
- if(index_found != 0xff)
- {
- pm_ram_log(" wake: %d [%s]\n", int_info[index_found].gic_index, int_info[index_found].int_name);
- pm_ram_log(" pcu int status:%x %x\n", int_status[0], int_status[1]);
- }
- else
- {
- pm_ram_log(" wake abnormal\n");
- pm_ram_log(" pcu int status:%x %x\n", int_status[0], int_status[1]);
- }
-}
-#endif
-/*
-int __weak zx_pcu_init(void)
-{
- return -ESRCH;
-}
-*/
-#if 0
-int __weak zx_pcu_init(struct device *dev)
-{
- return -ESRCH;
-}
-
-static int zx_pcu_probe(struct platform_device* pdev)
-{
- int (*init_fn)(struct device *dev);
-
- pr_info("[PCU] zx_pcu probe enter... \n");
-
- init_fn = of_device_get_match_data(&pdev->dev);
- if (!init_fn) {
- dev_err(&pdev->dev, "Error: No device match found\n");
- return -ENODEV;
- }
-
- return init_fn(&pdev->dev);
-}
-
-static const struct of_device_id zx_pcu_dt_ids[] = {
- {.compatible = "zte,zx298501-pcu", .data = &zx_pcu_init },
- {}
-};
-MODULE_DEVICE_TABLE(of, zx_pcu_dt_ids);
-
-struct platform_driver zx_pcu_driver = {
- .driver = {
- .name = "zx_pcu",
- .of_match_table = of_match_ptr(zx_pcu_dt_ids),
- },
- .probe = zx_pcu_probe,
-};
-
-static int zx_pcu_driver_init(void)
-{
- pr_info("[PCU] zx_pcu_driver_init enter... \n");
- return platform_driver_register(&zx_pcu_driver);
-}
-postcore_initcall(zx_pcu_driver_init);
-#endif
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-common.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-common.h
deleted file mode 100644
index 9a677ef..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-common.h
+++ /dev/null
@@ -1,67 +0,0 @@
-
-#ifndef _PCU_COMMON_H
-#define _PCU_COMMON_H
-
-struct zx_pcu_int_info
-{
- unsigned int pcu_index; /* 2 -- reg0 bit2
- 72 -- reg2 bit6 */
- unsigned int gic_index;
- unsigned status_index; /* index to PCU_INT_READOUT_REG */
- unsigned int wake_index; /* index to AP INT WAKE DIS1 REG */
- char *int_name;
- unsigned int irq_type; /*irq type enter to pcu*/
-};
-
-struct zx_pcu_dev
-{
- struct device_node *np;
- void __iomem *top_reg_base;
- void __iomem *ap_reg_base;
- u32 *wake_src;
- u32 int_count;
- struct zx_pcu_int_info *int_info;
-};
-
-#ifdef CONFIG_ARCH_ZX298501
-#include "pcu-zx298501.h"
-#endif
-
-#ifdef CONFIG_ARCH_ZX297520V3
-#include "pcu-zx297520v3.h"
-#endif
-
-
-extern struct zx_pcu_dev pcu_dev;
-
-#ifdef CONFIG_ZTE_PCU
-
-void __init pcu_init(void);
-int pcu_set_irq_type(unsigned int gic_index, unsigned int type);
-int pcu_clr_irq_pending(unsigned int gic_index);
-int pcu_set_irq_wake(unsigned int gic_index, bool enable);
-
-#else
-static inline int pcu_set_irq_type(unsigned int gic_index, unsigned int type)
-{
- return -ENODEV;
-}
-
-static inline int pcu_clr_irq_pending(unsigned int gic_index)
-{
- return 0;
-}
-
-static inline int pcu_set_irq_wake(unsigned int gic_index, bool enable)
-{
- return 0;
-}
-
-static inline int zx_pcu_init(void)
-{
- return 0;
-}
-
-#endif
-
-#endif /* _PCU_COMMON_H */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-zx297520v3.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-zx297520v3.c
deleted file mode 100644
index e1ae364..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-zx297520v3.c
+++ /dev/null
@@ -1,879 +0,0 @@
-/*
- *
- * Copyright (C) 2015-2022 ZTE-TSP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/of_device.h>
-#include <linux/of_irq.h>
-#include <linux/of_address.h>
-#include <linux/interrupt.h>
-#include <linux/irqdomain.h>
-#include <linux/irqchip/chained_irq.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/percpu.h>
-#include <linux/refcount.h>
-#include <linux/slab.h>
-#include <linux/irqchip.h>
-#include <linux/suspend.h>
-#include <linux/syscore_ops.h>
-#include <linux/mfd/syscon.h>
-#include <linux/regmap.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-#include <linux/soc/zte/common.h>
-#include <linux/soc/zte/spinlock.h>
-#include <linux/soc/zte/pcu.h>
-#include <dt-bindings/soc/zx297520v3-irq.h>
-
-#include "pcu-common.h"
-
-#if 0
-
-#define pm_ram_log(fmt, args...) \
-{ \
- pm_printk("[SLP] " fmt, ##args); \
-}
-#else
-#define pm_ram_log(fmt, args...) \
-{ \
- printk(KERN_INFO "[SLP] " fmt, ##args); \
-}
-
-#endif
-
-#define ZX_IRQ_NUM (IRQ_ZX297520V3_SPI_NUM + 32)
-
-#define PCU_LOCK reg_spin_lock();
-#define PCU_UNLOCK reg_spin_unlock();
-
-static struct zx_pcu_int_info zx297520v3_pcu_int_info[] =
-{
- {
- .pcu_index = PCU_AP_TIMER1_INT,
- .gic_index = AP_TIMER1_INT,
- .status_index = 51,
- .wake_index = 0,
- .int_name = "ap_timer1",
- .irq_type = IRQ_TYPE_EDGE_RISING,
- },
- {
- .pcu_index = PCU_AP_TIMER2_INT,
- .gic_index = AP_TIMER2_INT,
- .status_index = 52,
- .wake_index = 1,
- .int_name = "ap_timer2",
- .irq_type = IRQ_TYPE_EDGE_RISING,
- },
- {
- .pcu_index = PCU_ICP_PS2AP_INT,
- .gic_index = ICP_PS2AP_INT,
- .status_index = 53,
- .wake_index = 2,
- .int_name = "icp_ps_ap",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_USB_POWERDWN_UP_INT,
- .gic_index = USB_POWERDWN_UP_INT,
- .status_index = 6,
- .wake_index = 3,
- .int_name = "usb_up",
- .irq_type = IRQ_TYPE_EDGE_RISING,
- },
- {
- .pcu_index = PCU_USB_POWERDWN_DOWN_INT,
- .gic_index = USB_POWERDWN_DOWN_INT,
- .status_index = 7,
- .wake_index = 4,
- .int_name = "usb_down",
- .irq_type = IRQ_TYPE_EDGE_FALLING,
- },
- {
- .pcu_index = PCU_HSIC_POWERDWN_UP_INT,
- .gic_index = HSIC_POWERDWN_UP_INT,
- .status_index = 8,
- .wake_index = 5,
- .int_name = "hsic_up",
- .irq_type = IRQ_TYPE_EDGE_RISING,
- },
- {
- .pcu_index = PCU_HSIC_POWERDWN_DOWN_INT,
- .gic_index = HSIC_POWERDWN_DOWN_INT,
- .status_index = 9,
- .wake_index = 6,
- .int_name = "hsic_down",
- .irq_type = IRQ_TYPE_EDGE_FALLING,
- },
- {
- .pcu_index = PCU_ICP_M02AP_INT,
- .gic_index = ICP_M02AP_INT,
- .status_index = 54,
- .wake_index = 7,
- .int_name = "icp_m0_ap",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_RTC_ALARM_INT,
- .gic_index = RTC_ALARM_INT,
- .status_index = 12,
- .wake_index = 8,
- .int_name = "rtc_alarm",
- .irq_type = IRQ_TYPE_LEVEL_LOW,
- },
- {
- .pcu_index = PCU_RTC_TIMER_INT,
- .gic_index = RTC_TIMER_INT,
- .status_index = 13,
- .wake_index = 9,
- .int_name = "rtc_timer",
- .irq_type = IRQ_TYPE_LEVEL_LOW,
- },
- {
- .pcu_index = PCU_KEYPAD_INT,
- .gic_index = KEYPAD_INT,
- .status_index = 14,
- .wake_index = 10,
- .int_name = "kpd",
- .irq_type = IRQ_TYPE_EDGE_RISING,
- },
- {
- .pcu_index = PCU_SD1_DATA1_INT,
- .gic_index = SD1_DATA1_INT,
- .status_index = 15,
- .wake_index = 11,
- .int_name = "sd1_d1",
- .irq_type = IRQ_TYPE_LEVEL_LOW,
- },
- {
- .pcu_index = PCU_EX0_INT,
- .gic_index = EX0_INT,
- .status_index = 30,
- .wake_index = 14,
- .int_name = "ext0",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX1_INT,
- .gic_index = EX1_INT,
- .status_index = 31,
- .wake_index = 15,
- .int_name = "ext1",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX2_INT,
- .gic_index = EX2_INT,
- .status_index = 32,
- .wake_index = 16,
- .int_name = "ext2",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX3_INT,
- .gic_index = EX3_INT,
- .status_index = 33,
- .wake_index = 17,
- .int_name = "ext3",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX4_INT,
- .gic_index = EX4_INT,
- .status_index = 34,
- .wake_index = 18,
- .int_name = "ext4",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX5_INT,
- .gic_index = EX5_INT,
- .status_index = 35,
- .wake_index = 19,
- .int_name = "ext5",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX6_INT,
- .gic_index = EX6_INT,
- .status_index = 36,
- .wake_index = 20,
- .int_name = "ext6",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX7_INT,
- .gic_index = EX7_INT,
- .status_index = 37,
- .wake_index = 21,
- .int_name = "ext7",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX8_INT,
- .gic_index = EX8IN1_INT,
- .status_index = 38,
- .wake_index = 22,
- .int_name = "ext8",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX9_INT,
- .gic_index = EX8IN1_INT,
- .status_index = 39,
- .wake_index = 23,
- .int_name = "ext9",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX10_INT,
- .gic_index = EX8IN1_INT,
- .status_index = 40,
- .wake_index = 24,
- .int_name = "ext10",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX11_INT,
- .gic_index = EX8IN1_INT,
- .status_index = 41,
- .wake_index = 25,
- .int_name = "ext11",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX12_INT,
- .gic_index = EX8IN1_INT,
- .status_index = 42,
- .wake_index = 26,
- .int_name = "ext12",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX13_INT,
- .gic_index = EX8IN1_INT,
- .status_index = 43,
- .wake_index = 27,
- .int_name = "ext13",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX14_INT,
- .gic_index = EX8IN1_INT,
- .status_index = 44,
- .wake_index = 28,
- .int_name = "ext14",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_EX15_INT,
- .gic_index = EX8IN1_INT,
- .status_index = 45,
- .wake_index = 29,
- .int_name = "ext15",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_SD0_DATA1_INT,
- .gic_index = SD0_DATA1_INT,
- .status_index = 2,
- .wake_index = 30,
- .int_name = "sd0_d1",
- .irq_type = IRQ_TYPE_LEVEL_LOW,
- },
- {
- .pcu_index = PCU_ICP_PHY2AP_INT,
- .gic_index = ICP_PHY2AP_INT,
- .status_index = 55,
- .wake_index = 31,
- .int_name = "icp_phy_ap",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_GMACPHY_WAKE_INT,
- .gic_index = GMACPHY_WAKE_INT,
- .status_index = 60,
- .wake_index = 0xff,
- .int_name = "gmacphy_wake",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_UART0_RXD_INT,
- .gic_index = UART0_RXD_INT,
- .status_index = 59,
- .wake_index = 0xff,
- .int_name = "uart0_rxd",
- .irq_type = IRQ_TYPE_LEVEL_LOW,
- },
- {
- .pcu_index = PCU_GMAC_INT,
- .gic_index = GMAC_INT,
- .status_index = 16,
- .wake_index = 0xff,
- .int_name = "gmac",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
- {
- .pcu_index = PCU_GMACPHY_INT,
- .gic_index = GMACPHY_INT,
- .status_index = 61,
- .wake_index = 0xff,
- .int_name = "gmacphy",
- .irq_type = IRQ_TYPE_LEVEL_HIGH,
- },
-};
-
-static int zx_pcu_get_irqchip_state(struct irq_data *data,
- enum irqchip_irq_state which, bool *val)
-{
- data = data->parent_data;
-
- if (data->chip->irq_get_irqchip_state)
- return data->chip->irq_get_irqchip_state(data, which, val);
-
- return -ENOSYS;
-}
-
-static int zx_pcu_set_irqchip_state(struct irq_data *data,
- enum irqchip_irq_state which, bool val)
-{
- data = data->parent_data;
-
- if (data->chip->irq_set_irqchip_state)
- return data->chip->irq_set_irqchip_state(data, which, val);
-
- return -ENOSYS;
-}
-
-static int zx_pcu_nmi_setup(struct irq_data *data)
-{
- data = data->parent_data;
-
- if (data->chip->irq_nmi_setup)
- return data->chip->irq_nmi_setup(data);
-
- return -ENOSYS;
-}
-
-static void zx_pcu_nmi_teardown(struct irq_data *data)
-{
- data = data->parent_data;
-
- if (data->chip->irq_nmi_teardown)
- data->chip->irq_nmi_teardown(data);
-}
-
-static int zx_pcu_set_wake(struct irq_data *data, unsigned int on)
-{
- pcu_set_irq_wake(data->hwirq, on);
-
-/* pr_info("irq:%d, onoff:%d", data->hwirq, on);*/
-
- return 0;
-}
-
-static void zx_pcu_eoi_irq(struct irq_data *data)
-{
- pcu_clr_irq_pending(data->hwirq);
-
- irq_chip_eoi_parent(data);
-}
-
-static int zx_pcu_set_type(struct irq_data *data, unsigned int type)
-{
- unsigned int new_type = type;
-
- if(!pcu_set_irq_type(data->hwirq, type))
- new_type = IRQ_TYPE_LEVEL_HIGH;
-
- return irq_chip_set_type_parent(data, new_type);
-}
-
-static int zx_pcu_set_affinity(struct irq_data *data,
- const struct cpumask *dest, bool force)
-{
-/*
- if (data->hwirq == IRQ_ZX298501_AP_TIMER1)
- return irq_chip_set_affinity_parent(data, cpumask_of(0), force); // ???
- else
-*/ return irq_chip_set_affinity_parent(data, dest, force);
-}
-
-static struct irq_chip zx_pcu_chip = {
- .name = "PCU",
- .irq_eoi = zx_pcu_eoi_irq,
- .irq_mask = irq_chip_mask_parent,
- .irq_unmask = irq_chip_unmask_parent,
- .irq_set_wake = zx_pcu_set_wake,
- .irq_set_type = zx_pcu_set_type,
-
- .irq_set_affinity = zx_pcu_set_affinity,
- .irq_get_irqchip_state = zx_pcu_get_irqchip_state,
- .irq_set_irqchip_state = zx_pcu_set_irqchip_state,
- .irq_set_vcpu_affinity = irq_chip_set_vcpu_affinity_parent,
- .irq_nmi_setup = zx_pcu_nmi_setup,
- .irq_nmi_teardown = zx_pcu_nmi_teardown,
- .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED,
-};
-
-static int zx_pcu_domain_translate(struct irq_domain *d,
- struct irq_fwspec *fwspec,
- unsigned long *hwirq,
- unsigned int *type)
-{
- if (is_of_node(fwspec->fwnode)) {
- if (fwspec->param_count != 3)
- return -EINVAL;
-
- /* No PPI should point to this domain */
- if (fwspec->param[0] != 0)
- return -EINVAL;
-
- *hwirq = fwspec->param[1];
- *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
- return 0;
- }
-
- return -EINVAL;
-}
-
-static int zx_pcu_domain_alloc(struct irq_domain *domain,
- unsigned int virq,
- unsigned int nr_irqs, void *data)
-{
- struct irq_fwspec *fwspec = data;
- struct irq_fwspec parent_fwspec;
- struct zx_pcu_dev *pcu = domain->host_data;
- irq_hw_number_t hwirq;
- unsigned int i;
-
- if (fwspec->param_count != 3)
- return -EINVAL; /* Not GIC compliant */
- if (fwspec->param[0] != GIC_SPI)
- return -EINVAL; /* No PPI should point to this domain */
-
- hwirq = fwspec->param[1];
- if (hwirq >= ZX_IRQ_NUM)
- return -EINVAL;
-
- for (i = 0; i < nr_irqs; i++) {
- irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
- &zx_pcu_chip,
- (void __force *)pcu->top_reg_base);
- }
-
- parent_fwspec = *fwspec;
- parent_fwspec.fwnode = domain->parent->fwnode;
- return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs,
- &parent_fwspec);
-}
-
-static const struct irq_domain_ops zx_pcu_domain_ops = {
- .translate = zx_pcu_domain_translate,
- .alloc = zx_pcu_domain_alloc,
- .free = irq_domain_free_irqs_common,
-};
-
-static int __init zx_pcu_init(struct device_node *node,
- struct device_node *parent)
-{
- struct irq_domain *parent_domain, *domain;
- struct zx_pcu_dev *pcu;
-
- if (!parent) {
- pr_err("%pOF: no parent found\n", node);
- return -ENODEV;
- }
-
- parent_domain = irq_find_host(parent);
- if (!parent_domain) {
- pr_err("%pOF: unable to obtain parent domain\n", node);
- return -ENXIO;
- }
-
- pcu = &pcu_dev;
- pcu->np = node;
- pcu->top_reg_base = of_iomap(node, 0);
- WARN(!pcu->top_reg_base, "unable to map top pcu registers\n");
-
- pcu->int_info = zx297520v3_pcu_int_info;
- pcu->int_count = ARRAY_SIZE(zx297520v3_pcu_int_info);
-
- pcu_init();
-
- domain = irq_domain_add_hierarchy(parent_domain, 0, ZX_IRQ_NUM,
- node, &zx_pcu_domain_ops,
- pcu);
- if (!domain) {
- pr_err("%pOF: failed to allocated domain\n", node);
- return -ENOMEM;
- }
-
-// set_smp_cross_call();
- pm_pcu_init();
-
- return 0;
-}
-
-IRQCHIP_DECLARE(zx297520v3_pcu, "zte,zx297520v3-pcu", zx_pcu_init);
-
-/* pcu debug */
-#ifdef CONFIG_PM
-#define PCU_TOP (pcu_dev.top_reg_base)
-
-#define ARM_AP_CONFIG_REG (PCU_TOP + 0x0)
-#define ARM_AP_SLEEP_TIME_REG (PCU_TOP + 4*0x3C)
-#define AP_INT_WAKE_DIS_REG (PCU_TOP + 4*0xD)
-#define CORE_SWITCH_CONFIG_REG (PCU_TOP + 4*0x2b)
-
-#define M0_INT_WAKE_DIS_REG (PCU_TOP + 4*0xE)
-#define PCU_INT_READOUT_REG1 (PCU_TOP + 4*0x1EB)
-#define PCU_INT_READOUT_REG2 (PCU_TOP + 4*0x1EC)
-#define PCU_INT_READOUT_REG3 (PCU_TOP + 4*0x1ED)
-
-
-/*ARM_AP_CONFIG_REG*/
-#define PCU_SLEEP_MODE (1U << 0)
-#define PCU_POWEROFF_MODE (1U << 1)
-#define PCU_L2_CLK_GATE (1U << 2) /*1-can turn off*/
-#define PCU_SLEEP_2M0 (1U << 3)
-#define PCU_SLEEP_DONE_BYPASS (1U << 4)
-#define PCU_SW_CONFIG_MASK (1U << 5) /* ????? */
-
-#define PCU_MODE_MASK (0x3U << 0)
-
-/*ARM_AP_SLEEP_TIME_REG*/
-#define PCU_AP_SLEEP_TIME_DIS (1U << 31)
-
-
-
-/* low power function */
-extern unsigned int pm_get_wakesource(void);
-
-/**
- * clear pcu sleep mode.
- *
- */
-void pm_clear_pcu(void)
-{
- zx_clr_reg(ARM_AP_CONFIG_REG, PCU_MODE_MASK);
-}
-
-void pm_pcu_init(void)
-{
- zx_clr_reg(ARM_AP_CONFIG_REG, PCU_MODE_MASK);
- zx_set_reg(ARM_AP_CONFIG_REG, PCU_L2_CLK_GATE);
- zx_write_reg(AP_INT_WAKE_DIS_REG, ~(pm_get_wakesource()));
-}
-
-void zx_apmgclken_set(unsigned en)
-{
- unsigned tmp;
- if(en){
- //set ps_clk_switch=1
- tmp = zx_read_reg(CORE_SWITCH_CONFIG_REG);
- tmp |= (0x1<<2);
- zx_write_reg(CORE_SWITCH_CONFIG_REG, tmp);
- } else{
- //set ps_clk_switch=0
- tmp = zx_read_reg(CORE_SWITCH_CONFIG_REG);
- tmp &= ~(0x1<<2);
- zx_write_reg(CORE_SWITCH_CONFIG_REG, tmp);
- }
-}
-
-
-/**
- * config pcu before poweroff
- *
- */
-void pm_set_pcu_poweroff(u32 sleep_time)
-{
- zx_set_reg(ARM_AP_CONFIG_REG, PCU_POWEROFF_MODE);
- zx_write_reg(ARM_AP_SLEEP_TIME_REG, sleep_time);
-}
-EXPORT_SYMBOL(pm_set_pcu_poweroff);
-
-
-/**
- * config pcu before sleep
- *
- */
-void pm_set_pcu_sleep(u32 sleep_time)
-{
- zx_set_reg(ARM_AP_CONFIG_REG, PCU_SLEEP_MODE);
- zx_write_reg(ARM_AP_SLEEP_TIME_REG, sleep_time);
-}
-
-/**
- * get wakeup setting.
- *
- */
-unsigned int pcu_get_wakeup_setting(void)
-{
- return zx_read_reg(AP_INT_WAKE_DIS_REG);
-}
-/**
- * set wakeup enable by gic.
- *
- *
- */
-unsigned int gic_wake_enable[3]=
-{
- (1<<ICP_PS2AP_INT) |(1<<ICP_M02AP_INT) | (1<<AP_TIMER1_INT) ,
- 0,
- 0
-};
-
-void pm_get_wake_cause(void)
-{
- unsigned int int_status[2];
- int i = 0;
- int index_found = 0xff;
- unsigned int pcu_wake_setting[2];
-
- /* when wake up, the level is high&the value is 0*/
- int_status[0] = zx_read_reg(PCU_INT_READOUT_REG1);
- int_status[1] = zx_read_reg(PCU_INT_READOUT_REG2);
-
- pcu_wake_setting[0] = zx_read_reg(AP_INT_WAKE_DIS_REG);
- pcu_wake_setting[1] = zx_read_reg(M0_INT_WAKE_DIS_REG);
-
- for(i=0; i<ARRAY_SIZE(zx297520v3_pcu_int_info); i++)
- {
- if (zx297520v3_pcu_int_info[i].wake_index == 0xff)
- continue;
-
- if(pcu_wake_setting[0]&BIT(zx297520v3_pcu_int_info[i].wake_index))
- continue;
-
- if(int_status[zx297520v3_pcu_int_info[i].status_index/32]&(1<<(zx297520v3_pcu_int_info[i].status_index%32)))
- continue;
-
- index_found = i;
- break;
- }
-
- if(index_found != 0xff)
- {
- pm_ram_log(" wake: %d [%s]\n", zx297520v3_pcu_int_info[index_found].gic_index, zx297520v3_pcu_int_info[index_found].int_name);
- pm_ram_log(" pcu int status:%x %x\n",int_status[0], int_status[1]);
- }
- else
- {
- pm_ram_log(" wake abnormal\n");
- pm_ram_log(" pcu int status:%x %x\n",int_status[0], int_status[1]);
- }
-}
-
-
-static struct wakeup_source *zx_main_ws;
-static int zx_pcu_pm_callback(struct notifier_block *nb,
- unsigned long action, void *ptr)
-{
- switch (action) {
-
- case PM_POST_SUSPEND:
- __pm_wakeup_event(zx_main_ws, 1000);
- break;
-
- default:
- return NOTIFY_DONE;
- }
-
- return NOTIFY_OK;
-}
-
-static int pcu_pm_suspend(void)
-{
- int ret = 0;
-
- return ret;
-}
-
-static void pcu_pm_resume(void)
-{
-// pcu_get_wake_cause();
-}
-
-static struct syscore_ops pcu_pm_syscore_ops = {
- .suspend = pcu_pm_suspend,
- .resume = pcu_pm_resume,
-};
-
-static int pcu_pm_init(void)
-{
- zx_main_ws = wakeup_source_register(NULL, "zx_main");
- if (!zx_main_ws)
- return -ENOMEM;
-
- pm_notifier(zx_pcu_pm_callback, 0);
-
- register_syscore_ops(&pcu_pm_syscore_ops);
- return 0;
-}
-core_initcall(pcu_pm_init);
-#endif
-
-/* --------------------------------------------------------------------
- * extint_8in1
- * -------------------------------------------------------------------- */
-
-struct ext8in1_info {
- struct irq_domain *domain;
- struct regmap *regmap;
- int parent_irq;
-
-};
-
-struct ext8in1_info ext8in1_dev = {0};
-
-/*
- * return external interrupt number from ex8-ex15,
- * return value is 0-7
- */
-static unsigned int pcu_get_8in1_int_source(void)
-{
- unsigned int vector_8in1 = 0;
-
- vector_8in1 = zx_read_reg(pcu_dev.top_reg_base+0x12C);
-
- return (vector_8in1&0x7);
-}
-
-
-/*external int 8-15 need extra clear*/
-static void pcu_int_clear_8in1(unsigned int pcu_index)
-{
- unsigned int vector=0;
-
- if ( (pcu_index >= PCU_EX8_INT)&&(pcu_index <= PCU_EX15_INT) )
- {
- /*
- *in 7510 platform, 8in1 interrupt would be used by different cores.
- *when any core installs a new 8in1 interrupt, another core may be
- * responding another 8in1 interrupt, so 8in1 interrupt shouldn't be
- *cleared. in this case, nothing to be done. but a new problem comes,
- * the core install new 8in1 interrupt will receive a fake interrupt.
- */
- vector = pcu_get_8in1_int_source();
- if (pcu_index != (vector + PCU_EX8_INT) )
- return;
-
- PCU_LOCK
- zx_write_reg(pcu_dev.top_reg_base+0x128, 0x1);
- PCU_UNLOCK
- }
-}
-
-static void ext8in1_irq_lock(struct irq_data *data){}
-static void ext8in1_irq_sync_unlock(struct irq_data *data){}
-static void ext8in1_irq_mask(struct irq_data *data){}
-static void ext8in1_irq_unmask(struct irq_data *data){}
-static void ext8in1_irq_eoi(struct irq_data *data)
-{
- pcu_int_clear_8in1(data->hwirq + PCU_EX8_INT);
-}
-
-static struct irq_chip ext8in1_irq_chip =
-{
- .name = "ext8in1",
- .irq_mask = ext8in1_irq_mask,
- .irq_unmask = ext8in1_irq_unmask,
- .irq_bus_lock = ext8in1_irq_lock,
- .irq_bus_sync_unlock = ext8in1_irq_sync_unlock,
- .irq_eoi = ext8in1_irq_eoi,
-};
-
-static void ext8in1_handle_irq(struct irq_desc *desc)
-{
- struct ext8in1_info *data = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
- int virq;
- int hwirq;
-
- chained_irq_enter(chip, desc);
-
- hwirq = pcu_get_8in1_int_source();
-
- virq = irq_find_mapping(data->domain, hwirq);
- if (virq > 0)
- generic_handle_irq(virq);
-
- chained_irq_exit(chip, desc);
-}
-
-static int zx_ext8in1_probe(struct platform_device *pdev)
-{
- struct device_node *np = pdev->dev.of_node;
- struct device_node *parent_np;
- struct regmap *regmap;
- struct ext8in1_info *data = &ext8in1_dev;
- int i;
-
- parent_np = of_parse_phandle(pdev->dev.of_node, "parent-syscon", 0);
- if (!parent_np) {
- dev_err(&pdev->dev, "Can't get parent-syscon\n");
- return -EINVAL;
- }
-
- regmap = syscon_node_to_regmap(parent_np);
- if (IS_ERR(regmap)) {
- of_node_put(parent_np);
- return PTR_ERR(regmap);
- }
- data->regmap = regmap;
-
- data->parent_irq = platform_get_irq(pdev, 0);
- if (data->parent_irq <= 0)
- return -EPROBE_DEFER;
-
- data->domain = irq_domain_add_linear(np, 8, &irq_domain_simple_ops, NULL);
- if (!data->domain)
- return -ENODEV;
-
- for (i = EX8_INT; i <= EX15_INT; i++) {
- int virq = irq_create_mapping(data->domain, i);
-
- irq_set_chip_and_handler(virq, &ext8in1_irq_chip,
- handle_simple_irq);
- irq_set_chip_data(virq, data);
- }
-
- irq_set_chained_handler_and_data(data->parent_irq,
- ext8in1_handle_irq, data);
-
- pr_info("zx_ext8in1 init OK. \n");
-
- return 0;
-}
-
-static const struct of_device_id zx_ext8in1_match[] = {
- { .compatible = "zte,zx297520v3-ext8in1" },
- { }
-};
-
-static struct platform_driver zx_ext8in1_driver = {
- .probe = zx_ext8in1_probe,
- .driver = {
- .name = "zx_ext8in1_drv",
- .of_match_table = zx_ext8in1_match,
- },
-};
-
-static int __init zx_ext8in1_driver_init(void)
-{
- return platform_driver_register(&zx_ext8in1_driver);
-}
-core_initcall(zx_ext8in1_driver_init);
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-zx297520v3.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-zx297520v3.h
deleted file mode 100644
index 89f1aae..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/pcu/pcu-zx297520v3.h
+++ /dev/null
@@ -1,73 +0,0 @@
-
-#ifndef _PCU_ZX297520V3_H
-#define _PCU_ZX297520V3_H
-
-#ifdef _PCU_ZX297520V3_H
-/* ap related registers */
-#define AP_INT_WAKE_DIS1_REG (0x34)
-#define INT_TYPE1_REG (0x3C) /* 1-level 0-pulse */
-#define INT_POL1_REG (0x4C) /* 1-HL or Pos 0-LL or Neg */
-#define INT_CLEAR1_REG (0x5C) /* write 1 */
-
-#define INT_READOUT1_REG (0x7AC)
-//#define INT_READOUT2_REG (0x19C)
-
-#define AP_INT_WAKE_CNT (32)
-#define PCU_UNKNOWN_INT 0xff,
-
-
-/* reg1 */
-#define PCU_INT_REG1_OFF (0)
-#define PCU_GMAC_INT (PCU_INT_REG1_OFF + 0)
-#define PCU_UART0_RXD_INT (PCU_INT_REG1_OFF + 1)
-#define PCU_ICP_PHY2AP_INT (PCU_INT_REG1_OFF + 2)
-#define PCU_SD0_DATA1_INT (PCU_INT_REG1_OFF + 3)
-#define PCU_USB_POWERDWN_UP_INT (PCU_INT_REG1_OFF + 7)
-#define PCU_USB_POWERDWN_DOWN_INT (PCU_INT_REG1_OFF + 8)
-#define PCU_HSIC_POWERDWN_UP_INT (PCU_INT_REG1_OFF + 9)
-#define PCU_HSIC_POWERDWN_DOWN_INT (PCU_INT_REG1_OFF + 10)
-#define PCU_RTC_ALARM_INT (PCU_INT_REG1_OFF + 13)
-#define PCU_RTC_TIMER_INT (PCU_INT_REG1_OFF + 14)
-#define PCU_KEYPAD_INT (PCU_INT_REG1_OFF + 15)
-#define PCU_SD1_DATA1_INT (PCU_INT_REG1_OFF + 16)
-#define PCU_GMACPHY_WAKE_INT (PCU_INT_REG1_OFF + 17)
-#define PCU_SPCU_PW_INT (PCU_INT_REG1_OFF + 18)
-#define PCU_ICP_PS2AP_INT (PCU_INT_REG1_OFF + 20)
-#define PCU_ICP_M02AP_INT (PCU_INT_REG1_OFF + 21)
-#define PCU_AP_TIMER1_INT (PCU_INT_REG1_OFF + 22)
-#define PCU_AP_TIMER2_INT (PCU_INT_REG1_OFF + 23)
-#define PCU_FRM_ARM_32K_INT (PCU_INT_REG1_OFF + 31)
-
-
-
-/* reg2 */
-#define PCU_INT_REG2_OFF (32)
-#define PCU_GMACPHY_INT (PCU_INT_REG2_OFF + 0)
-
-
-
-/* reg3 */
-#define PCU_INT_REG3_OFF (64)
-#define PCU_EX0_INT (PCU_INT_REG3_OFF + 0)
-#define PCU_EX1_INT (PCU_INT_REG3_OFF + 1)
-#define PCU_EX2_INT (PCU_INT_REG3_OFF + 2)
-#define PCU_EX3_INT (PCU_INT_REG3_OFF + 3)
-#define PCU_EX4_INT (PCU_INT_REG3_OFF + 4)
-#define PCU_EX5_INT (PCU_INT_REG3_OFF + 5)
-#define PCU_EX6_INT (PCU_INT_REG3_OFF + 6)
-#define PCU_EX7_INT (PCU_INT_REG3_OFF + 7)
-#define PCU_EX8_INT (PCU_INT_REG3_OFF + 8)
-#define PCU_EX9_INT (PCU_INT_REG3_OFF + 9)
-#define PCU_EX10_INT (PCU_INT_REG3_OFF + 10)
-#define PCU_EX11_INT (PCU_INT_REG3_OFF + 11)
-#define PCU_EX12_INT (PCU_INT_REG3_OFF + 12)
-#define PCU_EX13_INT (PCU_INT_REG3_OFF + 13)
-#define PCU_EX14_INT (PCU_INT_REG3_OFF + 14)
-#define PCU_EX15_INT (PCU_INT_REG3_OFF + 15)
-
-
-
-#endif
-
-
-#endif /* _PCU_ZX297520V3_H */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/Kconfig
deleted file mode 100644
index c6480f3..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/Kconfig
+++ /dev/null
@@ -1,106 +0,0 @@
-#
-#
-#
-menuconfig ARCH_ZX297520V3
- bool "ZTE-TSP ZX297520V3"
- depends on ARCH_MULTI_V7
- select SOC_ZTE
- select ARM_AMBA
- select HAVE_ARM_ARCH_TIMER
- select RESET_CONTROLLER
- select RESET_SIMPLE
- select RESET_ZX29
- select MFD_SYSCON
- select PINCTRL_ZX297520V3
- select GPIO_ZX29
- select GPIOLIB_IRQCHIP
- select ZTE_PCU
- select DMADEVICES
- select ZTE_DMA
- select ZTE_RPMSG
- select ZX29_ICP
- select DECOMPRESS_RELADDR_BOOT
- help
- ZTE-TSP ZX297520V3 based systems
-
-config DTB_ADDR
- hex "DTB Physical address of main memory" if MMU
- default 0x22100000 if ARCH_ZX297520V3
-
-if ARCH_ZX297520V3
-
-comment "ZX297520V3 Board Type"
-
-config ARCH_ZX297520V3_EVB
- bool "ZTE-TSP ZX297520V3_EVB board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 EVB board.
-
-config ARCH_ZX297520V3_MDL
- bool "ZTE-TSP ZX297520V3 MDL board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 MDL board.
-
-config ARCH_ZX297520V3_MIFI
- bool "ZTE-TSP ZX297520V3 MIFI board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 MIFI board.
-
-config ARCH_ZX297520V3_UFI
- bool "ZTE-TSP ZX297520V3 UFI board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 UFI board.
-
-config ARCH_ZX297520V3_PHONE
- bool "ZTE-TSP ZX297520V3 PHONE board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 PHONE board.
-
-config ARCH_ZX297520V3_FWP
- bool "ZTE-TSP ZX297520V3 FWP board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 FWP board.
-
-config ARCH_ZX297520V3_WATCH
- bool "ZTE-TSP ZX297520V3 WATCH board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 WATCH board.
-
-config ARCH_ZX297520V3_CPE
- bool "ZTE-TSP ZX297520V3 CPE board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 CPE board.
-
-config ARCH_ZX297520V3_CPE_SWITCH
- bool "ZTE-TSP ZX297520V3 CPE SWITCH board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 CPE SWITCH board.
-config ARCH_ZX297520V3_POC
- bool "ZTE-TSP ZX297520V3 POC board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 POC board.
-
-config ARCH_ZX297520V3_FPGA
- bool "ZTE-TSP ZX297520V3 FPGA board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 FPGA board.
-
-config ARCH_ZX297520V3_CAP
- bool "ZTE-TSP ZX297520V3 CAP board"
- help
- Select this if you are using ZTE-TSP ZX297520V3 CAP board.
-
-config MIN_VERSION
- bool "min version used for 16M nor-flash"
- help
- Select this if you are using 16M nor-flash board.
-
-config MIN_8M_VERSION
- bool "min version used for 8M nor-flash"
- help
- Select this if you are using 8M nor-flash board.
-endif
-
-config DECOMPRESS_RELADDR_BOOT
- bool "get reladdr from boot when decompressed"
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/Makefile b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/Makefile
deleted file mode 100644
index 2b8dded..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the soc plat drivers
-#
-
-obj-$(CONFIG_ARCH_ZX279132S) += plat-zx279132s.o
-obj-$(CONFIG_ARCH_ZX298501) += plat-zx298501.o
-obj-$(CONFIG_ARCH_ZX297520V3) += plat-zx297520v3.o
-#
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/plat-zx297520v3.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/plat-zx297520v3.c
deleted file mode 100644
index c6f9f47..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/plat/plat-zx297520v3.c
+++ /dev/null
@@ -1,1111 +0,0 @@
-/*
- * drivers/soc/zte/plat/plat-zx298501.c
- *
- * Copyright (C) 2021 ZTE-TSP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/clockchips.h>
-#include <linux/clk.h>
-#include <linux/clk-provider.h>
-#include <linux/module.h>
-#include <linux/err.h>
-#include <linux/syscore_ops.h>
-#include <linux/gpio.h>
-#include <linux/of_device.h>
-#include <linux/pinctrl/consumer.h>
-#include <linux/io.h>
-#include <linux/of_gpio.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <linux/pm_runtime.h>
-#include <linux/delay.h>
-#include <linux/reset.h>
-#include <linux/io.h>
-#include <linux/amba/serial.h>
-#include <linux/serial_reg.h>
-#include <linux/of_device.h>
-#include <linux/of_irq.h>
-#include <linux/of_address.h>
-#include <linux/sched/clock.h>
-#include <linux/suspend.h>
-#include <linux/mfd/syscon.h>
-#include <linux/regmap.h>
-#include <linux/reboot.h>
-#include <linux/soc/zte/common.h>
-#include <linux/soc/zte/pcu.h>
-#include <linux/soc/zte/spinlock.h>
-#include <dt-bindings/soc/zx297520v3-irq.h>
-
-/*
- * we use sysfs to test&debug some system funcs
- *
- */
-struct kobject *zx_root_kobj;
-struct kobject *zx_test_kobj;
-
-extern int __init zx_clk_test_init(void);
-extern int __init zx_dma_test_init(void);
-extern int __init zx_icp_test_init(void);
-extern int __init zx_timer_test_init(void);
-
-#define CONFIG_USE_DEBUG_LED 1
-#define ZX_RESET_TEST 1
-#define ZX_CLK_TEST 1
-#define ZX_PINCTRL_TEST 1
-#define ZX_GPIO_TEST 1
-#define ZX_EINT_TEST 1
-#define ZX_PM_TEST 1
-#if ZX_PM_TEST
-#define PM_RUNTIME_AUTO_TEST 1
-#endif
-#define ZX_SPINLOCK_TEST 0
-
-
-/*
- *
- * some test need device probe
- */
-struct zx_drv_test
-{
- struct device *dev;
-#if ZX_RESET_TEST
- struct reset_control *rst;
-#endif
-
-#if ZX_PINCTRL_TEST
- struct pinctrl *pctrl;
- struct pinctrl_state *state0;
- struct pinctrl_state *state1;
- struct pinctrl_state *state2;
-#endif
-
-#if ZX_GPIO_TEST
- int gpio;
- struct gpio_desc *gd;
-
-#endif
-
-#if ZX_EINT_TEST
- int eint_irq;
-#endif
-
-#if ZX_CLK_TEST
- struct clk *clk;
-#endif
-};
-
-struct zx_drv_test drv_test = {0};
-
-#if 0//ZX_RESET_TEST
-static void drv_reset_test(struct reset_control *rstc)
-{
- reset_control_assert(rstc);
- udelay(10);
- reset_control_deassert(rstc);
-}
-#endif
-
-#if ZX_EINT_TEST
-static irqreturn_t test_eint_isr(int irq, void *p)
-{
- static int eint_cnt = 0;
-
- pr_info("eint get = %d\n", ++eint_cnt);
-
- return IRQ_HANDLED;
-}
-#endif
-
-#if ZX_GPIO_TEST
-static irqreturn_t gpio_irq_handler(int irq, void *dev_id)
-{
- static int irq_cnt = 0;
-
- irq_cnt ++;
- pr_info("gpio irq_cnt = %d\n", irq_cnt);
-
- return IRQ_HANDLED;
-}
-#endif
-
-/*
- * test led helper interface
- *
- */
-#if CONFIG_USE_DEBUG_LED
-static void test_led_init(void)
-{
- int ret;
-
- if (!drv_test.dev)
- return;
-
- ret = gpio_request(drv_test.gpio, "led_test");
- if (ret)
- {
- pr_info("led_test gpio request error.\n");
- return ;
- }
-
- gpio_direction_output(drv_test.gpio, 0);
-}
-static void test_led_on(void)
-{
- if (!drv_test.dev)
- return;
-
- gpio_direction_output(drv_test.gpio, 1);
-}
-static void test_led_off(void)
-{
- if (!drv_test.dev)
- return;
-
- gpio_direction_output(drv_test.gpio, 0);
-}
-#else
-static void test_led_init(void){}
-static void test_led_on(void){}
-static void test_led_off(void){}
-#endif
-
-#if ZX_PM_TEST
-
-static int zx_drv_test_pm_resume(struct device *dev)
-{
- pm_stay_awake(dev);
-
- pr_info("zx_drv_test_pm_resume\n");
- return 0;
-}
-
-static int zx_drv_test_pm_suspend(struct device *dev)
-{
- pr_info("zx_drv_test_pm_suspend\n");
- return 0;
-}
-
-static int zx_drv_test_pm_runtime_resume(struct device *dev)
-{
- /* enable clk and restore regs */
- pr_info("zx_drv_test_pm_runtime_resume\n");
- return 0;
-}
-
-static int zx_drv_test_pm_runtime_suspend(struct device *dev)
-{
- /* backup regs and disable clk */
- pr_info("zx_drv_test_pm_runtime_suspend\n");
- return 0;
-}
-
-static int zx_drv_test_pm_runtime_idle(struct device *dev)
-{
- pr_info("zx_drv_test_pm_runtime_idle\n");
- return 0;
-}
-
-static const struct dev_pm_ops zx_drv_test_pm = {
- .resume = zx_drv_test_pm_resume,
- .suspend = zx_drv_test_pm_suspend,
- .runtime_resume = zx_drv_test_pm_runtime_resume,
- .runtime_suspend = zx_drv_test_pm_runtime_suspend,
- .runtime_idle = zx_drv_test_pm_runtime_idle
-};
-#endif
-
-
-static int zx_drv_test_probe(struct platform_device *pdev)
-{
- int gpio;
- int irq;
- enum of_gpio_flags flags;
- int ret;
-
- drv_test.dev = &pdev->dev;
-
- /* reset */
-#if ZX_RESET_TEST
- drv_test.rst = devm_reset_control_get(&pdev->dev, "test_rst");
-#endif
-
- /* clk */
-#if ZX_CLK_TEST
- drv_test.clk = devm_clk_get(&pdev->dev, "test");
- if (IS_ERR(drv_test.clk)) {
- ret = PTR_ERR(drv_test.clk);
- dev_err(&pdev->dev, "failed to get test_clk: %d\n", ret);
- return ret;
- }
- clk_prepare_enable(drv_test.clk);
-#endif
-
- /* pinctrl */
-#if ZX_PINCTRL_TEST
-/*
- drv_test.pctrl = devm_pinctrl_get_select_default(&pdev->dev);
-*/
- drv_test.pctrl = devm_pinctrl_get(&pdev->dev);
- if (IS_ERR(drv_test.pctrl)) {
- dev_warn(&pdev->dev, "Failed to get test pins");
- drv_test.pctrl = NULL;
- goto pinctrl_init_end;
- }
- drv_test.state0 = pinctrl_lookup_state(drv_test.pctrl, "state0");
- if (IS_ERR(drv_test.state0)) {
- dev_err(&pdev->dev, "TEST: missing state0\n");
- }
- drv_test.state1 = pinctrl_lookup_state(drv_test.pctrl, "state1");
- if (IS_ERR(drv_test.state1)) {
- dev_err(&pdev->dev, "TEST: missing state1\n");
- }
- drv_test.state2 = pinctrl_lookup_state(drv_test.pctrl, "ext_int5");
- if (IS_ERR(drv_test.state2)) {
- dev_err(&pdev->dev, "TEST: missing state2\n");
- }
- if ( pinctrl_select_state(drv_test.pctrl, drv_test.state0) < 0) {
- dev_err(&pdev->dev, "setting state0 failed\n");
- }
-
- /* eint5 */
- if ( pinctrl_select_state(drv_test.pctrl, drv_test.state2) < 0) {
- dev_err(&pdev->dev, "setting eint5 failed\n");
- }
-
-pinctrl_init_end:
-#endif
-
-
-#if ZX_PM_TEST
- /* just show how a device use wake source */
- device_init_wakeup(&pdev->dev, true);
- pm_stay_awake(&pdev->dev);
-#endif
-
- /* eint5 irq */
-#if ZX_EINT_TEST
- drv_test.eint_irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
- ret = request_irq(drv_test.eint_irq,
- test_eint_isr,
- 0,
- "test_eint",
- &drv_test);
- if(ret<0)
- BUG();
- enable_irq_wake(drv_test.eint_irq);
-#endif
-
-#if ZX_GPIO_TEST
- drv_test.gd = gpiod_get_index(drv_test.dev, "testtt", 0, GPIOD_OUT_HIGH);
-
- /* gpio test */
- gpio = of_get_gpio_flags(pdev->dev.of_node, 0, &flags);
- if (!gpio_is_valid(gpio)) {
- pr_info("test gpio no found\n");
- goto gpio_init_end;
- }
- /* pr_info("test gpio :%d flag=0x%x\n", gpio, flags); */
-
- drv_test.gpio = gpio;
- test_led_init();
-
- irq = gpio_to_irq(gpio);
- if (irq > 0) {
- if (0 != request_irq(irq, gpio_irq_handler, IRQF_TRIGGER_RISING, "gpio_irq_test", NULL)) {
- pr_info("request gpio irq failed\n");
- goto gpio_init_end;
- }
- }
-
-gpio_init_end:
-#endif
-
-#if ZX_PM_TEST
-#if PM_RUNTIME_AUTO_TEST
- pm_runtime_set_autosuspend_delay(&pdev->dev, 3000 /*ms*/);
- pm_runtime_use_autosuspend(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
- pm_runtime_get_sync(&pdev->dev);
- if (!pm_runtime_enabled(&pdev->dev)) {
- zx_drv_test_pm_runtime_resume(&pdev->dev);
- }
-
- /* put to suspend 3s later */
- pm_runtime_mark_last_busy(&pdev->dev);
- pm_runtime_put_sync_autosuspend(&pdev->dev);
-#else
- if (pdev->dev.pm_domain) {
- pm_runtime_set_active(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
- }
-
- if (pm_runtime_enabled(&pdev->dev))
- pm_runtime_get_sync(&pdev->dev);
-#endif
-#endif
-
- return 0;
-}
-
-static const struct of_device_id zx297520v3_drv_test_match[] = {
- { .compatible = "zte,drv-test", },
- { }
-};
-
-static struct platform_driver zx_test_driver = {
- .probe = zx_drv_test_probe,
- .driver = {
- .name = "zx297520v3_drv_test",
-#if ZX_PM_TEST
- .pm = &zx_drv_test_pm,
-#endif
- .of_match_table = zx297520v3_drv_test_match,
- },
-};
-
-/*sys fs*/
-#define zte_attr(_name) \
-static struct kobj_attribute _name##_attr = \
-{ \
- .attr = \
- { \
- .name = __stringify(_name), \
- .mode = 0644, \
- }, \
- .show = _name##_show, \
- .store = _name##_store, \
-}
-
-/*=============================================================================
- *======== /sys/zte/test/os_timer ==============================================
- *=============================================================================
- */
-static ssize_t os_timer_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s\n", "[TEST]Test will light on/off led every 5s~");
-
- return (s - buf);
-}
-
-/*echo 1 > /sys/zte/test/os_timer*/
-static struct timer_list test_timer;
-static unsigned long test_timer_count = 0;
-static void test_timer_expired(struct timer_list *unused)
-{
- mod_timer(&test_timer, jiffies + msecs_to_jiffies(5*1000));
-
- pr_info("[TEST]Test timer arrived:%lu \n",
- ++test_timer_count);
-
-/*
- if(test_timer_count&1)
- test_led_on();
- else
- test_led_off();
-*/
-}
-
-static ssize_t os_timer_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- unsigned int temp;
-
-// if(strict_strtol(buf, 0, &temp))
- if(sscanf(buf, "%u", &temp) != 1)
- error = -EINVAL;
-
- pr_info("temp=%d", temp);
-
- if(temp == 1)
- {
- mod_timer(&test_timer, jiffies + msecs_to_jiffies(5*1000));
- }
- else
- {
- del_timer(&test_timer);
- test_timer_count = 0;
- }
-
- return error ? error : n;
-}
-
-zte_attr(os_timer);
-
-/*=============================================================================
- *======== /sys/zte/test/timer ==============================================
- *=============================================================================
- */
-/*echo 0xXXXXXXXX > /sys/zte/test/reg_read*/
-#if ZX_PM_TEST
-static ssize_t wake_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s\n", "[TEST]Read register[0xXXXXXXXX] value~");
-
- return (s - buf);
-}
-
-static ssize_t wake_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- unsigned int temp;
-
- if(sscanf(buf, "%u", &temp) != 1)
- error = -EINVAL;
-
- pr_info("temp=%d", temp);
-
- if(temp == 1)
- {
- pm_stay_awake(drv_test.dev);
- }
- else if(temp == 2)
- {
- pm_relax(drv_test.dev);
- }
-
-#if 0
- if(sscanf(buf, "%08x", &addr) != 1)
- error = -EINVAL;
-
- reg_vir_addr = ioremap(addr, 0x1000);
- pr_info("reg[%08x]=%08x\n", addr, ioread32((void __iomem *)reg_vir_addr));
-
- iounmap(reg_vir_addr);
-#endif
- return error ? error : n;
-}
-
-zte_attr(wake);
-#endif
-/*=============================================================================
- *======== /sys/zte/test/spinlock ==============================================
- *=============================================================================
- */
-/*echo 0xXXXXXXXX > /sys/zte/test/spinlock*/
-#if ZX_SPINLOCK_TEST
-void hw_spin_lock(u32 hwid);
-void hw_spin_unlock(u32 hwid);
-static ssize_t spinlock_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
-// s += sprintf(s, "%s\n", "[TEST]Read register[0xXXXXXXXX] value~");
-
- return (s - buf);
-}
-
-static ssize_t spinlock_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- u32 temp;
-
- {
-#if 0
- int irq_base ;
-
- pr_info("current irq=%d\n", irq);
- irq_base = irq_alloc_descs(-1, 0, 11, 0);
- pr_info("next irq=%d\n", irq_base);
-#endif
- struct of_phandle_args out_irq;
- int rc;
-
- rc = of_irq_parse_one(drv_test.dev->of_node, 0, &out_irq);
- pr_info("pcie irq=%d\n", rc);
-
- }
-
- sscanf(buf, "%u", &temp);
- pr_info("spinlock store:%d\n", temp);
-#if 0
- /* 1--lock 2--unlock */
- if(temp == 1)
- {
- hw_spin_lock(7);
- pr_info("spinlock lock ok!\n");
- }
- else if(temp == 2)
- {
- hw_spin_unlock(7);
- pr_info("spinlock unlock ok!\n");
- }
-#endif
- return error ? error : n;
-}
-
-zte_attr(spinlock);
-#endif
-
-/*=============================================================================
- *======== /sys/zte/test/reset ==============================================
- *=============================================================================
- */
-/* echo 1/0 > /sys/zte/test/reset */
-#if ZX_RESET_TEST
-static ssize_t reset_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s %d\n", "reset signal status:", reset_control_status(drv_test.rst));
-
- return (s - buf);
-}
-
-static ssize_t reset_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- u32 temp;
-
- sscanf(buf, "%u", &temp);
-
- /* 1--assert 0--deassert */
- if(temp == 1)
- {
- reset_control_deassert(drv_test.rst);
-
- pr_info("reset signal assert!\n");
- }
- else if(temp == 0)
- {
- reset_control_deassert(drv_test.rst);
-
- pr_info("reset signal release!\n");
- }
-
- return error ? error : n;
-}
-
-zte_attr(reset);
-#endif
-/*=============================================================================
- *======== /sys/zte/test/gpio ============================================
- *=============================================================================
- */
-/* echo 1/0 > /sys/zte/test/gpio */
-#if ZX_PINCTRL_TEST
-static ssize_t gpio_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- return (s - buf);
-}
-
-static ssize_t gpio_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- u32 temp;
-
- sscanf(buf, "%u", &temp);
-
- if (!drv_test.dev)
- return error;
-
- /* 0-out_l 1-out_h 2-in and get */
- if(temp == 0) {
- gpio_direction_output(drv_test.gpio, 0);
- pr_info("gpio out low");
- }
- else if(temp == 1) {
- gpio_direction_output(drv_test.gpio, 1);
- pr_info("gpio out high");
- }
- else if(temp == 2) {
- gpio_direction_input(drv_test.gpio);
- pr_info("gpio get value(%d) !\n",__gpio_get_value(drv_test.gpio));
- }
-
- return error ? error : n;
-}
-
-zte_attr(gpio);
-#endif
-
-/*=============================================================================
- *======== /sys/zte/test/pinctrl ============================================
- *=============================================================================
- */
-/* echo 1/0 > /sys/zte/test/pinctrl */
-#if ZX_PINCTRL_TEST
-static ssize_t pinctrl_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
- int i;
-
- for (i=0; i<16; i++)
- printk("gpio_%d mapped irq to %d \n", i, gpio_to_irq(i));
-
- return (s - buf);
-}
-
-static ssize_t pinctrl_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- u32 temp;
-
- sscanf(buf, "%u", &temp);
-
- /* temp --> pin state */
- if(temp == 1)
- {
- if ( pinctrl_select_state(drv_test.pctrl, drv_test.state1) < 0) {
- dev_err(drv_test.dev, "setting state1 failed\n");
- }
-
- pr_info("setting state1 !\n");
- }
- else if(temp == 0)
- {
- if ( pinctrl_select_state(drv_test.pctrl, drv_test.state0) < 0) {
- dev_err(drv_test.dev, "setting state0 failed\n");
- }
-
- pr_info("setting state0 !\n");
- }
- else if(temp == 2)
- {
- if ( pinctrl_select_state(drv_test.pctrl, drv_test.state2) < 0) {
- dev_err(drv_test.dev, "setting state2 failed\n");
- }
-
- pr_info("setting state2 !\n");
- }
-
- return error ? error : n;
-}
-
-zte_attr(pinctrl);
-#endif
-
-/*=============================================================================
- *======== /sys/zte/test/pd ==============================================
- *=============================================================================
- */
-/* echo 1/0 > /sys/zte/test/pd */
-#if ZX_PM_TEST
-static ssize_t pd_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- return (s - buf);
-}
-
-static ssize_t pd_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
-
-#ifdef CONFIG_PM
- u32 temp;
-
- sscanf(buf, "%u", &temp);
-
- /* 1--on 0--off */
- if(temp == 1)
- {
- pm_runtime_get_sync(drv_test.dev);
-
- pr_info("power on!\n");
- }
- else if(temp == 0)
- {
-#if PM_RUNTIME_AUTO_TEST
- pm_runtime_mark_last_busy(drv_test.dev);
- pm_runtime_put_sync_autosuspend(drv_test.dev);
-#else
- pm_runtime_put_sync(drv_test.dev);
-#endif
- pr_info("power off!\n");
- }
-#else
- error = -ENXIO;
-#endif
- return error ? error : n;
-}
-
-zte_attr(pd);
-#endif
-
-
-/*=============================================================================
- *======== /sys/zte/test/clk ==============================================
- *=============================================================================
- */
-/* echo 1/0 > /sys/zte/test/clk */
-#if ZX_CLK_TEST
-static ssize_t clk_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s %d\n", "clk enable status:", __clk_is_enabled(drv_test.clk));
- s += sprintf(s, "%s %d\n", "clk rate:", clk_get_rate(drv_test.clk));
-
- return (s - buf);
-}
-
-static ssize_t clk_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- u32 temp;
-
- sscanf(buf, "%u", &temp);
-
- /* 1--on 0--off */
- if(temp == 1) {
- clk_enable(drv_test.clk);
- }
- else if(temp == 0) {
- clk_disable(drv_test.clk);
- } else {
- clk_set_rate(drv_test.clk, temp);
- }
-
- return error ? error : n;
-}
-
-zte_attr(clk);
-#endif
-
-/*test group*/
-static struct attribute * g[] =
-{
- &os_timer_attr.attr,
-#if ZX_PM_TEST
- &wake_attr.attr,
-#endif
-#if ZX_SPINLOCK_TEST
- &spinlock_attr.attr,
-#endif
-#if ZX_RESET_TEST
- &reset_attr.attr,
-#endif
-#if ZX_GPIO_TEST
- &gpio_attr.attr,
-#endif
-#if ZX_PINCTRL_TEST
- &pinctrl_attr.attr,
-#endif
-#if ZX_PM_TEST
- &pd_attr.attr,
-#endif
-#if ZX_CLK_TEST
- &clk_attr.attr,
-#endif
- NULL,
-};
-
-static struct attribute_group zte_test_attr_group =
-{
- .attrs = g,
-};
-
-/**
- * 1¡¢create sysfs "/sys/zte/test"
- * 2¡¢call other debug modules
- */
-static int __init zx_test_init(void)
-{
- int ret;
-
- zx_test_kobj = kobject_create_and_add("test", zx_root_kobj);
- if (!zx_test_kobj)
- return -ENOMEM;
-
- ret = sysfs_create_group(zx_test_kobj, &zte_test_attr_group);
- if (ret)
- {
- pr_info("[DEBUG] sysfs_create_group ret %d\n", ret);
- return ret;
- }
-
- timer_setup(&test_timer, test_timer_expired, 0);
-
- pr_info("[DEBUG] create test sysfs interface OK.\n");
-
- return platform_driver_register(&zx_test_driver);
-}
-
-/**
- * 1¡¢create sysfs "/sys/zte"
- * 2¡¢call other debug modules
- */
-int __init zx_dma_test_init(void);
-static int __init zx_debug_init(void)
-{
- pr_info("[DEBUG] create zte sysfs interface OK.\n");
- zx_root_kobj = kobject_create_and_add("zte", NULL);
- if (!zx_root_kobj)
- return -ENOMEM;
-
-
- zx_test_init();
-
- zx_dma_test_init();
-
-/* zx_clk_test_init(); */
-
- zx_icp_test_init();
-
- zx_timer_test_init();
-
- return 0;
-}
-
-late_initcall(zx_debug_init);
-
-void __init zx29_clock_init(void);
-
-struct zx297520v3_chip_info {
- void __iomem *stdcrm_base;
- void __iomem *socsys_base;
- void __iomem *sflock_base;
- void __iomem *apcrm_base;
-};
-
-static struct zx297520v3_chip_info zx_chip_info;
-
-void __iomem *get_stdcrm_base(void)
-{
- return zx_chip_info.stdcrm_base;
-}
-
-void __iomem *get_socsys_base(void)
-{
- return zx_chip_info.socsys_base;
-}
-
-static int spinlock_init(void)
-{
- struct device_node *np;
- void __iomem *param[2];
-
- np = of_find_compatible_node(NULL, NULL, "zte,zx297520v3-standby");
- if (!np)
- {
- BUG();
- return -ENODEV;
- }
-
- zx_chip_info.stdcrm_base = of_iomap(np, 0);
- WARN(!zx_chip_info.stdcrm_base, "unable to map stdcrm_base registers\n");
-
-
- np = of_find_compatible_node(NULL, NULL, "zte,zx29_spinlock");
- if (!np)
- {
- BUG();
- return -ENODEV;
- }
-
- zx_chip_info.sflock_base = of_iomap(np, 0);
- WARN(!zx_chip_info.sflock_base, "unable to map sflock_base registers\n");
-
-
- param[0] = zx_chip_info.stdcrm_base;
- param[1] = zx_chip_info.sflock_base;
- zx_spinlock_init(param);
-
- return 0;
-}
-
-static void socsys_init(void)
-{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "zte,zx297520v3-socsys");
- if (!np)
- {
- BUG();
- }
-
- zx_chip_info.socsys_base = of_iomap(np, 0);
- WARN(!zx_chip_info.socsys_base, "unable to map socsys_base registers\n");
-}
-
-/*---------------------------------------------------------*/
-#define AP_INT_MODE_BASE (zx_chip_info.apcrm_base + 0x70)
-#define AP_PPI_MODE_REG (zx_chip_info.apcrm_base + 0xA0)
-
-#define INT_HIGHLEVEL (0x0) /* 00: high level */
-#define INT_LOWLEVEL (0x1) /* 01: low level */
-#define INT_POSEDGE (0x2) /* 10: raise edge */
-#define INT_NEGEDGE (0x3) /* 11: fall edge */
-
-static int zx29_int_set_type(unsigned int hwirq, unsigned int type)
-{
- unsigned int data_tmp=0;
- unsigned int srctype=0;
- unsigned int reg_index=0,pos_index=0;
-
- switch (type) {
- case IRQ_TYPE_LEVEL_HIGH:
- srctype = INT_HIGHLEVEL;
- break;
- case IRQ_TYPE_EDGE_RISING:
- srctype = INT_POSEDGE;
- break;
- case IRQ_TYPE_LEVEL_LOW:
- srctype = INT_LOWLEVEL;
- break;
- case IRQ_TYPE_EDGE_FALLING:
- srctype = INT_NEGEDGE;
- break;
- default:
- return -EINVAL;
- }
- reg_index=(hwirq)/16;
- pos_index=((hwirq)%16)*2;
-
- data_tmp=zx_read_reg(AP_INT_MODE_BASE+reg_index*4);
- data_tmp &= ~(3<<pos_index);
- data_tmp |= srctype<<pos_index;
- zx_write_reg(AP_INT_MODE_BASE+reg_index*4, data_tmp);
-
- return 0;
-}
-
-static void int_set_type_default(unsigned int line)
-{
- unsigned int int_type=0;
-
- switch ( line )
- {
- case WDT_INT:
- case AP_TIMER0_INT:
- case GSM_RFSSCR_INT:
- case GSM_RFSSCT_INT:
- case AP_TIMER3_INT:
- case AP_TIMER4_INT:
- case SYS_COUNTER_INT:
- {
- int_type = IRQ_TYPE_EDGE_RISING;
- break;
- }
- case MCU_LCD_INT:
- {
- int_type = IRQ_TYPE_LEVEL_LOW;
- break;
- }
-
- default:
- {
- int_type = IRQ_TYPE_LEVEL_HIGH;
- break;
- }
- }
-
- zx29_int_set_type(line, int_type);
-}
-
-static void apcrm_init(void)
-{
- int i;
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "zte,zx297520v3-apcrm");
- if (!np)
- {
- BUG();
- }
-
- zx_chip_info.apcrm_base = of_iomap(np, 0);
- WARN(!zx_chip_info.apcrm_base, "unable to map apcrm_base registers\n");
-
- zx_write_reg(AP_PPI_MODE_REG, 0x55545555);
-
- for (i=0; i<IRQ_ZX297520V3_SPI_NUM; i++)
- int_set_type_default(i);
-
-}
-
-void early_drv_init(void)
-{
- spinlock_init();
-
- socsys_init();
-
- apcrm_init();
-}
-
-//early_initcall(early_drv_init);
-
-
-/*---------------------------------------------------------------*/
-static struct reset_control *reboot_rst;
-static int zx_restart(struct notifier_block *this,
- unsigned long mode, void *cmd)
-{
- if (reboot_rst) {
- reset_control_assert(reboot_rst);
- }
-
- return NOTIFY_DONE;
-}
-
-static struct notifier_block zx_restart_handler = {
- .notifier_call = zx_restart,
- .priority = 129,
-};
-
-static int zx_reboot_probe(struct platform_device *pdev)
-{
- int ret;
- struct device_node *np = pdev->dev.of_node;
-
- reboot_rst = of_reset_control_get_by_index(np, 0);
- if (!reboot_rst) {
- dev_err(&pdev->dev, "No reset handler found!");
- return -EINVAL;
- }
-
- ret = register_restart_handler(&zx_restart_handler);
- if (ret)
- pr_warn("cannot register restart handler, %d\n", ret);
-
- return 0;
-}
-
-static const struct of_device_id zx_reboot_match[] = {
- { .compatible = "zte,reboot", },
- { }
-};
-
-static struct platform_driver zx_reboot_driver = {
- .probe = zx_reboot_probe,
- .driver = {
- .name = "zx_reboot",
- .of_match_table = zx_reboot_match,
- },
-};
-builtin_platform_driver(zx_reboot_driver)
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/Kconfig
deleted file mode 100644
index 053873b..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/Kconfig
+++ /dev/null
@@ -1,32 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# ZTE SoC power drivers
-#
-config ZX_RAM_CONSOLE
- bool "Write log to ram when suspend"
- depends on SUSPEND
- default y
- help
- Write log to ram when system in suspend or sleep state that
- uart may not print log normally!
-
-config ZX_PM_DEBUG
- bool "PM debug"
- depends on SUSPEND
- default y
- help
- Debug interface for power management!
-
-config ZX_PM_DEBUG_TIME
- bool "debug sleep time"
- depends on SUSPEND
- default n
- help
- Use to debug sleep time!
-
-config AXI_FREQ
- bool "change axi clock"
- depends on CPU_FREQ
- default y
- help
- Use to change axi clock!
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/Makefile b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/Makefile
deleted file mode 100644
index de2f17a..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-# When adding new entries keep the list in alphabetical order
-
-ifeq ($(CONFIG_PM),y)
-obj-y += zx-pm.o zx-pm-suspend.o zx-sleep.o zx-pm-context.o \
- zx-cpu-sleep.o zx-pm-helpers.o zx-pm-custom.o
-obj-$(CONFIG_ARCH_ZX297520V3) += zx-pm-a53.o
-obj-$(CONFIG_ARCH_ZX297520V3) += zx-pm-v8.o
-obj-y += zx29-pm.o
-
-else
-obj-y += zx-pm-null.o
-endif
-
-ifeq ($(CONFIG_CPU_IDLE),y)
-obj-y += zx29-cpuidle.o
-obj-y += zx-cpuidle.o
-endif
-
-ifeq ($(CONFIG_CPU_FREQ),y)
-obj-y += zx29-cpufreq.o
-#obj-y += zx-cpufreq.o
-endif
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpu-sleep.S b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpu-sleep.S
deleted file mode 100644
index ee52f37..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpu-sleep.S
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * ZTE CPU low power powerdown and powerup code.
- *
- * Copyright (C) 2013 ZTE, Inc.
- * Written by ZXP
- *
- */
-#include <linux/linkage.h>
-#include <linux/threads.h>
-#include <asm/asm-offsets.h>
-#include <asm/assembler.h>
-#include <asm/glue-cache.h>
-#include <asm/glue-proc.h>
-
-#include <asm/memory.h>
-
-.arm
-/* =======================================================================
- * The wakeup code will jump to this code in ddr-mem.
- * This code will build C environment for resume code.
- *
- * =======================================================================*/
-ENTRY(cpu_reset_handler)
- blx reset_init
- blx invalidate_icache_v7 /* Clear I cache */
-
- blx enable_icache_v7
- blx invalidate_dcache_v7_all /* Clear all data cache levels visible to CPU */
-
- blx cpu_resume
-ENDPROC(cpu_reset_handler)
-
-
-/* =======================================================================
- * Because IRAM may power down, M0 will copy this code to IRAM(address 0)
- * after CPU_AP is waked up.
- *
- * So this code will run in IRAM.
- * =======================================================================*/
-ENTRY(cpu_wake_up)
- nop /* add 16 nops */
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
-
- mov r2, #0x3e8 /*ldr r2, =1000 cpu_reset_handler */
-
-
- ldr r5, [r2]
- bx r5 /* call cpu_reset_handler */
-ENDPROC(cpu_wake_up)
-
-/* =======================================================================
- * When ddr dfs, A9 must run in iram and waiting till this process finished.
- *
- * r0 -- address for dfs finish flag
- * =======================================================================*/
-#define DDR_DFS_FINISH 0x2
-
-ENTRY(waiting_ddr_dfs)
-waiting_ddr_dfs:
- stmfd sp!, {r2, lr}
-
-acquire_again:
- ldr r2, [r0]
- cmp r2, #DDR_DFS_FINISH
- bne acquire_again
-
- ldmfd sp!, {r2, pc}
-ENDPROC(waiting_ddr_dfs)
-
-/* =======================================================================
- *
- * disable ddr port3.
- * addr assigned 0x200
- * =======================================================================*/
-ENTRY(do_sleep_cpu)
-
- isb
- dsb
- wfi
-
- bx lr
-ENDPROC(do_sleep_cpu)
-
-ENTRY(zx_jump_addr)
- //mov pc, r0
- B do_sleep_cpu
-ENDPROC(zx_jump_addr)
-
-wake_up_buf: .space 1024
-
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpufreq.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpufreq.h
deleted file mode 100644
index 7e4068b..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpufreq.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * arch/arm/mach-zx297510/zx-cpufreq.h
- *
- * Copyright (c) 2013, ZTE Corporation.
- * write by zxp
- *
- */
-
-#ifndef __MACH_ZX_CPU_FREQ_H
-#define __MACH_ZX_CPU_FREQ_H
-#ifdef CONFIG_ARCH_ZX297520V2
-#else
-#define SET_AXI_BY_HW
-//#define CONFIG_DDR_FREQ
-//#define SET_DDR_BY_HW
-#endif
-enum cpufreq_level_index {
- L0, L1, L2, L3, L4,
- L5, L6, L7, L8, L9,
- L10, L11, L12, L13, L14,
- L15, L16, L17, L18, L19,
- L20,
-};
-
-struct zx_dvfs_info {
- unsigned int freq_cur_idx;
- unsigned int pll_safe_idx;
- unsigned int max_support_idx;
- unsigned int min_support_idx;
- struct clk *cpu_clk;
- unsigned int *volt_table;
- struct cpufreq_frequency_table *freq_table;
- int (*set_freq)(unsigned int, unsigned int);
-};
-
-#ifdef CONFIG_AXI_FREQ
-#ifdef CONFIG_ARCH_ZX297520V2
-typedef enum
-{
- AXI_FREQ_26M = 0,
- AXI_FREQ_39M = 1,
- AXI_FREQ_52M = 2,
- AXI_FREQ_78M = 3,
- AXI_FREQ_104M = 4,
- AXI_FREQ_122_88M = 5,
- AXI_FREQ_156M = 6,
- AXI_FREQ_NULL,
- MAX_AXI_FREQ
-}zx29_axi_freq;
-
-#else
-typedef enum
-{
- AXI_FREQ_26M = 0,
- AXI_FREQ_156M = 1,
- AXI_FREQ_124_8M = 2,
- AXI_FREQ_104M = 3,
- AXI_FREQ_78M = 4,
- AXI_FREQ_52M = 5,
- AXI_FREQ_39M = 6,
- AXI_FREQ_NULL,
- MAX_AXI_FREQ
-}zx29_axi_freq;
-#endif
-typedef enum
-{
- VOL_VO_800 = 0,
- VOL_VO_825 = 1,
- VOL_VO_850 = 2,
- VOL_VO_875 = 3,
- VOL_VO_900 = 4,
- MAX_VOL
-}zx29_vol;
-
-#endif
-
-#ifdef CONFIG_DDR_FREQ
-#ifdef CONFIG_ARCH_ZX297520V2
-typedef enum
-{
- DDR_FREQ_156M = 0,
- DDR_FREQ_312M = 1,
- MAX_DDR_FREQ
-}zx29_ddr_freq;
-
-#else
-typedef enum
-{
- DDR_FREQ_312M = 0,
- DDR_FREQ_400M = 1,
- DDR_FREQ_208M = 2,
- DDR_FREQ_156M = 3,
- MAX_DDR_FREQ
-}zx29_ddr_freq;
-#endif
-#endif
-
-typedef int (*zx29xx_cpufreq_init_cb)(struct zx_dvfs_info *info);
-extern zx29xx_cpufreq_init_cb zx29xx_cpufreq_init;
-
-extern unsigned int zx_getspeed(unsigned int cpu);
-extern int zx_update_cpu_speed(unsigned long rate);
-extern int zx_cpu_set_speed_cap(unsigned int *speed_cap);
-extern unsigned int zx_count_slow_cpus(unsigned long speed_limit);
-extern unsigned int zx_get_slowest_cpu_n(void);
-extern unsigned long zx_cpu_lowest_speed(void);
-extern unsigned long zx_cpu_highest_speed(void);
-
-#ifdef CONFIG_ZX_PM_DEBUG
-extern void cpufreq_test(unsigned int old_index, unsigned int new_index);
-#endif
-
-#ifdef CONFIG_AXI_FREQ
-extern int request_axi_freq(zx29_axi_freq axi_freq);
-#endif
-
-#endif /* __MACH_ZX_CPU_FREQ_H */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpuidle.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpuidle.c
deleted file mode 100644
index 0af9f8b..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpuidle.c
+++ /dev/null
@@ -1,918 +0,0 @@
-/*
- * zx297510 CPU idle Routines
- *
- * Copyright (C) 2013 ZTE, Ltd.
- * Shine Yu <yu.xiang5@zte.com.cn>
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/sched.h>
-#include <linux/export.h>
-#include <linux/kernel.h>
-#include <linux/cpu.h>
-#include <linux/tick.h>
-#include <linux/suspend.h>
-#include <linux/interrupt.h>
-#include <linux/soc/zte/drv_idle.h>
-#include <linux/module.h>
-#include "zx-pm.h"
-
-#ifdef CONFIG_ZX_PM_DEBUG
-//struct zx_idle_stats idle_stats;
-#endif
-#if 0
-struct cpuidle_driver zx_idle_driver = {
- .name = "zx_idle",
- .owner = THIS_MODULE,
- .en_core_tk_irqen = 0, /* no use cpuidle time keeping */
-};
-#endif
-
-static unsigned int deep_idle_disabled_by_startup = 0;
-static unsigned int deep_idle_disabled_by_suspend = 0;
-static unsigned int deep_idle_disabled_by_debug = 0;
-static unsigned int print_enabled_by_debug = 0;
-DEFINE_PER_CPU(struct cpuidle_device, zx_idle_dev);
-
-static struct delayed_work pm_idle_work;
-#define PM_IDLE_DELAY msecs_to_jiffies(30000)
-
-static unsigned int sleep_mode_flag = 0;
-static unsigned int drv_cpuidle_flag = 0;
-static DEFINE_SPINLOCK(zx_idle_lock);
-
-void zx_cpuidle_set_busy(drv_idle_flag devId)
-{
- unsigned long flags;
-
- if( devId >= IDLE_FLAG_MAX)
- {
- printk("[zx_cpuidle_set_busy] devId err, devId = %d\n",devId);
- }
- else
- {
- raw_spin_lock_irqsave(&zx_idle_lock, flags);
- drv_cpuidle_flag |= (1<<devId);
- raw_spin_unlock_irqrestore(&zx_idle_lock, flags);
- }
-
-}
-EXPORT_SYMBOL(zx_cpuidle_set_busy);
-
-void zx_cpuidle_set_free(drv_idle_flag devId)
-{
- unsigned long flags;
-
- if( devId >= IDLE_FLAG_MAX)
- {
- printk("[zx_cpuidle_set_free] devId err, devId = %d\n",devId);
- }
- else
- {
- raw_spin_lock_irqsave(&zx_idle_lock, flags);
- drv_cpuidle_flag &= ~(1<<devId);
- raw_spin_unlock_irqrestore(&zx_idle_lock, flags);
- }
-}
-EXPORT_SYMBOL(zx_cpuidle_set_free);
-
-static void pm_idle_func(struct work_struct *work)
-{
- deep_idle_disabled_by_startup = 1;
-}
-
-/**
- * idle_can_enter_deep_sleep - check can enter deep sleep state?
- *
- *
- */
-static int idle_can_enter_deep_sleep(void)
-{
- /* can not enter deep sleep now */
- if (deep_idle_disabled_by_suspend)
- return false;
-
- /* This mode only can be entered when other core's are offline */
- if(deep_idle_disabled_by_debug || num_online_cpus() > 1)
- return false;
-
- /* can not enter deep sleep when kernel startup, we delay 30s now! */
- if(!deep_idle_disabled_by_startup)
- return false;
-
- if(pm_dma_used())
- return false;
-
- if(pm_get_mask_info()&PM_IDLE_WFI)
- return false;
-
- if(drv_cpuidle_flag != 0)
- return false;
-
-
- return true;
-}
-
-
-static int zx_pm_idle_prepare(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- int new_index = index;
-
- if(new_index == drv->safe_state_index)
- return new_index;
-
- if(!idle_can_enter_deep_sleep())
- {
- new_index = drv->safe_state_index;
- return new_index;
- }
-
- return new_index;
-}
-/****************************************************/
-#define MAX_TIME_PER_CYCLE div64_u64(div64_u64((u64)0x7fffffff*USEC_PER_SEC, (u64)PERSISTENT_TIMER_CLOCK_RATE),(u64)1000)
-
-#define SAVE_RESTORE_TIME (9) //ms
-#define SHUTDOWN_SLEEP_TIME (2) //ms
-#define MAX_PM_CB_CNT (20)
-
-enum {
- DEBUG_IDLE_MSG = 1U << 0,
- DEBUG_WAKE_LOCK = 1U << 1,
-};
-
-typedef int (*pm_callback_fn)(void);
-typedef struct
-{
- pm_callback_fn cb;
- unsigned int is_sucess;
-}pm_cb_t;
-
-static int idle_debug_mask = 0; //DEBUG_IDLE_MSG;
-
-/* /sys/module/zx297520_cpuidle/parameters/debug_mask */
-module_param(idle_debug_mask, int, 0644);
-
-static u32 sleep_count = 0;
-static pm_cb_t pm_enter_cb[MAX_PM_CB_CNT];
-static pm_cb_t pm_exit_cb[MAX_PM_CB_CNT];
-static unsigned int pm_cb_cnt = 0;
-
-extern void pm_idle_sram_start(void);
-extern void pm_idle_sram_end(void);
-extern void (*arm_pm_idle)(void);
-extern void idle_set_sleeptime(s64 sleep_time);
-extern void pm_debug_wakelocks(void);
-extern void zDrvInt_MaskIrq( u32 uiLine );
-extern void zDrvInt_UnmaskIrq( u32 uiLine );
-
-extern bool zPs_IsTdMasterMode(void);
-extern bool zPs_IsLteMasterMode(void);
-extern bool zPs_IsFddMasterMode(void);
-
-int zx_idle_get_debug_flag(void)
-{
- return idle_debug_mask;
-}
-
-int zx_idle_get_idle_flag(void)
-{
- return drv_cpuidle_flag;
-}
-/**
- * zx_pm_register_callback
- *
- * register callback for sleep enter and exit,
- * enter_cb: callback for sleep enter, callback for sleep exit
- *
- *
- */
-int zx_pm_register_callback(pm_callback_fn enter_cb, pm_callback_fn exit_cb)
-{
- int i = 0;
- if(pm_cb_cnt >= MAX_PM_CB_CNT)
- return -ENOMEM;
-
- if(!enter_cb)
- return -EINVAL;
-
- if(!exit_cb)
- return -EINVAL;
-
- for(i = 0; i < pm_cb_cnt; i++){
- if(pm_enter_cb[i].cb == enter_cb ||
- pm_exit_cb[i].cb == exit_cb)
- return EINVAL;
- }
- pm_enter_cb[pm_cb_cnt].cb = enter_cb;
- pm_enter_cb[pm_cb_cnt].is_sucess=0;
- pm_exit_cb[pm_cb_cnt].cb = exit_cb;
- pm_exit_cb[pm_cb_cnt].is_sucess=0;
-
- pm_cb_cnt ++;
-
- return 0;
-}
-EXPORT_SYMBOL(zx_pm_register_callback);
-
-/**
- * zx_cpu_dev_idle_enter
- *
- *
- *
- *
- *
- */
-int zx_cpu_dev_idle_enter(void)
-{
- int i;
- int ret=0;
-
- for(i=0;i<pm_cb_cnt; i++){
- pm_enter_cb[i].is_sucess = 0;
- }
-
- for(i=0;i<pm_cb_cnt; i++){
-
- if(pm_enter_cb[i].cb)
- ret = pm_enter_cb[i].cb();
-
- if(ret)
- return ret;
-
- pm_enter_cb[i].is_sucess = 1;
-
- }
-
- return ret;
-}
-
-/**
- * zx_cpu_dev_idle_exit
- *
- * only when dev is is_sucess when enter sleep,the exit callback is visited
- *
- *
- *
- */
-int zx_cpu_dev_idle_exit(void)
-{
- int i;
- int ret=0;
-
- for(i=0;i<pm_cb_cnt; i++){
- if(pm_exit_cb[i].cb && pm_enter_cb[i].is_sucess )
- ret = pm_exit_cb[i].cb();
-
- if(ret)
- return ret;
- }
-
- return ret;
-}
-/**
- * zx_debug_check
- *
- * check whether debug allowed sleep.
- *
- * when pm_get_mask_info()&PM_IDLE_WFI is 1, return "false",
- * else return "ture"
- */
-static bool zx_debug_check(void)
-{
- if(pm_get_mask_info()&PM_IDLE_WFI)
- return false;
- else
- return true;
-}
-/**
- * zx_sleep_wakelock_check
- *
- * check whether linux allowed sleep.
- *
- * when active wakelock count is 0, return "true",
- * else return "false"
- */
-static bool zx_sleep_wakelock_check(void)
-{
- unsigned int temp_count;
-
-/*
- if (idle_debug_mask & DEBUG_WAKE_LOCK)
- pm_debug_wakelocks();
-*/
- if(pm_get_wakeup_count(&temp_count, false))
- {
- if (pm_save_wakeup_count(temp_count))
- {
- return true;
- }
- else
- {
- pr_info("[SLP]: error save wakeup_count: %d ", temp_count);
- }
- }
-
- return false;
-}
-
-/**
- * zx_sleep_idle_check
- *
- * check whether linux allowed idlesleep.
- *
- * when idle flag is 0, return "true",
- * else return "false"
- */
-static bool zx_sleep_idle_check(void)
-{
- if(pm_dma_used())
- return false;
-
- if(drv_cpuidle_flag != 0)
- return false;
-
- return true;
-
-}
-
-/**
- * zx_cpu_kernel_sleep
- *
- *
- *
- */
-void zx_cpu_kernel_sleep(void)
-{
- cpu_do_idle();
-}
-
-/**
- * zx_sleep_set_timer
- *
- * input: expect_time_ms ---the expect_time can sleep, unit:ms
- *
- * return: elapsed time when enter idle
- */
-volatile u32 tick_cur_cnt =0;
-
-u64 zx_sleep_set_timer(u32 expect_time_ms)
-{
- u64 tmptime = 0;
-
- idle_set_sleeptime((s64)expect_time_ms*(s64)1000);
- pm_stop_tick();
- tick_cur_cnt=pm_read_tick();
- tmptime =div64_u64(read_persistent_us(),(u64)1000);// read_persistent_us()/1000; //ms
- return tmptime;
-}
-
-/**
- * zx_sleep_read_timer
- *
- * return: elapsed time when exit idle
- *
- *
- */
-u64 zx_sleep_read_timer(void)
-{
- u64 tmptime = 0;
- zx29_stop_wake_timer();
-
- tmptime =div64_u64(read_persistent_us(),(u64)1000);// read_persistent_us()/1000; //ms
- pm_restart_tick(tick_cur_cnt);
-
- return tmptime;
-}
-
-/**
- * zx_sleep_mask_int
- *
- * mask int needed
- *
- *
- */
-void zx_sleep_mask_int(void)
-{
- /*********************************************************/
- // zDrvInt_MaskIrq(TD_FRM_INT);
- // zDrvInt_MaskIrq(LTE_LPM5_INT);
- // zDrvInt_MaskIrq(WD_FRM_INT);
- // CPPS_FUNC(cpps_callbacks, zDrvInt_MaskIrq)(PS_TIMER0_INT);
- pm_save_gic_wake_enable();
-}
-
-/**
- * zx_sleep_unmaskInt
- *
- * unmask int needed
- *
- *
- */
-static void zx_sleep_unmaskInt(void)
-{
-
- // zDrvInt_UnmaskIrq(TD_FRM_INT);
-// zDrvInt_UnmaskIrq(LTE_LPM5_INT);
-// zDrvInt_UnmaskIrq(WD_FRM_INT);
- //CPPS_FUNC(cpps_callbacks, zDrvInt_UnmaskIrq)(PS_TIMER0_INT);
- pm_restore_gic_wake_enable();
-}
-
-
-/**
- * zx_cpu_idle
- * the deep sleep function, enter and exit WFI, dormant or shutdown sleep
- *
- *
- *
- */
-extern unsigned int zx_getspeed(unsigned int cpu);
-extern void clock_event_handler(void);
-extern void pm_uart_mod_timer(void);
-extern void pm_uart_del_timer(void);
-
-
-#define CAPCORE_SLEEP_TIME (18*60*60*1000) //ms
-
-void zx_cpu_idle(void)
-{
- u32 expect_time = 0;
- u64 elapsed_time_enter = 0;
- u64 elapsed_time_exit = 0;
- u64 idle_time = 0;
-
- #ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xff01);
- #endif
-
- if(!zx_sleep_wakelock_check())
- goto IRQ_LOCK_EXIT;
-
- if(!zx_debug_check())
- goto IRQ_LOCK_EXIT;
-
- expect_time =CAPCORE_SLEEP_TIME;
-
- elapsed_time_enter=zx_sleep_set_timer(expect_time );
-
- if(expect_time <= SHUTDOWN_SLEEP_TIME)
- goto IRQ_LOCK_EXIT;
-
- sleep_count++;
-
- zx_sleep_mask_int();
-
- #ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xff03);
- #endif
-
- if(expect_time >= SAVE_RESTORE_TIME)
- zx_enter_sleep(CPU_SLEEP_TYPE_LP1);
- else
- zx_enter_sleep(CPU_SLEEP_TYPE_LP3);
-
- #ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xfffe);
- #endif
-
- zx_sleep_unmaskInt();
-
- elapsed_time_exit = zx_sleep_read_timer();
- if(elapsed_time_exit>=elapsed_time_enter)
- idle_time=elapsed_time_exit - elapsed_time_enter;
- else
- idle_time=(elapsed_time_exit - elapsed_time_enter)+MAX_TIME_PER_CYCLE;
-
- clock_event_handler();
-
- pm_ram_log(" @@sleep exit:sleep_count=%d,real_idle_time=%lld,jiffies:%u\n",sleep_count, idle_time, jiffies);
-
-IRQ_LOCK_EXIT:
- #ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xffff);
- #endif
- zx_cpu_kernel_sleep();
-
-}
-
-/****************************************************/
-
-/**
- * zx_enter_idle
- * @dev: cpuidle device
- * @state: The target state to be programmed
- *
- * Idle function for C1 state, WFI on a single CPU.
- * Called with irqs off, returns with irqs on.
- * Returns the amount of time spent in the low power state.
- */
-int zx_enter_idle(struct cpuidle_device *dev,
- struct cpuidle_driver *drv,
- int index)
-{
- ktime_t entry_time, exit_time;
- s64 idle_time;
- int new_index = index;
-
- local_irq_disable();
-
-#ifdef CONFIG_ARCH_ZX297520V2
-#else
- local_fiq_disable();
-#endif
- entry_time = ktime_get();
-
-/*=================================================================
- *=======begin enter idle sleep====================================
- *=================================================================
- */
- new_index = zx_pm_idle_prepare(dev, drv, index);
-
- index = zx_pm_idle_enter(new_index);
-
-/*=================================================================
- *=======end enter idle sleep======================================
- *=================================================================
- */
- exit_time = ktime_get();
-#ifdef CONFIG_ARCH_ZX297520V2
-#else
- local_fiq_enable();
-#endif
- local_irq_enable();
-
- idle_time = ktime_to_ns(ktime_sub(exit_time, entry_time));
-
- dev->last_residency_ns = (int)idle_time;
-
- if(print_enabled_by_debug != 0)
- {
- printk(KERN_INFO "[CPUIDLE] exit idle: idle time= %d , enter level= %d !\n", (u32)idle_time, index);
- }
-
- return index;
-}
-
-
-
-static int idle_pm_notify(struct notifier_block *nb,
- unsigned long event, void *dummy)
-{
-#ifdef CONFIG_PM_SLEEP
- if (event == PM_SUSPEND_PREPARE)
- deep_idle_disabled_by_suspend = true;
- else if (event == PM_POST_SUSPEND)
- deep_idle_disabled_by_suspend = false;
-#endif
-
- return NOTIFY_OK;
-}
-
-static struct notifier_block idle_pm_notifier =
-{
- .notifier_call = idle_pm_notify,
-};
-
-/**
- * zx_cpuidle_init - Init routine for zx29xx idle
- *
- * Registers the cpuidle driver with the cpuidle
- * framework with the valid set of states.
- */
-int zx_cpuidle_init(void)
-{
-
-#if 1
- arm_pm_idle = zx_cpu_idle;
- zx_apmgclken_set(0);
- printk(KERN_INFO "[CPUIDLE] zx_cpu_idle init OK\n,");
-#else
- int cpu_id;
- struct cpuidle_device *device;
- struct cpuidle_driver *drv = &zx_idle_driver;
-
- /* Setup cpuidle driver */
- drv->state_count = zx_fill_cpuidle_data(drv);
- cpuidle_register_driver(drv);
-
- /* Setup cpuidle device for each cpu */
- for_each_cpu(cpu_id, cpu_online_mask)
- {
- device = &per_cpu(zx_idle_dev, cpu_id);
- device->cpu = cpu_id;
-
- if (cpu_id == 0)
- device->state_count = drv->state_count;
- else
- device->state_count = 1; /* None boot cpu Support IDLE only now ! */
-
- if (cpuidle_register_device(device))
- {
- printk(KERN_ERR "[CPUIDLE] register device failed\n,");
- return -EIO;
- }
- }
-
- register_pm_notifier(&idle_pm_notifier);
-
- INIT_DELAYED_WORK_DEFERRABLE(&pm_idle_work, pm_idle_func);
- schedule_delayed_work(&pm_idle_work, PM_IDLE_DELAY);
-
- printk(KERN_INFO "[CPUIDLE] register device OK\n,");
-#endif
-
- return 0;
-}
-
-#if 0
-static void __exit zx_cpuidle_exit(void)
-{
- unregister_pm_notifier(&idle_pm_notifier);
- cpuidle_unregister_driver(&zx_idle_driver);
-}
-
-late_initcall(zx_cpuidle_init);
-module_exit(zx_cpuidle_exit);
-#endif
-
-#ifdef CONFIG_ZX_PM_DEBUG
-static char* lp2_debug_show(char *s)
-{
- #if 0
- int i;
-
- s += sprintf(s, "%-30s%8s %8s %8s %8s\n", " ", "cpu0","cpu1","cpu2","cpu3");
- s += sprintf(s, "%s\n", "---------------------------------------------------------------");
- s += sprintf(s, "%-30s%8u %8u %8u %8u\n", "lp3 in count:",
- idle_stats.lp3_count[0],
- idle_stats.lp3_count[1],
- idle_stats.lp3_count[2],
- idle_stats.lp3_count[3]);
-
- s += sprintf(s, "%-30s%8u %8u %8u %8u\n", "lp2 in count:",
- idle_stats.lp2_count[0],
- idle_stats.lp2_count[1],
- idle_stats.lp2_count[2],
- idle_stats.lp2_count[3]);
-
- s += sprintf(s, "%-30s%8u %8u %8u %8u\n", "lp2 completed:",
- idle_stats.lp2_completed_count[0],
- idle_stats.lp2_completed_count[1],
- idle_stats.lp2_completed_count[2],
- idle_stats.lp2_completed_count[3]);
-
- s += sprintf(s, "%-30s%7u%% %7u%% %7u%% %7u%%\n", "lp2 completed%:",
- idle_stats.lp2_completed_count [0]* 100 / (idle_stats.lp2_count[0] ?: 1),
- idle_stats.lp2_completed_count [1]* 100 / (idle_stats.lp2_count[1] ?: 1),
- idle_stats.lp2_completed_count [2]* 100 / (idle_stats.lp2_count[2] ?: 1),
- idle_stats.lp2_completed_count [3]* 100 / (idle_stats.lp2_count[3] ?: 1));
- s += sprintf(s, "%-30s%8u\n", "all idle count:", idle_stats.idle_count);
-
- s += sprintf(s, "\n%-30s%8llu %8llu %8llu %8llu ms\n", "cpu ready time:",
- div64_u64(idle_stats.cpu_wants_lp2_time[0], 1000),
- div64_u64(idle_stats.cpu_wants_lp2_time[1], 1000),
- div64_u64(idle_stats.cpu_wants_lp2_time[2], 1000),
- div64_u64(idle_stats.cpu_wants_lp2_time[3], 1000));
-
- s += sprintf(s, "%-30s%8llu %8llu %8llu %8llu ms\n", "lp2 in time:",
- div64_u64(idle_stats.in_lp2_time[0], 1000),
- div64_u64(idle_stats.in_lp2_time[1], 1000),
- div64_u64(idle_stats.in_lp2_time[2], 1000),
- div64_u64(idle_stats.in_lp2_time[3], 1000));
-
- s += sprintf(s, "%-30s%7d%% %7d%% %7d%% %7d%%\n", "lp2 in time%:",
- (int)(idle_stats.cpu_wants_lp2_time[0] ?
- div64_u64(idle_stats.in_lp2_time[0] * 100,
- idle_stats.cpu_wants_lp2_time[0]) : 0),
- (int)(idle_stats.cpu_wants_lp2_time[1] ?
- div64_u64(idle_stats.in_lp2_time[1] * 100,
- idle_stats.cpu_wants_lp2_time[1]) : 0),
- (int)(idle_stats.cpu_wants_lp2_time[2] ?
- div64_u64(idle_stats.in_lp2_time[2] * 100,
- idle_stats.cpu_wants_lp2_time[2]) : 0),
- (int)(idle_stats.cpu_wants_lp2_time[3] ?
- div64_u64(idle_stats.in_lp2_time[3] * 100,
- idle_stats.cpu_wants_lp2_time[3]) : 0));
-
- s += sprintf(s, "\n\n%3s %20s %6s %10s\n",
- "int", "name", "count", "last count");
- s += sprintf(s, "%s", "--------------------------------------------\n");
- for (i = 0; i < NR_IRQS; i++) {
- if (idle_stats.lp2_int_count[i] == 0)
- continue;
- s += sprintf(s, "%3d %20s %6d %10d\n",
- i - GIC_SPI_START,
- irq_to_desc(i)->action ? irq_to_desc(i)->action->name ?: "???" : "???",
- idle_stats.lp2_int_count[i],
- idle_stats.lp2_int_count[i] - idle_stats.last_lp2_int_count[i]);
-
- idle_stats.last_lp2_int_count[i] = idle_stats.lp2_int_count[i];
- };
- #endif
-
- return s;
-}
-
-/******************************************************
- *** 1 -- lp2 ******************************
- ******************************************************
- */
-static ssize_t lp2_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s = lp2_debug_show(s);
-
-
- return (s - buf);
-}
-
-static ssize_t lp2_store(struct kobject *kobj, struct kobj_attribute *attr,
-
- const char *buf, size_t n)
-{
-
- int error = 0;
-
-
- return error ;
-}
-
-zte_pm_attr(lp2);
-
-
-/*=============================================================================
- *======== /sys/zte_pm/cpuidle/disable_lp2 ==================================
- *=============================================================================
- */
-static ssize_t disable_lp2_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s %d\n", "[CPUIDLE] deep_idle_disabled_by_debug:", deep_idle_disabled_by_debug);
-
- return (s - buf);
-}
-
-/* usage: "echo 1 > disable_lp2" */
-static ssize_t disable_lp2_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- unsigned int temp;
-
- if(sscanf(buf, "%u", &temp) != 1)
- error = -EINVAL;
-
- deep_idle_disabled_by_debug = temp;
-
- return error ? error : n;
-}
-zte_pm_attr(disable_lp2);
-
-
-/*=============================================================================
- *======== /sys/zte_pm/cpuidle/enable_print ==================================
- *=============================================================================
- */
-static ssize_t enable_print_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s %d\n", "[CPUIDLE] print_enabled_by_debug:", print_enabled_by_debug);
-
- return (s - buf);
-}
-
-/* usage: "echo 1 > enable_print" */
-static ssize_t enable_print_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- unsigned int temp;
-
- if(sscanf(buf, "%u", &temp) != 1)
- error = -EINVAL;
-
- print_enabled_by_debug = temp;
-
- return error ? error : n;
-}
-
-zte_pm_attr(enable_print);
-
-
-/*=============================================================================
- *======== /sys/zte_pm/cpuidle/drv_cpuidle_flag ==================================
- *=============================================================================
- */
-static ssize_t drv_cpuidle_flag_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s %x %x\n", "[CPUIDLE] drv_cpuidle_flag, pm_dma_used(): ", drv_cpuidle_flag, pm_dma_used());
-
- return (s - buf);
-}
-
-/* usage: "echo * > drv_cpuidle_flag" */
-static ssize_t drv_cpuidle_flag_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- unsigned int temp;
-
- if(sscanf(buf, "%u", &temp) != 1)
- error = -EINVAL;
-
- drv_cpuidle_flag = temp;
-
- return error ? error : n;
-}
-
-zte_pm_attr(drv_cpuidle_flag);
-
-
-/*=============================================================================
- *======== /sys/zte_pm/cpuidle/idle_debug_mask ==================================
- *=============================================================================
- */
-static ssize_t enable_idle_debug_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s %d\n", "[CPUIDLE] idle_print_enabled_by_debug:", idle_debug_mask);
-
- return (s - buf);
-}
-
-/* usage: "echo 1 > idle_debug_mask" */
-static ssize_t enable_idle_debug_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- unsigned int temp;
-
- if(sscanf(buf, "%u", &temp) != 1)
- error = -EINVAL;
-
- idle_debug_mask = temp;
-
- return error ? error : n;
-}
-zte_pm_attr(enable_idle_debug);
-
-
-static struct attribute * g[] =
-{
- &lp2_attr.attr,
- &disable_lp2_attr.attr,
- &enable_print_attr.attr,
- &drv_cpuidle_flag_attr.attr,
- &enable_idle_debug_attr.attr,
- NULL,
-};
-
-
-static struct attribute_group idle_attr_group =
-{
- .attrs = g,
-};
-/**
- * idle_debug_init
- * create cpuidle sysfs, we can use cat /sys/zte_pm/cpuidle/lp2 command view debug info
- *
- */
-static struct kobject *idle_kobj;
-
-int __init idle_debug_init(void)
-{
- int ret;
-
- idle_kobj = kobject_create_and_add("cpuidle", pm_debug_kobj);
- if (!idle_kobj)
- return -ENOMEM;
-
- ret = sysfs_create_group(idle_kobj, &idle_attr_group);
- if (ret)
- {
- pr_info("[CPUIDLE] sysfs_create_group ret %d\n", ret);
- return ret;
- }
-
- return 0;
-}
-
-#endif
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpuidle.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpuidle.h
deleted file mode 100644
index 10abd7d..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-cpuidle.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * arch/arm/mach-zx297510/zx-cpuidle.h
- *
- * Copyright (c) 2013, ZTE Corporation.
- * write by zxp
- *
- */
-
-#ifndef __MACH_ZX_CPU_IDLE_H
-#define __MACH_ZX_CPU_IDLE_H
-
-#ifdef CONFIG_ZX_PM_DEBUG
-#define DEBUG_CPU_NUM 4
-/*record idle states info*/
-struct zx_idle_stats
-{
- unsigned int cpu_ready_count[DEBUG_CPU_NUM];
- unsigned int tear_down_count[DEBUG_CPU_NUM];
- unsigned long long cpu_wants_lp2_time[DEBUG_CPU_NUM];
- unsigned long long in_lp2_time[DEBUG_CPU_NUM];
- unsigned int lp2_count[DEBUG_CPU_NUM];
- unsigned int lp2_completed_count[DEBUG_CPU_NUM];
- unsigned int lp3_count[DEBUG_CPU_NUM];
- //unsigned int lp2_count_bin[32];
- //unsigned int lp2_completed_count_bin[32];
- unsigned int lp2_int_count[NR_IRQS];
- unsigned int last_lp2_int_count[NR_IRQS];
- unsigned int idle_count;
-};
-#endif
-
-#define ZX_IDLE_CSTATE_LP3 0
-#define ZX_IDLE_CSTATE_LP2 1
-#define ZX_IDLE_MAX_CSTATE 2
-
-/*
- *cpuidle functions
- */
-extern int __init zx_cpuidle_init(void);
-extern s64 idle_get_sleeptime(void);
-#ifdef CONFIG_ZX_PM_DEBUG
-extern int __init idle_debug_init(void);
-#endif
-extern int __init zx_fill_cpuidle_data(struct cpuidle_driver *drv);
-extern int zx_enter_idle(struct cpuidle_device *dev,
- struct cpuidle_driver *drv,
- int index);
-extern int zx_pm_idle_enter(int index);
-
-#if defined CONFIG_SYSTEM_RECOVERY || defined _USE_TestHarness
-static int zx_idle_get_debug_flag(void){return 0;}
-static int zx_idle_get_idle_flag(void){return 0;}
-#endif
-
-#endif /* __MACH_ZX_CPU_IDLE_H */
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-a53.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-a53.c
deleted file mode 100644
index 5ebaf74..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-a53.c
+++ /dev/null
@@ -1,1348 +0,0 @@
-/*
- * ZTE cpu context save&restore driver
- *
- * Copyright (C) 2013 ZTE Ltd.
- * by zxp
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/suspend.h>
-
-#include "zx-pm.h"
-
-/*=======================================================================
- *=======================================================================
- *======= [ZX-PM] timer interface for power management ===========================
- *=======================================================================
- *=======================================================================*/
-
-typedef struct
-{
- /* 0x00 */ volatile unsigned timer_load;
- /* 0x04 */ volatile unsigned timer_counter;
- /* 0x08 */ volatile unsigned timer_control;
- /* 0x0c */ volatile unsigned timer_interrupt_status;
- char padding1[0x10];
- /* 0x20 */ volatile unsigned watchdog_load;
- /* 0x24 */ volatile unsigned watchdog_counter;
- /* 0x28 */ volatile unsigned watchdog_control;
- /* 0x2c */ volatile unsigned watchdog_interrupt_status;
- /* 0x30 */ volatile unsigned watchdog_reset_status;
- /* 0x34 */ volatile unsigned watchdog_disable;
-} a9_timer_registers;
-
-typedef struct
-{
- unsigned timer_load;
- unsigned timer_counter;
- unsigned timer_control;
- unsigned timer_interrupt_status;
- unsigned watchdog_load;
- unsigned watchdog_counter;
- unsigned watchdog_control;
- unsigned watchdog_interrupt_status;
-} a9_timer_context;
-
-
-void save_a9_timers(u32 *pointer, unsigned twd_address)
-{
- a9_timer_context *context = (a9_timer_context *)pointer;
- a9_timer_registers *timers = (a9_timer_registers *)twd_address;
-
- /*
- * First, stop the timers
- */
- context->timer_control = timers->timer_control;
- timers->timer_control = 0;
- context->watchdog_control = timers->watchdog_control;
- timers->watchdog_control = 0;
-
- context->timer_load = timers->timer_load;
- context->timer_counter = timers->timer_counter;
- context->timer_interrupt_status = timers->timer_interrupt_status;
- context->watchdog_load = timers->watchdog_load;
- context->watchdog_counter = timers->watchdog_counter;
- context->watchdog_interrupt_status = timers->watchdog_interrupt_status;
- /*
- * We ignore watchdog_reset_status, since it can only clear the status bit.
- * If the watchdog has reset the system, the OS will want to know about it.
- * Similarly, we have no use for watchdog_disable - this is only used for
- * returning to timer mode, which is the default mode after reset.
- */
-}
-
-void restore_a9_timers(u32 *pointer, unsigned twd_address)
-{
- a9_timer_context *context = (a9_timer_context *)pointer;
- a9_timer_registers *timers = (a9_timer_registers *)twd_address;
-
- timers->timer_control = 0;
- timers->watchdog_control = 0;
-
- /*
- * We restore the load register first, because it also sets the counter register.
- */
- timers->timer_load = context->timer_load;
- timers->watchdog_load = context->watchdog_load;
-
- /*
- * If a timer has reached zero (presumably during the context save) and triggered
- * an interrupt, then we set it to the shortest possible expiry time, to make it
- * trigger again real soon.
- * We could fake this up properly, but we would have to wait around until the timer
- * ticked, which could be some time if PERIPHCLK is slow. This approach should be
- * good enough in most cases.
- */
- if (context->timer_interrupt_status)
- {
- timers->timer_counter = 1;
- }
- else
- {
- timers->timer_counter = context->timer_counter;
- }
-
- if (context->watchdog_interrupt_status)
- {
- timers->watchdog_counter = 1;
- }
- else
- {
- timers->watchdog_counter = context->watchdog_counter;
- }
-
- timers->timer_control = context->timer_control;
- timers->watchdog_control = context->watchdog_control;
-}
-
-
-typedef struct
-{
- /* 0x00 */ volatile unsigned timer_version;
- /* 0x04 */ volatile unsigned timer_config;
- /* 0x08 */ volatile unsigned timer_load;
- /* 0x0c */ volatile unsigned timer_start;
- /* 0x10 */ volatile unsigned timer_set_en;
- /* 0x14 */ volatile unsigned timer_ack;
- /* 0x18 */ volatile unsigned timer_count;
-} a53_global_timer_registers;
-
-typedef struct
-{
- unsigned timer_version;
- unsigned timer_config;
- unsigned timer_load;
- unsigned timer_start;
- unsigned timer_set_en;
- unsigned timer_ack;
- unsigned timer_count;
-
-} a53_global_timer_context;
-
-#define A53_GT_TIMER_ENABLE (1<<0)
-#define A53_GT_COMPARE_ENABLE (1<<1)
-#define A53_GT_AUTO_INCREMENT_ENABLE (1<<3)
-#define A53_GT_EVENT_FLAG (1<<0)
-
-void save_a53_sys_timer(u32 *pointer, unsigned timer_address)
-{
- a53_global_timer_registers *timer = (void*)timer_address;
- a53_global_timer_context *context = (void*)pointer;
-
- context->timer_config = timer->timer_config;
-
- context->timer_load = timer->timer_load;
- context->timer_start = timer->timer_start;
- timer->timer_start = 0;
- context->timer_set_en = timer->timer_set_en;
- context->timer_ack = timer->timer_ack; /* Ö»¶Á£¬²»Óûָ´*/
- context->timer_count = timer->timer_count;
-
-}
-
-void restore_a53_sys_timer(u32 *pointer, unsigned timer_address)
-{
- a53_global_timer_registers *timer = (void*)timer_address;
- a53_global_timer_context *context = (void*)pointer;
-
- timer->timer_config =context->timer_config;
- timer->timer_load = context->timer_load;/*ÕâÀïÓ¦¸ÃÊǸ³³õÖµ*/
- timer->timer_set_en =context->timer_set_en;
- timer->timer_start = context->timer_start;
-}
-
-
-/*=======================================================================
- *=======================================================================
- *======= [ZX-PM] SCU interface for power management ============================
- *=======================================================================
- *=======================================================================*/
-typedef struct
-{
- /* 0x00 */ volatile unsigned int control;
- /* 0x04 */ const unsigned int configuration;
- /* 0x08 */ union
- {
- volatile unsigned int w;
- volatile unsigned char b[4];
- } power_status;
- /* 0x0c */ volatile unsigned int invalidate_all;
- char padding1[48];
- /* 0x40 */ volatile unsigned int filtering_start;
- /* 0x44 */ volatile unsigned int filtering_end;
- char padding2[8];
- /* 0x50 */ volatile unsigned int access_control;
- /* 0x54 */ volatile unsigned int ns_access_control;
-} a53_scu_registers;
-
-/*
- * TODO: we need to use the power status register, not save it!
- */
-
-void save_a53_scu(u32 *pointer, unsigned scu_address)
-{
- a53_scu_registers *scu = (a53_scu_registers *)scu_address;
-
- pointer[0] = scu->control;
- pointer[1] = scu->power_status.w;
- pointer[2] = scu->filtering_start;
- pointer[3] = scu->filtering_end;
- pointer[4] = scu->access_control;
- pointer[5] = scu->ns_access_control;
-}
-
-void restore_a53_scu(u32 *pointer, unsigned scu_address)
-{
- a53_scu_registers *scu = (a53_scu_registers *)scu_address;
-
- scu->invalidate_all = 0xffff;
- scu->filtering_start = pointer[2];
- scu->filtering_end = pointer[3];
-//zxp scu->access_control = pointer[4];
- scu->ns_access_control = pointer[5];
- scu->power_status.w = pointer[1];
- scu->control = pointer[0];
-}
-
-void set_status_a53_scu(unsigned cpu_index, unsigned status, unsigned scu_address)
-{
- a53_scu_registers *scu = (a53_scu_registers *)scu_address;
- unsigned power_status;
-
- switch(status)
- {
- case CPU_POWER_MODE_STANDBY:
- case CPU_POWER_MODE_DORMANT:
- power_status = 2;
- break;
- case CPU_POWER_MODE_SHUTDOWN:
- power_status = 3;
- break;
- default:
- power_status = 0;
- }
-
- scu->power_status.b[cpu_index] = power_status;
- dsb();
-}
-
-void init_lp_of_scu(unsigned scu_address)
-{
- a53_scu_registers *scu = (a53_scu_registers *)scu_address;
-
- scu->control |= 0x61;
-}
-
-
-int num_cpus_from_a53_scu(unsigned scu_address)
-{
- a53_scu_registers *scu = (a53_scu_registers *)scu_address;
-
- return ((scu->configuration) & 0x3) + 1;
-}
-
-
-/*=======================================================================
- *=======================================================================
- *======= [ZX-PM] PL310 interface for power management ==========================
- *=======================================================================
- *=======================================================================*/
-
-
-#define C_BIT 0x01
-
-struct lockdown_regs
-{
- unsigned int d, i;
-};
-
-typedef struct
-{
- /* 0x000 */ const unsigned cache_id;
- /* 0x004 */ const unsigned cache_type;
- char padding1[0x0F8];
- /* 0x100 */ volatile unsigned control;
- /* 0x104 */ volatile unsigned aux_control;
- /* 0x108 */ volatile unsigned tag_ram_control;
- /* 0x10C */ volatile unsigned data_ram_control;
- char padding2[0x0F0];
- /* 0x200 */ volatile unsigned ev_counter_ctrl;
- /* 0x204 */ volatile unsigned ev_counter1_cfg;
- /* 0x208 */ volatile unsigned ev_counter0_cfg;
- /* 0x20C */ volatile unsigned ev_counter1;
- /* 0x210 */ volatile unsigned ev_counter0;
- /* 0x214 */ volatile unsigned int_mask;
- /* 0x218 */ const volatile unsigned int_mask_status;
- /* 0x21C */ const volatile unsigned int_raw_status;
- /* 0x220 */ volatile unsigned int_clear;
- char padding3[0x50C];
- /* 0x730 */ volatile unsigned cache_sync;
- char padding4[0x03C];
- /* 0x770 */ volatile unsigned inv_pa;
- char padding5[0x008];
- /* 0x77C */ volatile unsigned inv_way;
- char padding6[0x030];
- /* 0x7B0 */ volatile unsigned clean_pa;
- char padding7[0x004];
- /* 0x7B8 */ volatile unsigned clean_index;
- /* 0x7BC */ volatile unsigned clean_way;
- char padding8[0x030];
- /* 0x7F0 */ volatile unsigned clean_inv_pa;
- char padding9[0x004];
- /* 0x7F8 */ volatile unsigned clean_inv_index;
- /* 0x7FC */ volatile unsigned clean_inv_way;
- char paddinga[0x100];
- /* 0x900 */ volatile struct lockdown_regs lockdown[8];
- char paddingb[0x010];
- /* 0x950 */ volatile unsigned lock_line_en;
- /* 0x954 */ volatile unsigned unlock_way;
- char paddingc[0x2A8];
- /* 0xC00 */ volatile unsigned addr_filtering_start;
- /* 0xC04 */ volatile unsigned addr_filtering_end;
- char paddingd[0x338];
- /* 0xF40 */ volatile unsigned debug_ctrl;
- char paddinge[0x01C];
- /* 0xF60 */ volatile unsigned prefetch_ctrl;
- char paddingf[0x01C];
- /* 0xF80 */ volatile unsigned power_ctrl;
-} pl310_registers;
-
-
-typedef struct
-{
- unsigned int aux_control;
- unsigned int tag_ram_control;
- unsigned int data_ram_control;
- unsigned int ev_counter_ctrl;
- unsigned int ev_counter1_cfg;
- unsigned int ev_counter0_cfg;
- unsigned int ev_counter1;
- unsigned int ev_counter0;
- unsigned int int_mask;
- unsigned int lock_line_en;
- struct lockdown_regs lockdown[8];
- unsigned int unlock_way;
- unsigned int addr_filtering_start;
- unsigned int addr_filtering_end;
- unsigned int debug_ctrl;
- unsigned int prefetch_ctrl;
- unsigned int power_ctrl;
-} pl310_context;
-
-/* TODO: should be determined from cache? */
-static unsigned const cache_line_size = 32;
-
-void clean_inv_range_pl310(void *start, unsigned size, unsigned pl310_address)
-{
- unsigned addr;
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
-
- /* Align the start address to the start of a cache line */
- addr = (unsigned)start & ~(cache_line_size - 1);
-
- /* Wait for any background operations to finish */
- while(pl310->clean_inv_pa & C_BIT);
-
- while(addr <= size + (unsigned)start)
- {
- pl310->clean_inv_pa = addr;
- addr += cache_line_size;
- /* For this to work on L220 we would have to poll the C bit now */
- }
- dmb();
-}
-
-void clean_range_pl310(void *start, unsigned size, unsigned pl310_address)
-{
- unsigned addr;
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
-
- /* Align the start address to the start of a cache line */
- addr = (unsigned)start & ~(cache_line_size - 1);
-
- /* Wait for any background operations to finish */
- while(pl310->clean_pa & C_BIT);
-
- while(addr <= size + (unsigned)start)
- {
- pl310->clean_pa = addr;
- addr += cache_line_size;
- /* For this to work on L220 we would have to poll the C bit now */
- }
- dmb();
-}
-
-void inv_range_pl310(void *start, unsigned size, unsigned pl310_address)
-{
- unsigned addr;
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
-
- /* Align the start address to the start of a cache line */
- addr = (unsigned)start & ~(cache_line_size - 1);
-
- /* Wait for any background operations to finish */
- while(pl310->inv_pa & C_BIT);
-
- while(addr <= size + (unsigned)start)
- {
- pl310->inv_pa = addr;
- addr += cache_line_size;
- /* For this to work on L220 we would have to poll the C bit now */
- }
-}
-
-void clean_inv_pl310(unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
- int i;
-
- pl310->clean_inv_way = 0xffff;
- while (pl310->clean_inv_way)
- {
- /* Spin */
- for (i=10; i>0; --i)
- {
- __nop();
- }
- }
-}
-
-void clean_pl310(unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
- int i;
-
- pl310->clean_way = 0xffff;
- while (pl310->clean_way)
- {
- /* Spin */
- for (i=10; i>0; --i)
- {
- __nop();
- }
- }
-}
-
-static void inv_pl310(unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
- int i;
-
- pl310->inv_way = 0xffff;
- while (pl310->inv_way)
- {
- /* Spin */
- for (i=10; i>0; --i)
- {
- __nop();
- }
- }
-}
-
-void clean_disable_pl310(unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
- int i;
-
- pl310->clean_way = 0xffff;
- while (pl310->clean_way)
- {
- /* Spin */
- for (i=10; i>0; --i)
- {
- __nop();
- }
- }
-
- pl310->cache_sync = 0;
- dsb();
- pl310->control = 0;
-}
-
-
-int is_enabled_pl310(unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
-
- return (pl310->control & 1);
-}
-
-void save_pl310(u32 *pointer, unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
- pl310_context *context = (pl310_context *)pointer;
- int i;
-
- /* TODO: are all these registers are present in earlier PL310 versions? */
- context->aux_control = pl310->aux_control;
- context->tag_ram_control = pl310->tag_ram_control;
- context->data_ram_control = pl310->data_ram_control;
- context->ev_counter_ctrl = pl310->ev_counter_ctrl;
- context->ev_counter1_cfg = pl310->ev_counter1_cfg;
- context->ev_counter0_cfg = pl310->ev_counter0_cfg;
- context->ev_counter1 = pl310->ev_counter1;
- context->ev_counter0 = pl310->ev_counter0;
- context->int_mask = pl310->int_mask;
- context->lock_line_en = pl310->lock_line_en;
-
- /*
- * The lockdown registers repeat 8 times for L310, the L210 has only one
- * D and one I lockdown register at 0x0900 and 0x0904.
- */
- for (i=0; i<8; ++i)
- {
- context->lockdown[i].d = pl310->lockdown[i].d;
- context->lockdown[i].i = pl310->lockdown[i].i;
- }
-
- context->addr_filtering_start = pl310->addr_filtering_start;
- context->addr_filtering_end = pl310->addr_filtering_end;
- context->debug_ctrl = pl310->debug_ctrl;
- context->prefetch_ctrl = pl310->prefetch_ctrl;
- context->power_ctrl = pl310->power_ctrl;
-}
-
-void restore_pl310(u32 *pointer, unsigned pl310_address, int dormant)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
- pl310_context *context = (pl310_context *)pointer;
- int i;
-
- /* We may need to disable the PL310 if the boot code has turned it on */
- if (pl310->control)
- {
- /* Wait for the cache to be idle, then disable */
- pl310->cache_sync = 0;
- dsb();
- pl310->control = 0;
- }
-
- /* TODO: are all these registers present in earlier PL310 versions? */
- pl310->aux_control = context->aux_control;
- pl310->tag_ram_control = context->tag_ram_control;
- pl310->data_ram_control = context->data_ram_control;
- pl310->ev_counter_ctrl = context->ev_counter_ctrl;
- pl310->ev_counter1_cfg = context->ev_counter1_cfg;
- pl310->ev_counter0_cfg = context->ev_counter0_cfg;
- pl310->ev_counter1 = context->ev_counter1;
- pl310->ev_counter0 = context->ev_counter0;
- pl310->int_mask = context->int_mask;
- pl310->lock_line_en = context->lock_line_en;
-
- for (i=0; i<8; ++i)
- {
- pl310->lockdown[i].d = context->lockdown[i].d;
- pl310->lockdown[i].i = context->lockdown[i].i;
- }
-
- pl310->addr_filtering_start = context->addr_filtering_start;
- pl310->addr_filtering_end = context->addr_filtering_end;
- pl310->debug_ctrl = context->debug_ctrl;
- pl310->prefetch_ctrl = context->prefetch_ctrl;
- pl310->power_ctrl = context->power_ctrl;
- dsb();
-
- /*
- * If the RAMs were powered off, we need to invalidate the cache
- */
- if (!dormant)
- {
- inv_pl310(pl310_address);
- }
-
- pl310->control = 1;
- dsb();
-}
-
-void set_enabled_pl310(unsigned enabled, unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
-
- if (enabled)
- {
- inv_pl310(pl310_address);
-
- pl310->control |= 1;
- pl310->cache_sync = 0;
- dsb();
- }
- else
- {
- /* Wait for the cache to be idle */
- pl310->cache_sync = 0;
- dsb();
- pl310->control &= ~1;
- }
-}
-
-void set_status_pl310(unsigned status, unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
-
- if (status == CPU_POWER_MODE_STANDBY)
- {
- /* Wait for the cache to be idle */
- pl310->cache_sync = 0;
- dsb();
- pl310->power_ctrl |= 1;
- }
- else
- {
- pl310->power_ctrl &= ~1;
- }
-}
-
-void init_lp_of_l2(unsigned pl310_address)
-{
- pl310_registers *pl310 = (pl310_registers *)pl310_address;
-
- pl310->power_ctrl |= 3;
-}
-
-/*=======================================================================
- *=======================================================================
- *======= [ZX-PM] GIC interface for power management ============================
- *=======================================================================
- *=======================================================================*/
-
-
-/* This macro sets either the NS or S enable bit in the GIC distributor control register */
-#define GIC_DIST_ENABLE 0x00000001
-
-struct set_and_clear_regs
-{
- volatile unsigned int set[32], clear[32];
-};
-
-
-typedef struct
-{
- volatile uint32_t GICD_CTLR; // +0x0000 - RW - Distributor Control Register
- const volatile uint32_t GICD_TYPRE; // +0x0004 - RO - Interrupt Controller Type Register
- const volatile uint32_t GICD_IIDR; // +0x0008 - RO - Distributor Implementer Identification Register
-
- const volatile uint32_t padding0; // +0x000C - RESERVED
-
- volatile uint32_t GICD_STATUSR; // +0x0010 - RW - ????
-
- const volatile uint32_t padding1[3]; // +0x0014 - RESERVED
-
- volatile uint32_t IMP_DEF[8]; // +0x0020 - RW - Implementation defined registers
-
- volatile uint32_t GICD_SETSPI_NSR; // +0x0040 - WO - Non-Secure Set SPI Pending (Used when SPI is signalled using MSI)
- const volatile uint32_t padding2; // +0x0044 - RESERVED
- volatile uint32_t GICD_CLRSPI_NSR; // +0x0048 - WO - Non-Secure Clear SPI Pending (Used when SPI is signalled using MSI)
- const volatile uint32_t padding3; // +0x004C - RESERVED
- volatile uint32_t GICD_SETSPI_SR; // +0x0050 - WO - Secure Set SPI Pending (Used when SPI is signalled using MSI)
- const volatile uint32_t padding4; // +0x0054 - RESERVED
- volatile uint32_t GICD_CLRSPI_SR; // +0x0058 - WO - Secure Clear SPI Pending (Used when SPI is signalled using MSI)
-
- const volatile uint32_t padding5[3]; // +0x005C - RESERVED
-
- volatile uint32_t GICD_SEIR; // +0x0068 - WO - System Error Interrupt Register (Note: This was recently removed from the spec)
-
- const volatile uint32_t padding6[5]; // +0x006C - RESERVED
-
- volatile uint32_t GICD_IGROUPR[32]; // +0x0080 - RW - Interrupt Group Registers (Security Registers in GICv1)
-
- volatile uint32_t GICD_ISENABLER[32]; // +0x0100 - RW - Interrupt Set-Enable Registers
- volatile uint32_t GICD_ICENABLER[32]; // +0x0180 - RW - Interrupt Clear-Enable Registers
- volatile uint32_t GICD_ISPENDR[32]; // +0x0200 - RW - Interrupt Set-Pending Registers
- volatile uint32_t GICD_ICPENDR[32]; // +0x0280 - RW - Interrupt Clear-Pending Registers
- volatile uint32_t GICD_ISACTIVER[32]; // +0x0300 - RW - Interrupt Set-Active Register
- volatile uint32_t GICD_ICACTIVER[32]; // +0x0380 - RW - Interrupt Clear-Active Register
-
- volatile uint8_t GICD_IPRIORITYR[1024]; // +0x0400 - RW - Interrupt Priority Registers
- volatile uint32_t GICD_ITARGETSR[256]; // +0x0800 - RW - Interrupt Processor Targets Registers
- volatile uint32_t GICD_ICFGR[64]; // +0x0C00 - RW - Interrupt Configuration Registers
- volatile uint32_t GICD_GRPMODR[32]; // +0x0D00 - RW - ????
- const volatile uint32_t padding7[32]; // +0x0D80 - RESERVED
- volatile uint32_t GICD_NSACR[64]; // +0x0E00 - RW - Non-Secure Access Control Register
-
- volatile uint32_t GICD_SGIR; // +0x0F00 - WO - Software Generated Interrupt Register
-
- const volatile uint32_t padding8[3]; // +0x0F04 - RESERVED
-
- volatile uint32_t GICD_CPENDSGIR[4]; // +0x0F10 - RW - ???
- volatile uint32_t GICD_SPENDSGIR[4]; // +0x0F20 - RW - ???
-
- const volatile uint32_t padding9[52]; // +0x0F30 - RESERVED
- const volatile uint32_t padding10[5120]; // +0x1000 - RESERVED
-
- volatile uint64_t GICD_ROUTER[1024]; // +0x6000 - RW - Controls SPI routing when ARE=1
-}interrupt_distributor;
-
-typedef struct
-{
- const volatile uint32_t padding1[32]; // +0x0000 - RESERVED
- volatile uint32_t GICR_IGROUPR; // +0x0080 - RW - Interrupt Group Registers (Security Registers in GICv1)
- const volatile uint32_t padding2[31]; // +0x0084 - RESERVED
- volatile uint32_t GICR_ISENABLER; // +0x0100 - RW - Interrupt Set-Enable Registers
- const volatile uint32_t padding3[31]; // +0x0104 - RESERVED
- volatile uint32_t GICR_ICENABLER; // +0x0180 - RW - Interrupt Clear-Enable Registers
- const volatile uint32_t padding4[31]; // +0x0184 - RESERVED
- volatile uint32_t GICR_ISPENDR; // +0x0200 - RW - Interrupt Set-Pending Registers
- const volatile uint32_t padding5[31]; // +0x0204 - RESERVED
- volatile uint32_t GICR_ICPENDR; // +0x0280 - RW - Interrupt Clear-Pending Registers
- const volatile uint32_t padding6[31]; // +0x0284 - RESERVED
- volatile uint32_t GICR_ISACTIVER; // +0x0300 - RW - Interrupt Set-Active Register
- const volatile uint32_t padding7[31]; // +0x0304 - RESERVED
- volatile uint32_t GICR_ICACTIVER; // +0x0380 - RW - Interrupt Clear-Active Register
- const volatile uint32_t padding8[31]; // +0x0184 - RESERVED
- volatile uint8_t GICR_IPRIORITYR[32]; // +0x0400 - RW - Interrupt Priority Registers
- const volatile uint32_t padding9[504]; // +0x0420 - RESERVED
- volatile uint32_t GICR_ICFGR[2]; // +0x0C00 - RW - Interrupt Configuration Registers
- const volatile uint32_t padding10[62]; // +0x0C08 - RESERVED
- volatile uint32_t GICR_GRPMODR; // +0x0D00 - RW - ????
- const volatile uint32_t padding11[63]; // +0x0D04 - RESERVED
- volatile uint32_t GICR_NSACR; // +0x0E00 - RW - Non-Secure Access Control Register
-
-}interrupt_redistributor;
-
-
-typedef struct
-{
- /* 0x00 */ volatile unsigned int GICC_CTLR; /*control*/
- /* 0x04 */ volatile unsigned int GICC_PMR; /*priority mask register*/
- /* 0x08 */ volatile unsigned int GICC_BPR; /* binary Point register*/
- /* 0x0c */ volatile unsigned const int GICC_IAR;
- /* 0x10 */ volatile unsigned int GICC_EOIR;
- /* 0x14 */ volatile unsigned const int GICC_RPR;
- /* 0x18 */ volatile unsigned const int GICC_HPPIR;
- /* 0x1c */ volatile unsigned int GICC_ABPR;
- /* 0x1c */ volatile unsigned int GICC_AIAR;
- /* 0x1c */ volatile unsigned int GICC_AEOIR;
- /* 0x1c */ volatile unsigned int GICC_AHPPIR;
- /* 0x1c */ volatile unsigned int GICC_APR0;
- /* 0x1c */ volatile unsigned int GICC_NSAPR0;
- /* 0x1c */ volatile unsigned int GICC_IIDR;
-
-} cpu_interface;
-
-
-/*
- * Saves the GIC CPU interface context
- * Requires 3 or 4 words of memory
- */
-void save_gic_interface(u32 *pointer, unsigned gic_interface_address, int is_secure)
-{
-#if 1
- cpu_interface *ci = (cpu_interface *)gic_interface_address;
-
- pointer[0] = ci->GICC_CTLR;
- pointer[1] = ci->GICC_PMR;
- pointer[2] = ci->GICC_BPR;
-
- //ci->GICC_PMR = 0;
- // ci->GICC_BPR = 0;
- //ci->GICC_CTLR = 0;
- if (is_secure)
- {
- pointer[3] = ci->GICC_ABPR;
- // ci->GICC_ABPR = 0;// Çå0
- }
-#else
-{
- save_cpu_if(pointer);
-}
-
-#endif
-}
-
-/*
- * Enables or disables the GIC distributor (for the current security state)
- * Parameter 'enabled' is boolean.
- * Return value is boolean, and reports whether GIC was previously enabled.
- */
-int gic_distributor_set_enabled(int enabled, unsigned gic_distributor_address)
-{
- unsigned tmp;
- interrupt_distributor *id = (interrupt_distributor *)gic_distributor_address;
-
- tmp = id->GICD_CTLR;
- if (enabled)
- {
- id->GICD_CTLR = tmp | GIC_DIST_ENABLE;
- }
- else
- {
- id->GICD_CTLR = tmp & ~GIC_DIST_ENABLE;
- }
- return (tmp & GIC_DIST_ENABLE) != 0;
-}
-
-/*
- * Saves this CPU's banked parts of the distributor
- * Returns non-zero if an SGI/PPI interrupt is pending (after saving all required context)
- * Requires 19 words of memory
- */
-int save_gic_distributor_private(u32 *pointer, unsigned gic_distributor_address, int is_secure)
-{
-#if 0 //zhangpei
- interrupt_distributor *id = (interrupt_distributor *)gic_distributor_address;
-
- *pointer = id->enable.set[0];
- ++pointer;
- pointer = copy_words(pointer, id->priority, 8);
- pointer = copy_words(pointer, id->target, 8);
- if (is_secure)
- {
- *pointer = id->security[0];
- ++pointer;
- }
- /* Save just the PPI configurations (SGIs are not configurable) */
- *pointer = id->configuration[1];
- ++pointer;
- *pointer = id->pending.set[0];
- if (*pointer)
- {
- return -1;
- }
- else
- {
- return 0;
- }
-#endif
-
-return 0;
-
-}
-
-/*
- * Saves the shared parts of the distributor.
- * Requires 1 word of memory, plus 20 words for each block of 32 SPIs (max 641 words)
- * Returns non-zero if an SPI interrupt is pending (after saving all required context)
- */
-int save_gic_distributor_shared(u32 *pointer, unsigned int gic_distributor_address, int is_secure)
-{
-
- interrupt_distributor *id = (interrupt_distributor *)gic_distributor_address;
- // interrupt_redistributor *ird =(interrupt_redistributor *)(gic_distributor_address+0x40000)
- int retval = 0;
- #if 0
- unsigned num_spis, *saved_pending;
-
-
-
- /* Calculate how many SPIs the GIC supports */
- num_spis = 32 * (id->GICD_TYPRE & 0x1f);
-
- /* TODO: add nonsecure stuff */
-
- /* Save rest of GIC configuration */
- if (num_spis)
- {
- pointer = copy_words(pointer, id->enable.set + 1, num_spis / 32);
- pointer = copy_words(pointer, id->priority + 8, num_spis / 4);
- pointer = copy_words(pointer, id->target + 8, num_spis / 4);
- pointer = copy_words(pointer, id->configuration + 2, num_spis / 16);
- if (is_secure)
- {
- pointer = copy_words(pointer, id->security + 1, num_spis / 32);
- }
- saved_pending = pointer;
- pointer = copy_words(pointer, id->pending.set + 1, num_spis / 32);
-
- /* Check interrupt pending bits */
- /* zxp-- later we will check only useful int line */
- for (i=0; i<num_spis/32; ++i)
- {
- if (saved_pending[i])
- {
- retval = -1;
- break;
- }
- }
- }
- /* Save control register */
- *pointer = id->control;
-#else
-#if 1/*GICV3*//*±£´æ²»Çå0*/
-pointer = copy_words(pointer, id->GICD_ISENABLER,32); /*0x100~0x17C interrupt set-enable reg*/
-pointer = copy_words(pointer, id->GICD_ICFGR,64); /*0xc00~0xcfc interrupt config reg*/
-pointer = copy_words(pointer, id->GICD_GRPMODR,32); /*0xd00~d7c interrupt group modifer gre */
-pointer = copy_words(pointer, id->GICD_IGROUPR,32); /*0x80~0xfc interrupt group reg*/
-pointer = copy_words(pointer, id->GICD_ISPENDR,32); /*0x200~0x27c interrupt set-pending reg*/
-pointer = copy_words(pointer, (volatile unsigned int *)id->GICD_IPRIORITYR,32); /*0x400~0x7f8 Interrupt Priority Reg reg*/
-pointer = copy_words(pointer, (volatile unsigned int *)id->GICD_ROUTER,32); /*0x6100~0x7ef8 Interrupt Priority Reg reg 1024 64bit*/
-pointer = copy_words(pointer, &(id->GICD_CTLR),1); /*0x0~0x3, ditribrutor control reg*/
-// - zxp pointer = copy_words(pointer, (volatile unsigned int *)(gic_distributor_address+0x40000+0x14),1); /* GICR_WAKER*/
-#else/*GICV3*//*±£´æ²¢Çå0*/
-pointer = copy_wordsandclear(pointer, id->GICD_ISENABLER,32); /*0x100~0x17C interrupt set-enable reg*/
-pointer = copy_wordsandclear(pointer, id->GICD_ICFGR,64); /*0xc00~0xcfc interrupt config reg*/
-pointer = copy_wordsandclear(pointer, id->GICD_GRPMODR,32); /*0xd00~d7c interrupt group modifer gre */
-pointer = copy_wordsandclear(pointer, id->GICD_IGROUPR,32); /*0x80~0xfc interrupt group reg*/
-pointer = copy_wordsandclear(pointer, id->GICD_ISPENDR,32); /*0x200~0x27c interrupt set-pending reg*/
-pointer = copy_wordsandclear(pointer, id->GICD_IPRIORITYR,32); /*0x400~0x7f8 Interrupt Priority Reg reg*/
-pointer = copy_wordsandclear(pointer, (volatile unsigned int *)id->GICD_ROUTER,32); /*0x6100~0x7ef8 Interrupt Priority Reg reg 1024 64bit*/
-pointer = copy_wordsandclear(pointer, &(id->GICD_CTLR),1); /*0x0~0x3, ditribrutor control reg*/
-pointer = copy_wordsandclear(pointer, (gic_distributor_address+0x40000+0x14),1); /* GICR_WAKER*/
-#endif
-
-#endif
-
- return retval;
-}
-
-void restore_gic_interface(u32 *pointer, unsigned gic_interface_address, int is_secure)
-{
-#if 1
- cpu_interface *ci = (cpu_interface *)gic_interface_address;
-
- ci->GICC_PMR = pointer[1];
- ci->GICC_BPR = pointer[2];
-
- if (is_secure)
- {
- ci->GICC_ABPR = pointer[3];
- }
-
- /* Restore control register last */
- ci->GICC_CTLR = pointer[0];
-#else
- restore_cpu_if(pointer);
-#endif
-
-}
-
-void restore_gic_distributor_private(u32 *pointer, unsigned gic_distributor_address, int is_secure)
-{
-#if 0 //zhangpei
- interrupt_distributor *id = (interrupt_distributor *)gic_distributor_address;
-
- /* We assume the distributor is disabled so we can write to its config registers */
-
- id->enable.set[0] = *pointer;
- ++pointer;
- copy_words(id->priority, pointer, 8);
- pointer += 8;
- copy_words(id->target, pointer, 8);
- pointer += 8;
- if (is_secure)
- {
- id->security[0] = *pointer;
- ++pointer;
- }
- /* Restore just the PPI configurations (SGIs are not configurable) */
- id->configuration[1] = *pointer;
- ++pointer;
- id->pending.set[0] = *pointer;
-#endif
-}
-
-void restore_gic_distributor_shared(u32 *pointer, unsigned gic_distributor_address, int is_secure)
-{
- interrupt_distributor *id = (interrupt_distributor *)gic_distributor_address;
-
- /* Make sure the distributor is disabled */
- // gic_distributor_set_enabled(false, gic_distributor_address);
-
-#if 0
- /* Calculate how many SPIs the GIC supports */
- num_spis = 32 * ((id->controller_type) & 0x1f);
-
- /* TODO: add nonsecure stuff */
-
- /* Restore rest of GIC configuration */
- if (num_spis)
- {
- copy_words(id->enable.set + 1, pointer, num_spis / 32);
- pointer += num_spis / 32;
- copy_words(id->priority + 8, pointer, num_spis / 4);
- pointer += num_spis / 4;
- copy_words(id->target + 8, pointer, num_spis / 4);
- pointer += num_spis / 4;
- copy_words(id->configuration + 2, pointer, num_spis / 16);
- pointer += num_spis / 16;
- if (is_secure)
- {
- copy_words(id->security + 1, pointer, num_spis / 32);
- pointer += num_spis / 32;
- }
- copy_words(id->pending.set + 1, pointer, num_spis / 32);
- pointer += num_spis / 32;
- }
-
- /* Restore control register - if the GIC was disabled during save, it will be restored as disabled. */
- id->control = *pointer;
-#else
-/*GICV3*/
- copy_words( id->GICD_ISENABLER ,pointer , 32); /*0x100~0x17C interrupt set-enable reg*/
- pointer+=32;
- copy_words(id->GICD_ICFGR , pointer , 64); /*0xc00~0xcfc interrupt config reg*/
- pointer+=64;
- copy_words(id->GICD_GRPMODR, pointer , 32); /*0xd00~d7c interrupt group modifer gre */
- pointer+=32;
- copy_words(id->GICD_IGROUPR, pointer , 32); /*0x80~0xfc interrupt group reg*/
- pointer+=32;
- copy_words(id->GICD_ISPENDR, pointer , 32); /*0x200~0x27c interrupt set-pending reg*/
- pointer+=32;
- copy_words((volatile unsigned int *)id->GICD_IPRIORITYR,pointer , 32); /*0x400~0x7f8 Interrupt Priority Reg reg*/
- pointer+=32;
- copy_words((volatile unsigned int *)id->GICD_ROUTER, pointer, 32); /*0x6100~0x7ef8 Interrupt Priority Reg reg 1024 64bit*/
- pointer+=32;
- copy_words(&id->GICD_CTLR, pointer , 1); /*0x0~0x3, ditribrutor control reg*/
- pointer+=1;
-// - zxp copy_words((volatile unsigned int *)(gic_distributor_address+0x40000+0x14),pointer,1); /* GICR_WAKER*/
-
-#endif
-return;
-}
-/* ÐÂÔö*/
-unsigned int gic_set_processorsleep(bool issleep)
-{
- if(issleep)
- {
- *(volatile unsigned int *)(GIC_REDIST_BASE+0x14) = 0x2;/**/
- while((*(volatile unsigned int *) (GIC_REDIST_BASE+0x14) &0x4) == 0); /*µÈ´ýGICÖжϴ¦ÀíÍê³É*/
- }
- else
- {
- *(volatile unsigned int *) (GIC_REDIST_BASE+0x14) = 0x0;/**/
- }
-
-
- return 0;
-}
-
-unsigned int gic_get_cur_pending(unsigned gic_interface_address)
-{
-
-#if 1
- cpu_interface *ci = (cpu_interface *)gic_interface_address;;
-
- return ci->GICC_HPPIR&0x3ff;
-#else
- unsigned int value = 0;
- // unsigned int value_addr = &value;
- // asm volatile(
- // "ldr r1,=value_addr\n\t"
- // "mrc p15, 0, r1, c12, c8, 2\n\t" /* ICC_HPPIR0 */
-
- // );
- return value;
-#endif
-}
-
-extern unsigned int gic_wake_enable[3];
-static u32 pm_gic_enable[3] =
-{
- 0xFFFFFFFF, 0xFFFFFFFF, 0x0FFFFFF,
-};
-void pm_save_gic_wake_enable(void)
-{
- interrupt_distributor *id = (interrupt_distributor *)GIC_DIST_BASE;
- pm_gic_enable[0]=id->GICD_ISENABLER[1];
- pm_gic_enable[1]=id->GICD_ISENABLER[2];
- pm_gic_enable[2]=id->GICD_ISENABLER[3];
-
- id->GICD_ICENABLER[1] = ~gic_wake_enable[0];
- id->GICD_ICENABLER[2] = ~gic_wake_enable[1];
- id->GICD_ICENABLER[3] = ~gic_wake_enable[2];
-}
-
-void pm_restore_gic_wake_enable(void)
-{
- interrupt_distributor *id = (interrupt_distributor *)GIC_DIST_BASE;
- id->GICD_ISENABLER[1] = pm_gic_enable[0];
- id->GICD_ISENABLER[2] = pm_gic_enable[1];
- id->GICD_ISENABLER[3]= pm_gic_enable[2];
-
-}
-
-void pm_mask_tick(void)
-{
-// ÐÞ¸Ä
-#if 1
- interrupt_distributor *id = (interrupt_distributor *)(GIC_DIST_BASE);
-
- //id->enable.clear[1] = 0x8000;
- id->GICD_ICENABLER[1] = 0x8000;
-#endif
-}
-
-void pm_unmask_tick(void)
-{
-// ÐÞ¸Ä
-#if 1
- interrupt_distributor *id = (interrupt_distributor *)(GIC_DIST_BASE);
-
- id->GICD_ISENABLER[1] |= 0x8000;
-#endif
-}
-
-
-/*=======================================================================
- *=======================================================================
- *======= [ZX-PM] V7 debug interface for power management ============================
- *=======================================================================
- *=======================================================================*/
-
-
-#define DIDR_VERSION_SHIFT 16
-#define DIDR_VERSION_MASK 0xF
-#define DIDR_VERSION_7_1 5
-#define DIDR_BP_SHIFT 24
-#define DIDR_BP_MASK 0xF
-#define DIDR_WP_SHIFT 28
-#define DIDR_WP_MASK 0xF
-#define CLAIMCLR_CLEAR_ALL 0xff
-
-#define DRAR_VALID_MASK 0x00000003
-#define DSAR_VALID_MASK 0x00000003
-#define DRAR_ADDRESS_MASK 0xFFFFF000
-#define DSAR_ADDRESS_MASK 0xFFFFF000
-#define OSLSR_OSLM_MASK 0x00000009
-#define OSLAR_UNLOCKED 0x00000000
-#define OSLAR_LOCKED 0xC5ACCE55
-#define LAR_UNLOCKED 0xC5ACCE55
-#define LAR_LOCKED 0x00000000
-#define OSDLR_UNLOCKED 0x00000000
-#define OSDLR_LOCKED 0x00000001
-
-typedef volatile struct
-{ /* Registers Save? */
- u32 const didr; /* 0 Read only */
- u32 dscr_i; /* 1 ignore - use dscr_e instead */
- u32 const dummy1[3]; /* 2-4 ignore */
- u32 dtrrx_dtrtx_i; /* 5 ignore */
- u32 wfar; /* 6 ignore - transient information */
- u32 vcr; /* 7 Save */
- u32 const dummy2; /* 8 ignore */
- u32 ecr; /* 9 ignore */
- u32 dsccr; /* 10 ignore */
- u32 dsmcr; /* 11 ignore */
- u32 const dummy3[20]; /* 12-31 ignore */
- u32 dtrrx_e; /* 32 ignore */
- u32 itr_pcsr; /* 33 ignore */
- u32 dscr_e; /* 34 Save */
- u32 dtrtx_e; /* 35 ignore */
- u32 drcr; /* 36 ignore */
- u32 eacr; /* 37 Save - V7.1 only */
- u32 const dummy4[2]; /* 38-39 ignore */
- u32 pcsr; /* 40 ignore */
- u32 cidsr; /* 41 ignore */
- u32 vidsr; /* 42 ignore */
- u32 const dummy5[21]; /* 43-63 ignore */
- u32 bvr[16]; /* 64-79 Save */
- u32 bcr[16]; /* 80-95 Save */
- u32 wvr[16]; /* 96-111 Save */
- u32 wcr[16]; /* 112-127 Save */
- u32 const dummy6[16]; /* 128-143 ignore */
- u32 bxvr[16]; /* 144-159 Save if have Virtualization extensions */
- u32 const dummy7[32]; /* 160-191 ignore */
- u32 oslar; /* 192 If oslsr[0] is 1, unlock before save/restore */
- u32 const oslsr; /* 193 ignore */
- u32 ossrr; /* 194 ignore */
- u32 const dummy8; /* 195 ignore */
- u32 prcr; /* 196 ignore */
- u32 prsr; /* 197 clear SPD on restore */
- u32 const dummy9[762]; /* 198-959 ignore */
- u32 itctrl; /* 960 ignore */
- u32 const dummy10[39]; /* 961-999 ignore */
- u32 claimset; /* 1000 Restore claim bits to here */
- u32 claimclr; /* 1001 Save claim bits from here */
- u32 const dummy11[2]; /* 1002-1003 ignore */
- u32 lar; /* 1004 Unlock before restore */
- u32 const lsr; /* 1005 ignore */
- u32 const authstatus; /* 1006 Read only */
- u32 const dummy12; /* 1007 ignore */
- u32 const devid2; /* 1008 Read only */
- u32 const devid1; /* 1009 Read only */
- u32 const devid; /* 1010 Read only */
- u32 const devtype; /* 1011 Read only */
- u32 const pid[8]; /* 1012-1019 Read only */
- u32 const cid[4]; /* 1020-1023 Read only */
-} debug_registers_t;
-
-typedef struct
-{
- u32 vcr;
- u32 dscr_e;
- u32 eacr;
- u32 bvr[16];
- u32 bcr[16];
- u32 wvr[16];
- u32 wcr[16];
- u32 bxvr[16];
- u32 claim;
-} debug_context_t; /* total size 86 * 4 = 344 bytes */
-
-debug_registers_t *read_debug_address(void)
-{
- unsigned drar, dsar;
-
- drar = read_drar();
- dsar = read_dsar();
-
- if (!(drar & DRAR_VALID_MASK)
- || !(dsar & DSAR_VALID_MASK))
- {
- return 0; /* No memory-mapped debug on this processor */
- }
-
- return (debug_registers_t *)((drar & DRAR_ADDRESS_MASK)
- + (dsar & DSAR_ADDRESS_MASK));
-}
-
-/*
- * We assume that before save (and after restore):
- * - OSLAR is NOT locked, or the debugger would not work properly
- * - LAR is locked, because the ARM ARM says it must be
- * - OSDLR is NOT locked, or the debugger would not work properly
- */
-
-void save_v7_debug(u32 *context)
-{
- debug_registers_t *dbg = (void*)read_debug_address();
- debug_context_t *ctx = (void*)context;
- unsigned v71, num_bps, num_wps, i;
- u32 didr;
-
- if (!dbg)
- {
- return;
- }
-
- didr = dbg->didr;
- /*
- * Work out what version of debug we have
- */
- v71 = (((didr >> DIDR_VERSION_SHIFT) & DIDR_VERSION_MASK) == DIDR_VERSION_7_1);
-
- /*
- * Save all context to memory
- */
- ctx->vcr = dbg->vcr;
- ctx->dscr_e = dbg->dscr_e;
- ctx->claim = dbg->claimclr;
-
- if (v71)
- {
- ctx->eacr = dbg->eacr;
- }
-
- num_bps = 1 + ((didr >> DIDR_BP_SHIFT) & DIDR_BP_MASK);
- for (i=0; i<num_bps; ++i)
- {
- ctx->bvr[i] = dbg->bvr[i];
- ctx->bcr[i] = dbg->bcr[i];
-#ifdef VIRTUALIZATION
- ctx->bxvr[i] = dbg->bxvr[i]; /* TODO: don't save the ones that don't exist */
-#endif
- }
-
- num_wps = 1 + ((didr >> DIDR_WP_SHIFT) & DIDR_WP_MASK);
- for (i=0; i<num_wps; ++i)
- {
- ctx->wvr[i] = dbg->wvr[i];
- ctx->wcr[i] = dbg->wcr[i];
- }
-
- /*
- * If Debug V7.1, we must set osdlr (by cp14 interface) before power down.
- * Once we have done this, debug becomes inaccessible.
- */
- if (v71)
- {
- write_osdlr(OSDLR_LOCKED);
- }
-}
-
-void restore_v7_debug(u32 *context)
-{
- debug_registers_t *dbg = (void*)read_debug_address();
- debug_context_t *ctx = (void*)context;
- unsigned v71, num_bps, num_wps, i;
- u32 didr;
-
- if (!dbg)
- {
- return;
- }
-
- didr = dbg->didr;
- /*
- * Work out what version of debug we have
- */
- v71 = (((didr >> DIDR_VERSION_SHIFT) & DIDR_VERSION_MASK) == DIDR_VERSION_7_1);
-
- /* Enable write access to registers */
- dbg->lar = LAR_UNLOCKED;
- /*
- * If Debug V7.1, we must unset osdlr (by cp14 interface) before restoring.
- * (If the CPU has not actually power-cycled, osdlr may not be reset).
- */
- if (v71)
- {
- write_osdlr(OSDLR_UNLOCKED);
- }
-
- /*
- * Restore all context from memory
- */
- dbg->vcr = ctx->vcr;
- dbg->claimclr = CLAIMCLR_CLEAR_ALL;
- dbg->claimset = ctx->claim;
-
- if (v71)
- {
- dbg->eacr = ctx->eacr;
- }
-
- num_bps = 1 + ((didr >> DIDR_BP_SHIFT) & DIDR_BP_MASK);
- for (i=0; i<num_bps; ++i)
- {
- dbg->bvr[i] = ctx->bvr[i];
- dbg->bcr[i] = ctx->bcr[i];
-#ifdef VIRTUALIZATION
- dbg->bxvr[i] = ctx->bxvr[i]; /* TODO: don't restore the ones that don't exist */
-#endif
- }
-
- num_wps = 1 + ((didr >> DIDR_WP_SHIFT) & DIDR_WP_MASK);
- for (i=0; i<num_wps; ++i)
- {
- dbg->wvr[i] = ctx->wvr[i];
- dbg->wcr[i] = ctx->wcr[i];
- }
-
- /* Clear PRSR.SPD by reading PRSR */
- if (!v71)
- {
- (dbg->prsr);
- }
-
- /* Re-enable debug */
- dbg->dscr_e = ctx->dscr_e;
-
- /* Disable write access to registers */
- dbg->lar = LAR_LOCKED;
-}
-
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-context.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-context.c
deleted file mode 100644
index 9ad479f..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-context.c
+++ /dev/null
@@ -1,622 +0,0 @@
-/*
- * ZTE cpu context save&restore driver
- *
- * Copyright (C) 2013 ZTE Ltd.
- * by zxp
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/suspend.h>
-
-#include <asm/memory.h>
-
-#include "zx-pm.h"
-
-
-struct zx_pm_main_table zx_pm_main_table;
-unsigned pm_device_memory [PM_MEMORY_SIZE/4];
-
-extern volatile int sleep_ret_flag[];
-
-/**
- * This is where the reset vector jumps to.
- *
- */
-static unsigned get_device_memory(unsigned size);
-/*********************************************************************
- * FUNCTION DEFINATIONS
- ********************************************************************/
-/**
- * zx_pm_context_init - initial context for cpu suspend and resume.
- *
- * initial the struct variable for context.
- */
-int zx_pm_context_init(void)
-{
- int i;
- struct zx_cluster_context* temp_cluster_context;
- struct zx_cpu_context* temp_cpu_context;
-
- pr_info("[SLP] Power/PM_CONTEXT_INIT \n");
-
- zx_set_wakeup_address(SYSTEM_WAKEUP_ADDR);
-
- zx_pm_main_table.num_cpus = MAX_CPU_NUM;
-
-#ifdef CONFIG_ARCH_ZX297520V2
- zx_pm_main_table.scu_address = (u32)SCU_ADDRESS;
- zx_pm_main_table.ic_dist_address = (u32)SCU_ADDRESS + IC_DISTRIBUTOR_OFFSET;
- zx_pm_main_table.ic_interface_address = (u32)SCU_ADDRESS + IC_INTERFACE_OFFSET;
- zx_pm_main_table.l2_address = (u32)L2_CONTROLLER_ADDRESS;
- zx_pm_main_table.crm_address = (u32)A9_CRM_ADDRESS;
-
- zx_pm_main_table.scu_address_p = (u32)SCU_ADDRESS_P;
- zx_pm_main_table.l2_address_p = (u32)L2_CONTROLLER_ADDRESS_P;
- zx_pm_main_table.crm_address_p = (u32)A9_CRM_ADDRESS_P;
-#else
- zx_pm_main_table.scu_address = (u32)0;
- zx_pm_main_table.ic_dist_address = (u32)(GIC_DIST_BASE);
- zx_pm_main_table.ic_interface_address = (u32)(ZX_GICC_BASE);
- zx_pm_main_table.l2_address = (u32)0;
- zx_pm_main_table.crm_address = (u32)AP_CRM_BASE;
-
- zx_pm_main_table.scu_address_p = (u32)0;
- zx_pm_main_table.l2_address_p = (u32)0;
- zx_pm_main_table.crm_address_p = (u32)(ZX29_AP_PERIPHERAL_PHYS+0x20000);
-#endif
- /*cluster info*/
- temp_cluster_context = (void *)get_device_memory(sizeof(struct zx_cluster_context));
- temp_cluster_context->flags = 0;
- temp_cluster_context->saved_items = 0;
- temp_cluster_context->gic_dist_shared_data = (void *)get_device_memory(GIC_DIST_SHARED_DATA_SIZE);
- temp_cluster_context->l2_data = (void *)get_device_memory(L2_DATA_SIZE);
- temp_cluster_context->scu_data = (void *)get_device_memory(SCU_DATA_SIZE);
- temp_cluster_context->global_timer_data = (void *)get_device_memory(GLOBAL_TIMER_DATA_SIZE);
- temp_cluster_context->crm_data = (void *)get_device_memory(CRM_DATA_SIZE);
- temp_cluster_context->power_state = CPU_POWER_MODE_RUN;
-
- zx_pm_main_table.cluster_context = temp_cluster_context;
-
- /*cpu info*/
- for(i=0;i<zx_pm_main_table.num_cpus;i++)
- {
- temp_cpu_context = (void *)get_device_memory(sizeof(struct zx_cpu_context));
- temp_cpu_context->flags = 0;
- temp_cpu_context->saved_items = 0;
- temp_cpu_context->control_data = (void *)get_device_memory(CONTROL_DATA_SIZE);
- temp_cpu_context->pmu_data = (void *)get_device_memory(PMU_DATA_SIZE);
- temp_cpu_context->timer_data = (void *)get_device_memory(TIMER_DATA_SIZE);
- temp_cpu_context->vfp_data = (void *)get_device_memory(VFP_DATA_SIZE);
- temp_cpu_context->gic_interface_data = (void *)get_device_memory(GIC_INTERFACE_DATA_SIZE);
- temp_cpu_context->gic_dist_private_data = (void *)get_device_memory(GIC_DIST_PRIVATE_DATA_SIZE);
- temp_cpu_context->banked_registers = (void *)get_device_memory(BANKED_REGISTERS_SIZE);
- temp_cpu_context->cp15_data = (void *)get_device_memory(CP15_DATA_SIZE);
- temp_cpu_context->debug_data = (void *)get_device_memory(DEBUG_DATA_SIZE);
- temp_cpu_context->mmu_data = (void *)get_device_memory(MMU_DATA_SIZE);
- temp_cpu_context->other_data = (void *)get_device_memory(OTHER_DATA_SIZE);
- temp_cpu_context->power_state = CPU_POWER_MODE_RUN;
- temp_cpu_context->sleep_type = CPU_SLEEP_TYPE_NULL;
-
- zx_pm_main_table.cpu_context[i] = temp_cpu_context;
- }
-
- pr_info("[SLP] Power/PM_CONTEXT_INIT END\n");
-
- return 0;
-}
-
-/**
- * sleep_type - idle/suspend.
- *
- * set the context flag will be saved according to sleep type.
- *
- */
-int zx_set_context_level (cpu_sleep_type_t sleep_type)
-{
- unsigned cpu_id;
-
- cpu_id = read_cpuid();
- zx_pm_main_table.cur_cpu = cpu_id;
-
- if(CPU_SLEEP_TYPE_LP1 == sleep_type) //suspend
- {
- zx_pm_main_table.cluster_context->flags = LP1_MG_SAVE_FLAG;
- zx_pm_main_table.cpu_context[cpu_id]->flags = LP1_CPU_SAVE_FLAG;
-
- zx_pm_main_table.cpu_context[cpu_id]->power_state = CPU_POWER_MODE_SHUTDOWN;
- zx_pm_main_table.cluster_context->power_state = CPU_POWER_MODE_SHUTDOWN;
- }
- else if(CPU_SLEEP_TYPE_IDLE_LP2 == sleep_type)//deep idle
- {
- /*if(0 == cpu_id)*/
- {
- zx_pm_main_table.cluster_context->flags = LP2_MG_SAVE_FLAG;
- zx_pm_main_table.cpu_context[cpu_id]->flags = LP2_CPU0_SAVE_FLAG;
-
- zx_pm_main_table.cpu_context[cpu_id]->power_state = CPU_POWER_MODE_DORMANT;
- zx_pm_main_table.cluster_context->power_state = CPU_POWER_MODE_DORMANT;
- }
- /*else
- {
- zx_pm_main_table.cluster_context->flags = MG_SAVE_FLAG_NULL;
- zx_pm_main_table.cpu_context[cpu_id]->flags = LP2_CPUX_SAVE_FLAG;
-
- zx_pm_main_table.cpu_context[cpu_id]->power_state = CPU_POWER_MODE_DORMANT;
- }*/
- }
- else if(CPU_SLEEP_TYPE_LP3 == sleep_type)//wfi only
- {
- zx_pm_main_table.cluster_context->flags = MG_SAVE_FLAG_NULL;
- zx_pm_main_table.cpu_context[cpu_id]->flags = MG_SAVE_FLAG_NULL;
-
- zx_pm_main_table.cpu_context[cpu_id]->power_state = CPU_POWER_MODE_STANDBY;
- zx_pm_main_table.cluster_context->power_state = CPU_POWER_MODE_STANDBY;
- }
-
- zx_pm_main_table.cpu_context[cpu_id]->sleep_type = sleep_type;
-
- return 0;
-}
-
-/**
- * This function saves all the context that will be lost
- * when a CPU and cluster enter a low power state.
- *
- */
-void zx_pm_save_context(void)
-{
- struct zx_cpu_context *context;
- struct zx_cluster_context *cluster_context;
- int is_secure = true;
- int ret=0;
-
- context = zx_pm_main_table.cpu_context[zx_pm_main_table.cur_cpu];
- cluster_context = zx_pm_main_table.cluster_context;
-#ifdef CONFIG_ARCH_ZX297520V2 /* v3 ÎÞ ÄÚ²¿timer*/
- if(context->flags&CPU_SAVE_TIMERS)
- {
- save_a9_timers(context->timer_data,
- zx_pm_main_table.scu_address+PRIVATE_TWD_OFFSET);
- context->saved_items |= CPU_SAVE_TIMERS;
- }
-#endif
- if(context->flags&CPU_SAVE_PMU)
- {
- save_performance_monitors(context->pmu_data);
- context->saved_items |= CPU_SAVE_PMU;
- }
-
- if(context->flags&CPU_SAVE_VFP)
- {
- save_vfp(context->vfp_data);
- context->saved_items |= CPU_SAVE_VFP;
- }
-
- /*only for smp */
- if(zx_pm_main_table.ic_interface_address)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
-#else
- gic_set_processorsleep(1);
-#endif
- save_gic_interface(context->gic_interface_data,
- zx_pm_main_table.ic_interface_address,
- is_secure);
-#ifdef CONFIG_ARCH_ZX297520V2
- ret = save_gic_distributor_private(context->gic_dist_private_data,
- zx_pm_main_table.ic_dist_address,
- is_secure);
-#endif
- }
-
- //if(ret == -1)
- //{
- // BUG();
- //while(1);
- //}
-
- if(context->flags&CPU_SAVE_DEBUG)
- {
- save_v7_debug(context->debug_data);
- context->saved_items |= CPU_SAVE_DEBUG;
- }
-
-
- save_banked_registers(context->banked_registers);
- save_cp15(context->cp15_data);
-
- if (context->flags&CPU_SAVE_OTHER)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
- save_a9_other(context->other_data, is_secure);
-#else
- #if 0
- save_a53_other(context->other_data, is_secure);
- #endif
-#endif
- context->saved_items |= CPU_SAVE_OTHER;
- }
-
- if (cluster_context->flags&CPU_SAVE_GLOBAL_TIMER)
- {
-
-
-#ifdef CONFIG_ARCH_ZX297520V2
- save_a9_global_timer(cluster_context->global_timer_data,
- zx_pm_main_table.scu_address+GLOBAL_TIMER_OFFSET);
-#else
- #if 0
- save_a53_sys_timer(cluster_context->global_timer_data,
- (0x01401000)); /*AP Timer0*/
- #endif
-#endif
- cluster_context->saved_items |= CPU_SAVE_GLOBAL_TIMER;
- }
-
- if(cluster_context->flags&CPU_SAVE_GIC)
- {
- ret = save_gic_distributor_shared(cluster_context->gic_dist_shared_data,
- zx_pm_main_table.ic_dist_address,
- is_secure);
- cluster_context->saved_items |= CPU_SAVE_GIC;
- }
-/*
- if(ret == -1)
- {
- while(1);
- }
-*/
-
- save_control_registers(context->control_data, is_secure);
- save_mmu(context->mmu_data);
-
- if (cluster_context->flags&CPU_SAVE_SCU)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
- save_a9_scu(cluster_context->scu_data, zx_pm_main_table.scu_address);
-#endif
- cluster_context->saved_items |= CPU_SAVE_SCU;
- }
-
- if (cluster_context->flags&CPU_SAVE_L2)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
- save_pl310(cluster_context->l2_data, zx_pm_main_table.l2_address);
-#endif
- cluster_context->saved_items |= CPU_SAVE_L2;
- }
-
- if (cluster_context->flags&CPU_SAVE_CRM)
- {
- cluster_context->saved_items |= CPU_SAVE_CRM;
- save_crm(cluster_context->crm_data, zx_pm_main_table.crm_address);
- }
-
- /*saved completely*/
- sleep_ret_flag[zx_pm_main_table.cur_cpu] = 0;
-}
-
-/**
- * This function restores all the context that was lost
- * when a CPU and cluster entered a low power state. It is called shortly after
- * reset, with the MMU and data cache off.
- *
- * note:before MMU is enable, all address should convert to PA
- */
-void zx_pm_restore_context(void)
-{
- unsigned cpu_id;
- struct zx_cpu_context *context;
- struct zx_cluster_context *cluster_context;
- int is_secure = true;
-
- cpu_id = read_cpuid();
-
- context = zx_pm_main_table.cpu_context[cpu_id];
- cluster_context = zx_pm_main_table.cluster_context;
-
- if (cluster_context->saved_items & CPU_SAVE_CRM)
- {
- restore_crm(cluster_context->crm_data, zx_pm_main_table.crm_address);
- cluster_context->saved_items &= ~CPU_SAVE_CRM;
- }
-
- if (cluster_context->saved_items & CPU_SAVE_SCU)
- {
- #ifdef CONFIG_ARCH_ZX297520V2
- restore_a9_scu(cluster_context->scu_data, zx_pm_main_table.scu_address);
- #endif
- cluster_context->saved_items &= ~CPU_SAVE_SCU;
- }
-
- if (cluster_context->saved_items & CPU_SAVE_L2)
- {
- #ifdef CONFIG_ARCH_ZX297520V2
- restore_pl310(cluster_context->l2_data,
- zx_pm_main_table.l2_address,
- cluster_context->power_state == CPU_POWER_MODE_DORMANT);
- #endif
- cluster_context->saved_items &= ~CPU_SAVE_L2;
- }
-
- /* Next get the MMU back on */
- restore_mmu(context->mmu_data);
- restore_control_registers(context->control_data, is_secure);
- /*
- * MMU and L1 and L2 caches are on, we may now read/write any data.
- * Now we need to restore the rest of this CPU's context
- */
-
- /* Restore shared items if necessary */
- if (cluster_context->saved_items & CPU_SAVE_GIC)
- {
- gic_distributor_set_enabled(false, zx_pm_main_table.ic_dist_address);
- restore_gic_distributor_shared(cluster_context->gic_dist_shared_data, zx_pm_main_table.ic_dist_address, is_secure);
- gic_distributor_set_enabled(true, zx_pm_main_table.ic_dist_address);
-#ifdef CONFIG_ARCH_ZX297520V2
-
- restore_gic_distributor_private(context->gic_dist_private_data, zx_pm_main_table.ic_dist_address, is_secure);
-#endif
- restore_gic_interface(context->gic_interface_data, zx_pm_main_table.ic_interface_address, is_secure);
- cluster_context->saved_items &= ~CPU_SAVE_GIC;
- }
- if (cluster_context->saved_items & CPU_SAVE_GLOBAL_TIMER)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
- restore_a9_global_timer(cluster_context->global_timer_data,
- zx_pm_main_table.scu_address+GLOBAL_TIMER_OFFSET);
-#else
- #if 0
- restore_a53_sys_timer(cluster_context->global_timer_data,
- (0x01401000)); /*AP timer 0*/
- #endif
-#endif
- cluster_context->saved_items &= ~CPU_SAVE_GLOBAL_TIMER;
- }
-
-
- /* Get the debug registers restored, so we can debug most of the APPF code sensibly! */
- if (context->saved_items&CPU_SAVE_DEBUG)
- {
- restore_v7_debug(context->debug_data);
- context->saved_items &= ~CPU_SAVE_DEBUG;
- }
-
- if (context->saved_items&CPU_SAVE_OTHER)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
- restore_a9_other(context->other_data, is_secure);
-#else
- #if 0
- restore_a53_other(context->other_data, is_secure);
- #endif
-#endif
- context->saved_items &= ~CPU_SAVE_OTHER;
- }
-
- restore_cp15(context->cp15_data);
- restore_banked_registers(context->banked_registers);
-
- if (context->saved_items&CPU_SAVE_VFP)
- {
- restore_vfp(context->vfp_data);
- context->saved_items &= ~CPU_SAVE_VFP;
- }
-
- if (context->saved_items&CPU_SAVE_TIMERS)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
- restore_a9_timers(context->timer_data,
- zx_pm_main_table.scu_address+PRIVATE_TWD_OFFSET);
-#endif
- context->saved_items &= ~CPU_SAVE_TIMERS;
- }
-
- if (context->saved_items&CPU_SAVE_PMU)
- {
- restore_performance_monitors(context->pmu_data);
- context->saved_items &= ~CPU_SAVE_PMU;
- }
-
- cluster_context->power_state = CPU_POWER_MODE_RUN;
- context->power_state = CPU_POWER_MODE_RUN;
-#ifdef CONFIG_ARCH_ZX297520V2
-#else
- gic_set_processorsleep(0);
-#endif
- /*restore completely*/
- sleep_ret_flag[cpu_id] = 1;
-}
-/**
- * This function restores the context that lost when cpu not power down correctly.
- *
- */
-void zx_pm_restore_abort_context(void)
-{
- unsigned cpu_id;
- struct zx_cpu_context *context;
- struct zx_cluster_context *cluster_context;
-
- cpu_id = read_cpuid();
- context = zx_pm_main_table.cpu_context[cpu_id];
- cluster_context = zx_pm_main_table.cluster_context;
-
- if (cluster_context->saved_items & CPU_SAVE_CRM)
- {
- restore_crm(cluster_context->crm_data, zx_pm_main_table.crm_address);
- cluster_context->saved_items &= ~CPU_SAVE_CRM;
- }
-
- if (cluster_context->saved_items & CPU_SAVE_SCU)
- {
- cluster_context->saved_items &= ~CPU_SAVE_SCU;
- }
-
- if (cluster_context->saved_items & CPU_SAVE_L2)
- {
- cluster_context->saved_items &= ~CPU_SAVE_L2;
- }
-
- /*
- * MMU and L1 and L2 caches are on, we may now read/write any data.
- * Now we need to restore the rest of this CPU's context
- */
-
- /* Restore shared items if necessary */
- if (cluster_context->saved_items & CPU_SAVE_GIC)
- {
- cluster_context->saved_items &= ~CPU_SAVE_GIC;
- }
-
- if (cluster_context->saved_items & CPU_SAVE_GLOBAL_TIMER)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
- restore_a9_global_timer(cluster_context->global_timer_data,
- zx_pm_main_table.scu_address+GLOBAL_TIMER_OFFSET);
-#else
- #if 0
- restore_a53_sys_timer(cluster_context->global_timer_data,
- (0x01401000));
- #endif
-#endif
- cluster_context->saved_items &= ~CPU_SAVE_GLOBAL_TIMER;
- }
-
-
- /* Get the debug registers restored, so we can debug most of the APPF code sensibly! */
- if (context->saved_items&CPU_SAVE_DEBUG)
- {
- context->saved_items &= ~CPU_SAVE_DEBUG;
- }
-
- if (context->saved_items&CPU_SAVE_OTHER)
- {
- context->saved_items &= ~CPU_SAVE_OTHER;
- }
-
- if (context->saved_items&CPU_SAVE_VFP)
- {
- restore_vfp(context->vfp_data);
- context->saved_items &= ~CPU_SAVE_VFP;
- }
-
- if (context->saved_items&CPU_SAVE_TIMERS)
- {
-#ifdef CONFIG_ARCH_ZX297520V2
- restore_a9_timers(context->timer_data,
- zx_pm_main_table.scu_address+PRIVATE_TWD_OFFSET);
-#endif
- context->saved_items &= ~CPU_SAVE_TIMERS;
- }
-
- if (context->saved_items&CPU_SAVE_PMU)
- {
- restore_performance_monitors(context->pmu_data);
- context->saved_items &= ~CPU_SAVE_PMU;
- }
-
- cluster_context->power_state = CPU_POWER_MODE_RUN;
- context->power_state = CPU_POWER_MODE_RUN;
-#ifdef CONFIG_ARCH_ZX297520V2
-#else
- gic_set_processorsleep(0);
-#endif
- /*restore completely*/
- sleep_ret_flag[cpu_id] = 1;
-}
-
-
-/**
- * Simple Device memory allocator function.
- * Returns start address of allocated region
- * Allocates region of size bytes, size will be rounded up to multiple of sizeof(long long)
- * Memory is zero-initialized.
- *
- * This function is from ARM.
- */
-static long long *device_memory = (void *)pm_device_memory;
-static unsigned get_device_memory(unsigned size)
-{
- static unsigned watermark = 0;
- static unsigned total_size = 0;
- unsigned ret, chunks_required;
-
- ret = watermark;
- chunks_required = (size + sizeof(long long) - 1) / sizeof(long long);
- watermark += chunks_required;
-
- if (watermark >= PM_MEMORY_SIZE / sizeof(long long))
- {
- pr_info("[SLP] error alloc size: %d Bytes \n", size);
- BUG();
- // while(1);
- return 0; /* No output possible, so loop */
- }
-
- total_size += size;
- pr_info("[SLP] alloc size: %d Bytes , total size %d Bytes\n", size, total_size);
-
-
- return (unsigned) &device_memory[ret];
-}
-
-/**
- * This function tell the wakeup code address to CPU_M0 for cpu waked up from deep sleep(shutdown or dormant),
- * the wakeup code will exist in iram (address 0), but iram will power down when AP sub-system or
- * whole chip power down, so A9 tell CPU_M0 the address, before A9 reset, CPU_M0 will copy the code
- * from this address to the iram.
- *
- * This code should call after zx_pm_context_init.
- */
-void zx_set_wakeup_address(u32 wakeup_addr)
-{
- wakeup_ram_area *wakeup_ram;
-
- pr_info("[SLP] Power/WAKEUP_ADDRESS \n");
-
-#ifdef CONFIG_ARCH_ZX297520V2
- zx_pm_main_table.wakeup_vaddr = (u32)ioremap_mem(wakeup_addr, WAKEUP_RAM_SIZE);
-#else
- zx_pm_main_table.wakeup_vaddr = (u32)__arm_ioremap_exec(wakeup_addr, WAKEUP_RAM_SIZE,0);
-#endif
- BUG_ON((void *)zx_pm_main_table.wakeup_vaddr == NULL);
- zx_pm_main_table.wakeup_ram_size = WAKEUP_RAM_SIZE;
- memset((void *)zx_pm_main_table.wakeup_vaddr, 0, zx_pm_main_table.wakeup_ram_size);
-
- wakeup_ram = (wakeup_ram_area *)zx_pm_main_table.wakeup_vaddr;
-
- /*copy the ddr reset code to iram*/
- memcpy(wakeup_ram->wakeup_code, (void *)cpu_wake_up, WAKEUP_CODE_LENGTH);
- memcpy(wakeup_ram->sleep_code, (void *)do_sleep_cpu, SLEEP_CODE_LENGTH);
- memcpy(wakeup_ram->ddr_dfs_code, (void *)waiting_ddr_dfs, DDR_DFS_CODE_LENGTH);
-
- wakeup_ram->reset_handler_vaddr = __pa((u32)((void *)cpu_reset_handler));
-}
-
-/**
- * get current sleep_type helper function.
- *
- * This code only used pm internel.
- */
-cpu_sleep_type_t pm_get_sleep_type(void)
-{
- return zx_pm_main_table.cpu_context[zx_pm_main_table.cur_cpu]->sleep_type;
-}
-
-/**
- * init lp for scu/l2.
- *
- * This code only used pm internel.
- */
-void pm_init_l2_and_scu(void)
-{
-#ifdef CONFIG_ARCH_ZX297520V2
- init_lp_of_scu(zx_pm_main_table.scu_address);
- init_lp_of_l2(zx_pm_main_table.l2_address);
-#endif
-}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-context.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-context.h
deleted file mode 100644
index 8df5056..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-context.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * zx-pm-context.h - cpu sleep context save&restore interface for power management.
- *
- * Written by zxp.
- *
- */
-
-#ifndef _ZX_PM_CONTEXT_H
-#define _ZX_PM_CONTEXT_H
-
-#define CPU_SAVE_PMU (1U << 0)
-#define CPU_SAVE_TIMERS (1U << 1)
-#define CPU_SAVE_VFP (1U << 2)
-#define CPU_SAVE_DEBUG (1U << 3)
-#define CPU_SAVE_GIC (1U << 4)
-#define CPU_SAVE_OTHER (1U << 5)
-
-#define CPU_SAVE_GLOBAL_TIMER (1U << 16)
-#define CPU_SAVE_L2 (1U << 17)
-#define CPU_SAVE_L2_RAM (1U << 18)
-#define CPU_SAVE_SCU (1U << 19)
-#define CPU_SAVE_CRM (1U << 20)
-
-#define SCU_ADDRESS (ZX_A9_PERIPHERAL_BASE)
-#define SCU_ADDRESS_P (ZX_A9_PERIPHERAL_PHYS)
-#define IC_INTERFACE_OFFSET (0x100)
-#define GLOBAL_TIMER_OFFSET (0x200)
-#define PRIVATE_TWD_OFFSET (0x600)
-#define IC_DISTRIBUTOR_OFFSET (0x1000)
-#define L2_CONTROLLER_ADDRESS (ZX_L2CACHE_CONFIG_BASE)
-#define L2_CONTROLLER_ADDRESS_P (ZX_L2CACHE_CONFIG_PHYS)
-#define A9_CRM_ADDRESS (A9_CRM_BASE)
-#define A9_CRM_ADDRESS_P (A9_CRM_PHYS)
-
-#define GIC_DIST_SET_PENDING (SCU_ADDRESS+IC_DISTRIBUTOR_OFFSET+0x200)
-#define GIC_CPU_HIGHPRI_PENDING (SCU_ADDRESS+IC_INTERFACE_OFFSET+0x18)
-#ifdef CONFIG_ARCH_ZX297520V2
-#define LP1_MG_SAVE_FLAG (CPU_SAVE_GIC|/*CPU_SAVE_GLOBAL_TIMER|*/CPU_SAVE_L2|CPU_SAVE_L2_RAM|CPU_SAVE_SCU|CPU_SAVE_CRM)
-#define LP1_CPU_SAVE_FLAG (CPU_SAVE_PMU|CPU_SAVE_TIMERS|/*CPU_SAVE_VFP|*//*CPU_SAVE_DEBUG|*/CPU_SAVE_GIC|CPU_SAVE_OTHER)
-#else
-#define LP1_MG_SAVE_FLAG (CPU_SAVE_GIC|/*CPU_SAVE_GLOBAL_TIMER|*//*CPU_SAVE_L2|CPU_SAVE_L2_RAM|CPU_SAVE_SCU|*/CPU_SAVE_CRM)
-#define LP1_CPU_SAVE_FLAG (CPU_SAVE_PMU|/*CPU_SAVE_TIMERS|*//*CPU_SAVE_VFP|*//*CPU_SAVE_DEBUG|*/CPU_SAVE_GIC|CPU_SAVE_OTHER)
-#endif
-
-#define LP2_MG_SAVE_FLAG (CPU_SAVE_GIC|/*CPU_SAVE_GLOBAL_TIMER|*/CPU_SAVE_L2|CPU_SAVE_L2_RAM|CPU_SAVE_SCU|CPU_SAVE_CRM)
-#define LP2_CPU0_SAVE_FLAG (CPU_SAVE_PMU|/*CPU_SAVE_TIMERS|CPU_SAVE_VFP|*//*CPU_SAVE_DEBUG|*/CPU_SAVE_GIC|CPU_SAVE_OTHER)
-#define LP2_CPUX_SAVE_FLAG (CPU_SAVE_PMU|/*CPU_SAVE_TIMERS|CPU_SAVE_VFP|*//*CPU_SAVE_DEBUG|*/CPU_SAVE_GIC|CPU_SAVE_OTHER)
-#define MG_SAVE_FLAG_NULL (0)
-
-/* Maximum size of each item of context, in bytes */
-#define PMU_DATA_SIZE (128)
-#define TIMER_DATA_SIZE (128)
-#define VFP_DATA_SIZE (288)
-#define GIC_INTERFACE_DATA_SIZE (64)
-#define GIC_DIST_PRIVATE_DATA_SIZE (96)
-#define BANKED_REGISTERS_SIZE (128)
-#define CP15_DATA_SIZE (64)
-#define DEBUG_DATA_SIZE (352)
-#define MMU_DATA_SIZE (64)
-#define OTHER_DATA_SIZE (32)
-#define CONTROL_DATA_SIZE (64)
-
-#define GIC_DIST_SHARED_DATA_SIZE (2592)
-#define SCU_DATA_SIZE (32)
-#define L2_DATA_SIZE (96)
-#define GLOBAL_TIMER_DATA_SIZE (128)
-#ifdef CONFIG_ARCH_ZX297520V2
-#define CRM_DATA_SIZE (136)
-#else
-#define CRM_DATA_SIZE (64)//(136)
-#endif
-#define PM_MEMORY_SIZE (5120)
-#define MAX_CPU_NUM (1)
-#define WAKEUP_RAM_SIZE (SZ_1K)
-
-struct zx_cluster_context
-{
- u32 flags; /*before save context, set this flag*/
- u32 saved_items; /*after save a context, set a flag for restore*/
- u32 *gic_dist_shared_data;
- u32 *l2_data;
- u32 *scu_data;
- u32 *global_timer_data;
- u32 *crm_data;
- cpu_power_mode_t power_state; /*dormant or shutdown*/
-};
-
-struct zx_cpu_context
-{
- u32 flags; /*before save context, set this flag*/
- u32 saved_items; /*after save a context, set a flag for restore*/
- u32 *control_data;
- u32 *pmu_data;
- u32 *timer_data;
- u32 *vfp_data;
- u32 *gic_interface_data;
- u32 *gic_dist_private_data;
- u32 *banked_registers;
- u32 *cp15_data;
- u32 *debug_data;
- u32 *mmu_data;
- u32 *other_data;
- cpu_power_mode_t power_state; /*dormant or shutdown*/
- cpu_sleep_type_t sleep_type; /*hotplug or idle or suspend*/
-};
-
-
-struct zx_pm_main_table
-{
- u32 wakeup_vaddr; /*the iram:0 shadow ram*/
- u32 wakeup_ram_size;
- u32 num_cpus;
- u32 cur_cpu;
- u32 scu_address; /* 0 => no SCU */
- u32 scu_address_p;
- u32 ic_dist_address; /* 0 => no Interrupt Controller */
- u32 ic_interface_address;
- u32 l2_address; /* 0 => no L2CC */
- u32 l2_address_p;
- u32 crm_address;
- u32 crm_address_p;
- struct zx_cluster_context* cluster_context;
- struct zx_cpu_context* cpu_context[MAX_CPU_NUM];
-};
-
-
-
-extern int zx_pm_context_init(void);
-extern int zx_set_context_level (cpu_sleep_type_t sleep_type);
-extern void zx_pm_save_context(void);
-extern void zx_pm_restore_context(void);
-extern void zx_pm_restore_abort_context(void);
-extern void pm_init_l2_and_scu(void);
-
-#endif /*_ZX_PM_CONTEXT_H*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-custom.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-custom.c
deleted file mode 100644
index 55af7d4..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-custom.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * zx-pm-custom.c - power management custom interface.
- *
- * Written by zxp.
- *
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/suspend.h>
-#include <linux/tick.h>
-
-#include "zx-pm.h"
-
-/*===================================================================
- *== 7520v2 ap interrupt arrangement ===============================
- *===================================================================
- *=================================== evb dc mifi =======
- *== timer1 -- wake y y y
- *== m02ap_icp y y y
- *== ps2ap_icp y y y
- *== ext0 -- pmu y n y
- *== ext1 -- pg(charger) y n y
- *== ext2 -- wps_key n n y
- *== ext3 -- rst_key y n y
- *== ext4 -- pwr_key y n n
- *== ext7 -- wps_key y n n
- *== ext6 -- wifi_wake y n y
- *== alarm y n n
- *== rtc y n n
- *===================================================================
- */
-/* evb */
-#if defined(CONFIG_ARCH_ZX297520V3_MIFI) || defined(CONFIG_ARCH_ZX297520V3_EVB) || defined(CONFIG_ARCH_ZX297520V3_MDL) ||\
- defined(CONFIG_ARCH_ZX297520V3_PHONE) || defined(CONFIG_ARCH_ZX297520V3_WATCH) || defined(CONFIG_ARCH_ZX297520V3_CPE) ||\
- defined(CONFIG_ARCH_ZX297520V3_POC)|| defined(CONFIG_ARCH_ZX297520V3_FWP)|| defined(CONFIG_ARCH_ZX297520V3_CAP) ||\
- defined(CONFIG_ARCH_ZX297520V3_UFI)|| defined(CONFIG_ARCH_ZX297520V3_CPE_SWITCH)
-
-/*AP_INT_*/
-#define WAKE_SRC_AP_TIMER1 (1U << 0)
-#define WAKE_SRC_AP_TIMER2 (1U << 1)
-#define WAKE_SRC_ICP_PS2AP (1U << 2)
-#define WAKE_SRC_USB_POWERDWN_UP (1U << 3)
-#define WAKE_SRC_USB_POWERDWN_DOWN (1U << 4)
-#define WAKE_SRC_HSIC_POWERDWN_UP (1U << 5)
-#define WAKE_SRC_HSIC_POWERDWN_DOWN (1U << 6)
-#define WAKE_SRC_ICP_M02AP (1U << 7)
-#define WAKE_SRC_RTC_ALARM (1U << 8)
-#define WAKE_SRC_RTC_TIMER (1U << 9)
-#define WAKE_SRC_KEYPAD (1U << 10)
-#define WAKE_SRC_SD1_DATA1 (1U << 11)
-#define WAKE_SRC_RESERVED (1U << 12)
-#define WAKE_SRC_SPCU_PW (1U << 13)
-#define WAKE_SRC_EXTERNAL0 (1U << 14)
-#define WAKE_SRC_EXTERNAL1 (1U << 15)
-#define WAKE_SRC_EXTERNAL2 (1U << 16)
-#define WAKE_SRC_EXTERNAL3 (1U << 17)
-#define WAKE_SRC_EXTERNAL4 (1U << 18)
-#define WAKE_SRC_EXTERNAL5 (1U << 19)
-#define WAKE_SRC_EXTERNAL6 (1U << 20)
-#define WAKE_SRC_EXTERNAL7 (1U << 21)
-#define WAKE_SRC_EXTERNAL8 (1U << 22)
-#define WAKE_SRC_EXTERNAL9 (1U << 23)
-#define WAKE_SRC_EXTERNAL10 (1U << 24)
-#define WAKE_SRC_EXTERNAL11 (1U << 25)
-#define WAKE_SRC_EXTERNAL12 (1U << 26)
-#define WAKE_SRC_EXTERNAL13 (1U << 27)
-#define WAKE_SRC_EXTERNAL14 (1U << 28)
-#define WAKE_SRC_EXTERNAL15 (1U << 29)
-#define WAKE_SRC_SD0_DATA1 (1U << 30)
-#define WAKE_SRC_ICP_PHY2AP (1U << 31)
-
-
-static unsigned int wake_source_for_sleep[] =
-{
- WAKE_SRC_ICP_M02AP | WAKE_SRC_ICP_PS2AP | WAKE_SRC_AP_TIMER1 | \
- WAKE_SRC_ICP_PHY2AP ,
- /*WAKE_SRC_RTC_ALARM | WAKE_SRC_RTC_TIMER | \
- WAKE_SRC_EXTERNAL0 | WAKE_SRC_EXTERNAL1 | WAKE_SRC_EXTERNAL2 | \
- WAKE_SRC_EXTERNAL3 | WAKE_SRC_EXTERNAL4 | WAKE_SRC_EXTERNAL5 | \
- WAKE_SRC_EXTERNAL6 | WAKE_SRC_EXTERNAL13 | WAKE_SRC_EXTERNAL14 |\
- WAKE_SRC_EXTERNAL7 ,*/
- /*|\
- WAKE_SRC_USB_POWERDWN_UP | WAKE_SRC_USB_POWERDWN_DOWN,*/
-};
-
-#else
-
-/* dc */
-static unsigned int wake_source_for_sleep[] =
-{
- WAKE_SRC_ICP_M02AP | WAKE_SRC_ICP_PS2AP | WAKE_SRC_AP_TIMER1 | \
- WAKE_SRC_EXTERNAL0,
-};
-
-#endif
-
-unsigned int pm_get_wakesource(void)
-{
- return wake_source_for_sleep[0];
-}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-helpers.S b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-helpers.S
deleted file mode 100644
index 8b09038..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-helpers.S
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * ZTE CPU low power powerdown and powerup helper code.
- *
- * Copyright (C) 2013 ZTE, Inc.
- * Written by ZXP
- *
- * This program is free software,you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/threads.h>
-#include <asm/asm-offsets.h>
-#include <asm/assembler.h>
-#include <asm/glue-cache.h>
-#include <asm/glue-proc.h>
-
-
-#define MIDR_CPU_MASK 0xff00fff0
-#define MMU_DISABLE_MASK 0x10001807 /* clear TRE, I Z C M */
-
-
-#define SCTLR_I (1<<12)
-#define SCTLR_Z (1<<11)
-#define SCTLR_C (1<<2)
-
-/**
- * This function takes three arguments
- * r0: Destination start address (must be word aligned)
- * r1: Source start address (must be word aligned)
- * r2: Number of words to copy
- * Return value is updated destination pointer (first unwritten word)
- */
-ENTRY(copy_words)
- cmp r2, #0
- beq copy_end
-loop_copy:
- ldr r3, [r1], #4
- str r3, [r0], #4
- subs r2, r2, #1
- bne loop_copy
-copy_end:
- bx lr
-ENDPROC(copy_words)
-
-ENTRY(copy_wordsandclear)
- cmp r2, #0
- beq copyclear_end
-loop_copyclear:
- ldr r3, [r1]
- str r3, [r0], #4
- str r2,[r1]/*Ö»Êǽ«Ô¼Ä´æÆ÷ÖµÐ޸ģ¬ÓÃÓÚÁÙʱÑéÖ¤£¬ÕýÈ·×÷·¨ÊÇÇå0*/
- add r1,r1,#4
- subs r2, r2, #1
- bne loop_copyclear
-copyclear_end:
- bx lr
-ENDPROC(copy_wordsandclear)
-/* ; Note: assumes conversion will be successful! */
-ENTRY(va_to_pa)
- mov r1, r0
- mcr p15, 0, r0, c7, c8, 1 /* Priv Write Current World VA-PA */
- mrc p15, 0, r0, c7, c4, 0 /* Get PA */
- bfc r0, #0, #12 /* We want top bits of translated addr */
- bfc r1, #12, #20 /* plus bottom bits of input addr */
- orr r0, r0, r1
- bx lr
-ENDPROC(va_to_pa)
-
-
-ENTRY(read_sctlr)
- mrc p15, 0, r0, c1, c0, 0
- bx lr
-ENDPROC(read_sctlr)
-
-
-ENTRY(write_sctlr)
- mcr p15, 0, r0, c1, c0, 0
- isb
- bx lr
-ENDPROC(write_sctlr)
-
-ENTRY(read_drar)
- mrc p14, 0, r0, c1, c0, 0 /* Read Debug ROM Address Register */
- bx lr
-ENDPROC(read_drar)
-
-
-ENTRY(read_dsar)
- mrc p14, 0, r0, c2, c0, 0 /* Read Debug Self Address Offset Register */
- bx lr
-ENDPROC(read_dsar)
-
-
-
-ENTRY(write_osdlr)
- mcr p14, 0, r0, c1, c3, 4 /* Write OS Double Lock Register */
- bx lr
-ENDPROC(write_osdlr)
-
-
-
-ENTRY(disable_mmu)
- mrc p15, 0, r3, c1, c0, 0
- ldr r2, =MMU_DISABLE_MASK
- bic r3, r3, r2
- dsb
- mcr p15, 0, r3, c1, c0, 0
- isb
- bx lr
-ENDPROC(disable_mmu)
-
-ENTRY(read_cpuid)
- mrc p15, 0, r0, c0, c0, 5 /* Read MPIDR */
- and r0, r0, #0xff /* extract CPU number */
- bx lr
-ENDPROC(read_cpuid)
-
-
-ENTRY(enable_cache)
- mrc p15, 0, r0, c1, c0, 0
- movw r1, #SCTLR_I | SCTLR_Z | SCTLR_C
- orr r0, r0, r1
- mcr p15, 0, r0, c1, c0, 0
- bx lr
-ENDPROC(enable_cache)
-
-
-ENTRY(exit_coherency)
- isb
- dsb
- mrc p15,0,r0,c1,c0,1
- bic r0,r0,#0x00000040
- mcr p15,0,r0,c1,c0,1
- isb
- dsb
- bx lr
-ENDPROC(exit_coherency)
-
-
-ENTRY(join_coherency)
- isb
- dsb
- mrc p15,0,r0,c1,c0,1
- orr r0,r0,#0x00000040
- mcr p15,0,r0,c1,c0,1
- isb
- dsb
- bx lr
-ENDPROC(join_coherency)
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-helpers.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-helpers.h
deleted file mode 100644
index 27e1512..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-helpers.h
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * zx-pm.h - power management helpers interface.
- *
- * Written by zxp.
- *
- */
-
-#ifndef _ZX_PM_HELPERS_H
-#define _ZX_PM_HELPERS_H
-
-/*
- * common helper functions
- */
-
-extern unsigned va_to_pa(unsigned virtual_address);
-extern unsigned read_drar(void);
-extern unsigned read_dsar(void);
-extern void write_osdlr(unsigned value);
-extern unsigned read_sctlr(void);
-extern void write_sctlr(unsigned value);
-extern void disable_mmu(void);
-extern unsigned read_cpuid(void);
-extern void enable_cache(void);
-extern void exit_coherency(void);
-extern void join_coherency(void);
-
-extern unsigned * copy_words(volatile unsigned *destination, volatile unsigned *source, unsigned num_words);
-extern unsigned * copy_wordsandclear(volatile unsigned *destination, volatile unsigned *source, unsigned num_words);
-
-/*
- * V7 functions
- */
-extern void save_control_registers(u32 *pointer, int is_secure);
-extern void save_mmu(u32 *pointer);
-extern void save_cpu_if(u32 *pointer);
-extern void gic_mask(void);
-extern void save_performance_monitors(u32 *pointer);
-extern void save_banked_registers(u32 *pointer);
-extern void save_cp15(u32 *pointer);
-extern void save_vfp(u32 *pointer);
-extern void save_generic_timer(u32 *pointer);
-extern void save_v7_debug(u32 *pointer);
-
-extern void restore_control_registers(u32 *pointer, int is_secure);
-extern void zx_restore_control_registers(u32 *pointer, int is_secure);
-extern void restore_mmu(u32 *pointer);
-extern void restore_cpu_if(u32 *pointer);
-extern void gic_unmask(void);
-extern void restore_performance_monitors(u32 *pointer);
-extern void restore_banked_registers(u32 *pointer);
-extern void restore_cp15(u32 *pointer);
-extern void restore_vfp(u32 *pointer);
-extern void restore_generic_timer(u32 *pointer);
-extern void restore_v7_debug(u32 *pointer);
-
-extern void disable_clean_inv_dcache_v7_l1(void);
-extern void disable_clean_inv_cache_pl310(unsigned pl310_address, unsigned stack_start, unsigned stack_size, int disable);
-extern void disable_clean_inv_dcache_v7_all(void);
-extern void clean_dcache_v7_l1(void);
-extern void clean_mva_dcache_v7_l1(void *mva);
-extern void invalidate_icache_v7_pou(void);
-extern void invalidate_icache_v7(void);
-extern void invalidate_dcache_v7_all(void);
-extern void enable_icache_v7(void);
-extern void appf_smc_handler(void);
-extern void enter_secure_monitor_mode(void);
-extern void enter_nonsecure_svc_mode(void);
-extern void set_security_state(int ns);
-extern void reset_init(void);
-
-/*
- * PL310 functions
- */
-extern void clean_inv_range_pl310(void *start, unsigned size, unsigned pl310_address); /* addresses are inclusive */
-extern void clean_range_pl310(void *start, unsigned size, unsigned pl310_address); /* addresses are inclusive */
-extern void inv_range_pl310(void *start, unsigned size, unsigned pl310_address);
-extern void clean_inv_pl310(unsigned pl310_address);
-extern void clean_pl310(unsigned pl310_address);
-extern void save_pl310(u32 *pointer, unsigned pl310_address);
-extern void restore_pl310(u32 *pointer, unsigned pl310_address, int dormant);
-extern void set_enabled_pl310(unsigned enabled, unsigned pl310_address);
-extern void set_status_pl310(unsigned status, unsigned pl310_address);
-extern int is_enabled_pl310(unsigned pl310_address);
-extern void init_lp_of_l2(unsigned pl310_address);
-extern void clean_disable_pl310(unsigned pl310_address);
-
-/*
- * GIC functions
- */
-extern int gic_distributor_set_enabled(int enabled, unsigned gic_distributor_address);
-extern void save_gic_interface(u32 *pointer, unsigned gic_interface_address, int is_secure);
-extern int save_gic_distributor_private(u32 *pointer, unsigned gic_distributor_address, int is_secure);
-extern int save_gic_distributor_shared(u32 *pointer, unsigned gic_distributor_address, int is_secure);
-extern void restore_gic_interface(u32 *pointer, unsigned gic_interface_address, int is_secure);
-extern void restore_gic_distributor_private(u32 *pointer, unsigned gic_distributor_address, int is_secure);
-extern void restore_gic_distributor_shared(u32 *pointer, unsigned gic_distributor_address, int is_secure);
-extern unsigned int gic_get_cur_pending(unsigned gic_interface_address);
-
-extern unsigned int gic_set_processorsleep(bool issleep);
-extern void pm_save_gic_wake_enable(void);
-extern void pm_restore_gic_wake_enable(void);
-/*
- * A9 functions
- */
-extern void save_a9_timers(u32 *pointer, unsigned twd_address);
-extern void save_a9_global_timer(u32 *pointer, unsigned timer_address);
-extern void save_a9_other(u32 *pointer, int is_secure);
-
-extern void restore_a9_timers(u32 *pointer, unsigned twd_address);
-extern void restore_a9_global_timer(u32 *pointer, unsigned timer_address);
-extern void restore_a9_other(u32 *pointer, int is_secure);
-
-
-/*
- * A9 SCU functions
- */
-extern void save_a9_scu(u32 *pointer, unsigned scu_address);
-extern void restore_a9_scu(u32 *pointer, unsigned scu_address);
-extern void set_status_a9_scu(unsigned cpu_index, unsigned status, unsigned scu_address);
-extern int num_cpus_from_a9_scu(unsigned scu_address);
-extern void init_lp_of_scu(unsigned scu_address);
-
-/*
- * pm common functions
- */
-extern void zx_set_wakeup_address(u32 wakeup_addr);
-extern void pm_printk(const char *fmt, ...);
-extern cpu_sleep_type_t pm_get_sleep_type(void);
-extern int zx_get_pll_used(void);
-extern int pm_get_pll_used(void);
-extern u32 pm_get_sleep_time(void);
-extern void pm_init_crm_temp(void);
-extern u64 read_persistent_us(void);
-
-extern void save_a53_sys_timer(u32 *pointer, unsigned timer_address);
-extern void restore_a53_sys_timer(u32 *pointer, unsigned timer_address);
-extern void disable_flush_dcache_L1_flush_cache_L2(void);
-
-/*
- *pm watchdog functions
- */
-#ifdef CONFIG_ZX29_WATCHDOG
-extern void zx_wdt_handle_before_psm(void);
-extern void zx_wdt_handle_after_psm(void);
-#else
-static void zx_wdt_handle_before_psm(void){}
-static void zx_wdt_handle_after_psm(void){}
-#endif
-
-/*
- *pm suspend functions
- */
-extern void zx_suspend_init(void);
-
-/*
- *cpu sleep functions
- */
-extern void cpu_reset_handler(void);
-extern void cpu_wake_up(void);
-extern void do_sleep_cpu(void);
-extern void zx_jump_addr(unsigned long addr);
-extern void waiting_ddr_dfs(unsigned long flag_addr);
-
-/*
- * GCC Compatibility
- */
-#ifndef __ARMCC_VERSION
-#define __nop() __asm__ __volatile__( "nop\n" )
-#endif
-
-#endif /*_ZX_PM_HELPERS_H*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-null.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-null.c
deleted file mode 100644
index 969dddd..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-null.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * ZTE power management main driver
- *
- * Copyright (C) 2013 ZTE Ltd.
- * by zxp
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/io.h>
-#include <linux/suspend.h>
-#include <linux/time.h>
-#include <linux/timer.h>
-#include <linux/delay.h>
-
-unsigned int pm_get_wakesource(void)
-{
- return 0;
-}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-suspend.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-suspend.c
deleted file mode 100644
index 4440927..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-suspend.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * ZTE suspend power management driver
- *
- * Copyright (C) 2013 ZTE Ltd.
- * by zxp
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/suspend.h>
-#include <linux/math64.h>
-
-#include <asm/system_misc.h>
-
-#include "zx-pm.h"
-
-/**************************************
- * SW code for suspend
- **************************************/
-
-/*********************************************************************
- * FUNCTION DEFINATIONS
- ********************************************************************/
-static int zx_suspend_ops_valid(suspend_state_t state)
-{
- return state == PM_SUSPEND_MEM;
-}
-
-static int zx_suspend_ops_begin(suspend_state_t state)
-{
- pm_ram_log("@@@@@@@@@@ Chip_pm_begin @@@@@@@@@@\n");
-
-
- pm_set_wakeup_reason(WR_NONE);
-
- return 0;
-}
-
-static int zx_suspend_ops_prepare(void)
-{
- pm_ram_log("@@@@@@@@@@ Chip_pm_prepare @@@@@@@@@@\n");
-
- return 0;
-}
-
-#define AP_SLEEP_IN_TIMERS IRAM_ADDR_FOR_WAKE_CNT
-#define AP_SLEEP_OUT_TIMERS IRAM_ADDR_FOR_SLEEP_CNT
-
-static int zx_suspend_ops_enter(suspend_state_t state)
-{
- /* legacy log */
- pm_ram_log("@@@@@@@@@@ Chip_pm_enter @@@@@@@@@@\n");
-
- pm_write_reg(AP_SLEEP_IN_TIMERS, (unsigned int)read_persistent_us());
-
-#ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_SUSPEND_STATUS_FLAG,0x1);
-#endif
- /* deal soc/clk/powerdomain/pll out of A9 module
- *¢ssuspend debug uart¡¢GPIO and other device out of A9 */
- zx_board_suspend();
- /*¢close clock&powerdomains that PCU does not controls */
- zx_dpm_suspend();
-
- /*¢mask all and backup, then unmask wakeup interrupts */
- zx_unmask_wakeup_interrupt();
-
- zx_pm_pre_suspend();
-// setup_timer_wakeup(__SLEEP_TIME_1s__*20); //20s
-// setup_timer_wakeup(60); //61us each is 30.5us used ot test abnormal exit from sleep
-
-/*
- if(pm_get_mask_info()&PM_SUSPEND_WFI)
- do_wfi();
- else
-*/
- {
- /*¢cpu enter lowpower mode */
-#ifdef CONFIG_ZX_PM_DEBUG
- // zx_enter_sleep(CPU_SLEEP_TYPE_IDLE_LP2);
- pm_write_reg(AP_SUSPEND_STATUS_FLAG,0x2);
-#endif
- zx_enter_sleep(CPU_SLEEP_TYPE_LP1);
- }
-
- /* get wakeup reason */
- //pm_wake_reason = pm_get_wakeup_reason();
- zx_pm_post_suspend();
-
-#ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_SUSPEND_STATUS_FLAG,0x8);
-#endif
- /* restore interrupt that masked */
- zx_interrupt_mask_restore();
-
- /*¢resume clock&powerdomains */
- zx_dpm_resume();
- /* resume debug uart¡¢GPIO and other device out of A9 */
- zx_board_resume();
-
- pm_write_reg(AP_SLEEP_OUT_TIMERS, (unsigned int)read_persistent_us());
- pm_write_reg(AP_SLEEP_TIME_ADDR,(pm_read_reg(AP_SLEEP_OUT_TIMERS) - pm_read_reg(AP_SLEEP_IN_TIMERS)));
-
- return 0;
-}
-
-static void zx_suspend_ops_finish(void)
-{
- pm_ram_log("@@@@@@@@@@ Chip_pm_finish @@@@@@@@@@\n");
-}
-
-static void zx_suspend_ops_end(void)
-{
- pm_ram_log("@@@@@@@@@@ Chip_pm_end @@@@@@@@@@\n");
-}
-
-static struct platform_suspend_ops zx_suspend_ops = {
- .valid = zx_suspend_ops_valid,
- .begin = zx_suspend_ops_begin,
- .prepare = zx_suspend_ops_prepare,
- .enter = zx_suspend_ops_enter,
- .finish = zx_suspend_ops_finish,
- .end = zx_suspend_ops_end,
-};
-
-void zx_suspend_init(void)
-{
- pr_info("[SLP] Power/SPM_INIT \n");
-
- suspend_set_ops(&zx_suspend_ops);
-
- pm_write_reg(AP_SLEEP_IN_TIMERS, 0);
- pm_write_reg(AP_SLEEP_OUT_TIMERS, 0);
-}
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-v8.S b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-v8.S
deleted file mode 100644
index e51b690..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm-v8.S
+++ /dev/null
@@ -1,1187 +0,0 @@
-/*
- * ZTE CPU low power powerdown and powerup helper code.
- *
- * Copyright (C) 2013 ZTE, Inc.
- * Written by ZXP
- *
- * This program is free software,you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/threads.h>
-#include <asm/asm-offsets.h>
-#include <asm/assembler.h>
-#include <asm/glue-cache.h>
-#include <asm/glue-proc.h>
-#include <asm/vfp.h>
-
-
-/* Aliases for mode encodings - do not change */
-#define MODE_USR 0x10
-#define MODE_FIQ 0x11
-#define MODE_IRQ 0x12
-#define MODE_SVC 0x13
-#define MODE_ABT 0x17
-#define MODE_UND 0x1B
-#define MODE_SYS 0x1F
-
-#define MODE_MON 0x16 /* A-profile (Security Extensions) only */
-#define SCR_NS 0x01 /* A-profile (Security Extensions) only */
-
-#define TTBCR_EAE (1<<31) /* Are we using LPAE? */
-
-#define CACHE_LINE_SIZE 32 /* TODO: remove this */
-#define SCTLR_I (1<<12)
-
-.arm
-
-/*cpu interface */
-ENTRY(save_cpu_if)
- /* mrc p15, 0, r3, c4, c6, 0 ICC PMR ÓÅÏȼ¶ÆÁ±Î¼Ä´æÆ÷*/
- str r3,[r0], #4
- /* mrc p15, 0, r3, c12, c12, 3 BPR1*/
- str r3,[r0], #4
- /* mrc p15, 6, r3, c12, c12, 7 ICC MGRPEN1 */
- str r3,[r0], #4
- /* mrc p15, 0, r3, c12, c12, 7 int group enable reg 1 */
- str r3,[r0], #4
- /* mrc p15, 0, r3, c12, c12, 6 int group enable reg 0 */
- str r3,[r0], #4
- mrc p15, 0, r3, c12, c12, 5 /*ICC_SRE system reg enable */
- str r3,[r0], #4
- mrc p15, 6, r3, c12, c12, 5 /*ICC_MSRE system reg for EL3 */
- str r3,[r0], #4
- mrc p15, 0, r3, c12, c12, 4 /*CTRL*/
- str r3,[r0], #4
- bx lr
-ENDPROC(save_cpu_if)
-
-ENTRY(restore_cpu_if)
- ldr r3,[r0], #4
- mcr p15, 0, r3, c4, c6, 0 /*ICC PMR ÓÅÏȼ¶ÆÁ±Î¼Ä´æÆ÷*/
- ldr r3,[r0], #4
- mcr p15, 0, r3, c12, c12, 3 /*BPR1*/
- ldr r3,[r0], #4
- mcr p15, 6, r0, c12, c12, 7 /* ICC MGRPEN1 */
- ldr r3,[r0], #4
- mcr p15, 0, r0, c12, c12, 7 /* int group enable reg 1 */
- ldr r3,[r0], #4
- mcr p15, 0, r0, c12, c12, 6 /* int group enable reg 0 */
- ldr r3,[r0], #4
- mcr p15, 0, r0, c12, c12, 5 /*ICC_SRE system reg enable */
- ldr r3,[r0], #4
- mcr p15, 6, r0, c12, c12, 5 /*ICC_MSRE system reg for EL3 */
- ldr r3,[r0], #4
- mcr p15, 0, r3, c12, c12, 4 /*CTRL*/
- bx lr
-ENDPROC(restore_cpu_if)
-
-ENTRY(gic_mask) /*cpu int disable*/
- mov r0,#0
- mcr p15, 0, r0, c12, c12, 6 /* ICC_IGRPEN0*/
- mrc p15, 0, r0, c12, c12, 7 /* ICC_IGRPEN1*/
- bic r0, r0, #1
- mcr p15, 0, r0, c12, c12, 7 /* ICC_IGRPEN1*/
- mrc p15, 6, r0, c12, c12, 7 /* ICC MGRPEN1 */
- bic r0, r0, #1
- mcr p15, 6, r0, c12, c12, 7 /* ICC MGRPEN1 */
- bx lr
-ENDPROC(gic_mask)
-
-ENTRY(gic_unmask)
-
-ENDPROC(gic_unmask)
-
-ENTRY(save_performance_monitors)
-
- stmfd sp!, {r4, r8, r9, r10}
-
- /* Ignore:
- * Count Enable Clear Register
- * Software Increment Register
- * Interrupt Enable Clear Register
- */
-
- mrc p15,0,r8,c9,c12,0 /* PMon: Control Register */
- bic r1,r8,#1
- mcr p15,0,r1,c9,c12,0 /* disable counter updates from here */
- isb /* 0b0 => PMCR<0> */
- mrc p15,0,r9,c9,c12,3 /* PMon: Overflow Flag Status Reg */
- mrc p15,0,r10,c9,c12,5 /* PMon: Event Counter Selection Reg */
- stm r0!, {r8-r10}
- ubfx r9,r8,#11,#5 /* extract # of event counters, N */
- tst r9, r9
- beq next_backup
-
-loop_backup:
- subs r9,r9,#1 /* decrement N */
- mcr p15,0,r9,c9,c12,5 /* PMon: select CounterN */
- isb
- mrc p15,0,r3,c9,c13,1 /* PMon: save Event Type register */
- mrc p15,0,r4,c9,c13,2 /* PMon: save Event Counter register */
- stm r0!, {r3,r4}
- bne loop_backup
-
-next_backup:
- mrc p15,0,r1,c9,c13,0 /* PMon: Cycle Count Register */
- mrc p15,0,r2,c9,c14,0 /* PMon: User Enable Register */
- mrc p15,0,r3,c9,c14,1 /* PMon: Interrupt Enable Set Reg */
- mrc p15,0,r4,c9,c12,1 /* PMon: Count Enable Set Register */
- stm r0!, {r1-r4}
-
- ldmfd sp!, {r4, r8, r9, r10}
- bx lr
-ENDPROC(save_performance_monitors)
-
-ENTRY(restore_performance_monitors)
-
- stmfd sp!, {r4-r5, r8-r10, lr}
- /* NOTE: all counters disabled by PMCR<0> == 0 on reset */
-
- /* Restore performance counters */
- ldm r0!,{r8-r10} /* recover first block of PMon context */
- /* (PMCR, PMOVSR, PMSELR) */
- mov r1, #0 /* generate register of all 0's */
- mvn r2, #0 /* generate register of all 1's */
- mcr p15,0,r2,c9,c14,2 /* disable all counter related interrupts */
- mcr p15,0,r2,c9,c12,3 /* clear all overflow flags */
- isb
-
- ubfx r12,r8,#11,#5 /* extract # of event counters, N (0-31) */
- tst r12, r12
- beq 20f
- mov r3, r12 /* for N >0, generate a 2nd copy of N */
- mov r4, #1
- lsl r4, r4, r3
- sub r4, r4, #1 /* set bits<N-1:0> to all 1's */
-
-0:
- subs r3,r3,#1 /* decrement N */
- mcr p15,0,r3,c9,c12,5 /* select Event CounterN */
- isb
- mrc p15,0,r5,c9,c13,1 /* read Event Type register */
- bfc r5,#0,#8
- mcr p15,0,r5,c9,c13,1 /* set Event Type to 0x0 */
- mcr p15,0,r2,c9,c13,2 /* set Event Counter to all 1's */
- isb
- bne 0b
-
- mov r3, #1
- bic r5, r9, #1<<31
- mcr p15,0,r5,c9,c12,1 /* enable Event Counters */
- /* (PMOVSR bits set) */
- mcr p15,0,r3,c9,c12,0 /* set the PMCR global enable bit */
- isb
- mcr p15,0,r9,c9,c12,4 /* set event count overflow bits */
- isb
- mcr p15,0,r4,c9,c12,2 /* disable Event Counters */
-
- /* restore the event counters */
-10:
- subs r12,r12,#1 /* decrement N */
- mcr p15,0,r12,c9,c12,5 /* select Event CounterN */
- isb
- ldm r0!,{r3-r4}
- mcr p15,0,r3,c9,c13,1 /* restore Event Type */
- mcr p15,0,r4,c9,c13,2 /* restore Event Counter */
- isb
- bne 10b
-
-20:
- tst r9, #0x80000000 /* check for cycle count overflow flag */
- beq 40f
- mcr p15,0,r2,c9,c13,0 /* set Cycle Counter to all 1's */
- isb
- mov r3, #0x80000000
- mcr p15,0,r3,c9,c12,1 /* enable the Cycle Counter */
- isb
-
-30:
- mrc p15,0,r4,c9,c12,3 /* check cycle count overflow now set */
- movs r4,r4 /* test bit<31> */
- bpl 30b
- mcr p15,0,r3,c9,c12,2 /* disable the Cycle Counter */
-
-40:
- mcr p15,0,r1,c9,c12,0 /* clear the PMCR global enable bit */
- isb
-
- /* restore the remaining PMon registers */
- ldm r0!,{r1-r4}
- mcr p15,0,r1,c9,c13,0 /* restore Cycle Count Register */
- mcr p15,0,r2,c9,c14,0 /* restore User Enable Register */
- mcr p15,0,r3,c9,c14,1 /* restore Interrupt Enable Set Reg */
- mcr p15,0,r4,c9,c12,1 /* restore Count Enable Set Register */
- mcr p15,0,r10,c9,c12,5 /* restore Event Counter Selection */
- isb
- mcr p15,0,r8,c9,c12,0 /* restore the PM Control Register */
- isb
-
- ldmfd sp!, {r4-r5, r8-r10, pc}
-ENDPROC(restore_performance_monitors)
-
-
-
-ENTRY(save_banked_registers)
- mrs r2, CPSR /* save current mode */
- cps #MODE_SYS /* switch to System mode */
- str sp,[r0], #4 /* save the User SP */
- str lr,[r0], #4 /* save the User LR */
- cps #MODE_ABT /* switch to Abort mode */
- str sp,[r0], #4 /* save the current SP */
- mrs r3,SPSR
- stm r0!,{r3,lr} /* save the current SPSR, LR */
- cps #MODE_UND /* switch to Undefined mode */
- str sp,[r0], #4 /* save the current SP */
- mrs r3,SPSR
- stm r0!,{r3,lr} /* save the current SPSR, LR */
- cps #MODE_IRQ /* switch to IRQ mode */
- str sp,[r0], #4 /* save the current SP */
- mrs r3,SPSR
- stm r0!,{r3,lr} /* save the current SPSR, LR */
- cps #MODE_FIQ /* switch to FIQ mode */
- str SP,[r0], #4 /* save the current SP */
- mrs r3,SPSR
- stm r0!,{r3,r8-r12,lr} /* save the current SPSR,r8-r12,LR */
- msr CPSR_cxsf, r2 /* switch back to original mode */
-
- bx lr
-ENDPROC(save_banked_registers)
-
-ENTRY(restore_banked_registers)
- mrs r2, CPSR /* save current mode */
- cps #MODE_SYS /* switch to System mode */
- ldr sp,[r0],#4 /* restore the User SP */
- ldr lr,[r0],#4 /* restore the User LR */
- cps #MODE_ABT /* switch to Abort mode */
- ldr sp,[r0],#4 /* restore the current SP */
- ldm r0!,{r3,lr} /* restore the current LR */
- msr SPSR_fsxc,r3 /* restore the current SPSR */
- cps #MODE_UND /* switch to Undefined mode */
- ldr sp,[r0],#4 /* restore the current SP */
- ldm r0!,{r3,lr} /* restore the current LR */
- msr SPSR_fsxc,r3 /* restore the current SPSR */
- cps #MODE_IRQ /* switch to IRQ mode */
- ldr sp,[r0],#4 /* restore the current SP */
- ldm r0!,{r3,lr} /* restore the current LR */
- msr SPSR_fsxc,r3 /* restore the current SPSR */
- cps #MODE_FIQ /* switch to FIQ mode */
- ldr sp,[r0],#4 /* restore the current SP */
- ldm r0!,{r3,r8-r12,lr} /* restore the current r8-r12,LR */
- msr SPSR_fsxc,r3 /* restore the current SPSR */
- msr CPSR_cxsf, r2 /* switch back to original mode */
-
-//0
- bx lr
-ENDPROC(restore_banked_registers)
-
-
-
-ENTRY(save_cp15)
- /* CSSELR Cache Size Selection Register */
- mrc p15,2,r3,c0,c0,0
- str r3,[r0], #4
-
- /* IMPLEMENTATION DEFINED - proprietary features:
- * (CP15 register 15, TCM support, lockdown support, etc.)
- */
-
- /* NOTE: IMP DEF registers might have save and restore order that relate
- * to other CP15 registers or logical grouping requirements and can
- * therefore occur at any point in this sequence.
- */
- bx lr
-ENDPROC(save_cp15)
-
-ENTRY(restore_cp15)
- /* CSSELR ?Cache Size Selection Register */
- ldr r3,[r0], #4
- mcr p15,2,r3,c0,c0,0
- bx lr
-ENDPROC(restore_cp15)
-
-
- /* Function called with two arguments:
- * r0 contains address to store control registers
- * r1 is non-zero if we are Secure
- */
-ENTRY(save_control_registers)
- cmp r1, #0 /* Are we Secure? */
- mrc p15,0,r2,c1,c0,1 /* ACTLR - Auxiliary Control Register */
- mrc p15,0,r3,c1,c0,0 /* SCTLR - System Control Register */
- mrc p15,0,r12,c1,c0,2 /* CPACR - Coprocessor Access Control Register */
- stm r0!, {r2-r3, r12}
-#if 0
- mrcne p15,0,r1,c12,c0,1 /* MVBAR - Monitor Vector Base Address Register */
- mrcne p15,0,r2,c1,c1,0 /* Secure Configuration Register */
- mrcne p15,0,r3,c1,c1,1 /* Secure Debug Enable Register */
- mrcne p15,0,r12,c1,c1,2 /* Non-Secure Access Control Register */
- stmne r0!, {r1-r3,r12}
-
- mrc p14,6,r1,c0,c0,0 /* TEECR */
- mrc p14,6,r2,c1,c0,0 /* TEEHBR */
- mrc p14,7,r3,c1,c0,0 /* JOSCR */
- mrc p14,7,r12,c2,c0,0 /* JMCR */
- stm r0!, {r1-r3,r12}
-#else
- mrc p15,0,r1,c5,c0,0 /* ifsr */
- mrc p15,0,r2,c6,c0,0 /* dfar */
- mrc p15,0,r3,c6,c0,2 /* ifar */
- mrc p15,0,r12,c5,c1,0 /* adfsr */
- stm r0!, {r1-r3, r12}
-
- mrc p15,0,r1,c5,c1,1 /* aifsr */
- mrc p15,1,r12,c15,c0,0 /* l2actrl */
- stm r0!, {r1,r12}
-#endif
-
- bx lr
-ENDPROC(save_control_registers)
-
-
- /* Function called with two arguments:
- * r0 contains address to read control registers
- * r1 is non-zero if we are Secure
- */
-ENTRY(restore_control_registers)
- cmp r1, #0 /* Are we Secure? */
- ldm r0!, {r2-r3, r12}
- mcr p15,0,r2,c1,c0,1 /* ACTLR - Auxiliary Control Register */
- mcr p15,0,r3,c1,c0,0 /* SCTLR - System Control Register */
- mcr p15,0,r12,c1,c0,2 /* CPACR - Coprocessor Access Control Register */
-
- #if 0
- ldmne r0!, {r1-r3,r12}
- mcrne p15,0,r1,c12,c0,1 /* MVBAR - Monitor Vector Base Address Register */
- mcrne p15,0,r2,c1,c1,0 /* Secure Configuration Register */
- mcrne p15,0,r3,c1,c1,1 /* Secure Debug Enable Register */
- mcrne p15,0,r12,c1,c1,2 /* Non-Secure Access Control Register */
-
- ldm r0!, {r1-r3,r12}
- mcr p14,6,r1,c0,c0,0 /* TEECR */
- mcr p14,6,r2,c1,c0,0 /* TEEHBR */
- mcr p14,7,r3,c1,c0,0 /* JOSCR */
- mcr p14,7,r12,c2,c0,0 /* JMCR */
- #else
- ldm r0!, {r1-r3, r12}
- mcr p15,0,r1,c5,c0,0 /* ifsr */
- mcr p15,0,r2,c6,c0,0 /* dfar */
- mcr p15,0,r3,c6,c0,2 /* ifar */
- mcr p15,0,r12,c5,c1,0 /* adfsr */
-
- ldm r0!, {r1, r12}
- mcr p15,0,r1,c5,c1,1 /* aifsr */
-// mcr p15,1,r12,c15,c0,0 /* l2actrl */
- #endif
- isb
- bx lr
-ENDPROC(restore_control_registers)
-
-ENTRY(save_mmu)
- stmfd sp!, {r4, r5, r6, r7}
- /* ASSUMPTION: no useful fault address / fault status information*/
-
- mrc p15,0,r4,c12,c0,0 /* VBAR */
- mrc p15,0,r5,c2,c0,2 /* TTBCR */
-
- tst r5, #TTBCR_EAE /* Are we using LPAE? */
-
- /* save 32 or 64 bit TTBRs */
- mrceq p15,0,r6,c2,c0,0 /* 32 bit TTBR0 */
- mrceq p15,0,r7,c2,c0,1 /* 32 bit TTBR1 */
- #if 0
- mrrcne p15,0,r6,r7,c2 /* 64 bit TTBR0 */
- #endif
- stm r0!, {r4-r7}
- #if 0
- mrrcne p15,1,r6,r7,c2 /* 64 bit TTBR1 */
- stmne r0!, {r6-r7}
- #endif
- mrc p15,0,r4,c3,c0,0 /* DACR */
- mrc p15,0,r5,c7,c4,0 /* PAR */
- mrc p15,0,r6,c10,c2,0 /* PRRR/mair0*/
- mrc p15,0,r7,c10,c2,1 /* NMRR/mair1 */
- stm r0!, {r4-r7}
-
- /* TODO: IMPLEMENTATION DEFINED - TCM, lockdown and performance monitor support
- * CP15 registers 9 and 11
- */
-
- mrc p15,0,r4,c13,c0,1 /* CONTEXTIDR */
- mrc p15,0,r5,c13,c0,2 /* TPIDRURW */
- mrc p15,0,r6,c13,c0,3 /* TPIDRURO */
- mrc p15,0,r7,c13,c0,4 /* TPIDRPRW */
- stm r0!, {r4-r7}
-
- mrc p15,0,r4,c10,c3,0 /* amair */
- mrc p15,0,r5,c10,c3,1 /* amair */
- mrc p15,0,r6,c2,c0,2 /* ttbcr */
- stm r0!, {r4-r6}
-
- ldmfd sp!, {r4, r5, r6, r7}
- bx lr
-ENDPROC(save_mmu)
-
-ENTRY(restore_mmu)
-
- stmfd sp!, {r4, r5, r6, r7}
- ldm r0!, {r4-r7}
- mcr p15,0,r4,c12,c0,0 /* VBAR */
- mcr p15,0,r5,c2,c0,2 /* TTBCR */
-
- tst r5, #TTBCR_EAE /* Are we using LPAE? */
-
- /* restore 32 or 64 bit TTBRs */
- mcreq p15,0,r6,c2,c0,0 /* 32 bit TTBR0 */
- mcreq p15,0,r7,c2,c0,1 /* 32 bit TTBR1 */
- #if 0
- mcrrne p15,0,r6,r7,c2 /* 64-bit TTBR0 */
- ldmne r0!, {r6-r7}
- mcrrne p15,1,r6,r7,c2 /* 64-bit TTBR1 */
- #endif
- ldm r0!, {r4-r7}
- mcr p15,0,r4,c3,c0,0 /* DACR */
- mcr p15,0,r5,c7,c4,0 /* PAR */
- mcr p15,0,r6,c10,c2,0 /* PRRR */
- mcr p15,0,r7,c10,c2,1 /* NMRR */
-
- /* TODO: IMPLEMENTATION DEFINED - TCM, lockdown and performance monitor support
- * CP15 registers 9 and 11
- */
-
- ldm r0!, {r4-r7}
- mcr p15,0,r4,c13,c0,1 /* CONTEXTIDR */
- mcr p15,0,r5,c13,c0,2 /* TPIDRURW */
- mcr p15,0,r6,c13,c0,3 /* TPIDRURO */
- mcr p15,0,r7,c13,c0,4 /* TPIDRPRW */
-
- ldm r0!, {r4-r6}
- mcr p15,0,r4,c10,c3,0 /* amair */
- mcr p15,0,r5,c10,c3,1 /* amair */
- mcr p15,0,r6,c2,c0,2 /* ttbcr */
-
- ldmfd sp!, {r4, r5, r6, r7}
-
- bx lr
-ENDPROC(restore_mmu)
-
-#if 0
-ENTRY(save_vfp)
- /* FPU state save/restore.
- * FPSID,MVFR0 and MVFR1 don't get serialized/saved (Read Only).
- */
- mrc p15,0,r3,c1,c0,2 /* CPACR allows CP10 and CP11 access */
- ORR r2,r3,#0xF00000
- mcr p15,0,r2,c1,c0,2
- isb
- mrc p15,0,r2,c1,c0,2
- and r2,r2,#0xF00000
- cmp r2,#0xF00000
- beq f0
- movs r2, #0
- b f2
-
-0:
- /* Save configuration registers and enable. */
- vmrs r12,FPEXC
- str r12,[r0],#4 /* Save the FPEXC */
- /* Enable FPU access to save/restore the other registers. */
- ldr r2,=0x40000000
- vmsr FPEXC,r2
- vmrs r2,FPSCR
- str r2,[r0],#4 /* Save the FPSCR */
- /* Store the VFP-D16 registers. */
- vstm r0!, {D0-D15}
- /* Check for Advanced SIMD/VFP-D32 support */
- vmrs r2,MVFR0
- and r2,r2,#0xF /* extract the A_SIMD bitfield */
- cmp r2, #0x2
- blt f1
- /* Store the Advanced SIMD/VFP-D32 additional registers. */
- vstm r0!, {D16-D31}
-
- /* IMPLEMENTATION DEFINED: save any subarchitecture defined state
- * NOTE: Don't change the order of the FPEXC and CPACR restores
- */
-1:
- vmsr FPEXC,r12 /* Restore the original En bit of FPU. */
-2:
- mcr p15,0,r3,c1,c0,2 /* Restore the original CPACR value. */
- bx lr
-ENDPROC(save_vfp)
-
-
-restore_vfp FUNCTION
- /* FPU state save/restore. Obviously FPSID,MVFR0 and MVFR1 don't get
- * serialized (RO).
- * Modify CPACR to allow CP10 and CP11 access
- */
- mrc p15,0,r1,c1,c0,2
- ORR r2,r1,#0x00F00000
- mcr p15,0,r2,c1,c0,2
- /* Enable FPU access to save/restore the rest of registers. */
- ldr r2,=0x40000000
- vmsr FPEXC, r2
- /* Recover FPEXC and FPSCR. These will be restored later. */
- ldm r0!,{r3,r12}
- /* Restore the VFP-D16 registers. */
- vldm r0!, {D0-D15}
- /* Check for Advanced SIMD/VFP-D32 support */
- vmrs r2, MVFR0
- and r2,r2,#0xF /* extract the A_SIMD bitfield */
- cmp r2, #0x2
- blt f0
-
- /* Store the Advanced SIMD/VFP-D32 additional registers. */
- vldm r0!, {D16-D31}
-
- /* IMPLEMENTATION DEFINED: restore any subarchitecture defined state */
-
-0 /* Restore configuration registers and enable.
- * Restore FPSCR _before_ FPEXC since FPEXC could disable FPU
- * and make setting FPSCR unpredictable.
- */
- vmsr FPSCR,r12
- vmsr FPEXC,r3 /* Restore FPEXC after FPSCR */
- /* Restore CPACR */
- mcr p15,0,r1,c1,c0,2
- bx lr
- ENDFUNC
-#endif
-
-ENTRY(save_vfp)
-#if 0 //zxp
-
- /* FPU state save/restore. */
- /* FPSID,MVFR0 and MVFR1 don't get serialized/saved (Read Only). */
- mrc p15,0,r3,c1,c0,2 /* CPACR allows CP10 and CP11 access */
- ORR r2,r3,#0xF00000
- mcr p15,0,r2,c1,c0,2
- isb
- mrc p15,0,r2,c1,c0,2
- and r2,r2,#0xF00000
- cmp r2,#0xF00000
- beq 0f
- movs r2, #0
- b 2f
-
- /* Save configuration registers and enable. */
-0:
- FMRX r12,FPEXC /* vmrs r12,FPEXC */
- str r12,[r0],#4 /* Save the FPEXC */
- /* Enable FPU access to save/restore the other registers. */
- ldr r2,=0x40000000
- FMXR FPEXC,r2 /* vmsr FPEXC,r2 */
- FMRX r2,FPSCR /* vmrs r2,FPSCR */
- str r2,[r0],#4 /* Save the FPSCR */
- /* Store the VFP-D16 registers. */
- vstm r0!, {D0-D15}
- /* Check for Advanced SIMD/VFP-D32 support */
- FMRX r2,MVFR0 /* vmrs r2,MVFR0 */
- and r2,r2,#0xF /* extract the A_SIMD bitfield */
- cmp r2, #0x2
- blt 1f
- /* Store the Advanced SIMD/VFP-D32 additional registers. */
- vstm r0!, {D16-D31}
-
- /* IMPLEMENTATION DEFINED: save any subarchitecture defined state */
- /* NOTE: Don't change the order of the FPEXC and CPACR restores */
-
- /* Restore the original En bit of FPU. */
-1:
- FMXR FPEXC,r12 /* vmsr FPEXC,r12 */
-
- /* Restore the original CPACR value. */
-2:
- mcr p15,0,r3,c1,c0,2
-#endif
- bx lr
-ENDPROC(save_vfp)
-
-
-ENTRY(restore_vfp)
- /* FPU state save/restore. Obviously FPSID,MVFR0 and MVFR1 don't get
- * serialized (RO).
- * Modify CPACR to allow CP10 and CP11 access
- */
-#if 0 //zxp
- mrc p15,0,r1,c1,c0,2
- ORR r2,r1,#0x00F00000
- mcr p15,0,r2,c1,c0,2
- /* Enable FPU access to save/restore the rest of registers. */
- ldr r2,=0x40000000
- FMXR FPEXC, r2 /* vmsr FPEXC, r2 */
- /* Recover FPEXC and FPSCR. These will be restored later. */
- ldm r0!,{r3,r12}
- /* Restore the VFP-D16 registers. */
- vldm r0!, {D0-D15}
- /* Check for Advanced SIMD/VFP-D32 support */
- FMRX r2, MVFR0 /* vmrs r2, MVFR0 */
- and r2,r2,#0xF /* extract the A_SIMD bitfield */
- cmp r2, #0x2
- blt 0f
-
- /* Store the Advanced SIMD/VFP-D32 additional registers. */
- vldm r0!, {D16-D31}
-
- /* IMPLEMENTATION DEFINED: restore any subarchitecture defined state */
-0:
- /* Restore configuration registers and enable.
- * Restore FPSCR _before_ FPEXC since FPEXC could disable FPU
- * and make setting FPSCR unpredictable.
- */
- FMXR FPSCR,r12 /* vmsr FPSCR,r12 */
- /* Restore FPEXC after FPSCR */
- FMXR FPEXC,r3 /* vmsr FPEXC,r3 */
- /* Restore CPACR */
- /* will restore in mt_restore_control_registers */
- /* mcr p15,0,r1,c1,c0,2 */
-#endif
- bx lr
-ENDPROC(restore_vfp)
-
-
- /* We assume that the OS is not using the Virtualization extensions,
- * and that the warm boot code will set up CNTHCTL correctly.
- * CNTP_CVAL will be preserved as it is in the always-on domain.
- */
-#if 0
-ENTRY(save_generic_timer)
- mrc p15,0,r2,c14,c2,1 /* read CNTP_CTL */
- mrc p15,0,r3,c14,c2,0 /* read CNTP_TVAL */
- mrc p15,0,r12,c14,c1,0 /* read CNTKCTL */
- stm r0!, {r2, r3, r12}
- bx lr
-ENDPROC(save_generic_timer)
-
-
-ENTRY(restore_generic_timer)
- ldm r0!, {r2, r3, r12}
- mcr p15,0,r3,c14,c2,0 /* write CNTP_TVAL */
- mcr p15,0,r12,c14,c1,0 /* write CNTKCTL */
- mcr p15,0,r2,c14,c2,1 /* write CNTP_CTL */
- bx lr
-ENDPROC(restore_generic_timer)
-#endif
-
-
- /* This function disables L1 data caching, then cleans and invalidates
- the whole L1 data cache.
- */
-
-ENTRY(disable_clean_inv_dcache_v7_l1)
- stmfd sp!, {r4, lr}
-
- /* Disable L1 cache */
- dsb
- mrc p15,0,r3,c1,c0,0
- bic r3, #4 /* Clear C bit */
- mcr p15,0,r3,c1,c0,0
- dsb
-
- /* No more Data cache allocations can happen at L1.
- Until we finish cleaning the Inner cache, any accesses to dirty data
- (e.g. by translation table walks) may get the wrong (Outer) data, so
- we have to be sure everything that might be accessed is clean.
- We already know that the translation tables are clean (see late_init).
- */
-
- mov r0, #0 /* Select L1 Data/Unified cache */
- mcr p15,2,r0,c0,c0,0
- mrc p15,1,r0,c0,c0,0 /* Read size */
- ubfx r3, r0, #13, #15 /* sets - 1 */
- add r3, r3, #1 /* sets */
- ubfx r4, r0, #0, #3 /* log2(words per line) - 2 */
- add r4, r4, #4 /* set shift = log2(bytes per line) */
- ubfx r2, r0, #3, #10 /* ways - 1 */
- clz r12, r2 /* way shift */
- add r2, r2, #1 /* ways */
-
- /* r2,r3 inner, outer loop targets, r1 inner loop counter, r0 zero */
-5:
- cmp r3, #0
- beq 20f
- sub r3, r3, #1
- mov r1, r2
-
-10:
- cmp r1, #0
- beq 5b
- sub r1, r1, #1
- mov r0, r1, lsl r12 /* Fill in Way field */
- orr r0, r0, r3, lsl r4 /* Fill in Set field */
- mcr p15,0,r0,c7,c14,2 /* DCCISW */
- b 10b
-
-20:
- dsb
- ldmfd sp!, {r4, lr}
- bx lr
-ENDPROC(disable_clean_inv_dcache_v7_l1)
-
-
-ENTRY(invalidate_icache_v7_pou)
- mov r0, #0
- mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */
- bx lr
-ENDPROC(invalidate_icache_v7_pou)
-
-
-ENTRY(invalidate_icache_v7)
- mov r0, #0
- mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */
- bx lr
-ENDPROC(invalidate_icache_v7)
-
-
-ENTRY(enable_icache_v7)
- mrc p15, 0, r0, c1, c0, 0 //enable Icache
- movw r1, #SCTLR_I
- orr r0, r0, r1
- mcr p15, 0, r0, c1, c0, 0
-ENDPROC(enable_icache_v7)
-
-
-ENTRY(invalidate_dcache_v7_all)
- /* Must iterate over the caches in order to synthesise a complete invalidation
- of data/unified cache
- */
-//zxp stmfd sp!, {r4-r11} /* zxp delete for no sp to use */
- mrc p15, 1, r0, c0, c0, 1 /* read clidr */
- ands r3, r0, #0x7000000 /* extract loc from clidr */
- mov r3, r3, lsr #23 /* left align loc bit field */
- beq finished /* if loc is 0, then no need to clean */
- mov r10, #0 /* start clean at cache level 0 (in r10) */
-loop1:
- add r2, r10, r10, lsr #1 /* work out 3x current cache level */
- mov r12, r0, lsr r2 /* extract cache type bits from clidr */
- and r12, r12, #7 /* mask of bits for current cache only */
- cmp r12, #2 /* see what cache we have at this level */
- blt skip /* skip if no cache, or just i-cache */
- mcr p15, 2, r10, c0, c0, 0 /* select current cache level in cssr */
- mov r12, #0
- mcr p15, 0, r12, c7, c5, 4 /* prefetchflush to sync new cssr&csidr */
- mrc p15, 1, r12, c0, c0, 0 /* read the new csidr */
- and r2, r12, #7 /* extract the length of the cache lines */
- add r2, r2, #4 /* add 4 (line length offset) */
- ldr r6, =0x3ff
- ands r6, r6, r12, lsr #3 /* find maximum number on the way size */
- clz r5, r6 /* find bit pos of way size increment */
- ldr r7, =0x7fff
- ands r7, r7, r12, lsr #13 /* extract max number of the index size */
-loop2:
- mov r8, r6 /* create working copy of max way size */
-loop3:
- orr r11, r10, r8, lsl r5 /* factor way and cache number into r11 */
- orr r11, r11, r7, lsl r2 /* factor index number into r11 */
- mcr p15, 0, r11, c7, c6, 2 /* invalidate by set/way */
- subs r8, r8, #1 /* decrement the way */
- bge loop3
- subs r7, r7, #1 /* decrement the index */
- bge loop2
-skip:
- add r10, r10, #2 /* increment cache number */
- cmp r3, r10
- bgt loop1
-finished:
- mov r10, #0
-
- mcr p15, 0, r10, c7, c10, 4 /* drain write buffer */
- mcr p15, 0, r10, c8, c7, 0 /* invalidate I + D TLBs */
- mcr p15, 0, r10, c2, c0, 2 /* TTB control register */
-//zxp ldmfd sp!, {r4-r11}
- bx lr
-ENDPROC(invalidate_dcache_v7_all)
-
-
-ENTRY(disable_clean_inv_dcache_v7_all)
- /* Must iterate over the caches in order to synthesise a complete clean
- of data/unified cache */
- stmfd sp!, {r4-r11}
-
- /* Disable integrated data/unified cache */
- dsb
- mrc p15, 0, r3, c1, c0, 0
- bic r3, #4 /* Clear C bit */
- mcr p15, 0, r3, c1, c0, 0
- isb
-
- /* No more Data cache allocations can happen.
- Until we finish cleaning the cache, any accesses to dirty data
- (e.g. by translation table walks) may get the wrong (Outer) data, so
- we have to be sure everything that might be accessed is clean.
- We already know that the translation tables are clean (see late_init).
- */
-
-
- mrc p15, 1, r0, c0, c0, 1 /* read clidr */
- ands r3, r0, #0x7000000 /* extract loc from clidr */
- mov r3, r3, lsr #23 /* left align loc bit field */
- beq 50f /* if loc is 0, then no need to clean */
- mov r10, #0 /* start clean at cache level 0 (in r10) */
-10:
- add r2, r10, r10, lsr #1 /* work out 3x current cache level */
- mov r12, r0, lsr r2 /* extract cache type bits from clidr */
- and r12, r12, #7 /* mask of bits for current cache only */
- cmp r12, #2 /* see what cache we have at this level */
- blt 40f /* skip if no cache, or just i-cache */
- mcr p15, 2, r10, c0, c0, 0 /* select current cache level in cssr */
- mov r12, #0
- mcr p15, 0, r12, c7, c5, 4 /* prefetchflush to sync new cssr&csidr */
- mrc p15, 1, r12, c0, c0, 0 /* read the new csidr */
- and r2, r12, #7 /* extract the length of the cache lines */
- add r2, r2, #4 /* add 4 (line length offset) */
- ldr r6, =0x3ff
- ands r6, r6, r12, lsr #3 /* find maximum number on the way size */
- clz r5, r6 /* find bit pos of way size increment */
- ldr r7, =0x7fff
- ands r7, r7, r12, lsr #13 /* extract max number of the index size */
-20:
- mov r8, r6 /* create working copy of max way size */
-30:
- orr r11, r10, r8, lsl r5 /* factor way and cache number into r11 */
- orr r11, r11, r7, lsl r2 /* factor index number into r11 */
- mcr p15, 0, r11, c7, c14, 2 /* clean & invalidate by set/way */
- subs r8, r8, #1 /* decrement the way */
- bge 30b
- subs r7, r7, #1 /* decrement the index */
- bge 20b
-40:
- add r10, r10, #2 /* increment cache number */
- cmp r3, r10
- bgt 10b
-50:
- mov r10, #0
- mcr p15, 0, r10, c7, c10, 4 /* drain write buffer */
- ldmfd sp!, {r4-r11}
- bx lr
-ENDPROC(disable_clean_inv_dcache_v7_all)
-
-
- /* This function cleans the whole L1 data cache */
-ENTRY(clean_dcache_v7_l1)
- stmfd sp!, {r4, lr}
-
- mov r0, #0 /* Select L1 Data/Unified cache */
- mcr p15,2,r0,c0,c0,0
- mrc p15,1,r0,c0,c0,0 /* Read size (CCSIDR) */
- ubfx r3, r0, #13, #15 /* sets - 1 */
- add r3, r3, #1 /* sets */
- ubfx r4, r0, #0, #3 /* log2(words per line) - 2 */
- add r4, r4, #4 /* set shift = log2(bytes per line) */
- ubfx r2, r0, #3, #10 /* ways - 1 */
- clz r12, r2 /* way shift */
- add r2, r2, #1 /* ways */
-
- /* r2,r3 inner, outer loop targets, r1 inner loop counter, r0 zero */
-0:
- cmp r3, #0
- beq 20f
- sub r3, r3, #1
- mov r1, r2
-
-10:
- cmp r1, #0
- beq 0b
- sub r1, r1, #1
- mov r0, r1, lsl r12 /* Fill in Way field */
- orr r0, r0, r3, lsl r4 /* Fill in Set field */
- mcr p15,0,r0,c7,c10,2 /* DCCSW */
- b 10b
-
-20:
- dsb
- pop {r4, lr}
- bx lr
-ENDPROC(clean_dcache_v7_l1)
-
-#if 0 //zxp
- /* This function cleans a single line from the L1 dcache */
-clean_mva_dcache_v7_l1
- mcr p15,0,r0,c7,c10,1 /* DCCMVAC */
- bx lr
-
-enter_secure_monitor_mode FUNCTION
- mov r0, lr
- mov r1, sp
- smc #0
-appf_smc_handler
- /* We are now in Monitor mode, make sure we're Secure */
- mrc p15, 0, r12, c1, c1, 0
- bic r12, #SCR_NS
- mcr p15, 0, r12, c1, c1, 0
- /* Restore sp and return - stack must be uncached or in NS memory! */
- mov sp, r1
- bx r0
- ENDFUNC
-
-enter_nonsecure_svc_mode FUNCTION
- /* Copy the Monitor mode sp and lr values */
- mov r2, lr
- mov r3, sp
- mrc p15, 0, r1, c1, c1, 0
- orr r1, #SCR_NS
- mcr p15, 0, r1, c1, c1, 0
- adr lr, non_secure
- movs pc, lr
-non_secure
- /* We are now in non-secure state */
- /* Restore sp and return */
- mov sp, r3
- bx r2
- ENDFUNC
-#endif
-
-ENTRY(save_a53_other)
-#if 0//A53ûÓÐ
- mrc p15,0,r12,c15,c0,0 /* Read Power Control Register */
- str r12, [r0], #4
- mrc p15, 4, r12, c15, c0, 0 /* Read Configuration Base Address Register */
- str r12, [r0], #4
-
- mrc p15,0,r3,c0,c0,0 /* Read Main ID Register */
- ubfx r3, r3, #20, #4 /* Extract major version number */
- cmp r3, #2
- blt 1f /* PLE only possible in r2p0 onwards */
- mrc p15,0,r3,c11,c0,0 /* Read PLE IDR */
- cmp r3, #0
- beq 1f /* No PLE present */
-
- mrc p15,0,r3,c11,c1,0 /* Read PLE UAR */
- mrc p15,0,r12,c11,c1,1 /* Read PLE PCR */
- stm r0!, {r3, r12}
-
-1:
- bx lr
-#else
-
-#endif
-ENDPROC(save_a53_other)
-
-
-ENTRY(restore_a53_other)
-#if 0
- cmp r1, #0 /* Check we are secure */
- ldr r12, [r0], #4
- andne r12, r12, #0x01 /* We only restore the Dynamic Clock gating bit */
- mcrne p15,0,r12,c15,c0,0 /* Write Power Control Register (if secure) */
- ldr r12, [r0], #4
- mcrne p15, 4, r12, c15, c0, 0 /* Write Configuration Base Address Register (if Secure) */
-
- mrc p15,0,r3,c0,c0,0 /* Read Main ID Register */
- ubfx r3, r3, #20, #4 /* Extract major version number */
- cmp r3, #2
- blt 1f /* PLE only possible in r2p0 onwards */
- mrc p15,0,r3,c11,c0,0 /* Read PLE IDR */
- cmp r3, #0
- beq 1f /* No PLE present */
-
- ldm r0!, {r3, r12}
- mcr p15,0,r3,c11,c1,0 /* Write PLE UAR */
- mcr p15,0,r12,c11,c1,1 /* Write PLE PCR */
-
-1:
- bx lr
-#else
-#endif
-ENDPROC(restore_a53_other)
-
-
-.equ C1_IBIT , 0x00001000
-.equ C1_CBIT , 0x00000004
-ENTRY(disable_flush_dcache_L1_flush_cache_L2)
-/******************************************************************************* *
-push stack push {r0,r1,r2,r3,r4,r5,r7,r9,r10,r11,r14}
-* ******************************************************************************/
-
- stmfd sp!, {r4,r5,r6,r7,r8, r9, r10,r11,lr}
-/*******************************************************************************
-*__disable_dcache
-* ******************************************************************************/
- MRC p15,0,r0,c1,c0,0
- BIC r0,r0,#C1_CBIT
- dsb
- MCR p15,0,r0,c1,c0,0
- dsb
- isb
-/*Erratum:794322,An instruction fetch can be allocated into the L2 cache after the cache is disabled Status
-This erratum can be avoided by inserting both of the following after the SCTLR.C bit is cleared to 0, and before the caches are cleaned or invalidated:
-1) A TLBIMVA operation to any address.
-2) A DSB instruction.*/
- MCR p15,0,r0,c8,c7,1
- dsb
- isb
-/*******************************************************************************
-* __inner_flush_dcache_L1
-* ******************************************************************************/
- dmb /*@ ensure ordering with previous memory accesses */
- mrc p15, 1, r0, c0, c0, 1 /* @ read clidr */
- ands r3, r0, #0x7000000 /* @ extract loc from clidr */
- mov r3, r3, lsr #23 /* @ left align loc bit field */
- beq DF1F2_L1_finished /* @ if loc is 0, then no need to clean */
- mov r10, #0 /* @ start clean at cache level 1 */
-DF1F2_L1_loop1:
- add r2, r10, r10, lsr #1 /* @ work out 3x current cache level */
- mov r1, r0, lsr r2 /* @ extract cache type bits from clidr */
- and r1, r1, #7 /* @ mask of the bits for current cache only */
- cmp r1, #2 /* @ see what cache we have at this level */
- blt DF1F2_L1_skip /* @ skip if no cache, or just i-cache */
- mcr p15, 2, r10, c0, c0, 0 /* @ select current cache level in cssr */
- isb /* @ isb to sych the new cssr&csidr */
- mrc p15, 1, r1, c0, c0, 0 /* @ read the new csidr */
- and r2, r1, #7 /* @ extract the length of the cache lines */
- add r2, r2, #4 /* @ add 4 (line length offset) */
- ldr r4, =0x3ff
- ands r4, r4, r1, lsr #3 /* @ find maximum number on the way size */
- clz r5, r4 /* @ find bit position of way size increment */
- ldr r7, =0x7fff
- ands r7, r7, r1, lsr #13 /* @ extract max number of the index size */
-DF1F2_L1_loop2:
- mov r9, r4 /* @ create working copy of max way size */
-DF1F2_L1_loop3:
- orr r11, r10, r9, lsl r5 /* @ factor way and cache number into r11 */
- orr r11, r11, r7, lsl r2 /* @ factor index number into r11*/
-#if 1
- mcr p15, 0, r11, c7, c10, 2 /* @ clean by set/way */
- mcr p15, 0, r11, c7, c6, 2 /* @ invalidate by set/way*/
-#endif
-#if 0
- mcr p15, 0, r11, c7, c14, 2 /* @ clean & invalidate by set/way*/
-#endif
- subs r9, r9, #1 /* @ decrement the way */
- bge DF1F2_L1_loop3
- subs r7, r7, #1 /* @ decrement the index */
- bge DF1F2_L1_loop2
-DF1F2_L1_skip:
- /* @add r10, r10, #2 */ /* @ increment cache number */
- /*@cmp r3, r10
- @bgt DF1F2_L1_loop1*/
-DF1F2_L1_finished:
- mov r10, #0 /* @ swith back to cache level 0 */
- mcr p15, 2, r10, c0, c0, 0 /* @ select current cache level in cssr */
- dsb
- isb
-/******************************************************************************* *
-clrex
-* ******************************************************************************/
- clrex
-/*******************************************************************************
-* __inner_flush_dcache_L2
-* ******************************************************************************/
- dmb /* @ ensure ordering with previous memory accesses */
- mrc p15, 1, r0, c0, c0, 1 /* @ read clidr */
- ands r3, r0, #0x7000000 /* @ extract loc from clidr */
- mov r3, r3, lsr #23 /* @ left align loc bit field */
- beq DF1F2_L2_finished /* @ if loc is 0, then no need to clean */
- mov r10, #2 /* @ start clean at cache level 2*/
-DF1F2_L2_loop1:
- add r2, r10, r10, lsr #1 /* @ work out 3x current cache level */
- mov r1, r0, lsr r2 /* @ extract cache type bits from clidr */
- and r1, r1, #7 /* @ mask of the bits for current cache only */
- cmp r1, #2 /* @ see what cache we have at this level */
- blt DF1F2_L2_skip /* @ skip if no cache, or just i-cache */
- mcr p15, 2, r10, c0, c0, 0 /* @ select current cache level in cssr */
- isb /* @ isb to sych the new cssr&csidr */
- mrc p15, 1, r1, c0, c0, 0 /* @ read the new csidr */
- and r2, r1, #7 /* @ extract the length of the cache lines */
- add r2, r2, #4 /* @ add 4 (line length offset) */
- ldr r4, =0x3ff
- ands r4, r4, r1, lsr #3 /* @ find maximum number on the way size */
- clz r5, r4 /* @ find bit position of way size increment */
- ldr r7, =0x7fff
- ands r7, r7, r1, lsr #13 /* @ extract max number of the index size*/
-DF1F2_L2_loop2:
- mov r9, r4 /* @ create working copy of max way size*/
-DF1F2_L2_loop3:
- orr r11, r10, r9, lsl r5 /* @ factor way and cache number into r11 */
- orr r11, r11, r7, lsl r2 /* @ factor index number into r11 */
- mcr p15, 0, r11, c7, c14, 2 /* @ clean & invalidate by set/way */
- subs r9, r9, #1 /* @ decrement the way */
- bge DF1F2_L2_loop3
- subs r7, r7, #1 /* @ decrement the index */
- bge DF1F2_L2_loop2
-DF1F2_L2_skip:
- /*@add r10, r10, #2 @ increment cache number */
- /*@cmp r3, r10 */
- /*@bgt DF1F2_L2_loop1 */
-DF1F2_L2_finished:
- mov r10, #0 /* @ swith back to cache level 0 */
- mcr p15, 2, r10, c0, c0, 0 /* @ select current cache level in cssr */
- dsb
- isb
-/*******************************************************************************
-* pop stack pop {r0,r1,r2,r3,r4,r5,r7,r9,r10,r11,r14}
-* ******************************************************************************/
- ldmfd sp!, {r4, r5,r6,r7,r8, r9, r10,r11,lr}
- bx lr
-ENDPROC(disable_flush_dcache_L1_flush_cache_L2)
-
-#if 0
-.equ HAL_CPSR_SVC_MODE, 0x13
-.equ HAL_CPSR_MON_MODE, 0x16
-ENTRY(tse_monitor_init)
-ldr r0, =monitor_exception_vectors // Get address of Monitor's vector table
- mcr p15, 0, r0, c12, c0, 1 // Write Monitor Vector Base Address Register
-
- cps #HAL_CPSR_MON_MODE // disabled irq and fiq when enter monitor mode
- ldr sp, =mon_stack // init sp for monitor mode
- cps #HAL_CPSR_SVC_MODE
-
- bx lr
-ENDPROC(tse_monitor_init)
-#endif
-
-#define GIC_DIST_BASE (0xF2000000)
-#define GIC_RDIST_BASE (0xF2040000)
-
-ENTRY(reset_init)
- ldr r3, =GIC_DIST_BASE
- ldr r0, =0x50
- str r0, [r3]
-
- ldr r3, =GIC_RDIST_BASE
- add r1, r3, #0x14
-
- LDR R0, [R1]
- LDR R2, =0xfffffffd
- AND R0, R0, R2
- STR R0, [R1]
-
- LDR R2, = 0xFFFFFFFB
-wait:
- LDR R0, [R1]
- AND R0, R0, R2
- CMP R0, #0
- BNE wait
-
- SUB R1, R1, #0x14
- LDR R2, =0x10080
- ADD R1, R1, R2
- LDR R2, =0xFFFFFFFF
- STR R2, [R1]
-
- MRS R0, CPSR
- BIC R0, #0x1F
- ORR R0, #0xD6
- MSR CPSR_c, R0
-
- MOV r3, #0xD
- MCR p15,#0x6,r3,c12,c12,#5
- MCR p15,0,r3,c12,c12,#5
-
- MRC p15,0,r1,c1,c1,0
- MOV r2, r1
- ORR r2, #0x1
- MCR p15,0,r2,c1,c1,0
-
- MCR p15,#0x4,r3,c12,c9,#5
-
- MRS R0, CPSR
- BIC R0, #0x1F
- ORR R0, #0xD3
- MSR CPSR_c, R0
-
- ret lr
-ENDPROC(reset_init)
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm.c
deleted file mode 100644
index d46668f..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm.c
+++ /dev/null
@@ -1,561 +0,0 @@
-/*
- * ZTE power management main driver
- *
- * Copyright (C) 2013 ZTE Ltd.
- * by zxp
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/io.h>
-#include <linux/suspend.h>
-#include <linux/time.h>
-#include <linux/timer.h>
-#include <linux/delay.h>
-#include <linux/cpu.h>
-#include "zx-pm.h"
-#include <linux/timer.h>
-#include <linux/kthread.h> /*For kthread_run()*/
-
-#ifdef CONFIG_ZX_PM_DEBUG
-
-static struct delayed_work pm_debug_work;
-struct kobject *pm_debug_kobj;
-static struct timer_list pm_debug_timer;
-
-#define PM_DEBUG_DELAY msecs_to_jiffies(10000) //10s
-
-#endif
-
-/*********************************************************************
- * some common pm functions
- ********************************************************************/
-#ifdef CONFIG_ZX_RAM_CONSOLE
-#define PM_LOG_SRAM_SIZE (4*1024)
-static char pm_sram_printk_buf[PM_LOG_SRAM_SIZE]; // loop buffer
-static u32 pm_sram_point = 0;
-static u32 pm_sram_inited = 0;
-//static char pm_sram_temp_buf[512] = {0};
-
-static void pm_sram_cpy(char *s, unsigned len)
-{
- if(pm_sram_point + len >= PM_LOG_SRAM_SIZE)
- pm_sram_point = 0;
-
- memcpy(pm_sram_printk_buf+pm_sram_point, s, len);
- pm_sram_point += len;
-}
-
-/* ------------------for idle print msg-------------------------*/
-
-#define PM_IDLE_SRAM_ITEM_SIZE (200)
-#define PM_IDLE_SRAM_ITEM_CNT (8)
-#define PM_IDLE_TOTAL_SRAM_SIZE (PM_IDLE_SRAM_ITEM_SIZE*PM_IDLE_SRAM_ITEM_CNT)
-
-typedef struct
-{
- char buf[PM_IDLE_SRAM_ITEM_SIZE];
-}pm_idle_sram;
-
-static pm_idle_sram pm_idle_sram_buf[PM_IDLE_SRAM_ITEM_CNT];
-static unsigned int pm_idle_sram_state = 0;
-static unsigned int pm_idle_sram_cur_item = 0;
-
-static u32 last_uart_jiffies =0;
-struct timer_list timer_uart_print;
-
-
-#ifdef CONFIG_CPU_IDLE
-extern int zx_idle_get_debug_flag(void);
-extern int zx_idle_get_idle_flag(void); //ap idle flag
-#endif
-
-#ifndef CONFIG_CPU_IDLE
-typedef int (*pm_callback_fn)(void);
-int zx_pm_register_callback(pm_callback_fn enter_cb, pm_callback_fn exit_cb)
-{
- return 0;
-}
-EXPORT_SYMBOL(zx_pm_register_callback);
-#endif
-
-/* for idle print msg */
-
-void pm_idle_sram_start(void)
-{
- pm_idle_sram_cur_item = 0;
- pm_idle_sram_state = 1;
-}
-
-void pm_idle_sram_end(void)
-{
- pm_idle_sram_state = 0;
-}
-
-
-bool pm_idle_sram_is_permit(void)
-{
-#ifdef CONFIG_CPU_IDLE
- if(pm_idle_sram_state && (pm_get_mask_info()&PM_SLEEP_FLAG_PRINT))//if(pm_idle_sram_state && (zx_idle_get_debug_flag()&1))
- return true;
- else
- return false;
-#endif
-}
-
-static void pm_idle_sram_cpy(char *s, unsigned len)
-{
- if(!pm_idle_sram_is_permit())
- return;
-
- if((pm_idle_sram_cur_item >= PM_IDLE_SRAM_ITEM_CNT) || (len >= PM_IDLE_SRAM_ITEM_SIZE))
- {
- BUG();
- //return ;
- }
-
- memcpy(pm_idle_sram_buf[pm_idle_sram_cur_item].buf, s, len);
- pm_idle_sram_buf[pm_idle_sram_cur_item].buf[len] = 0;
- pm_idle_sram_cur_item ++;
-}
-
- /**
- * pm_uart_print
- *
- */
-
- static void pm_update_uart_jiffies(void)
- {
- last_uart_jiffies=jiffies;
- }
-
-static void pm_sleep_flag_print(void)
-{
- u32 cur_jiffies = jiffies;
- u32 work_jiffies = cur_jiffies - last_uart_jiffies;
-
- if( (work_jiffies > 200) ) {
-
- last_uart_jiffies = cur_jiffies;
- printk(" jiffies:%u; ", cur_jiffies);
- }
-}
-
-static void pm_sleepflag_print_func(struct timer_list *unused)
-{
-
- if(pm_get_mask_info()&PM_SLEEP_FLAG_PRINT) {
-
- soft_spin_lock_psm(UART_SFLOCK);
-
- pm_sleep_flag_print();
- mod_timer(&timer_uart_print ,jiffies + msecs_to_jiffies(1 * 1000));
- soft_spin_unlock_psm(UART_SFLOCK);
- }
-
-}
-
-static void pm_uart_createtimer(void)
-{
- timer_setup(&timer_uart_print, pm_sleepflag_print_func, 0);
-/*
- init_timer(&timer_uart_print);
- timer_uart_print.function = pm_sleepflag_print_func;
-*/ timer_uart_print.expires = jiffies + msecs_to_jiffies(59 * 1000);
- add_timer(&timer_uart_print);
-
-}
-
- void pm_uart_mod_timer(void)
- {
- if(pm_get_mask_info()&PM_SLEEP_FLAG_PRINT) {
- pm_update_uart_jiffies();
- mod_timer(&timer_uart_print ,jiffies + msecs_to_jiffies(1 * 1000));
- }
- }
-
- void pm_uart_del_timer(void)
- {
- if(pm_get_mask_info()&PM_SLEEP_FLAG_PRINT) {
- del_timer(&timer_uart_print);
- }
- }
-/* ------------------for idle print msg-------------------------*/
-
-#endif
-
-void pm_psm_flag_print(u32 *sleepflag)
-{
- #ifdef CONFIG_CPU_IDLE
- #endif
-}
-EXPORT_SYMBOL(pm_psm_flag_print);
-
-u32 print_cnt=0;
-
-void pm_idle_sram_print(void)
-{
-#ifdef CONFIG_ZX_RAM_CONSOLE
- int i;
-
- if((print_cnt++) % 100 == 0) {
- for(i=0; i<pm_idle_sram_cur_item; i++)
- {
- printk("%s", pm_idle_sram_buf[i].buf);
- }
-
- pm_idle_sram_cur_item = 0;
- }
-#endif
-}
-
-/**
- * usage: like printk(...)
- */
-void pm_printk(const char *fmt, ...)
-{
-#ifdef CONFIG_ZX_RAM_CONSOLE
- va_list args;
- unsigned long long t;
- unsigned long nanosec_rem;
- int tlen, len;
- char pm_sram_temp_buf[512] = {0};
-
- if(!pm_sram_inited)
- return;
-
- va_start(args, fmt);
- preempt_disable();
-
- /* add time stamp */
- t = cpu_clock(read_cpuid());
- nanosec_rem = do_div(t, 1000000000);
- tlen = sprintf(pm_sram_temp_buf, ">%5lu.%06lu< ",
- (unsigned long) t, nanosec_rem / 1000);
-
- len = vsprintf(pm_sram_temp_buf+tlen, fmt, args);
- len += tlen;
-
- pm_sram_cpy(pm_sram_temp_buf, len);
- pm_idle_sram_cpy(pm_sram_temp_buf, len);
-
- preempt_enable();
- va_end(args);
-#endif
-}
-
-void pm_sram_init(void)
-{
-#ifdef CONFIG_ZX_RAM_CONSOLE
- pr_info("[SLP] Power/SRAM_INIT \n");
-
- pm_sram_printk_buf[0] = 0;
- pm_sram_point = 0;
-
- pm_sram_inited = 1;
-#endif
-}
-
-/*********************************************************************
- * some pm debug functions
- *
- * we use sysfs interface
- ********************************************************************/
-#ifdef CONFIG_ZX_PM_DEBUG
-
-static void pm_debug_timer_expired(struct timer_list *unused)
-{
- mod_timer(&pm_debug_timer, jiffies + msecs_to_jiffies(6*1000));
-
- pr_info("[SLP] pm timer !!!");
-}
-
-
-/*=============================================================================
- *======== /sys/zte_pm/state =================================================
- *=============================================================================
- */
-
-/**
- * put the string to the buf, and return the string length
- */
-static ssize_t state_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s\n", "[SLP] no debug info now!");
-
- return (s - buf);
-}
-
-/**
- * the buf store the input string , n is the string length
- * return the status
- */
-static ssize_t state_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
-
-// zDrvRpMsg_CreateChannel(M0_ID, channel_1, 0x20);
-
- return error;
-}
-
-zte_pm_attr(state);
-
-
-/*=============================================================================
- *======== /sys/zte_pm/debug_work ===========================================
- *=============================================================================
- */
-#if 0
-static unsigned test_item = 0;
-static void pm_test_switch_clock(void)
-{
- printk("[SLP] pm_test_switch_clock: %d \n\r", test_item);
-
- switch(test_item)
- {
- case 0: /* ufi 400M */
- cpufreq_test(1, 0);
-
- break;
- case 1: /* ufi 800M */
- cpufreq_test(0, 1);
- break;
- case 2: /* 624 624M */
- cpufreq_test(1, 2);
- break;
- case 3: /* 624 156M */
- cpufreq_test(2, 3);
- break;
- case 4: /* main 26M */
- cpufreq_test(3, 4);
- test_item = 0;
- return;
- break;
- }
-
- test_item ++;
-}
-#endif
-
-static void pm_debug_func(struct work_struct *work)
-{
- printk("[SLP] runs in %s. \n\r", __func__);
-
- pm_suspend(PM_SUSPEND_MEM);
-// pm_test_switch_clock();
-
- schedule_delayed_work(&pm_debug_work, PM_DEBUG_DELAY);
-}
-
-static ssize_t pm_debug_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- s += sprintf(s, "%s\n", "[SLP] pm debug !");
-
- return (s - buf);
-}
-
-/* usage: "echo 1 > pm_debug" */
-static ssize_t pm_debug_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
- unsigned int temp;
-
- if(sscanf(buf, "%u", &temp) != 1)
- error = -EINVAL;
-
- if(temp == 1)
- schedule_delayed_work(&pm_debug_work, PM_DEBUG_DELAY);
- else
- cancel_delayed_work(&pm_debug_work);
-
- return error ? error : n;
-}
-
-zte_pm_attr(pm_debug);
-
-/*=============================================================================
- *======== /sys/zte_pm/wakelock =============================================
- *=============================================================================
- */
-extern void test_wakelock(void);
-extern void pm_debug_wakelocks(void);
-static ssize_t wakelock_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
-// pm_debug_wakelocks();
-
- return (s - buf);
-}
-
-static ssize_t wakelock_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
-
-#ifdef CONFIG_ZX_PM_SUSPEND
- test_wakelock();
-#endif
-
- return error ;
-}
-
-zte_pm_attr(wakelock);
-
-#ifdef CONFIG_ZX_AUTOSLEEP
-/*=============================================================================
- *======== /sys/zte_pm/app_done =============================================
- *=============================================================================
- */
-extern void app_start_done(void);
-static ssize_t app_done_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf)
-{
- char *s = buf;
-
- return (s - buf);
-}
-
-static ssize_t app_done_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- int error = 0;
-
- app_start_done();
-
- return error;
-}
-
-zte_pm_attr(app_done);
-#endif
-
-static struct attribute * g[] =
-{
- &state_attr.attr,
- &pm_debug_attr.attr,
- &wakelock_attr.attr,
-#ifdef CONFIG_ZX_AUTOSLEEP
- &app_done_attr.attr,
-#endif
- NULL,
-};
-
-
-static struct attribute_group zte_pm_attr_group =
-{
- .attrs = g,
-};
-
-
-/**
- * 1¡¢create sysfs "/sys/zte_pm"
- * 2¡¢add attr
- */
-static int __init pm_debug_init(void)
-{
- int ret;
-
- printk(KERN_INFO "[SLP] create sysfs interface\n");
- pm_debug_kobj = kobject_create_and_add("zte_pm", NULL);
- if (!pm_debug_kobj)
- return -ENOMEM;
- ret = sysfs_create_group(pm_debug_kobj, &zte_pm_attr_group);
- if (ret)
- {
- printk(KERN_WARNING "[SLP] sysfs_create_group ret %d\n", ret);
- return ret;
- }
-
- /* init delayed work */
- INIT_DEFERRABLE_WORK(&pm_debug_work, pm_debug_func);
- /* we will start this in sysfs */
-// schedule_delayed_work(&pm_debug_work, PM_DEBUG_DELAY);
-
- timer_setup(&pm_debug_timer, pm_debug_timer_expired, 0);
-// mod_timer(&pm_debug_timer, jiffies + msecs_to_jiffies(6*1000));
-
-#ifdef CONFIG_CPU_IDLE
- /* cpuidle debug init */
- idle_debug_init();
-#endif
-
- pm_debug_mask_info_init();
-
- return 0;
-}
-
-#endif
-
-
-
-/*********************************************************************
- * FUNCTION DEFINATIONS
- ********************************************************************/
-#if 0//defined(CONFIG_ARCH_ZX297520V2EVB)
-static int __init zx_pm_init(void)
-{
- return 0;
-}
-#else
-
-static int __init zx_pm_init(void)
-{
- pr_info("[SLP] Power/PM_INIT \n");
-
- pm_init_resource();
-
-#ifdef CONFIG_PM_SLEEP
- /* 1¡¢Suspend driver */
- zx_suspend_init();
-#endif
-
-#if 0 //added when debug
- /* 2¡¢power domain initial */
- zx_pwr_init();
-#endif
-
- /* 3¡¢context memory initial */
- zx_pm_context_init();
-
- /* 4¡¢SCU/l2 lowerpower setting */
- pm_init_l2_and_scu(); /*20V5 A53 dont't need set l2,becasue l2 is ARM internal */
-
-
- /* 5¡¢acs */
- //pm_init_acs();
-
- /* 6¡¢init the ram log for pm */
- pm_sram_init();
-
-#ifdef CONFIG_ZX_PM_DEBUG
- pm_debug_init();
-#endif
-
-#ifdef CONFIG_CPU_IDLE
- /* 7¡¢idle driver initial */
-// zx_cpuidle_init();
-#endif
-
- zx29_cpufreq_init();
-
- return 0;
-}
-#endif
-
-late_initcall(zx_pm_init);
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm.h
deleted file mode 100644
index 302155d..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-pm.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * zx-pm.h - power management interface.
- *
- * Written by zxp.
- *
- */
-
-#ifndef _ZX_PM_H
-#define _ZX_PM_H
-
-#include <asm/io.h>
-#include <asm/mach/map.h>
-
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/cpuidle.h>
-
-
-#include "zx29-pm.h"
-
-#include "zx-sleep.h"
-#include "zx-pm-context.h"
-#include "zx-pm-helpers.h"
-#include "zx-cpuidle.h"
-#include "zx-cpufreq.h"
-//extern int request_ddr_freq(zx29_ddr_freq ddr_freq);
-#include <linux/soc/zte/pcu.h>
-#include <linux/soc/zte/common.h>
-#include <linux/soc/zte/spinlock.h>
-
-#ifdef CONFIG_ZX_PM_DEBUG
-
-#define zte_pm_attr(_name) \
-static struct kobj_attribute _name##_attr = \
-{ \
- .attr = \
- { \
- .name = __stringify(_name), \
- .mode = 0644, \
- }, \
- .show = _name##_show, \
- .store = _name##_store, \
-}
-
-/* /sys/zte_pm */
-extern struct kobject *pm_debug_kobj;
-#endif
-#if 0
-
-#define pm_ram_log(fmt, args...) \
-{ \
- pm_printk("[SLP] " fmt, ##args); \
-}
-#else
-#define pm_ram_log(fmt, args...) \
-{ \
- printk(KERN_INFO "[SLP] " fmt, ##args); \
- pm_printk("[SLP] " fmt, ##args); \
-}
-
-#endif
-
-/* Weak implementations for optional arch specific functions */
-#ifdef CONFIG_SYSTEM_RECOVERY
-#ifndef USE_CPPS_KO
-void __weak psm_ModemDevSleep(void)
-{
-}
-bool __weak psm_ModemSleepCheck(void)
-{
- return 0;
-}
-
-u32 __weak psm_ModemSleepTimeGet(void)
-{
- return 0;
-}
-
-void __weak psm_TimeCompensate(u32 sleepTime)
-{
-}
-void __weak psm_GetModemSleepFlagStatus(void)
-{
-}
-#endif
-#else
-extern void psm_ModemDevSleep(void);
-extern void psm_GetModemSleepFlagStatus(void);
-extern bool psm_ModemSleepCheck(void);
-extern unsigned int psm_ModemSleepTimeGet(void);
-extern void psm_TimeCompensate(unsigned int);
-#endif
-
-
-#endif /*_ZX_PM_H*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-sleep.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-sleep.c
deleted file mode 100644
index 8f38160..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-sleep.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/*
- * ZTE cpu sleep driver
- *
- * Copyright (C) 2013 ZTE Ltd.
- * by zxp
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/suspend.h>
-#include <linux/cpufreq.h>
-
-#include <asm/suspend.h>
-
-#include "zx-pm.h"
-
-#ifdef CONFIG_HW_BREAKPOINT_MANAGE
-#include <linux/hw_breakpoint_manage.h>
-#endif
-/* used to return the value, if 0 represent sleeping process ok,
- * if 1 represent reset and restore back.
- */
-volatile int sleep_ret_flag[MAX_CPU_NUM] = {0};
-
-static pm_wake_reason_t pm_wake_reason;
-
-extern struct zx_pm_main_table zx_pm_main_table;
-
-//extern int request_ddr_freq(zx29_ddr_freq ddr_freq);
-
-/**
- * suspend platform device, for example: gpio, uart and so on.
- *
- */
-int zx_board_suspend(void)
-{
- //gpio
-
-// debug_uart_suspend();
-
-
- return 0;
-}
-
-/**
- * resume debug uart¡¢GPIO and other device out of A9.
- *
- */
-int zx_board_resume(void)
-{
- //gpio
-// debug_uart_resume();
-
- //uart
-
- return 0;
-}
-
-/**
- * close clocks and power domains that PCU does not controls.
- *
- */
-int zx_dpm_suspend(void)
-{
-
- return 0;
-}
-
-/**
- * resume debug uart¡¢GPIO and other device out of A9.
- *
- */
-int zx_dpm_resume(void)
-{
-
- return 0;
-}
-
-/**
- * set cpu power state before do wfi.
- *
- * cpu_context.power_state should filled in before call this function.
- */
-static void set_power_state(void)
-{
-#ifdef CONFIG_ARCH_ZX297520V2
- set_status_a9_scu(zx_pm_main_table.cur_cpu,
- zx_pm_main_table.cpu_context[zx_pm_main_table.cur_cpu]->power_state,
- zx_pm_main_table.scu_address);
-#else
-#if 0
- set_status_a53_scu(zx_pm_main_table.cur_cpu,
- zx_pm_main_table.cpu_context[zx_pm_main_table.cur_cpu]->power_state,
- zx_pm_main_table.scu_address);
-#endif
-#endif
-}
-
-#ifdef CONFIG_ZX_PM_DEBUG_TIME
-unsigned int suspend_start_time;
-unsigned int suspend_enter_time;
-unsigned int suspend_exit_time;
-unsigned int suspend_finish_time;
-unsigned int suspend_cur_time;
-unsigned int suspend_save_start_time = 0;
-unsigned int suspend_save_end_time = 0;
-unsigned int suspend_restore_start_time = 0;
-unsigned int suspend_restore_end_time = 0;
-unsigned int suspendabort_restore_start_time = 0;
-unsigned int suspendabort_restore_end_time = 0;
-unsigned int suspendabort_cnt = 0;
-unsigned int suspendsuscess_cnt = 0;
-unsigned int zx_get_cur_time(void)
-{
- return (unsigned int)read_persistent_us();
-}
-#endif
-static void zx_sleep_before_wfi(void)
-{
-// pm_switch_clk_to_26m();
-}
-
-static void zx_sleep_after_wfi(void)
-{
-// pm_switch_clk_from_26m();
-}
-
-
-/**
- * when return pointor is stored,
- * cpu will poweroff now.
- */
-static int zx_finish_suspend(unsigned long param)
-{
- /*disable&clean&inv interface*/
- disable_flush_dcache_L1_flush_cache_L2();
-
-#ifdef CONFIG_ZX_PM_DEBUG_TIME
- pm_write_reg(SLEEP_TIME_ADDR, zx_get_cur_time());
-#endif
-
- exit_coherency();
-
- set_power_state();
-
- zx_sleep_before_wfi();
-
-
-#ifdef CONFIG_ZX_PM_DEBUG
- /**/
- pm_write_reg(AP_SUSPEND_STATUS_FLAG,0x5);
-#endif
-
- zx_jump_addr(zx_pm_main_table.wakeup_vaddr+WAKEUP_CODE_LENGTH);
-
- zx_sleep_after_wfi();
-
- /* when the sleep is abnormal exit, can run here */
- return 1;
-}
-
-/**
- * when cpu sleep procedure is abort,
- * then return true.
- */
-static inline bool is_cpu_sleep_abort(void)
-{
- unsigned int cpu_id;
- struct zx_cpu_context *context;
-
- cpu_id = read_cpuid();
- context = zx_pm_main_table.cpu_context[cpu_id];
-
- if (context->power_state != CPU_POWER_MODE_RUN)
- return true;
-
- return false;
-}
-
-/**
- * cpu sleep stage may be abort for some interrupt or event pending.
- * This function is used to deal this situation.
- *
- * if state is CPU_POWER_MODE_RUN, indicated not back from restore,
- * so sleep stage is abort.
- */
-static void cpu_check_sleep_abort(void)
-{
- if (is_cpu_sleep_abort())
- {
- /*enable l1-cache, l2,
- then code can run well */
-#ifdef CONFIG_ARCH_ZX297520V2 /* 2975V2 A9*/
- set_enabled_pl310(true, zx_pm_main_table.l2_address);
-#endif
- enable_cache();
-#ifdef CONFIG_ZX_PM_DEBUG_TIME
- suspendabort_cnt++;
- suspendabort_restore_start_time = zx_get_cur_time();
-#endif
- zx_pm_restore_abort_context();
-
-#ifdef CONFIG_ZX_PM_DEBUG_TIME
- suspendabort_restore_end_time = zx_get_cur_time();
-#endif
- set_power_state();
- pm_set_wakeup_reason(WR_WAKE_SRC_ABNORMAL);
- }
- else
- {
- }
-}
-
-
-/**
- * cpu enter&resume interface code.
- *
- * sleep_type -- CPU_SLEEP_TYPE_LP1/CPU_SLEEP_TYPE_IDLE_LP2
- */
-u32 ap_susnpend_for_sleep_cnt =0;
-u32 ap_suspeend_for_poweroff_cnt =0;
-#ifdef CONFIG_PM_SLEEP
-void zx_enter_sleep(cpu_sleep_type_t sleep_type)
-{
-#ifdef CONFIG_ZX_PM_DEBUG_TIME
- pm_write_reg(SUSPEND_START_TIME_ADDR, zx_get_cur_time());
-#endif
-
- zx_set_context_level(sleep_type);
-
- /* set&enable PCU for interrupt/clock/powerdomain/pll/iram */
- zx_set_pcu();
-
-#ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xff04);
-#endif
- if(CPU_SLEEP_TYPE_LP3 == sleep_type)
- {
-#ifdef CONFIG_ZX_PM_DEBUG
- ap_susnpend_for_sleep_cnt++;
-#endif
- zx_wdt_handle_before_psm();
- do_wfi();
-
- zx_wdt_handle_after_psm();
-
-#ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xff05);
-#endif
-
- pm_get_wake_cause();
-
-#ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_SUSPEND_FOR_SLEEP_CNT,ap_susnpend_for_sleep_cnt);
-#endif
- }
- else
- {
-/*=================================================================
- *=== the following code is for dormant or shutdown
- *=================================================================
- */
- zx_wdt_handle_before_psm();
-#ifdef CONFIG_HAVE_HW_BREAKPOINT
- hw_breakpoint_context_save();
-#endif
- zx_pm_save_context();
-
-#ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xff05);
-#endif
- if(!cpu_suspend(0, zx_finish_suspend))
- {
- zx_sleep_after_wfi();
- zx_pm_restore_context();
-#ifdef CONFIG_ZX_PM_DEBUG
- ap_suspeend_for_poweroff_cnt++;
- pm_write_reg(AP_SUSPEND_FOR_POWEROFF_CNT,ap_suspeend_for_poweroff_cnt);
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xff06);
-#endif
- }
-
- zx_wdt_handle_after_psm();
-
- /*exit from sleep*/
- join_coherency();
-
- cpu_check_sleep_abort();
-/*=================================================================
- *=== ending with dormant or shutdown
- *=================================================================
- */
-
- /* get cause of exiting sleep */
- pm_get_wake_cause();
-#ifdef CONFIG_HAVE_HW_BREAKPOINT
- hw_breakpoint_restore_context();
-#endif //CONFIG_HAVE_HW_BREAKPOINT
- }
-#ifdef CONFIG_ZX_PM_DEBUG
- pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xff07);
-#endif
-
- zx_clear_pcu();
-
-#ifdef CONFIG_ZX_PM_DEBUG_TIME
- suspend_finish_time = zx_get_cur_time();
- suspend_start_time =pm_read_reg(SUSPEND_START_TIME_ADDR);
-// pr_info("[SLP] suspend time: start:%d enter:%d total:%d\n",suspend_start_time, suspend_enter_time, suspend_start_time-suspend_enter_time);
-// pr_info("[SLP] suspend time: exit:%d finish:%d total:%d \n",suspend_exit_time, suspend_finish_time, suspend_exit_time-suspend_finish_time);
- pm_ram_log("####suspend start = [%u],end = [%u],time=[%u]\n",suspend_start_time,suspend_finish_time,(suspend_finish_time-suspend_start_time));
- pm_ram_log("####sleep time = [%u],sucess_cn=[%u],sucess_abort=[%u]\n",(suspend_exit_time-suspend_enter_time),suspendsuscess_cnt,suspendabort_cnt);
- pm_ram_log("####save time = [%u],restore time = [%u]\n",(pm_read_reg(SUSPEND_SAVE_TIME_ADDR)),(pm_read_reg(SUSPEND_RESTORE_TIME_ADDR)));
-#endif
-
-
-}
-#else
-void zx_enter_sleep(cpu_sleep_type_t sleep_type){}
-#endif
-
-/**
- * get wakeup reason .
- *
- *
- */
-pm_wake_reason_t pm_get_wakeup_reason(void)
-{
- return pm_wake_reason;
-}
-
-/**
- * set wakeup reason .
- *
- *
- */
-void pm_set_wakeup_reason(pm_wake_reason_t reason)
-{
- pm_wake_reason = reason;
-}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-sleep.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-sleep.h
deleted file mode 100644
index 4a1b76f..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx-sleep.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * zx-sleep.h - cpu sleep and wakeup interface.
- *
- * Written by zxp.
- *
- */
-
-#ifndef _ZX_SLEEP_H
-#define _ZX_SLEEP_H
-
-typedef enum
-{
- CPU_SLEEP_TYPE_NULL = 0,
- CPU_SLEEP_TYPE_LP1,
- CPU_SLEEP_TYPE_IDLE_LP2,
- CPU_SLEEP_TYPE_HOTPLUG_LP2,
- CPU_SLEEP_TYPE_LP3, /* maybe only for debug */
-} cpu_sleep_type_t;
-
-typedef enum
-{
- CPU_POWER_MODE_RUN = 0,
- CPU_POWER_MODE_STANDBY = 1,
- CPU_POWER_MODE_DORMANT = 2,
- CPU_POWER_MODE_SHUTDOWN = 3,
-} cpu_power_mode_t;
-
-typedef enum {
- WR_NONE = 0,
- WR_WAKE_SRC_NORMAL,
- WR_WAKE_SRC_UNKNOWN,
- WR_WAKE_SRC_ABNORMAL,
- WR_SW_ABORT,
-} pm_wake_reason_t;
-
-
-#define do_wfi() \
-do { \
- __asm__ __volatile__("isb" : : : "memory"); \
- __asm__ __volatile__("dsb" : : : "memory"); \
- __asm__ __volatile__("wfi" : : : "memory"); \
-} while (0)
-
-extern int zx_board_suspend(void);
-extern int zx_board_resume(void);
-extern int zx_dpm_suspend(void);
-extern int zx_dpm_resume(void);
-extern void zx_enter_sleep(cpu_sleep_type_t sleep_type);
-extern void cpu_start_restore(void);
-extern pm_wake_reason_t pm_get_wakeup_reason(void);
-extern void pm_set_wakeup_reason(pm_wake_reason_t reason);
-
-#endif /*_ZX_SLEEP_H*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-cpufreq.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-cpufreq.c
deleted file mode 100644
index 7eacfd7..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-cpufreq.c
+++ /dev/null
@@ -1,528 +0,0 @@
-/*
- * ZTE zx297510 dvfs driver
- *
- * Copyright (C) 2013 ZTE Ltd.
- * by zxp
- *
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/cpufreq.h>
-#include <linux/suspend.h>
-
-#include <linux/soc/zte/rpmsg.h>
-//#include "mach/clock.h"
-#include <linux/miscdevice.h>
-#include <linux/uaccess.h>
-#include <linux/fs.h>
-#include "zx-pm.h"
-#define ZX_CPUFREQ_IOC_MAGIC 'W'
-
-/*ioctl cmd usd by device*/
-#define ZX_CPUFREQ_SET_FREQ _IOW(ZX_CPUFREQ_IOC_MAGIC, 1, char *)
-#define ZX_CPUFREQ_GET_FREQ _IOW(ZX_CPUFREQ_IOC_MAGIC, 2, char *)
-
-#define ZX_CPUFREQ_DEV "/dev/zx_cpufreq"
-
-#define PM_FREQ_TRACE 1
-#if PM_FREQ_TRACE
-
-#define FREQ_CHANGE_COUNT 20
-
-typedef struct
-{
- volatile unsigned int old_index;
- volatile unsigned int new_idex;
- volatile unsigned int time;
-}freq_change_view_trace_t;
-
-static freq_change_view_trace_t freq_change_view[FREQ_CHANGE_COUNT] ;
-static unsigned int freq_change_index = 0;
-static int cpufreq_driver_inited = 0;
-
-void trace_freq_change(unsigned int old_index,unsigned int new_index)
-{
- freq_change_view[freq_change_index].old_index = old_index;
- freq_change_view[freq_change_index].new_idex = new_index;
- freq_change_view[freq_change_index].time = ktime_to_us(ktime_get());
- freq_change_index++;
- if(freq_change_index == FREQ_CHANGE_COUNT)
- {
- freq_change_index = 0;
- }
-}
-#else
-void trace_freq_change(unsigned int old_index,unsigned int new_index){}
-#endif
-
-unsigned int freq_change_enabled_by_startup = 0;
-static struct delayed_work pm_freq_work;
-#define PM_FREQ_DELAY msecs_to_jiffies(25000)
-
-/* for count change time by M0 */
-#define DEBUG_CPUFREQ_TIME 1
-
-#ifdef CONFIG_DDR_FREQ
-#ifdef CONFIG_ARCH_ZX297520V2
-#define get_cur_ddr() pm_read_reg_16(AXI_CURRENT_FREQ)
-#define set_target_ddr(f) pm_write_reg_16(AXI_AP2M0_TARGET, f)
-#define set_ddr_req() pm_write_reg_16(AXI_AP2M0_FLAG, 1)
-#define clr_ddr_ack() pm_write_reg_16(AXI_M02AP_ACK, 0)
-
-#define wait_ddr_ack() while(!pm_read_reg_16(AXI_M02AP_ACK))
-#else
-static ddr_freq_regs *ddr_regs = (ddr_freq_regs *)IRAM_CHANGE_DDR_BASE;
-#define get_cur_ddr() (ddr_regs->cur_freq)
-#define set_target_ddr(f) (ddr_regs->ap_exp_freq = f)
-#define set_ddr_req() (ddr_regs->ap_req_flag = 1)
-
-#endif
-#endif
-
-//#undef CONFIG_AXI_FREQ
-#ifdef CONFIG_AXI_FREQ
-static DEFINE_MUTEX(axifreq_lock);
-
-static axi_freq_regs *axi_regs; // = (axi_freq_regs *)IRAM_CHANGE_AXI_BASE;
-static vol_dvs_regs *vol_regs; // = (vol_dvs_regs *)IRAM_CHANGE_DVS_BASE;
-
-#define get_cur_axi() (axi_regs->cur_freq)
-#define set_target_axi_sw(f) (axi_regs->ap_exp_freq = f)
-#define set_axi_req() (axi_regs->ap_req_flag = 1)
-
-#define get_target_axi_hw(addr) (pm_read_reg(addr)&(0x7))
-
-#if 1
-#define DDR_FREQ_156M_HW (0x4e)
-#define DDR_FREQ_208M_HW (0x68)
-#define DDR_FREQ_312M_HW (0x9c)
-#define DDR_FREQ_400M_HW (0xc8)
-
-#define set_ddr_freq_hw(addr,f) (pm_read_reg(addr)&(~0xff)|f)
-#define set_ddr_freq_sync(addr,f) (pm_read_reg(addr)&(~0x1)|f)
-#endif
-
-#define get_cur_vol() (vol_regs->cur_vol)
-#define set_target_vol(f) (vol_regs->ap_exp_vol = f)
-#define set_vol_req() (vol_regs->ap_req_flag = 1)
-
-#if 0
-#define WAIT_AXI_ACK_TIMEOUT (jiffies + msecs_to_jiffies(2)) /* wait 2 ms, we count max 200us also */
-#define wait_axi_ack(timeout) while(!pm_read_reg_16(AXI_M02AP_ACK) && time_before(jiffies, timeout))
-#else
-#define WAIT_AXI_ACK_TIMEOUT (200) /* wait 120us, we count max 200us also */
-static void wait_axi_ack(unsigned timeout)
-{
- ktime_t begin_time = ktime_get();
-
- while(((vol_regs->ap_req_flag) ||(axi_regs->ap_req_flag) )&& (unsigned)ktime_to_us(ktime_sub(ktime_get(), begin_time))<timeout);
-}
-#endif
-
-static int send_msg_to_m0(void)
-{
- unsigned int ap_m0_buf = AXI_VOL_CHANGE_ICP_BUF; /* the icp interface need a buffer */
- T_RpMsg_Msg Icp_Msg;
- int ret;
-
- Icp_Msg.coreID = CORE_M0;
- Icp_Msg.chID = 1;
- Icp_Msg.flag = RPMSG_WRITE_INT; /* 1- means send an icp interrupt> */
- Icp_Msg.buf = &ap_m0_buf;
- Icp_Msg.len = 0x4;
-
- ret = rpmsgWrite(&Icp_Msg);
- if(Icp_Msg.len == ret)
- return 0;
- else
- return ret;
-}
-
-static int axi_freq_change_allowed(void)
-{
- if(pm_get_mask_info()&PM_NO_AXI_FREQ)
- return false;
-
- return true;
-}
-
-/**
- * request to change vol.
- *
- * vol_dvs: input vol enum
- */
-int request_vol(zx29_vol vol_dvs)
-{
- unsigned int current_vol = get_cur_vol();
-
- set_target_vol(vol_dvs);
-#if DEBUG_CPUFREQ_TIME
- pm_printk("[CPUFREQ] current_vol(%d) request_vol(%d) \n",(u32)current_vol,(u32)vol_dvs);
-#endif
-
- if(vol_dvs != current_vol)
- {
- /* request freq */
- set_vol_req();
- }
-
- return 0;
-}
-
-/**
- * input axi freq.
- */
-static zx29_vol request_vol_by_axi(zx29_axi_freq axi_freq)
-{
- if(axi_freq == AXI_FREQ_156M)
- return VOL_VO_900;
- else
- return VOL_VO_850;
-}
-
-/**
- * set vol .
- *
- * we will do this by M0.
- */
-static int set_vol_by_axi(zx29_axi_freq axi_freq)
-{
- zx29_vol vol_dvs= request_vol_by_axi(axi_freq);
-
- /* set new vol*/
- return request_vol(vol_dvs);
-}
-
-
-/**
- * request to change axi freq.
- *
- * axi_freq: input freq enum
- */
-int request_axi_freq(zx29_axi_freq axi_freq)
-{
- unsigned int current_axi_freq = get_cur_axi();
- unsigned int tmp;
- int ret = 0;
-
-#if DEBUG_CPUFREQ_TIME
- ktime_t begin_time, end_time;
- s64 total_time;
-#endif
-
- if(!axi_freq_change_allowed())
- return 0;
-
-#ifdef SET_AXI_BY_HW
- tmp = (pm_read_reg(PS_MATRIX_AXI_SEL)&(~0x7))|axi_freq;
- pm_write_reg(PS_MATRIX_AXI_SEL,tmp);
- pm_printk("[CPUFREQ] current_axi_freq(%d) request_axi_freq(%d) after_request_axi_freq(%d) after_request_vol(%d)\n",(u32)current_axi_freq,(u32)axi_freq,get_cur_axi(),get_cur_vol());
-#else
- set_target_axi_sw(axi_freq);
-
- if(axi_freq != current_axi_freq)
- {
- /* request freq */
- set_axi_req();
-
-// set_vol_by_axi(axi_freq);//set vol
-
- ret = send_msg_to_m0();
-#if DEBUG_CPUFREQ_TIME
- begin_time = ktime_get();
-#endif
- if(!ret)
- {
- /* wait axi freq changed ok! we will set a timeout for safety~ */
- wait_axi_ack(WAIT_AXI_ACK_TIMEOUT);
- }
- else
- {
- pm_printk("[CPUFREQ] request_axi_freq(%d) failed: (%d) \n",(u32)axi_freq, ret);
- }
-
-#if DEBUG_CPUFREQ_TIME
- end_time = ktime_get();
- total_time = ktime_to_us(ktime_sub(end_time, begin_time));
- pm_printk("[CPUFREQ] total axi time: %d us current_axi_freq(%d) request_axi_freq(%d) after_request_axi_freq(%d) after_request_vol(%d)\n",(u32)total_time,(u32)current_axi_freq,(u32)axi_freq,get_cur_axi(),get_cur_vol());
- }
- else
- {
- pm_printk("[CPUFREQ] current_axi_freq(%d) request_axi_freq(%d) \n",(u32)current_axi_freq,(u32)axi_freq);
-#endif
- }
-#endif
-
- return 0;
-}
-
-
-/**
- * input cpu freq [KHz].
- */
-static zx29_axi_freq request_axi_freq_by_cpu(unsigned int freq)
-{
- if(freq >= 600*1000)
- return AXI_FREQ_156M;
- else
- return AXI_FREQ_78M;
-}
-
-/**
- * set axi freq .
- *
- * we will do this by M0.
- */
-static int set_axi_frequency_by_cpu(unsigned int freq)
-{
- zx29_axi_freq axi_freq = request_axi_freq_by_cpu(freq);
-
- /* set new freq */
- return request_axi_freq(axi_freq);
-}
-
-int zx_request_axi_freq(unsigned int axifreq)
-{
- zx29_axi_freq axi_freq;
-
- if (axifreq == 0xff)
- return -EINVAL;
-
- if(cpufreq_driver_inited==0)
- return -EPERM;
-
- if(axifreq >= 600*1000*1000)
- return AXI_FREQ_156M;
- else
- return AXI_FREQ_78M;
-
- return request_axi_freq(axi_freq);
-}
-
-#endif
-
-
-#ifdef CONFIG_AXI_FREQ
-/**
- * zx_axifreq_pm_notifier - acquire axifreq in suspend-resume context
- *
- * @notifier
- * @pm_event
- * @v
- *
- */
-
-static int zx_axifreq_pm_notifier(struct notifier_block *notifier,
- unsigned long pm_event, void *v)
-{
- mutex_lock(&axifreq_lock);
-
- switch (pm_event)
- {
- case PM_SUSPEND_PREPARE:
- request_axi_freq(AXI_FREQ_78M);
- break;
-
- case PM_POST_SUSPEND:
- request_axi_freq(AXI_FREQ_156M);
- break;
- }
-
- mutex_unlock(&axifreq_lock);
-
- return NOTIFY_OK;
-}
-
-static struct notifier_block zx_axifreq_nb =
-{
- .notifier_call = zx_axifreq_pm_notifier,
-};
-
-static int __init zx29_axifreq_init(void)
-{
-
- /* pm notify */
- register_pm_notifier(&zx_axifreq_nb);
-// request_vol(VOL_VO_900);
- request_axi_freq(AXI_FREQ_156M);
-
- return 0;
-}
-
-//late_initcall(zx29_axifreq_init);
-#endif
-
-/*=============================================================================
- *======== zx29 DDR freq ===============================================
- *** ap/phy request --> m0 notify --> jump to iram --> wait completely --> ***
- *** -->jump to ddr ***====
- *=============================================================================
- */
-#ifdef CONFIG_DDR_FREQ
-static DEFINE_MUTEX(ddrfreq_lock);
-static int ddr_freq_change_allowed(void)
-{
- if(pm_get_mask_info()&PM_NO_DDR_FREQ)
- return false;
-
- return true;
-}
-
-static int send_msg_to_ps(void)
-{
- unsigned int ap_m0_buf = AXI_VOL_CHANGE_ICP_BUF; /* the icp interface need a buffer */
- T_ZDrvRpMsg_Msg Icp_Msg;
- int ret;
- Icp_Msg.actorID = PS_ID;
- Icp_Msg.chID = ICP_CHANNEL_PSM;
- Icp_Msg.flag = RPMSG_WRITE_INT; /* 1- means send an icp interrupt> */
- Icp_Msg.buf = &ap_m0_buf;
- Icp_Msg.len = 0x4;
- ret = zDrvRpMsg_Write(&Icp_Msg);
- if(Icp_Msg.len == ret)
- return 0;
- else
- return ret;
-}
-
-int request_ddr_freq_hw(unsigned int ddr_freq)
-{
- if(!ddr_freq_change_allowed())
- return 0;
- pm_write_reg(AP_DDR_FFC_SEL_SYNC,0x0);
- pm_write_reg(AP_DDR_FFC_SEL,ddr_freq);
- pm_write_reg(AP_DDR_FFC_SEL_SYNC,0x1);
- return 0;
-}
-
-int request_ddr_freq(zx29_ddr_freq ddr_freq)
-{
- int ret = 0;
- unsigned current_ddr_freq = get_cur_ddr();
- if(!ddr_freq_change_allowed())
- return 0;
-
- if(ddr_freq == current_ddr_freq)
- return 0;
-
-#ifdef SET_DDR_BY_HW
- //set_ddr_freq_hw(AP_DDR_FFC_SEL, ddr_exp_freq);
- set_ddr_freq_sync(AP_DDR_FFC_SEL_SYNC,0x1);
-#else
- set_target_ddr(ddr_freq);
- ret = send_msg_to_ps();
- if(!ret)
- {
- printk("[DDRFREQ] ddr_freq [%d]\n",get_cur_ddr());
- }
- else
- {
- printk("[DDRFREQ] request_ddr_freq failed\n");
- }
-#endif
-#if 0
- unsigned current_ddr_freq = get_cur_ddr();
- int ret = 0;
-
-#if DEBUG_CPUFREQ_TIME
- ktime_t begin_time, end_time;
- s64 total_time;
-#endif
-
- if(!ddr_freq_change_allowed())
- return 0;
-
- set_target_ddr(ddr_freq);
-
- if(ddr_freq != current_ddr_freq)
- {
- /* request freq */
- clr_ddr_ack();
- set_ddr_req();
-
-#if DEBUG_CPUFREQ_TIME
- begin_time = ktime_get();
-#endif
-
- ret = send_msg_to_m0();
- if(!ret)
- /* wait axi freq changed ok! we will set a timeout for safety~ */
- wait_ddr_ack();
- else
- pr_info("[CPUFREQ] request_ddr_freq(%d) failed: (%d) \n",(u32)ddr_freq, ret);
-
-#if DEBUG_CPUFREQ_TIME
- end_time = ktime_get();
- total_time = ktime_to_us(ktime_sub(end_time, begin_time));
- pr_info("[CPUFREQ] total ddr time: %d us\n",(u32)total_time);
-#endif
- }
-#endif
- return 0;
-}
-
-#ifdef CONFIG_ARCH_ZX297520V2
-static void ddr_freq_handler(void)
-{
- local_irq_disable();
- waiting_ddr_dfs((unsigned long)DDR_DFS_CODE_ADDR);
- local_irq_enable();
-}
-#else
-static int zx_ddrfreq_pm_notifier(struct notifier_block *notifier,
- unsigned long pm_event, void *v)
-{
- mutex_lock(&ddrfreq_lock);
- switch (pm_event)
- {
- case PM_SUSPEND_PREPARE:
- request_ddr_freq_hw(0);
- break;
- case PM_POST_SUSPEND:
- request_ddr_freq_hw(0x9c);
- break;
- }
- mutex_unlock(&ddrfreq_lock);
- return NOTIFY_OK;
-}
-static struct notifier_block zx_ddrfreq_nb =
-{
- .notifier_call = zx_ddrfreq_pm_notifier,
-};
-#endif
-
-static int __init zx29_ddrfreq_init(void)
-{
-#ifdef CONFIG_ARCH_ZX297520V2
-#else
- register_pm_notifier(&zx_ddrfreq_nb);
-#endif
- return 0;
-}
-
-#endif
-
-static void pm_m0_handler(void *buf, unsigned int len)
-{
- /* deal msg from m0 */
-}
-
-int zx29_cpufreq_init(void)
-{
- if(cpufreq_driver_inited)
- return 0;
-
- axi_regs = (axi_freq_regs *)IRAM_CHANGE_AXI_BASE;
- vol_regs = (vol_dvs_regs *)IRAM_CHANGE_DVS_BASE;
-
- cpufreq_driver_inited = 1;
-
- pr_info("[CPUFREQ] zx29_cpufreq_init ok \n");
- return 0;
-}
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-cpuidle.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-cpuidle.c
deleted file mode 100644
index cd1a1fa..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-cpuidle.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- * zx297520v2 CPU idle Routines
- *
- * Copyright (C) 2013 ZTE, Ltd.
- * Shine Yu <yu.xiang5@zte.com.cn>
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/sched.h>
-#include <linux/export.h>
-#include <linux/kernel.h>
-#include <linux/cpu.h>
-#include <linux/tick.h>
-#include <linux/suspend.h>
-#include <linux/interrupt.h>
-#include <linux/gpio.h>
-
-
-#include "zx-pm.h"
-
-#define WHOLE_CHIP_EXIT_LATENCY (4000) /* us */
-
-#define LP2_DEFAULT_EXIT_LATENCY (500 + WHOLE_CHIP_EXIT_LATENCY) /* us */
-#define LP2_MIN_POWER_OFF_TIME (500) /* us */
-
-#define LP2_DELTA_EXIT_LATENCY (100) /* us -- for timer setting refresh time, should > 2us.
- Donnot modify this. */
-
-static s64 zx_idle_sleeptime = 0xffffffff;
-static struct cpuidle_driver *cur_idle_drv;
-
-#ifdef CONFIG_ZX_PM_DEBUG
-//extern struct zx_idle_stats idle_stats;
-#endif
-
-/*===================================================================
- *========= idle states description ==============================
- *===================================================================
- *========= LP3 -- wfi(target_residency = 5) =============
- *========= LP1 -- pwroff(target_residency = 5000) =============
- *===================================================================
- */
-static struct cpuidle_state zx29_cpuidle_set[] __initdata =
-{
- /* LP3 -- wfi */
- [ZX_IDLE_CSTATE_LP3] =
- {
- .enter = zx_enter_idle,
- .exit_latency = 2,
- .target_residency = 5,
- .flags = 0,
- .name = "LP3",
- .desc = "clock gating(WFI)",
- },
- /* LP2 -- POWEROFF */
- [ZX_IDLE_CSTATE_LP2] =
- {
- .enter = zx_enter_idle,
- .exit_latency = LP2_DEFAULT_EXIT_LATENCY,
- .target_residency = LP2_DEFAULT_EXIT_LATENCY+LP2_MIN_POWER_OFF_TIME,
- .flags = 0,
- .name = "LP2",
- .desc = "POWEROFF",
- },
-};
-
-int __init zx_fill_cpuidle_data(struct cpuidle_driver *drv)
-{
- int i, max_cpuidle_state;
-
- max_cpuidle_state = sizeof(zx29_cpuidle_set) / sizeof(struct cpuidle_state);
-
- for (i = 0; i < max_cpuidle_state; i++)
- memcpy(&drv->states[i], &zx29_cpuidle_set[i], sizeof(struct cpuidle_state));
-
- drv->safe_state_index = ZX_IDLE_CSTATE_LP3;
-
- cur_idle_drv = drv;
-
- return max_cpuidle_state;
-}
-
-
-/**
- * idle_update_sleep_param
- *
- * when exit from one lp2 level sleep, update the exit_latency/target_residency.
- */
-/* our idle exit lattency may */
-#if 0
-static unsigned int lp2_exit_latencies[MAX_CPU_NUM];
-static void idle_update_sleep_param(void)
-{
-
-}
-#endif
-/**
- * idle_set_sleeptime
- *
- * set the wakeup timer
- *
- * sleep_time (us)
- */
-extern void setup_timer_wakeup(s64 us);
-void idle_set_sleeptime(s64 sleep_time)
-{
- /* set timer */
- setup_timer_wakeup(sleep_time);
-
- zx_idle_sleeptime = sleep_time;
-}
-
-/**
- * idle_get_sleeptime
- *
- * for PCU sleeptime
- */
-s64 idle_get_sleeptime(void)
-{
- return zx_idle_sleeptime;
-}
-
-/**
- * idle_unmask_interrupt
- *
- *
- */
-static void idle_unmask_interrupt(void)
-{
-}
-
-static void idle_unmask_interrupt_restore(void)
-{
-}
-
-static unsigned int idle_get_exit_latency(int index)
-{
- struct cpuidle_state* state = &(cur_idle_drv->states[index]);
-
- return state->exit_latency;
-}
-
-/**
- * When enter deep sleep the tick timer maybe stopped for
- * 26M osc will be closed. So we stop tick before entering
- * deep sleep and get sleeping time, then we restart the
- * tick(minus the sleeping time).
- */
-static u64 idle_enter_time = 0;
-static void idle_pre_enter(void)
-{
- pm_stop_tick();
-
- idle_enter_time = read_persistent_us();
-}
-
-static void idle_post_enter(s64 rem_us)
-{
- u64 cur_time = read_persistent_us();
- s64 delta;
- u64 max_persist_us;
-
- if(cur_time >= idle_enter_time)
- delta = cur_time - idle_enter_time;
- else
- {
- max_persist_us = div64_u64((u64)(0x7fffffff)*USEC_PER_SEC, (u64)PERSISTENT_TIMER_CLOCK_RATE);
- delta = max_persist_us - idle_enter_time + cur_time;
- }
-
- if(delta > rem_us + LP2_DELTA_EXIT_LATENCY)
- delta -= rem_us;
- else
- delta = LP2_DELTA_EXIT_LATENCY;
-
- pm_start_tick(delta);
-}
-
-#define PM_IDLE_TRACE 0
-#if PM_IDLE_TRACE
-
-#define TRACE_IDLE_COUNT 1000
-
-typedef struct
-{
- s64 request;
- s64 enter_remainder;
- s64 exit_remainder;
-}pm_idle_trace_t;
-
-volatile pm_idle_trace_t pm_idle_view[TRACE_IDLE_COUNT];
-volatile unsigned int pm_idle_index = 0;
-
-void trace_pm_idle_enter(s64 req_t, s64 remainder_t)
-{
- pm_idle_view[pm_idle_index].request = req_t;
- pm_idle_view[pm_idle_index].enter_remainder = remainder_t;
-}
-
-void trace_pm_idle_exit(s64 remainder_t)
-{
- pm_idle_view[pm_idle_index].exit_remainder = remainder_t;
-
- pm_idle_index++;
- if(pm_idle_index==TRACE_IDLE_COUNT)
- pm_idle_index=0;
-}
-#else
-void trace_pm_idle_enter(s64 req_t, s64 remainder_t){}
-void trace_pm_idle_exit(s64 remainder_t){}
-#endif
-
-/**
- * zx_enter_deep_idle
- *
- * enter lp2 mode
- */
- s64 sleep_time = 0;
- s64 request = 0;
- s64 remainder_timer = 0;
- s64 enter_deep_idle_enter_cnt =0;
- s64 enter_deep_idle_exit_cnt =0;
-static int zx_enter_deep_idle(int index)
-{
- bool sleep_completed = false;
- pm_wake_reason_t wake_reason;
- ktime_t delta_next;
-
-
-#ifdef CONFIG_ZX_PM_DEBUG
- ktime_t entry_time, exit_time;
- s64 idle_time;
- unsigned int cpu = read_cpuid();
-
- //idle_stats.cpu_ready_count[cpu]++;
- // idle_stats.tear_down_count[cpu]++;
-
- entry_time = ktime_get();
-#endif
- enter_deep_idle_enter_cnt++;
-
- //s64 sleep_time;
- /*s64 */request = ktime_to_us(tick_nohz_get_sleep_length(&delta_next));
- //s64 remainder_timer;
-
- /* */
- idle_unmask_interrupt();
-
- /* set wakeup timer */
- remainder_timer = pm_get_remainder_time();
- sleep_time = request - idle_get_exit_latency(index);
- if ((sleep_time > LP2_DELTA_EXIT_LATENCY) && (sleep_time < remainder_timer))
- idle_set_sleeptime(sleep_time);
- else
- return zx_pm_idle_enter(ZX_IDLE_CSTATE_LP3);
-
- trace_pm_idle_enter(request, remainder_timer);
-
- idle_pre_enter();
-
-#ifdef CONFIG_ZX_PM_DEBUG
- //idle_stats.lp2_count[cpu]++;
-#endif
-
- /* sleep */
- zx_enter_sleep(CPU_SLEEP_TYPE_LP3); /*ÐÞ¸ÄΪOFF/sleepģʽ*/
-
- enter_deep_idle_exit_cnt++;// tmp
- idle_post_enter(remainder_timer);
-
- remainder_timer = pm_get_remainder_time();
- trace_pm_idle_exit(remainder_timer);
-
- /* get wakeup cause */
- wake_reason = pm_get_wakeup_reason();
- if (wake_reason != WR_WAKE_SRC_ABNORMAL)
- {
- sleep_completed = true;
- }
- else
- {
-#ifdef CONFIG_ZX_PM_DEBUG
- int irq = 0;
- irq = zx29_gic_pending_interrupt();
- //idle_stats.lp2_int_count[irq]++;
-#endif
- }
-
- /* */
- idle_unmask_interrupt_restore();
-/*=================================================================
- *=======end enter deep sleep======================================
- *=================================================================
- */
-#ifdef CONFIG_ZX_PM_DEBUG
- exit_time = ktime_get();
- idle_time = ktime_to_us(ktime_sub(exit_time, entry_time));
-
- //idle_stats.cpu_wants_lp2_time[cpu] += idle_time;
- //idle_stats.in_lp2_time[cpu] += idle_time;
-
- //if (sleep_completed)
- //idle_stats.lp2_completed_count[cpu]++;
-#endif
-
- return index;
-}
-
-/**
- * zx_enter_lowpower - Programs cpu to enter the specified state
- * @dev: cpuidle device
- * @state: The target state to be programmed
- *
- * Called from the CPUidle framework to program the device to the
- * specified low power state selected by the governor.
- * Called with irqs off, returns with irqs on.
- * Returns the amount of time spent in the low power state.
- */
-int zx_pm_idle_enter(int index)
-{
-#ifdef CONFIG_ZX_PM_DEBUG
- //idle_stats.idle_count++;
-#endif
- if(ZX_IDLE_CSTATE_LP2 == index)
- {
- return zx_enter_deep_idle(index);
- }
- else
- {
-#ifdef CONFIG_ZX_PM_DEBUG
- unsigned cpu = read_cpuid();
- // idle_stats.lp3_count[cpu]++;
-#endif
- //gpio_direction_output(ZX29_GPIO_35, GPIO_HIGH);
- cpu_do_idle();
- //gpio_direction_output(ZX29_GPIO_35, GPIO_LOW);
- return ZX_IDLE_CSTATE_LP3;
- }
-}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-pm.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-pm.c
deleted file mode 100644
index 109c0ff..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-pm.c
+++ /dev/null
@@ -1,332 +0,0 @@
-/*
- * ZTE power management common driver
- *
- * Copyright (C) 2015 ZTE Ltd.
- * by zxp
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/suspend.h>
-#include <linux/tick.h>
-
-#include "zx-pm.h"
-
-
-
-
-static unsigned int pm_enter_flag = false;
-
-unsigned int pm_get_sleep_flag(void)
-{
- return pm_enter_flag;
-}
-
-/**
- * config pcu before enter lp mode.
- *
- */
-void pm_set_pcu(void)
-{
- cpu_sleep_type_t sleep_type;
- u32 sleep_time;
-
- sleep_type = pm_get_sleep_type();
- sleep_time = pm_get_sleep_time();
-
- if(CPU_SLEEP_TYPE_LP1 == sleep_type)
- {
- pm_set_pcu_poweroff(sleep_time);
- }
- else if(CPU_SLEEP_TYPE_LP3 == sleep_type)
- {
- pm_set_pcu_sleep(sleep_time);
- }
- else
- WARN_ON(1);
-}
-
-/**
- * get sleep_time helper function.
- * used for idle sleep type.
- *
- * This code only used pm internel.
- *
- * return : unit is 26M cycle(38.4ns)
- * note: the max value is 0x7FFFFFFF (about 82.5s)
- */
-u32 pm_get_sleep_time(void)
-{
-#ifdef CONFIG_CPU_IDLE
- if(pm_enter_flag == false) {
- if(idle_get_sleeptime() >=(82500000) )
- return 0xffffffff;
- else
- return (u32)(idle_get_sleeptime()*26);
- }
- else
- return 0xffffffff;
-#else
- return 0xffffffff;
-#endif
-}
-
-/*=============================================================================
- *======== zx297520v2 CRM driver ===============================================
- *=============================================================================
- */
-typedef struct
-{
- /* 0x00 */ const volatile unsigned version;
- /* 0x04 */ volatile unsigned clkdiv;
- /* 0x08 */ volatile unsigned clken;
- char padding1[0x4];
- /* 0x10 */ volatile unsigned rsten;
- char padding2[0xC];
- /* 0x20 */ volatile unsigned gate_clk;
- char padding3[0x2C];
- /* 0x50 */ volatile unsigned int_mode[14];
-} crm_registers;
-
-typedef struct
-{
- unsigned int clkdiv;
- unsigned int clken;
- unsigned int rsten;
- unsigned int gate_clk;
- unsigned int int_mode[14];
-} crm_context;
-
-/**
- * save & restore CRM register interface for zx297520v2.
- *
- */
-void zx29_save_crm(u32 *pointer, u32 crm_base)
-{
-#ifdef CONFIG_ARCH_ZX297520V2 // 7520V2
- crm_registers *crm = (crm_registers *)crm_base;
- crm_context *context = (crm_context *)pointer;
-
- context->clkdiv = crm->clkdiv;
- context->clken = crm->clken;
- context->rsten = crm->rsten;
- context->gate_clk = crm->gate_clk;
- copy_words(context->int_mode, crm->int_mode, 14);
-#else
- pointer =copy_words(pointer,(volatile unsigned int*)(crm_base+0x78), 10); // 0x78-0xa0;
- pointer =copy_words(pointer,(volatile unsigned int*)(crm_base+0xB0), 1); // probe
-
-#endif
-}
-
-void zx29_restore_crm(u32 *pointer, u32 crm_base)
-{
-#ifdef CONFIG_ARCH_ZX297520V2 //7520V2
- crm_registers *crm = (crm_registers *)crm_base;
- crm_context *context = (crm_context *)pointer;
-
- crm->clkdiv = context->clkdiv;
- crm->clken = context->clken;
- crm->rsten = context->rsten;
- crm->gate_clk = context->gate_clk;
-
- copy_words(crm->int_mode, context->int_mode, 14);
-#else
- copy_words((volatile unsigned int*)(crm_base+0x78), (pointer), 10); // 0x78-0xa0;
- pointer += 10;
- copy_words((volatile unsigned int*)(crm_base+0xB0), (pointer), 1); // probe
- pointer += 1;
-#endif
-}
-
-/*=============================================================================
- *======== zx297520v2 PM&IDLE ==================================================
- *=============================================================================
- */
-static inline int pm_start_wake_timer(s64 us)
-{
- /* 1 cycle == 1/32768(s)*/
- /* max setting value = 0xffffffff/32768 = 131072s = 36h */
- unsigned long cycles = div64_long(us*32768, 1000000);
-
- zx29_set_wake_timer(cycles);
-
- return 0;
-}
-
-void setup_timer_wakeup(s64 us)
-{
- pm_start_wake_timer(us);
-}
-
-unsigned int zx29_gic_pending_interrupt(void)
-{
-#ifdef CONFIG_ARCH_ZX297520V2
- return gic_get_cur_pending((unsigned int)GIC_CPU_BASE);
-#else
- return gic_get_cur_pending((unsigned int)ZX_GICC_BASE);//fiy
-#endif
-}
-
-s64 pm_get_remainder_time(void)
-{
-#if 0 // zxp
- return div64_long(((s64)read_timer_clk(CLOCKEVENT_BASE))*1000000, EVENT_CLOCK_RATE);
-#else
- return 0;
-#endif
-}
-
-void pm_stop_tick(void)
-{
-#if 0 // zxp
- timer_stop(CLOCKEVENT_BASE);
-#endif
-}
-u32 pm_read_tick(void)
-{
-#if 0 // zxp
- return read_timer_clk(CLOCKEVENT_BASE);
-#else
- return 0;
-#endif
-}
-void pm_restart_tick(u32 cycles)
-{
-#if 0 // zxp
- timer_set_load(CLOCKEVENT_BASE,cycles);
- timer_start(CLOCKEVENT_BASE);
-#endif
-
-}
-
-void pm_start_tick(u64 us)
-{
-#if 0 // zxp
- unsigned long cycles = div64_long(us*EVENT_CLOCK_RATE, 1000000);
- struct clock_event_device *dev = __this_cpu_read(tick_cpu_device.evtdev);
- ktime_t expires;
-
-#if 0
- dev->set_next_event(cycles, dev);
-#else
- expires = ktime_add_ns(ktime_get(), us*1000);
- clockevents_program_event(dev, expires, 1);
-#endif
- timer_start(CLOCKEVENT_BASE);
-#endif
-}
-
-unsigned int pm_dma_used(void)
-{
-#ifdef CONFIG_ZX29_DMA
- return zx29_dma_get_status();
-#else
- return 0;
-#endif
-}
-
-/*=============================================================================
- *======== zx297520v2 DEBUG UART ===============================================
- *====== note: uart is in wakeup powerdomain =================================
- *=============================================================================
- */
-
-static struct zx_suspend_context suspend_context;
-
-
-void pm_mask_tick(void);
-void pm_unmask_tick(void);
-/* we use ap_timer1 as idle wakeup source when poweroff */
-void zx_pm_pre_suspend(void)
-{
-// setup_timer_wakeup(__SLEEP_TIME_1h__*18);//
- pm_mask_tick();
-
- pm_enter_flag = true;
-}
-
-void zx_pm_post_suspend(void)
-{
-// zx29_stop_wake_timer();
-
- pm_unmask_tick();
-
- pm_enter_flag = false;
-}
-
-static unsigned int at_command_read_flag = 0;
-static unsigned int pm_mask_info = 0;
-void pm_debug_mask_info_init(void)
-{
-// pm_mask_info = 0; /* should get value from iram */
- pm_get_mask_info();
- pm_ram_log("pm_mask_info=(%8lu)\n", pm_mask_info);
-}
-
-unsigned int pm_get_mask_info(void)
-{
- if(at_command_read_flag != AT_COMMAND_READ_FLAG)
- {
- at_command_read_flag = zx_read_reg(IRAM_AT_COMMAND_ADDR + 0x10);
- if(at_command_read_flag == AT_COMMAND_READ_FLAG)
- {
- pm_mask_info = zx_read_reg(IRAM_AT_COMMAND_ADDR + 0x4);
- if((zx_read_reg(IRAM_AT_COMMAND_ADDR)&PM_ALL_NO_SLEEP)||(pm_mask_info&PM_NO_SLEEP))//AP²»½øË¯ÃßÁ÷³Ì
- {
- pm_mask_info |= PM_IDLE_WFI;
- }
- }
- }
-
- return pm_mask_info;
-}
-
-bool pm_disable_suspend(void)
-{
- return (pm_get_mask_info()&PM_NO_SUSPEND);
-}
-
-void pm_init_acs(void)
-{
-#ifdef CONFIG_ARCH_ZX297520V2
- zx_set_reg(AP_CORE_SEL_ADDR, L2_STOPPED_SEL_EN|CORE_ACS_CLK_SEL_EN);
-#else
- //zx_clr_reg(AP_CORE_CLK_GATE_ADDR, AP_PROBE_GATE_EN|AP_PMC_GTAE_EN|AP_PROBE_BYPASS_EN);
- // zx_set_reg(AP_CORE_SEL_ADDR, CORE_ACS_CLK_SEL_EN);
-
- /*Ö§³ÖACS clk sel default 26M*/
- //zx_set_reg(AP_CORE_SEL_ADDR, /*L2_STOPPED_SEL_EN|*/CORE_ACS_CLK_SEL_EN);
- /* clk×Ô¶¯ÃÅ¿Ø*/
- //zx_set_reg(AP_AXI_CLKEN_ADDR, AP_TODDR_CLKEN_AUTO|AP_TOMATRIX_CLKEN_AUTO);
-#endif
-}
-
-u64 read_persistent_us(void)
-{
- struct timespec64 ts;
- u64 temp;
-
- read_persistent_clock64(&ts);
- temp = timespec64_to_ns(&ts);
- do_div(temp, 100);
-
- return temp;
-}
-
-struct zx_pm_ctx pm_ctx = {0};
-void pm_init_resource(void)
-{
- pm_ctx.gic_dist_base = ioremap(0xF2000000 ,0x40000);
- pm_ctx.gic_redist_base = ioremap(0xF2040000 ,0x40000);
- pm_ctx.gicc_base = ioremap(0x02900000 ,0x100000);
- pm_ctx.iram1_base = ioremap(0x100000 ,64*1024);
- pm_ctx.ap_peri_base = ioremap(0xF2200000 ,64*0x100000);
- pm_ctx.ap_crm_base = pm_ctx.ap_peri_base + 0x2000;
- pm_ctx.matrix_crm_base = get_stdcrm_base();
-}
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-pm.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-pm.h
deleted file mode 100644
index 02a1bb7..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/power/zx29-pm.h
+++ /dev/null
@@ -1,329 +0,0 @@
-/*
- * zx297520v2-pm.h - zx297520v2 power management interface.
- *
- * Written by zxp.
- *
- */
-
-#ifndef _ZX29_PM_H
-#define _ZX29_PM_H
-
-#define GIC_DIST_BASE (pm_ctx.gic_dist_base)
-#define GIC_REDIST_BASE (pm_ctx.gic_redist_base)
-#define ZX_GICC_BASE (pm_ctx.gicc_base)
-#define ZX_IRAM1_BASE (pm_ctx.iram1_base)
-#define ZX29_IRAM1_PHYS (0x100000)
-#define AP_CRM_BASE (pm_ctx.ap_crm_base)
-#define AP_PERI_BASE (pm_ctx.ap_peri_base)
-#define ZX29_AP_PERIPHERAL_PHYS (0xF2200000)
-#define ZX_MATRIX_CRM_BASE (pm_ctx.matrix_crm_base)
-
-
-#define PERSISTENT_TIMER_CLOCK_RATE (32768)
-
-
-#define pm_reg_sync_write zx_reg_sync_write
-#define pm_read_reg zx_read_reg
-#define pm_write_reg zx_write_reg
-#define pm_set_reg zx_set_reg
-#define pm_clr_reg zx_clr_reg
-#define pm_reg_sync_write_16 zx_reg_sync_write_16
-#define pm_read_reg_16 zx_read_reg_16
-#define pm_write_reg_16 zx_write_reg_16
-
-#define ZX_A9_PERIPHERAL_PHYS (ZX29_A9_PERIPHERAL_PHYS)
-#define A9_CRM_PHYS (ZX_A9_PERIPHERAL_PHYS + 0x3000)
-#define ZX_L2CACHE_CONFIG_PHYS (ZX29_L2CACHE_CONFIG_PHYS)
-
-#define INVALID_INT_NUM (0xFFFF)
-
-#define __SLEEP_TIME_1s__ ((s64)(1000000))
-#define __SLEEP_TIME_1m__ (__SLEEP_TIME_1s__*60)
-#define __SLEEP_TIME_1h__ (__SLEEP_TIME_1m__*60)
-#define __MAX_SLEEP_TIME__ (__SLEEP_TIME_1h__*18)
-
-/* iram1 is for axi_freq and debug, data will not lost when system died */
-/*===================================================================
- *== iram1 address allocation =====================================
- *===================================================================
- *========= 0x2000 ~~ 0x2FFF : AP debug ram ===================
- *========= 0x3000 ~~ 0x37FF : common use ===================
- *========= 0x30A0 ~~ 0x30AF : at command ===================
- *========= 0x3140 ~~ 0x316F : ddr freq area ===================
- *========= 0x3170 ~~ 0x318F : axi freq area ===================
- *========= 0x3190 ~~ 0x31bF : dvs area ===================
- *===================================================================
- */
-
-#define IRAM_PM_BASE (ZX_IRAM1_BASE + 0x2000) /*0x00102000*/
-
-#define IRAM_AP_DEBUG_ADDR (IRAM_PM_BASE + 0x400) /*0x00102400/0x00100400*/
-
-#define IRAM_AP_DEBUG_LEN (0x1000)/*4K*/
-
-
-#define IRAM_COMMON_USE_ADDR (ZX_IRAM1_BASE + 0x1000)/*0x00101000 for psm flag*/
-
-//#define IRAM_COMMON_USE_LEN (0x800)
-
-#define IRAM_PS_SLEEP_FLAG_ADDR (IRAM_COMMON_USE_ADDR + 0x30)
-#define IRAM_AT_COMMAND_ADDR (IRAM_COMMON_USE_ADDR + 0xA0)
-#define IRAM_AP_DRV_FLAG_BASE (IRAM_COMMON_USE_ADDR + 0x58) /* USB FLAG TO PROXY */
-
-#define IRAM_CHANGE_DDR_BASE (IRAM_COMMON_USE_ADDR + 0x140)
-#define IRAM_CHANGE_AXI_BASE (IRAM_COMMON_USE_ADDR + 0x180)
-#define IRAM_CHANGE_DVS_BASE (IRAM_COMMON_USE_ADDR + 0x1a0) /* TBD */
-
-#define AP_SUSPEND_FOR_POWEROFF_CNT (IRAM_COMMON_USE_ADDR + 0x114)
-#define AP_SLEEP_TIME_ADDR (IRAM_COMMON_USE_ADDR + 0x134)
-
-/*test flag*/
-#define IRAM_ADDR_FOR_SLEEP_CNT (IRAM_AP_DEBUG_ADDR + 0x0)
-#define IRAM_ADDR_FOR_WAKE_CNT (IRAM_AP_DEBUG_ADDR + 0x4)
-#define SLEEP_TIME_ADDR (IRAM_AP_DEBUG_ADDR + 0x8)//(SYSTEM_WAKEUP_ADDR + 0x8)
-#define AP_SUSPEND_STATUS_FLAG (IRAM_AP_DEBUG_ADDR + 0xC)
-#define AP_SUSPEND_FOR_SLEEP_CNT (IRAM_AP_DEBUG_ADDR + 0x10)
-#define AP_IDLE_SLEEP_STATUS_FLAG (IRAM_AP_DEBUG_ADDR + 0x14)
-
-
-
-//#define SUSPEND_START_TIME_ADDR (IRAM_AP_DEBUG_ADDR + 0x10)
-//#define SUSPEND_SAVE_TIME_ADDR (IRAM_AP_DEBUG_ADDR + 0x14)
-//#define SUSPEND_RESTORE_TIME_ADDR (IRAM_AP_DEBUG_ADDR + 0x18)
-
-/*
- * flag : m0 set 0 when get request, ap set 1 to request m0
- * target : ap axi target, defined by zx297510_axi_freq
- * cur : current axi freq, defined by zx297510_axi_freq
- * ack : m0 set 1 when done request, ap set 0 before new request
-**/
-typedef struct
-{
- /* 0x00 */ volatile unsigned int ps_req_flag;
- /* 0x04 */ volatile unsigned int ps_exp_freq;
-
- /* 0x08 */ volatile unsigned int phy_req_flag;
- /* 0x0C */ volatile unsigned int phy_exp_freq;
-
- /* 0x10 */ volatile unsigned int ap_req_flag;
- /* 0x14 */ volatile unsigned int ap_exp_freq;
-
- /* 0x18 */ volatile unsigned int cur_freq;
-
-}axi_freq_regs;
-
-typedef struct
-{
- /* 0x00 */ volatile unsigned int ps_req_flag;
- /* 0x04 */ volatile unsigned int ps_exp_vol;
-
- /* 0x08 */ volatile unsigned int phy_req_flag;
- /* 0x0C */ volatile unsigned int phy_exp_vol;
-
- /* 0x10 */ volatile unsigned int ap_req_flag;
- /* 0x14 */ volatile unsigned int ap_exp_vol;
-
- /* 0x18 */ volatile unsigned int cur_vol;
-
-}vol_dvs_regs;
-
-typedef struct
-{
- /* 0x00 */ volatile unsigned int ps_req_flag;
- /* 0x04 */ volatile unsigned int ps_ack_flag;
- /* 0x08 */ volatile unsigned int ps_exp_freq;
-
- /* 0x0C */ volatile unsigned int phy_req_flag;
- /* 0x10 */ volatile unsigned int phy_ack_flag;
- /* 0x14 */ volatile unsigned int phy_exp_freq;
-
- /* 0x18 */ volatile unsigned int ap_req_flag;
- /* 0x1C */ volatile unsigned int ap_ack_flag;
- /* 0x20 */ volatile unsigned int ap_exp_freq;
-
- /* 0x24 */ volatile unsigned int cur_freq;
- /* 0x28 */ volatile unsigned int status;
-}ddr_freq_regs;
-
-/* pm mask flag for test */
-#define AT_COMMAND_READ_FLAG (0x49435001)
-#define AXI_VOL_CHANGE_ICP_BUF (0x49435002)
-
-#define PM_ALL_NO_SLEEP (0x1)
-#define PM_NO_SLEEP (0x1)
-#define PM_IDLE_WFI (0x1)
-#define PM_SLEEP_FLAG_PRINT (0x200)
-#define PM_NO_SUSPEND (0x40000)
-#define PM_SUSPEND_WFI (0x80000)
-#define PM_NO_AXI_FREQ (0x100000)
-
-/*===================================================================
- *== iram address allocation ======================================
- *===================================================================
- *========= 0 ~~ 0x1FF : wakeup code area ===================
- *========= 0x200 ~~ 0x27F : code area_1 ===================
- *========= 0x280 ~~ 0x2ff : code area_2 ===================
- *========= 0x300 ~~ 0x33f : debug area ===================
- *========= 0x340 ~~ 999 : reserved[0] ===================
- *========= 1000 ~~ 1003 : code addr[0] ===================
- *========= 1004 ~~ 1023 : reserved[1] ===================
- *===================================================================
- */
-#define ioremap_mem(cookie,size) __arm_ioremap((cookie), (size), MT_MEMORY)
-
-#define SYSTEM_WAKEUP_ADDR (ZX29_IRAM1_PHYS + 0x2000)//cap
-
-#define WAKEUP_CODE_LENGTH (0x200)
-#define SLEEP_CODE_LENGTH (0x80)
-#define DDR_DFS_CODE_LENGTH (0x80)
-
-typedef struct
-{
- /* 0x000 */ unsigned char wakeup_code[WAKEUP_CODE_LENGTH];
- /* 0x200 */ unsigned char sleep_code[SLEEP_CODE_LENGTH];
- /* 0x280 */ unsigned char ddr_dfs_code[DDR_DFS_CODE_LENGTH];
- /* 0x300 */ char padding1[1000-0x300];
- /* 1000 */ unsigned int reset_handler_vaddr;
- /* 1004 */ char padding2[20];
-} wakeup_ram_area;
-
-#define AP_CORE_SEL_ADDR (ZX_MATRIX_CRM_BASE + 0x40)
-
-#define CORE_ACS_CLK_SEL_EN (1<<8)
-#ifdef CONFIG_ARCH_ZX297520V2
-#define L2_STOPPED_SEL_EN (1<<9) /*a53 not has*/
-#else
-#define AP_AXI_CLKEN_ADDR (ZX_MATRIX_CRM_BASE + 0x44)
-#define AP_TODDR_CLKEN_AUTO (1<<5)
-#define AP_TOMATRIX_CLKEN_AUTO (1<<4)
-
-#define PS_MATRIX_AXI_SEL (ZX_MATRIX_CRM_BASE + 0x120)
-#define AP_MATRIX_AXI_SEL (ZX_MATRIX_CRM_BASE + 0x124)
-#define AP_DDR_FFC_SEL (ZX_DDR_FFC_BASE + 0x220)
-#define AP_DDR_FFC_SEL_SYNC (ZX_DDR_FFC_BASE + 0x210)
-
-
-
-
-#define AP_CORE_CLK_GATE_ADDR (AP_CRM_BASE+0xB0)
-#define AP_PROBE_GATE_EN (1<<8)
-#define AP_PMC_GTAE_EN (1<<3)
-#define AP_PROBE_BYPASS_EN (1<<15)
-#endif
-
-/* copied from zx29_uart.h */
-#define ZX29_UART0_VA (ZX_UART0_BASE)
-#define ZX29_UART1_VA (ZX_UART1_BASE)
-
-#define ZX29_UART_IBRD 0x24 /* Integer baud rate divisor register. */
-#define ZX29_UART_FBRD 0x28 /* Fractional baud rate divisor register. */
-#define ZX29_UART_LCRH 0x30 /* Line control register. */
-#define ZX29_UART_CR 0x34 /* Control register. */
-#define ZX29_UART_IFLS 0x38 /* Interrupt fifo level select. */
-#define ZX29_UART_IMSC 0x40 /* Interrupt mask. */
-#define ZX29_UART_ICR 0x4c /* Interrupt clear register. */
-#define ZX29_UART_DMACR 0x50 /* DMA control register. */
-
-/*------ uart control reg -----*/
-#define UART_CR_CTSEN (1<<15) /* CTS hardware flow control */
-#define UART_CR_RTSEN (1<<14) /* RTS hardware flow control */
-#define UART_CR_OUT2 (1<<13) /* OUT2 */
-#define UART_CR_OUT1 (1<<12) /* OUT1 */
-#define UART_CR_RTS (1<<11) /* RTS */
-#define UART_CR_DTR (1<<10) /* DTR */
-#define UART_CR_RXE (1<<9) /* receive enable */
-#define UART_CR_TXE (1<<8) /* transmit enable */
-#define UART_CR_LBE (1<<7) /* loopback enable */
-#define UART_CR_SIRLP (1<<2) /* SIR low power mode */
-#define UART_CR_SIREN (1<<1) /* SIR enable */
-#define UART_CR_UARTEN (1<<0) /* UART enable */
-
-struct zx_uart_context
-{
- unsigned int ibrd; /*0x24 Integer baud rate divisor register. */
- unsigned int fbrd; /*0x28 Fractional baud rate divisor register. */
- unsigned int lcrh; /*0x30 Line control register. */
- unsigned int cr; /*0x34 Control register. */
- unsigned int ifls; /*0x38 Interrupt fifo level select. */
- unsigned int imsc; /*0x40 Interrupt mask. */
- unsigned int dmacr; /*0x50 DMA control register. */
-};
-
-struct zx_timer_context
-{
- unsigned int cfg; /*0x04 config register. */
- unsigned int load; /*0x08 load register. */
- unsigned int start; /*0x0C timer start register. */
- unsigned int count; /*0x18 current counter register. */
-};
-
-/* for device or sw to restore */
-struct zx_suspend_context
-{
- struct zx_uart_context uart;
- struct zx_timer_context timer;
-};
-
-struct zx_pm_ctx {
- void __iomem *gic_dist_base;
- void __iomem *gic_redist_base;
- void __iomem *gicc_base;
- void __iomem *iram1_base;
- void __iomem *ap_peri_base;
- void __iomem *ap_crm_base;
- void __iomem *matrix_crm_base;
-};
-
-extern struct zx_pm_ctx pm_ctx;
-
-/*used as pm common interface*/
-void pm_set_pcu(void);
-
-extern void zx29_save_crm(u32 *pointer, u32 crm_base);
-extern void zx29_restore_crm(u32 *pointer, u32 crm_base);
-
-extern void pm_stop_tick(void);
-extern u32 pm_read_tick(void);
-extern void pm_restart_tick(u32 cycles);
-extern void pm_start_tick(u64 us);
-extern s64 pm_get_remainder_time(void);
-extern void setup_timer_wakeup(s64 us);
-extern void zx29_set_wake_timer(unsigned long cycles);
-extern void zx29_stop_wake_timer(void);
-extern u64 read_persistent_us(void);
-extern unsigned int pm_dma_used(void);
-
-extern unsigned pm_get_wakeup_int_no(void);
-extern char * pm_get_wakeup_int_name(void);
-extern void pm_get_wake_cause(void);
-extern unsigned int pm_get_wakesource(void);
-
-extern void __iomem *debug_uart_base(void);
-extern void debug_uart_suspend(void);
-extern void debug_uart_resume(void);
-
-extern void pm_timer_suspend(void);
-extern void pm_timer_resume(void);
-
-extern void zx_pm_pre_suspend(void);
-extern void zx_pm_post_suspend(void);
-
-#define zx_set_pcu pm_set_pcu
-#define zx_clear_pcu pm_clear_pcu
-
-#define save_crm zx29_save_crm
-#define restore_crm zx29_restore_crm
-
-#define zx_unmask_wakeup_interrupt()
-#define zx_interrupt_mask_restore()
-
-extern void pm_debug_mask_info_init(void);
-extern unsigned int pm_get_mask_info(void);
-
-void pm_init_acs(void);
-void pm_init_resource(void);
-unsigned int zx29_gic_pending_interrupt(void);
-void zx_apmgclken_set(unsigned en);
-int zx29_cpufreq_init(void);
-
-#endif /*_ZX297520V2_PM_H*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/Kconfig
deleted file mode 100644
index 69f818a..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# rpmsg options
-#
-config ZTE_RPMSG
- bool "zte remote processor message support(rpmsg)"
- depends on ARCH_ZX298501 || ARCH_ZX2AA800 || ARCH_ZX297520V3
-
-config ZX29_ICP
- bool "zx29 icp support"
- depends on ZTE_RPMSG
- depends on ARCH_ZX298501 || ARCH_ZX297520V3
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/Makefile b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/Makefile
deleted file mode 100644
index 9490f7b..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the rpmsg drivers
-#
-
-obj-$(CONFIG_ZTE_RPMSG) += icp_rpmsg.o icp_rpmsg_linux.o icp_test.o icp_dev.o rpmsg.o
-obj-$(CONFIG_ZX29_ICP) += zx29_icp.o
-
-#
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/hal_icp_i.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/hal_icp_i.h
deleted file mode 100644
index bc57a8b..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/hal_icp_i.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*---------------------------------------------------------------------------------------------------------------------
- * °æÈ¨ËùÓÐ(C)2000-2010, ÖÐÐËͨѶ¹É·ÝÓÐÏÞ¹«Ë¾
- *
- * ÎÄ ¼þ Ãû: hal_icp_i.h
- *
- * ×÷ Õß: 00081983
- *
- * ½Ó¿ÚÃèÊö:
- * ICPÄ£¿éDRV²ãµÄÄÚ²¿Í·Îļþ
- *
- * °æ ±¾: v0.0
- *
- * ------------------------------------------------------------------------------------------------------------------
- *
- * ÐÞ¸ÄÈÕÆÚ ÐÞ¸ÄÈË ÐÞ¸ÄÄÚÈÝ
- * @li 20110518 00081983 ´´½¨
- *
- *-------------------------------------------------------------------------------------------------------------------*/
-
-/**
- * @addtogroup HAL_ICP_I
- * @{
- */
-
-#ifndef _HAL_ICP_I_H
-#define _HAL_ICP_I_H
-
-/* *INDENT-OFF* */
-#ifdef __cplusplus
-extern "C" {
-#endif
-/* *INDENT-ON* */
-
-
-/** ICPÄ£¿éDRV²ãµ÷ÊÔ¿ª¹Øºê */
-#define HAL_ICP_DEBUG
-
-
-
-#if 1 /* ´óС¶Ë˳Ðòת»» */
-#define HAL_ICP_ENDIAN_SWAP(x) (UINT32)( (((x) >> 24) & 0xFF) \
- | ((((x) >> 16) & 0xFF) << 8) \
- | ((((x) >> 8) & 0xFF) << 16) \
- | (((x) & 0xFF) << 24) \
- )
-#else
-#define HAL_ICP_ENDIAN_SWAP(x) (x)
-#endif
-
-
-
-/* ¼Ä´æÆ÷λÓò²Ù×÷ */
-
-/* Ϊij¸ö×Ö¶ÎÉèÖÃij¸öÖµ£¬ÆäËû×Ö¶ÎΪ0 (the Field MaKe macro) */
-#define HAL_FMK(PER_REG_FIELD, val) \
- (((val) << PER_REG_FIELD##_POS) & PER_REG_FIELD##_MASK)
-
-/* ÌáÈ¡¼Ä´æÆ÷ij¸ö×ֶεÄÖµ(the Field EXTract macro) */
-#define HAL_FEXT(reg, PER_REG_FIELD) \
- (((reg) & PER_REG_FIELD##_MASK) >> PER_REG_FIELD##_POS)
-
-/* ÔڼĴæÆ÷ij¸ö×ֶβåÈëij¸öÖµ£¬ÆäËû×ֶεÄÖµ±£³Ö²»±ä(the Field INSert macro) */
-#define HAL_FINS(reg, PER_REG_FIELD, val) \
- ((reg) = ((reg) & ~PER_REG_FIELD##_MASK) \
- | HAL_FMK(PER_REG_FIELD, val))
-
-
-/* ¼Ä´æÆ÷µ¥bitλ²Ù×÷ */
-
-/* ijbitÖÃ룬ÆäËübit²»±ä */
-#define HAL_BIT_SET(reg, bit) ((reg) = ((reg) | (1u << (bit))))
-
-/* ijbitÇåÁ㣬ÆäËübit²»±ä */
-#define HAL_BIT_CLEAR(reg, bit) ((reg) = ((reg) & (~(1u << (bit)))))
-
-/* »ñȡijbitµÄÖµ (0/1) */
-#define HAL_GET_BIT_VAL(reg, bit) (((reg)>> (bit)) & 1u)
-
-/* ÅжÏijbitµÄÖµÊÇ·ñΪ1 */
-#define HAL_IS_BIT_SET(reg, pos) (((reg) & (1u << (pos))) != 0x0u)
-
-/* ÅжÏijbitµÄÖµÊÇ·ñΪ0 */
-#define HAL_IS_BIT_CLEAR(reg, pos) (((reg) & (1u << (pos))) == 0x0u)
-
-/* ijbitλÌîдֵval,ÆäËûbit²»±ä */
-#define HAL_BIT_INSR(reg, bit, val) \
- ((reg) = (((reg) & (~(1u << (bit)))) | (((val) & 1u) << (bit))))
-
-
-
-
-
-/* *INDENT-OFF* */
-#ifdef __cplusplus
-}
-#endif
-/* *INDENT-ON* */
-
-#endif /* _HAL_ICP_I_H */
-
-/** @} */
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp.h
deleted file mode 100644
index 0a813a7..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*---------------------------------------------------------------------------------------------------------------------
- * °æÈ¨ËùÓÐ(C)2000-2017, ÖÐÐËͨѶ¹É·ÝÓÐÏÞ¹«Ë¾
- *
- * ÎÄ ¼þ Ãû: icp.h
- *
- *
- * ½Ó¿ÚÃèÊö:
- * ICPÄ£¿éµÄ¼Ä´æÆ÷Í·Îļþ
- *
- * °æ ±¾: v0.0
- *
- *
- *-------------------------------------------------------------------------------------------------------------------*/
-
-
-#ifndef _ICP_H
-#define _ICP_H
-
-#ifdef CONFIG_ZX298501_ICP
-#include "zx298501_icp.h"
-#endif
-
-#endif /* _ICP_H */
-
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_dev.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_dev.c
deleted file mode 100644
index 5157ad5..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_dev.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/**
- * @file icp_dev.c
- * @sub-layer between rpmsg and icp driver
- *
- * Copyright (C) 2017 Sanechips Technology Co., Ltd.
- * @author Qing Wang
- * @ingroup
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- */
-
-/*******************************************************************************
- * Include header files *
-
- ******************************************************************************/
-#include "icp_rpmsg.h"
-#include "icp_dev.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-static t_icpdev_ops *icpdev_ops;
-
-/**-------------------------------------------------------------------------------------------------------------------@n
- * @brief Ô´ºËÏòÄ¿±êºË·¢ËÍÏûÏ¢¡£
- *
- *
- *--------------------------------------------------------------------------------------------------------------------*/
-int icpdev_send_message(u32 actor_id, icp_msg *icp_msg)
-{
- int ret = -ENODEV;
-
- if (icpdev_ops)
- ret = icpdev_ops->send_message(actor_id, icp_msg);
-
- return ret;
-}
-
-int icpdev_mask_int(T_RpMsg_CoreID actor_id, T_RpMsg_ChID ch_id)
-{
- int ret = -ENODEV;
-
- if (icpdev_ops)
- ret = icpdev_ops->mask_int(actor_id, ch_id);
-
- return ret;
-}
-
-int icpdev_set_int(T_RpMsg_CoreID actor_id, T_RpMsg_ChID ch_id)
-{
- int ret = -ENODEV;
-
- if (icpdev_ops)
- ret = icpdev_ops->set_int(actor_id, ch_id);
-
- return ret;
-}
-
-int icpdev_unmask_int(T_RpMsg_CoreID actor_id, T_RpMsg_ChID ch_id)
-{
- int ret = -ENODEV;
-
- if (icpdev_ops)
- ret = icpdev_ops->unmask_int(actor_id, ch_id);
-
- return ret;
-}
-
-void icpdev_register_callback(icp_callback_fn cb)
-{
- if (icpdev_ops)
- icpdev_ops->register_callback(cb);
-}
-
-void icpdev_register_ops(t_icpdev_ops *ops)
-{
- icpdev_ops = ops;
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_dev.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_dev.h
deleted file mode 100644
index 162e8e2..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_dev.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*---------------------------------------------------------------------------------------------------------------------
- * °æÈ¨ËùÓÐ(C)2000-2017, ÖÐÐËͨѶ¹É·ÝÓÐÏÞ¹«Ë¾
- *
- * ÎÄ ¼þ Ãû: icp_dev.h
- *
- *
- * ½Ó¿ÚÃèÊö:
- * ICP device interface
- *
- * °æ ±¾: v0.0
- *
- *
- *-------------------------------------------------------------------------------------------------------------------*/
-
-
-#ifndef _ICP_DEV_H
-#define _ICP_DEV_H
-
-#include "icp_rpmsg_osa.h"
-#include <linux/soc/zte/rpmsg.h>
-
-typedef void (*icp_callback_fn)(void *data);
-
-typedef struct
-{
- u32 src_id;
- u32 event_id;
- u32 dest_core;
-} icp_msg;
-
-/*
-* this struct presents the operation method
-* and state of interrupt controller chip
-*/
-typedef struct _t_icpdev_ops
-{
- void (*register_callback)(icp_callback_fn cb);
- int (*set_int)(T_RpMsg_CoreID actor_id, T_RpMsg_ChID ch_id);
- int (*mask_int)(T_RpMsg_CoreID actor_id, T_RpMsg_ChID ch_id);
- int (*unmask_int)(T_RpMsg_CoreID actor_id, T_RpMsg_ChID ch_id);
- int (*send_message)(unsigned int actor_id, icp_msg *icp_msg);
-} t_icpdev_ops;
-
-void icpdev_register_callback(icp_callback_fn cb);
-int icpdev_send_message(unsigned int actor_id, icp_msg *icp_msg);
-void icpdev_register_ops(t_icpdev_ops *ops);
-int icpdev_set_int(T_RpMsg_CoreID actor_id, T_RpMsg_ChID ch_id);
-int icpdev_unmask_int(T_RpMsg_CoreID actor_id, T_RpMsg_ChID ch_id);
-
-#endif /* _ICP_DEV_H */
-
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg.c
deleted file mode 100644
index 2e010b9..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg.c
+++ /dev/null
@@ -1,857 +0,0 @@
-/**
- * @file icp_rpmsg.c
- * @brief
- *
- * Copyright (C) 2017 Sanechips Technology Co., Ltd.
- * @author Qing Wang
- * @ingroup
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- */
-
-/*******************************************************************************
- * Include header files *
-
- ******************************************************************************/
-#include "icp_rpmsg.h"
-#include "icp_dev.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define RPMSG_ALIGN 0x4
-#define ALIGN_RPMSG(size,align) (((unsigned int)size + align - 1)&(~(align - 1)))
-#define RPMSG_MSGHEAD_FLAG 0x5453
-#define RPMSG_BUFFER_LEN 512
-
-#define CUR_SEND_POS(coreID, chanID) rpmsgConfig[coreID].send_pos[chanID]
-
-const int Icp_rpmsg_actor = CORE_AP;
-rpmsg_sema rpmsgProcSem;
-T_RpMsg_CoreConfig rpmsgConfig[CORE_MAXID] = {0};
-static bool rpmsg_proc_inited = false;
-T_RpMsg_EvList evtList;
-
-static inline void icp_rpmsg_read(T_RpMsg_ChInfo *channelInfo, void *base, void *dest, size_t n, unsigned int offset)
-{
- unsigned int freeCnt = channelInfo->size - channelInfo->recvPos;
-
- if (n == 0)
- return;
-
- if(freeCnt >= n)
- {
- memcpy(dest, (void *)(base + offset + channelInfo->recvPos), n);
- channelInfo->recvPos += (n+n%2);
-
- if(channelInfo->recvPos == channelInfo->size)
- channelInfo->recvPos = 0;
- }
- else
- {
- memcpy(dest, (void *)(base + offset + channelInfo->recvPos), freeCnt);
- memcpy(dest + freeCnt, (void *)(base + offset), n - freeCnt);
-
- channelInfo->recvPos = n - freeCnt + n%2;
- }
-}
-
-static void icp_rpmsg_move_recv_pos(T_RpMsg_ChInfo *channelInfo, size_t n)
-{
- unsigned int freeCnt = channelInfo->size - channelInfo->recvPos;
-
- if(freeCnt >= n)
- {
- channelInfo->recvPos += (n+n%2);
-
- if(channelInfo->recvPos == channelInfo->size)
- channelInfo->recvPos = 0;
- }
- else
- channelInfo->recvPos = n-freeCnt+n%2;
-}
-
-/* static void icp_rpmsg_write(T_RpMsg_ChInfo *channelInfo, void *base, __const void *src, size_t n) */
-static void icp_rpmsg_write(T_RpMsg_ChInfo *channelInfo,
- void *base,
- __const void *src,
- size_t n,
- T_RpMsg_CoreID actor_id,
- T_RpMsg_ChID ch_id)
-{
- unsigned int freeCnt = channelInfo->size - CUR_SEND_POS(actor_id, ch_id);
-
- if (n == 0)
- return;
-
- if(freeCnt >= n)
- {
- memcpy((void *)(base + channelInfo->send_offset + CUR_SEND_POS(actor_id, ch_id)), src, n);
- CUR_SEND_POS(actor_id, ch_id) += (n+n%2);
-
- if(CUR_SEND_POS(actor_id, ch_id) == channelInfo->size)
- CUR_SEND_POS(actor_id, ch_id) = 0;
- }
- else
- {
- memcpy((void *)(base + channelInfo->send_offset + CUR_SEND_POS(actor_id, ch_id)), src, freeCnt);
- memcpy((void *)(base + channelInfo->send_offset), src + freeCnt, n - freeCnt);
- CUR_SEND_POS(actor_id, ch_id) = n-freeCnt+n%2;
- }
-}
-
-static inline bool rpmsg_IsRecvChEmpty(T_RpMsg_ChInfo *channelRecv)
-{
- if (channelRecv->sendPos == channelRecv->recvPos)
- return 1;
- else
- return 0;
-}
-
-static inline bool rpmsg_IsChFreeSpace(T_RpMsg_ChInfo *channelSend, int size)
-{
- if (channelSend->sendPos < channelSend->recvPos){
- if ((channelSend->recvPos - channelSend->sendPos) > size)
- return 1;
- else
- return 0;
- }
- else{
- if ((channelSend->size - channelSend->sendPos + channelSend->recvPos ) > size)
- return 1;
- else
- return 0;
- }
-}
-
-static inline u32 rpmsg_ChUsedSpace(T_RpMsg_ChInfo *channelInfo)
-{
- unsigned int sendPos = channelInfo->sendPos;
-
- if (sendPos >= channelInfo->recvPos)
- return (sendPos - channelInfo->recvPos);
- else
- return (channelInfo->size - channelInfo->recvPos + sendPos);
-}
-
-
-static int rpmsg_EvlistInsert(T_RpMsg_CoreID coreID, T_RpMsg_ChID chID)
-{
- unsigned next = 0;
-
- if (coreID >= CORE_MAXID || chID >= CHANNEL_MAXID(coreID))
- return RPMSG_ERROR;
-
- next = (evtList.startEvIndex+1)%RPMSG_EVENT_LIST_MAX_NUM;
- if (next == evtList.endEvIndex)
- return RPMSG_ERROR;
- else
- {
- evtList.evList[evtList.startEvIndex].coreID = coreID;
- evtList.evList[evtList.startEvIndex].chID= chID;
- evtList.startEvIndex = next;
- return RPMSG_SUCCESS;
- }
-}
-
-static int rpmsg_EvlistRemove(T_RpMsg_Event *event)
-{
- if (evtList.endEvIndex == evtList.startEvIndex)
- return RPMSG_ERROR;
-
- *event = evtList.evList[evtList.endEvIndex];
- evtList.endEvIndex = (evtList.endEvIndex+1)%RPMSG_EVENT_LIST_MAX_NUM;
-
- return RPMSG_SUCCESS;
-}
-
-static int rpmsgDispatch(T_RpMsg_CoreID coreID, T_RpMsg_ChID chID)
-{
- T_RpMsg_Callback callback;
- T_RpMsg_MsgHeader msgHeader;
- unsigned char rpmsg_buffer[RPMSG_BUFFER_LEN];
- T_RpMsg_ChInfo *channelRecv = rpmsgConfig[coreID].recvBase + chID;
- unsigned int offset;
-
- if (unlikely(!channelRecv->offset))
- return RPMSG_CHANNEL_INEXISTANCE;
-
- callback = rpmsgConfig[coreID].chConfig[chID].fn;
- if (unlikely(callback == NULL))
- return RPMSG_ERROR;
-
- offset = channelRecv->offset - rpmsgConfig[coreID].cur_rcv_addr;
-
- while(rpmsg_IsRecvChEmpty(channelRecv) != 1)
- {
- icp_rpmsg_read(channelRecv, rpmsgConfig[coreID].recvBase, &msgHeader, sizeof(T_RpMsg_MsgHeader), offset);
- if (unlikely(msgHeader.flag != RPMSG_MSGHEAD_FLAG))
- return RPMSG_CHANNEL_MSG_ERR;
-
- if (unlikely(RPMSG_BUFFER_LEN < msgHeader.len))
- rpmsg_panic();
-
- icp_rpmsg_read(channelRecv, rpmsgConfig[coreID].recvBase, rpmsg_buffer, msgHeader.len, offset);
- (*callback)(rpmsg_buffer, msgHeader.len);
- }
-
- return RPMSG_SUCCESS;
-}
-
-static int rpmsgProc(void *arg)
-{
- T_RpMsg_Event event;
- int ret = RPMSG_ERROR;
- printk("rpmsg rpmsgProc\n");
- while (1)
- {
- rpmsgGetSem(&rpmsgProcSem);
- ret = rpmsg_EvlistRemove(&event);
- if (ret == RPMSG_SUCCESS)
- {
- //printk("rpmsgProc:src = %d, chID = %d\n",event.coreID, event.chID);
- rpmsgDispatch(event.coreID, event.chID);
- }
- }
-
- return 0;
-}
-
-static void rpmsgIsr(void *data)
-{
- icp_msg *pRpMsg = data;
- T_RpMsg_ChInfo *channelRecv = rpmsgConfig[pRpMsg->src_id].recvBase + pRpMsg->event_id;
-
- if(likely(channelRecv->offset))
- {
- if(unlikely(rpmsgConfig[pRpMsg->src_id].chConfig[pRpMsg->event_id].fn != NULL))
- {
- rpmsg_EvlistInsert(pRpMsg->src_id, pRpMsg->event_id);
- rpmsgPutSem(&rpmsgProcSem);
- }
- else
- {
- rpmsgPutSem(&(rpmsgConfig[pRpMsg->src_id].chConfig[pRpMsg->event_id].recvSem));
- }
- wake_up(&(rpmsgConfig[pRpMsg->src_id].chConfig[pRpMsg->event_id].waitq));
- }
-}
-
-int rpmsgTrigger(T_RpMsg_CoreID coreID, T_RpMsg_ChID chID)
-{
- icp_msg icp_msg;
-
- icp_msg.src_id = Icp_rpmsg_actor;
- icp_msg.dest_core = coreID;
- icp_msg.event_id = chID;
-
- return icpdev_send_message(icp_msg.src_id, &icp_msg);
-}
-
-/*******************************************************************************
- * Global function implementations *
- ******************************************************************************/
-int rpmsgRead_nohead(const T_RpMsg_Msg *pMsg)
-{
- unsigned long flags;
- unsigned int result_len = 0;
- unsigned int offset;
- T_RpMsg_ChInfo *channelRecv = rpmsgConfig[pMsg->coreID].recvBase + pMsg->chID;
-
-// printk("rpmsg_Read:actorID = %d, chID = %d\n",pMsg->coreID, pMsg->chID);
-
- if (unlikely(pMsg == NULL || pMsg->coreID >= CORE_MAXID || pMsg->chID >= CHANNEL_MAXID(pMsg->coreID)))
- return RPMSG_INVALID_PARAMETER;
-
- if (unlikely(!channelRecv->offset))
- return RPMSG_CHANNEL_INEXISTANCE;
-
- while (rpmsg_IsRecvChEmpty(channelRecv) == 1)/*È·±£Ã»ÓÐÐźÅÁ¿¶Ñ»ý*/
- {
- if(pMsg->flag & RPMSG_READ_ONCE || pMsg->flag & RPMSG_READ_IRQLOCK)
- return RPMSG_NO_MSG;
-
- if(rpmsgGetSem(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].recvSem)))
- return RPMSG_ERROR;
-
- if(unlikely(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readExit == 1))
- {
- rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readExit = 0;
- return RPMSG_SUCCESS;
- }
- }
-
- if(pMsg->flag & RPMSG_READ_IRQLOCK)
- rpmsg_irq_lock(flags);
- else
- rpmsgGetMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readMutex));
-
- result_len = pMsg->len;
-
- offset = channelRecv->offset - rpmsgConfig[pMsg->coreID].cur_rcv_addr;
- icp_rpmsg_read(channelRecv, rpmsgConfig[pMsg->coreID].recvBase, pMsg->buf, result_len, offset);
-
-exit:
- if(pMsg->flag & RPMSG_READ_IRQLOCK)
- rpmsg_irq_unlock(flags);
- else
- rpmsgPutMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readMutex));
-
- return result_len;
-}
-
-int rpmsgWrite_nohead(const T_RpMsg_Msg *pMsg)
-{
- int ret;
- unsigned int size = 0;
- unsigned int flags;
- T_RpMsg_ChInfo *channelSend = rpmsgConfig[pMsg->coreID].sendBase + pMsg->chID;
-
- if (unlikely(pMsg == NULL || pMsg->coreID >= CORE_MAXID || pMsg->chID >= CHANNEL_MAXID(pMsg->coreID)))
- return RPMSG_INVALID_PARAMETER;
-
- if (unlikely(!channelSend->offset))
- return RPMSG_CHANNEL_INEXISTANCE;
-
- size = pMsg->len+ sizeof(T_RpMsg_MsgHeader);
- size = ALIGN_RPMSG(size,RPMSG_ALIGN);
-
- if(pMsg->flag & RPMSG_WRITE_IRQLOCK)
- rpmsg_irq_lock(flags);//spin_lock_irq
- else
- rpmsgGetMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].writeMutex));
-
- if (likely(rpmsg_IsChFreeSpace(channelSend, size) == 1)){
- CUR_SEND_POS(pMsg->coreID, pMsg->chID) = channelSend->sendPos;
- icp_rpmsg_write(channelSend,
- rpmsgConfig[pMsg->coreID].sendBase,
- pMsg->buf,
- pMsg->len,
- pMsg->coreID,
- pMsg->chID);
- ret = pMsg->len;
- channelSend->sendPos = CUR_SEND_POS(pMsg->coreID, pMsg->chID);
-
- asm volatile("dmb sy\n");
- }
- else
- {
- ret = RPMSG_SPACE_NOT_ENOUGH;
- goto exit;
- }
- if(pMsg->flag & RPMSG_WRITE_INT)
- ret = rpmsgTrigger(pMsg->coreID, pMsg->chID);
-
-exit:
- if(pMsg->flag & RPMSG_WRITE_IRQLOCK)
- rpmsg_irq_unlock(flags);
- else
- rpmsgPutMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].writeMutex));
-
- return ret;
-}
-
-int rpmsgRead(const T_RpMsg_Msg *pMsg)
-{
- unsigned long flags;
- unsigned int offset;
- unsigned int result_len = 0;
- T_RpMsg_MsgHeader tmpMsgHeader;
- T_RpMsg_ChInfo *channelRecv = rpmsgConfig[pMsg->coreID].recvBase + pMsg->chID;
-
-// printk("rpmsg_Read:actorID = %d, chID = %d\n",pMsg->coreID, pMsg->chID);
-
- if (unlikely(pMsg == NULL || pMsg->coreID >= CORE_MAXID || pMsg->chID >= CHANNEL_MAXID(pMsg->coreID)))
- return RPMSG_INVALID_PARAMETER;
-
- if (unlikely(!channelRecv->offset))
- return RPMSG_CHANNEL_INEXISTANCE;
-
- if ((pMsg->flag & RPMSG_READ_POLL) && (rpmsg_IsRecvChEmpty(channelRecv) == 1))
- return RPMSG_NO_MSG;
-
- while (rpmsg_IsRecvChEmpty(channelRecv) == 1)/*È·±£Ã»ÓÐÐźÅÁ¿¶Ñ»ý*/
- {
- if(pMsg->flag & RPMSG_READ_ONCE || pMsg->flag & RPMSG_READ_IRQLOCK)
- return RPMSG_NO_MSG;
-
- if(rpmsgGetSem(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].recvSem)))
- return RPMSG_ERROR;
-
- if(unlikely(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readExit == 1))
- {
- rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readExit = 0;
- return RPMSG_SUCCESS;
- }
- }
-
- if(pMsg->flag & RPMSG_READ_IRQLOCK)
- rpmsg_irq_lock(flags);
- else
- rpmsgGetMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readMutex));
-
- offset = channelRecv->offset - rpmsgConfig[pMsg->coreID].cur_rcv_addr;
-
- icp_rpmsg_read(channelRecv, rpmsgConfig[pMsg->coreID].recvBase, &tmpMsgHeader, sizeof(T_RpMsg_MsgHeader), offset);
- if (unlikely(tmpMsgHeader.flag != RPMSG_MSGHEAD_FLAG))
- {
- result_len = RPMSG_CHANNEL_MSG_ERR;
- goto exit;
- }
-
- result_len = min(pMsg->len, (unsigned int)(tmpMsgHeader.len));
-
- icp_rpmsg_read(channelRecv, rpmsgConfig[pMsg->coreID].recvBase, pMsg->buf, result_len, offset);
- if (unlikely((unsigned int)(tmpMsgHeader.len) > result_len))
- icp_rpmsg_move_recv_pos(channelRecv, (unsigned int)(tmpMsgHeader.len) - result_len - result_len%2);
-
-exit:
- if(pMsg->flag & RPMSG_READ_IRQLOCK)
- rpmsg_irq_unlock(flags);
- else
- rpmsgPutMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readMutex));
-
- return result_len;
-}
-
-int rpmsgWrite(const T_RpMsg_Msg *pMsg)
-{
- int ret;
- unsigned int size = 0;
- T_RpMsg_MsgHeader tmpMsgHeader;
- unsigned int flags;
- T_RpMsg_ChInfo *channelSend = rpmsgConfig[pMsg->coreID].sendBase + pMsg->chID;
-
- if (unlikely(pMsg == NULL || pMsg->coreID >= CORE_MAXID || pMsg->chID >= CHANNEL_MAXID(pMsg->coreID)))
- return RPMSG_INVALID_PARAMETER;
-
- if (unlikely(!channelSend->offset))
- return RPMSG_CHANNEL_INEXISTANCE;
-
- size = pMsg->len+ sizeof(T_RpMsg_MsgHeader);
- size = ALIGN_RPMSG(size,RPMSG_ALIGN);
-
- if(pMsg->flag & RPMSG_WRITE_IRQLOCK)
- rpmsg_irq_lock(flags);//spin_lock_irq
- else
- rpmsgGetMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].writeMutex));
-
- if (likely(rpmsg_IsChFreeSpace(channelSend, size) == 1)){
-#if RPMSG_LARGE_MSG_HEADER
- tmpMsgHeader.flag = RPMSG_MSGHEAD_FLAG;
- tmpMsgHeader.len = pMsg->len;
-#else
- tmpMsgHeader.flag = (unsigned short)RPMSG_MSGHEAD_FLAG;
- tmpMsgHeader.len = (unsigned short)(pMsg->len);
-#endif
- CUR_SEND_POS(pMsg->coreID, pMsg->chID) = channelSend->sendPos;
- icp_rpmsg_write(channelSend,
- rpmsgConfig[pMsg->coreID].sendBase,
- &tmpMsgHeader,
- sizeof(T_RpMsg_MsgHeader),
- pMsg->coreID,
- pMsg->chID);
- icp_rpmsg_write(channelSend,
- rpmsgConfig[pMsg->coreID].sendBase,
- pMsg->buf,
- pMsg->len,
- pMsg->coreID,
- pMsg->chID);
- ret = pMsg->len;
- channelSend->sendPos = CUR_SEND_POS(pMsg->coreID, pMsg->chID);
-
- asm volatile("dmb sy\n");
- }
- else
- {
- ret = RPMSG_SPACE_NOT_ENOUGH;
- goto exit;
- }
- if(pMsg->flag & RPMSG_WRITE_INT)
- ret = rpmsgTrigger(pMsg->coreID, pMsg->chID);
-
-exit:
- if(pMsg->flag & RPMSG_WRITE_IRQLOCK)
- rpmsg_irq_unlock(flags);
- else
- rpmsgPutMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].writeMutex));
-
- return ret;
-}
-
-int rpmsgCreateChannel (T_RpMsg_CoreID dstCoreID, T_RpMsg_ChID chID, unsigned int size)
-{
- T_RpMsg_ChInfo *channelSend;
-
- if (dstCoreID >= CORE_MAXID || chID >= CHANNEL_MAXID(dstCoreID))
- return RPMSG_INVALID_PARAMETER;
-
- if (!rpmsgConfig[dstCoreID].sendBase)
- return RPMSG_INVALID_PARAMETER;
-
- channelSend = rpmsgConfig[dstCoreID].sendBase + chID;
-
- if (channelSend->offset)
- return RPMSG_CHANNEL_ALREADY_EXIST;
-
-/*
- if (rpmsgConfig[dstCoreID].recvBase != 0)
- {
- rpmsgGetMutex(&rpmsgConfig[dstCoreID].chMutex);
- rpmsgInitSem(&rpmsgConfig[dstCoreID].chConfig[chID].recvSem);
- rpmsgInitMutex(&rpmsgConfig[dstCoreID].chConfig[chID].readMutex);
- init_waitqueue_head(&(rpmsgConfig[dstCoreID].chConfig[chID].waitq));
- rpmsgPutMutex(&rpmsgConfig[dstCoreID].chMutex);
- }
-*/
- size = ALIGN_RPMSG(size,RPMSG_ALIGN);
- rpmsgGetMutex(&rpmsgConfig[dstCoreID].chMutex);
-
- if (size > rpmsgConfig[dstCoreID].freeSize)
- {
- rpmsgPutMutex(&rpmsgConfig[dstCoreID].chMutex);
- return RPMSG_SPACE_NOT_ENOUGH;
- }
-
- channelSend->offset = rpmsgConfig[dstCoreID].cur_send_addr;// rpmsgConfig[dstCoreID].offset;
- channelSend->send_offset = rpmsgConfig[dstCoreID].offset;
- rpmsgConfig[dstCoreID].offset += size;
- rpmsgConfig[dstCoreID].cur_send_addr += size;
- rpmsgConfig[dstCoreID].freeSize -= size;
- rpmsgPutMutex(&rpmsgConfig[dstCoreID].chMutex);
- channelSend->size = size;
- channelSend->flag |= CHANNEL_FLAG;
-
- rpmsgInitMutex(&(rpmsgConfig[dstCoreID].chConfig[chID].writeMutex));
-
- icpdev_unmask_int(dstCoreID, chID);
-
- return RPMSG_SUCCESS;
-}
-
-int rpmsgRegCallBack(T_RpMsg_CoreID coreID, unsigned int chID, T_RpMsg_Callback callback)
-{
- if(coreID >= CORE_MAXID || chID >= CHANNEL_MAXID(coreID))
- return RPMSG_INVALID_PARAMETER;
-
- rpmsgConfig[coreID].chConfig[chID].fn = callback;
- if(callback != NULL)
- rpmsgDispatch(coreID, chID);
-
- icpdev_unmask_int(coreID, chID);
-
- return 0;
-}
-
-void rpmsgReadExit(T_RpMsg_CoreID coreID, T_RpMsg_ChID chID)
-{
- rpmsgConfig[coreID].chConfig[chID].readExit = 1;
-
- if(0 == rpmsgGetSemaCount(&rpmsgConfig[coreID].chConfig[chID].recvSem))
- rpmsgPutSem(&(rpmsgConfig[coreID].chConfig[chID].recvSem));
-}
-
-int rpmsgInit(T_RpMsg_CoreID coreID, struct device_node *np)
-{
- int ret = 0;
- T_RpMsg_Msg pMsg = {0};
- void * virAddr;
- unsigned int mem_size;
- struct resource res;
- unsigned int chan_cnt;
- T_RpMsg_ChConfig *chan_cfg;
- unsigned int *send_pos;
- int i;
- ret = of_property_read_u32(np, "icp-channels", &chan_cnt);
- if (!chan_cnt) {
- pr_err("%s: [ICP]Cannot get channel count %d\n", __func__, ret);
- return ret;
- }
- rpmsgConfig[coreID].chan_cnt = chan_cnt;
-
- /* send buffer */
- ret = of_address_to_resource(np, 1, &res);
- if (ret){
- pr_err("%s: [ICP]Cannot get IORESOURCE_MEM %d\n", __func__, ret);
- return ret;
- }
-
- mem_size = (unsigned int)resource_size(&res);
- virAddr = ioremap_wc(res.start, mem_size);
- if(virAddr == NULL)
- return RPMSG_ERROR;
-
- memset(virAddr, 0x0, mem_size);
- rpmsgConfig[coreID].sendBase = virAddr;
- rpmsgConfig[coreID].offset = chan_cnt * sizeof(T_RpMsg_ChInfo);
- rpmsgConfig[coreID].freeSize = mem_size - chan_cnt*sizeof(T_RpMsg_ChInfo);
- rpmsgInitMutex(&rpmsgConfig[coreID].chMutex);
- rpmsgConfig[coreID].cur_send_addr = res.start + chan_cnt*sizeof(T_RpMsg_ChInfo);
-
- /* recv buffer */
- ret = of_address_to_resource(np, 2, &res);
- if (ret){
- pr_err("%s: [ICP]Cannot get IORESOURCE_MEM %d\n", __func__, ret);
- return ret;
- }
-
- mem_size = resource_size(&res);
- virAddr = ioremap_wc(res.start, mem_size);
- if(virAddr == NULL)
- return RPMSG_ERROR;
-
- rpmsgConfig[coreID].recvBase = virAddr;
- rpmsgConfig[coreID].cur_rcv_addr = res.start;
-
- chan_cfg = kzalloc(sizeof(T_RpMsg_ChConfig)*chan_cnt, GFP_KERNEL);
- if (!chan_cfg)
- return -ENOMEM;
- rpmsgConfig[coreID].chConfig = chan_cfg;
-
- send_pos = kzalloc(sizeof(unsigned int)*chan_cnt, GFP_KERNEL);
- if (!send_pos)
- return -ENOMEM;
- rpmsgConfig[coreID].send_pos = send_pos;
-
- for (i=0; i<chan_cnt; i++) {
- rpmsgInitSem(&rpmsgConfig[coreID].chConfig[i].recvSem);
- rpmsgInitMutex(&rpmsgConfig[coreID].chConfig[i].readMutex);
- init_waitqueue_head(&(rpmsgConfig[coreID].chConfig[i].waitq));
- }
-
- if (!rpmsg_proc_inited)
- {
- rpmsgInitSem(&rpmsgProcSem);
-
- icpdev_register_callback(rpmsgIsr);
-
- rpmsgCreateThread("rpmsgProc", rpmsgProc, 0);
-
- rpmsg_proc_inited = true;
- }
-
- if (coreID == CORE_PS0)
- {
- rpmsgConfig[coreID].dev.id = coreID;
- ret = icp_rpmsg_device_register(&rpmsgConfig[coreID].dev, chan_cnt);
- }
-
- return RPMSG_SUCCESS;
-}
-
-int rpmsgReadWithId(u32 *pMsgId, const T_RpMsg_Msg *pMsg)
-{
- unsigned long flags;
- unsigned int offset;
- unsigned int result_len = 0;
- T_RpMsg_MsgHeader tmpMsgHeader;
- T_RpMsg_ChInfo *channelRecv = rpmsgConfig[pMsg->coreID].recvBase + pMsg->chID;
-
- printk("rpmsg_Read:actorID = %d, chID = %d\n",pMsg->coreID, pMsg->chID);
-
- if (pMsg == NULL || pMsg->coreID >= CORE_MAXID || pMsg->chID >= CHANNEL_MAXID(pMsg->coreID))
- return RPMSG_INVALID_PARAMETER;
-
- if (!channelRecv->offset)
- return RPMSG_CHANNEL_INEXISTANCE;
-
- if ((pMsg->flag & RPMSG_READ_POLL) && (rpmsg_IsRecvChEmpty(channelRecv) == 1))
- return RPMSG_NO_MSG;
-
- while (rpmsg_IsRecvChEmpty(channelRecv) == 1)/*È·±£Ã»ÓÐÐźÅÁ¿¶Ñ»ý*/
- {
- if(pMsg->flag & RPMSG_READ_ONCE || pMsg->flag & RPMSG_READ_IRQLOCK)
- return RPMSG_NO_MSG;
-
- if(rpmsgGetSem(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].recvSem)))
- return RPMSG_ERROR;
-
- if(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readExit == 1)
- {
- rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readExit = 0;
- return RPMSG_SUCCESS;
- }
- }
-
- if(pMsg->flag & RPMSG_READ_IRQLOCK)
- rpmsg_irq_lock(flags);
- else
- rpmsgGetMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readMutex));
-
- offset = channelRecv->offset - rpmsgConfig[pMsg->coreID].cur_rcv_addr;
-
- icp_rpmsg_read(channelRecv, rpmsgConfig[pMsg->coreID].recvBase, &tmpMsgHeader, sizeof(T_RpMsg_MsgHeader), offset);
- if (tmpMsgHeader.flag != RPMSG_MSGHEAD_FLAG)
- {
- result_len = RPMSG_CHANNEL_MSG_ERR;
- goto exit;
- }
-
- /* read msg_id */
- icp_rpmsg_read(channelRecv, rpmsgConfig[pMsg->coreID].recvBase, pMsgId, sizeof(u32), offset);
- tmpMsgHeader.len -= sizeof(u32);
-
- result_len = min(pMsg->len, (unsigned int)(tmpMsgHeader.len));
-
- icp_rpmsg_read(channelRecv, rpmsgConfig[pMsg->coreID].recvBase, pMsg->buf, result_len, offset);
- if((unsigned int)(tmpMsgHeader.len) > result_len)
- icp_rpmsg_move_recv_pos(channelRecv, (unsigned int)(tmpMsgHeader.len) - result_len - result_len%2);
-
-exit:
- if(pMsg->flag & RPMSG_READ_IRQLOCK)
- rpmsg_irq_unlock(flags);
- else
- rpmsgPutMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].readMutex));
-
- return result_len;
-}
-
-int rpmsgWriteWithId(u32 pMsgId, const T_RpMsg_Msg *pMsg)
-{
- int ret;
- unsigned int size = 0;
- T_RpMsg_MsgHeader tmpMsgHeader;
- unsigned int flags;
- T_RpMsg_ChInfo *channelSend = rpmsgConfig[pMsg->coreID].sendBase + pMsg->chID;
-
- if (pMsg == NULL || pMsg->coreID >= CORE_MAXID || pMsg->chID >= CHANNEL_MAXID(pMsg->coreID))
- return RPMSG_INVALID_PARAMETER;
-
- if (!channelSend->offset)
- return RPMSG_CHANNEL_INEXISTANCE;
-
- size = pMsg->len+ sizeof(T_RpMsg_MsgHeader) + sizeof(u32);
- size = ALIGN_RPMSG(size,RPMSG_ALIGN);
-
- if(pMsg->flag & RPMSG_WRITE_IRQLOCK)
- rpmsg_irq_lock(flags);//spin_lock_irq
- else
- rpmsgGetMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].writeMutex));
-
- if (rpmsg_IsChFreeSpace(channelSend, size) == 1){
-#if RPMSG_LARGE_MSG_HEADER
- tmpMsgHeader.flag = RPMSG_MSGHEAD_FLAG;
- tmpMsgHeader.len = pMsg->len + sizeof(u32);
-#else
- tmpMsgHeader.flag = (unsigned short)RPMSG_MSGHEAD_FLAG;
- tmpMsgHeader.len = (unsigned short)(pMsg->len) + sizeof(u32);
-#endif
- CUR_SEND_POS(pMsg->coreID, pMsg->chID) = channelSend->sendPos;
- icp_rpmsg_write(channelSend,
- rpmsgConfig[pMsg->coreID].sendBase,
- &tmpMsgHeader,
- sizeof(T_RpMsg_MsgHeader),
- pMsg->coreID,
- pMsg->chID);
- icp_rpmsg_write(channelSend,
- rpmsgConfig[pMsg->coreID].sendBase,
- &pMsgId,
- sizeof(u32),
- pMsg->coreID,
- pMsg->chID);
- icp_rpmsg_write(channelSend,
- rpmsgConfig[pMsg->coreID].sendBase,
- pMsg->buf,
- pMsg->len,
- pMsg->coreID,
- pMsg->chID);
- channelSend->sendPos = CUR_SEND_POS(pMsg->coreID, pMsg->chID);
- ret = pMsg->len;
-
- asm volatile("dmb sy\n");
- }
- else
- {
- ret = RPMSG_SPACE_NOT_ENOUGH;
- goto exit;
- }
- ret = rpmsgTrigger(pMsg->coreID, pMsg->chID);
-
-exit:
- if(pMsg->flag & RPMSG_WRITE_IRQLOCK)
- rpmsg_irq_unlock(flags);
- else
- rpmsgPutMutex(&(rpmsgConfig[pMsg->coreID].chConfig[pMsg->chID].writeMutex));
-
- return ret;
-}
-
-/*---------------------------------------------------------------------------*
- *-- interface for userspace ------------------------------------------------*
- *---------------------------------------------------------------------------*/
-int rpmsg_rcv_chan_size(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID)
-{
- T_RpMsg_ChInfo *channel_recv = rpmsgConfig[actorID].recvBase + chID;
-
- return rpmsg_ChUsedSpace(channel_recv);
-}
-
-int rpmsg_set_flag_int(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID, unsigned int flag)
-{
- T_RpMsg_ChInfo *channel_send = rpmsgConfig[actorID].sendBase + chID;;
-
- if(flag == 1)
- channel_send->flag |= CHANNEL_INT_FLAG;
- else if(flag == 0)
- channel_send->flag &= ~CHANNEL_INT_FLAG;
- else
- return RPMSG_ERROR;
-
- return RPMSG_SUCCESS;
-}
-
-int rpmsg_set_flag_poll(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID, unsigned int flag)
-{
- T_RpMsg_ChInfo *channel_send = rpmsgConfig[actorID].sendBase + chID;
-
- if(flag == 1)
- channel_send->flag |= CHANENL_POLL_FLAG;
- else if(flag == 0)
- channel_send->flag &= ~CHANENL_POLL_FLAG;
- else
- return RPMSG_ERROR;
-
- return RPMSG_SUCCESS;
-}
-
-unsigned int rpmsg_get_flag(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID)
-{
- T_RpMsg_ChInfo *channel_send = rpmsgConfig[actorID].sendBase + chID;
-
- return channel_send->flag;
-}
-
-int rpmsg_poll(struct file *file,
- T_ZDrvRpMsg_ActorID actorID,
- T_ZDrvRpMsg_ChID chID,
- struct poll_table_struct *wait)
-{
- T_RpMsg_ChInfo *channel_recv = rpmsgConfig[actorID].recvBase + chID;
-
- poll_wait(file, &(rpmsgConfig[actorID].chConfig[chID].waitq), wait);
-
- if (!rpmsg_IsRecvChEmpty(channel_recv))
- return POLLIN | POLLRDNORM;
-
- return 0;
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg.h
deleted file mode 100644
index 5132bdb..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/**
- * @file icp_rpmsg.h
- * @brief
- *
- * Copyright (C) 2017 ZTE Co., Ltd.
- * @author Qing Wang
- * @ingroup
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- */
-
-#ifndef _ICP_RPMSG_H
-#define _ICP_RPMSG_H
-
-/*******************************************************************************
- * Include header files *
- ******************************************************************************/
-#include "icp_rpmsg_osa.h"
-#include <linux/soc/zte/rpmsg.h>
-
-#ifdef CONFIG_ZX29_ICP
-#include "zx29_icp.h"
-#else
-# error "You should include a soc icp header file here"
-#endif
-
-/*******************************************************************************
-* Extern variable definitions *
-*******************************************************************************/
-
-/*******************************************************************************
- * Macro definitions *
- ******************************************************************************/
-//#define SHARE_BUF_CACHABLE
-#ifdef CONFIG_ARCH_ZX297520V3
-#define RPMSG_LARGE_MSG_HEADER (0)
-#else
-#define RPMSG_LARGE_MSG_HEADER (1)
-#endif
-
-#define RPMSG_EVENT_LIST_MAX_NUM 10
-
-#define CHANNEL_MAXID(coreID) rpmsgConfig[coreID].chan_cnt
-
-/*******************************************************************************
- * Type definitions *
- ******************************************************************************/
-typedef struct _T_RpMsg_MsgHeader
-{
-#if RPMSG_LARGE_MSG_HEADER
- unsigned int flag;
- unsigned int len;
-#else
- unsigned short flag;
- unsigned short len;
-#endif
-}T_RpMsg_MsgHeader;
-
-typedef struct _T_RpMsg_Event
-{
- T_RpMsg_CoreID coreID;
- T_RpMsg_ChID chID;
-}T_RpMsg_Event;
-
-typedef struct _T_RpMsg_EvList
-{
- T_RpMsg_Event evList[RPMSG_EVENT_LIST_MAX_NUM];
- unsigned int startEvIndex;
- unsigned int endEvIndex;
-}T_RpMsg_EvList;
-
-/* MUST coherent between cores */
-#ifdef SHARE_BUF_CACHABLE
-typedef struct _T_RpMsg_ChInfo
-{
- unsigned int sendPos;
- unsigned int offset;
- unsigned int size;
- unsigned int flag;
- unsigned int rsv0[12];
- unsigned int recvPos;
- unsigned int rsv1[15];
-}T_RpMsg_ChInfo;
-#else
-typedef struct _T_RpMsg_ChInfo
-{
- unsigned int offset;
- unsigned int sendPos;
- unsigned int recvPos;
- unsigned int size;
- unsigned int flag;
- unsigned int send_offset;
-}T_RpMsg_ChInfo;
-#endif
-
-typedef struct _T_RpMsg_ChConfig
-{
- unsigned int readExit;
- rpmsg_mutex readMutex;
- rpmsg_mutex writeMutex;
- rpmsg_sema recvSem;
- wait_queue_head_t waitq;
- T_RpMsg_Callback fn;
-}T_RpMsg_ChConfig;
-
-typedef struct _T_RpMsg_CoreConfig
-{
- T_RpMsg_ChInfo *sendBase;
- T_RpMsg_ChInfo *recvBase;
-
- /* for v3 only */
- unsigned int cur_send_addr;
- unsigned int cur_rcv_addr;
-
- unsigned int offset;
- unsigned int freeSize;
- rpmsg_mutex chMutex;
-
- struct device dev;
-
- unsigned int chan_cnt;
- T_RpMsg_ChConfig *chConfig;
- unsigned int *send_pos;
-}T_RpMsg_CoreConfig;
-
-/*******************************************************************************
-* Extern function declarations *
-*******************************************************************************/
-
-/*******************************************************************************
- * Global variable declarations *
- ******************************************************************************/
-extern T_RpMsg_CoreConfig rpmsgConfig[];
-
-/*******************************************************************************
- * Global function declarations *
- ******************************************************************************/
-int rpmsgInit(T_RpMsg_CoreID coreID, struct device_node *np);
-int icp_rpmsg_device_register(struct device *dev, unsigned int channel_count);
-int rpmsg_rcv_chan_size(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID);
-int rpmsg_set_flag_int(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID, unsigned int flag);
-int rpmsg_set_flag_poll(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID, unsigned int flag);
-unsigned int rpmsg_get_flag(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID);
-int rpmsg_poll(struct file *file,
- T_ZDrvRpMsg_ActorID actorID,
- T_ZDrvRpMsg_ChID chID,
- struct poll_table_struct *wait);
-
-/*******************************************************************************
-* Inline function declarations *
-*******************************************************************************/
-
-#endif
-
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg_linux.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg_linux.c
deleted file mode 100644
index 4cc38a4..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg_linux.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/**
- * @file oss_ramdump_osa.c
- * @brief Implementation of Ramdump os adapter
- *
- * Copyright (C) 2017 Sanechips Technology Co., Ltd.
- * @author Qing Wang <wang.qing@sanechips.com.cn>
- * @ingroup si_ap_oss_ramdump_id
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- */
-
-/*******************************************************************************
- * Include header files *
-
- ******************************************************************************/
-#include "icp_rpmsg.h"
-#include "icp_rpmsg_osa.h"
-#include <linux/kthread.h>
-#include <uapi/linux/sched/types.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void rpmsgInitSem(rpmsg_sema *sem)
-{
- sema_init(sem, 0);
-}
-
-int rpmsgGetSem(rpmsg_sema *sem)
-{
- return down_interruptible(sem);
-}
-
-void rpmsgPutSem(rpmsg_sema *sem)
-{
- up(sem);
-}
-
-unsigned int rpmsgGetSemaCount(rpmsg_sema *sem)
-{
- return sem->count;
-}
-
-
-void rpmsgInitMutex(rpmsg_mutex *mutex)
-{
- mutex_init(mutex);
-}
-
-void rpmsgGetMutex(rpmsg_mutex *mutex)
-{
- mutex_lock(mutex);
-}
-
-void rpmsgPutMutex(rpmsg_mutex *mutex)
-{
- mutex_unlock(mutex);
-}
-
-
-//void *rpmsgCreateThread(const char *thread_name, void (*entry)(int), unsigned int priority)
-void rpmsgCreateThread(const char *thread_name, int (*entry)(void *), unsigned int priority)
-{
- struct task_struct *task;
- struct sched_param param;
-
- task = kthread_create(entry, NULL, thread_name);
-
- param.sched_priority = min(priority, MAX_USER_RT_PRIO - 1);
- param.sched_priority = MAX_USER_RT_PRIO - 1 - param.sched_priority;
- sched_setscheduler(task, SCHED_FIFO, ¶m);
-
- wake_up_process(task);
-
-// return task;
-}
-
-
-#ifdef __cplusplus
-}
-#endif
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg_osa.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg_osa.h
deleted file mode 100644
index 7d117ad..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_rpmsg_osa.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/**
- * @file icp_ramdump_osa.h
- * @brief
- *
- * Copyright (C) 2017 ZTE Co., Ltd.
- * @author Qing Wang
- * @ingroup
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- */
-
-#ifndef _ICP_RPMSG_OSA_H
-#define _ICP_RPMSG_OSA_H
-
-/*******************************************************************************
- * Include header files *
- ******************************************************************************/
-#define OS_LINUX
-
-#ifdef OS_LINUX
-#include <linux/semaphore.h>
-#include <linux/mutex.h>
-#include <asm/io.h>
-#include <linux/poll.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-
-#elif defined OS_TOS
-#include "oss_api.h"
-#include "osa.h"
-#include "sup.h"
-#include "tos_typedef.h"
-
-#endif
-
-/*******************************************************************************
-* Extern variable definitions *
-*******************************************************************************/
-
-/*******************************************************************************
- * Macro definitions *
- ******************************************************************************/
-#ifdef OS_LINUX
-#define rpmsg_mutex struct mutex
-#define rpmsg_sema struct semaphore
-#define rpmsg_ioremap(addr, size) ioremap_wc(addr, size)
-#define rpmsg_panic() panic("rpmsg")
-#define rpmsg_irq_lock(flags) local_irq_save(flags)
-#define rpmsg_irq_unlock(flags) local_irq_restore(flags)
-
-#elif defined OS_TOS
-#define rpmsg_mutex tos_mutex_t
-#define rpmsg_sema tos_semaphore_t
-#define rpmsg_panic()
-#define rpmsg_irq_lock(flags) tos_irq_save(flags)
-#define rpmsg_irq_unlock(flags) tos_irq_restore(flags)
-
-#endif
-
-/*******************************************************************************
- * Type definitions *
- ******************************************************************************/
-
-/*******************************************************************************
-* Extern function declarations *
-*******************************************************************************/
-
-/*******************************************************************************
- * Global variable declarations *
- ******************************************************************************/
-
-/*******************************************************************************
- * Global function declarations *
- ******************************************************************************/
-void rpmsgInitSem(rpmsg_sema *sem);
-int rpmsgGetSem(rpmsg_sema *sem);
-void rpmsgPutSem(rpmsg_sema *sem);
-unsigned int rpmsgGetSemaCount(rpmsg_sema *sem);
-void rpmsgInitMutex(rpmsg_mutex *mutex);
-void rpmsgGetMutex(rpmsg_mutex *mutex);
-void rpmsgPutMutex(rpmsg_mutex *mutex);
-void rpmsgCreateThread(const char *thread_name, int (*entry)(void *), unsigned int priority);
-
-/*******************************************************************************
-* Inline function declarations *
-*******************************************************************************/
-
-
-#endif // #ifndef _ICP_RPMSG_OSA_H
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_test.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_test.c
deleted file mode 100644
index 51086d7..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/icp_test.c
+++ /dev/null
@@ -1,308 +0,0 @@
-/*
- * linux/arch/arm/mach-zx297520v2/debug.c
- *
- * Copyright (C) 2015 ZTE-TSP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/clockchips.h>
-#include <linux/clk.h>
-#include <linux/module.h>
-#include <linux/err.h>
-#include <linux/syscore_ops.h>
-#include <linux/gpio.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <linux/pm_runtime.h>
-#include <linux/soc/zte/common.h>
-
-#include "icp_rpmsg.h"
-#include "icp_dev.h"
-
-#define ICP_DRV_TEST 0
-#define ICP_COMM_TEST 1 /* ps0 */
-
-#define TEST_CORE CORE_PS0
-
-static unsigned int test_channel;
-
-extern T_RpMsg_CoreConfig rpmsgConfig[];
-extern void fake_icp_isr(T_RpMsg_CoreID src_core, T_RpMsg_CoreID dest_core, T_RpMsg_ChID ch);
-
-/*
-UINT32 get_cpuid(void)
-{
- UINT64 mpidr;
- UINT64 cluster;
- UINT64 core;
-
- __asm__ __volatile__("mrs %0, MPIDR_EL1\t\n":"=r"(mpidr));
-
- cluster = (mpidr >> 8) & 0xF;
- core = (mpidr & 0xFF);
- return ((cluster << 2) + core);
-}
-*/
-
-/* in zx29_icp, the event is from 0 to 63 */
-s32 drv_icp_send_to_arm(u32 dest_id, u32 src_id, u32 event)
-{
- icp_msg _icp_msg;
-#if 0
- s32 msg_num = 0;
- u32 poll_num = 0;
-#endif
- s32 ret = 0;
-#if 0
- do
- {
- poll_num ++;
- msg_num = icp_get_inbox_msg_num(dest_id);
- }while(((ICP_INBOX_DEPTH - msg_num) < 10) && (poll_num < 100));
-
-
- if ((ICP_INBOX_DEPTH - msg_num) >= 10)
-#else
- if (1)
-#endif
- {
- _icp_msg.src_id = src_id;
- _icp_msg.dest_core = dest_id; //1<<dest_id;
- _icp_msg.event_id = event;
- ret = icpdev_send_message(src_id, &_icp_msg);
- }
- else
- {
- ret = -ENXIO;
- }
-
- return ret;
-}
-
-#if ICP_DRV_TEST
-#else
-#define RPMSG_TEST_LEN 4
-static unsigned char rpmsg_test_buf[RPMSG_TEST_LEN + 1];
-static s32 rpmsg_send_test(u32 dest_id, u32 event, int data)
-{
- T_RpMsg_Msg rpmsg;
-
- rpmsg.coreID = dest_id;
- rpmsg.chID = event;
- rpmsg.len = RPMSG_TEST_LEN;
- rpmsg.buf = rpmsg_test_buf;
- rpmsg.flag = 0;
- rpmsg.flag |= RPMSG_WRITE_INT;
-#if ICP_COMM_TEST
- memcpy(rpmsg.buf, (unsigned char *)&data, sizeof(int));
-#else
- memset(rpmsg.buf, data, rpmsg.len);
-#endif
-
- return rpmsgWrite(&rpmsg);
-}
-
-static void fill_loopback_info(T_RpMsg_CoreID src_core, T_RpMsg_ChID ch, int data)
-{
- /* write some data to recv buf */
- T_RpMsg_ChInfo *channelRecv = rpmsgConfig[src_core].recvBase + ch;
- T_RpMsg_MsgHeader tmpMsgHeader;
- unsigned char *buf;
-
- if (channelRecv->offset == 0)
- {
- if (src_core == CORE_M0) {
- channelRecv->offset = 0x78; /* channel 0 */
- channelRecv->size = 0x300;
- } else {
- channelRecv->offset = 0x3C0;
- channelRecv->size = 0x300;
- }
- }
-
- tmpMsgHeader.flag = 0x5453;
- tmpMsgHeader.len = 7;
-
- /* header */
- buf = (unsigned char *)rpmsgConfig[src_core].recvBase + channelRecv->offset + \
- channelRecv->sendPos;
- memcpy(buf, &tmpMsgHeader, sizeof(T_RpMsg_MsgHeader));
- memset(buf + sizeof(T_RpMsg_MsgHeader), (u8)data, 7);
- channelRecv->sendPos += 7 + sizeof(T_RpMsg_MsgHeader);
-}
-
-#endif
-
-//test
-extern struct kobject *zx_test_kobj;
-extern int icp_int_count;
-static struct timer_list test_timer;
-static unsigned long test_timer_count = 0;
-static void test_timer_expired(struct timer_list *unused)
-{
- mod_timer(&test_timer, jiffies + msecs_to_jiffies(3*1000));
-
-// pr_info("[TEST]icp timer arrived:%lu \n", ++test_timer_count);
-
- if(test_timer_count%2)
- pr_info("drv_icp_send_to_arm(%d)(%d)\n", drv_icp_send_to_arm(TEST_CORE, CORE_AP, 0x5), ++test_timer_count);
- //;//pr_info("drv_icp_send_to_arm(%d)(%d)\n", drv_icp_send_to_arm(CORE_PHY0, CORE_AP, 0xA5), ++test_timer_count);
- else
- pr_info("drv_icp_send_to_arm(%d)(%d)\n", drv_icp_send_to_arm(TEST_CORE, CORE_AP, 0xA), ++test_timer_count);
-}
-
-void icp_test_cb(void *data)
-{
- icp_msg *p_icp_msg = data;
-
- pr_info("icp_test_cb src(%d) dest(%d) event(0x%x)\n", p_icp_msg->src_id,
- p_icp_msg->dest_core, p_icp_msg->event_id);
-}
-
-
-static ssize_t icp_test_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- return sprintf(buf, "icp_int_count:%d\n", icp_int_count);
-}
-
-static ssize_t icp_test_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
-{
- unsigned int temp;
- int ret;
-
- if(sscanf(buf, "%u", &temp) != 1)
- {
- pr_info("temp=%d error", temp);
- return (count);
- }
-
- pr_info("temp=%d", temp);
-
-#if ICP_DRV_TEST /* test driver only */
- if(temp == 1)
- {
- mod_timer(&test_timer, jiffies + msecs_to_jiffies(3*1000));
- }
- else
- {
- del_timer(&test_timer);
- test_timer_count = 0;
- }
-#else
-
- if(temp == 99 || temp == 66) /* this value is used to loopback test */
- {
- fill_loopback_info(TEST_CORE, test_channel, temp);
-
-#if ICP_COMM_TEST
-#else
- fake_icp_isr(TEST_CORE, CORE_AP, test_channel);
-#endif
- return (count);
- }
-
- ret = rpmsg_send_test(TEST_CORE, test_channel, temp);
- if (ret)
- pr_info("rpmsg send to %d-%d failed(%d)\n", TEST_CORE, test_channel, ret);
-#endif
-
- return (count);
-}
-
-#if ICP_COMM_TEST
-const unsigned int test_send_back = 0x747365ff;
-const unsigned int test_rcv_flag = 0x74736574;
-#endif
-
-void ps0_cb(void *buf, unsigned int len)
-{
- int i;
- unsigned char *data;
-
- pr_info("ps0_cb, len = %d \n\n ", len);
-
- if (len==0)
- return ;
-
- data = (unsigned char *)buf;
- for (i=0; i<len; i++, data++)
- {
- printk("0x%2x", *data);
- }
- printk("\n\n");
-
-#if ICP_COMM_TEST
- if ((len == 4) && (*(unsigned int *)buf == test_rcv_flag))
- {
- rpmsg_send_test(TEST_CORE, test_channel, test_send_back);
- }
-#endif
-}
-
-void phy0_cb(void *buf, unsigned int len)
-{
-
-}
-
-
-// outbox 23 --> 01 send msg one by one (5s )
-static DEVICE_ATTR(icp_test,0600,icp_test_show, icp_test_store);
-static struct attribute *zx_icp_attributes[] = {
- &dev_attr_icp_test.attr,
- NULL,
-};
-
-static const struct attribute_group zx_icp_attribute_group = {
- .attrs = (struct attribute **) zx_icp_attributes,
-};
-
-int __init zx_icp_test_init(void)
-{
- int ret;
-
- ret = sysfs_create_group(zx_test_kobj, &zx_icp_attribute_group);
-
- test_channel = 1;
-
-#if ICP_DRV_TEST /* test driver only */
- icpdev_register_callback(icp_test_cb);
- timer_setup(&test_timer, test_timer_expired, 0);
-#else
- ret = rpmsgCreateChannel(TEST_CORE, test_channel, 100);
- if (ret)
- {
- pr_info("[DEBUG] rpmsgCreateChannel failed(%d).\n", ret);
-// return ret;
- }
-// ret = rpmsgCreateChannel(CORE_PHY0, channel_1, 1024);
-
- ret = rpmsgRegCallBack(TEST_CORE, test_channel, ps0_cb);
- if (ret)
- {
- pr_info("[DEBUG] rpmsgRegCallBack failed(%d).\n", ret);
- return ret;
- }
-
-// ret = rpmsgRegCallBack(CORE_PHY0, channel_1, phy0_cb);
-#endif
-
- pr_info("[DEBUG] create test icp sysfs interface OK.\n");
-
- return 0;
-}
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/rpmsg.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/rpmsg.c
deleted file mode 100644
index b0eebda..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/rpmsg.c
+++ /dev/null
@@ -1,434 +0,0 @@
-/*******************************************************************************
- * Copyright (C) 2013, ZTE Corporation.
- *
- * File Name: icp.c
- * File Mark:
- * Description:
- * Others:
- * Version: V0.1
- * Author: ShiDeYou
- * Date: 2013-3-13
- * History 1:
- * Date:
- * Version:
- * Author:
- * Modification:
- * History 2:
- ******************************************************************************/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <crypto/internal/skcipher.h>
-#include <linux/cpumask.h>
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-
-#include <linux/mm.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/uaccess.h>
-#include <linux/device.h>
-
-#include <linux/cdev.h>
-#include <linux/workqueue.h>
-
-#include <linux/fs.h>
-#include <linux/platform_device.h>
-
-#include <asm/irq.h>
-#include <asm/setup.h>
-#include <asm/io.h>
-
-#include <linux/sched.h>
-#include <linux/poll.h>
-
-#include <linux/soc/zte/rpmsg.h>
-#include <uapi/linux/rpmsg/rpmsg_zx29.h>
-#include "icp_dev.h"
-#include "icp_rpmsg.h"
-
-typedef struct _zx29_rpmsg_channel
-{
- T_RpMsg_CoreID actorID;
- T_RpMsg_ChID chID;
- void * buf;
- unsigned int len;
-} zx29_rpmsg_channel;
-
-typedef struct _zx29_rpmsg_ser
-{
- struct kref kref; /* Reference management */
- struct cdev cdev;
- struct module *owner;
- const char *driver_name;
- const char *name;
- int name_base;
- int major;
- int minor_start;
- int num;
- int flags;
- int index;
- int count;
- zx29_rpmsg_channel *rpmsg_channel;
-
- const struct file_operations *ops;
-} zx29_rpmsg_ser;
-
-static int zx29_rpmsg_open(struct inode *inode, struct file *filp)
-{
- dev_t device = inode->i_rdev;
- T_RpMsg_ChID chID;
- zx29_rpmsg_ser *rpmsg_drv;
-
- rpmsg_drv = container_of (inode->i_cdev, zx29_rpmsg_ser, cdev);
-
- rpmsg_drv->count++;
- chID = (T_RpMsg_ChID)(MINOR(device) - rpmsg_drv->minor_start);
-
- filp->private_data = &(rpmsg_drv->rpmsg_channel[chID]);
-
- return 0;
-}
-
-static long zx29_rpmsg_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
-{
- int ret;
- T_RpMsg_Msg rpmsg;
-
- zx29_rpmsg_channel *rpmsg_channel = filp->private_data;
- rpmsg.coreID = rpmsg_channel->actorID;
- rpmsg.chID = rpmsg_channel->chID;
-
- switch(cmd)
- {
- case RPMSG_CREATE_CHANNEL:
- ret = rpmsgCreateChannel(rpmsg.coreID, rpmsg.chID, (unsigned int)arg);
- if(ret != RPMSG_SUCCESS)
- {
- printk("CreateChannel(actID=%d)(chId=%d) failed(%d). \n",
- rpmsg_channel->actorID, rpmsg_channel->chID, ret);
- return -ENXIO;
- }
- break;
-
- case RPMSG_GET_DATASIZE:
- ret = rpmsg_rcv_chan_size(rpmsg.coreID, rpmsg.chID);
-
- if (copy_to_user((void __user *)arg, &ret, sizeof(ret)))
- return -EFAULT;
-
- break;
-
- case RPMSG_SET_INT:
- icpdev_set_int(rpmsg.coreID, rpmsg.chID);
- break;
-
- case RPMSG_SET_INT_FLAG:
- rpmsg_set_flag_int(rpmsg.coreID, rpmsg.chID, 1);
- break;
-
- case RPMSG_CLEAR_INT_FLAG:
- rpmsg_set_flag_int(rpmsg.coreID, rpmsg.chID, 0);
- break;
-
- case RPMSG_SET_POLL_FLAG:
- rpmsg_set_flag_poll(rpmsg.coreID, rpmsg.chID, 1);
- break;
-
- case RPMSG_CLEAR_POLL_FLAG:
- rpmsg_set_flag_poll(rpmsg.coreID, rpmsg.chID, 0);
- break;
-
- default:
- return -EPERM;
- }
-
- return 0;
-}
-
-#ifdef CONFIG_COMPAT
-static long zx29_rpmsg_ioctl_compat(struct file *filp, unsigned int cmd, unsigned long arg)
-{
- if (_IOC_TYPE(cmd) != RPMSG_IOC_MAGIC)
- return -ENOTTY;
-
- if (_IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
- cmd &= ~IOCSIZE_MASK;
- cmd |= sizeof(char *) << IOCSIZE_SHIFT;
- }
-
- return zx29_rpmsg_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
-}
-#endif
-
-static ssize_t zx29_rpmsg_write(struct file *filp, const char __user *ubuf,
- size_t len, loff_t *ppos)
-{
- int ret;
- unsigned int flag;
- T_RpMsg_Msg rpmsg;
-
- zx29_rpmsg_channel *rpmsg_channel = filp->private_data;
- rpmsg.coreID = rpmsg_channel->actorID;
- rpmsg.chID = rpmsg_channel->chID;
- rpmsg.len = len;
- rpmsg.flag = 0;
-
- rpmsg.buf = kmalloc(len, GFP_KERNEL);
- if (rpmsg.buf == NULL)
- {
- printk("zx29_rpmsg_write1 kmalloc failed\n");
- return 0;
- }
-
- ret = copy_from_user(rpmsg.buf, ubuf, len);
- if (ret<0)
- {
- printk("zx29_rpmsg_write1(actID=%d)(chId=%d) len=%d failed(%d). \n",
- rpmsg_channel->actorID, rpmsg_channel->chID, len, ret);
- kfree(rpmsg.buf);
- return -EFAULT;
- }
-
-
- flag = rpmsg_get_flag(rpmsg.coreID, rpmsg.chID);
- if (flag&CHANNEL_INT_FLAG)
- rpmsg.flag |= RPMSG_WRITE_INT;
-
- ret = rpmsgWrite(&rpmsg);
- kfree(rpmsg.buf);
-
- if (ret<0)
- {
- printk("zx29_rpmsg_write2(actID=%d)(chId=%d) len=%d failed(%d). \n",
- rpmsg_channel->actorID, rpmsg_channel->chID, len, ret);
- return 0;
- }
-
- return len;
-}
-
-static ssize_t zx29_rpmsg_read(struct file *filp, char __user *ubuf,
- size_t len, loff_t *offp)
-{
- unsigned int size;
- int ret;
- unsigned int flag;
- T_RpMsg_Msg rpmsg;
-
- zx29_rpmsg_channel *rpmsg_channel = filp->private_data;
- rpmsg.coreID = rpmsg_channel->actorID;
- rpmsg.chID = rpmsg_channel->chID;
- rpmsg.len = len;
- rpmsg.flag = 0;
-
- rpmsg.buf = kmalloc(len, GFP_KERNEL);
- if (rpmsg.buf == NULL)
- {
- printk("zx29_rpmsg_read1 kmalloc failed\n");
- return 0;
- }
-
- flag = rpmsg_get_flag(rpmsg.coreID, rpmsg.chID);
- if (flag&CHANENL_POLL_FLAG)
- rpmsg.flag |= RPMSG_READ_POLL;
-
- ret = rpmsgRead(&rpmsg);
- if (ret<0)
- {
- printk("zx29_rpmsg_read1(actID=%d)(chId=%d) len=%d failed(%d). \n",
- rpmsg_channel->actorID, rpmsg_channel->chID, len, ret);
- kfree(rpmsg.buf);
- return 0;
- }
- else
- size = ret;
-
- ret = copy_to_user(ubuf, rpmsg.buf, size);
- kfree(rpmsg.buf);
- if (ret<0)
- {
- printk("zx29_rpmsg_read2(actID=%d)(chId=%d) len=%d failed(%d). \n",
- rpmsg_channel->actorID, rpmsg_channel->chID, len, ret);
- return -EFAULT;
- }
-
- return size;
-}
-
-static unsigned int zx29_rpmsg_poll(struct file *file,
- struct poll_table_struct *wait)
-{
- zx29_rpmsg_channel *rpmsg_channel = file->private_data;
-
- return rpmsg_poll(file, rpmsg_channel->actorID, rpmsg_channel->chID, wait);
-}
-
-
-int zx29_rpmsg_release(struct inode *inode, struct file *filp)
-{
- filp->private_data = NULL;
-
- return 0;
-}
-
-static const struct file_operations rpmsg_zx29_ops = {
- .owner = THIS_MODULE,
- .open = zx29_rpmsg_open,
- .release = zx29_rpmsg_release,
- .write = zx29_rpmsg_write,
- .read = zx29_rpmsg_read,
- .unlocked_ioctl = zx29_rpmsg_ioctl,
-#ifdef CONFIG_COMPAT
- .compat_ioctl = zx29_rpmsg_ioctl_compat,
-#endif
- .poll = zx29_rpmsg_poll,
-};
-
-struct class *rpmsg_classes;
-
-zx29_rpmsg_ser rpmsg_zx29 = {
- .owner = THIS_MODULE,
- .driver_name = "armps_rpmsg",
- .name = "armps_rpmsgch", //ps_rpmsgch
- .major = 0,
- .minor_start = 30,
-};
-
-struct device *zx29_rpmsg_register_device(struct class *rpmsg_class, zx29_rpmsg_ser *driver, unsigned index,
- struct device *device)
-{
- char name[64];
- dev_t dev = MKDEV(driver->major, driver->minor_start) + index;
-
- if (index >= driver->num) {
- return ERR_PTR(-EINVAL);
- }
-
- sprintf(name, "%s%d", driver->name, index);
-
- return device_create(rpmsg_class, device, dev, NULL, name);
-}
-
-static int zx29_rpmsg_probe(struct device *dev)
-{
- int error;
- int i;
- dev_t rpmsg_devt;
- zx29_rpmsg_ser *rpmsg_ser ;
-
- rpmsg_ser = &rpmsg_zx29;
-
- rpmsg_ser->rpmsg_channel = devm_kcalloc(dev, rpmsg_ser->num,
- sizeof(zx29_rpmsg_channel),
- GFP_KERNEL);
- if (!rpmsg_ser->rpmsg_channel)
- return -ENOMEM;
-
- rpmsg_ser->ops = &rpmsg_zx29_ops;
- rpmsg_ser->count = 0;
-
- error = alloc_chrdev_region(&rpmsg_devt, rpmsg_ser->minor_start,
- rpmsg_ser->num, rpmsg_ser->name);
- if (!error) {
- rpmsg_ser->major = MAJOR(rpmsg_devt);
- rpmsg_ser->minor_start = MINOR(rpmsg_devt);
- }
-
- cdev_init(&rpmsg_ser->cdev, &rpmsg_zx29_ops);
- rpmsg_ser->cdev.owner = rpmsg_ser->owner;
-
- error = cdev_add(&rpmsg_ser->cdev, rpmsg_devt, rpmsg_ser->num);
- if (error) {
- unregister_chrdev_region(rpmsg_devt, rpmsg_ser->num);
- return error;
- }
-
- for (i = 0; i < rpmsg_ser->num; i++) {
- rpmsg_ser->rpmsg_channel[i].actorID = dev->id;
- rpmsg_ser->rpmsg_channel[i].chID = i;
- zx29_rpmsg_register_device(rpmsg_classes, rpmsg_ser, i, NULL);
- }
-
- return 0;
-}
-
-static struct attribute *rpmsg_zx29_dev_attrs[] = {
- NULL,
-};
-ATTRIBUTE_GROUPS(rpmsg_zx29_dev);
-
-struct bus_type icp_rpmsg_bus = {
- .name = "rpmsg_zx29",
-// .dev_groups = rpmsg_zx29_dev_groups,
-};
-
-static struct device_driver rpmsg_zx29_drv={
- .name = "icp_rpmsg2",
- .owner = THIS_MODULE,
- .bus= &icp_rpmsg_bus,
- .probe = zx29_rpmsg_probe,
-};
-
-void zx29_rpmsg_unregister_device(struct class *rpmsg_class, zx29_rpmsg_ser *driver, unsigned index)
-{
- dev_t dev = MKDEV(driver->major, driver->minor_start) + index;
-
- device_destroy(rpmsg_class, dev);
-}
-
-int icp_rpmsg_device_register(struct device *dev, unsigned int channel_count)
-{
- int ret;
-
- ret = bus_register(&icp_rpmsg_bus);
- if(ret < 0)
- return ret;
-
- rpmsg_zx29.num = channel_count;
-
- dev->bus = &icp_rpmsg_bus;
- dev_set_name(dev, "icp_rpmsg%d", dev->id);
- ret = device_register(dev);
-
- return ret;
-}
-
-static int __init zx29_rpmsg_init(void)
-{
- int ret = 0;
- rpmsg_classes = class_create(THIS_MODULE, "rpm");
-
- if (IS_ERR(rpmsg_classes))
- return PTR_ERR(rpmsg_classes);
-
- ret = driver_register(&rpmsg_zx29_drv);
- if(ret < 0)
- printk("rpmsg_zx29 init failed!");
-
- //rpmsg_sram_init();
-
- return ret;
-}
-
-static void __exit zx29_rpmsg_exit(void)
-{
- int i;
- zx29_rpmsg_ser *rpmsg_ser;
-
- rpmsg_ser = &rpmsg_zx29;
-
- for (i = 0; i < rpmsg_ser->num; i++)
- zx29_rpmsg_unregister_device(rpmsg_classes, rpmsg_ser, i);
-
- class_destroy(rpmsg_classes);
-}
-
-late_initcall(zx29_rpmsg_init);
-module_exit(zx29_rpmsg_exit);
-
-MODULE_AUTHOR("zte");
-MODULE_DESCRIPTION("zte rpmsg driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform: rpmsg");
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/zx29_icp.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/zx29_icp.c
deleted file mode 100644
index 379ff4a..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/zx29_icp.c
+++ /dev/null
@@ -1,404 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/clockchips.h>
-#include <linux/clk.h>
-#include <linux/module.h>
-#include <linux/err.h>
-#include <linux/syscore_ops.h>
-#include <linux/gpio.h>
-#include <linux/of_device.h>
-#include <linux/of_irq.h>
-#include <linux/of_address.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <linux/pm_runtime.h>
-#include <linux/soc/zte/common.h>
-#include <linux/soc/zte/spinlock.h>
-
-#include "icp_dev.h"
-#include "zx29_icp.h"
-#include "icp_rpmsg.h"
-
-static icp_callback_fn _icp_fn;
-static T_HalIcp_Reg *icp_ap2m0_reg;
-static T_HalIcp_Reg *icp_ap2ps_reg;
-
-static inline T_HalIcp_Reg *icp_get_reg(T_ZDrvRpMsg_ActorID actor_id)
-{
- if (CORE_M0 == actor_id )
- return icp_ap2m0_reg;
- else if (CORE_PS0 == actor_id )
- return icp_ap2ps_reg;
- else
- BUG();
-}
-
-/*******************************************************************************
-* Function: icp_set_int
-* Description: This function is used for generating icp interrupt to inform remote cpu;
-* Parameters:
-* Input:
- actorID: id of remote cpu
- chID: id of channel
-* Output:None
-*
-* Returns:None
-*
-*
-* Others:
-********************************************************************************/
-static int icp_set_int(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID)
-{
- T_HalIcp_Reg *icp_reg;
-
- if ((actorID >= CORE_MAXID) || (chID >= CHANNEL_MAXID(actorID)))
- return -EINVAL;
-
- icp_reg = icp_get_reg(actorID);
-
- if(chID<32)
- icp_reg->control.low_word = (1<<chID);
- else
- icp_reg->control.high_word = (1<<(chID-32));
-
- return 0;
-}
-
-/*******************************************************************************
-* Function: icp_clear_int
-* Description: This function is used for clear icp interrupt from remote cpu;
-* Parameters:
-* Input:
- actorID: id of remote cpu
- chID: id of channel
-* Output:None
-*
-* Returns:None
-*
-*
-* Others:
-********************************************************************************/
-static void icp_clear_int(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID)
-{
- T_HalIcp_Reg *icp_reg = icp_get_reg(actorID);
-
- if(chID<32)
- icp_reg->clear.low_word = (1<<chID);
- else
- icp_reg->clear.high_word = (1<<(chID-32)) ;
-}
-
-/*******************************************************************************
-* Function: icp_get_int
-* Description: This function is used for get icp interrupt from remote cpu;
-* Parameters:
-* Input:
-* actorID: id of remote cpu
-* chID: id of channel
-* Output:None
-*
-* Returns:None
-*
-*
-* Others:
-********************************************************************************/
-static T_HalIcp_Dword icp_get_int(T_ZDrvRpMsg_ActorID actorID)
-{
- T_HalIcp_Dword IcpState;
- T_HalIcp_Reg *icp_reg;
-
- if (actorID >= CORE_MAXID)
- {
- IcpState.high_word = 0;
- IcpState.low_word = 0;
-
- return IcpState;
- }
-
- icp_reg = icp_get_reg(actorID);
-
- IcpState.high_word = icp_reg->state.high_word;
- IcpState.low_word = icp_reg->state.low_word;
-
- return IcpState;
-}
-
-/*******************************************************************************
-* Function: icp_get_int_state
-* Description: This function is used for get the state of icp interruptting of remote cpu;
-* Parameters:
-* Input:
- actorID: id of remote cpu
- chID: id of channel
-* Output:None
-*
-* Returns:None
-*
-*
-* Others:
-********************************************************************************/
-static int icp_get_int_state(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID)
-{
- T_HalIcp_Reg *icp_reg;
-
- icp_reg = icp_get_reg(actorID);
-
- if(chID<32)
- {
- if(icp_reg->in_state.low_word & (0x1<<chID))
- return true;
- }
- else
- {
- if(icp_reg->in_state.high_word & (0x1<<(chID-32)))
- return true;
- }
-
- return false;
-}
-
-/*******************************************************************************
-* Function: icp_mask_int
-* Description: This function is used for Mask interrupt of channel;
-* Parameters:
-* Input:
-* Output:
-*
-* Returns: NONE
-*
-*
-* Others:
-********************************************************************************/
-static int icp_mask_int(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID)
-{
- T_HalIcp_Reg *icp_reg;
-
- if ((actorID >= CORE_MAXID) || (chID >= CHANNEL_MAXID(actorID)))
- return -EINVAL;
-
- icp_reg = icp_get_reg(actorID);
-
- if(chID<32)
- icp_reg->mask.low_word |= (0x1<<chID);
- else
- icp_reg->mask.high_word |= (0x1<<(chID-32));
-
- return 0;
-}
-
-/*******************************************************************************
-* Function: icp_unmask_int
-* Description: This function is used for unmask interrupt of channel;
-* Parameters:
-* Input:
-* Output:
-*
-* Returns:
-* NONE
-*
-*
-* Others:
-********************************************************************************/
-static int icp_unmask_int(T_ZDrvRpMsg_ActorID actorID, T_ZDrvRpMsg_ChID chID)
-{
- T_HalIcp_Reg *icp_reg;
-
- if ((actorID >= CORE_MAXID) || (chID >= CHANNEL_MAXID(actorID)))
- return -EINVAL;
-
- icp_reg = icp_get_reg(actorID);
-
- if(chID < 32)
- icp_reg->mask.low_word &= ~(0x1<<chID);
- else
- icp_reg->mask.high_word &= ~(0x1<<(chID-32));
-
- return 0;
-}
-
-int icp_int_count = 0;
-irqreturn_t icp_isr(int irq, void *data)
-{
- icp_msg _icp_msg;
- T_HalIcp_Dword IcpState;
- unsigned int i;
-
- _icp_msg.src_id = (unsigned int)data;
-
- IcpState = icp_get_int(_icp_msg.src_id);
-
- for(i=0; i<CHANNEL_MAXID(_icp_msg.src_id); i++)
- {
- if((((i<32)&&((IcpState.low_word>>i) & 0x1))||((i>=32)&&((IcpState.high_word>>(i-32)) & 0x1)))) {
- _icp_msg.event_id = i;
- if(_icp_fn)
- _icp_fn(&_icp_msg);
-
- icp_clear_int(_icp_msg.src_id, i);
- }
- }
-
- icp_int_count ++;
-
- return IRQ_HANDLED;
-}
-
-/*
- * for loopback test
- */
-void fake_icp_isr(T_RpMsg_CoreID src_core, T_RpMsg_CoreID dest_core, T_RpMsg_ChID ch)
-{
- icp_msg _icp_msg;
- unsigned int i;
-
- _icp_msg.src_id = src_core;
- _icp_msg.dest_core = dest_core;
- _icp_msg.event_id = ch;
-
- if(_icp_fn)
- _icp_fn(&_icp_msg);
-}
-
-static void icp_register_callback(icp_callback_fn cb)
-{
- _icp_fn = cb;
-}
-
-static int icp_send_message(unsigned int core_id, icp_msg *icp_msg)
-{
- if(icp_msg->dest_core > CORE_MAXID || !icp_msg)
- return -EINVAL;
-
- if(icp_get_int_state(icp_msg->dest_core, icp_msg->event_id)==false)
- {
- icp_set_int(icp_msg->dest_core, icp_msg->event_id);
- }
-
- return 0;
-}
-
-static t_icpdev_ops zx29_icp_ops = {
- .register_callback = icp_register_callback,
- .send_message = icp_send_message,
- .mask_int = icp_mask_int,
- .unmask_int = icp_unmask_int,
- .set_int = icp_set_int,
-};
-
-static int icp_ap2ps_init(struct device *dev)
-{
- void __iomem *reg_base;
- unsigned int irq;
- int ret;
- struct device_node *np = dev->of_node;
-
- reg_base = of_iomap(np, 0);
- if ( !reg_base ){
- pr_err("%s: [ICP]Cannot get IORESOURCE_MEM\n", __func__);
- return -ENOENT;
- }
-
- icp_ap2ps_reg = (T_HalIcp_Reg *)reg_base;
-
- irq = irq_of_parse_and_map(np, 0);
- if( !irq ){
- pr_err("%s: [ICP]Cannot get IORESOURCE_IRQ\n", __func__);
- return -ENOENT;
- }
-
- icp_ap2ps_reg->mask.high_word = 0xffffffff;
- icp_ap2ps_reg->mask.low_word = 0xffffffff;
-
- ret = request_irq(irq, icp_isr, 0, "zx_icp", CORE_PS0);
- if (ret)
- {
- pr_err("%s: [ICP]register irq failed\n", __func__);
- return ret;
- }
-
- enable_irq_wake(irq);
-
- icpdev_register_ops(&zx29_icp_ops);
-
- rpmsgInit(CORE_PS0, np);
-/*
- dev->id = CORE_PS0;
- ret = icp_rpmsg_device_register(dev);
-*/
- pr_info("%s: ok! irq(%d) icp_address(%llx \n", __func__, irq, reg_base );
-
- return ret;
-}
-
-static int icp_ap2m0_init(struct device *dev)
-{
- void __iomem *reg_base;
- unsigned int irq;
- int ret;
- struct device_node *np = dev->of_node;
-
- pr_info("%s: enter \n", __func__);
-
- reg_base = of_iomap(np, 0);
- if ( !reg_base ){
- pr_err("%s: [ICP]Cannot get IORESOURCE_MEM\n", __func__);
- return -ENOENT;
- }
-
- icp_ap2m0_reg = (T_HalIcp_Reg *)reg_base;
-
- irq = irq_of_parse_and_map(np, 0);
- if( !irq ){
- pr_err("%s: [ICP]Cannot get IORESOURCE_IRQ\n", __func__);
- return -ENOENT;
- }
-
- icp_ap2m0_reg->mask.high_word = 0xffffffff;
- icp_ap2m0_reg->mask.low_word = 0xffffffff;
-
- ret = request_irq(irq, icp_isr, 0, "zx_icp", CORE_M0);
- if (ret)
- {
- pr_err("%s: [ICP]register irq failed\n", __func__);
- return ret;
- }
-
- icpdev_register_ops(&zx29_icp_ops);
-
- rpmsgInit(CORE_M0, np);
-
- pr_info("%s: ok! irq(%d) icp_address(%llx \n", __func__, irq, reg_base );
-
- return 0;
-}
-
-static const struct of_device_id zx29_icp_dt_ids[] = {
- { .compatible = "zte,zx29-icp-ap2m0", .data = &icp_ap2m0_init },
- { .compatible = "zte,zx29-icp-ap2ps", .data = &icp_ap2ps_init },
- { /* sentinel */ }
-};
-
-static int zx29_icp_probe(struct platform_device *pdev)
-{
- int (*init_fn)(struct device *dev);
-
- init_fn = of_device_get_match_data(&pdev->dev);
- if (!init_fn) {
- dev_err(&pdev->dev, "Error: No device match found\n");
- return -ENODEV;
- }
-
- return init_fn(&pdev->dev);
-}
-
-static struct platform_driver zx29_icp_driver = {
- .driver = {
- .name = "zx29-icp",
- .owner = THIS_MODULE,
- .of_match_table = of_match_ptr(zx29_icp_dt_ids),
- },
- .probe = zx29_icp_probe,
-};
-
-builtin_platform_driver(zx29_icp_driver)
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/zx29_icp.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/zx29_icp.h
deleted file mode 100644
index 1cd7a79..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/rpmsg/zx29_icp.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*---------------------------------------------------------------------------------------------------------------------
- * °æÈ¨ËùÓÐ(C)2000-2017, ÖÐÐËͨѶ¹É·ÝÓÐÏÞ¹«Ë¾
- *
- * ÎÄ ¼þ Ãû: zx29_icp.h
- *
- *
- * ½Ó¿ÚÃèÊö:
- * ICPÄ£¿éµÄ¼Ä´æÆ÷Í·Îļþ(zx29ϵÁÐоƬ)
- *
- * °æ ±¾: v0.0
- *
- *
- *-------------------------------------------------------------------------------------------------------------------*/
-
-
-#ifndef _ZX29_ICP_H
-#define _ZX29_ICP_H
-
-/* *INDENT-OFF* */
-#ifdef __cplusplus
-extern "C" {
-#endif
-/* *INDENT-ON* */
-
-#define MAX_MB_NAME_LEN (12)
-
-#define T_ZDrvRpMsg_ActorID T_RpMsg_CoreID
-#define T_ZDrvRpMsg_ChID T_RpMsg_ChID
-
-typedef struct _T_HalIcp_Dword{
- unsigned int low_word;
- unsigned int high_word;
-}T_HalIcp_Dword;
-
-typedef struct _T_HalIcp_Reg{
- volatile T_HalIcp_Dword control;
- T_HalIcp_Dword state;
- volatile T_HalIcp_Dword clear;
- volatile T_HalIcp_Dword mask;
- volatile T_HalIcp_Dword sfn;
- T_HalIcp_Dword in_state;
-} T_HalIcp_Reg;
-
-/* *INDENT-OFF* */
-#ifdef __cplusplus
-}
-#endif
-/* *INDENT-ON* */
-
-#endif /* _ZX29_ICP_H */
-
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/Kconfig
deleted file mode 100644
index 7262f15..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/Kconfig
+++ /dev/null
@@ -1,4 +0,0 @@
-#
-#
-#
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/Makefile b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/Makefile
deleted file mode 100644
index b6df879..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Makefile for the soc plat drivers
-#
-
-obj-$(CONFIG_ARCH_ZX298501) += spinlock.o
-obj-$(CONFIG_ARCH_ZX297520V3) += spinlock-zx297520v3.o
-#
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/spinlock-zx297520v3.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/spinlock-zx297520v3.c
deleted file mode 100644
index 99d3fb7..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/spinlock/spinlock-zx297520v3.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/*
- * arch/arm/mach-zx297520v2/zx297520v2-clock.c
- *
- * Copyright (C) 2015 ZTE-TSP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/of_device.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/mutex.h>
-#include <linux/device.h>
-#include <linux/module.h>
-#include <linux/cdev.h>
-#include <linux/fs.h>
-#include <linux/uaccess.h>
-#include <linux/soc/zte/spinlock.h>
-
-#define USE_HW_SPINLOCK 1
-
-#define SHARED_DEVICE_REG1 (hwlock_reg_base + 0x170)
-#define SHARED_DEVICE_REG2 (hwlock_reg_base + 0x174)
-#define SHARED_DEVICE_REG3 (hwlock_reg_base + 0x178)
-#define SHARED_DEVICE_REG4 (hwlock_reg_base + 0x17C)
-
-#if USE_HW_SPINLOCK
-
-#define MACH_NR_SFLOCKS SFLOCK_NUM
-#define MACH_NR_HWLOCKS HWLOCK_NUM
-
-#define SELF_CORE_ID CORE_ID_AP
-
-/* now use 8*MACH_NR_SFLOCKS bytes */
-#define SOFTLOCK_DESC_BASE (sf_base)//(SPINLOCK_SOFTLOCK_BASE)
-
-#define SPINLOCK_DEBUG 1
-
-#if SPINLOCK_DEBUG
-#define zspinlock_debug(fmt, ...) \
- printk(KERN_INFO fmt, ##__VA_ARGS__)
-#else
-#define zspinlock_debug(fmt, ...)
-#endif
-
-#define zspinlock_assert(_EXP) BUG_ON(!_EXP)//ZDRV_ASSERT(_EXP)
-static DEFINE_MUTEX(zspinlock_mutex);
-static unsigned long s_hwSpinlockMsr;
-/****************************************************************************
-* Types
-****************************************************************************/
-struct zte_softlock_desc {
- unsigned long used;
- unsigned long owner;
-};
-/**************************************************************************
- * Global Variables *
- **************************************************************************/
-static volatile struct zte_softlock_desc *softlock_desc[MACH_NR_SFLOCKS];
-static void __iomem __force *hwlock_reg_base;
-static void __iomem __force *sf_base;
-static void __iomem __force *hwlock_regs[MACH_NR_HWLOCKS] ;
-/*
-=
-{
- SHARED_DEVICE_REG1,
- SHARED_DEVICE_REG2,
- SHARED_DEVICE_REG3,
- SHARED_DEVICE_REG4
-};
-*/
-extern void msleep(unsigned int msecs);
-
- /*******************************************************************************
- * Function: _hw_spin_lock
- * Description:»ñȡӲ¼þËø£¬id 0~3
- * Parameters:
- * Input:
- *
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
- static void _hw_spin_lock(unsigned long hwid)
-{
- unsigned long tmp;
- unsigned long msr;
- local_irq_save(msr);
- s_hwSpinlockMsr = msr;
-
- while(ioread32(hwlock_regs[hwid])&0x1);
- tmp = ioread32(hwlock_regs[hwid]);
- tmp &= 0x00ffffff;
- tmp |= (SELF_CORE_ID&0xff)<<24;
- iowrite32(tmp, hwlock_regs[hwid]);
-
-}
-/*******************************************************************************
- * Function: _hw_spin_unlock
- * Description:ÊÍ·ÅÓ²¼þËø£¬id 0~3
- * Parameters:
- * Input:
- *
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
-static void _hw_spin_unlock(unsigned long hwid)
-{
- unsigned long tmp;
-
-
- if(SELF_CORE_ID != (ioread32(hwlock_regs[hwid])&0xff000000)>>24){
- zspinlock_assert(0);
- }
- tmp = ioread32(hwlock_regs[hwid]);
- tmp &= 0x00fffffe;
- iowrite32(tmp, hwlock_regs[hwid]);
-
- local_irq_restore(s_hwSpinlockMsr);
-}
-/*******************************************************************************
- * Function: hw_spin_lock
- * Description:»ñȡӲ¼þËø£¬id 0~2£¬
- * id 3±£Áô¸øÈí¼þËøÊ¹Óã¬ÍⲿÇý¶¯²»¿ÉÓá£
- * Parameters:
- * Input:
- *
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
-void hw_spin_lock(emhw_lock_id hwid)
-{
- _hw_spin_lock(hwid);
-// zspinlock_debug("cpu %d gets %d hardware lock!/n",SELF_CORE_ID,hwid);
-}
-/*******************************************************************************
- * Function: hw_spin_unlock
- * Description:Çý¶¯ÊÍ·ÅÓ²¼þËø£¬id 0~2
- * Parameters:
- * Input:
- *
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
-void hw_spin_unlock(emhw_lock_id hwid)
-{
- _hw_spin_unlock(hwid);
-// zspinlock_debug("cpu %d releases %d hardware lock!/n",SELF_CORE_ID,hwid);
-}
-/*******************************************************************************
- * Function: soft_spin_lock
- * Description:Çý¶¯»ñµÃÈí¼þËø½Ó¿Ú
- * Parameters:
- * Input: sfid: Èí¼þËøid¡£
- * coreid: ±£³ÖidºÅΪsfidÈí¼þËøµÄcpuid¡£
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
-void soft_spin_lock(emsf_lock_id sfid)
-{
- static unsigned long lock_count = 0;
-
-softlock_loop:
- while(softlock_desc[sfid]->owner != SELF_CORE_ID && softlock_desc[sfid]->used)
- {
- lock_count++;
- if(lock_count == 1000)
- {
- lock_count = 0;
- msleep(5);
- }
- }
-
- _hw_spin_lock(SOFTLOCK_HWLOCK);
- if(softlock_desc[sfid]->owner != SELF_CORE_ID && softlock_desc[sfid]->used)
- {
- _hw_spin_unlock(SOFTLOCK_HWLOCK);
- goto softlock_loop;
- }
- softlock_desc[sfid]->used ++;
- softlock_desc[sfid]->owner = SELF_CORE_ID;
- _hw_spin_unlock(SOFTLOCK_HWLOCK);
- //zspinlock_debug("cpu %d releases %d software lock!/n",SELF_CORE_ID,sfid);
-
-}
-#if 1
-int soft_spin_lock_printf(emsf_lock_id sfid)
-{
- static unsigned long lock_count = 0;
-softlock_loop:
- while(softlock_desc[sfid]->owner != SELF_CORE_ID && softlock_desc[sfid]->used)
- {
- ndelay(1);
- lock_count++;
- if(lock_count >= 5000)
- {
- lock_count = 0;
- return -1;
- }
- }
- _hw_spin_lock(SOFTLOCK_HWLOCK);
- if(softlock_desc[sfid]->owner != SELF_CORE_ID && softlock_desc[sfid]->used)
- {
- _hw_spin_unlock(SOFTLOCK_HWLOCK);
- goto softlock_loop;
- }
- softlock_desc[sfid]->used ++;
- softlock_desc[sfid]->owner = SELF_CORE_ID;
- _hw_spin_unlock(SOFTLOCK_HWLOCK);
- return 0;
-}
-#endif
-/*******************************************************************************
- * Function: soft_spin_unlock
- * Description:Óësoft_spin_lock¶ÔÓ¦µÄÊÍ·ÅÈí¼þËø½Ó¿Ú¡£
- * Parameters:
- * Input:
- *
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
- void soft_spin_unlock(emsf_lock_id sfid)
-{
- if(softlock_desc[sfid]->used){
- if(SELF_CORE_ID != softlock_desc[sfid]->owner){
- zspinlock_assert(0);
- }
- _hw_spin_lock(SOFTLOCK_HWLOCK);
- softlock_desc[sfid]->used --;
- if(softlock_desc[sfid]->used == 0) {
- softlock_desc[sfid]->owner = 0x0;
- }
- _hw_spin_unlock(SOFTLOCK_HWLOCK);
- //zspinlock_debug("cpu %d releases %d software lock!/n",SELF_CORE_ID,sfid);
- }
-}
-
-/*******************************************************************************
- * Function: soft_spin_lock_psm
- * Description:Çý¶¯»ñµÃÈí¼þËø½Ó¿Ú
- * Parameters:
- * Input: sfid: Èí¼þËøid¡£
- * coreid: ±£³ÖidºÅΪsfidÈí¼þËøµÄcpuid¡£
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
-void soft_spin_lock_psm(emsf_lock_id sfid)
-{
-softlock_loop:
- while(softlock_desc[sfid]->owner != SELF_CORE_ID && softlock_desc[sfid]->used)
- {
-
- }
-
- _hw_spin_lock(SOFTLOCK_HWLOCK);
- if(softlock_desc[sfid]->owner != SELF_CORE_ID && softlock_desc[sfid]->used)
- {
- _hw_spin_unlock(SOFTLOCK_HWLOCK);
- goto softlock_loop;
- }
- softlock_desc[sfid]->used ++;
- softlock_desc[sfid]->owner = SELF_CORE_ID;
- _hw_spin_unlock(SOFTLOCK_HWLOCK);
- //zspinlock_debug("cpu %d releases %d software lock!/n",SELF_CORE_ID,sfid);
-
-}
-
-/*******************************************************************************
- * Function: soft_spin_unlock_psm
- * Description:Óësoft_spin_lock_psm¶ÔÓ¦µÄÊÍ·ÅÈí¼þËø½Ó¿Ú¡£
- * Parameters:
- * Input:
- *
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
-void soft_spin_unlock_psm(emsf_lock_id sfid)
-{
- soft_spin_unlock(sfid);
-}
-
-/*******************************************************************************
- * Function: reg_spin_lock
- * Description:Çý¶¯»ñµÃ¼Ä´æÆ÷Ëø½Ó¿Ú
- * Parameters:
- * Input:
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
-void reg_spin_lock(void)
-{
- _hw_spin_lock(REGLOCK_HWLOCK);
- softlock_desc[REG_SFLOCK]->owner = SELF_CORE_ID;
-}
-EXPORT_SYMBOL(reg_spin_lock);
-
-/*******************************************************************************
- * Function: reg_spin_unlock
- * Description:Óëreg_spin_lock¶ÔÓ¦µÄÊͷżĴæÆ÷Ëø½Ó¿Ú¡£
- * Parameters:
- * Input:
- *
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
- void reg_spin_unlock(void)
-{
- softlock_desc[REG_SFLOCK]->owner = 0x0;
- _hw_spin_unlock(REGLOCK_HWLOCK);
-
-}
-EXPORT_SYMBOL(reg_spin_unlock);
-
-/*******************************************************************************
- * Function: softspinlock_init
- * Description:Èí¼þËø³õʼ»¯¡£
- * Parameters:
- * Input:
- *
- * Output:
- *
- * Returns:
- *
- *
- * Others:
- ********************************************************************************/
-int softspinlock_init(void)
-{
- int i;
-
- for(i = 0; i<MACH_NR_SFLOCKS; i++){
- softlock_desc[i] =
- (struct zte_softlock_desc *)(SOFTLOCK_DESC_BASE +i*sizeof(struct zte_softlock_desc));
- //softlock_desc[i]->used = 0;
- //softlock_desc[i]->owner= CORE_ID_NUM;
- }
- zspinlock_debug("softspinlock init success base=0x%x!",(int)SOFTLOCK_DESC_BASE);
- return 0;
-}
-
-typedef struct _zx29_softspinlock_ser
-{
- struct cdev cdev;
- struct module *owner;
- struct class *classes;
- const struct file_operations *ops;
-}zx29_softspinlock_ser;
-
-static zx29_softspinlock_ser softspinlock_zx29 = {
- .owner = THIS_MODULE,
-};
-
-int soft_spin_lock_get(emsf_lock_id sfid)
-{
- if(sfid>=SFLOCK_NUM)
- return -EFAULT;
-
- if(softlock_desc[sfid]->owner != SELF_CORE_ID && softlock_desc[sfid]->used)
- return 1;
- else
- return 0;
-}
-
-static long softspinlock_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
-{
- int ret = 0;
- char k_arg;
-
- switch(cmd)
- {
- case SPINLOCK_GET_STATUS:
- ret = copy_from_user(&k_arg, arg, sizeof(char));
- if (ret)
- return -EFAULT;
-
- if(k_arg>= SFLOCK_NUM)
- return -EFAULT;
-
- k_arg = (char)soft_spin_lock_get(k_arg);
- ret = copy_to_user(arg,&k_arg, sizeof(char));
- if (ret)
- return -EFAULT;
- break;
- default:
- return -EPERM;
- }
-
- return ret;
-}
-
-
-static const struct file_operations softspinlock_ops = {
- .owner = THIS_MODULE,
- .unlocked_ioctl = softspinlock_ioctl,
-};
-
-
-static int __init softspinlock_dev_init(void)
-{
- int ret = 0;
- dev_t dev;
-
- softspinlock_zx29.ops = &softspinlock_ops;
-
- ret = alloc_chrdev_region(&dev, 0, 1, "softspinlock");
- if (ret)
- {
- printk(KERN_ERR "%s: softspinlock failed to allocate char dev region\n",
- __FILE__);
- return ret;
- }
-
- cdev_init(&softspinlock_zx29.cdev, &softspinlock_ops);
- softspinlock_zx29.cdev.owner = softspinlock_zx29.owner;
-
- ret = cdev_add(&softspinlock_zx29.cdev, dev, 1);
- if (ret)
- {
- unregister_chrdev_region(dev, 1);
- printk(KERN_ERR "%s: softspinlock failed to add cdev\n",
- __FILE__);
- return ret;
- }
-
- softspinlock_zx29.classes = class_create(THIS_MODULE, "softspinlock");
- if (IS_ERR(softspinlock_zx29.classes))
- return PTR_ERR(softspinlock_zx29.classes);
-
- device_create(softspinlock_zx29.classes, NULL, dev, NULL, "softspinlock");
-
- printk("[xxx] softspinlock dev inited! \n");
-
- return ret;
-}
-
-void zx_spinlock_init(void __iomem *spinlock_base)
-{
- void __iomem **data = (void __iomem **)spinlock_base;
-
- hwlock_reg_base = data[0];
- sf_base = data[1];
-
- hwlock_regs[0] = SHARED_DEVICE_REG1;
- hwlock_regs[1] = SHARED_DEVICE_REG2;
- hwlock_regs[2] = SHARED_DEVICE_REG3;
- hwlock_regs[3] = SHARED_DEVICE_REG4;
-
- softspinlock_init();
-}
-
-//arch_initcall(softspinlock_init);
-#else
-int softspinlock_init(void){return 0;}
-void reg_spin_lock(void){}
-void reg_spin_unlock(void){}
-void soft_spin_lock(emsf_lock_id sfid){}
-void soft_spin_unlock(emsf_lock_id sfid){}
-void soft_spin_lock_psm(emsf_lock_id sfid){}
-void soft_spin_unlock_psm(emsf_lock_id sfid){}
-void hw_spin_lock(emhw_lock_id hwid){}
-void hw_spin_unlock(emhw_lock_id hwid){}
-static int __init softspinlock_dev_init(void){return 0;}
-#endif
-
-module_init(softspinlock_dev_init);
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/Kconfig
deleted file mode 100644
index 7262f15..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/Kconfig
+++ /dev/null
@@ -1,4 +0,0 @@
-#
-#
-#
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/Makefile b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/Makefile
deleted file mode 100644
index bfe9f4f..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Makefile for the soc plat drivers
-#
-
-obj-$(CONFIG_ARCH_ZX298501) += timer-zx298501.o
-obj-$(CONFIG_ARCH_ZX297520V3) += timer-zx297520v3.o
-#
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/timer-zx297520v3.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/timer-zx297520v3.c
deleted file mode 100644
index 47b7414..0000000
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/soc/zte/timer/timer-zx297520v3.c
+++ /dev/null
@@ -1,742 +0,0 @@
-/*
- * drivers/soc/zte/timer/timer-zx29.c
- *
- * Copyright (C) 2015 ZTE-TSP
- *
- * -------------------------------------------------------------------------------------------------------------------- *//**
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/clockchips.h>
-#include <linux/clk.h>
-#include <linux/clk-provider.h>
-#include <linux/clocksource.h>
-#include <linux/sched_clock.h>
-#include <linux/module.h>
-#include <linux/err.h>
-#include <linux/syscore_ops.h>
-#include <linux/gpio.h>
-#include <linux/of_device.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <linux/pm_runtime.h>
-#include <linux/soc/zte/common.h>
-#include <dt-bindings/soc/zx297520v3-misc.h>
-
-#include <asm/mach/time.h>
-#include <linux/fs.h>
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-
-/* timer register offset */
-#define CONFIG_REG (0x04)
-#define LOAD_REG (0x08)
-#define START_REG (0x0C)
-#define REFRESH_REG (0x10)
-#define ACK_REG (0x14)
-#define CUR_VALUE (0x18)
-
-#define TIMER_PRESCALE(ptv) (ptv << 5)
-#define TIMER_AUTORELOAD (1 << 1)
-
-#define NR_ZX_TIMER (5)
-#define ZX_TIMER_DEFAULT_RATE (26000000)
-#define ZX_TIMER_WIDTH (32)
-#define ZX_TIMER_MASK UINT_MAX
-
-typedef enum
-{
- TIMER0 = 0,
- TIMER1 = 1,
- NUM_TIMERS
-} zx_timer_id;
-
-typedef void (*zx_timer_cb)(unsigned long data);
-
-typedef struct
-{
- void __iomem *reg;
- struct clk *wclk;
- struct clk *pclk;
-
- unsigned int freq; /* wclk freq */
- unsigned int irq;
-
- unsigned int interval;
- unsigned int cycle_cnt;
- zx_timer_cb cb;
- unsigned long cb_param;
- struct clock_event_device clkevt;
- struct clocksource *cs;
-
- struct device_node *np;
-
- unsigned int func; /* ce cs dt or common */
-
-} t_timer_info;
-
-typedef struct
-{
- t_timer_info info[NR_ZX_TIMER];
- unsigned int nr;
-} t_timer_contexts;
-
-
-t_timer_contexts zx_timer_ctx = {0};
-
-/*
- *refresh configure register
- */
-static inline void refresh_config_reg(void __iomem *base)
-{
- unsigned int tmp=0;
- unsigned long flags;
- volatile int cnt;
-
- local_irq_save(flags);
-
- tmp=ioread32(base+REFRESH_REG);
-
- while(((ioread32(base+ACK_REG)>>4) & 0xf) != (tmp & 0xf))
- {
- cnt = 10;
- while(cnt--);
- }
-
- tmp ^=0xC;
- iowrite32(tmp,base+REFRESH_REG);
-
- local_irq_restore(flags);
-
-}
-
-/*
- *refresh load register
- */
-static inline void refresh_load_reg(void __iomem *base)
-{
- unsigned int tmp=0;
- unsigned long flags;
- volatile int cnt;
-
- local_irq_save(flags);
-
- tmp=ioread32(base+REFRESH_REG);
-
- while(((ioread32(base+ACK_REG)>>4) & 0xf) != (tmp & 0xf))
- {
- cnt = 10;
- while(cnt--);
- }
-
- tmp ^= 0x3;
- iowrite32(tmp,base+REFRESH_REG);
-
- local_irq_restore(flags);
-
-}
-
-/*
- *refresh load register and configure register
- */
-static inline void refresh_config_load_reg(void __iomem *base)
-{
- unsigned int tmp=0;
- unsigned long flags;
- volatile int cnt;
-
- local_irq_save(flags);
-
- tmp=ioread32(base+REFRESH_REG);
-
- while(((ioread32(base+ACK_REG)>>4) & 0xf) != (tmp & 0xf))
- {
- cnt = 10;
- while(cnt--);
- }
-
- tmp ^= 0xf;
- iowrite32(tmp,base+REFRESH_REG);
-
- local_irq_restore(flags);
-
-}
-
-/*
- * get cur_value of the timer
- */
-static inline u32 read_timer_clk(void __iomem *base)
-{
- return ioread32(base+CUR_VALUE);
-}
-
-/*
- * set reload mode
- */
-static inline void timer_set_mode(void __iomem *base, bool periodic)
-{
- unsigned int tmp = ioread32(base+CONFIG_REG);
-
- if(periodic)
- tmp |= TIMER_AUTORELOAD;
- else
- tmp &= ~TIMER_AUTORELOAD;
- iowrite32(tmp, base+CONFIG_REG);
-
- refresh_config_reg(base);
-}
-
-/*
- * start timer
- */
-static inline void timer_start(void __iomem *base)
-{
- iowrite32(0x1, base+START_REG);
-}
-
-/*
- * stop timer
- */
-static inline void timer_stop(void __iomem *base)
-{
- iowrite32(0x0, base+START_REG);
-}
-
-/*
- * set load value(unit is cycle)
- */
-static inline void timer_set_load(void __iomem *base, u32 load_val)
-{
- iowrite32(load_val, base+LOAD_REG);
- refresh_load_reg(base);
-}
-
-/*
- * set prescale, default is 0
- * 1--div 2 2--div 4 ...
- */
-static inline void timer_set_prescale(void __iomem *base, u32 prescale)
-{
- unsigned int tmp = ioread32(base+CONFIG_REG);
-
- tmp &= ~TIMER_PRESCALE(0x1F);
- tmp |= TIMER_PRESCALE(prescale);
-
- iowrite32(tmp, base+CONFIG_REG);
-
- refresh_config_reg(base);
-}
-
-
-/*-----------------------------------------------------------------------------
- *-------- timer helper functions --------------------------------------------
- *-----------------------------------------------------------------------------
- */
-static inline t_timer_info *zx_timer_alloc_info(void)
-{
- t_timer_info *info;
-
- info = &(zx_timer_ctx.info[zx_timer_ctx.nr]);
- zx_timer_ctx.nr ++;
-
- return info;
-}
-
-irqreturn_t zx_timer_isr(int irq, void *p)
-{
- t_timer_info *info = (t_timer_info *)p;
-
- if(info->cb)
- info->cb(info->cb_param);
-
- return IRQ_HANDLED;
-}
-
-static void zx_timer_configure_rate(struct device_node *np, t_timer_info *info)
-{
- /* clk */
- info->wclk = of_clk_get_by_name(np, "wclk");
- if (IS_ERR(info->wclk))
- BUG();
-
- info->pclk = of_clk_get_by_name(np, "pclk");
- if (IS_ERR(info->pclk))
- BUG();
- clk_prepare_enable(info->pclk);
-
- if (of_property_read_u32(np, "clock-frequency", &info->freq))
- info->freq = ZX_TIMER_DEFAULT_RATE;
-
- clk_set_rate(info->wclk, info->freq);
- clk_prepare_enable(info->wclk);
-
- pr_debug("wclk=%lu, parent=%s \n", clk_get_rate(info->wclk),
- __clk_get_name(clk_get_parent(info->wclk)));
-}
-
-static int zx_timer_set_callback(t_timer_info *info, zx_timer_cb cb, unsigned long param)
-{
- info->cb = cb;
- info->cb_param = param;
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------------
- *-------- common timer -----------------------------------------------------
- *-----------------------------------------------------------------------------
- */
-typedef struct
-{
- t_timer_info *info;
- u32 mult;
- u32 shift;
-
-} t_zx_common_timer;
-
-static t_zx_common_timer zx_common_timer;
-
-#define to_zx_timer_common() zx_common_timer.info
-#define for_zx_timer_common(x) zx_common_timer.info = x
-#define us_to_cyc(us) (((u64)us * zx_common_timer.mult) >> zx_common_timer.shift)
-
-int zx_timer_common_set_callback(zx_timer_cb cb, unsigned long param)
-{
- t_timer_info *info = to_zx_timer_common();
-
- return zx_timer_set_callback(info, cb, param);
-}
-
-/* expires -- unit is us */
-int zx_timer_common_start(unsigned int expires, bool periodic)
-{
- t_timer_info *info = to_zx_timer_common();
- unsigned int t0 = 1000;
- unsigned long cycles = us_to_cyc(expires);
-
- timer_set_load(info->reg, cycles);
-
-#if 0 /* when use 32k osc */
- /* wait data refresh finished. */
- t0=test_timer_read();
- while( (test_timer_read()-t0) < 4);
-#else
- while (t0--);
-#endif
-
- timer_set_mode(info->reg, periodic);
-
- timer_start(info->reg);
-
- enable_irq_wake(info->irq);
-
- return 0;
-}
-
-/* expires -- unit cycles */
-int zx_timer_common_start_cycles(unsigned int expires, bool periodic)
-{
- t_timer_info *info = to_zx_timer_common();
- unsigned int t0 = 1000;
- unsigned long cycles = expires;
-
- timer_set_load(info->reg, cycles);
-
-#if 0 /* when use 32k osc */
- /* wait data refresh finished. */
- t0=test_timer_read();
- while( (test_timer_read()-t0) < 4);
-#else
- while (t0--);
-#endif
-
- timer_set_mode(info->reg, periodic);
-
- timer_start(info->reg);
-
- enable_irq_wake(info->irq);
-
- return 0;
-}
-
-
-void zx_timer_common_stop(void)
-{
- t_timer_info *info = to_zx_timer_common();
-
- timer_stop(info->reg);
-
- disable_irq_wake(info->irq);
-}
-
-static int zx_timer_common_init(t_timer_info *info)
-{
- int ret;
- u64 sec;
-
- if (!(info->func & TIMER_FUNC_COMMON))
- return -ENODEV;
-
- for_zx_timer_common(info);
-
- sec = ZX_TIMER_MASK;
- do_div(sec, info->freq);
- if (!sec)
- sec = 1;
-
- clocks_calc_mult_shift(&zx_common_timer.mult, &zx_common_timer.shift, USEC_PER_SEC, info->freq, sec);
-
- timer_stop(info->reg);
-
- ret = request_irq(info->irq,
- zx_timer_isr,
- 0,
- "zx_timer_common",
- info);
- if(ret<0)
- BUG();
-
- enable_irq_wake(info->irq);
-
- return ret;
-}
-
-/****************************************************************
- *** wake timer(use common timer) ************************
- *** persistent timer(use cs timer) ************************
- ****************************************************************
- */
-#ifdef CONFIG_PM
-void zx29_set_wake_timer(unsigned long cycles)
-{
- zx_timer_common_start_cycles(cycles, false);
-}
-
-void zx29_stop_wake_timer(void)
-{
- zx_timer_common_stop();
-}
-#endif /*CONFIG_PM*/
-
-/*-----------------------------------------------------------------------------
- *-------- clock event ------------------------------------------------------
- *-----------------------------------------------------------------------------
- */
-#define to_zx_timer_clkevt(x) \
- container_of(x, t_timer_info, clkevt)
-
-static int zx_timer_clkevt_next_event(unsigned long evt,
- struct clock_event_device *clkevt)
-{
- t_timer_info *info = to_zx_timer_clkevt(clkevt);
-
- timer_stop(info->reg);
- timer_set_mode(info->reg, false);
- timer_set_load(info->reg, evt);
- timer_start(info->reg);
-
- return 0;
-}
-
-static int zx_timer_clkevt_set_periodic(struct clock_event_device *clkevt)
-{
- t_timer_info *info = to_zx_timer_clkevt(clkevt);
-
- timer_stop(info->reg);
- timer_set_mode(info->reg, true);
- timer_set_load(info->reg, DIV_ROUND_CLOSEST(info->freq, HZ));
- timer_start(info->reg);
-
- return 0;
-}
-
-static int zx_timer_clkevt_shutdown(struct clock_event_device *clkevt)
-{
- t_timer_info *info = to_zx_timer_clkevt(clkevt);
-
- timer_stop(info->reg);
-
- return 0;
-}
-
-void zx_timer_clkevt_cb(unsigned long data)
-{
- t_timer_info *info = (t_timer_info *)data;
- struct clock_event_device *ce = &info->clkevt;
-
- ce->event_handler(ce);
-}
-
-static struct clock_event_device *pm_ce;
-void clock_event_handler(void)
-{
- pm_ce->event_handler(pm_ce);
-}
-
-static int zx_timer_clkevt_init(t_timer_info *info)
-{
- int ret;
- struct clock_event_device *ce;
-
- if (!(info->func & TIMER_FUNC_CE))
- return -ENODEV;
-
- ce = &info->clkevt;
- pm_ce = ce;
-
- ce->name = info->np->full_name;
- ce->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
- ce->set_next_event = zx_timer_clkevt_next_event;
- ce->set_state_shutdown = zx_timer_clkevt_shutdown;
- ce->set_state_periodic = zx_timer_clkevt_set_periodic;
- ce->set_state_oneshot = zx_timer_clkevt_shutdown;
- ce->tick_resume = zx_timer_clkevt_shutdown;
- ce->rating = 300;
- ce->irq = info->irq;
- ce->cpumask = cpu_possible_mask;
-
- zx_timer_set_callback(info, zx_timer_clkevt_cb, (unsigned long)info);
- clockevents_config_and_register(ce, info->freq, 1, 0x7fffffff);
-
- ret = request_irq(info->irq,
- zx_timer_isr,
- 0,
- "zx_timer_ce",
- info);
- if(ret<0)
- BUG();
-
- return ret;
-}
-
-/*-----------------------------------------------------------------------------
- *-------- clock source -----------------------------------------------------
- *-----------------------------------------------------------------------------
- */
-static void __iomem *zx_cs_sched_reg;
-
-/**
- * zx29_read_persistent_clock64 - Return time from a persistent clock.
- *
- * Reads the time from a source which isn't disabled during PM, the
- * 32k sync timer. Convert the cycles elapsed since last read into
- * nsecs and adds to a monotonically increasing timespec64.
- */
-static struct timespec64 persistent_ts;
-static cycles_t cycles;
-static unsigned int persistent_mult, persistent_shift;
-
-static void zx29_read_persistent_clock64(struct timespec64 *ts)
-{
- unsigned long long nsecs;
- cycles_t last_cycles;
-
- last_cycles = cycles;
- cycles = zx_cs_sched_reg ? readl_relaxed(zx_cs_sched_reg) : 0;
-
- nsecs = clocksource_cyc2ns(last_cycles - cycles,
- persistent_mult, persistent_shift);
-
- timespec64_add_ns(&persistent_ts, nsecs);
-
- *ts = persistent_ts;
-}
-
-static int zx29_timer_persistent_init(t_timer_info *info)
-{
- u64 sec;
-
- sec = 0x80000000;
- do_div(sec, info->freq);
- if (!sec)
- sec = 1;
-
- clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
- info->freq, NSEC_PER_SEC, (u32)sec);
-
- register_persistent_clock(zx29_read_persistent_clock64);
-
- return 0;
-}
-
-
-#ifdef CONFIG_PM
-int zx29_clocksource_suspend(void)
-{
- /*
- *nothing should be done here.
- *maybe clocksource should be stoped, but I don't do this
- *there is no effect on system running, even if clocksource is not suspended actually.
- *I can use clocksource in power off processing for debug.
- */
- return 0;
-}
-
-void zx29_clocksource_resume(void)
-{
-#if 0
- /*re-initiate the clocksource*/
- iowrite32(0x7fffffff,SOURCE_BASE_VA+LOAD_REG); // 2^31-1
-#ifdef CONFIG_ARCH_ZX297510FPGA
- iowrite32(0x02,SOURCE_BASE_VA+CONFIG_REG); // auto load
-#else
- iowrite32(0x22,SOURCE_BASE_VA+CONFIG_REG); // main clock/13/2 , auto load
- refresh_config_load_reg(SOURCE_BASE_VA); // refresh load reg and config reg
- iowrite32(0x1,SOURCE_BASE_VA+START_REG); // start timer
-#endif
-#endif
-}
-
-static struct syscore_ops zx29_clocksource_syscore_ops = {
- .suspend = zx29_clocksource_suspend,
- .resume = zx29_clocksource_resume,
-};
-#endif
-
-static u64 zx_timer_cs_read(struct clocksource *cs)
-{
- return ~(u64)readl_relaxed(zx_cs_sched_reg) & cs->mask;
-}
-
-static u64 notrace zx_timer_cs_read_sched_clock(void)
-{
- return ~(u64)readl_relaxed(zx_cs_sched_reg) & 0x7fffffff;
-}
-
-static int zx_timer_cs_init(t_timer_info *info)
-{
- int ret;
- struct clocksource *cs;
-
- if (!(info->func & TIMER_FUNC_CS))
- return -ENODEV;
-
- timer_set_mode(info->reg, true);
- timer_set_load(info->reg, 0x7fffffff);
- timer_start(info->reg);
-
- zx_cs_sched_reg = info->reg + CUR_VALUE;
-
- cs = kzalloc(sizeof(struct clocksource), GFP_KERNEL);
- if (!cs)
- return -ENOMEM;
-
- info->cs = cs;
- cs->name = info->np->full_name;
- cs->rating = 200;
- cs->read = zx_timer_cs_read;
- cs->mask = CLOCKSOURCE_MASK(31);
- cs->flags = CLOCK_SOURCE_IS_CONTINUOUS|CLOCK_SOURCE_SUSPEND_NONSTOP;
- clocksource_register_hz(cs, info->freq);
-
- sched_clock_register(zx_timer_cs_read_sched_clock, 31, info->freq);
-
-#ifdef CONFIG_PM
- register_syscore_ops(&zx29_clocksource_syscore_ops);
-#endif
-
- zx29_timer_persistent_init(info);
-
- return ret;
-}
-
-static int __init zx_timer_of_init(struct device_node *np)
-{
- t_timer_info *info;
-
- info = zx_timer_alloc_info();
-
- info->reg = of_iomap(np, 0);
- info->irq = irq_of_parse_and_map(np, 0);
- info->np = np;
-
- zx_timer_configure_rate(np, info);
-
- of_property_read_u32(np, "timer_function", &info->func);
- if (!info->func)
- return -EINVAL;
-
- zx_timer_clkevt_init(info);
-
- zx_timer_cs_init(info);
-
- zx_timer_common_init(info);
-
- return 0;
-}
-
-TIMER_OF_DECLARE(zx29_timer, "zte,zx29-timer", zx_timer_of_init);
-
-/*-----------------------------------------------------------------------------
- *-------- zx_timer_test -----------------------------------------------------
- *-----------------------------------------------------------------------------
- */
-extern struct kobject *zx_test_kobj;
-static unsigned int test_timer_count = 0;
-
-void test_timer_cb(unsigned long data)
-{
- test_timer_count ++;
- pr_info("test_timer_cb arrived(%d) \n", test_timer_count);
-}
-
-static ssize_t soc_timer_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- return sprintf(buf, "timer_int_count:%d\n", test_timer_count);
-}
-
-static ssize_t soc_timer_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
-{
- unsigned int temp;
-
- if(sscanf(buf, "%u", &temp) != 1)
- {
- pr_info("temp=%d error", temp);
- return (count);
- }
-
- pr_info("temp=%d", temp);
-
- if(temp == 1)
- {
- zx_timer_common_set_callback((zx_timer_cb)test_timer_cb, 0);
- zx_timer_common_start(5*1000*1000, true); /* 5s */
- }
- else
- {
- zx_timer_common_stop();
- test_timer_count = 0;
- }
-
- return (count);
-}
-
-
-static DEVICE_ATTR(soc_timer, 0600, soc_timer_show, soc_timer_store);
-static struct attribute *zx_timer_attributes[] = {
- &dev_attr_soc_timer.attr,
- NULL,
-};
-
-static const struct attribute_group zx_timer_attribute_group = {
- .attrs = (struct attribute **) zx_timer_attributes,
-};
-
-int __init zx_timer_test_init(void)
-{
- int ret;
-
- ret = sysfs_create_group(zx_test_kobj, &zx_timer_attribute_group);
- if (!ret)
- pr_info("[DEBUG] create test timer sysfs interface OK.\n");
-
- return 0;
-}
-
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/spi/spi-zx29.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/spi/spi-zx29.c
index 7cb7f1a..5150a52 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/spi/spi-zx29.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/spi/spi-zx29.c
@@ -43,6 +43,7 @@
//#include <linux/soc/zte/pm/drv_idle.h>
#include "spi-zx29.h"
+#include "pub_debug_info.h"
struct zx29_ssp_device_of_data {
enum zx29_ssp_device_mode mode;
@@ -210,6 +211,9 @@
*/
#define SPI_SOD_DISABLED (1)
#define SPI_SOD_ENABLED (0)
+#define SPI_SLAVE_MODE (1)
+#define SPI_MASTER_MODE (0)
+
/*
* SPI TRANSFER DELAY CFG
@@ -1326,7 +1330,7 @@
u32 irqflags = ENABLE_ALL_INTERRUPTS;
struct spi_transfer *transfer = zx29spi->cur_transfer;
int ret = 0;
-
+ static int sc_debug_info_record_cnt[4] ={0};
if((void *)transfer->tx_dma != NULL){
zx29spi->tx = (void *)transfer->tx_dma;
zx29spi->tx_end = zx29spi->tx + zx29spi->cur_transfer->len;
@@ -1368,7 +1372,12 @@
ret = down_timeout(&zx29spi->sema_dma, msecs_to_jiffies(1500));
//printk("COM=0x%x,FMT=0x%x,FIFO_CTL=0x%x,FIFO_SR=0x%x\n",readl((SPI_COM_CTRL_OFFSET+zx29spi->virtbase)),readl((SPI_FMT_CTRL_OFFSET+zx29spi->virtbase)),readl((SPI_FIFO_CTRL_OFFSET+zx29spi->virtbase)),readl((SPI_FIFO_SR_OFFSET+zx29spi->virtbase)));
if (ret < 0) {
- panic("spi transfer timeout\n");
+ panic("spi transfer timeout,times(%d)\n",sc_debug_info_record_cnt[zx29spi->pdev->id]);
+ if(sc_debug_info_record_cnt[zx29spi->pdev->id] < 5) {
+ sc_debug_info_record(MODULE_ID_CAP_SPI, "%s transfer timeout:0x%x 0x%x 0x%x \n",zx29spi->pdev->name,readl((SPI_COM_CTRL_OFFSET+zx29spi->virtbase)),
+ readl((SPI_FIFO_SR_OFFSET+zx29spi->virtbase)),readl((SPI_INTR_SR_OFFSET+zx29spi->virtbase)));
+ }
+ sc_debug_info_record_cnt[zx29spi->pdev->id]++;
}
while (readl((SPI_FIFO_SR_OFFSET+zx29spi->virtbase)) & SPI_FIFO_SR_MASK_BUSY)
@@ -1427,11 +1436,13 @@
struct device *dev;
struct spi_transfer *transfer;
int ret = 0;
-
+ static int sc_debug_info_record_tx_cnt[4] ={0};
+ static int sc_debug_info_record_rx_cnt[4] ={0};
+
if(!zx29spi || !msg)
return -EFAULT;
- if (msg->is_dma_mapped || !msg->spi->dma_used) {
+ if (msg->is_dma_mapped || !msg->spi->dma_used || !zx29spi->master_info->enable_dma) {
return 0;
}
dev = &zx29spi->pdev->dev;
@@ -1444,18 +1455,24 @@
if (transfer->tx_buf != NULL) {
transfer->tx_dma = dma_map_single(dev,(void *)transfer->tx_buf, transfer->len, DMA_TO_DEVICE);
if (dma_mapping_error(dev, transfer->tx_dma)) {
- dev_err(dev, "dma_map_single spi Tx failed\n");
+ dev_err(dev, "dma_map_single spi Tx failed,times(%d)\n",sc_debug_info_record_tx_cnt[zx29spi->pdev->id]);
+ if(sc_debug_info_record_tx_cnt[zx29spi->pdev->id] < 5)
+ sc_debug_info_record(MODULE_ID_CAP_SPI, "%s tx_dma_map failed \n",zx29spi->pdev->name);
transfer->tx_dma = 0;
ret |= -ENOMEM;
+ sc_debug_info_record_tx_cnt[zx29spi->pdev->id]++;
}
}
if (transfer->rx_buf != NULL) {
transfer->rx_dma = dma_map_single(dev, transfer->rx_buf, transfer->len, DMA_FROM_DEVICE);
if (dma_mapping_error(dev, transfer->rx_dma)) {
- dev_err(dev, "dma_map_single spi Rx failed\n");
+ dev_err(dev, "dma_map_single spi Rx failed,times(%d)\n",sc_debug_info_record_rx_cnt[zx29spi->pdev->id]);
+ if(sc_debug_info_record_rx_cnt[zx29spi->pdev->id] < 5)
+ sc_debug_info_record(MODULE_ID_CAP_SPI, "%s rx_dma_map failed \n",zx29spi->pdev->name);
transfer->rx_dma = 0;
ret |= -ENOMEM;
+ sc_debug_info_record_rx_cnt[zx29spi->pdev->id]++;
}
if (!transfer->rx_dma && transfer->tx_dma && transfer->tx_buf) {
@@ -1475,7 +1492,7 @@
struct device *dev = &zx29spi->pdev->dev;
struct spi_transfer *transfer;
- if (msg->is_dma_mapped || !zx29spi->master_info->enable_dma)
+ if (msg->is_dma_mapped || !msg->spi->dma_used || !zx29spi->master_info->enable_dma)
return;
list_for_each_entry(transfer, &msg->transfers, transfer_list) {
@@ -2108,6 +2125,22 @@
EXPORT_SYMBOL(spi_gpio_3wire_read8);
+static void zx29_setup_to_regs(struct chip_data *chip,struct zx29_spi *zx29spi)
+{
+ unsigned int regval = 0;
+
+ regval = readl((SPI_COM_CTRL_OFFSET+zx29spi->virtbase)) & (~SPI_COM_CTRL_MASK_SSPE);
+ writel(regval, (SPI_COM_CTRL_OFFSET+zx29spi->virtbase));
+
+ writel(chip->fmt_ctrl, (SPI_FMT_CTRL_OFFSET+zx29spi->virtbase));
+ writel(chip->fifo_ctrl, (SPI_FIFO_CTRL_OFFSET+zx29spi->virtbase));
+ writel(chip->com_ctrl, (SPI_COM_CTRL_OFFSET + zx29spi->virtbase));
+ //writel(chip->timing, (SPI_TIMING_OFFSET + zx29spi->virtbase));
+
+ writel(readl((SPI_COM_CTRL_OFFSET+zx29spi->virtbase)) | SPI_COM_CTRL_MASK_SSPE, (SPI_COM_CTRL_OFFSET+zx29spi->virtbase));
+ while(((readl((SPI_COM_CTRL_OFFSET+zx29spi->virtbase))>> 4)&0x1) == 0);
+
+}
/**
* zx29_setup - setup function registered to SPI master framework
* @spi: spi device which is requesting setup
@@ -2281,7 +2314,12 @@
SPI_WRITE_BITS(chip->timing, spi->trans_gap_num, SPI_TIMING_MASK_T_CS_DESEL, 0);
/* Save controller_state */
spi_set_ctldata(spi, chip);
-
+ if(zx29spi->mode == ZX29_SSP_SLAVE_TYPE) {
+
+ SPI_WRITE_BITS(chip->com_ctrl, SPI_SLAVE_MODE, SPI_COM_CTRL_MASK_MS, 2);
+ zx29_setup_to_regs(chip,zx29spi);
+ }
+
return status;
err_config_params:
spi_set_ctldata(spi, NULL);
@@ -2690,8 +2728,10 @@
/* Get DMA channels */
if (platform_info->enable_dma) {
status = zx29_dma_probe(zx29spi);
- if (status != 0)
+ if (status != 0) {
platform_info->enable_dma = 0;
+ sc_debug_info_record(MODULE_ID_CAP_SPI, "%s dma probe failed \n",pdev->name);
+ }
}
#if SPI_PSM_CONTROL
@@ -2760,7 +2800,7 @@
return 0;
platform_info->bus_id = 0,
platform_info->num_chipselect = 1,
- platform_info->enable_dma = 0,
+ platform_info->enable_dma = 1,
platform_info->autosuspend_delay=0,
/* Allocate master with space for data */
@@ -2867,8 +2907,10 @@
/* Get DMA channels */
if (platform_info->enable_dma) {
status = zx29_dma_probe(zx29spi);
- if (status != 0)
+ if (status != 0) {
platform_info->enable_dma = 0;
+ sc_debug_info_record(MODULE_ID_CAP_SPI, "%s dma probe failed",pdev->name);
+ }
}
#if SPI_PSM_CONTROL
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/sound/soc/sanechips/zx29_ak4940.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/sound/soc/sanechips/zx29_ak4940.c
index 312ff9a..f730067 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/sound/soc/sanechips/zx29_ak4940.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/sound/soc/sanechips/zx29_ak4940.c
@@ -400,12 +400,7 @@
raw_spin_unlock_irqrestore(&codec_pa_lock, flags);
}
#endif
-
- unsigned int armRegBit = 0;
- //armRegBit = zx_read_reg(AON_WIFI_BT_CLK_CFG2);
- //armRegBit &= 0xfffffffe;
- //armRegBit |= 0x1;
- //zx_write_reg(AON_WIFI_BT_CLK_CFG2, armRegBit);
+
return 0;
}
@@ -427,11 +422,7 @@
if (snd_soc_dai_active(cpu_dai))
return;
- u32 armRegBit;
- //armRegBit = zx_read_reg(AON_WIFI_BT_CLK_CFG2);
- //armRegBit &= 0xfffffffe;
- //armRegBit |= 0x0;
- //zx_write_reg(AON_WIFI_BT_CLK_CFG2, armRegBit);
+
}
@@ -454,11 +445,7 @@
if (snd_soc_dai_active(cpu_dai))
return;
- u32 armRegBit;
- //armRegBit = zx_read_reg(AON_WIFI_BT_CLK_CFG2);
- //armRegBit &= 0xfffffffe;
- //armRegBit |= 0x0;
- //zx_write_reg(AON_WIFI_BT_CLK_CFG2, armRegBit);
+
}
static int zx29_init_paiftx(struct snd_soc_pcm_runtime *rtd)
{
@@ -1887,8 +1874,6 @@
board = devm_kzalloc(&pdev->dev, sizeof(*board), GFP_KERNEL);
if (!board)
return -ENOMEM;
- board->name = "zx29_ak4940";
- board->dev = &pdev->dev;
if (np) {
zx29_dai_link[0].cpus->dai_name = NULL;
@@ -1923,6 +1908,9 @@
id = of_match_device(of_match_ptr(zx29_ak4940_of_match), &pdev->dev);
if (id)
*board = *((struct zx29_board_data *)id->data);
+
+ board->name = "zx29_ak4940";
+ board->dev = &pdev->dev;
//platform_set_drvdata(pdev, board);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/sound/soc/sanechips/zx29_voice.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/sound/soc/sanechips/zx29_voice.c
index 8307de7..3ce31ac 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/sound/soc/sanechips/zx29_voice.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/sound/soc/sanechips/zx29_voice.c
@@ -134,6 +134,16 @@
//extern T_DrvVoice_3G_Opt gDrvVoice_3G_Obj;
#endif
+struct zx29_voice_data {
+ const char *name;
+ struct device *dev;
+ struct mutex mutex;
+
+};
+
+static struct zx29_voice_data vdata = {
+ .name = "zx29_voice",
+};
static const struct snd_pcm_hardware dma_hardware = {
.info = SNDRV_PCM_INFO_INTERLEAVED |
@@ -155,10 +165,37 @@
};
+static void zx29_voice_set_active(struct zx29_voice_data *data)
+{
+
+ print_audio("Alsa: Entered func %s\n", __func__);
+#ifdef CONFIG_PM
+ mutex_lock(&data->mutex);
+ pm_stay_awake(data->dev);
+ mutex_unlock(&data->mutex);
+#endif
+
+}
+
+static void zx29_voice_set_idle(struct zx29_voice_data *data)
+{
+
+ print_audio("Alsa: Entered func %s\n", __func__);
+#ifdef CONFIG_PM
+ mutex_lock(&data->mutex);
+ pm_relax(data->dev);
+ mutex_unlock(&data->mutex);
+#endif
+
+}
+
+
static int voice_hw_params(struct snd_soc_component *component,struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_pcm_runtime *runtime = substream->runtime;
+ print_audio("Alsa Entered func %s\n", __func__);
+
struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
if (rtd->dai_link->name != NULL && (!strcmp(rtd->dai_link->name, "voice_3g"))) {
@@ -172,7 +209,7 @@
static int voice_hw_free(struct snd_soc_component *component,struct snd_pcm_substream *substream)
{
int ret = 0;
-// print_audio("Alsa Entered func %s\n", __func__);
+ print_audio("Alsa Entered func %s\n", __func__);
struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
if (rtd->dai_link->name != NULL && (!strcmp(rtd->dai_link->name, "voice_3g"))) {
@@ -185,7 +222,7 @@
static int voice_prepare(struct snd_soc_component *component,struct snd_pcm_substream *substream)
{
int ret = 0;
-// print_audio("Alsa Entered func %s\n", __func__);
+ print_audio("Alsa Entered func %s\n", __func__);
#if defined(USE_ALSA_VOICE_FUNC) && defined(CONFIG_VOICE_DRV)
struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
@@ -204,13 +241,8 @@
static int voice_trigger(struct snd_soc_component *component,struct snd_pcm_substream *substream, int cmd)
{
int ret = 0;
-// print_audio("Alsa Entered func %s, cmd=%d\n", __func__, cmd);
+ print_audio("Alsa Entered func %s, cmd=%d\n", __func__, cmd);
struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
- if (rtd->dai_link->name != NULL && (!strcmp(rtd->dai_link->name, "voice_3g"))) {
-
- print_audio("Alsa Entered func %s 3g soft amr !\n", __func__);
- return 0;
- }
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
break;
@@ -226,7 +258,7 @@
static int voice_open(struct snd_soc_component *component,struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
-// print_audio("Alsa Entered func %s\n", __func__);
+ print_audio("Alsa Entered func %s\n", __func__);
int ret = 0;
struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
@@ -261,13 +293,15 @@
}
}
#endif
+ zx29_voice_set_active(&vdata);
+
return ret;
}
static int voice_close(struct snd_soc_component *component,struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
-// print_audio("Alsa Entered func %s\n", __func__);
+ print_audio("Alsa Entered func %s\n", __func__);
int ret = 0;
struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
#if defined(USE_ALSA_VOICE_FUNC) && defined(CONFIG_VOICE_DRV)
@@ -295,6 +329,7 @@
}
#endif
+ zx29_voice_set_idle(&vdata);
return ret;
}
@@ -403,6 +438,14 @@
return ret;
}
+ vdata.dev = &pdev->dev;
+#ifdef CONFIG_PM
+ mutex_init(&vdata.mutex);
+ device_init_wakeup(vdata.dev, true);
+ if(vdata.dev != NULL)
+ dev_info(&pdev->dev,"%s: device_init_wakeup dev driver_name=%s,dev_name=%s!\n",__func__,dev_driver_string(vdata.dev),dev_name(vdata.dev));
+
+#endif
dev_info(&pdev->dev,"%s end!\n", __func__);
pr_info( "voice_asoc_platform_probe end\n");
@@ -418,7 +461,7 @@
static const struct of_device_id voice_of_match[] = {
- { .compatible = "voice_audio", },
+ { .compatible = "voice_audio", .data = &vdata },
{},
};
MODULE_DEVICE_TABLE(of, voice_of_match);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/ab_bootinfo/Makefile b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/ab_bootinfo/Makefile
index ba8e396..29d5251 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/ab_bootinfo/Makefile
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/ab_bootinfo/Makefile
@@ -13,7 +13,9 @@
#LDLIBS = -lnvram_sc -L$(LIB_DIR)/libnvram
-LDLIBS += -lpthread -lmtd -lnvram -lsofttimer -lupi_ab -lsoftap
+#LDLIBS += -lmtd
+LDLIBS += -lpthread -lnvram -lsofttimer -lupi_ab -lsoftap
+LDLIBS += -lcrypto
#LDLIBS += -lcrypto -L$(LIB_DIR)/libssl/install/lib
##############USER COMIZE END##################
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/ab_bootinfo/ab_bootinfo.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/ab_bootinfo/ab_bootinfo.c
old mode 100644
new mode 100755
index 94d3dfc..b0224de
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/ab_bootinfo/ab_bootinfo.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/ab_bootinfo/ab_bootinfo.c
@@ -14,14 +14,17 @@
switch (ret)
{
- case 1:
+ case Z_DUAL_SYSTEM:
printf("ab_bootinfo:ab_a\n");
+ ret = 1;
break;
- case 2:
+ case Z_DUAL_SYSTEM2:
printf("ab_bootinfo:ab_b\n");
+ ret = 2;
break;
default:
printf("[error]ab_bootinfo:%d\n", ret);
+ ret = 1;
break;
}
return ret;
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fota_upi_ab/Makefile b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fota_upi_ab/Makefile
index 694a25d..947728a 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fota_upi_ab/Makefile
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fota_upi_ab/Makefile
@@ -74,10 +74,11 @@
# SHA512 functions in libcrypto.a not libssl
#LDLIBS += -lssl
-#LDLIBS += -lcrypto
-#LDLIBS += -L$(zte_lib_path)/libssl/install/lib
-#LDLIBS += -L$(zte_lib_path)/libnvram
-#LDLIBS += -L$(zte_lib_path)/libsoftap
+# ap and cap then remove next four lines
+LDLIBS += -lcrypto
+LDLIBS += -L$(zte_lib_path)/libssl/install/lib
+LDLIBS += -L$(zte_lib_path)/libnvram
+LDLIBS += -L$(zte_lib_path)/libsoftap
#LDLIBS += -lcpnv -L$(LIB_DIR)/libcpnv
@@ -85,7 +86,8 @@
CFLAGS += -I$(LIB_DIR)/libsoftap
CFLAGS += -I$(LIB_DIR)/libsofttimer
-LDLIBS += -lmtd
+# ap and cap then open the next line
+#LDLIBS += -lmtd
LDLIBS += -lnvram -L$(LIB_DIR)/libnvram
LDLIBS += -lsofttimer -L$(LIB_DIR)/libsofttimer
LDLIBS += -latutils -L$(LIB_DIR)/libatutils
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fota_upi_ab/src/main.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fota_upi_ab/src/main.c
index b30ea01..e5f04dd 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fota_upi_ab/src/main.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fota_upi_ab/src/main.c
@@ -48,9 +48,10 @@
* Type definitions *
******************************************************************************/
-typedef struct {
- int option_value;
- int (*func)(char *);
+typedef struct
+{
+ int option_value;
+ int (*func)(char *);
} option_handle_t;
@@ -76,7 +77,7 @@
static int execute_command_get_upgrade_type(char *option_para);
static int execute_command_get_sync_status(char * option_para);
static int execute_command_set_sync_status(char * option_para);
-
+static int execute_command_config_package_path(char * option_para);
/*******************************************************************************
@@ -85,45 +86,49 @@
/*----------Command parser begin---------------------------------------------------------*/
-static char * g_short_string = "u:cgb:sio:t:qr:hvypne:";
+static char * g_short_string = "u:cgb:sio:t:qr:hvypne:a:";
-static struct option g_long_options[] = {
- {"upgrade", required_argument, NULL, 'u'},
- {"get-current", no_argument, NULL, 'c'},
- {"get-boot", no_argument, NULL, 'g'},
- {"set-boot", required_argument, NULL, 'b'},
- {"get-upgrade_status", no_argument, NULL, 's'},
- {"get-system-info", no_argument, NULL, 'i'},
- {"set-system1-status", required_argument, NULL, 'o'},
- {"set-system2-status", required_argument, NULL, 't'},
- {"get-fota-status", no_argument, NULL, 'q'},
- {"set-fota-status", required_argument, NULL, 'r'},
- {"help", no_argument, NULL, 'h'},
- {"version", no_argument, NULL, 'v'},
- {"sync", no_argument, NULL, 'y'},
- {"get-upgrade-type", no_argument, NULL, 'p'},
- {"get-sync-status", no_argument, NULL, 'n'},
- {"set-sync-status", required_argument, NULL, 'e'},
- {0, 0, 0, 0}
+static struct option g_long_options[] =
+{
+ {"upgrade", required_argument, NULL, 'u'},
+ {"get-current", no_argument, NULL, 'c'},
+ {"get-boot", no_argument, NULL, 'g'},
+ {"set-boot", required_argument, NULL, 'b'},
+ {"get-upgrade_status", no_argument, NULL, 's'},
+ {"get-system-info", no_argument, NULL, 'i'},
+ {"set-system1-status", required_argument, NULL, 'o'},
+ {"set-system2-status", required_argument, NULL, 't'},
+ {"get-fota-status", no_argument, NULL, 'q'},
+ {"set-fota-status", required_argument, NULL, 'r'},
+ {"help", no_argument, NULL, 'h'},
+ {"version", no_argument, NULL, 'v'},
+ {"sync", no_argument, NULL, 'y'},
+ {"get-upgrade-type", no_argument, NULL, 'p'},
+ {"get-sync-status", no_argument, NULL, 'n'},
+ {"set-sync-status", required_argument, NULL, 'e'},
+ {"config-package-path", required_argument, NULL, 'a'},
+ {0, 0, 0, 0}
};
-static option_handle_t g_option_handle[] = {
- {'u', excute_command_upgrade},
- {'c', excute_command_get_current_system},
- {'g', excute_command_get_boot_to_system},
- {'b', excute_command_set_boot_to_system},
- {'s', excute_command_get_status},
- {'i', excute_command_get_system_info},
- {'o', excute_command_set_system1_status},
- {'t', excute_command_set_system2_status},
- {'q', excute_command_get_fota_status},
- {'r', excute_command_set_fota_status},
- {'h', excute_command_help},
- {'v', execute_command_version},
- {'y', execute_command_sync},
- {'p', execute_command_get_upgrade_type},
- {'n', execute_command_get_sync_status},
- {'e', execute_command_set_sync_status}
+static option_handle_t g_option_handle[] =
+{
+ {'u', excute_command_upgrade},
+ {'c', excute_command_get_current_system},
+ {'g', excute_command_get_boot_to_system},
+ {'b', excute_command_set_boot_to_system},
+ {'s', excute_command_get_status},
+ {'i', excute_command_get_system_info},
+ {'o', excute_command_set_system1_status},
+ {'t', excute_command_set_system2_status},
+ {'q', excute_command_get_fota_status},
+ {'r', excute_command_set_fota_status},
+ {'h', excute_command_help},
+ {'v', execute_command_version},
+ {'y', execute_command_sync},
+ {'p', execute_command_get_upgrade_type},
+ {'n', execute_command_get_sync_status},
+ {'e', execute_command_set_sync_status},
+ {'a', execute_command_config_package_path}
};
@@ -140,215 +145,234 @@
static void usage(void)
{
- printf("fota_upi [-cgsiqhvypn] [-u <target>][-b <boot to system>][-otr <system info>][-e <sync status>]\n "
- " -u, --upgrade verify or update \n"
- " -c , --get-current get current system \n"
- " -g , --get-boot get boot to system \n"
- " -b, --set-boot set boot to system \n"
- " -s, --get-status get system status \n"
- " -i, --get-system-info get system info \n"
- " -o, --set-system1-status set system1 status info \n"
- " -t, --set-system2-status set system2 status info \n"
- " -q, --get-fota-status get fota status to show if need sync NV when next reboot, 0:no 1:yes \n"
- " -r, --set-fota-status set fota status to show if need sync NV when next reboot, 0:no 1:yes \n"
- " -h , --help show this usage text\n"
- " -v, --version show current version \n"
- " -y, --sync sync \n"
- " -p, --get-upgrade-type get upgrade type \n"
- " -n, --get-sync-status get sync status \n"
- " -e, --set-sync-status set sync status \n");
+ printf("fota_upi [-cgsiqhvypn] [-u <target>][-b <boot to system>][-otr <system info>][-e <sync status>]\n "
+ " -u, --upgrade verify or update \n"
+ " -c , --get-current get current system \n"
+ " -g , --get-boot get boot to system \n"
+ " -b, --set-boot set boot to system \n"
+ " -s, --get-status get system status \n"
+ " -i, --get-system-info get system info \n"
+ " -o, --set-system1-status set system1 status info \n"
+ " -t, --set-system2-status set system2 status info \n"
+ " -q, --get-fota-status get fota status to show if need sync NV when next reboot, 0:no 1:yes \n"
+ " -r, --set-fota-status set fota status to show if need sync NV when next reboot, 0:no 1:yes \n"
+ " -h , --help show this usage text\n"
+ " -v, --version show current version \n"
+ " -y, --sync sync \n"
+ " -p, --get-upgrade-type get upgrade type \n"
+ " -n, --get-sync-status get sync status \n"
+ " -e, --set-sync-status set sync status \n"
+ " -a, --config-package-path config package path \n");
}
z_upgrade_status_info_t g_upgrade_status;
void g_flush_upgrade_status(z_upgrade_status_info_t *p_status)
{
-// LOG_FUNC_BEGIN
- printf("Current status:%d \n", p_status->upgrade_status);
+ // LOG_FUNC_BEGIN
+ printf("Current status:%d \n", p_status->upgrade_status);
- printf("Total size:%d \n", p_status->total_size);
+ printf("Total size:%d \n", p_status->total_size);
- printf("Updated size:%d \n", p_status->upgraded_size);
-// LOG_FUNC_END
+ printf("Updated size:%d \n", p_status->upgraded_size);
+ // LOG_FUNC_END
}
/*----------Command parser function begin------------------------------------------------*/
static int excute_command_upgrade(char * option_para)
{
- int ret = -1;
-
- if (NULL == option_para) {
- usage();
- printf("Command input invalid! null input upgrade para, please choose verify or recovery or system! \n");
- return -1;
- }
+ int ret = -1;
-
- if (0 == strcmp(FOTA_UPI_VERIFY, option_para)) {
- printf("Begin to verify upgrade package \n");
- ret = zxic_dual_verify();
- } else if (0 == strcmp(FOTA_UPI_UPDATE, option_para)) {
-// ret = upi_update();
- z_upgrade_flush_status_t flush_status;
- z_upgrade_status_info_t status ;
- memset(&status, 0, sizeof(z_upgrade_status_info_t));
- flush_status.status = &status;
- flush_status.status_cb = &g_flush_upgrade_status;
- ret = zxic_dual_upgrade(&flush_status);
- } else {
- printf("Unknow input upgrade para, verify or update! \n");
- return -1;
- }
+ if (NULL == option_para)
+ {
+ usage();
+ printf("Command input invalid! null input upgrade para, please choose verify or recovery or system! \n");
+ return -1;
+ }
- return ret;
+ if (0 == strcmp(FOTA_UPI_VERIFY, option_para))
+ {
+ printf("Begin to verify upgrade package \n");
+ ret = zxic_dual_verify();
+ }
+ else if (0 == strcmp(FOTA_UPI_UPDATE, option_para))
+ {
+ // ret = upi_update();
+ z_upgrade_flush_status_t flush_status;
+ z_upgrade_status_info_t status ;
+ memset(&status, 0, sizeof(z_upgrade_status_info_t));
+ flush_status.status = &status;
+ flush_status.status_cb = &g_flush_upgrade_status;
+ ret = zxic_dual_upgrade(&flush_status);
+ }
+ else
+ {
+ printf("Unknow input upgrade para, verify or update! \n");
+ return -1;
+ }
+
+
+ return ret;
}
static int excute_command_get_current_system(char * option_para)
{
- int current = zxic_dual_get_current_system();
+ int current = zxic_dual_get_current_system();
- printf("Current system:0x%08X[%d] \n", current, current);
+ printf("Current system:0x%08X[%d] \n", current, current);
- return current;
+ return current;
}
static int excute_command_get_boot_to_system(char * option_para)
{
- int boot_to = zxic_dual_get_boot_to_system();
+ int boot_to = zxic_dual_get_boot_to_system();
- printf("Boot to system:0x%08X[%d]\n", boot_to, boot_to);
+ printf("Boot to system:0x%08X[%d]\n", boot_to, boot_to);
- return 0;
+ return 0;
}
static int excute_command_set_boot_to_system(char * option_para)
{
- int ret = 0;
+ int ret = 0;
- if (NULL == option_para) {
- usage();
- printf("Command input invalid value! null option parameters! \n");
- return -1;
- }
+ if (NULL == option_para)
+ {
+ usage();
+ printf("Command input invalid value! null option parameters! \n");
+ return -1;
+ }
- ret = zxic_dual_set_boot_to_system(atoi(option_para), 0);
- if(ret < 0){
- printf("Set boot to [%s] error \n", option_para);
- }
+ ret = zxic_dual_set_boot_to_system(atoi(option_para), 0);
+ if (ret < 0)
+ {
+ printf("Set boot to [%s] error \n", option_para);
+ }
- return ret;
+ return ret;
}
static int excute_command_get_status(char *option_para)
{
- z_upgrade_status_info_t status;
- if(zxic_dual_get_upgrade_status(&status) < 0){
- printf("Get upgrade status fail! \n");
- return -1;
- }
-
- printf("Current upgrade info: \n");
- printf("Current upgrade status:%d \n", status.upgrade_status);
- printf("Current upgrade total size:%d \n", status.total_size);
- printf("Current upgrade updated size:%d \n", status.upgraded_size);
-
+ z_upgrade_status_info_t status;
+ if (zxic_dual_get_upgrade_status(&status) < 0)
+ {
+ printf("Get upgrade status fail! \n");
+ return -1;
+ }
+
+ printf("Current upgrade info: \n");
+ printf("Current upgrade status:%d \n", status.upgrade_status);
+ printf("Current upgrade total size:%d \n", status.total_size);
+ printf("Current upgrade updated size:%d \n", status.upgraded_size);
+
return 0;
}
static int excute_command_get_system_info(char * option_para)
{
- z_upgrade_system_info_t system_info;
- if(zxic_dual_get_system_status(&system_info) < 0){
- printf("Get upgrade status fail! \n");
- return -1;
- }else{
- printf("System info: \n");
- printf("Boot to:0x%08X[%d] \n", system_info.boot_to, system_info.boot_to);
- printf("Fota status:%d \n", system_info.fota_status);
- printf("System1 system:0x%08X [%d] \n", system_info.system_1.system, system_info.system_1.system);
- printf("System1 status:%d \n", system_info.system_1.status);
- printf("System1 try_cnt:%d \n", system_info.system_1.try_cnt);
- printf("System2 system:0x%08X [%d] \n", system_info.system_2.system, system_info.system_2.system);
- printf("System2 status:%d \n", system_info.system_2.status);
- printf("System2 try_cnt:%d \n", system_info.system_2.try_cnt);
- }
+ z_upgrade_system_info_t system_info;
+ if (zxic_dual_get_system_status(&system_info) < 0)
+ {
+ printf("Get upgrade status fail! \n");
+ return -1;
+ }
+ else
+ {
+ printf("System info: \n");
+ printf("Boot to:0x%08X[%d] \n", system_info.boot_to, system_info.boot_to);
+ printf("Fota status:%d \n", system_info.fota_status);
+ printf("System1 system:0x%08X [%d] \n", system_info.system_1.system, system_info.system_1.system);
+ printf("System1 status:%d \n", system_info.system_1.status);
+ printf("System1 try_cnt:%d \n", system_info.system_1.try_cnt);
+ printf("System2 system:0x%08X [%d] \n", system_info.system_2.system, system_info.system_2.system);
+ printf("System2 status:%d \n", system_info.system_2.status);
+ printf("System2 try_cnt:%d \n", system_info.system_2.try_cnt);
+ }
- return 0;
+ return 0;
}
static int excute_command_set_system1_status(char * option_para)
{
- int ret = -1;
- if (NULL == option_para) {
- usage();
- printf("Command input invalid value! null option parameters! \n");
- return -1;
- }
-
- ret = zxic_dual_set_system_status(34650, atoi(option_para));
- if(ret < 0){
- printf("Set system 1 status to [%s] error \n", option_para);
- }
+ int ret = -1;
+ if (NULL == option_para)
+ {
+ usage();
+ printf("Command input invalid value! null option parameters! \n");
+ return -1;
+ }
- return ret;
+ ret = zxic_dual_set_system_status(34650, atoi(option_para));
+ if (ret < 0)
+ {
+ printf("Set system 1 status to [%s] error \n", option_para);
+ }
+
+ return ret;
}
static int excute_command_set_system2_status(char * option_para)
{
- int ret = -1;
- if (NULL == option_para) {
- usage();
- printf("Command input invalid value! null option parameters! \n");
- return -1;
- }
-
- ret = zxic_dual_set_system_status(39019, atoi(option_para));
- if(ret < 0){
- printf("Set system 2 status to [%s] error \n", option_para);
- }
+ int ret = -1;
+ if (NULL == option_para)
+ {
+ usage();
+ printf("Command input invalid value! null option parameters! \n");
+ return -1;
+ }
- return ret;
+ ret = zxic_dual_set_system_status(39019, atoi(option_para));
+ if (ret < 0)
+ {
+ printf("Set system 2 status to [%s] error \n", option_para);
+ }
+
+ return ret;
}
static int excute_command_get_fota_status(char * option_para)
{
- int status = zxic_dual_get_fota_status_for_nv();
+ int status = zxic_dual_get_fota_status_for_nv();
- printf("Fota status:%d \n", status);
+ printf("Fota status:%d \n", status);
- return 0;
+ return 0;
}
static int excute_command_set_fota_status(char * option_para)
{
- int ret = 0;
+ int ret = 0;
- if (NULL == option_para) {
- usage();
- printf("Command input invalid value! null option parameters! \n");
- return -1;
- }
+ if (NULL == option_para)
+ {
+ usage();
+ printf("Command input invalid value! null option parameters! \n");
+ return -1;
+ }
- ret = zxic_dual_set_fota_status_for_nv(atoi(option_para));
- if(ret < 0){
- printf("Set fota_status to [%s] error \n", option_para);
- }
+ ret = zxic_dual_set_fota_status_for_nv(atoi(option_para));
+ if (ret < 0)
+ {
+ printf("Set fota_status to [%s] error \n", option_para);
+ }
- return ret;
+ return ret;
}
static int excute_command_help(char * option_para)
{
- usage();
- return 0;
+ usage();
+ return 0;
}
@@ -357,10 +381,10 @@
static int execute_command_version(char *option_para)
{
- int version = 0;
+ int version = 0;
- return version;
+ return version;
}
@@ -369,11 +393,11 @@
static int execute_command_sync(char *option_para)
{
- int ret = -1;
+ int ret = -1;
- ret = zxic_dual_sync_system();
+ ret = zxic_dual_sync_system();
- return ret;
+ return ret;
}
@@ -382,48 +406,71 @@
static int execute_command_get_upgrade_type(char *option_para)
{
- int upgrade_type = -1;
-
- upgrade_type = zxic_dual_get_upgrade_type();
- printf("upgrade type is %d\n", upgrade_type);
+ int upgrade_type = -1;
- return 0;
+ upgrade_type = zxic_dual_get_upgrade_type();
+ printf("upgrade type is %d\n", upgrade_type);
+
+ return 0;
}
static int execute_command_get_sync_status(char * option_para)
{
- int sync_status = -2;
-
- zxic_dual_get_sync_status(&sync_status);
- printf("Current sync status is %d\n", sync_status);
+ int sync_status = -2;
- return 0;
+ zxic_dual_get_sync_status(&sync_status);
+ printf("Current sync status is %d\n", sync_status);
+
+ return 0;
}
static int execute_command_set_sync_status(char * option_para)
{
- int ret = -1;
-
- if (NULL == option_para) {
- usage();
- printf("Command input invalid value! null option parameters! \n");
-
- return ret;
- }
-
- ret = zxic_dual_set_sync_status(atoi(option_para));
- if (0 != ret)
- {
- printf("set sync status fail\n");
-
- return ret;
- }
-
- ret = 0;
-
- return ret;
+ int ret = -1;
+
+ if (NULL == option_para)
+ {
+ usage();
+ printf("Command input invalid value! null option parameters! \n");
+
+ return ret;
+ }
+
+ ret = zxic_dual_set_sync_status(atoi(option_para));
+ if (0 != ret)
+ {
+ printf("set sync status fail\n");
+
+ return ret;
+ }
+
+ ret = 0;
+
+ return ret;
+}
+
+
+static int execute_command_config_package_path(char * option_para)
+{
+ if (NULL == option_para)
+ {
+ printf("Invalid command input: NULL option parameters \n");
+ usage();
+
+ return -1;
+ }
+
+ if (-1 == zxic_dual_config_package_path(option_para, strlen(option_para)))
+ {
+ printf("Configure upgrade package path fail \n");
+ return -1;
+ }
+
+ printf("Configure upgrade package path success \n");
+
+ return 0;
}
@@ -440,21 +487,23 @@
*/
static void write_lockfile(char *filepath, char *setbuf)
{
- int f, len = 0;
+ int f, len = 0;
- f = open(filepath, O_RDWR | O_SYNC);
- if (f == -1) {
- perror("open lock failed\n");
- return;
- }
+ f = open(filepath, O_RDWR | O_SYNC);
+ if (f == -1)
+ {
+ perror("open lock failed\n");
+ return;
+ }
- len = strlen(setbuf);
+ len = strlen(setbuf);
- if (write(f, setbuf, len) != len) {
- perror("write lock failed\n");
- }
+ if (write(f, setbuf, len) != len)
+ {
+ perror("write lock failed\n");
+ }
- close(f);
+ close(f);
}
/*******************************************************************************
@@ -463,54 +512,61 @@
int main(int argc, char *argv[])
{
- int i = 0;
- int option_index = 0;
- int cmd_num = 0;
+ int i = 0;
+ int option_index = 0;
+ int cmd_num = 0;
- int ret = -1;
- int ch = -1;
+ int ret = -1;
+ int ch = -1;
printf("build date: %s %s\n", __DATE__, __TIME__);
-
- write_lockfile(POWER_WAKE_LOCK_FILE, FOTA_UPGRADE_LOCK);
- while ((ch = getopt_long(argc, argv, g_short_string, g_long_options, &option_index)) != -1) {
- for (i = 0; i < sizeof(g_option_handle) / sizeof(option_handle_t); i++) {
- if (ch != g_option_handle[i].option_value)
- continue;
+ write_lockfile(POWER_WAKE_LOCK_FILE, FOTA_UPGRADE_LOCK);
+
+ while ((ch = getopt_long(argc, argv, g_short_string, g_long_options, &option_index)) != -1)
+ {
+ for (i = 0; i < sizeof(g_option_handle) / sizeof(option_handle_t); i++)
+ {
+ if (ch != g_option_handle[i].option_value)
+ {
+ continue;
+ }
- cmd_num++;
+ cmd_num++;
- if (NULL == g_option_handle[i].func) {
- printf("Command short string is:%c, but option handle func is NULL", ch);
- break;
- }
+ if (NULL == g_option_handle[i].func)
+ {
+ printf("Command short string is:%c, but option handle func is NULL", ch);
+ break;
+ }
- ret = g_option_handle[i].func(optarg);
+ ret = g_option_handle[i].func(optarg);
- if (ret < 0) {
- ret = -1;
- goto end;
- }
- }
- }
+ if (ret < 0)
+ {
+ ret = -1;
+ goto end;
+ }
+ }
+ }
- if (0 == cmd_num) {
- printf("Can not find valid command!");
- usage();
- ret = -1;
- goto end;
- }
+ if (0 == cmd_num)
+ {
+ printf("Can not find valid command!");
+ usage();
+ ret = -1;
+ goto end;
+ }
- ret = 0;
+ ret = 0;
end:
- write_lockfile(POWER_WAKE_UNLOCK_FILE, FOTA_UPGRADE_LOCK);
+ write_lockfile(POWER_WAKE_UNLOCK_FILE, FOTA_UPGRADE_LOCK);
- return ret ;
+ return ret ;
}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fscheck/mtd.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fscheck/mtd.c
index c0d2b1b..fdcc42b 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fscheck/mtd.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/fscheck/mtd.c
@@ -589,12 +589,13 @@
printf("fs_check vol_id not match,vol_name:%s\n", p_fs->ubi_vol_name);
return -1;
}
-
+#if 0
if (mknod_ubi_device() < 0)
{
printf("fs_check ubi dev not found\n");
return -1;
}
+#endif
if (strcmp(p_fs->ubi_vol_name, "rootfs_data") == 0)
{
// openwrt
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/libsoftap/netapi.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/libsoftap/netapi.c
index a28620f..216fdfc 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/libsoftap/netapi.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/libsoftap/netapi.c
@@ -738,6 +738,7 @@
// read old data
sc_cfg_get("lan_ipaddr", lanIp_read, sizeof(lanIp_read));
sc_cfg_get("lan_netmask", lanNetmask_read, sizeof(lanNetmask_read));
+ sc_cfg_get("lan_netmask_cap", lanNetmask_read, sizeof(lanNetmask_read));
sc_cfg_get("dhcpStart", dhcpStart_read, sizeof(dhcpStart_read));
sc_cfg_get("dhcpEnd", dhcpEnd_read, sizeof(dhcpEnd_read));
sc_cfg_get("dhcpLease_hour", dhcpLeaseHour_read, sizeof(dhcpLeaseHour_read));
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/nvserver/Makefile b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/nvserver/Makefile
index eaaf617..2caae31 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/nvserver/Makefile
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/nvserver/Makefile
@@ -6,7 +6,7 @@
CFLAGS += -I$(LIB_DIR)/libnvram
CFLAGS += -I$(APP_DIR)/include
LDLIBS += -L$(LIB_DIR)/libnvram
-LDLIBS += -lpthread -lmtd -lnvram -lsofttimer -lupi_ab -lsoftap
+LDLIBS += -lpthread -lmtd -lnvram -lsofttimer -lupi_ab -lsoftap -lcrypto
all: $(EXEC)
$(EXEC): $(OBJS)
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/rtc-service/rtc-service.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/rtc-service/rtc-service.c
index 8772ad9..61722b1 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/rtc-service/rtc-service.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/platform/rtc-service/rtc-service.c
@@ -921,7 +921,7 @@
buf = (RTC_DATA_BUF *)pmsg_buf->aucDataBuf;
if (buf->cpu == RTC_CPU_AP) {
slog(RTC_PRINT, SLOG_NORMAL, "from ap: cmd:0x%x, module:0x%x, msg_id:0x%x, sec:%ld: %d, %d, %d \n", cmd, buf->module, buf->srcModule, buf->ulSec, buf->cpu, buf->is_utc, buf->wakeup);
- if((buf->module==RTC_ID_SC_TIMER)||(buf->module==RTC_ID_SC_ALARM))
+ if (buf->srcModule >= MODULE_ID_SDK_DYNAMIC_BASE)
{
send_rtc_msg(buf->srcModule,SC_RTC_MSG_CMD_TIMEOUT,(void *)buf, sizeof(RTC_DATA_BUF));
}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/data/sc_data.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/data/sc_data.c
index a4255cb..e803c4b 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/data/sc_data.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/data/sc_data.c
@@ -137,7 +137,7 @@
SCLOGI("scdata_timeout id=%d\n",id);
pthread_mutex_lock(&g_sc_datacall_mutex);
list_for_each_entry_safe(temp, temp1, &g_sc_datacall_list, list) {
- if(temp->id == (unsigned short)id){
+ if(temp->id == (unsigned short)id && temp->reconnect_mode != SCDATA_RECONN_NONE){
temp->action = SCDATA_ACTION_DOACT;
SCLOGI("scdata_timeout post id=%d\n",id);
sem_post(&g_sc_datacall_sem);
@@ -582,7 +582,7 @@
int cid = -1;
sc_pdp_info_t *temp = NULL;
sc_pdp_info_t *temp1 = NULL;
- char dev_name[16] = {0};
+ char dev_name[64] = {0};
SCLOGI("sc_data_call_get_pkt_stats start id=%d\n", id);
if(g_sc_datacall_thread == 0){
@@ -596,18 +596,19 @@
pthread_mutex_lock(&g_sc_datacall_mutex);
list_for_each_entry_safe(temp, temp1, &g_sc_datacall_list, list) {
if(temp->id == id){
- if(temp->req.act_type == SCDATA_ACT_TYPE_LOCAL)
+ //if(temp->req.act_type == SCDATA_ACT_TYPE_LOCAL)
cid = temp->rsp.c_id;
- else
- cid = 0;
+ //else
+ //cid = 0;
break;
}
}
pthread_mutex_unlock(&g_sc_datacall_mutex);
SCLOGI("call_get_stats cid=%d\n", cid);
- if(cid < 0){
+ if(cid < 0 || cid > CID_MAX_NUM){
return SC_ERR_BADPARAM;
}
+#if 0
snprintf(dev_name, sizeof(dev_name), "zvnet%d", cid);
getIfStatistic(dev_name, TXBYTE, &p_sta->tx_bytes);
getIfStatistic(dev_name, TXPACKET, &p_sta->tx_packets);
@@ -617,7 +618,20 @@
getIfStatistic(dev_name, RXPACKET, &p_sta->rx_packets);
getIfStatistic(dev_name, RXERR, &p_sta->rx_errors);
getIfStatistic(dev_name, RXDROP, &p_sta->rx_dropped);
-
+#else
+ char param[8][24] = {0};
+ void *p[] = {param[0], param[1], param[2], param[3], param[4], param[5], param[6], param[7]};
+ snprintf(dev_name, sizeof(dev_name), "AT+FLUXSTAT=wan%d\r\n", cid);
+ get_modem_info(dev_name, "%s,%s,%s,%s,%s,%s,%s,%s", (void **)p);
+ p_sta->tx_bytes = atoll(param[0]);
+ p_sta->tx_packets = atoll(param[1]);
+ p_sta->tx_errors = atoll(param[2]);
+ p_sta->tx_dropped = atoll(param[3]);
+ p_sta->rx_bytes = atoll(param[4]);
+ p_sta->rx_packets = atoll(param[5]);
+ p_sta->rx_errors = atoll(param[6]);
+ p_sta->rx_dropped = atoll(param[7]);
+#endif
return SC_ERR_SUCCESS;
}
@@ -632,7 +646,7 @@
SCLOGE("sc_data not init");
return SC_ERR_FAIL;
}
- if((mode != SCDATA_RECONN_LOOP && mode != SCDATA_RECONN_MULT) || num > MAX_TIME_LIST){//|| time_list == NULL
+ if((mode != SCDATA_RECONN_LOOP && mode != SCDATA_RECONN_MULT && mode != SCDATA_RECONN_NONE) || num > MAX_TIME_LIST){//|| time_list == NULL
SCLOGE("set_reconnect mode=%d list=%p num=%d null", mode, time_list, num);
return SC_ERR_BADPARAM;
}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/include/sc_data.h b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/include/sc_data.h
index 22b19be..eaf9aa3 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/include/sc_data.h
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/include/sc_data.h
@@ -96,10 +96,9 @@
/**
* @brief ¶¨Òå×Ô¶¯ÖØÁ¬ÀàÐÍ
-* @param SCDATA_RECONN_NONE ³õʼֵ£¬²»½øÐÐÈκβÙ×÷
+* @param SCDATA_RECONN_NONE ³õʼֵ,²»½øÐÐÈκβÙ×÷,¿É¹Ø±Õ×Ô¶¯ÖØÁ¬
* @param SCDATA_RECONN_LOOP ³¬Ê±Ê±¼äÑ»·,´ïµ½×îºóÒ»¸öºóÏ´ÎÓõÚÒ»¸ö³¬Ê±Ê±¼ä
* @param SCDATA_RECONN_MULT ³¬Ê±Ê±¼ä´ïµ½×îºóÒ»¸öʱһֱÓÃ×îºóÒ»¸ö³¬Ê±Ê±¼ä
-* @param SCDATA_AUTH_PAP_CHAP PAP+CHAPÈÏÖ¤
*/
typedef enum {
SCDATA_RECONN_NONE = 0,
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/include/sc_rtc_timer.h b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/include/sc_rtc_timer.h
index 94aba9f..d37dc17 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/include/sc_rtc_timer.h
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/include/sc_rtc_timer.h
@@ -3,12 +3,12 @@
* @brief RTC¶¨Ê±Æ÷½Ó¿Ú
*
* Copyright (C) 2023 Sanechips Technology Co., Ltd.
- * @author
- * @ingroup
- *
+ * @author
+ * @ingroup
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * published by the Free Software Foundation.
*
*/
#ifndef _SC_RTC_TIMER_H
@@ -37,45 +37,48 @@
******************************************************************************/
typedef struct
{
- int srcModule;
- unsigned int module;
- unsigned long ulSec;
- unsigned long time_val;
- int wakeup;
- int is_utc;
- int cpu;
-}sc_rtc_data_info;
+ int srcModule;
+ unsigned int module;
+ unsigned long ulSec;
+ unsigned long time_val;
+ int wakeup;
+ int is_utc;
+ int cpu;
+} sc_rtc_data_info;
-typedef struct{
- unsigned long time;
- unsigned int src_id;
+typedef struct
+{
+ unsigned long time;
+ unsigned int src_id;
} sc_rtc_user_t;
/****************************************************************************
* Timer expire callback function Definition
***************************************************************************/
-typedef int (*sc_rtc_timer_exp_cb)(unsigned int src_id);
+typedef int (*sc_rtc_timer_exp_cb)(unsigned int src_id, int rtc_id);
/****************************************************************************
* Get rtc time callback function Definition
***************************************************************************/
-typedef int (*sc_rtc_time_get_cb)(unsigned int src_id,unsigned long ulsec);
+typedef int (*sc_rtc_time_get_cb)(unsigned int src_id, unsigned long ulsec);
-typedef struct{
- struct list_head list;
- unsigned long time;
- unsigned int src_id;
- sc_rtc_time_get_cb rtc_time_get_cb;
- sc_rtc_timer_exp_cb rtc_timerout_cb;
+typedef struct
+{
+ struct list_head list;
+ unsigned long time;
+ unsigned int src_id;
+ unsigned int rtc_id;
+ sc_rtc_time_get_cb rtc_time_get_cb;
+ sc_rtc_timer_exp_cb rtc_timerout_cb;
} sc_rtc_user_cb_t;
/*******************************************************************************
* Global variable declarations *
******************************************************************************/
-
+
/*******************************************************************************
* Global function declarations *
******************************************************************************/
@@ -83,8 +86,8 @@
* @brief ³õʼ»¯¿Í»§¶ËRTC½Ó¿Ú·þÎñ¡£
* @param (in) ÎÞ¡£
* @param (out) ÎÞ¡£
- * @return 0 - ³É¹¦
- * ÆäËüʧ°Ü:
+ * @return ³É¹¦-·µ»Ø·ÖÅäµÄsrcid
+ * ʧ°Ü-·µ»Ø-1
* @note ×¢ÊÍ
* ×¢ÊÍ¡£
*/
@@ -95,7 +98,7 @@
* @param (in) ÎÞ¡£
* @param (out) ÎÞ¡£
* @return 0 - ³É¹¦
- * ÆäËüʧ°Ü:
+ * ÆäËû-ʧ°Ü
* @note ×¢ÊÍ
* ×¢ÊÍ¡£
*/
@@ -103,24 +106,24 @@
/**
* @brief ÉèÖÃrtc¶¨Ê±Æ÷¡£
- * @param (in) ulSec ¶¨Ê±Ê±¼ä£¨Ã룩¡£
- * srcid Óû§ID¡£
- * sc_rtc_idÔÝÎÞÓÃ
+ * @param (in) srcid Óû§IDΪµ÷ÓÃsc_rtc_timer_init¿Í»§¶Ë³õʼ»¯º¯Êý·ÖÅäµÄsrcid¼´¸Ãº¯Êý·µ»ØÖµ¡£
+ * rtc_id ¶¨Ê±Æ÷ID¡£
+ * ulSec ¶¨Ê±Ê±¼ä£¨Ã룩¡£
* rtc_notifyÓû§×¢²áµÄ»Øµ÷º¯Êý
* @param (out) ÎÞ¡£
* @return 0 - ³É¹¦
- * ÆäËüʧ°Ü:
+ * ÆäËû-ʧ°Ü
* @note ×¢ÊÍ
* ×¢ÊÍ¡£
*/
-int sc_rtc_timer_add(unsigned long ulSec, int srcid, sc_rtc_timer_exp_cb rtc_notify);
+int sc_rtc_timer_add(int srcid, int rtc_id, unsigned long ulSec, sc_rtc_timer_exp_cb rtc_notify);
/**
* @brief »ñÈ¡rtcʱ¼ä¡£
- * @param (in) srcid Óû§ID¡£
+ * @param (in) srcid Óû§IDΪµ÷ÓÃsc_rtc_timer_init¿Í»§¶Ë³õʼ»¯º¯Êý·ÖÅäµÄsrcid¼´¸Ãº¯Êý·µ»ØÖµ¡£
* @param (out) rtc_notifyÓû§×¢²áµÄ»Øµ÷º¯Êý¡£
* @return 0 - ³É¹¦
- * ÆäËüʧ°Ü:
+ * ÆäËû-ʧ°Ü
* @note ×¢ÊÍ
* ×¢ÊÍ¡£
*/
@@ -128,11 +131,10 @@
/**
* @brief ÉèÖÃrtcʱ¼ä¡£
- * @param (in) srcid Óû§ID¡£
- * ulsec ÔÝʱÎÞÓÃ.
- * @param (out) rtc_notifyÓû§×¢²áµÄ»Øµ÷º¯Êý¡£
+ * @param (in) srcid Óû§IDΪµ÷ÓÃsc_rtc_timer_init¿Í»§¶Ë³õʼ»¯º¯Êý·ÖÅäµÄsrcid¼´¸Ãº¯Êý·µ»ØÖµ¡£
+ * @param (out) ÎÞ¡£
* @return 0 - ³É¹¦
- * ÆäËüʧ°Ü:
+ * ÆäËû-ʧ°Ü
* @note ×¢ÊÍ
* ×¢ÊÍ¡£
*/
@@ -140,18 +142,30 @@
/**
* @brief ÉèÖÃrtc¶¨Ê±Æ÷(utc,¶¨Ê±µ½/Äê/ÔÂ/ÈÕ/ʱ/·Ö/Ãë)¡£
- * @param (in) utc_sec ¶¨Ê±Ê±¼ä£¨/Äê/ÔÂ/ÈÕ/ʱ/·Ö/Ã룩¡£
- * srcid Óû§ID¡£
- * sc_rtc_idÔÝÎÞÓÃ
+ * @param (in) srcid Óû§IDΪµ÷ÓÃsc_rtc_timer_init¿Í»§¶Ë³õʼ»¯º¯Êý·ÖÅäµÄsrcid¼´¸Ãº¯Êý·µ»ØÖµ¡£
+ * rtc_idÄÖÖÓID¼´¶¨Ê±Æ÷ID
+ * utc_sec¶¨Ê±Ê±¼ä£¨/Äê/ÔÂ/ÈÕ/ʱ/·Ö/Ã룩¡£
* wakeupÔÝÎÞÓÃ
* rtc_notifyÓû§×¢²áµÄ»Øµ÷º¯Êý
* @param (out) ÎÞ¡£
* @return 0 - ³É¹¦
- * ÆäËüʧ°Ü:
+ * ÆäËû-ʧ°Ü
* @note ×¢ÊÍ
* ×¢ÊÍ¡£
*/
-int sc_rtc_timer_add_utc(struct tm *utc_sec, int srcid, int wakeup,sc_rtc_timer_exp_cb rtc_notify);
+int sc_rtc_timer_add_utc(int srcid, int rtc_id, struct tm *utc_sec, int wakeup, sc_rtc_timer_exp_cb rtc_notify);
+
+/**
+ * @brief ɾ³ýÖ¸¶¨rtc¶¨Ê±Æ÷¡£
+ * @param (in) srcid Óû§IDΪµ÷ÓÃsc_rtc_timer_init¿Í»§¶Ë³õʼ»¯º¯Êý·ÖÅäµÄsrcid¼´¸Ãº¯Êý·µ»ØÖµ¡£
+ * rtc_id¶¨Ê±Æ÷ID
+ * @param (out) ÎÞ¡£
+ * @return 0 - ³É¹¦
+ * ÆäËû-ʧ°Ü
+ * @note ×¢ÊÍ
+ * ×¢ÊÍ¡£
+ */
+int sc_rtc_timer_del(int srcid, int rtc_id);
#ifdef __cplusplus
}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/rtc_timer/sc_rtc_timer.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/rtc_timer/sc_rtc_timer.c
index cfa1eff..7442b95 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/rtc_timer/sc_rtc_timer.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/libsctel/rtc_timer/sc_rtc_timer.c
@@ -22,134 +22,262 @@
static int sc_rtc_timer_have_init = 0;
sc_rtc_user_cb_t sc_rtc_cb;
+struct list_head sc_rtc_cb_list;
+pthread_mutex_t g_rtc_timer_mutex = PTHREAD_MUTEX_INITIALIZER;
+
+static sc_rtc_user_cb_t* sc_rtc_timer_find_by_id(int rtc_id)
+{
+ sc_rtc_user_cb_t *entry;
+ if (!list_empty(&sc_rtc_cb_list))
+ {
+ list_for_each_entry(entry, &sc_rtc_cb_list, list)
+ {
+ if (entry->rtc_id == rtc_id)
+ {
+ return entry;
+ }
+ }
+ }
+
+ return NULL;
+}
+
+static void sc_rtc_timer_free_by_id(int rtc_id)
+{
+ sc_rtc_user_cb_t *pTmp, *pTmp1;
+ if (!list_empty(&sc_rtc_cb_list))
+ {
+ list_for_each_entry_safe(pTmp, pTmp1, &sc_rtc_cb_list, list)
+ {
+ if (pTmp && pTmp->rtc_id == rtc_id)
+ {
+ list_del(&(pTmp->list));
+ free(pTmp);
+ }
+ }
+ }
+}
static int sc_rtc_timeout_cb(const sc_ipc_event* const pevt, const sc_ipc_msg* const pmsg)
{
- int ret = 0;
- sc_rtc_data_info *rtc_info = NULL;
- rtc_info = (sc_rtc_data_info*)pmsg->data;
+ int ret = 0;
+ sc_rtc_data_info *rtc_info = NULL;
+ rtc_info = (sc_rtc_data_info*)pmsg->data;
- ret = sc_rtc_cb.rtc_timerout_cb(rtc_info->srcModule);
- return SC_ERR_SUCCESS;
-}
+ sc_rtc_user_cb_t *timer_cb = NULL;
-static int sc_rtc_get_time_cb(const sc_ipc_event* const pevt, const sc_ipc_msg* const pmsg)
-{
- int ret = 0;
- sc_rtc_data_info *rtc_info = NULL;
- rtc_info = (sc_rtc_data_info*)pmsg->data;
+ pthread_mutex_lock(&g_rtc_timer_mutex);
- ret = sc_rtc_cb.rtc_time_get_cb(rtc_info->srcModule,rtc_info->ulSec);
+ timer_cb = sc_rtc_timer_find_by_id(rtc_info->module);
+
+ if (NULL != timer_cb)
+ {
+ if (timer_cb->rtc_timerout_cb)
+ {
+ timer_cb->rtc_timerout_cb(rtc_info->srcModule, rtc_info->module);
+ }
+
+ sc_rtc_timer_free_by_id(rtc_info->module);
+ }
+ else
+ {
+ SCLOGD("Don't find callback function! \n");
+ }
+ pthread_mutex_unlock(&g_rtc_timer_mutex);
return SC_ERR_SUCCESS;
}
-static sc_ipc_event rtc_timer_auto_notify_evt[] = {
- {0, 1, 0, SC_RTC_MSG_CMD_GET_TIME_RSP, sc_rtc_get_time_cb, NULL, NULL},
- {0, 1, 0, SC_RTC_MSG_CMD_TIMEOUT, sc_rtc_timeout_cb, NULL, NULL},
+static int sc_rtc_get_time_cb(const sc_ipc_event* const pevt, const sc_ipc_msg* const pmsg)
+{
+ int ret = 0;
+ sc_rtc_data_info *rtc_info = NULL;
+ rtc_info = (sc_rtc_data_info*)pmsg->data;
+
+ ret = sc_rtc_cb.rtc_time_get_cb(rtc_info->srcModule, rtc_info->ulSec);
+ return SC_ERR_SUCCESS;
+}
+
+static sc_ipc_event rtc_timer_auto_notify_evt[] =
+{
+ {0, 1, 0, SC_RTC_MSG_CMD_GET_TIME_RSP, sc_rtc_get_time_cb, NULL, NULL},
+ {0, 1, 0, SC_RTC_MSG_CMD_TIMEOUT, sc_rtc_timeout_cb, NULL, NULL},
};
static int sc_rtc_timer_connect(void)
{
- int rtc_client_id = -1;
- int ret = -1;
- rtc_client_id = sc_ipc_get_self_fd();
+ int rtc_client_id = -1;
+ int ret = -1;
+ rtc_client_id = sc_ipc_get_self_fd();
- if(rtc_client_id!=-1)
- {
- sc_rtc_cb.src_id = rtc_client_id;
- ret = 0;
- }
- else
- {
- return -1;
- }
-
- return ret;
+ if (rtc_client_id != -1)
+ {
+ sc_rtc_cb.src_id = rtc_client_id;
+ ret = 0;
+ }
+ else
+ {
+ return -1;
+ }
+
+ return ret;
}
int sc_rtc_timer_init(void)
{
- if(sc_rtc_timer_have_init)
- {
- return SC_ERR_SUCCESS;
- }
- sc_ipc_start_loop(NULL);
-
- /* 注册主动上报消息处理*/
- sc_ipc_register_events(rtc_timer_auto_notify_evt, sizeof(rtc_timer_auto_notify_evt) / sizeof(sc_ipc_event));
-
- if(0 == sc_rtc_timer_connect( ))
- {
- SCLOGD("sc_rtc_timer_init connect success.\n");
- SCLOGD("sc_rtc_timer_init finish\n");
-
- return sc_rtc_cb.src_id;
- }
-
- return -1;
+ if (sc_rtc_timer_have_init)
+ {
+ return SC_ERR_SUCCESS;
+ }
+ sc_ipc_start_loop(NULL);
+
+ /* 注册主动上报消息处理*/
+ sc_ipc_register_events(rtc_timer_auto_notify_evt, sizeof(rtc_timer_auto_notify_evt) / sizeof(sc_ipc_event));
+
+ /*初始化回调链表*/
+ INIT_LIST_HEAD(&sc_rtc_cb_list);
+
+ if (0 == sc_rtc_timer_connect( ))
+ {
+ SCLOGD("sc_rtc_timer_init connect success.\n");
+ SCLOGD("sc_rtc_timer_init finish\n");
+
+ return sc_rtc_cb.src_id;
+ }
+
+ return -1;
}
int sc_rtc_timer_uninit(void)
{
- int i;
-
- sc_ipc_event *pevt;
-
- sc_rtc_timer_have_init = 0;
-
- for(i = 0; i < sizeof(rtc_timer_auto_notify_evt) / sizeof(sc_ipc_event); i ++)
- {
- pevt = &rtc_timer_auto_notify_evt[i];
- sc_ipc_event_del(pevt);
- }
-
- SCLOGD("sc_rtc_timer_uninit finish\n");
- return SC_ERR_SUCCESS;
+ int i;
+
+ sc_ipc_event *pevt;
+
+ sc_rtc_timer_have_init = 0;
+
+ for (i = 0; i < sizeof(rtc_timer_auto_notify_evt) / sizeof(sc_ipc_event); i ++)
+ {
+ pevt = &rtc_timer_auto_notify_evt[i];
+ sc_ipc_event_del(pevt);
+ }
+
+ SCLOGD("sc_rtc_timer_uninit finish\n");
+ return SC_ERR_SUCCESS;
}
int sc_rtc_time_set(int srcid)
-{
- int ret = -1;
+{
+ int ret = -1;
- ret = rtc_set_time(srcid);
-
- return ret;
+ ret = rtc_set_time(srcid);
+
+ return ret;
}
-int sc_rtc_timer_add(unsigned long ulSec, int srcid, sc_rtc_timer_exp_cb rtc_notify)
+int sc_rtc_timer_add(int srcid, int rtc_id, unsigned long ulSec, sc_rtc_timer_exp_cb rtc_notify)
{
- int ret = -1;
+ int ret = -1;
- if(ulSec<=0)
- {
- return ret;
- }
+ if (ulSec <= 0)
+ {
+ return ret;
+ }
- sc_rtc_cb.rtc_timerout_cb = rtc_notify;
- ret = rtc_timer_add(ulSec,RTC_ID_SC_TIMER,srcid);
+ sc_rtc_user_cb_t *rtc_cb = NULL;
+ sc_rtc_user_cb_t *rtc_cb_exist = NULL;
+ sc_rtc_user_cb_t *pTmp, *pTmp1;
- return ret;
+ pthread_mutex_lock(&g_rtc_timer_mutex);
+
+ rtc_cb_exist = sc_rtc_timer_find_by_id(rtc_id);
+
+ if (!rtc_cb_exist) //不存在
+ {
+ rtc_cb = malloc(sizeof(sc_rtc_user_cb_t));
+ if (rtc_cb == NULL)
+ {
+ pthread_mutex_unlock(&g_rtc_timer_mutex);
+ return -1;
+ }
+ rtc_cb->src_id = srcid;
+ rtc_cb->rtc_id = rtc_id;
+ rtc_cb->time = ulSec;
+ rtc_cb->rtc_timerout_cb = rtc_notify;
+ list_add_tail(&rtc_cb->list, &sc_rtc_cb_list);
+ }
+ else
+ {
+ SCLOGD("rtc timer already exists,adding timer failed!\n");
+ pthread_mutex_unlock(&g_rtc_timer_mutex);
+ return -1;
+ }
+ pthread_mutex_unlock(&g_rtc_timer_mutex);
+
+ ret = rtc_timer_add(ulSec, rtc_id, srcid);
+
+ return ret;
}
-int sc_rtc_timer_add_utc(struct tm *utc_sec, int srcid, int wakeup,sc_rtc_timer_exp_cb rtc_notify)
+int sc_rtc_timer_add_utc(int srcid, int rtc_id, struct tm *utc_sec, int wakeup, sc_rtc_timer_exp_cb rtc_notify)
{
- time_t ulsec = 0;
- int ret = -1;
-
- ulsec = mktime(utc_sec);
- sc_rtc_cb.rtc_timerout_cb = rtc_notify;
- ret = rtc_timer_add_utc(utc_sec,RTC_ID_SC_ALARM,srcid,wakeup);
+ int ret = -1;
- return ret;
+ sc_rtc_user_cb_t *rtc_cb = NULL;
+ sc_rtc_user_cb_t *rtc_cb_exist = NULL;
+ sc_rtc_user_cb_t *pTmp, *pTmp1;
+
+ pthread_mutex_lock(&g_rtc_timer_mutex);
+
+ rtc_cb_exist = sc_rtc_timer_find_by_id(rtc_id);
+
+ if (!rtc_cb_exist) //²»´æÔÚ
+ {
+ rtc_cb = malloc(sizeof(sc_rtc_user_cb_t));
+ if (rtc_cb == NULL)
+ {
+ pthread_mutex_unlock(&g_rtc_timer_mutex);
+ return -1;
+ }
+ rtc_cb->src_id = srcid;
+ rtc_cb->rtc_id = rtc_id;
+ rtc_cb->rtc_timerout_cb = rtc_notify;
+ list_add_tail(&rtc_cb->list, &sc_rtc_cb_list);
+ }
+ else
+ {
+ SCLOGD("rtc timer already exists,adding timer failed!\n");
+ pthread_mutex_unlock(&g_rtc_timer_mutex);
+ return -1;
+ }
+ pthread_mutex_unlock(&g_rtc_timer_mutex);
+
+ ret = rtc_timer_add_utc(utc_sec, rtc_id, srcid, wakeup);
+
+ return ret;
}
int sc_rtc_time_get(int srcid, sc_rtc_time_get_cb rtc_notify)
{
- int ret =-1;
+ int ret = -1;
- sc_rtc_cb.rtc_time_get_cb = rtc_notify;
- ret = rtc_get_time(srcid);
-
- return ret;
+ sc_rtc_cb.rtc_time_get_cb = rtc_notify;
+ ret = rtc_get_time(srcid);
+
+ return ret;
+}
+
+int sc_rtc_timer_del(int srcid, int rtc_id)
+{
+ int ret = -1;
+
+ ret = rtc_timer_del(rtc_id, srcid);
+
+ pthread_mutex_lock(&g_rtc_timer_mutex);
+
+ sc_rtc_timer_free_by_id(rtc_id);
+
+ pthread_mutex_unlock(&g_rtc_timer_mutex);
+
+ return ret;
}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/ril/nanopb-c/tests/special_characters/funny-proto+name has.characters.proto
old mode 100644
new mode 100755
similarity index 100%
rename from cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/dma/zte/Kconfig
rename to cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/sdk/ril/nanopb-c/tests/special_characters/funny-proto+name has.characters.proto
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/crc_api/crc_api.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/crc_api/crc_api.c
index a15d226..0a6badf 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/crc_api/crc_api.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/crc_api/crc_api.c
@@ -82,7 +82,7 @@
exit(1);
}
}
-
+#if 0
int32_t com_Convbaud(uint32_t iBaudrate)
{
switch(iBaudrate)
@@ -110,12 +110,12 @@
}
}
-
+#endif
static int zUP_SetPort(int32_t iFd , int iBaud, int iDelay)
{
int ret = 0;
- attr_set.baudrate = com_Convbaud(iBaud);
-
+ attr_set.baudrate = iBaud;//com_Convbaud(iBaud);
+ printf("zUP_SetPort, iBaud:%d\n", iBaud );
ret = sc_uart_set_termios(iFd, &attr_set);
if(ret != 0)
{
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/ethtest/ethtest.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/ethtest/ethtest.c
old mode 100644
new mode 100755
index 34fbe0c..2185078
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/ethtest/ethtest.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/ethtest/ethtest.c
@@ -165,7 +165,8 @@
default:
printf("\nInvalid Case");
- break;
+ return 0;
}
+ return 0;
}
}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/rtc_timer_demo/sc_rtc_timer_main.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/rtc_timer_demo/sc_rtc_timer_main.c
index 62ffac2..b1332a7 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/rtc_timer_demo/sc_rtc_timer_main.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/rtc_timer_demo/sc_rtc_timer_main.c
@@ -21,259 +21,294 @@
#define CMD_SET "set\n"
#define CMD_GET "get\n"
#define CMD_HELP "?\n"
+#define CMD_DEL "del\n"
#define CMD_Q "q\n"
-static int year=0;
-static int mouth=0;
-static int date=0;
-static int hour=0;
-static int minute=0;
-static int seconds=0;
-static int wakeup=0;
-static int demo=0;
-static int timer_sec=0;
+static int year = 0;
+static int mouth = 0;
+static int date = 0;
+static int hour = 0;
+static int minute = 0;
+static int seconds = 0;
+static int wakeup = 0;
+static int demo = 0;
+static int timer_sec = 0;
static void printUsage(const char *Opt)
{
- printf("Usage: %s\n", Opt);
- printf("-Y<Year> set year,please input number\n");
- printf("-M<Mouth> set mouth,please input number\n");
- printf("-D<Date> set date,please input number\n");
- printf("-h<hour> set hour,please input number\n");
- printf("-m<minute> set minute,please input number\n");
- printf("-s<sec> set seconds,please input number\n");
- printf("-w<wakeup> set timer wakeup\n");
- printf("-d<callback demo> set callback demo,please input number\n");
- printf("add add rtc timer\n");
- printf("add_utc add rtc utc timer\n");
- printf("set set rtc time\n");
- printf("get get rtc time\n");
- printf("q exit rtc-timer-demo\n");
+ printf("Usage: %s\n", Opt);
+ printf("-Y<Year> set year,please input number\n");
+ printf("-M<Mouth> set mouth,please input number\n");
+ printf("-D<Date> set date,please input number\n");
+ printf("-h<hour> set hour,please input number\n");
+ printf("-m<minute> set minute,please input number\n");
+ printf("-s<sec> set seconds,please input number\n");
+ printf("-w<wakeup> set timer wakeup\n");
+ printf("-d<callback demo> set callback demo,please input number\n");
+ printf("add add rtc timer\n");
+ printf("add_utc add rtc utc timer\n");
+ printf("set set rtc time\n");
+ printf("get get rtc time\n");
+ printf("q exit rtc-timer-demo\n");
}
-static int parseOpts(int argc, char *argv[])
+static int parseOpts(int argc, char *argv[])
{
- int rc = 0;
+ int rc = 0;
int c;
- while ((c = getopt(argc, argv, "?Y:M:D:h:m:s:w:d:t:")) != -1) {
- switch (c) {
- case 'Y':
- year = atoi(optarg);
- break;
- case 'M':
- mouth = atoi(optarg);
- break;
- case 'D':
- date = atoi(optarg);
- break;
- case 'h':
- hour = atoi(optarg);
- break;
- case 'm':
- minute = atoi(optarg);
- break;
- case 's':
- seconds = atoi(optarg);
- break;
- case 'w':
- wakeup = atoi(optarg);
- break;
- case 'd':
- demo = atoi(optarg);
- break;
- case 't':
- timer_sec = atoi(optarg);
- break;
- case '?':
- default:
- printUsage(argv[0]);
- return -1;
+ while ((c = getopt(argc, argv, "?Y:M:D:h:m:s:w:d:t:")) != -1)
+ {
+ switch (c)
+ {
+ case 'Y':
+ year = atoi(optarg);
+ break;
+ case 'M':
+ mouth = atoi(optarg);
+ break;
+ case 'D':
+ date = atoi(optarg);
+ break;
+ case 'h':
+ hour = atoi(optarg);
+ break;
+ case 'm':
+ minute = atoi(optarg);
+ break;
+ case 's':
+ seconds = atoi(optarg);
+ break;
+ case 'w':
+ wakeup = atoi(optarg);
+ break;
+ case 'd':
+ demo = atoi(optarg);
+ break;
+ case 't':
+ timer_sec = atoi(optarg);
+ break;
+ case '?':
+ default:
+ printUsage(argv[0]);
+ return -1;
}
}
return rc;
}
-int rtc_get_time_cb_demo0(unsigned int srcid,unsigned long ulsec)
+int rtc_get_time_cb_demo0(unsigned int srcid, unsigned long ulsec)
{
- struct tm rtc_time = {0};
- time_t tmp = 0;
+ struct tm rtc_time = {0};
+ time_t tmp = 0;
- tmp = (time_t)ulsec;
-
- rtc_time = *localtime(&tmp);
-
- printf("user id(srcid):0x%x,callback(rtc_get_time_cb_demo0) is success,%ld-%d-%d,%d:%d:%d!\n",srcid,rtc_time.tm_year+1900,rtc_time.tm_mon+1,rtc_time.tm_mday,rtc_time.tm_hour,rtc_time.tm_min,rtc_time.tm_sec);
+ tmp = (time_t)ulsec;
+
+ rtc_time = *localtime(&tmp);
+
+ printf("user id(srcid):0x%x,callback(rtc_get_time_cb_demo0) is success,%ld-%d-%d,%d:%d:%d!\n", srcid,
+ rtc_time.tm_year + 1900, rtc_time.tm_mon + 1, rtc_time.tm_mday, rtc_time.tm_hour, rtc_time.tm_min, rtc_time.tm_sec);
}
-int rtc_get_time_cb_demo1(unsigned int srcid,unsigned long ulsec)
+int rtc_get_time_cb_demo1(unsigned int srcid, unsigned long ulsec)
{
- struct tm rtc_time = {0};
- time_t tmp = 0;
+ struct tm rtc_time = {0};
+ time_t tmp = 0;
- tmp = (time_t)ulsec;
-
- rtc_time = *localtime(&tmp);
-
- printf("user id:0x%x,callback(rtc_get_time_cb_demo1) is success,%ld-%d-%d,%d:%d:%d!\n",srcid,rtc_time.tm_year+1900,rtc_time.tm_mon+1,rtc_time.tm_mday,rtc_time.tm_hour,rtc_time.tm_min,rtc_time.tm_sec);
+ tmp = (time_t)ulsec;
+
+ rtc_time = *localtime(&tmp);
+
+ printf("user id:0x%x,callback(rtc_get_time_cb_demo1) is success,%ld-%d-%d,%d:%d:%d!\n", srcid, rtc_time.tm_year + 1900,
+ rtc_time.tm_mon + 1, rtc_time.tm_mday, rtc_time.tm_hour, rtc_time.tm_min, rtc_time.tm_sec);
}
-int sc_rtc_timer_id_exp_cb_demo0(unsigned int src_id)
+int sc_rtc_timer_id_exp_cb_demo0(unsigned int src_id, int rtc_id)
{
- int ret =0;
+ int ret = 0;
- printf("user id:0x%x,callback(sc_rtc_timer_exp_cb_demo0) is success!\n",src_id);
+ printf("user id:0x%x,rtc id:%d,callback(sc_rtc_timer_exp_cb_demo0) is success!\n", src_id, rtc_id);
- return ret;
+ return ret;
}
-int sc_rtc_timer_id_exp_cb_demo1(unsigned int src_id)
+int sc_rtc_timer_id_exp_cb_demo1(unsigned int src_id, int rtc_id)
{
- int ret =0;
+ int ret = 0;
- printf("user id:0x%x,callback(sc_rtc_timer_exp_cb_demo1) is success!\n",src_id);
+ printf("user id:0x%x,rtc id:%d,callback(sc_rtc_timer_exp_cb_demo1) is success!\n", src_id, rtc_id);
- return ret;
+ return ret;
}
static int rtc_timer_init(void)
{
- int ret = 0;
-
- ret = sc_rtc_timer_init( );
- if(ret <= 0 ) {
- return -1;
- }
-
- return ret;
+ int ret = 0;
+
+ ret = sc_rtc_timer_init( );
+ if (ret <= 0 )
+ {
+ return -1;
+ }
+
+ return ret;
}
static int rtc_timer_deinit(void)
{
- return sc_rtc_timer_uninit();
+ return sc_rtc_timer_uninit();
}
-static int sc_rtc_timer_add_utc_demo(struct tm *utc_sec, int src_id, int wakeup,sc_rtc_timer_exp_cb rtc_cb)
+static int sc_rtc_timer_add_utc_demo(struct tm *utc_sec, int src_id, int rtc_id, int wakeup, sc_rtc_timer_exp_cb rtc_cb)
{
- int iRet = -1;
-
- printf("sc_rtc_timer_add_utc_demo test \n");
-
- iRet = sc_rtc_timer_add_utc(utc_sec, src_id, wakeup, rtc_cb);
-
- printf("iRet=%d\n", iRet);
-
- return 0;
+ int iRet = -1;
+
+ printf("sc_rtc_timer_add_utc_demo test \n");
+
+ iRet = sc_rtc_timer_add_utc(src_id, rtc_id, utc_sec, wakeup, rtc_cb);
+
+ printf("iRet=%d\n", iRet);
+
+ return 0;
}
-static int sc_rtc_timer_add_demo(int srcid,unsigned long ulsec,sc_rtc_timer_exp_cb rtc_cb)
+static int sc_rtc_timer_add_demo(int srcid, int rtc_id, unsigned long ulsec, sc_rtc_timer_exp_cb rtc_cb)
{
- int iRet = -1;
+ int iRet = -1;
- printf("sc_rtc_timer_add_demo test \n");
-
- iRet = sc_rtc_timer_add(ulsec, srcid, rtc_cb);
-
- printf("iRet=%d\n", iRet);
+ printf("sc_rtc_timer_add_demo test \n");
- return 0;
+ iRet = sc_rtc_timer_add(srcid, rtc_id, ulsec, rtc_cb);
+
+ printf("iRet=%d\n", iRet);
+
+ return 0;
+}
+
+static int sc_rtc_timer_del_demo(int srcid, int rtc_id)
+{
+ int iRet = -1;
+
+ printf("sc_rtc_timer_del_demo test \n");
+
+ iRet = sc_rtc_timer_del(srcid, rtc_id);
+
+ printf("iRet=%d\n", iRet);
+
+ return 0;
}
static int sc_rtc_set_time_demo(int src_id)
{
- int iRet = -1;
+ int iRet = -1;
- printf("sc_rtc_set_time_demo test \n");
-
- iRet = sc_rtc_time_set(src_id);
-
- printf("iRet=%d\n", iRet);
+ printf("sc_rtc_set_time_demo test \n");
- return 0;
+ iRet = sc_rtc_time_set(src_id);
+
+ printf("iRet=%d\n", iRet);
+
+ return 0;
}
-static int sc_rtc_get_time_demo(int src_id,sc_rtc_time_get_cb rtc_cb)
+static int sc_rtc_get_time_demo(int src_id, sc_rtc_time_get_cb rtc_cb)
{
- int iRet = -1;
+ int iRet = -1;
- printf("sc_rtc_get_time_demo test \n");
-
- iRet = sc_rtc_time_get(src_id,rtc_cb);
-
- printf("iRet=%d\n", iRet);
+ printf("sc_rtc_get_time_demo test \n");
- return 0;
+ iRet = sc_rtc_time_get(src_id, rtc_cb);
+
+ printf("iRet=%d\n", iRet);
+
+ return 0;
}
int main(int argc, char *argv[])
{
- char atstr[15] = {0};
- int len = 0;
- int srcid = 0 ;
- printf("sc_rtc_timer_demo:Demo go.\n");
+ char atstr[15] = {0};
+ int len = 0;
+ int srcid = 0 ;
+ printf("sc_rtc_timer_demo:Demo go.\n");
- if(parseOpts(argc,argv) == -1)
- {
- printf("sc_rtc_timer_demo:Arg error.\n");
- return -1;
- }
+ if (parseOpts(argc, argv) == -1)
+ {
+ printf("sc_rtc_timer_demo:Arg error.\n");
+ return -1;
+ }
- if((srcid = rtc_timer_init( )) <= 0)
- {
- printf("rtc_timer_demo:rtc_timer_init fail!\n");
- return 0;
- }
- printf("srcid:0x%x\n",srcid);
- while(1)
- {
- memset(atstr,0,sizeof(atstr));
- printf("Please input an at command:\n");
- if(NULL != fgets(atstr,15 - 1,stdin))
- {
- if(0 == strcmp(CMD_ADD,atstr))
- {
- if(demo==1)
- {sc_rtc_timer_add_demo(srcid,timer_sec,sc_rtc_timer_id_exp_cb_demo1);}
- else
- {sc_rtc_timer_add_demo(srcid,timer_sec,sc_rtc_timer_id_exp_cb_demo0);}
- }
- else if(0 == strcmp(CMD_GET,atstr))
- {
- if(demo==1)
- {sc_rtc_get_time_demo(srcid,rtc_get_time_cb_demo1);}
- else
- {sc_rtc_get_time_demo(srcid,rtc_get_time_cb_demo0);}
- }
- else if(0 == strcmp(CMD_SET,atstr))
- {
- sc_rtc_set_time_demo(srcid);
- }
- else if(0 == strcmp(CMD_ADD_UTC,atstr))
- {
- struct tm sec = {0};
- sec.tm_year = year-1900;
- sec.tm_mon = mouth-1;
- sec.tm_mday = date;
- sec.tm_hour = hour;
- sec.tm_min = minute;
- sec.tm_sec = seconds;
- if(demo==1)
- {sc_rtc_timer_add_utc_demo(&sec,srcid,wakeup,sc_rtc_timer_id_exp_cb_demo1);}
- else
- {sc_rtc_timer_add_utc_demo(&sec,srcid,wakeup,sc_rtc_timer_id_exp_cb_demo0);}
- }
- else if(0 == strcmp(CMD_HELP,atstr))
- {
- printUsage(atstr);
- }
- else if(0 == strcmp(CMD_Q,atstr))
- {
- break;
- }
- }
- }
-
- rtc_timer_deinit( );
- printf("sc_rtc_timer_demo:Demo over.\n");
- return 0;
+ if ((srcid = rtc_timer_init( )) <= 0)
+ {
+ printf("rtc_timer_demo:rtc_timer_init fail!\n");
+ return 0;
+ }
+ printf("srcid:0x%x\n", srcid);
+ while (1)
+ {
+ memset(atstr, 0, sizeof(atstr));
+ printf("Please input an at command:\n");
+ if (NULL != fgets(atstr, 15 - 1, stdin))
+ {
+ if (0 == strcmp(CMD_ADD, atstr))
+ {
+ if (demo == 1)
+ {
+ sc_rtc_timer_add_demo(srcid, 1, timer_sec, sc_rtc_timer_id_exp_cb_demo1);
+ }
+ else
+ {
+ sc_rtc_timer_add_demo(srcid, 0, timer_sec, sc_rtc_timer_id_exp_cb_demo0);
+ }
+ }
+ else if (0 == strcmp(CMD_GET, atstr))
+ {
+ if (demo == 1)
+ {
+ sc_rtc_get_time_demo(srcid, rtc_get_time_cb_demo1);
+ }
+ else
+ {
+ sc_rtc_get_time_demo(srcid, rtc_get_time_cb_demo0);
+ }
+ }
+ else if (0 == strcmp(CMD_SET, atstr))
+ {
+ sc_rtc_set_time_demo(srcid);
+ }
+ else if (0 == strcmp(CMD_ADD_UTC, atstr))
+ {
+ struct tm sec = {0};
+ sec.tm_year = year - 1900;
+ sec.tm_mon = mouth - 1;
+ sec.tm_mday = date;
+ sec.tm_hour = hour;
+ sec.tm_min = minute;
+ sec.tm_sec = seconds;
+ if (demo == 1)
+ {
+ sc_rtc_timer_add_utc_demo(&sec, srcid, 2, wakeup, sc_rtc_timer_id_exp_cb_demo1);
+ }
+ else
+ {
+ sc_rtc_timer_add_utc_demo(&sec, srcid, 3, wakeup, sc_rtc_timer_id_exp_cb_demo0);
+ }
+ }
+ else if (0 == strcmp(CMD_DEL, atstr))
+ {
+ sc_rtc_timer_del_demo(srcid, 0);
+ }
+ else if (0 == strcmp(CMD_HELP, atstr))
+ {
+ printUsage(atstr);
+ }
+ else if (0 == strcmp(CMD_Q, atstr))
+ {
+ break;
+ }
+ }
+ }
+
+ rtc_timer_deinit( );
+ printf("sc_rtc_timer_demo:Demo over.\n");
+ return 0;
}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/spitest/test_spidev.c b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/spitest/test_spidev.c
index b281d1d..3a507ea 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/spitest/test_spidev.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/zxic_app_open/test/spitest/test_spidev.c
@@ -6,13 +6,13 @@
#include <sys/types.h>
#include <linux/spi/spidev.h>
-#define SPI_DEV_0 "/dev/spidev1.0"
-#define SPI_DEV_1 "/dev/spidev1.0"
+#define SPI_DEV_0 "dev/spidev1.0"
+#define SPI_DEV_1 "dev/spidev2.0"
#define PACK_HEAD 0xA5
#define PACK_TAIL 0x7e
#define CHECK_PAY_LOAD 3
-int spi_dev_fd[2] = {-1};
+int spi_dev_fd[4] = {-1};
static struct info
{
@@ -300,11 +300,8 @@
return ret;
}
- if(num == 0) {
- spi_dev_fd[num] = sc_spi_open(path,0, 8,speed, O_RDWR);
- } else {
- spi_dev_fd[num] = open(path,O_RDWR);
- }
+ spi_dev_fd[num] = sc_spi_open(path,0, 8,speed, O_RDWR);
+
if(spi_dev_fd[num] < 0) {
printf("%s open failed \r\n",path);
@@ -314,9 +311,124 @@
return ret;
}
+
+static int spi_trans( int fp, unsigned char *buf, int len)
+
+{
+ int frame_sum = len/768;
+ struct spi_ioc_transfer tr[768]={0};
+ int i = 0;
+
+ if(len % 768) {
+ frame_sum++;
+ }
+
+ if(frame_sum > 16) {
+ frame_sum = 16;
+ }
+
+ for(;i<frame_sum;++i) {
+ tr[i].tx_buf=(unsigned long)&buf[i*768];
+ tr[i].rx_buf=(unsigned long)&buf[i*768];
+ tr[i].len=((i+1)*768)<=len?768:(len%768);
+ tr[i].delay_usecs = 1;
+ tr[i].speed_hz=4800000;
+ tr[i].cs_change=0;
+ }
+
+ return ioctl(fp,SPI_IOC_MESSAGE(frame_sum),&tr);
+}
+
+
+static void ioctl_test(char *path,int num,int count,int speed)
+{
+
+ int mode = 3; //CPOL=0, CPHA=1
+ int times = count;
+ int ret;
+ char buffer[1024] = {0};
+ if(num > 2 && num < 0) {
+ printf("parm err %d \r\n",num);
+ return;
+ }
+
+ spi_dev_fd[num] = open(path,O_RDWR);
+ if(spi_dev_fd[num] < 0) {
+ printf("%s open failed \r\n",path);
+ return;
+ }
+ printf("%s open fd:%d \r\n",path,spi_dev_fd[num]);
+
+ //ÉèÖÃģʽ
+ ret = ioctl( spi_dev_fd[num], SPI_IOC_WR_MODE, &mode );
+ printf("spidev: set WR mode(%d) ret :%d\n", mode, ret);
+ mode = 0;
+ ret = ioctl( spi_dev_fd[num], SPI_IOC_RD_MODE, &mode );
+ printf("spidev: get RD mode(%d) ret :%d\n", mode, ret);
+
+ //ÉèÖÃÆµÂÊ
+ speed = 4800000; //4.8MHz
+ ret = ioctl( spi_dev_fd[num], SPI_IOC_WR_MAX_SPEED_HZ, &speed);
+ printf("spidev: set max speed %d Hz, ret:%d\n", speed, ret);
+ speed = 0 ;
+ ret = ioctl( spi_dev_fd[num], SPI_IOC_RD_MAX_SPEED_HZ, &speed);
+ printf("spidev: get max speed(%d) ret :%d\n", speed, ret);
+
+
+ srand(time(0));
+ for(int i = 0; i<1024; i++)
+ buffer[i] = rand()&0xFF;
+
+ while(times > 0) {
+ ret = spi_trans(spi_dev_fd[num], buffer, 768);
+ printf("spidev: times %d spi_trans len %d !\n",times,ret);
+ times--;
+ }
+ close(spi_dev_fd[num]);
+ spi_dev_fd[num]= -1;
+}
+
+static void ioctl_set_parm_test(char *path,int num,int mode,int speed)
+{
+
+ //int mode = 1; //CPOL=0, CPHA=1
+ int ret;
+ char buffer[1024] = {0};
+ if(num > 2 && num < 0) {
+ printf("parm err %d \r\n",num);
+ return;
+ }
+
+ spi_dev_fd[num] = open(path,O_RDWR);
+ if(spi_dev_fd[num] < 0) {
+ printf("%s open failed \r\n",path);
+ return;
+ }
+ printf("%s open fd:%d \r\n",path,spi_dev_fd[num]);
+
+ //ÉèÖÃģʽ
+ ret = ioctl( spi_dev_fd[num], SPI_IOC_WR_MODE, &mode );
+ printf("spidev: set WR mode(%d) ret :%d\n", mode, ret);
+ mode = 0;
+ ret = ioctl( spi_dev_fd[num], SPI_IOC_RD_MODE, &mode );
+ printf("spidev: get RD mode(%d) ret :%d\n", mode, ret);
+
+ //ÉèÖÃÆµÂÊ
+ speed = 4800000; //4.8MHz
+ ret = ioctl( spi_dev_fd[num], SPI_IOC_WR_MAX_SPEED_HZ, &speed);
+ printf("spidev: set max speed %d Hz, ret:%d\n", speed, ret);
+ speed = 0 ;
+ ret = ioctl( spi_dev_fd[num], SPI_IOC_RD_MAX_SPEED_HZ, &speed);
+ printf("spidev: get max speed(%d) ret :%d\n", speed, ret);
+
+ close(spi_dev_fd[num]);
+ spi_dev_fd[num]= -1;
+}
+
+
/*
cmd:
- argv[1] = "0"|"1" master||
+ argv[1] = "dev_id" /dev/spidev%d.0
argv[2] = "send"|"recv" direction
argv[3] = "0"~"4096-3" len buf[0],buf[1],buf[len-1] used for check
argv[4] = "0"~"40M" speed /slave no need/
@@ -324,6 +436,7 @@
int main(int argc,char *argv[])
{
int i,dev_id,len,speed,ret = 0;
+ char name[32] = {0};
for(i = 0;i<argc;i++) {
printf("%s \n",argv[i]);
@@ -332,25 +445,40 @@
dev_id = atoi(argv[1]);
len = atoi(argv[3]);
speed = atoi(argv[4]);
-
- if(dev_id == 0)
- ret = spi_dev_open(SPI_DEV_0,dev_id,speed);
- else
- ret = spi_dev_open(SPI_DEV_1,dev_id,speed);
- if(ret < 0) {
- printf("%d return \n",__LINE__);
- return ret;
- }
+
+ sprintf(name,"/dev/spidev%d.0",dev_id);
+ printf("dev name: %s \n",name);
if(!strcmp("send",argv[2])) {
+ ret = spi_dev_open(name,dev_id,speed);
+ if(ret < 0) {
+ printf("%d return \n",__LINE__);
+ return ret;
+ }
ret = send_thread_init(dev_id,len);
}else if(!strcmp("recv",argv[2])) {
+ ret = spi_dev_open(name,dev_id,speed);
+ if(ret < 0) {
+ printf("%d return \n",__LINE__);
+ return ret;
+ }
ret = recv_thread_init(dev_id,len);
}else if(!strcmp("send_recv",argv[2])) {
+ ret = spi_dev_open(name,dev_id,speed);
+ if(ret < 0) {
+ printf("%d return \n",__LINE__);
+ return ret;
+ }
ret = send_recv_thread_init(dev_id,len);
+ }else if(!strcmp("ioctl_test",argv[2])) {
+ int times = len;
+ ioctl_test(name,dev_id,times,speed);
+ }else if(!strcmp("set_parm",argv[2])) {
+ int mode = len;
+ ioctl_set_parm_test(name,dev_id,mode,speed);
}else {
printf("cmd invalid \n",argv[2]);
ret = -1;
}
-
+
return 0;
}