[Feature][ZXW-41] merged 0601 version

Change-Id: I667af6bb09d65581d455b73f8984c160b2c67ad8
diff --git a/pub/include/nv/ref_rw.h b/pub/include/nv/ref_rw.h
new file mode 100644
index 0000000..d99a830
--- /dev/null
+++ b/pub/include/nv/ref_rw.h
@@ -0,0 +1,16 @@
+typedef struct

+{

+	BYTE nvInerVersion[100];

+	BYTE nvExVersion[100];

+	BYTE nvHWVersion[100];

+	BYTE nvInerModelNum[32];

+	BYTE nvExModelNum[32];

+	BYTE nvSSID[100];

+	BYTE nvCGMI[100];

+	BYTE nvWIFIKey[65];

+	BYTE nvUnlockTimes[4];

+	BYTE nvVersionMode;

+	BYTE nvZisms;

+	BYTE nvDm;

+}T_ZCtrm_NV_FILE_INFO;

+

diff --git a/pub/include/ps_phy/rpmsg_channel.h b/pub/include/ps_phy/rpmsg_channel.h
index ab4993e..cbf455b 100644
--- a/pub/include/ps_phy/rpmsg_channel.h
+++ b/pub/include/ps_phy/rpmsg_channel.h
@@ -85,6 +85,7 @@
 //PHY<->M0

 #define RP_MSG_PHY_M0_AXI_DFS               channel_1     //axiµ÷ƵͨµÀ

 #define RP_MSG_M0_PHY_WDT                   channel_2     //m0¡¢zspÖ®¼äµÄWDT

+#define RP_MSG_PHY_M0_LOG_CHANNEL           channel_4     //m0¡¢zspÖ®¼äµÄLog»½ÐÑͨµÀ

 

 //PS<->M0

 #define RP_MSG_PS_M0_AXI_DFS                channel_1     //axiµ÷ƵͨµÀ

diff --git a/pub/include/tools/ZspTrace.h b/pub/include/tools/ZspTrace.h
index 047d65a..71bae28 100755
--- a/pub/include/tools/ZspTrace.h
+++ b/pub/include/tools/ZspTrace.h
@@ -33,6 +33,8 @@
 #define ZCAT_PHY_LOG_Free_UNIT_BUF         (ZCAT_PHY_LOG_UNIT_TAIL + (4>>CPU_SHIFT))

 #define ZCAT_PHY_LOG_Free_UNIT_LEN         (96>>CPU_SHIFT) /* (24 * 4)B = 384K*/ 

 #define ZCAT_PHY_LOG_OFF                   (ZCAT_PHY_LOG_UNIT_HEAD + (16>>CPU_SHIFT) + ZCAT_PHY_LOG_Free_UNIT_LEN) /* ¶àÔ¤ÁôÁË8×Ö½Ú */

+#define ZCAT_PHY_LOG_ZSP_BUF_READY         (ZCAT_PHY_LOG_OFF + (4>>CPU_SHIFT)) 

+#define ZCAT_PHY_LOG_VEHICLE_SIGN          (ZCAT_PHY_LOG_ZSP_BUF_READY + (4>>CPU_SHIFT)) 

 

 ////PHY<->PS ringbuffer(TD)

 #define ZCAT_PHY_LOG_CONTROL_SIZE           (0x200UL>>CPU_SHIFT)

diff --git a/pub/project/zx297520v3/include/infra/ram_base_config_7520v3.h b/pub/project/zx297520v3/include/infra/ram_base_config_7520v3.h
index 44951c6..517bfc4 100755
--- a/pub/project/zx297520v3/include/infra/ram_base_config_7520v3.h
+++ b/pub/project/zx297520v3/include/infra/ram_base_config_7520v3.h
@@ -218,22 +218,31 @@
 #define ICP_CAP_BUF_ADDR                DDR_BASE_ADDR_CAP_BUF

 #define ICP_CAP_BUF_LEN                 ((924 * 1024UL)>>CPU_SHIFT)

 #define TOOL_CAP_BUF_ADDR               (ICP_CAP_BUF_ADDR + ICP_CAP_BUF_LEN)

-#define TOOL_CAP_BUF_LEN                ((92 * 1024UL)>>CPU_SHIFT)

-#define ADB_CAP_BUF_ADDR                (TOOL_CAP_BUF_ADDR + TOOL_CAP_BUF_LEN)

+#define TOOL_CAP_BUF_LEN                ((60 * 1024UL)>>CPU_SHIFT)

+#define RINGBUF_CAP_TO_AP_ADDR          (TOOL_CAP_BUF_ADDR + TOOL_CAP_BUF_LEN)

+#define RINGBUF_CAP_TO_AP_LEN           ((32  * 1024UL)>>CPU_SHIFT)

+#define ADB_CAP_BUF_ADDR                (RINGBUF_CAP_TO_AP_ADDR + RINGBUF_CAP_TO_AP_LEN)

 #define ADB_CAP_BUF_LEN                 ((4 * 1024UL)>>CPU_SHIFT)

 #define RAMDUMP_CAP_CMM_BUF_ADDR        (ADB_CAP_BUF_ADDR + ADB_CAP_BUF_LEN)

 #define RAMDUMP_CAP_CMM_BUF_LEN         ((4 * 1024UL)>>CPU_SHIFT)

-

-#define RINGBUF_CAP_BASE_OFFSET         ((1024 * 1024UL)>>CPU_SHIFT)                   

-#define RINGBUF_CAP_TO_AP_ADDR			(RAMDUMP_CAP_CMM_BUF_ADDR + RAMDUMP_CAP_CMM_BUF_LEN)

-#define RINGBUF_CAP_TO_AP_LEN			((32  * 1024UL)>>CPU_SHIFT)

-#define RINGBUF_AP_TO_CAP_ADDR			(RINGBUF_CAP_TO_AP_ADDR + RINGBUF_CAP_TO_AP_LEN)

-#define RINGBUF_AP_TO_CAP_LEN			((128 * 1024UL)>>CPU_SHIFT)

+#define RINGBUF_AP_TO_CAP_ADDR          (RAMDUMP_CAP_CMM_BUF_ADDR + RAMDUMP_CAP_CMM_BUF_LEN)

+#define RINGBUF_AP_TO_CAP_LEN           ((128 * 1024UL)>>CPU_SHIFT)

+#define TOOL_ZSP_TO_CAP_LOG_ADDR        (RINGBUF_AP_TO_CAP_ADDR + RINGBUF_AP_TO_CAP_LEN)

+#define TOOL_ZSP_TO_CAP_LOG_LEN         ((384 * 1024UL)>>CPU_SHIFT)

+#define RAMDUMP_AP_TO_CAP_BUF_ADDR      (TOOL_ZSP_TO_CAP_LOG_ADDR + TOOL_ZSP_TO_CAP_LOG_LEN)

+#define RAMDUMP_AP_TO_CAP_BUF_LEN       ((128 * 1024UL)>>CPU_SHIFT)

+#define TEE_SHARE_BUF_ADDR              (RAMDUMP_AP_TO_CAP_BUF_ADDR + RAMDUMP_AP_TO_CAP_BUF_LEN)

+#define TEE_SHARE_BUF_LEN               ((384 * 1024UL)>>CPU_SHIFT)

 

 #define ICP_CAP_BUF_ADDR_PA             DDR_BASE_CAPBUF_ADDR_PA

 #define TOOL_CAP_BUF_ADDR_PA            (ICP_CAP_BUF_ADDR_PA + ICP_CAP_BUF_LEN)

-#define ADB_CAP_BUF_ADDR_PA             (TOOL_CAP_BUF_ADDR_PA + TOOL_CAP_BUF_LEN)

+#define RINGBUF_CAP_TO_AP_ADDR_PA       (TOOL_CAP_BUF_ADDR_PA + TOOL_CAP_BUF_LEN)

+#define ADB_CAP_BUF_ADDR_PA             (RINGBUF_CAP_TO_AP_ADDR_PA + RINGBUF_CAP_TO_AP_LEN)

 #define RAMDUMP_CAP_CMM_BUF_ADDR_PA     (ADB_CAP_BUF_ADDR_PA + ADB_CAP_BUF_LEN)

+#define RINGBUF_AP_TO_CAP_ADDR_PA       (RAMDUMP_CAP_CMM_BUF_ADDR_PA + RAMDUMP_CAP_CMM_BUF_LEN)

+#define TOOL_ZSP_TO_CAP_LOG_ADDR_PA     (RINGBUF_AP_TO_CAP_ADDR_PA + RINGBUF_AP_TO_CAP_LEN)

+#define RAMDUMP_AP_TO_CAP_BUF_ADDR_PA   (TOOL_ZSP_TO_CAP_LOG_ADDR_PA + TOOL_ZSP_TO_CAP_LOG_LEN)

+#define TEE_SHARE_BUF_ADDR_PA           (RAMDUMP_AP_TO_CAP_BUF_ADDR_PA + RAMDUMP_AP_TO_CAP_BUF_LEN)

 #endif

 

 /* 7520V3оƬIRAM0ѹËõ£¬Ð­ÒéÕ»ÎïÀí²ã½»»¥¿Õ¼äÒÆ¶¯µ½DDR£¬¸´ÓÃRamdump¿Õ¼ä */

@@ -244,16 +253,16 @@
 #define IRAM_BASE_LEN_LTE               ((10 * 1024UL)>>CPU_SHIFT)

 

 /* 24K£¬PSÓëPHYµÄICP½»»¥£¬Ê¹ÓÃIRAM*/

-#define IRAM_BASE_ADDR_PS_PHY_SHAREBUF	(IRAM_BASE_ADDR_LTE + IRAM_BASE_LEN_LTE)

-#define IRAM_BASE_LEN_PS_PHY_SHAREBUF	((24 * 1024UL)>>CPU_SHIFT)

+#define IRAM_BASE_ADDR_PS_PHY_SHAREBUF    (IRAM_BASE_ADDR_LTE + IRAM_BASE_LEN_LTE)

+#define IRAM_BASE_LEN_PS_PHY_SHAREBUF    ((24 * 1024UL)>>CPU_SHIFT)

 

 /* 221K£¬PSÓëPHYµÄICP½»»¥£¬Ê¹ÓÃDDR, ¸´ÓÃRAMDUMP*/

-#define DDR_BASE_ADDR_PS_PHY_SHAREBUF	(DDR_BASE_ADDR_RAMDUMP)

-#define DDR_BASE_LEN_PS_PHY_SHAREBUF	((221 * 1024UL)>>CPU_SHIFT)

+#define DDR_BASE_ADDR_PS_PHY_SHAREBUF    (DDR_BASE_ADDR_RAMDUMP)

+#define DDR_BASE_LEN_PS_PHY_SHAREBUF    ((221 * 1024UL)>>CPU_SHIFT)

 

 /* 2k£¬zsp RAMDUMP*/

-#define DDR_BASE_ADDR_PHY_RAMDUMP		(DDR_BASE_ADDR_PS_PHY_SHAREBUF + DDR_BASE_LEN_PS_PHY_SHAREBUF)

-#define DDR_BASE_LEN_PHY_RAMDUMP		((2 * 1024UL)>>CPU_SHIFT)

+#define DDR_BASE_ADDR_PHY_RAMDUMP        (DDR_BASE_ADDR_PS_PHY_SHAREBUF + DDR_BASE_LEN_PS_PHY_SHAREBUF)

+#define DDR_BASE_LEN_PHY_RAMDUMP        ((2 * 1024UL)>>CPU_SHIFT)

 

 /* 1K£¬PSÓëPHYÐÅÏ¢½»»¥£¬TDÒµÎñ ʹÓÃDDR*/

 #define IRAM_BASE_ADDR_TD               (DDR_BASE_ADDR_PHY_RAMDUMP + DDR_BASE_LEN_PHY_RAMDUMP)