ap/build/scripts/trace32/zx297520v3/sys/clocks.cmm

;create clocks area
local &pll_reg
local &foutvco
local &fout2
local &fout3

area.create clocks 200  300
area.clear clocks 

area.select clocks 
area.view clocks

if state.run()
(
	break
)

;disable mmu
&cr=data.long(c15:0x1)
&tmp=&cr&(~0x1)
per.s c15:0x1 %LONG &tmp

print "*********************PLL********************************************"
&pll_reg=0x0013b008
&fref=26000000.
print "check mpll..."
Gosub calc_pll

&pll_reg=0x0013b010
&fref=26000000.
print "check upll..."
Gosub calc_pll

&pll_reg=0x0013B018
&tmp=data.long(D:0x0013B018)
&tmp=(&tmp>>25)&0x3
if (&tmp==1)
(
&fref=30720000.
)
else
(
&fref=26000000.
)
print "check dpll..."
Gosub calc_pll

&pll_reg=0x0013b110
&fref=26000000.
print "check gpll..."
Gosub calc_pll

print "*********************M0 CLK********************************************"
&tmp=data.long(D:0x0013b038)
&tmp=&tmp&0x3
if (&tmp==0)
(
	print "M0 clk sel main_clk"
)
if (&tmp==1)
(
	print "M0 clk sel 104M"
)
if (&tmp==2)
(
	print "M0 clk sel 78M"
)
if (&tmp==3)
(
	print "M0 clk sel 32K"
)

print "*********************A53 CLK********************************************"
&tmp=data.long(D:0x01306040)
&tmp=&tmp&0x3
if (&tmp==0)
(
	
	print "ufi clk sel main_clk"
)
if (&tmp==1)
(
	print "ufi clk sel 624M"
)
if (&tmp==2)
(
	print "ufi clk sel 312M"
)
if (&tmp==3)
(
	print "ufi clk sel 156M"
)

print "*********************PS CLK********************************************"
&tmp=data.long(D:0x01306020)
&tmp=&tmp&0x3
if (&tmp==0)
(
	print "pscpu clk sel main_clk"
)
if (&tmp==1)
(
	print "pscpu clk sel 624M"
)
if (&tmp==2)
(
	print "pscpu clk sel 312M"
)
if (&tmp==3)
(
	print "pscpu clk sel 156M"
)

print "*********************PHY CLK********************************************"
&tmp=data.long(D:0x01306030)
&tmp=&tmp&0x3
if (&tmp==0)
(
	print "phycpu clk sel main_clk"
)
if (&tmp==1)
(
	print "phycpu clk sel 491M"
)
if (&tmp==2)
(
	print "phycpu clk sel 312M"
)
if (&tmp==3)
(
	print "phycpu clk sel 156M"
)

print "*********************AXI CLK********************************************"
&tmp=data.long(D:0x01306000)
&tmp=&tmp&0x7
if (&tmp==0)
(
	print "axi clk sel main_clk"
)
if (&tmp==1)
(
	print "axi clk sel 156M"
)
if (&tmp==2)
(
	print "axi clk sel 124.8M"
)
if (&tmp==3)
(
	print "axi clk sel 104M"
)
if (&tmp==4)
(
	print "axi clk sel 78M"
)
if (&tmp==5)
(
	print "axi clk sel 52M"
)
if (&tmp==6)
(
	print "axi clk sel 39M"
)
if (&tmp==7)
(
	print "axi clk sel 6.5M"
)

print "*********************DDR CLK********************************************"
&tmp=data.long(D:0x01306050)
&tmp=&tmp&0x3
if (&tmp==0)
(
	print "ddr io clk sel 312M"
)
if (&tmp==1)
(
	print "ddr io clk sel 400M"
)
if (&tmp==2)
(
	print "ddr io clk sel 208M"
)
if (&tmp==3)
(
	print "ddr io clk sel 156M"
)
;restore mmu config
per.s c15:0x1 %LONG &cr
ENDDO


;*****************************************************************
calc_pll:

local &tmp1
local &tmp2
&tmp1=data.long(D:&pll_reg)
&tmp2=data.long(D:&pll_reg+0x4)
&power=(&tmp1>>0x1f)&0x1
if (&power==1)
(
	print "pll is power down"
)
else
(
	print "pll is power up"
)

&lock=(&tmp1>>0x1e)&0x1
if (&lock==1)
(
	print "pll is locked"
)
else
(
	print "pll is unlocked"
)

&refdiv=(&tmp1>>0x12)&((0x1<<0x6)-1)
&fbdiv=(&tmp1>>0x6)&((0x1<<0xc)-1)
&frac=(&tmp2)&((0x1<<0x18)-1)
&foutvco=(&fref/&refdiv)*(&fbdiv+&frac)
print "pll foutvco="+"&foutvco"

&postdiv1=(&tmp1>>0x3)&((0x1<<0x3)-0x1)
&postdiv2=(&tmp1)&((0x1<<0x3)-0x1)
&foutpostdiv=&foutvco/&postdiv1/&postdiv2
&fout2=&foutpostdiv/0x2
&fout3=&foutpostdiv/0x3
&fout4=&foutpostdiv/0x4
print "pll foutpostdiv="+"&foutpostdiv"
print "pll fout2="+"&fout2"
print "pll fout3="+"&fout3"
print "pll fout4="+"&fout4"

RETURN