[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit

Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/ap/build/uClibc/libc/string/cris/memcopy.h b/ap/build/uClibc/libc/string/cris/memcopy.h
new file mode 100644
index 0000000..449c756
--- /dev/null
+++ b/ap/build/uClibc/libc/string/cris/memcopy.h
@@ -0,0 +1,62 @@
+/* Copyright (C) 2001 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   Modified for use in uClibc (C) 2007 Axis Communications AB.
+   Minimal modifications: include path name and #undef of WORD_COPY_FWD/BWD
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Library General Public License as
+   published by the Free Software Foundation; either version 2 of the
+   License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Library General Public License for more details.
+
+   You should have received a copy of the GNU Library General Public
+   License along with the GNU C Library; see the file COPYING.LIB.  If not,
+   write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "../generic/memcopy.h"
+
+/* We override the word-copying macros, partly because misalignment in one
+   pointer isn't cause for a special function, partly because we want to
+   get rid of all the static functions in generic/memcopy.c; these macros
+   are only used in memmove.c since we have arch-specific mempcpy, memcpy and
+   memset.  */
+
+#undef OP_T_THRES
+#define OP_T_THRES OPSIZ
+
+#undef WORD_COPY_FWD
+#define WORD_COPY_FWD(dst_bp, src_bp, nbytes_left, nbytes)		\
+  do									\
+    {									\
+      unsigned long enddst_bp = dst_bp + nbytes - (nbytes % OPSIZ);	\
+      nbytes_left = (nbytes % OPSIZ);					\
+      while (dst_bp < (unsigned long) enddst_bp)			\
+	{								\
+	  op_t x = *(op_t *) src_bp;					\
+	  src_bp += sizeof x;						\
+	  *(op_t *) dst_bp = x;						\
+	  dst_bp += sizeof x;						\
+	}								\
+    } while (0)
+
+#undef WORD_COPY_BWD
+#define WORD_COPY_BWD(dst_bp, src_bp, nbytes_left, nbytes)		\
+  do									\
+    {									\
+      unsigned long enddst_bp = dst_bp - nbytes + (nbytes % OPSIZ);	\
+      nbytes_left = (nbytes % OPSIZ);					\
+      while (dst_bp > enddst_bp)					\
+	{								\
+	  op_t x;							\
+	  src_bp -= sizeof x;						\
+	  x = *(op_t *) src_bp;						\
+	  dst_bp -= sizeof x;						\
+	  *(op_t *) dst_bp = x;						\
+	}								\
+    } while (0)
diff --git a/ap/build/uClibc/libc/string/cris/memcpy.c b/ap/build/uClibc/libc/string/cris/memcpy.c
new file mode 100644
index 0000000..94e576f
--- /dev/null
+++ b/ap/build/uClibc/libc/string/cris/memcpy.c
@@ -0,0 +1,242 @@
+/* A memcpy for CRIS.
+   Copyright (C) 1994-2008 Axis Communications.
+   All rights reserved.
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions
+   are met:
+
+   1. Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+
+   2. Neither the name of Axis Communications nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+   THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
+   ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
+   COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+   INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+   (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+   SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+   HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+   IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.  */
+
+/* FIXME: This file should really only be used for reference, as the
+   result is somewhat depending on gcc generating what we expect rather
+   than what we describe.  An assembly file should be used instead.  */
+
+#include <string.h>
+
+#ifdef __arch_v32
+/* For CRISv32, movem is very cheap.  */
+#define MEMCPY_BY_BLOCK_THRESHOLD (44)
+#else
+/* Break even between movem and move16 is really at 38.7 * 2, but
+   modulo 44, so up to the next multiple of 44, we use ordinary code.  */
+#define MEMCPY_BY_BLOCK_THRESHOLD (44 * 2)
+#endif
+
+/* No name ambiguities in this file.  */
+__asm__ (".syntax no_register_prefix");
+
+void *
+memcpy(void *pdst, const void *psrc, size_t pn)
+{
+  /* Now we want the parameters put in special registers.
+     Make sure the compiler is able to make something useful of this.
+     As it is now: r10 -> r13; r11 -> r11 (nop); r12 -> r12 (nop).
+
+     If gcc was allright, it really would need no temporaries, and no
+     stack space to save stuff on.  */
+
+  register void *return_dst __asm__ ("r10") = pdst;
+  register unsigned char *dst __asm__ ("r13") = pdst;
+  register unsigned const char *src __asm__ ("r11") = psrc;
+  register int n __asm__ ("r12") = pn;
+
+  /* When src is aligned but not dst, this makes a few extra needless
+     cycles.  I believe it would take as many to check that the
+     re-alignment was unnecessary.  */
+  if (((unsigned long) dst & 3) != 0
+      /* Don't align if we wouldn't copy more than a few bytes; so we
+         don't have to check further for overflows.  */
+      && n >= 3)
+  {
+    if ((unsigned long) dst & 1)
+      {
+        n--;
+        *dst = *src;
+        src++;
+        dst++;
+      }
+
+    if ((unsigned long) dst & 2)
+      {
+        n -= 2;
+        *(short *) dst = *(short *) src;
+        src += 2;
+        dst += 2;
+      }
+  }
+
+  /* Decide which copying method to use.  */
+  if (n >= MEMCPY_BY_BLOCK_THRESHOLD)
+    {
+      /* It is not optimal to tell the compiler about clobbering any
+         registers; that will move the saving/restoring of those registers
+         to the function prologue/epilogue, and make non-movem sizes
+         suboptimal.  */
+      __asm__ __volatile__
+        ("\
+         ;; GCC does promise correct register allocations, but let's    \n\
+         ;; make sure it keeps its promises.                            \n\
+         .ifnc %0-%1-%2,$r13-$r11-$r12                                  \n\
+         .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\"       \n\
+         .endif                                                         \n\
+                                                                        \n\
+         ;; Save the registers we'll use in the movem process           \n\
+         ;; on the stack.                                               \n\
+         subq   11*4,sp                                                 \n\
+         movem  r10,[sp]                                                \n\
+                                                                        \n\
+         ;; Now we've got this:                                         \n\
+         ;; r11 - src                                                   \n\
+         ;; r13 - dst                                                   \n\
+         ;; r12 - n                                                     \n\
+                                                                        \n\
+         ;; Update n for the first loop.                                \n\
+         subq    44,r12                                                 \n\
+0:                                                                      \n\
+"
+#ifdef __arch_common_v10_v32
+         /* Cater to branch offset difference between v32 and v10.  We
+            assume the branch below has an 8-bit offset.  */
+"        setf\n"
+#endif
+"        movem  [r11+],r10                                              \n\
+         subq   44,r12                                                  \n\
+         bge     0b                                                     \n\
+         movem  r10,[r13+]                                              \n\
+                                                                        \n\
+         ;; Compensate for last loop underflowing n.                    \n\
+         addq   44,r12                                                  \n\
+                                                                        \n\
+         ;; Restore registers from stack.                               \n\
+         movem [sp+],r10"
+
+         /* Outputs.  */
+         : "=r" (dst), "=r" (src), "=r" (n)
+
+         /* Inputs.  */
+         : "0" (dst), "1" (src), "2" (n));
+    }
+
+  while (n >= 16)
+    {
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+
+      n -= 16;
+    }
+
+  switch (n)
+    {
+    case 0:
+      break;
+
+    case 1:
+      *dst = *src;
+      break;
+
+    case 2:
+      *(short *) dst = *(short *) src;
+      break;
+
+    case 3:
+      *(short *) dst = *(short *) src; dst += 2; src += 2;
+      *dst = *src;
+      break;
+
+    case 4:
+      *(long *) dst = *(long *) src;
+      break;
+
+    case 5:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *dst = *src;
+      break;
+
+    case 6:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(short *) dst = *(short *) src;
+      break;
+
+    case 7:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(short *) dst = *(short *) src; dst += 2; src += 2;
+      *dst = *src;
+      break;
+
+    case 8:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src;
+      break;
+
+    case 9:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *dst = *src;
+      break;
+
+    case 10:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(short *) dst = *(short *) src;
+      break;
+
+    case 11:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(short *) dst = *(short *) src; dst += 2; src += 2;
+      *dst = *src;
+      break;
+
+    case 12:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src;
+      break;
+
+    case 13:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *dst = *src;
+      break;
+
+    case 14:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(short *) dst = *(short *) src;
+      break;
+
+    case 15:
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(long *) dst = *(long *) src; dst += 4; src += 4;
+      *(short *) dst = *(short *) src; dst += 2; src += 2;
+      *dst = *src;
+      break;
+    }
+
+  return return_dst;
+}
+libc_hidden_def(memcpy)
diff --git a/ap/build/uClibc/libc/string/cris/memmove.c b/ap/build/uClibc/libc/string/cris/memmove.c
new file mode 100644
index 0000000..4184fc9
--- /dev/null
+++ b/ap/build/uClibc/libc/string/cris/memmove.c
@@ -0,0 +1,100 @@
+/* Taken from generic/memmove.c; trivially modified to work with
+   arch-specific memcopy.h for Cris.
+
+   Copy memory to memory until the specified number of bytes
+   has been copied.  Overlap is handled correctly.
+   Copyright (C) 1991, 1995, 1996, 1997, 2003 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Torbjorn Granlund (tege@sics.se).
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#include <string.h>
+
+#include "memcopy.h"
+#include "../generic/pagecopy.h"
+
+void *memmove (void *dest, const void *src, size_t len)
+{
+  unsigned long int dstp = (long int) dest;
+  unsigned long int srcp = (long int) src;
+
+  /* This test makes the forward copying code be used whenever possible.
+     Reduces the working set.  */
+  if (dstp - srcp >= len)	/* *Unsigned* compare!  */
+    {
+#if 1
+#warning REMINDER: Cris arch-opt memmove assumes memcpy does forward copying!
+      memcpy(dest, src, len);
+#else
+      /* Copy from the beginning to the end.  */
+
+      /* If there not too few bytes to copy, use word copy.  */
+      if (len >= OP_T_THRES)
+	{
+	  /* Copy just a few bytes to make DSTP aligned.  */
+	  len -= (-dstp) % OPSIZ;
+	  BYTE_COPY_FWD (dstp, srcp, (-dstp) % OPSIZ);
+
+	  /* Copy whole pages from SRCP to DSTP by virtual address
+	     manipulation, as much as possible.  */
+
+	  PAGE_COPY_FWD_MAYBE (dstp, srcp, len, len);
+
+	  /* Copy from SRCP to DSTP taking advantage of the known
+	     alignment of DSTP.  Number of bytes remaining is put
+	     in the third argument, i.e. in LEN.  This number may
+	     vary from machine to machine.  */
+
+	  WORD_COPY_FWD (dstp, srcp, len, len);
+
+	  /* Fall out and copy the tail.  */
+	}
+
+      /* There are just a few bytes to copy.  Use byte memory operations.  */
+      BYTE_COPY_FWD (dstp, srcp, len);
+#endif
+    }
+  else
+    {
+      /* Copy from the end to the beginning.  */
+      srcp += len;
+      dstp += len;
+
+      /* If there not too few bytes to copy, use word copy.  */
+      if (len >= OP_T_THRES)
+	{
+	  /* Copy just a few bytes to make DSTP aligned.  */
+	  len -= dstp % OPSIZ;
+	  BYTE_COPY_BWD (dstp, srcp, dstp % OPSIZ);
+
+	  /* Copy from SRCP to DSTP taking advantage of the known
+	     alignment of DSTP.  Number of bytes remaining is put
+	     in the third argument, i.e. in LEN.  This number may
+	     vary from machine to machine.  */
+
+	  WORD_COPY_BWD (dstp, srcp, len, len);
+
+	  /* Fall out and copy the tail.  */
+	}
+
+      /* There are just a few bytes to copy.  Use byte memory operations.  */
+      BYTE_COPY_BWD (dstp, srcp, len);
+    }
+
+  return (dest);
+}
+libc_hidden_def(memmove)
diff --git a/ap/build/uClibc/libc/string/cris/memset.c b/ap/build/uClibc/libc/string/cris/memset.c
new file mode 100644
index 0000000..fab4e8b
--- /dev/null
+++ b/ap/build/uClibc/libc/string/cris/memset.c
@@ -0,0 +1,262 @@
+/* A memset for CRIS.
+   Copyright (C) 1999-2008 Axis Communications.
+   All rights reserved.
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions
+   are met:
+
+   1. Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+
+   2. Neither the name of Axis Communications nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+   THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
+   ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
+   COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+   INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+   (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+   SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+   HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+   IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.  */
+
+/* FIXME: This file should really only be used for reference, as the
+   result is somewhat depending on gcc generating what we expect rather
+   than what we describe.  An assembly file should be used instead.  */
+
+#include <string.h>
+
+/* Note the multiple occurrence of the expression "12*4", including the
+   asm.  It is hard to get it into the asm in a good way.  Thus better to
+   expose the problem everywhere: no macro.  */
+
+/* Assuming one cycle per dword written or read (ok, not really true; the
+   world is not ideal), and one cycle per instruction, then 43+3*(n/48-1)
+   <= 24+24*(n/48-1) so n >= 45.7; n >= 0.9; we win on the first full
+   48-byte block to set.  */
+
+#define MEMSET_BY_BLOCK_THRESHOLD (1 * 48)
+
+/* No name ambiguities in this file.  */
+__asm__ (".syntax no_register_prefix");
+
+void *memset(void *pdst, int c, unsigned int plen)
+{
+  /* Now we want the parameters in special registers.  Make sure the
+     compiler does something usable with this.  */
+
+  register char *return_dst __asm__ ("r10") = pdst;
+  register int n __asm__ ("r12") = plen;
+  register int lc __asm__ ("r11") = c;
+
+  /* Most apps use memset sanely.  Memsetting about 3..4 bytes or less get
+     penalized here compared to the generic implementation.  */
+
+  /* This is fragile performancewise at best.  Check with newer GCC
+     releases, if they compile cascaded "x |= x << 8" to sane code.  */
+  __asm__("movu.b %0,r13                                                \n\
+           lslq 8,r13                                                   \n\
+           move.b %0,r13                                                \n\
+           move.d r13,%0                                                \n\
+           lslq 16,r13                                                  \n\
+           or.d r13,%0"
+          : "=r" (lc)           /* Inputs.  */
+          : "0" (lc)            /* Outputs.  */
+          : "r13");             /* Trash.  */
+
+  {
+    register char *dst __asm__ ("r13") = pdst;
+
+    if (((unsigned long) pdst & 3) != 0
+        /* Oops! n = 0 must be a valid call, regardless of alignment.  */
+        && n >= 3)
+      {
+        if ((unsigned long) dst & 1)
+          {
+            *dst = (char) lc;
+            n--;
+            dst++;
+          }
+
+        if ((unsigned long) dst & 2)
+          {
+            *(short *) dst = lc;
+            n -= 2;
+            dst += 2;
+          }
+      }
+
+    /* Decide which setting method to use.  */
+    if (n >= MEMSET_BY_BLOCK_THRESHOLD)
+      {
+        /* It is not optimal to tell the compiler about clobbering any
+           registers; that will move the saving/restoring of those registers
+           to the function prologue/epilogue, and make non-block sizes
+           suboptimal.  */
+        __asm__ __volatile__
+          ("\
+           ;; GCC does promise correct register allocations, but let's  \n\
+           ;; make sure it keeps its promises.                          \n\
+           .ifnc %0-%1-%4,$r13-$r12-$r11                                \n\
+           .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\"     \n\
+           .endif                                                       \n\
+                                                                        \n\
+           ;; Save the registers we'll clobber in the movem process     \n\
+           ;; on the stack.  Don't mention them to gcc, it will only be \n\
+           ;; upset.                                                    \n\
+           subq    11*4,sp                                              \n\
+           movem   r10,[sp]                                             \n\
+                                                                        \n\
+           move.d  r11,r0                                               \n\
+           move.d  r11,r1                                               \n\
+           move.d  r11,r2                                               \n\
+           move.d  r11,r3                                               \n\
+           move.d  r11,r4                                               \n\
+           move.d  r11,r5                                               \n\
+           move.d  r11,r6                                               \n\
+           move.d  r11,r7                                               \n\
+           move.d  r11,r8                                               \n\
+           move.d  r11,r9                                               \n\
+           move.d  r11,r10                                              \n\
+                                                                        \n\
+           ;; Now we've got this:                                       \n\
+           ;; r13 - dst                                                 \n\
+           ;; r12 - n                                                   \n\
+                                                                        \n\
+           ;; Update n for the first loop                               \n\
+           subq    12*4,r12                                             \n\
+0:                                                                      \n\
+"
+#ifdef __arch_common_v10_v32
+           /* Cater to branch offset difference between v32 and v10.  We
+              assume the branch below has an 8-bit offset.  */
+"          setf\n"
+#endif
+"          subq   12*4,r12                                              \n\
+           bge     0b                                                   \n\
+           movem        r11,[r13+]                                      \n\
+                                                                        \n\
+           ;; Compensate for last loop underflowing n.                  \n\
+           addq   12*4,r12                                              \n\
+                                                                        \n\
+           ;; Restore registers from stack.                             \n\
+           movem [sp+],r10"
+
+           /* Outputs.  */
+           : "=r" (dst), "=r" (n)
+
+           /* Inputs.  */
+           : "0" (dst), "1" (n), "r" (lc));
+      }
+
+    /* An ad-hoc unroll, used for 4*12-1..16 bytes. */
+    while (n >= 16)
+      {
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        n -= 16;
+      }
+
+    switch (n)
+      {
+      case 0:
+        break;
+
+      case 1:
+        *dst = (char) lc;
+        break;
+
+      case 2:
+        *(short *) dst = (short) lc;
+        break;
+
+      case 3:
+        *(short *) dst = (short) lc; dst += 2;
+        *dst = (char) lc;
+        break;
+
+      case 4:
+        *(long *) dst = lc;
+        break;
+
+      case 5:
+        *(long *) dst = lc; dst += 4;
+        *dst = (char) lc;
+        break;
+
+      case 6:
+        *(long *) dst = lc; dst += 4;
+        *(short *) dst = (short) lc;
+        break;
+
+      case 7:
+        *(long *) dst = lc; dst += 4;
+        *(short *) dst = (short) lc; dst += 2;
+        *dst = (char) lc;
+        break;
+
+      case 8:
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc;
+        break;
+
+      case 9:
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *dst = (char) lc;
+        break;
+
+      case 10:
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(short *) dst = (short) lc;
+        break;
+
+      case 11:
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(short *) dst = (short) lc; dst += 2;
+        *dst = (char) lc;
+        break;
+
+      case 12:
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc;
+        break;
+
+      case 13:
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *dst = (char) lc;
+        break;
+
+      case 14:
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(short *) dst = (short) lc;
+        break;
+
+      case 15:
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(long *) dst = lc; dst += 4;
+        *(short *) dst = (short) lc; dst += 2;
+        *dst = (char) lc;
+        break;
+      }
+  }
+
+  return return_dst;
+}
+libc_hidden_def(memset)
diff --git a/ap/build/uClibc/libc/string/cris/strcpy.c b/ap/build/uClibc/libc/string/cris/strcpy.c
new file mode 100644
index 0000000..40e6389
--- /dev/null
+++ b/ap/build/uClibc/libc/string/cris/strcpy.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2006-2007 Axis Communications AB
+ *
+ * Licensed under the LGPL v2.1, see the file COPYING.LIB in this tarball.
+ */
+
+#include <string.h>
+
+char *strcpy(char *dest, const char *src)
+{
+  char *ret = dest;
+  unsigned long himagic = 0x80808080L;
+  unsigned long lomagic = 0x01010101L;
+
+  while ((unsigned long)src & (sizeof src - 1))
+  {
+    if (!(*dest++ = *src++))
+    {
+      return ret;
+    }
+  }
+
+  while (1)
+  {
+    unsigned long value = *(unsigned long*)src;
+    unsigned long magic;
+
+    src += sizeof (unsigned long);
+
+    if ((magic = (value - lomagic) & himagic))
+    {
+      if (magic & ~value)
+      {
+        break;
+      }
+    }
+
+    *(unsigned long*)dest = value;
+    dest += sizeof (unsigned long);
+  }
+
+  src -= sizeof (unsigned long);
+
+  while ((*dest++ = *src++))
+  {
+  }
+
+  return ret;
+}
+libc_hidden_def(strcpy)
diff --git a/ap/build/uClibc/libc/string/cris/strncpy.c b/ap/build/uClibc/libc/string/cris/strncpy.c
new file mode 100644
index 0000000..8d07407
--- /dev/null
+++ b/ap/build/uClibc/libc/string/cris/strncpy.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2006-2007 Axis Communications AB
+ *
+ * Licensed under the LGPL v2.1, see the file COPYING.LIB in this tarball.
+ */
+
+#include <string.h>
+
+
+char *strncpy(char *dest, const char *src, size_t count)
+{
+  char *ret = dest;
+  unsigned long himagic = 0x80808080L;
+  unsigned long lomagic = 0x01010101L;
+
+  while (count && (unsigned long)src & (sizeof src - 1))
+  {
+    count--;
+    if (!(*dest++ = *src++))
+    {
+      goto finalize;
+    }
+  }
+
+  while (count >= sizeof (unsigned long))
+  {
+    unsigned long value = *(unsigned long*)src;
+    unsigned long magic;
+
+    if ((magic = (value - lomagic) & himagic))
+    {
+      if (magic & ~value)
+      {
+        break;
+      }
+    }
+
+    *(unsigned long*)dest = value;
+    dest += sizeof (unsigned long);
+    src += sizeof (unsigned long);
+    count -= sizeof (unsigned long);
+  }
+
+  while (count)
+  {
+    count--;
+    if (!(*dest++ = *src++))
+      break;
+  }
+
+finalize:
+  if (count)
+  {
+    memset(dest, '\0', count);
+  }
+
+  return ret;
+}
+libc_hidden_def(strncpy)