[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit
Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/ap/libc/glibc/glibc-2.22/elf/tst-tlsmod18a.c b/ap/libc/glibc/glibc-2.22/elf/tst-tlsmod18a.c
new file mode 100644
index 0000000..1d728da
--- /dev/null
+++ b/ap/libc/glibc/glibc-2.22/elf/tst-tlsmod18a.c
@@ -0,0 +1,21 @@
+#include <stdio.h>
+
+#ifndef N
+# define N 0
+#endif
+
+static __thread int var = 4;
+
+int
+test (void)
+{
+ int *p = &var;
+ /* GCC assumes &var is never NULL, add optimization barrier. */
+ asm volatile ("" : "+r" (p));
+ if (p == NULL || *p != 4)
+ {
+ printf ("fail %d %p\n", N, p);
+ return 1;
+ }
+ return 0;
+}