[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit
Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/112.h b/ap/os/linux/linux-3.4.x/drivers/slic/112.h
new file mode 100644
index 0000000..1cd453e
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/112.h
@@ -0,0 +1,157 @@
+#ifndef _LINE_TSET_H
+#define _LINE_TSET_H
+
+/********************²âÊÔÏÒå***********************************/
+#define TI_BatteryVolt 0x1 /*²âÊÔSLC °å¶ÔÓû§ÏßµÄÀ¡µçµçѹ´óС·´¼«ÐÔ*/
+#define TI_RingVolt 0x2 /*²âÊÔSLC °å¶ÔÓû§ËÍÁåÁ÷ÊÇ·ñÕý³£¼°ÁåÁ÷µçѹ´óС£¨ ·åÖµ¡³*/
+#define TI_PulseRecv 0x3 /*²âÊÔSLC °å½ÓÊÕÂö³å»°»ú(Ä£Äâ)·¢ºÅµÄÇé¿ö*/
+#define TI_DTMFRecv 0x4 /*²âÊÔSLC °å½ÓÊÕDTMF»°»ú(Ä£Äâ)·¢ºÅµÄÇé¿ö*/
+#define TI_SendTone 0x5 /*²¦ºÅÒô£¬»ØÁåÒô£¬ÓµÈûÒô¼°Ã¦Òô¼ì²â*/
+#define TI_SendHowl 0x6 /*¶ÔÓû§ËÍ´ß¹ÒÒô*/
+#define TI_LoopCircuitAndRes 0x7 /*ÍâÏß»·Â·µçÁ÷¼°»·Â·µç×è²âÊÔ*/
+#define TI_PulseDial 0x8 /*²âÊÔÓû§»°»úÂö³å·¢ºÅµÄÄÜÁ¦*/
+#define TI_DTMFDial 0x9 /*²âÊÔÓû§»°»úµÄDTMF·¢ºÅÒÔ¼°Âö³å·¢ºÅµÄÇé¿ö*/
+#define TI_RingtoUser 0xA /*¶ÔÓû§»°»úËÍÁåÁ÷*/
+#define TI_LineVolt 0xB /*ÍâÏßÈ«µçѹ²âÊÔ*/
+#define TI_LineRes 0xC /*ÍâÏßÈ«¾øÔµµç×è²âÊÔ*/
+#define TI_LineCap 0xD /*ÍâÏßÈ«µçÈݲâÊÔ*/
+
+#define TI_Insert 0xF /*ÓëÓû§Í¨»°*/
+
+/*INVALID TEST ITEM*/
+#define TI_Hook 0x10 /*²âÊÔÓû§Õª¹Ò»ú״̬*/
+
+#define TI_VAB 0x11 /*ÍâÏßA-B¼äµçѹ²âÊÔ*/
+#define TI_VAG 0x12 /*ÍâÏßA-GND ¼äµçѹ²âÊÔ*/
+#define TI_VBG 0x13 /*ÍâÏßB-GND¼äµçѹ²âÊÔ*/
+#define TI_RAB 0x14 /*ÍâÏßA-B ¼ä¾øÔµµç×è²âÊÔ*/
+#define TI_RAG 0x15 /*ÍâÏßA-GND¼ä¾øÔµµç×è²âÊÔ*/
+#define TI_RBG 0x16 /*ÍâÏßB-GND ¼ä¾øÔµµç×è²âÊÔ*/
+#define TI_CAB 0x17 /*ÍâÏßA-B¼äµçÈݲâÊÔ*/
+#define TI_CAG 0x18 /*ÍâÏßA-GND¼äµçÈݲâÊÔ*/
+#define TI_CBG 0x19 /*ÍâÏßB-GND¼äµçÈݲâÊÔ*/
+#define TI_InverseBatt 0x1a /* ÎĵµÖÐÊDzâÄÚÏ߻طµçÁ÷²âÊÔ*/
+#define TI_InLoopCurrent 0x1B /* ÄÚÏ߻طµçÁ÷²âÊÔ*/
+#define TI_ISDNLoop 0x1C /* isdn loop Test*/
+#define TI_Outside12 0x1D /* ÍâÏß12Ïî²âÊÔ*/
+#define TI_REN 0x1e /* ÁåÁ÷Êý */
+#define TI_LineConnect 0x1f /* Ïß·Á¬½ÓÐÔ²âÊÔ*/
+
+#define TI_LineRes_reverse 0x20 /*·´¼«ÐÔ¾øÔµµç×è²âÊÔ*/
+
+#define TI_SimCaller 0x27 /*Ä£ÄâÖ÷½Ð*/
+#define TI_SimCallee 0x28 /*Ä£Äâ±»½Ð*/
+#define TI_Dual 0x29 /*41:Ë«Ïò·ÓÉ */
+
+#define TI_LeakCurrent 0x30 /*48:©µçµçÁ÷*/
+#define TI_OutsideNoise 0x31 /*49:ÍâÏßÔëÉù */
+#define TI_SimulateDial 0x33 /*51:Ä£ÄⲦÈë*/
+#define TI_Monitor 0x34 /*52:¸ß×è¼àÌý*/
+#define TI_TalkWithUser 0x35 /*53:ÓëÓû§Í¨»°*/
+#define TI_PolarityReversal 0x36 /*54:·´¼«ÐÔ²âÊÔ*/
+#define ROH_TEST 0x37 /*55 :Õª»ú²âÊÔ*/
+
+#define TI_CheckBoard 0xFF /*°åλ¼ì²éÃüÁî*/
+#define TI_SelfTest 0xFE /*×Ô²â*/
+
+/************************ÃüÁî×Ö***********************************/
+#define CMD_WRITE_START 0x01
+#define CMD_READ_STATE 0x02
+#define CMD_WRITE_ABORT 0x03
+#define CMD_READ_RESULT 0x04
+
+/*******************************²âÊÔ״̬**************************/
+#define NOT_TEST 0x00
+#define TESTING 0x01
+#define TEST_SUCC 0x02
+#define TEST_ERROR 0x03
+#define TEST_STARTING 0x04
+#define TEST_STOPING 0x05
+
+
+#define MAX_TIMOUT 12000 /* 2 min */
+
+/************************´íÎó±àºÅ*********************************/
+typedef enum{
+ NO_ERROR = 0,
+ ERR_UNKONW ,
+ TESTITEM_TIMEOVER, /* Time out!*/
+ COMMAND_ERR_NOTLINE, /* No available testing line! */
+ COMMAND_ERR_NOTEST_UNIT, /* No available testing data buffer! */
+ ASSIGN_DATA_ERR, /* Data assignment failed!*/
+ TESTITEM_FAIL, /* Testing failed!*/
+ COMMAND_ERR_USER_USED, /* The user card is in testing process!*/
+ UNFIND_TEST_RECORD, /* No available testing card!*/
+ DATABASE_FAIL, /* Database accessing failed!*/
+ ALC_OFFLINE, /* The user card is offline!*/
+ USER_BUSY, /* User is busy!*/
+ BOARD_ABNORMAL, /* Board is abnormal!*/
+ TEST_USER_BUSY, /* User is busy!*/
+ USER_IS_ONHOOK, /* User is onhook state!*/
+ USER_IS_OFFHOOK, /* User is offhook state!*/
+ ARGS_ERROR , /* Testing error, please check the user line state!*/
+ USER_LINE_RES, /* User line is resistive loop, maybe short circuit!*/
+ REN_GREATER, /* REN is greater than 5000 milli,check the user line.*/
+ REN_LOWER, /* REN is lower than 175 milli,check the user line.*/
+ RES_LOWER, /* The DC resistance measured from the rtg/rrg/rrt lead to ground is less than 150k.*/
+ RESULT_OC, /* The result is over the ouside the the specified criteria.Check the user line.*/
+ NO_PHONE, /* No signal between tip and ring, maybe there is no phone!*/
+ NOT_SURPPORT /* The test item is not surpported !*/
+}ErrMsg_t;
+
+typedef struct{
+ unsigned char port; /* ¶Ë¿Ú±àºÅ */
+ unsigned char port_type; /* ¶Ë¿ÚÀàÐÍ */
+ unsigned char item; /* ²âÊÔÏî±àºÅ£¬¼ûÉÏÃæ²âÊÔÏÒå */
+ unsigned char obligate; /* ÊÇ·ñÇ¿ÖƲâÊÔ 0£º²»Ç¿ÖÆ£»1£ºÇ¿ÖÆ*/
+ long num; /* ²âÊÔÐòºÅ */
+ unsigned char omci_item; /* ÓÃÓÚ¶àÏî²âÊÔÖмǼomci²âÊÔÏî±àºÅ */
+ unsigned char cmd; /* ²âÊÔÆô¶¯ºÍ¶Á״̬:1,write;2,read;3,abort. */
+ unsigned char flg; /* ²âÊÔÍê³É±ê¼Ç:³É¹¦»òÕßʧ°Ü */
+}WriteCmd_t;
+
+typedef struct{
+ unsigned char port; /* ¶Ë¿Ú±àºÅ */
+ unsigned char port_type; /* ¶Ë¿ÚÀàÐÍ */
+ unsigned char item; /* ²âÊÔÏî±àºÅ */
+ unsigned char obligate; /* ÊÇ·ñÇ¿ÖƲâÊÔ */
+ long num; /* ²âÊÔÐòºÅ */
+ unsigned char omci_item; /* ÓÃÓÚ¶àÏî²âÊÔÖмǼomci²âÊÔÏî±àºÅ */
+ unsigned char flg; /* ²âÊÔÍê³É±ê¼Ç:³É¹¦»òÕßʧ°Ü */
+ unsigned char user_flg; /* Óû§ÊÇ·ñÔÚÏß */
+ ErrMsg_t err_num; /* ²âÊÔʧ°ÜºóµÄ´íÎó±àºÅ,²âÊԳɹ¦ÔòÎÞÒâÒå */
+
+ /* TI_LineVolt */
+ signed long vac_tr; /* ½»Á÷µçѹ£ºTip-Ring */
+ signed long vac_tg; /* ½»Á÷µçѹ£ºTip-Gnd */
+ signed long vac_rg; /* ½»Á÷µçѹ£ºRing-Gnd */
+ signed long vdc_tr; /* Ö±Á÷µçѹ£ºTip-Ring */
+ signed long vdc_tg; /* Ö±Á÷µçѹ£ºTip-Gnd */
+ signed long vdc_rg; /* Ö±Á÷µçѹ£ºRing-Gnd */
+
+ /* TI_LineRes */
+ signed long res_tr; /* µç×裺Tip-Ring */
+ signed long res_tg; /* µç×裺Tip-Gnd */
+ signed long res_rg; /* µç×裺Ring-Gnd */
+
+ /* TI_LineCap */
+ signed long cap_tr; /* µçÈÝ£ºTip-Ring */
+ signed long cap_tg; /* µçÈÝ£ºTip-Gnd */
+ signed long cap_rg; /* µçÈÝ£ºRing-Gnd */
+
+ /* TI_RingVolt */
+ signed long ring_vol; /* ÕñÁåµçѹ */
+ signed long Hz; /* ÕñÁåƵÂÊ */
+
+ /* TI_REN */
+ signed long ren; /* ÁåÁ÷Êý */
+
+ /* TI_InLoopCurrent */
+ signed long loop_curent; /* »Ø·µçÁ÷ */
+ signed long loop_res; /* »Ø·µç×è */
+
+ /* TI_BatteryVolt */
+ signed long battary; /* À¡µçµçѹ */
+}TestResult_t;
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/Kconfig b/ap/os/linux/linux-3.4.x/drivers/slic/Kconfig
new file mode 100644
index 0000000..49518ef
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/Kconfig
@@ -0,0 +1,16 @@
+#
+# Slic device configuration
+#
+
+config SI3217X
+ tristate "SI3217X Support"
+ default n
+ depends on MODULES
+ help
+ This option provides silicon lab SI3217X driver.
+config SI3218X
+ tristate "SI3218X Support"
+ default n
+ depends on MODULES
+ help
+ This option provides silicon lab SI3218X driver.
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/Makefile b/ap/os/linux/linux-3.4.x/drivers/slic/Makefile
new file mode 100644
index 0000000..280e7e7
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/Makefile
@@ -0,0 +1,95 @@
+ifeq ($(CONFIG_SI3217X),y)
+SI3217X_SUPPORT=y
+SILAB_SUPPORT_LCQC=y
+endif
+ifeq ($(CONFIG_SI3217X),m)
+SI3217X_SUPPORT=y
+SILAB_SUPPORT_LCQC=y
+endif
+
+ifeq ($(CONFIG_SI3218X),y)
+SI3218X_SUPPORT=y
+SILAB_SUPPORT_LCQC=y
+SI3218X_SPI_SELECT_STDSPI=y
+endif
+ifeq ($(CONFIG_SI3218X),m)
+SI3218X_SUPPORT=y
+SILAB_SUPPORT_LCQC=y
+SI3218X_SPI_SELECT_STDSPI=y
+endif
+
+obj-$(CONFIG_SI3217X) +=slic.o
+obj-$(CONFIG_SI3218X) +=slic.o
+
+EXTRA_CFLAGS += -Wno-format-extra-args -Wno-unused-parameter -Wno-unused-variable -Wno-unused-function
+EXTRA_CFLAGS += -Wno-format -Wno-return-type -Wno-strict-prototypes -Wno-unused -Wno-implicit -D__KERNEL__ -DLINUX_KERNEL
+
+DRV_OBJS = $(MOD_NMAE).o
+
+ccflags-y+= -Idrivers/slic/si_lib/include
+ccflags-y+= -Idrivers/slic/
+ccflags-y+= -Idrivers/slic/silicon_mlt/include
+#ccflags-y += -I$(TOPDIR_AP)/../pub/project/zx297520v3/include/drv
+#ccflags-y += -I$(TOPDIR_AP)/../pub/project/zx297520v3/include/nv
+ccflags-y += -I$(TOPDIR_AP)/../cp/ps/driver/inc/misc
+ccflags-y += -I$(TOPDIR_AP)/os/linux/linux-3.4.x/sound/soc/sanechips
+ccflags-y += -I$(TOPDIR_AP)/os/linux/linux-3.4.x/include/linux
+
+SRC = si_lib/source
+MLT_SRC = silicon_mlt/source
+
+slic-objs := $(SRC)/spi_adt.o \
+ $(SRC)/proslic.o \
+ $(SRC)/si_voice.o \
+ $(SRC)/si_voice_version.o \
+ $(SRC)/timer_adt.o \
+ $(MLT_SRC)/proslic_mlt.o \
+ $(MLT_SRC)/proslic_mlt_dcfeed.o \
+ $(MLT_SRC)/proslic_mlt_diag_madc.o \
+ $(MLT_SRC)/proslic_mlt_math.o \
+ $(MLT_SRC)/proslic_mlt_version.o \
+ usr_line.o \
+ si_adt.o
+
+ifeq ($(SI3217X_SUPPORT),y)
+EXTRA_CFLAGS += -DSI3217X_SUPPORT
+EXTRA_CFLAGS += -DSILAB_SUPPORT_LCQC
+
+slic-objs += $(SRC)/si3217x_MULTI_BOM_constants.o \
+ $(SRC)/si3217x_patch_B_BB_2012DEC10.o \
+ $(SRC)/si3217x_patch_B_FB_2012DEC10.o \
+ $(SRC)/si3217x_patch_C_FB_2014JUN18.o \
+ $(SRC)/si3217x_revb_intf.o \
+ $(SRC)/si3217x_revc_intf.o \
+ $(SRC)/si3217x_intf.o \
+ $(MLT_SRC)/si3217x_mlt.o \
+ $(SRC)/vdaa.o \
+ $(SRC)/vdaa_constants.o
+
+endif
+
+ifeq ($(SI3218X_SUPPORT),y)
+EXTRA_CFLAGS += -DSI3218X_SUPPORT
+EXTRA_CFLAGS += -DSILAB_SUPPORT_LCQC
+
+slic-objs += $(SRC)/si3218x_MULTI_BOM_constants.o \
+ $(SRC)/si3218x_patch_A_2016DEC06.o \
+ $(SRC)/si3218x_intf.o \
+ $(MLT_SRC)/si3218x_mlt.o \
+ $(SRC)/vdaa.o \
+ $(SRC)/vdaa_constants.o
+
+endif
+ifeq ($(SI3218X_SPI_SELECT_STDSPI),y)
+EXTRA_CFLAGS += -DUSE_STD_SPI_SLIC
+else
+EXTRA_CFLAGS += -DUSE_GPIO_SPI_SLIC
+
+endif
+
+ifeq ($(CHIP_TYPE),zx297520v3)
+EXTRA_CFLAGS += -DUSE_SLIC_ON_7520V3
+else
+EXTRA_CFLAGS += -DUSE_SLIC_ON_7520V2
+endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_adt.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_adt.c
new file mode 100644
index 0000000..0fa016d
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_adt.c
@@ -0,0 +1,2373 @@
+/***********************************************************************
+* Copyright (C) 2001, ZTE Corporation.
+*
+* File Name: si_adt.c
+* File Mark:
+* Description: siliconlab lib adapter.
+* History :
+* Date : 2010-04-07
+* Version :1.0
+* Author : duanzhw 182073
+* Modification:
+
+**********************************************************************/
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/timer.h>
+#include <linux/fs.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/init.h>
+#include <linux/fcntl.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/signal.h>
+//#include <linux/smp_lock.h>
+#include <asm/uaccess.h>
+#include <linux/delay.h>
+
+#include "si_voice_datatypes.h"
+#include "proslic_mlt.h"
+#include "proslic_mlt_math.h"
+
+#include "timer_adt.h"
+#ifdef SI3217X
+#include "si3217x.h"
+#include "si3217x_constants.h"
+#endif
+#ifdef SI3218X
+#include "si3218x.h"
+#include "si3218x_constants.h"
+#endif
+#include "112.h"
+#include "usr_line.h"
+
+//#include "generic-ability.h"
+
+/**************************port map****************************/
+static USL_PORT_MAP port_map[MAX_PORT_NUM] = {
+ /*flg, cs , chan, port , type, tx, rx*/
+ {0, 0, 0, 0, 0, 0, 0}
+ // {0, 0, 0, 0, 0, 1, 1},
+ // {0, 0, 0, 0, 0, 2, 2},
+ // {0, 0, 0, 0, 0, 3, 3},
+};
+
+/**************************************************************/
+ctrl_S spiGciObj[MAX_PORT_NUM]; /* User¡¯s control interface object, can be consider as the port number */
+systemTimer_S timerObj; /* User¡¯s timer object */
+
+controlInterfaceType *ProHWIntf[MAX_PORT_NUM];
+/* Define array of ProSLIC device objects */
+ProslicDeviceType *ProSLICDevices[MAX_PORT_NUM];
+/* Define array of ProSLIC channel object pointers */
+proslicChanType_ptr arrayOfProslicChans[MAX_PORT_NUM];
+
+
+/* 112 test */
+//ProSLICMLTType SLICMLT;
+//ProSLIC_mlt_foreign_voltages_state vState;
+//ProSLIC_mlt_rmeas_state rMeas;
+//ProSLIC_mlt_capacitance_state CapState;
+//ProSLIC_mlt_ren_state RenState;
+long RingVol[MAX_RING_CNT]= {0}, RingCnt = 0;
+
+//TestResult_t ResBuf;
+
+/* board cfg */
+static SILAB_CFG_CHIP_t BoardCfg[MAX_PORT_NUM] = {{0}};
+
+/* As for one board, using one signal to avoid the conflict */
+static const u8 pcmcfg[] = {0x4,0x1,0x3};
+static Port_t ports[MAX_PORT_NUM];
+
+//extern u8 init_flg;
+extern slic_state current_state;
+extern USL_PORT *pstUslPort;
+extern int dtmf_mute;
+extern u8 slic_offhook;
+
+static s8 si_signal_ctrl(Port_t *pPort, const void *signal_attr,const u8 flag);
+static s8 si_timeslot_set(Port_t *pPort, const u8 TxTs, const u8 RxTs);
+static s8 si_timeslot_release(Port_t *pPort);
+static s8 si_chip_reset(Port_t *pPort, u16 port);
+static s8 si_polarity_reverse(Port_t *pPort, const u16 port);
+static s8 si_parm_set(Port_t *pPort, u8 *parm, const u8 size);
+static s8 si_parm_get(Port_t *pPort, u8 *parm, const u8 size );
+static s8 si_ram_set(Port_t *pPort, u8 *parm, const u8 size);
+static s8 si_ram_get(Port_t *pPort, u8 *parm, const u8 size );
+static s8 si_time_cfg(Port_t *pPort, const USL_CONFIG *Slc_Time_Cfg);
+static s8 si_slctool_time_cfg(Port_t *pPort, SLIC_IOCTL_CMD cmd, u16 wTime);
+static s8 si_time_print(Port_t *pPort);
+static s8 si_dial_set(Port_t *pPort, u8 bDialEn);
+static s8 si_electric_set(Port_t *pPort, const u16 port, const ELECTRIC_CFG_CUSTOMIZED *buf);
+static s8 si_start_test(Port_t *pPort, const WriteCmd_t *Cmd);
+static s8 si_stop_test(Port_t *pPort );
+static s8 si_read_result(Port_t *pPort, TestResult_t *pstResult);
+
+static void ScanSiBoard(USL_PORT *pUslPort);
+
+static void StartSiLineTest(Port_t *pPort, uInt8 TestId);
+static s8 StartLineConnectTest(Port_t *pPort);
+static void SiScanSignals(USL_PORT *usl_port, u8 hook);
+static void SiUpdatePort(Port_t *data, u16 port, u8 event);
+
+static s8 si_update_dcpara(SILAB_CFG_CHIP_t *ptOldCfg, u8 vol_param, u8 cur_param);
+static s8 si_update_ringpara(SILAB_CFG_CHIP_t *ptOldCfg, u8 ringvol_param);
+static int setUserMode (proslicChanType_ptr hProslic, BOOLEAN on);
+
+USL_PORT_MAP *get_port_item(u8 port, u8 type);
+int InitSiliconBoard(void);
+int SiRemoveBoard(void);
+void InitSiliconChip(Port_t *pPort);
+int SiSetSemaphore(void *pHCtrl, int s);
+int ProSLIC_PCMEnable(proslicChanType_ptr hProslic, u8 enable);
+int ProSLIC_GetLinefeedStatus (proslicChanType_ptr hProslic, uInt8 *pLinefeed);
+int VerifyChipID(ctrl_S *hCtrl, u8 chan);
+void MLTClearSettings(ProSLICMLTType *pProSLICMLT);
+void MLTClearResults(ProSLICMLTType *pProSLICMLT);
+void SiMltScan(Port_t *pPort);
+void SiSendResultVol(Port_t *pPort, ProSLICMLTType *pMlt);
+void SiSendResultCap(Port_t *pPort, ProSLICMLTType *pMlt);
+void SiSendResultRes(Port_t *pPort, ProSLICMLTType *pMlt);
+void SiSendResultDCFeedSt(Port_t *pPort);
+void SiSendResultBatteryVol(Port_t *pPort);
+void SiSendResultRingtouser(Port_t *pPort);
+void SiRen(Port_t *pPort, ProSLICMLTType *pMlt);
+void SiSendResultHook(Port_t *pPort);
+long ChangeData(unsigned long n);
+long lldivde(long long x, long y);
+long longfabs(long x);
+
+#define FSK_DEPTH_TRIG 4
+#define DISABLE_FSK_CID
+
+//extern int spi_chipid_get(u8 port, u8 *cs, u8 *ch);
+//extern const s8 *board_type_acquire(u32 *type);
+/***************************************************************************/
+static CODEC_OPS si_ops = {
+ .codec_signal_ctrl = si_signal_ctrl,
+ .codec_timeslot_set = si_timeslot_set,
+ .codec_timeslot_release = si_timeslot_release,
+ .codec_reset = si_chip_reset,
+ .codec_polarity_reverse = si_polarity_reverse,
+ .codec_parm_cfg = si_parm_set,
+ .codec_parm_get = si_parm_get,
+ .codec_ram_cfg = si_ram_set,
+ .codec_ram_get = si_ram_get,
+ .codec_time_cfg = si_time_cfg,
+ .codec_slctool_time_cfg = si_slctool_time_cfg,
+ .codec_time_print = si_time_print,
+ .codec_dial_set = si_dial_set,
+ .codec_electric_cfg = si_electric_set,
+ .codec_start_test = si_start_test,
+ .codec_stop_test = si_stop_test,
+ .codec_read_reslult = si_read_result,
+
+ .codec_scan = ScanSiBoard,
+};
+
+/****************** public func *******************/
+USL_PORT_MAP * get_port_item(u8 port, u8 type)
+{
+ u8 i = 0;
+
+ for( i = 0; i < MAX_PORT_NUM; i++ )
+ {
+ if( port_map[i].flg == 0 ) continue;
+
+ if( port == port_map[i].port && type == port_map[i].type )
+ {
+
+ return &port_map[i];
+ }
+ }
+
+ return NULL;
+}
+
+void make_port_map(void)
+{
+ u8 cs = 0, chan = 0;
+ u8 i = 0;
+ int ret = 0;
+ for( i = 0; i < MAX_PORT_NUM; i++ )
+ {
+ //ret = spi_chipid_get(i, &cs, &chan);
+ if( 0 == ret )
+ {
+ #ifdef DEBUG_SLIC_ON
+ USLPUT0("Find a port:%d with chan %d cs %d\n", i, chan, cs);
+ #endif
+ port_map[i].flg = 1;
+ port_map[i].cs = cs;
+ port_map[i].chan = chan;
+ port_map[i].port = i;
+ port_map[i].type = SLIC_PORT_TYPE;
+ port_map[i].tx = i;
+ port_map[i].rx = i;
+ }
+ else
+ {
+ #ifdef DEBUG_SLIC_ON
+ USLPUT0("cann't Find a port:%d\n", i);
+ #endif
+ port_map[i].flg = 0;
+ }
+ }
+}
+
+void SlicCfgParaBasedBoardType(void)
+{
+ //u32 dwBoardType = 0;
+ u32 dwPort = 0;
+
+ //board_type_acquire(&dwBoardType);
+ for (dwPort=0; dwPort<MAX_PORT_NUM; dwPort++)
+ {
+#ifdef SI3217X
+ /*switch(dwBoardType)
+ {
+
+ default:
+ USLPUT0("Board default NO PTC\n");*/
+ BoardCfg[dwPort].ePTC = NOPTC;
+ // break;
+ //}
+//#if defined (SILAB_SUPPORT_BUCKBOOST)
+// BoardCfg[dwPort].generel_cfg = 0;
+//#elif defined (SILAB_SUPPORT_LCQC)
+// BoardCfg[dwPort].generel_cfg = 3;
+//#else
+ BoardCfg[dwPort].generel_cfg = 2;
+//#endif
+ BoardCfg[dwPort].ring = RING_F20_45VRMS_0VDC_LPR_SHORTTIME;//RING_F20_45VRMS_0VDC_LPR;
+ BoardCfg[dwPort].dc = DCFEED_48V_20MA;
+ BoardCfg[dwPort].tone = TONEGEN_FCC_DIAL;
+ BoardCfg[dwPort].Impe = ZSYN_600_0_0_30_0;
+ BoardCfg[dwPort].meter = DEFAULT_PULSE_METERING;
+ BoardCfg[dwPort].bLineOpen100msEn = 0;
+ BoardCfg[dwPort].bDisablePowerSave = 0;
+ BoardCfg[dwPort].a_u_law = PCM_16LIN;
+ BoardCfg[dwPort].cid = ITU_FSK;
+ BoardCfg[dwPort].linestaus = LF_FWD_ACTIVE;
+ BoardCfg[dwPort].wide = 2;
+ BoardCfg[dwPort].offset = 1;
+ BoardCfg[dwPort].rxgain = 0;
+ BoardCfg[dwPort].txgain = 0;
+#endif
+#ifdef SI3218X
+ BoardCfg[dwPort].ePTC = NOPTC;
+ BoardCfg[dwPort].generel_cfg = 0;
+ BoardCfg[dwPort].ring = RING_F20_45VRMS_0VDC_LPR;//RING_F20_45VRMS_0VDC_LPR;RING_F20_45VRMS_0VDC_LPR_SHORTTIME
+ BoardCfg[dwPort].dc = DCFEED_48V_20MA;
+ BoardCfg[dwPort].tone = TONEGEN_FCC_DIAL;
+ BoardCfg[dwPort].Impe = ZSYN_600_0_0_30_0;
+ BoardCfg[dwPort].meter = DEFAULT_PULSE_METERING;
+ BoardCfg[dwPort].bLineOpen100msEn = 0;
+ BoardCfg[dwPort].bDisablePowerSave = 0;
+ BoardCfg[dwPort].a_u_law = PCM_16LIN;
+ BoardCfg[dwPort].cid = ITU_FSK;
+ BoardCfg[dwPort].linestaus = LF_FWD_ACTIVE;
+ BoardCfg[dwPort].wide = 2;
+ BoardCfg[dwPort].offset = 1;
+ BoardCfg[dwPort].rxgain = 0;
+ BoardCfg[dwPort].txgain = 0;
+#endif
+ }
+
+ return;
+}
+
+int InitSlicChip(void)
+{
+ int ret = 0;
+ make_port_map();
+ ret = InitSiliconBoard();
+
+ return ret;
+}
+
+void DeinitSlicChip(void)
+{
+ SiRemoveBoard();
+
+ return;
+}
+
+void SendErrorTest(Port_t *pPort, int err)
+{
+ USLPUT2(" Test Error %d.\n", err );
+
+ pPort->stLineTestPara.pstResult->flg = TEST_ERROR;
+ pPort->stLineTestPara.pstResult->err_num = err; /*´íÎóºÅ*/
+ usrline_report(pPort->stLineTestPara.pstResult->port, EV_FXS_TEST_DONE, 0, 0);
+
+ return;
+}
+
+void slic_inf_precfg(SLCINF_CFG *ptCfg)
+{
+ if (NULL == ptCfg)
+ {
+ USLPUT0("%s ptCfg NULL \n", __FUNCTION__);
+ return;
+ }
+
+ if (ptCfg->bPort >= MAX_PORT_NUM)
+ {
+ USLPUT0("%s port:%d is bigger than MAX_PORT_NUM:%d\n", __FUNCTION__, ptCfg->bPort, MAX_PORT_NUM);
+ return;
+ }
+
+ si_update_dcpara(&BoardCfg[ptCfg->bPort], ptCfg->bCusDcVol, ptCfg->bCusDcLoopCurr);
+ si_update_ringpara(&BoardCfg[ptCfg->bPort], ptCfg->bCusRingVpk);
+
+ BoardCfg[ptCfg->bPort].bLineOpen100msEn = ptCfg->bLineOpen100msEn;
+ BoardCfg[ptCfg->bPort].bDisablePowerSave = ptCfg->bDisablePowerSave;
+
+ switch(ptCfg->dwImpe)
+ {
+ #if 0
+ case 600:
+ BoardCfg[ptCfg->bPort].Impe = ZSYN_600+BoardCfg[ptCfg->bPort].ePTC;
+ break;
+ case 680:
+ BoardCfg[ptCfg->bPort].Impe = ZSYN_200_680+BoardCfg[ptCfg->bPort].ePTC;
+ break;
+ #endif
+ default:
+ BoardCfg[ptCfg->bPort].Impe = ZSYN_600_0_0_30_0;
+ break;
+ }
+
+ BoardCfg[ptCfg->bPort].rxgain = ptCfg->i32Rxgain;
+ BoardCfg[ptCfg->bPort].txgain = ptCfg->i32Txgain;
+
+ USLPUT3("port:%d Dc:%d U:%d A:%d Ring:%d VPK:%d 100msEn:%d, DisPowerSave:%d impe:%d ePTC:%d dwImpe:%d rxgain(D-A):%d, txgain(A-D):%d\n",
+ ptCfg->bPort,
+ BoardCfg[ptCfg->bPort].dc, ptCfg->bCusDcVol, ptCfg->bCusDcLoopCurr,
+ BoardCfg[ptCfg->bPort].ring, ptCfg->bCusRingVpk,
+ BoardCfg[ptCfg->bPort].bLineOpen100msEn, BoardCfg[ptCfg->bPort].bDisablePowerSave,
+ BoardCfg[ptCfg->bPort].Impe, BoardCfg[ptCfg->bPort].ePTC, ptCfg->dwImpe,
+ BoardCfg[ptCfg->bPort].rxgain, BoardCfg[ptCfg->bPort].txgain);
+
+ return;
+}
+/****************** end *******************/
+
+/****************** func for si_ops ****************/
+static void si_tone_init(Port_t *pPort, SIGNAL_DATA *signal_attr)
+{
+ u8 bToneIndex = signal_attr->tone_type;
+ u8 bOscillator2En = 0;
+
+ /* modified by zhanghuan for new SIGNAL_DATA struct */
+#if 0
+ if (0 != signal_attr->cadence[0].freq2)
+ {
+ bOscillator2En = 1;
+ }
+
+ switch(signal_attr->cadence[0].freq1)
+ {
+ default:
+ bToneIndex = TONEGEN_450_N18DB_350_N18DB;
+ break;
+ }
+#endif
+ /* modified by zhanghuan for new SIGNAL_DATA struct */
+
+ /*use preset tone type */
+ printk("ProSLIC_ToneGenSetup %d \n", bToneIndex);
+ ProSLIC_ToneGenSetup(pPort->ProObj, bToneIndex);
+
+ return;
+}
+
+uInt8 checkSum(char *str)
+{
+ int i=0;
+ uInt8 sum = 0;
+
+ while(str[i] != 0)
+ {
+ sum += str[i++];
+ }
+
+ return -sum;
+}
+
+
+/*****************************************************************************************************/
+/* Wait for FSK buffer to be available... */
+void waitForCIDDone(SiVoiceChanType_ptr pChan)
+{
+ int tmp = 0;
+
+ do
+ {
+ ProSLIC_CheckCIDBuffer(pChan, &tmp);
+ }
+ while(tmp == 0);
+
+}
+
+void sendFSKData(proslicChanType_ptr hProslic, char *stream, int preamble_enable)
+{
+ uInt8 csum;
+ int buff_timeout;
+ int cid_remainder;
+ int baud_rate = 1200;
+ int bits = 10; /* 1 start + 8 data + 1 stop */
+ int i;
+ const uInt8 cid_preamble[] = {'U','U','U','U','U','U','U','U'};
+
+ buff_timeout = ((8 - FSK_DEPTH_TRIG) * (10000*bits)/baud_rate)/10;
+ /*
+ ** SEND CID HERE
+ */
+
+ /* Clear FSK buffer */
+ if((stream[1]+3)%FSK_DEPTH_TRIG)
+ {
+ cid_remainder = 1;
+ }
+ else
+ {
+ cid_remainder = 0;
+ }
+
+ ProSLIC_EnableCID(hProslic);
+ msleep(133); /* > 130ms of mark bits */
+
+ /* Enable FSKBUF interrupt so we can check it later. */
+ SiVoice_WriteReg(hProslic,PROSLIC_REG_IRQEN1,0x40);
+ (void)SiVoice_ReadReg(hProslic,
+ PROSLIC_REG_IRQ1); /* Clear IRQ1 */
+ printk("howard fsk cid send preamble\n");
+ if(preamble_enable)
+ {
+ /* Send preamble */
+ for(i=0; i<30; i+=FSK_DEPTH_TRIG)
+ {
+ if(i >= 8) /* The FIFO depth is 8 bytes, start waiting for it to empty */
+ {
+ waitForCIDDone(hProslic);
+ }
+ ProSLIC_SendCID(hProslic,cid_preamble,FSK_DEPTH_TRIG);
+ }
+ if (30%FSK_DEPTH_TRIG)
+ {
+ waitForCIDDone(hProslic);
+ }
+ ProSLIC_SendCID(hProslic,cid_preamble,30%FSK_DEPTH_TRIG);
+ waitForCIDDone(hProslic);
+
+ /* Delay > 130ms for idle mark bits */
+ msleep(133);
+ }
+
+ /* Send Message */
+ printk("howard fsk cid send message\n");
+ csum = checkSum(stream);
+ stream[stream[1]+2] = csum;
+
+ for(i=0; i<(stream[1]+3); i+=FSK_DEPTH_TRIG)
+ {
+ if(i>=8)
+ {
+ waitForCIDDone(hProslic);
+ }
+
+ ProSLIC_SendCID(hProslic,&(stream[i]),FSK_DEPTH_TRIG);
+ }
+
+ if(cid_remainder)
+ {
+ waitForCIDDone(hProslic);
+
+ ProSLIC_SendCID(hProslic,
+ &(stream[((stream[1]+3)/FSK_DEPTH_TRIG)*FSK_DEPTH_TRIG]),
+ (stream[1]+3)%FSK_DEPTH_TRIG);
+ }
+
+ waitForCIDDone(hProslic);
+
+ /* Make sure the last byte is shifted out prior to disabling CID */
+ msleep(buff_timeout);
+ ProSLIC_DisableCID(hProslic);
+
+}
+
+
+/*****************************************************************************************************/
+/*
+** Sequential (blocking) example of CID transmission
+*/
+void sendCIDStream(proslicChanType_ptr hProslic)
+{
+
+ char cid_msg[] =
+ "\x80" /* MDMF Type */
+ "\x27" /* Message Length */
+ "\x01" /* Date/Time Param */
+ "\x08" /* 8-byte Date/Time */
+ "07040815" /* July 4th 08:15 am */
+ "\x02" /* Calling Number Param */
+ "\x0A" /* 10-byte Calling Number */
+ "5124168500" /* Phone Number */
+ "\x07" /* Calling Name Param */
+ "\x0F" /* 15-byte Calling Name */
+ "Nice" /* Calling Name */
+ "\x20" /* Calling Name (whitespace) */
+ "ProSLIC!!!" /* Calling Name */
+ "\x00" /* Placeholder for Checksum */
+ "\x00" /* Markout */
+ ;
+ uInt8 reg_tmp;
+
+ ProSLIC_FSKSetup(hProslic,0);
+
+ ProSLIC_RingSetup(hProslic,1);
+ reg_tmp =SiVoice_ReadReg(hProslic,PROSLIC_REG_RINGCON);
+ SiVoice_WriteReg(hProslic,PROSLIC_REG_RINGCON,reg_tmp&0xF0);
+
+ /* Ensure OFFHOOK Active */
+ //ProSLIC_SetLinefeedStatus(hProslic,LF_FWD_ACTIVE);
+ //msleep(500);
+
+ /* 1st Ring Burst */
+ ProSLIC_SetLinefeedStatus(hProslic,LF_RINGING);
+ msleep(2500);
+
+ /* OHT - the alternative is to have the configuration for ringing set OHT mode automatically... */
+ //ProSLIC_SetLinefeedStatus(hProslic,LF_FWD_OHT); /* no need if RINGCON is set to 0x58*/
+ //msleep(500); /* Delay 250 to 3600ms */
+ sendFSKData(hProslic, cid_msg, 1);
+}
+
+
+static s8 si_signal_ctrl(Port_t *pPort, const void *signal_attr,const u8 flag)
+{
+ static unsigned long int jiffies_save;
+ int ret = -1;
+
+ if(NULL == pPort)
+ {
+ USLPUT0("si_signal_ctrl pPort NULL \n");
+ return -1;
+ }
+
+ switch(flag)
+ {
+ /* play ring */
+ case RING_SIGNAL_INIT:
+ jiffies_save = jiffies;
+ USLPUT3("RING_SIGNAL_INIT\n");
+ break;
+ case RING_SIGNAL_ON:
+ //printk("start play ring ProSLIC_Init_MultiBOM\n");
+ //ProSLIC_Init_MultiBOM(&(pPort->ProObj),1,3);
+ /* ring and cid is moved to ioctl */
+ #if 0
+ printk("start play ring\n");
+ #ifdef DISABLE_FSK_CID
+ pPort->ProObj->channelType = PROSLIC;
+ ret = ProSLIC_SetLinefeedStatus( pPort->ProObj, LF_RINGING);
+ USLPUT3("RING_SIGNAL_ON %lu, ret %d\n", jiffies - jiffies_save, ret);
+ jiffies_save = jiffies;
+ #else
+ /* add by zhanghuan for FSK CID */
+ sendCIDStream(pPort->ProObj);
+ #endif
+ current_state = RINGING;
+ #endif
+ break;
+ case RING_SIGNAL_OFF:
+ ProSLIC_SetLinefeedStatus( pPort->ProObj, LF_FWD_OHT);
+ USLPUT3("RING_SIGNAL_OFF %lu\n", jiffies - jiffies_save);
+ jiffies_save = jiffies;
+ current_state = NONE;
+ break;
+ case RING_SIGNAL_OFF_REVERSED:
+ ProSLIC_SetLinefeedStatus( pPort->ProObj, LF_REV_OHT);
+ USLPUT3("RING_SIGNAL_OFF_REVERSED %lu\n", jiffies - jiffies_save);
+ jiffies_save = jiffies;
+ break;
+ case RING_SIGNAL_CLEAN_OFF:
+ case RING_SIGNAL_CLEAN_ON:
+ ProSLIC_SetLinefeedStatus( pPort->ProObj, LF_FWD_ACTIVE);
+ USLPUT3("RING_SIGNAL_CLEAN_ON %lu\n", jiffies - jiffies_save);
+ jiffies_save = jiffies;
+ current_state = NONE;
+ break;
+ /* play tone */
+ case TONE_SIGNAL_INIT:
+ ProSLIC_ToneGenStop(pPort->ProObj);
+ current_state = NONE;
+ si_tone_init(pPort, (SIGNAL_DATA *)signal_attr);
+ break;
+ case TONE_SIGNAL_ON:
+ printk("start play tone\n");
+ if(TONE_DIAL != ((SIGNAL_DATA *)signal_attr)->tone_type)
+ {
+ ProSLIC_ToneGenStart(pPort->ProObj, 1); // Only DIAL TONE play continusely
+ }
+ else
+ {
+ ProSLIC_ToneGenStart(pPort->ProObj, 0);
+ }
+ current_state = PLAYING_TONE;
+ break;
+ case TONE_SIGNAL_OFF:
+ ProSLIC_ToneGenStop(pPort->ProObj);
+ current_state = NONE;
+ break;
+ case TONE_SIGNAL_CLEAN:
+ ProSLIC_ToneGenStop(pPort->ProObj);
+ current_state = NONE;
+ break;
+
+ default:
+ break;
+ }
+ return 0;
+}
+
+static s8 si_timeslot_set(Port_t *pPort, const u8 TxTs, const u8 RxTs)
+{
+ u16 tx = 0;
+ u16 rx = 0;
+
+ if( NULL == pPort )
+ {
+ USLPUT0("leg_timeslot_set pPort NULL \n");
+ return -1;
+ }
+
+ tx = TxTs * 8 * pPort->pPreCfg->wide + pPort->pPreCfg->offset;
+ rx = RxTs * 8 * pPort->pPreCfg->wide + pPort->pPreCfg->offset;
+
+ USLPUT2("si_timeslot_set tx %d rx %d. \n",tx,rx);
+ ProSLIC_PCMTimeSlotSetup( pPort->ProObj, rx , tx );
+ ProSLIC_PCMEnable( pPort->ProObj, 1);
+ return 0;
+}
+
+static s8 si_timeslot_release(Port_t *pPort)
+{
+ if( NULL == pPort )
+ {
+ USLPUT0("si_timeslot_release line NULL \n");
+ return -1;
+ }
+
+ ProSLIC_PCMEnable( pPort->ProObj, 0);
+ ProSLIC_PCMTimeSlotSetup( pPort->ProObj, MAX_PORT_NUM * 8 , MAX_PORT_NUM * 8 );
+ return 0;
+}
+
+static s8 si_chip_reset(Port_t *pPort, u16 port)
+{
+ if( NULL == pPort )
+ {
+ USLPUT0("si_chip_reset pPort NULL \n");
+ return -1;
+ }
+
+ if( HOOKOFF == pPort->hook_state )
+ {
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_FWD_ACTIVE);
+ USLPUT3("ProSLIC_SetLinefeedStatus %d LF_FWD_ACTIVE\n",port);
+ usrline_report(port, EV_FXS_HOOKON, 0 , 0);
+ }
+ pPort->hook_state = HOOKON;
+ pPort->pulse_dig = 0;
+ pPort->stLineTestPara.si_item = 0xff;
+ pPort->stLineTestPara.test_flg = NOT_TEST;
+ pPort->stLineTestPara.cnt = 0;
+ pPort->low_len = 0;
+ pPort->high_len = 0;
+ pPort->bDialEn = EV_DIAL_STOP;
+
+ return 0;
+}
+
+static s8 si_polarity_reverse(Port_t *pPort, const u16 port)
+{
+ u8 state = 0;
+ u8 new_state = 0;
+
+ if( NULL == pPort )
+ {
+ USLPUT0("si_polarity_reverse pPort NULL \n");
+ return -1;
+ }
+
+ ProSLIC_GetLinefeedStatus(pPort->ProObj, &state);
+ switch(state)
+ {
+ case LF_REV_ACTIVE:
+ case LF_FWD_ACTIVE:
+ case LF_FWD_OHT:
+ case LF_REV_OHT:
+ new_state = state ^ 0x4 ;
+ break;
+ default:
+ USLPUT0("reverse error at state% d\n",state);
+ return -1;
+ }
+
+
+ if((1 == pPort->pPreCfg->bLineOpen100msEn)&& (LF_REV_ACTIVE == state))
+ {
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_OPEN);
+ msleep(100);
+ USLPUT2("SLIC set line feed status from OPEN to %d\n",new_state);
+ }
+
+ ProSLIC_SetLinefeedStatus( pPort->ProObj, new_state );
+
+ return 0;
+}
+
+static s8 si_parm_set( Port_t *pPort, u8 *parm, const u8 size)
+{
+ if( NULL == pPort )
+ {
+ USLPUT0("si_parm_set pPort NULL \n");
+ return -1;
+ }
+
+ ctrl_WriteRegisterWrapper( pPort->ProObj->deviceId->ctrlInterface->hCtrl, pPort->ProObj->channel,parm[0],parm[1]);
+
+ return 0;
+}
+
+static s8 si_parm_get( Port_t *pPort, u8 *parm, const u8 size )
+{
+ u8 addr = 0;
+
+ if( NULL == pPort )
+ {
+ USLPUT0("si_parm_get pPort NULL \n");
+ return -1;
+ }
+
+ addr = parm[0];
+
+ *parm = ctrl_ReadRegisterWrapper( pPort->ProObj->deviceId->ctrlInterface->hCtrl, pPort->ProObj->channel, addr);
+ USLPUT3("addr %d, data 0x%x\n", addr, parm[0]);
+ return 0;
+}
+
+static s8 si_ram_set( Port_t *pPort, u8 *parm, const u8 size)
+{
+ u8 *temp_p = NULL;
+ u32 ram = 0;
+ u32 write_value = 0;
+ u32 read_value = 0;
+
+
+ if((NULL == pPort) || (NULL == parm))
+ {
+ USLPUT0("si_ram_set pPort/parm NULL \n");
+ return -1;
+ }
+
+ temp_p = (u8*) parm;
+ ram = *temp_p & 0xff;
+ temp_p++;
+ ram = ram | ((u8)(*temp_p)<<8);
+
+ temp_p++;
+ write_value = *temp_p;
+ temp_p++;
+ write_value = write_value | ((u8)(*temp_p)<<8);
+ temp_p++;
+ write_value = write_value | ((u8)(*temp_p)<<16);
+ temp_p++;
+ write_value = write_value | ((u8)(*temp_p)<<24);
+ USLPUT3("write: ram:%d value:0x%x.\n", ram, write_value);
+
+ setUserMode(pPort->ProObj, TRUE);
+ ctrl_WriteRAMWrapper (pPort->ProObj->deviceId->ctrlInterface->hCtrl, pPort->ProObj->channel, ram, write_value);
+ read_value = ctrl_ReadRAMWrapper(pPort->ProObj->deviceId->ctrlInterface->hCtrl, pPort->ProObj->channel, ram);
+ setUserMode(pPort->ProObj, FALSE);
+ USLPUT3("read: ram:%d value:0x%x.\n", ram, read_value);
+
+ return 0;
+}
+
+static s8 si_ram_get( Port_t *pPort, u8 *parm, const u8 size)
+{
+ u32 temp = 0;
+ u16 addr = 0;
+
+ if(NULL == pPort)
+ {
+ USLPUT0("si_ram_get pPort NULL \n");
+ return -1;
+ }
+
+ addr = *(u16 *)parm;
+ printk("SLIC read ram %d\n", addr);
+ setUserMode(pPort->ProObj, TRUE);
+ temp = ctrl_ReadRAMWrapper(pPort->ProObj->deviceId->ctrlInterface->hCtrl, pPort->ProObj->channel, addr);
+ *((u32 *)parm) = temp;
+ setUserMode(pPort->ProObj, FALSE);
+
+ USLPUT3("addr %d, data 0x%x\n", addr, temp);
+
+ return 0;
+}
+
+static s8 si_update_ringpara(SILAB_CFG_CHIP_t *ptOldCfg, u8 ringvol_param)
+{
+ u32 dwNewRing = RING_F20_45VRMS_0VDC_LPR;
+
+ switch (ringvol_param)
+ {
+#if 0
+ case RING_VOLTAGE_55VPK:
+ dwNewRing = RING_F25_40VRMS_0VDC_BAL; /* 40vrms */
+ break;
+ case RING_VOLTAGE_65VPK:
+ dwNewRing = RING_F25_45VRMS_0VDC_BAL; /* 45vrms */
+ break;
+ case RING_VOLTAGE_70VPK:
+ dwNewRing = RING_F25_50VRMS_0VDC_BAL; /* 50vrms */
+ break;
+ case RING_VOLTAGE_75VPK:
+ dwNewRing = RING_F25_55VRMS_0VDC_BAL; /* 55vrms */
+ break;
+ case RING_VOLTAGE_85VPK:
+ dwNewRing = RING_F25_60VRMS_0VDC_BAL; /* 60vrms */
+ break;
+#endif
+ default:
+ dwNewRing = RING_F20_45VRMS_0VDC_LPR; /* 50vrms */
+ break;
+ }
+
+ if (dwNewRing != ptOldCfg->ring)
+ {
+ ptOldCfg->ring = dwNewRing;
+ return 1;
+ }
+
+ return 0;
+}
+
+static s8 si_ring_cfg(Port_t *pPort, u8 ringvol_param)
+{
+ if(NULL == pPort)
+ {
+ USLPUT0("si3217x cfg ringvpk with NULL pointer pPort!\n");
+ return -1;
+ }
+
+ if (1 == si_update_ringpara(pPort->pPreCfg, ringvol_param))
+ {
+ ProSLIC_RingSetup(pPort->ProObj, pPort->pPreCfg->ring);
+ }
+
+ return 0;
+}
+
+static s8 si_update_dcpara(SILAB_CFG_CHIP_t *ptOldCfg, u8 vol_param, u8 cur_param)
+{
+ u32 dwNewDc = DCFEED_48V_20MA;
+
+ switch (vol_param)
+ {
+ case DC_VOLTAGE_48V:
+ switch (cur_param)
+ {
+#if 0
+ case DC_CURRENT_20MA:
+ dwNewDc = DCFEED_48V_20MA; /* 48v20mA */
+ break;
+ case DC_CURRENT_24MA:
+ dwNewDc = DCFEED_48V_24MA; /* 48v24mA */
+ break;
+ case DC_CURRENT_28MA:
+ dwNewDc = DCFEED_48V_28MA; /* 48v28mA */
+ break;
+ case DC_CURRENT_32MA:
+ dwNewDc = DCFEED_48V_32MA; /* 48v32mA */
+ break;
+#endif
+ default:
+ dwNewDc = DCFEED_48V_25MA; /* 48v25mA */
+ break;
+ }
+ break;
+ case DC_VOLTAGE_52V:
+ switch (cur_param)
+ {
+#if 0
+ case DC_CURRENT_20MA:
+ dwNewDc = DCFEED_52V_20MA; /* 52v20mA */
+ break;
+ case DC_CURRENT_24MA:
+ dwNewDc = DCFEED_52V_24MA; /* 52v24mA */
+ break;
+ case DC_CURRENT_28MA:
+ dwNewDc = DCFEED_52V_28MA; /* 52v28mA */
+ break;
+ case DC_CURRENT_32MA:
+ dwNewDc = DCFEED_52V_32MA; /* 52v32mA */
+ break;
+#endif
+ default:
+ dwNewDc = DCFEED_48V_25MA; /* 48v25mA */
+ break;
+ }
+ break;
+ default:
+ dwNewDc = DCFEED_48V_25MA; /* 48v25mA */
+ break;
+ }
+
+ if (dwNewDc != ptOldCfg->dc)
+ {
+ ptOldCfg->dc = dwNewDc;
+ return 1;
+ }
+
+ return 0;
+}
+
+static s8 si_dcfeed_cfg(Port_t *pPort, u8 vol_param, u8 cur_param)
+{
+ if(pPort == NULL)
+ {
+ USLPUT0("si3217x cfg dcfeed with NULL pointer pPort!\n");
+ return -1;
+ }
+
+ if (1 == si_update_dcpara(pPort->pPreCfg, vol_param, cur_param))
+ {
+ ProSLIC_DCFeedSetup(pPort->ProObj, pPort->pPreCfg->dc);
+ }
+
+ return 0;
+}
+
+static s8 si_disable_powersave(Port_t *pPort)
+{
+ u8 bData = 0;
+
+ bData = ctrl_ReadRegisterWrapper(pPort->ProObj->deviceId->ctrlInterface->hCtrl, pPort->ProObj->channel, SI3217X_COM_REG_ENHANCE);
+ bData &= ~0x10;
+ ctrl_WriteRegisterWrapper(pPort->ProObj->deviceId->ctrlInterface->hCtrl, pPort->ProObj->channel,SI3217X_COM_REG_ENHANCE, bData);
+
+ return 0;
+}
+
+static s8 si_electric_set(Port_t *pPort, const u16 port, const ELECTRIC_CFG_CUSTOMIZED *buf)
+{
+ s8 ret = 0;
+
+ u8 bRingVol = 0;
+ u8 bDcVol = 0;
+ u8 bDcCur = 0;
+
+ if((NULL == pPort) || (buf == NULL))
+ {
+ USLPUT0("si_electric_set pPort/buf NULL \n");
+ return -1;
+ }
+
+ bRingVol = buf->bCusRingVpk;
+ bDcVol = buf->bCusDcVol;
+ bDcCur = buf->bCusDcLoopCurr;
+
+#if 0
+ switch(buf->bScene)
+ {
+ case DB_SLC_SINGLEPHONE_SHORTLOOP:
+ bRingVol = RING_VOLTAGE_70VPK;
+ bDcVol = DC_VOLTAGE_48V;
+ bDcCur = DC_CURRENT_20MA;
+ break;
+ case DB_SLC_MULTIPHONES_SHORTLOOP:
+ bRingVol = RING_VOLTAGE_70VPK;
+ bDcVol = DC_VOLTAGE_48V;
+ bDcCur = DC_CURRENT_32MA;
+ break;
+ case DB_SLC_LONGLOOP:
+ bRingVol = RING_VOLTAGE_85VPK;
+ bDcVol = DC_VOLTAGE_52V;
+ bDcCur = DC_CURRENT_20MA;
+ break;
+ case DB_SLC_ORIGINAL_FACTORY:
+ bRingVol = RING_VOLTAGE_70VPK;
+ bDcVol = DC_VOLTAGE_48V;
+ bDcCur = DC_CURRENT_20MA;
+ break;
+ case DB_SLC_CUSTOMIZED:
+ /* use customized parameters */
+ break;
+ default:
+ USLPUT0("\n Not support scence:%d \n", buf->bScene);
+ break;
+ }
+#endif
+
+ USLPUT3("si_electric_set Ring_vol: %d Dc_vol: %d Dc_cur: %d\n", bRingVol, bDcVol, bDcCur);
+
+ ret = si_dcfeed_cfg(pPort, bDcVol, bDcCur);
+ if(ret)
+ {
+ USLPUT0("si_dcfeed_cfg fail !!! \n");
+ }
+
+ ret = si_ring_cfg(pPort, bRingVol);
+ if(ret)
+ {
+ USLPUT0("si_ring_cfg fail !!! \n");
+ }
+
+ return 0;
+}
+
+static s8 si_time_cfg(Port_t *pPort, const USL_CONFIG *Slc_Time_Cfg)
+{
+ if((NULL == pPort) || (NULL == Slc_Time_Cfg))
+ {
+ USLPUT0("si_time_cfg pPort/Slc_Time_Cfg NULL \n");
+ return -1;
+ }
+
+ pPort->stUslConf.hookonmin = MS2JIFF(Slc_Time_Cfg->hookonmin, 10) + 2;
+ pPort->stUslConf.hookoffmin = MS2JIFF(Slc_Time_Cfg->hookoffmin, 10) - 2;
+ pPort->stUslConf.prehookoff = MS2JIFF(Slc_Time_Cfg->prehookoff, 10) - 2;
+ pPort->stUslConf.flash_low_min = MS2JIFF(Slc_Time_Cfg->flash_low_min, 10) - 2;
+ pPort->stUslConf.flash_low_max = MS2JIFF(Slc_Time_Cfg->hookonmin, 10) + 2;
+ pPort->stUslConf.flash_high_fix = MS2JIFF(Slc_Time_Cfg->flash_high_fix, 10) - 2;
+ pPort->stUslConf.dial_high_min = MS2JIFF(Slc_Time_Cfg->dial_high_min, 10) - 2;
+ pPort->stUslConf.dial_high_max = MS2JIFF(Slc_Time_Cfg->dial_high_max, 10) + 2;
+ pPort->stUslConf.dial_low_min = MS2JIFF(Slc_Time_Cfg->dial_low_min, 10) - 2;
+ pPort->stUslConf.dial_low_max = MS2JIFF(Slc_Time_Cfg->dial_low_max, 10) + 2;
+
+ return 0;
+}
+
+static s8 si_slctool_time_cfg(Port_t *pPort, SLIC_IOCTL_CMD cmd, u16 wTime)
+{
+ if(NULL == pPort)
+ {
+ USLPUT0("si_slctool_time_cfg pPort NULL \n");
+ return -1;
+ }
+
+ switch(cmd)
+ {
+ case SLIC_CFG_HOOK_LOWLEN:
+ case SLIC_CFG_FLASH_LMAX:
+ pPort->stUslConf.hookonmin = MS2JIFF(wTime, 10) + 2;
+ pPort->stUslConf.flash_low_max = MS2JIFF(wTime, 10) + 2;
+ break;
+
+ case SLIC_CFG_HOOK_HIGLEN:
+ pPort->stUslConf.hookoffmin = MS2JIFF(wTime, 10) - 2;
+ break;
+ case SLIC_CFG_PREHOOK_HIGLEN:
+ pPort->stUslConf.prehookoff = MS2JIFF(wTime, 10) - 2;
+ break;
+ case SLIC_CFG_FLASH_LMIN:
+ pPort->stUslConf.flash_low_min = MS2JIFF(wTime, 10) - 2;
+ break;
+ case SLIC_CFG_FLASH_HFIX:
+ pPort->stUslConf.flash_high_fix = MS2JIFF(wTime, 10) - 2;
+ break;
+ case SLIC_CFG_DIAL_HMIN:
+ pPort->stUslConf.dial_high_min = MS2JIFF(wTime, 10) - 2;
+ break;
+ case SLIC_CFG_DIAL_HMAX:
+ pPort->stUslConf.dial_high_max = MS2JIFF(wTime, 10) + 2;
+ break;
+ case SLIC_CFG_DIAL_LMIN:
+ pPort->stUslConf.dial_low_min = MS2JIFF(wTime, 10) - 2;
+ break;
+ case SLIC_CFG_DIAL_LMAX:
+ pPort->stUslConf.dial_low_max = MS2JIFF(wTime, 10) + 2;
+ break;
+ default:
+ USLPUT0("cmd=%d not found!\n", cmd);
+ break;
+ }
+
+ return 0;
+}
+
+static void InitPortsData(int port)
+{
+ if (port >= MAX_PORT_NUM)
+ {
+ USLPUT0("InitPortsData port %d fail\n", port);
+ return;
+ }
+
+ ports[port].hook_state = HOOKON;
+ ports[port].pulse_dig = 0;
+ ports[port].stLineTestPara.si_item = 0xff;
+ ports[port].stLineTestPara.test_flg = NOT_TEST;
+ ports[port].stLineTestPara.cnt = 0;
+ ports[port].low_len = 0;
+ ports[port].high_len = 0;
+
+ ports[port].stUslConf.hookonmin = MS2JIFF(100, 10)/10;
+ ports[port].stUslConf.hookoffmin = MS2JIFF(10, 10)/10;
+ ports[port].stUslConf.prehookoff = MS2JIFF(6, 10)/10;
+ ports[port].stUslConf.flash_low_min = MS2JIFF(4, 10)/10;
+ ports[port].stUslConf.flash_low_max = MS2JIFF(40, 10)/10;
+ ports[port].stUslConf.flash_high_fix = MS2JIFF(25, 10)/10;
+ ports[port].stUslConf.dial_high_min = MS2JIFF(3, 10)/10;
+ ports[port].stUslConf.dial_high_max = MS2JIFF(12, 10)/10;
+ ports[port].stUslConf.dial_low_min = MS2JIFF(4, 10)/10;
+ ports[port].stUslConf.dial_low_max = MS2JIFF(15, 10)/10;
+
+ /* add slic inf pre cfg to port struct */
+ ports[port].pPreCfg = &BoardCfg[port];
+
+ return;
+}
+
+int InitSiliconBoard(void)
+{
+ int i = 0;
+ int dwInitCh = 0;
+ int devtpye = -1;
+ int ret = 0;
+ USL_PORT_MAP *p = NULL;
+
+ SlicHardReset();
+
+ for(i = 0; i < MAX_PORT_NUM; i++)
+ {
+ p = get_port_item(i, SLIC_PORT_TYPE );
+
+ if(NULL != p)
+ {
+ #ifdef DEBUG_SLIC_ON
+ USLPUT0("Init port %d\n", i);
+ #endif
+ spiGciObj[i].port = p->cs;
+
+ ProSLIC_createControlInterface(&ProHWIntf[i]);
+ ProSLIC_createDevice(&(ProSLICDevices[i]));
+ ProSLIC_createChannel(&ports[i].ProObj);
+ devtpye = VerifyChipID(&spiGciObj[i], p->chan);
+ if(-1 != devtpye)
+ {
+ ProSLIC_SWInitChan(ports[i].ProObj,p->chan,devtpye,ProSLICDevices[i],ProHWIntf[i]);
+ ProSLIC_setSWDebugMode(ports[i].ProObj,true); /* optional */
+
+ ProSLIC_setControlInterfaceCtrlObj (ProHWIntf[i], &spiGciObj[i]);
+ ProSLIC_setControlInterfaceReset (ProHWIntf[i], ctrl_ResetWrapper);
+ ProSLIC_setControlInterfaceWriteRegister (ProHWIntf[i], ctrl_WriteRegisterWrapper);
+ ProSLIC_setControlInterfaceReadRegister (ProHWIntf[i], ctrl_ReadRegisterWrapper);
+ ProSLIC_setControlInterfaceWriteRAM (ProHWIntf[i], ctrl_WriteRAMWrapper);
+ ProSLIC_setControlInterfaceReadRAM (ProHWIntf[i], ctrl_ReadRAMWrapper);
+ ProSLIC_setControlInterfaceTimerObj (ProHWIntf[i], &timerObj);
+ ProSLIC_setControlInterfaceDelay (ProHWIntf[i], time_DelayWrapper);
+ ProSLIC_setControlInterfaceTimeElapsed (ProHWIntf[i], time_TimeElapsedWrapper);
+ ProSLIC_setControlInterfaceGetTime (ProHWIntf[i], time_GetTimeWrapper);
+ ProSLIC_setControlInterfaceSemaphore (ProHWIntf[i], SiSetSemaphore);
+
+ ProSLIC_Reset(ports[i].ProObj);
+ arrayOfProslicChans[i] = ports[i].ProObj;
+#ifdef SI3218X
+ (arrayOfProslicChans[i])->deviceId->chipType=SI32185;
+#endif
+ dwInitCh++;
+ }
+ else
+ {
+ #ifdef DEBUG_SLIC_ON
+ USLPUT0("No Siliconlab chip was found!!\n");
+ #endif
+ }
+ }
+ }
+
+ if (0 == dwInitCh)
+ {
+ USLPUT0("No Siliconlab chip need to be initialized!!\n");
+ return -1;
+ }
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+printk("ProSLIC_Init_MultiBOM\n");
+ ret = ProSLIC_Init_MultiBOM(arrayOfProslicChans,dwInitCh,BoardCfg[0].generel_cfg);
+#else
+printk("ProSLIC_Init\n");
+
+ ret = ProSLIC_Init(arrayOfProslicChans,dwInitCh);
+#endif
+ if(0 != ret)
+ {
+ printk("howard ProSLIC_Init_MultiBOM return %d\n", ret);
+ return ret;
+ }
+ /* as to 32260 can make some phone crash, and no need to do this for short subscriber line, so don't use it again */
+ //ProSLIC_LBCal(arrayOfProslicChans,dwInitCh);
+
+ for(i = 0; i < dwInitCh; i++)
+ {
+ USLPUT3("get_port_item port:%d.\n",i);
+ p = get_port_item(i, SLIC_PORT_TYPE );
+
+ if (NULL != p)
+ {
+ USLPUT3("channelEnable:%d.\n",ports[i].ProObj->channelEnable);
+ if( 1 == ports[i].ProObj->channelEnable )
+ {
+ USLPUT3("Register the port:%d.\n",i);
+ InitPortsData(i);
+ InitSiliconChip(&ports[i]);
+ usrline_port_register(p->port, p->type, &si_ops, &ports[i]);
+ }
+ else
+ {
+ USLPUT0("port:%d disabled.\n",i);
+ return -1;
+ }
+ }
+ }
+ //init_flg = 1;
+ return 0;
+}
+
+int SiSetSemaphore(void *pHCtrl, int s)
+{
+ /* Only slic use spi */
+ return 1;
+}
+
+/* handle the event */
+int HandleSiEvent(Port_t *pPort, proslicIntType *pIntData)
+{
+ int i = 0;
+ ProslicInt IntData ;
+
+ i = pIntData->number;
+ while(i--)
+ {
+ IntData = pIntData->irqs[i];
+ #ifdef DEBUG_SLIC_ON
+ switch(IntData)
+ {
+ case IRQ_VBAT:
+ /* The sensed battery voltage differs from the nominal VBAT value by an amount exceeding a programmed threshold. */
+ USLPUT2(" Error:VBAT_IA.\n");
+ break;
+ case IRQ_RING_TRIP:
+ break;
+ case IRQ_LOOP_STATUS:
+ /* Hookoff */
+ break;
+ case IRQ_LONG_STAT:
+ /* LONG_HI_IA */
+ USLPUT2(" Error: LONG_HI_IA.\n");
+ break;
+ case IRQ_VOC_TRACK:
+ /* The sensed battery voltage cannot support the programmed differential voltage. */
+ USLPUT2(" Error: VOC_TRACK_IA.\n");
+ break;
+ case IRQ_MADC_FS:
+ break;
+ case IRQ_P_HVIC:
+ /* a hardware power alarm based on the total chip power dissipation by the HVIC. */
+ USLPUT2(" Error:IRQ_P_HVIC.\n");
+ break;
+ case IRQ_P_THERM:
+ /* A hardware power alarm. */
+ USLPUT2(" Error:P_THERM_IA.\n");
+ break;
+ case IRQ_OSC1_T1:
+ case IRQ_OSC1_T2:
+ case IRQ_OSC2_T1:
+ case IRQ_OSC2_T2:
+ case IRQ_RING_T1:
+ case IRQ_RING_T2:
+ case IRQ_PM_T1:
+ case IRQ_PM_T2:
+ case IRQ_FSKBUF_AVAIL:
+ case IRQ_P_OFFLD:
+ case IRQ_DTMF:
+ case IRQ_INDIRECT:
+ case IRQ_TXMDM:
+ case IRQ_RXMDM:
+ case IRQ_PQ1:
+ case IRQ_PQ2:
+ case IRQ_PQ3:
+ case IRQ_PQ4:
+ case IRQ_PQ5:
+ case IRQ_PQ6:
+ case IRQ_RING_FAIL:
+ case IRQ_CM_BAL:
+ case IRQ_USER_0:
+ case IRQ_USER_1:
+ case IRQ_USER_2:
+ case IRQ_USER_3:
+ case IRQ_USER_4:
+ case IRQ_USER_5:
+ case IRQ_USER_6:
+ case IRQ_USER_7:
+ case IRQ_DSP:
+ break;
+ default:
+ break;
+ }
+ #endif
+ }
+
+ return 0;
+}
+
+void SiScanSignals(USL_PORT *usl_port, u8 hook)
+{
+ Port_t *data = usl_port->pLine;
+
+ SiUpdatePort(data, usl_port->port, hook);
+ switch(data->hook_state)
+ {
+ case HOOKON:
+ break;
+ case HOOKOFFING:
+ if ( data->high_len == data->stUslConf.prehookoff )
+ {
+ /* User Pre HookOff! report */
+
+ }
+ if ( data->high_len < data->stUslConf.hookoffmin )
+ {
+ return;
+ }
+ //usrline_report(usl_port->port, EV_FXS_PRE_HOOKOFF, 0, usl_port->event_mask);
+ /* Finished. change state to HOOKOFF */
+ data->hook_state = HOOKOFF;
+ /* User HookOff! report */
+ //ProSLIC_SetLinefeedStatus( data->ProObj, LF_FWD_ACTIVE );??
+
+ usrline_report(usl_port->port,EV_FXS_HOOKOFF,0, usl_port->event_mask);
+ slic_offhook = 1;
+
+ break;
+ case HOOKOFF:
+ if (data->high_len == data->stUslConf.flash_high_fix &&
+ data->low_len < data->stUslConf.hookonmin && data->low_len >= data->stUslConf.dial_low_min )
+ {
+ if (data->pulse_dig == FLASH_EV_FLG)
+ {
+ USLPUT2("EV_FXS_FLASH: line=%d,low=%d. high %d\n",usl_port->port, data->low_len,data->high_len);
+ usrline_report(usl_port->port,EV_FXS_FLASH,0, usl_port->event_mask);
+ }
+ else if (( 1 <= data->pulse_dig ) && ( 10 >= data->pulse_dig ))
+ {
+ USLPUT2("EV_FXS_COLLECT_DIG: line=%d,low=%d. high %d\n",usl_port->port, data->low_len,data->high_len);
+ usrline_report(usl_port->port,EV_FXS_COLLECT_DIG,data->pulse_dig%10, usl_port->event_mask);
+ }
+ else
+ {
+ USLPUT2("drop dig:%d! line=%d, low %d, high %d\n", usl_port->port, data->pulse_dig, data->low_len, data->high_len);
+ }
+ data->pulse_dig = 0;
+ }
+
+ break;
+ case HOOKONING:
+ if (data->low_len < data->stUslConf.hookonmin)
+ {
+ //printk("low_len %d < hookonmin %d, return\n", data->low_len, data->stUslConf.hookonmin);
+ return;
+ }
+ /* Finished. change state to HOOKON */
+ //printk("low_len %d < hookonmin %d\n", data->low_len, data->stUslConf.hookonmin);
+ data->hook_state = HOOKON;
+ /* User HookOn! report */
+ data->pulse_dig = 0;
+ data->bDialEn = EV_DIAL_STOP;
+ usrline_report(usl_port->port,EV_FXS_HOOKON,0,usl_port->event_mask);
+ slic_offhook = 0;
+
+ break;
+ default:
+ break;
+ }
+}
+
+void SiUpdatePort(Port_t *data, u16 port, u8 event)
+{
+ if (event == EV_LOW)
+ {
+ data->low_len++;
+ switch (data->hook_state)
+ {
+ case HOOKOFFING:
+ /* short pulse filter */
+ if (data->low_len > PULSE_FILTER_TIME)
+ {
+ data->hook_state = HOOKON;
+ data->low_len = 0;
+ }
+ else
+ {
+ data->high_len++;
+ }
+ break;
+ case HOOKOFF:
+ if (data->low_len > PULSE_FILTER_TIME)
+ {
+ data->hook_state = HOOKONING;
+ data->low_len = 0;
+ }
+ else
+ {
+ data->high_len++;
+ }
+ break;
+ default:
+ break;
+ }
+ }
+ else
+ {
+ data->high_len++;
+ switch (data->hook_state)
+ {
+ case HOOKON:
+ if (data->high_len > PULSE_FILTER_TIME)
+ {
+ data->hook_state = HOOKOFFING;
+ data->high_len = 0;
+ }
+ else
+ {
+ data->low_len++;
+ }
+ break;
+ case HOOKONING:
+ if (data->high_len > PULSE_FILTER_TIME)
+ {
+ data->hook_state = HOOKOFF;
+ /* To Judge if there is a pulse occured */
+ if((EV_DIAL_START == data->bDialEn) && (data->low_len >= data->stUslConf.dial_low_min) &&
+ (data->low_len < data->stUslConf.dial_low_max))
+ {
+ data->pulse_dig++;
+ USLPUT3("port:%d pulse_dig++! low %d, high %d, dig %d\n", port, data->low_len, data->high_len, data->pulse_dig);
+ }
+ else if(data->low_len >= data->stUslConf.flash_low_min)
+ {
+ data->pulse_dig = FLASH_EV_FLG;
+ USLPUT3("port:%d Flash! low %d, high %d\n", port, data->low_len, data->high_len);
+ }
+ else
+ {
+ USLPUT3("port:%d Pulse not dientfied! low %d, high %d\n", port, data->low_len, data->high_len);
+ }
+ data->high_len = 0;
+ }
+ else
+ {
+ data->low_len++;
+ }
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+void InitSiliconChip(Port_t *pPort)
+{
+
+ /* DC */
+ ProSLIC_DCFeedSetup(pPort->ProObj, pPort->pPreCfg->dc);
+ //ProSLIC_SetLinefeedStatus(pPort->ProObj, pPort->pPreCfg->linestaus);
+
+ /* Ring init */
+ ProSLIC_RingSetup(pPort->ProObj, pPort->pPreCfg->ring);
+ /* PCM init */
+ ProSLIC_PCMSetup(pPort->ProObj, pPort->pPreCfg->a_u_law);
+ ProSLIC_PCMTimeSlotSetup(pPort->ProObj,0x1,0x1);
+
+ ProSLIC_ZsynthSetup(pPort->ProObj, pPort->pPreCfg->Impe);
+ ProSLIC_ToneGenSetup(pPort->ProObj, pPort->pPreCfg->tone);
+
+ /* Meter init */
+ //ProSLIC_PulseMeterSetup(pPort->ProObj, pPort->pPreCfg->meter);
+
+ ProSLIC_FSKSetup(pPort->ProObj, ITU_FSK);
+ ProSLIC_AudioGainSetup(pPort->ProObj, pPort->pPreCfg->rxgain, pPort->pPreCfg->txgain, pPort->pPreCfg->Impe);
+
+ /* Active the line */
+ ProSLIC_EnableInterrupts(pPort->ProObj);
+ ProSLIC_SetLinefeedStatus(pPort->ProObj,LF_FWD_ACTIVE);
+
+
+ if (1 == pPort->pPreCfg->bDisablePowerSave)
+ {
+ si_disable_powersave(pPort);
+ }
+
+ return;
+}
+
+int SiRemoveBoard(void)
+{
+ int i = 0;
+ USL_PORT_MAP *p = NULL;
+
+ for( i = 0; i <MAX_PORT_NUM; i++ )
+ {
+ p = get_port_item(i, SLIC_PORT_TYPE);
+
+ if(p != NULL)
+ {
+ if (1 == ports[i].ProObj->channelEnable)
+ {
+ USLPUT3("shutdown port:%d, ch:%d\n", i, ports[i].ProObj->channel);
+ /* reset chip */
+ ProSLIC_Reset(ports[i].ProObj);
+ }
+
+ p->cs = 0;
+ p->chan = 0;
+ p->port = 0;
+
+ /* free chip related memory */
+ ProSLIC_destroyChannel(&ports[i].ProObj);
+ ProSLIC_destroyDevice(&(ProSLICDevices[i]));
+ ProSLIC_destroyControlInterface(&ProHWIntf[i]);
+ }
+ }
+
+ return 0;
+}
+
+int ProSLIC_DTMFValid (proslicChanType_ptr pProslic)
+{
+ int valid_tone = 0;
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ valid_tone = ctrl_ReadRegisterWrapper( pProslic->deviceId->ctrlInterface->hCtrl,
+ pProslic->channel,PROSLIC_REG_TONDTMF ) & 0x10;
+ if(valid_tone)
+ return 1;
+ else
+ return 0;
+}
+
+void ScanSiBoard(USL_PORT *pUslPort)
+{
+ u8 hook = 0;
+ int ret = 0;
+ switch (pUslPort->pLine->stLineTestPara.test_flg)
+ {
+ case NOT_TEST:
+ if(dtmf_mute)
+ {
+ ret = ProSLIC_DTMFValid(pUslPort->pLine->ProObj);
+ if(!ret)
+ {
+ //ProSLIC_SetMuteStatus(pUslPort->pLine->ProObj,PROSLIC_MUTE_NONE);
+ dtmf_mute = 0;
+ }
+ }
+ //ProSLIC_ReadHookStatus(pUslPort->pLine->ProObj,&hook);
+ hook = slic_offhook;
+ SiScanSignals(pUslPort, hook);
+ break;
+ case TEST_STARTING:
+ case TEST_STOPING:
+ USLPUT3("change state:%d,do nothing\n", pUslPort->pLine->stLineTestPara.test_flg);
+ break;
+ case TESTING:
+ SiMltScan(pUslPort->pLine);
+ break;
+ default:
+ USLPUT0("unknow test state:%d\n", pUslPort->pLine->stLineTestPara.test_flg);
+ break;
+ }
+
+ return;
+}
+
+int VerifyChipID(ctrl_S *hCtrl, u8 chan)
+{
+ u8 id = 0;
+ int devtype = 0;
+
+ id = ctrl_ReadRegisterWrapper(hCtrl, chan,SI3217X_COM_REG_ID);
+ printk("Siliconlab chip cs:%d ch:%d id! 0x%x \n",hCtrl->port, chan, id);
+ USLPUT0("Siliconlab chip cs:%d ch:%d id! 0x%x \n", hCtrl->port, chan, id);
+#if 0
+ if (0xFF == id)
+ {
+ USLPUT0("Siliconlab chip cs:%d ch:%d id error! 0x%x \n", hCtrl->port, chan, id);
+ return devtype;
+ }
+
+ switch(id&0xc0)
+ {
+ case 0x80:
+ devtype = SI3217X_TYPE;
+ USLPUT0("Siliconlab chip Si3217x found! id:0x%x\n", id);
+ break;
+ case 0xc0:
+ devtype = SI3226X_TYPE;
+ USLPUT0("Siliconlab chip Si3226x found! id:0x%x\n", id);
+ break;
+ default:
+ USLPUT0("Siliconlab chip id error! 0x%x \n",id);
+ break;
+ }
+#endif
+#if 0
+ switch( (id & 0x38) >> 3 )
+ {
+
+ case 0:/* Si32171 */
+ #ifdef DEBUG_SLIC_ON
+ printk("Siliconlab chip Si32171 found!\n");
+ #endif
+ break;
+ case 3:/* Si32175 */
+ #ifdef DEBUG_SLIC_ON
+ printk("Siliconlab chip Si32175 found!\n");
+ #endif
+ break;
+ case 4:/* Si32176 */
+ #ifdef DEBUG_SLIC_ON
+ printk("Siliconlab chip Si32176 found!\n");
+ #endif
+ break;
+ case 5:/* Si32177 */
+ #ifdef DEBUG_SLIC_ON
+ printk("Siliconlab chip Si32177 found!\n");
+ #endif
+ break;
+ case 6:/* Si32178 */
+ #ifdef DEBUG_SLIC_ON
+ printk("Siliconlab chip Si32178 found!\n");
+ #endif
+ break;
+ default:
+ printk("Siliconlab chip id error! 0x%x \n",id);
+ return -1;
+ }
+#endif
+
+ return SI3217X_TYPE;
+}
+
+int ProSLIC_PCMCfg (proslicChanType_ptr hProslic,u8 preset)
+{
+ ctrl_WriteRegisterWrapper(hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_PCMMODE,pcmcfg[preset]);
+ return 0;
+}
+
+int ProSLIC_PCMEnable (proslicChanType_ptr hProslic, u8 enable )
+{
+ u8 data = 0;
+
+ data = ctrl_ReadRegisterWrapper( hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_PCMMODE );
+
+ if( enable )
+ {
+ data |= 0x10;
+ }
+ else
+ {
+ data &= 0xef;
+ }
+ ctrl_WriteRegisterWrapper(hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_PCMMODE, data);
+ return 0;
+}
+
+int ProSLIC_GetLinefeedStatus (proslicChanType_ptr hProslic, uInt8 *pLinefeed)
+{
+ u8 data = 0;
+
+ data = ctrl_ReadRegisterWrapper(hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_LINEFEED);
+ *pLinefeed = data&0xf;
+
+ return 1;
+}
+
+static int setUserMode (proslicChanType_ptr hProslic, BOOLEAN on)
+{
+ u8 data;
+
+ data = ctrl_ReadRegisterWrapper(hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_TEST_CNTL);
+ if (((data&1) != 0) == on)
+ return 0;
+ ctrl_WriteRegisterWrapper(hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_TEST_CNTL, 2);
+ ctrl_WriteRegisterWrapper(hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_TEST_CNTL, 8);
+ ctrl_WriteRegisterWrapper(hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_TEST_CNTL, 0xe);
+ ctrl_WriteRegisterWrapper(hProslic->deviceId->ctrlInterface->hCtrl,hProslic->channel,SI3217X_COM_REG_TEST_CNTL, 0);
+
+ return 0;
+}
+
+static void StartSiLineTest(Port_t *pPort, uInt8 TestId)
+{
+ if(NULL == pPort)
+ {
+ USLPUT0("StartSiLineTest error input NULL pointer.\n");
+ return;
+ }
+
+ USLPUT2("StartSiLineTest: line %d item %d!\n", pPort->stLineTestPara.pstResult->port, TestId);
+
+ pPort->stLineTestPara.pstMlt->Mlt.pProslic = pPort->ProObj;
+ MLTClearSettings(&pPort->stLineTestPara.pstMlt->Mlt);
+ MLTClearResults(&pPort->stLineTestPara.pstMlt->Mlt);
+ switch(TestId)
+ {
+ case TI_LineVolt:
+ /* Call test state initalization function */
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_OPEN);
+ pPort->stLineTestPara.si_item = TI_LineVolt;
+ ProSLIC_mlt_init_foreign_voltages(&pPort->stLineTestPara.pstMlt->vState,30);
+ pPort->stLineTestPara.test_flg = TESTING;
+ break;
+ /*case ROH_TEST:
+ id = LT_TID_ROH; Receiver Off-Hook indication
+ break; */
+ case TI_LineCap:
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_OPEN);
+ pPort->stLineTestPara.si_item = TI_LineCap;
+ ProSLIC_mlt_init_capacitance(&pPort->stLineTestPara.pstMlt->CapState);
+ pPort->stLineTestPara.test_flg = TESTING;
+ break;
+ case TI_LineRes:
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_OPEN);
+ pPort->stLineTestPara.si_item = TI_LineRes; /* Resistive Fault */
+ /* Call test state initalization function */
+ ProSLIC_mlt_init_resistive_faults(&pPort->stLineTestPara.pstMlt->rMeas);
+ pPort->stLineTestPara.test_flg = TESTING;
+ break;
+ case TI_LineRes_reverse:
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_OPEN);
+ pPort->stLineTestPara.si_item = TI_LineRes_reverse; /* Resistive Fault */
+ /* Call test state initalization function */
+ ProSLIC_mlt_init_resistive_faults(&pPort->stLineTestPara.pstMlt->rMeas);
+ pPort->stLineTestPara.test_flg = TESTING;
+ break;/**/
+ /*case GR_909:
+ id = LT_TID_ALL_GR_909; All GR-909 fault tests in predefined order
+ break;*/
+ /*case LOOP_BACK:
+ id = LT_TID_LOOPBACK; Loopback test
+ break;*/
+ case TI_LoopCircuitAndRes:
+ pPort->stLineTestPara.si_item = TI_LoopCircuitAndRes;
+ /* DC Feed Self Test */
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ SiSendResultDCFeedSt(pPort);
+ break;
+ case TI_InLoopCurrent:
+ pPort->stLineTestPara.si_item = TI_InLoopCurrent;
+ /* DC Feed Self Test */
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ SiSendResultDCFeedSt(pPort);
+ break;
+ case TI_BatteryVolt:
+ /* DC VOLTAGE Test */
+ pPort->stLineTestPara.si_item = TI_BatteryVolt;
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ SiSendResultBatteryVol(pPort);
+ break;
+ case TI_RingVolt:
+ /* Ringing Self Test */
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_RINGING);
+ pPort->stLineTestPara.si_item = TI_RingVolt;
+ pPort->stLineTestPara.test_flg = TESTING;
+ RingCnt = 0;
+ /**/
+ break;
+ case ROH_TEST:
+ /* On/Off hook Self Test */
+ pPort->stLineTestPara.si_item = TI_Hook;
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ SiSendResultHook(pPort);
+ break;
+ case TI_REN:
+ ProSLIC_mlt_init_ren(&pPort->stLineTestPara.pstMlt->RenState);
+ ProSLIC_mlt_init_ren_cal(&pPort->stLineTestPara.pstMlt->Mlt);
+ pPort->stLineTestPara.si_item = TI_REN;
+ pPort->stLineTestPara.test_flg = TESTING;
+ break;
+ /*case QUICKTEST:
+ id = LT_TID_PRE_LINE_V; Pre Line Voltage Test
+ break;*/
+ /*case 13:
+ id = LT_TID_FLT_DSCRM; Fault Discrimination Test
+ break;*/
+ case TI_Outside12:
+ /*step 1: Line Voltage Test */
+ /* Call test state initalization function */
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_OPEN);
+ pPort->stLineTestPara.si_item = TI_LineVolt;
+ ProSLIC_mlt_init_foreign_voltages(&pPort->stLineTestPara.pstMlt->vState,30);
+ pPort->stLineTestPara.test_flg = TESTING;
+ break;
+ case TI_LineConnect:
+ /*Line Connectivity Test */
+ StartLineConnectTest(pPort);
+ break;
+ default:
+ USLPUT1("The item is not surpported!\n");
+ SendErrorTest(pPort, NOT_SURPPORT);
+ return;
+ }
+
+ return;
+}
+
+static s8 si_start_test(Port_t *pPort, const WriteCmd_t *Cmd)
+{
+ if((NULL == pPort) || (NULL == Cmd))
+ {
+ USLPUT0("si_start_test pPort/Cmd NULL pointer.\n");
+ return -1;
+ }
+
+ if (TEST_STARTING == pPort->stLineTestPara.test_flg || TESTING == pPort->stLineTestPara.test_flg)
+ {
+ USLPUT0("%s is under testing item:%d\n",__FUNCTION__, pPort->stLineTestPara.si_item);
+ return 0;
+ }
+
+ /* get test result memory */
+ pPort->stLineTestPara.pstResult = (TestResult_t *)kmalloc(sizeof(TestResult_t), GFP_KERNEL);
+ if (NULL == pPort->stLineTestPara.pstResult)
+ {
+ USLPUT0("%s port %d get TestResult memory failed!\n",__FUNCTION__, Cmd->port);
+ return -1;
+ }
+ memset(pPort->stLineTestPara.pstResult, 0, sizeof(TestResult_t));
+
+ /* save test message */
+ pPort->stLineTestPara.pstResult->port = Cmd->port;
+ pPort->stLineTestPara.pstResult->port_type = Cmd->port_type;
+ pPort->stLineTestPara.pstResult->item = Cmd->item;
+ pPort->stLineTestPara.pstResult->obligate = Cmd->obligate;
+ pPort->stLineTestPara.pstResult->num = Cmd->num;
+ pPort->stLineTestPara.pstResult->omci_item = Cmd->omci_item;
+ pPort->stLineTestPara.pstResult->flg = TEST_SUCC;
+
+ pPort->stLineTestPara.cnt = 0;
+
+
+ if((HOOKOFF == pPort->hook_state) && (0 == pPort->stLineTestPara.pstResult->obligate))
+ {
+ USLPUT1("The user is bust now!\n");
+ SendErrorTest(pPort, TEST_USER_BUSY);
+ return -1;
+ }
+
+ /* get memory to save testing data */
+ pPort->stLineTestPara.pstMlt = (ProSLICMLT *)kmalloc(sizeof(ProSLICMLT), GFP_KERNEL);
+ if (NULL == pPort->stLineTestPara.pstMlt)
+ {
+ USLPUT0("%s port %d get Mlt memory failed!\n",__FUNCTION__, Cmd->port);
+ kfree(pPort->stLineTestPara.pstResult);
+ pPort->stLineTestPara.pstResult = NULL;
+ return -1;
+ }
+ memset(pPort->stLineTestPara.pstMlt, 0, sizeof(ProSLICMLT));
+
+ pPort->stLineTestPara.test_flg = TEST_STARTING;
+
+ StartSiLineTest(pPort, pPort->stLineTestPara.pstResult->item);
+
+ return 0;
+}
+
+static s8 si_stop_test(Port_t *pPort)
+{
+ if(NULL == pPort)
+ {
+ USLPUT0("si_stop_test pPort NULL \n");
+ return -1;
+ }
+
+ if (TESTING == pPort->stLineTestPara.test_flg)
+ {
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ InitSiliconChip(pPort);
+ }
+
+ if (NULL != pPort->stLineTestPara.pstMlt)
+ {
+ kfree(pPort->stLineTestPara.pstMlt);
+ }
+ pPort->stLineTestPara.pstMlt = NULL;
+
+ if (NULL != pPort->stLineTestPara.pstResult)
+ {
+ kfree(pPort->stLineTestPara.pstResult);
+ }
+ pPort->stLineTestPara.pstResult = NULL;
+
+ pPort->stLineTestPara.test_flg = NOT_TEST;
+
+ return 0;
+}
+
+static s8 si_read_result(Port_t *pPort, TestResult_t *pstResult)
+{
+ if((NULL == pPort) || (NULL == pstResult))
+ {
+ USLPUT0("leg_read_result pPort/pstResult NULL pointer.\n");
+ return -1;
+ }
+
+ if (NULL != pPort->stLineTestPara.pstMlt)
+ {
+ kfree(pPort->stLineTestPara.pstMlt);
+ }
+ pPort->stLineTestPara.pstMlt = NULL;
+
+ if (NULL != pPort->stLineTestPara.pstResult)
+ {
+ memcpy(pstResult, pPort->stLineTestPara.pstResult, sizeof(TestResult_t));
+ kfree(pPort->stLineTestPara.pstResult);
+ }
+ pPort->stLineTestPara.pstResult = NULL;
+
+ pPort->stLineTestPara.test_flg = NOT_TEST;
+ USLPUT3("\npPort->stLineTestPara.cnt=%d\n", pPort->stLineTestPara.cnt);
+
+ return 0;
+}
+
+static s8 StartLineConnectTest(Port_t *pPort)
+{
+ if(NULL == pPort)
+ {
+ USLPUT1("StartLineConnectTest pPort NULL.\n");
+ return -1;
+ }
+
+ if(HOOKOFF == pPort->hook_state)//Õª»ú£¬Ôò±¨Óл°»ú
+ {
+ pPort->stLineTestPara.pstResult->user_flg = 1;
+ usrline_report(pPort->stLineTestPara.pstResult->port,EV_FXS_TEST_DONE,0,0);
+ }
+ else //¹Ò»ú£¬Ôò²âREN
+ {
+ pPort->stLineTestPara.pstResult->user_flg = 0;
+ ProSLIC_mlt_init_ren(&pPort->stLineTestPara.pstMlt->RenState);
+ ProSLIC_mlt_init_ren_cal(&pPort->stLineTestPara.pstMlt->Mlt);
+ pPort->stLineTestPara.si_item = TI_REN;
+ pPort->stLineTestPara.test_flg = TESTING;
+ }
+
+ return 0;
+}
+
+static s8 si_time_print(Port_t *pLine)
+{
+ USLPUT0("si32xxx times:\n");
+ USLPUT0("hookonmin: %d\n",pLine->stUslConf.hookonmin);
+ USLPUT0("hookoffmin: %d\n",pLine->stUslConf.hookoffmin);
+ USLPUT0("prehookoff: %d\n",pLine->stUslConf.prehookoff);
+ USLPUT0("flash_low_min: %d\n",pLine->stUslConf.flash_low_min);
+ USLPUT0("flash_high_fix:%d\n",pLine->stUslConf.flash_high_fix);
+ USLPUT0("dial_high_min: %d\n",pLine->stUslConf.dial_high_min);
+ USLPUT0("dial_high_max: %d\n",pLine->stUslConf.dial_high_max);
+ USLPUT0("dial_low_min: %d\n",pLine->stUslConf.dial_low_min);
+ USLPUT0("dial_low_max: %d\n",pLine->stUslConf.dial_low_max);
+ USLPUT0("dial_enable: %d\n",pLine->bDialEn);
+
+ return 0;
+}
+
+static s8 si_dial_set(Port_t *pPort, u8 bDialEn)
+{
+ if(NULL == pPort)
+ {
+ USLPUT1("si_dial_set pPort NULL.\n");
+ return -1;
+ }
+
+ pPort->bDialEn = bDialEn;
+
+ return 0;
+}
+
+
+/*
+** Clears REN cal flag
+*/
+ void MLTClearSettings(ProSLICMLTType *pProSLICMLT)
+{
+ pProSLICMLT->ren.renCalFlag = 0;
+}
+
+/*
+** Clears any previous GR909 test results CDP move this to proslic_mlt.c
+*/
+void MLTClearResults(ProSLICMLTType *pProSLICMLT)
+{
+ pProSLICMLT->hazVAC.measTG = 0;
+ pProSLICMLT->hazVAC.measTR = 0;
+ pProSLICMLT->hazVAC.measRG = 0;
+ pProSLICMLT->hazVAC.resultsValid = 0;
+
+ pProSLICMLT->hazVDC.measTG = 0;
+ pProSLICMLT->hazVDC.measTR = 0;
+ pProSLICMLT->hazVDC.measRG = 0;
+ pProSLICMLT->hazVDC.resultsValid = 0;
+
+ pProSLICMLT->resFaults.measTG = 10000000;
+ pProSLICMLT->resFaults.measTR = 10000000;
+ pProSLICMLT->resFaults.measRG = 10000000;
+ pProSLICMLT->resFaults.resultsValid = 0;
+
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_NOFAULT;
+ pProSLICMLT->roh.resultsValid = 0;
+
+ pProSLICMLT->ren.renValue = 0;
+ pProSLICMLT->ren.resultsValid = 0;
+}
+
+void SiMltScan(Port_t *pPort)
+{
+ int done = 0;
+
+ pPort->stLineTestPara.cnt++;
+ if( pPort->stLineTestPara.cnt > MAX_TEST_TIMEOUT ) /* Test time out */
+ {
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ InitSiliconChip(pPort);
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_FWD_ACTIVE);
+ SendErrorTest(pPort, TESTITEM_TIMEOVER);
+ return;
+ }
+ switch( pPort->stLineTestPara.si_item )
+ {
+ case TI_LineVolt:
+ /* Call test function - will return 1 when complete */
+ done = ProSLIC_mlt_foreign_voltages(&pPort->stLineTestPara.pstMlt->Mlt,&pPort->stLineTestPara.pstMlt->vState);
+ if(1 == done)
+ {
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ /* */
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_FWD_ACTIVE);
+ msleep(200); /* need more than 150ms to normal feed state */
+ SiSendResultVol(pPort, &pPort->stLineTestPara.pstMlt->Mlt);
+ }
+
+ break;
+
+ case TI_LineCap:
+ done = ProSLIC_mlt_capacitance(&pPort->stLineTestPara.pstMlt->Mlt,&pPort->stLineTestPara.pstMlt->CapState);
+ if(1 == done)
+ {
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ #ifdef DEBUG_SLIC_ON
+ USLPUT2("InitSiChip port: %d.\n",pPort->stLineTestPara.pstResult->port);
+ #endif
+ InitSiliconChip(pPort); //added by fandi,because after the cap test, dsp can't receive 1 4 7 5 8.
+ if(HOOKOFF == pPort->hook_state)//Õª»ú״̬£¬ÖØÐÂÉèÖÃʱ϶
+ {
+ si_timeslot_set(pPort, pPort->stLineTestPara.pstResult->port, pPort->stLineTestPara.pstResult->port);
+ }
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_FWD_ACTIVE);
+ msleep(200); /* need more than 150ms to normal feed state */
+ SiSendResultCap(pPort, &pPort->stLineTestPara.pstMlt->Mlt); /* Ringers test per FCC Part 68 REN def.*/
+ }
+ break;
+ case TI_LineRes:
+ case TI_LineRes_reverse:
+ /* Call test function - will return 1 when complete */
+ done = ProSLIC_mlt_resistive_faults(&pPort->stLineTestPara.pstMlt->Mlt,&pPort->stLineTestPara.pstMlt->rMeas);
+ if(1 == done)
+ {
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_FWD_ACTIVE);
+ msleep(200); /* need more than 150ms to normal feed state */
+ SiSendResultRes(pPort, &pPort->stLineTestPara.pstMlt->Mlt);
+ }
+ break;
+
+ case TI_LoopCircuitAndRes:
+ case TI_InLoopCurrent:
+
+ break;
+ case TI_BatteryVolt:
+
+ break;
+ case TI_RingVolt:
+ USLPUT1("%s: %d .\n", __FUNCTION__, __LINE__);
+ RingVol[RingCnt%MAX_RING_CNT] = ctrl_ReadRAMWrapper(pPort->ProObj->deviceId->ctrlInterface->hCtrl,pPort->ProObj->channel,SI3217X_COM_RAM_MADC_VBAT);
+ RingCnt++;
+ if( RingCnt > (MAX_RING_CNT - 1))
+ {
+ RingCnt = 0;
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_FWD_ACTIVE);
+ SiSendResultRingtouser(pPort);
+ }
+ break;
+ case TI_Hook:
+
+ break;
+ case TI_REN:
+ done = ProSLIC_mlt_ren(&pPort->stLineTestPara.pstMlt->Mlt, &pPort->stLineTestPara.pstMlt->RenState);
+ if( 1 == done )
+ {
+ pPort->stLineTestPara.test_flg = TEST_STOPING;
+ ProSLIC_SetLinefeedStatus(pPort->ProObj, LF_FWD_ACTIVE);
+ SiRen(pPort, &pPort->stLineTestPara.pstMlt->Mlt);
+ }
+ break;
+/* case POWER_SUP_VOLT:
+
+ break;*/
+ case TI_Outside12:
+
+ break;
+ case TI_LineConnect:
+
+ break;
+ default:
+ return ;
+ }
+}
+
+void SiSendResultVol(Port_t *pPort, ProSLICMLTType *pMlt)
+{
+ USLPUT2("V_TR:DC %d, AC %d\n",pMlt->hazVDC.measTR , (pMlt->hazVAC.measTR) / 10);
+ USLPUT2("V_TG:DC %d, AC %d\n",pMlt->hazVDC.measTG , (pMlt->hazVAC.measTG) / 10);
+ USLPUT2("V_RG:DC %d, AC %d\n",pMlt->hazVDC.measRG , (pMlt->hazVAC.measRG) / 10);
+ pPort->stLineTestPara.pstResult->vac_tr = pMlt->hazVAC.measTR;
+ pPort->stLineTestPara.pstResult->vac_tg = pMlt->hazVAC.measTG;
+ pPort->stLineTestPara.pstResult->vac_rg = pMlt->hazVAC.measRG;
+ pPort->stLineTestPara.pstResult->vdc_tr = pMlt->hazVDC.measTR;
+ pPort->stLineTestPara.pstResult->vdc_tg = pMlt->hazVDC.measTG;
+ pPort->stLineTestPara.pstResult->vdc_rg = pMlt->hazVDC.measRG;
+
+ if(TI_Outside12 == pPort->stLineTestPara.pstResult->item)
+ {
+ StartSiLineTest(pPort, TI_LineCap);
+ }
+ else
+ {
+ usrline_report(pPort->stLineTestPara.pstResult->port,EV_FXS_TEST_DONE,0, 0);
+ }
+}
+
+void SiSendResultCap(Port_t *pPort, ProSLICMLTType *pMlt)
+{
+ USLPUT2 ("RG Capacitance = %d.%d nF ***\n",pMlt->capFaults.measRG/10,pMlt->capFaults.measRG%10);
+ USLPUT2 ("TG Capacitance = %d.%d nF ***\n",pMlt->capFaults.measTG/10,pMlt->capFaults.measTG%10);
+ USLPUT2 ("TR Capacitance = %d.%d nF ***\n",pMlt->capFaults.measTR/10,pMlt->capFaults.measTR%10);
+ pPort->stLineTestPara.pstResult->cap_tr = pMlt->capFaults.measTR/10;
+ pPort->stLineTestPara.pstResult->cap_tg = pMlt->capFaults.measTG/10;
+ pPort->stLineTestPara.pstResult->cap_rg = pMlt->capFaults.measRG/10;
+
+ if(TI_Outside12 == pPort->stLineTestPara.pstResult->item)
+ {
+ StartSiLineTest(pPort, TI_LineRes);
+ }
+ else
+ {
+ usrline_report(pPort->stLineTestPara.pstResult->port, EV_FXS_TEST_DONE,0, 0);
+ }
+}
+
+void SiSendResultRes(Port_t *pPort, ProSLICMLTType *pMlt)
+{
+ signed long temp;
+
+ temp = pMlt->resFaults.measTR;
+ USLPUT2("tr = %ld.%ld Ohm\n",temp/10, temp % 10);
+ temp = pMlt->resFaults.measRG;
+ USLPUT2("rg = %ld.%ld Ohm\n",temp/10, temp % 10);
+ temp = pMlt->resFaults.measTG;
+ USLPUT2("tg = %ld.%ld Ohm\n",temp/10, temp % 10);
+ pPort->stLineTestPara.pstResult->res_tr = pMlt->resFaults.measTR/10;
+ pPort->stLineTestPara.pstResult->res_tg = pMlt->resFaults.measTG/10;
+ pPort->stLineTestPara.pstResult->res_rg = pMlt->resFaults.measRG/10;
+
+ usrline_report(pPort->stLineTestPara.pstResult->port, EV_FXS_TEST_DONE, 0, 0);
+}
+
+void SiSendResultDCFeedSt( Port_t *pPort )
+{
+ signed long data = 0, temp = 0;
+ long long vtr = 0, iloop = 0;
+
+ temp = ctrl_ReadRAMWrapper(pPort->ProObj->deviceId->ctrlInterface->hCtrl,pPort->ProObj->channel,SI3217X_COM_RAM_MADC_ILOOP);
+ USLPUT2(" battary %ld.\n", temp);
+ data = ChangeData(temp);
+
+ iloop = data;
+ iloop = iloop * 1676;
+ USLPUT2(" iloop %lld \n", iloop);
+ data = lldivde( iloop, 1000000000); /* mA */
+ USLPUT2(" iloop %ld \n", data);
+ pPort->stLineTestPara.pstResult->loop_curent = data;
+
+ temp = ctrl_ReadRAMWrapper(pPort->ProObj->deviceId->ctrlInterface->hCtrl,pPort->ProObj->channel,SI3217X_COM_RAM_VDIFF_SENSE);
+ data = ChangeData(temp);
+
+ vtr = data;
+ vtr = vtr * 931323;
+ USLPUT2(" Vol %lld \n", vtr);
+ data = lldivde( vtr, 1000000000 ); /* mV */
+ USLPUT2(" Vol %ld \n", data);
+
+ if( 0 != pPort->stLineTestPara.pstResult->loop_curent )
+ {
+ pPort->stLineTestPara.pstResult->loop_res = longfabs(data/pPort->stLineTestPara.pstResult->loop_curent);
+ }
+ else
+ {
+ pPort->stLineTestPara.pstResult->loop_res = 100000000;/* consider the res as 100M ohm */
+ }
+
+ if(TI_InLoopCurrent == pPort->stLineTestPara.si_item)
+ {
+ pPort->stLineTestPara.pstResult->loop_res = 0;
+ }
+
+ usrline_report(pPort->stLineTestPara.pstResult->port,EV_FXS_TEST_DONE,0,0);
+}
+
+void SiSendResultBatteryVol(Port_t *pPort)
+{
+ signed long data = 0, temp = 0;
+ long long vtr = 0;
+
+ temp = ctrl_ReadRAMWrapper(pPort->ProObj->deviceId->ctrlInterface->hCtrl,pPort->ProObj->channel,SI3217X_COM_RAM_MADC_VBAT);
+ USLPUT2(" battary %ld.%d\n", temp, sizeof(temp));
+ data = ChangeData(temp);
+ USLPUT2(" battary %ld.\n", data);
+ vtr = data;
+ vtr = vtr * 931323;
+ USLPUT2(" vtr %lld.\n", vtr);
+ data = lldivde( vtr, 1000000000 ); /* mV */
+
+ pPort->stLineTestPara.pstResult->battary = data;
+ USLPUT2(" battary %ld.\n", data);
+ usrline_report(pPort->stLineTestPara.pstResult->port, EV_FXS_TEST_DONE,0,0);
+}
+
+void SiSendResultHook( Port_t *pPort )
+{
+ if( pPort->hook_state == HOOKOFF )
+ {
+ pPort->stLineTestPara.pstResult->user_flg = 1;
+ }
+ else
+ {
+ pPort->stLineTestPara.pstResult->user_flg = 0;
+ }
+
+ usrline_report(pPort->stLineTestPara.pstResult->port,EV_FXS_TEST_DONE,0,0);
+}
+
+void SiSendResultRingtouser( Port_t *pPort )
+{
+ long data = 0, vtr = 0;
+ long long temp = 0, vtr2 = 0;
+ u8 i = 0;
+
+ for( i = 0; i < MAX_RING_CNT; i++ )
+ {
+ data = ChangeData(RingVol[i]);
+ temp = data;
+ temp = temp * 931323;
+ USLPUT2("Ring[%d] = %ld, tem %lld\n", i, data, temp);
+
+ data = lldivde( temp, 1000000000 );
+ USLPUT2("Ring[%d] = %ld\n", i, data);
+ vtr += data;
+ vtr2 += data;
+ }
+ USLPUT2("vtr = %ld, vtr2 = %lld\n", vtr, vtr2);
+ vtr = vtr * 1000 / MAX_RING_CNT/ 1414;
+
+ pPort->stLineTestPara.pstResult->ring_vol = vtr;
+ USLPUT2(" vol %ld.\n", vtr);
+ usrline_report(pPort->stLineTestPara.pstResult->port,EV_FXS_TEST_DONE,0,0);
+}
+
+void SiRen( Port_t *pPort, ProSLICMLTType *pMlt )
+{
+ USLPUT2(" REN %d.\n", pMlt->ren.renValue);
+ pPort->stLineTestPara.pstResult->ren = pMlt->ren.renValue;
+ if(TI_LineConnect == pPort->stLineTestPara.pstResult->item)
+ {
+ pPort->stLineTestPara.pstResult->user_flg = pPort->hook_state;
+ USLPUT2(" user_flg %d.\n", pPort->stLineTestPara.pstResult->user_flg);
+ }
+
+ usrline_report(pPort->stLineTestPara.pstResult->port,EV_FXS_TEST_DONE,0,0);
+}
+
+
+long ChangeData(unsigned long n)
+{
+ long t = 0;
+ unsigned long m = 0;
+
+ if( 0x1 & n>>28 )
+ {
+ m = (~n & 0x1fffffff) + 1;
+ t = -m;
+ }
+ else
+ {
+ t = n;
+ }
+
+ return t;
+}
+
+
+long lldivde(long long x, long y)
+{
+ int s = 1;
+ long n = 0;
+ long long m = 0;
+
+ m = x;
+
+ if( m < 0 )
+ {
+ s = -1;
+ m = -m;
+ }
+
+ while(1)
+ {
+ m = m - y ;
+ if( m < 0 ) break;
+ n++;
+ }
+
+ return n*s ;
+}
+
+long longfabs( long x )
+{
+ if( x < 0 ) return -x;
+
+ return x;
+}
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_adt.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_adt.h
new file mode 100644
index 0000000..90fb20d
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_adt.h
@@ -0,0 +1,263 @@
+#ifndef _SI_ADT_H
+#define _SI_ADT_H
+
+#include "proslic.h"
+#include "si3217x_intf.h"
+#include "proslic_mlt.h"
+#include "proslic_mlt_math.h"
+
+#define DEBUG_SLIC_ON
+
+#if 0
+/* Basic info of the Si3217x chip */
+#define NUMBER_OF_DEVICES 1
+#define NUMBER_OF_PROSLIC NUMBER_OF_DEVICES
+#define CHAN_PER_DEVICE 1
+#define NUMBER_OF_CHAN (NUMBER_OF_DEVICES*CHAN_PER_DEVICE)
+#endif
+/* Basic info of the Si3217x chip */
+#define MAX_PORT_NUM 1 /* max port num */
+
+#if 0
+#define PROSLIC_DEVICE_TYPE SI3217X
+#define PROSLIC_TG_TIMER_ENABLED 1
+#define PROSLIC_TG_TIMER_DISABLED 0
+#endif
+
+/* slic line state */
+#define N_STATES 4 /* all phone state */
+#define HOOKON 0 /* had HookOn */
+#define HOOKOFFING 1 /* HookOn turn to HookOff. no finish */
+#define HOOKOFF 2 /* had HookOff */
+#define HOOKONING 3 /* HookOff turn to HookOn. no finish */
+
+/* slic line event */
+#define EV_LOW 0 /* onhook */
+#define EV_HIGH 1 /* offhook */
+#define PULSE_FILTER_TIME 1
+#define FLASH_EV_FLG 0x80
+
+/* daa line event */
+#define EV_RING_ON 1
+#define EV_RING_OFF 0
+#define EV_DAA_HOOK_ON 0
+#define EV_DAA_HOOK_OFF 1
+
+#if 0
+#define MAX_IRQS_NUM 36
+
+#define CHIP_ZARLINK 0
+#define CHIP_SILICONLAB 1
+#endif
+
+#define MAX_RING_CNT 20
+#define MAX_TEST_TIMEOUT 6000 /* 1 Min */
+
+#if 0
+/* power manage for slic */
+#define NORMAL_POWER 0
+#define NO_BATTARY 1
+#define LOW_POWER 2
+#define SHUT_DOWN_POWER 3
+#endif
+
+/******** webÒ³ÃæÅäÖà slicµçÆø²ÎÊý ********/
+#define ELEC_HOOKON_VOLTAGE (1<<0)
+#define ELEC_LOOP_CURRENT (1<<1)
+#define ELEC_RING_VPK (1<<2)
+
+#define MAX_RING_VPK 87
+#define MIN_RING_VPK 63
+#define MAX_LOOP_CUR 33
+#define MIN_LOOP_CUR 18
+#define MAX_OPENCIRCUIT_VOL 60
+#define MIN_OPENCIRCUIT_VOL 48
+
+/*
+ Ó¦Óó¡¾°£º¶ÌÏßµ¥²¿»°»ú 0
+ ¶ÌÏ߶ಿ»°»ú²¢»ú 1
+ ³¤Ïß 2
+ ³ö³§ÅäÖà 3
+ ×Ô¶¨Ò峡¾° 4
+*/
+enum {
+ DB_SLC_SINGLEPHONE_SHORTLOOP = 0,
+ DB_SLC_MULTIPHONES_SHORTLOOP = 1,
+ DB_SLC_LONGLOOP = 2,
+ DB_SLC_ORIGINAL_FACTORY = 3,
+ DB_SLC_CUSTOMIZED = 4
+};
+
+typedef struct
+{
+ u8 bCusRingVpk;
+ u8 bCusDcVol;
+ u8 bCusDcLoopCurr;
+}ELECTRIC_CFG_CUSTOMIZED;
+/*************************************/
+
+#define DC_VOLTAGE_48V 48 /* 48V */
+#define DC_VOLTAGE_52V 52 /* 52V */
+
+#define DC_CURRENT_20MA 20 /* 20mA */
+#define DC_CURRENT_24MA 24 /* 24mA */
+#define DC_CURRENT_28MA 28 /* 28mA */
+#define DC_CURRENT_32MA 32 /* 32mA */
+
+#define RING_VOLTAGE_55VPK 55 /* 40vrms */
+#define RING_VOLTAGE_65VPK 65 /* 45vrms */
+#define RING_VOLTAGE_70VPK 70 /* 50vrms */
+#define RING_VOLTAGE_75VPK 75 /* 55vrms */
+#define RING_VOLTAGE_85VPK 85 /* 60vrms */
+
+
+typedef struct
+{
+ u8 flg; /* chip select */
+ u8 cs; /* chip select */
+ u8 chan; /* channel */
+ u8 port; /* logic port */
+ u8 type; /* */
+ u8 tx; /* tx tm */
+ u8 rx; /* rx tm */
+}USL_PORT_MAP;
+
+typedef struct
+{
+ /* slic config */
+ u16 hookoffmin; /* HookOn-> HookOff complete time */
+ u16 hookonmin; /* HookOff-> HookOn complete time */
+ u16 prehookoff; /* HookOn->Pre Hookoff complete time */
+
+ u16 flash_low_min; /* low electric min time for Flash check */
+ u16 flash_low_max;
+
+ u16 flash_high_fix; /* fix high electric interval len */
+
+ u16 dial_high_min; /* high electric interval min for dial check */
+ u16 dial_high_max;
+
+ u16 dial_low_min; /* low electric interval min for dial check */
+ u16 dial_low_max; /* low electric interval max for dial check */
+
+ u16 RingQueneDelay;
+} USL_CONFIG;
+
+typedef struct
+{
+ ProSLICMLTType Mlt;
+ ProSLIC_mlt_foreign_voltages_state vState;
+ ProSLIC_mlt_rmeas_state rMeas;
+ ProSLIC_mlt_capacitance_state CapState;
+ ProSLIC_mlt_ren_state RenState;
+} ProSLICMLT;
+
+typedef struct
+{
+ u8 test_flg; /* 112 test flg,if it isn't 0, it is undering line test. */
+ u8 si_item; /* 112 test item */
+ u16 cnt; /* 112 scan counter */
+ ProSLICMLT *pstMlt; /* temp value in testing */
+ TestResult_t *pstResult; /* 112 test result pointer */
+} LINE_TEST_PARA;
+
+typedef enum
+{
+ NOPTC = 0,
+ HAVEPTC = 1,
+} PTCDATA;
+
+typedef struct
+{
+ u8 bPort;
+ u8 bCusRingVpk;
+ u8 bCusDcVol;
+ u8 bCusDcLoopCurr;
+ u8 bLineOpen100msEn;
+ u8 bDisablePowerSave;
+ u32 dwImpe;
+ s32 i32Rxgain; /* from dsp to slic D-A */
+ s32 i32Txgain; /* from slic to dsp A-D */
+} SLCINF_CFG;
+
+typedef struct
+{
+ PTCDATA ePTC;
+ u32 generel_cfg;
+ u32 ring;
+ u32 dc;
+ u32 tone;
+ u32 Impe;
+ u32 meter;
+ u8 bLineOpen100msEn;
+ u8 bDisablePowerSave;
+ u8 a_u_law;
+ u8 cid;
+ u8 linestaus;
+ u8 wide;
+ u32 offset;
+ s32 rxgain; /* from dsp to slic D-A */
+ s32 txgain; /* from slic to dsp A-D */
+}SILAB_CFG_CHIP_t;
+
+typedef struct {
+ u8 hook_state; /* µ±Ç°Ïß·ժ¹Ò»ú״̬ */
+ u8 pulse_dig; /* Âö³åÊպźÅÂë»òÕßÅŲæ»É */
+ u8 bDialEn; /* Âö³åÊÕºÅʹÄÜ */
+ u32 low_len; /* ¹Ò»úʱ¼ä¼ÆÊý */
+ u32 high_len; /* Õª»úʱ¼ä¼ÆÊý */
+
+ USL_CONFIG stUslConf; /* time para */
+ SILAB_CFG_CHIP_t *pPreCfg; /* board chip cfg */
+ LINE_TEST_PARA stLineTestPara;
+ proslicChanType_ptr ProObj; /* Ö¸ÏòоƬ½á¹¹ÌåµÄÖ¸Õë */
+}Port_t;
+
+typedef enum {
+ NONE = 0,
+ RINGING = 1,
+ PLAYING_TONE = 2,
+} slic_state;
+
+
+typedef enum {
+ A_LAW_INVENT_NONE = 0,
+ U_LAW = 1,
+ LINEAR_CODEC = 2,
+} E_A_U_LAW;
+
+typedef struct {
+ ramData slope_vlim;
+ ramData slope_rfeed;
+ ramData slope_ilim;
+ ramData delta1;
+ ramData delta2;
+ ramData v_vlim;
+ ramData v_rfeed;
+ ramData v_ilim;
+ ramData const_rfeed;
+ ramData const_ilim;
+ ramData i_vlim;
+} Si3217x_Shot_DCfeed_Cfg;
+
+typedef struct {
+ ramData amp;
+ ramData rtacth;
+ ramData vbatr_expect;
+ ramData vcm_ring;
+ ramData vcm_ring_fixed;
+} Si3217x_Shot_Ring_Cfg;
+
+/* init BoardParmCfg para based boardtype */
+void SlicCfgParaBasedBoardType(void);
+
+/* init impendence cfg */
+void slic_inf_precfg(SLCINF_CFG *ptCfg);
+
+/* init the slic chip */
+int InitSlicChip(void);
+
+/* deinit the slic chip */
+void DeinitSlicChip(void);
+
+#endif /* _SI_ADT_H */
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic.h
new file mode 100644
index 0000000..dd5bdd5
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic.h
@@ -0,0 +1,2566 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: proslic.h 5485 2016-01-19 00:47:25Z nizajerk $
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the ProSLIC driver.
+**
+*/
+
+#ifndef PROSLIC_H
+#define PROSLIC_H
+
+/*include all the required headers*/
+#include "proslic_api_config.h"
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "si_voice.h"
+
+#define SILABS_UNREFERENCED_PARAMETER(param) (void)param
+
+/* UNSORTED ADDITIONS - These common parameters have been moved from
+ the drivers to here to support simultaneous compile of multiple devices
+ */
+/* Patch Parameters */
+#define PATCH_NUM_LOW_ENTRIES 8
+#define PATCH_NUM_HIGH_ENTRIES 8
+#define PATCH_MAX_SUPPORT_RAM 128
+#define PATCH_MAX_SIZE 1024
+
+#define PROSLIC_RAM_RAM_MADC_VBAT 3
+#define PROSLIC_RAM_PATCHID 448
+#define PROSLIC_RAM_VERIFY_IO 449
+#define PROSLIC_RAM_PD_DCDC 1538
+#define PROSLIC_RAM_PRAM_ADDR 1358
+#define PROSLIC_RAM_PRAM_DATA 1359
+#define PATCH_JMPTBL_HIGH_ADDR 1597
+
+/* Common register values for 17x, 26x, 18x & 28x */
+#define PROSLIC_REG_ID 0
+#define PROSLIC_REG_RESET 1
+#define PROSLIC_REG_MSTRSTAT 3
+#define PROSLIC_REG_RAM_ADDR_HI 5
+#define PROSLIC_REG_PCMMODE 11
+#define PROSLIC_REG_PCMTXLO 12
+#define PROSLIC_REG_PCMTXHI 13
+#define PROSLIC_REG_PCMRXLO 14
+#define PROSLIC_REG_PCMRXHI 15
+#define PROSLIC_REG_IRQEN1 22
+#define PROSLIC_REG_IRQEN4 25
+#define PROSLIC_REG_CALR0 26
+#define PROSLIC_REG_CALR3 29
+#define PROSLIC_REG_IRQ 16
+#define PROSLIC_REG_IRQ0 17
+#define PROSLIC_REG_IRQ1 18
+#define PROSLIC_REG_IRQ4 21
+#define PROSLIC_REG_LINEFEED 30
+#define PROSLIC_REG_POLREV 31
+#define PROSLIC_REG_LCRRTP 34
+#define PROSLIC_REG_RINGCON 38
+#define PROSLIC_REG_RINGTALO 39
+#define PROSLIC_REG_RINGTAHI 40
+#define PROSLIC_REG_RINGTILO 41
+#define PROSLIC_REG_RINGTIHI 42
+#define PROSLIC_REG_LOOPBACK 43
+#define PROSLIC_REG_DIGCON 44
+#define PROSLIC_REG_ZCAL_EN 46
+#define PROSLIC_REG_ENHANCE 47
+#define PROSLIC_REG_OMODE 48
+#define PROSLIC_REG_OCON 49
+#define PROSLIC_REG_O1TALO 50
+#define PROSLIC_REG_O1TAHI 51
+#define PROSLIC_REG_O1TILO 52
+#define PROSLIC_REG_O1TIHI 53
+#define PROSLIC_REG_O2TALO 54
+#define PROSLIC_REG_O2TAHI 55
+#define PROSLIC_REG_O2TILO 56
+#define PROSLIC_REG_O2TIHI 57
+#define PROSLIC_REG_FSKDAT 58
+#define PROSLIC_REG_FSKDEPTH 59
+#define PROSLIC_REG_TONDTMF 60
+#define PROSLIC_REG_USERSTAT 66
+#define PROSLIC_REG_GPIO 67
+#define PROSLIC_REG_PMCON 75
+#define PROSLIC_REG_AUTORD 80
+#define PROSLIC_REG_JMPEN 81
+#define PATCH_JMPTBL_START_ADDR 82
+#define PATCH_JMPTBL_LOW_ADDR 82
+#define PROSLIC_REG_USERMODE_ENABLE 126
+
+/* Common RAM locations for most ProSLICs */
+#define PROSLIC_RAM_OSC1FREQ 26
+#define PROSLIC_RAM_OSC1AMP 27
+#define PROSLIC_RAM_OSC1PHAS 28
+#define PROSLIC_RAM_OSC2FREQ 29
+#define PROSLIC_RAM_OSC2AMP 30
+#define PROSLIC_RAM_OSC2PHAS 31
+#define PROSLIC_RAM_FSKFREQ0 834
+#define PROSLIC_RAM_FSKFREQ1 835
+#define PROSLIC_RAM_FSKAMP0 836
+#define PROSLIC_RAM_FSKAMP1 837
+#define PROSLIC_RAM_FSK01 838
+#define PROSLIC_RAM_FSK10 839
+#define PROSLIC_RAM_CMDAC_FWD 1476
+#define PROSLIC_RAM_CMDAC_REV 1477
+#define PROSLIC_RAM_CAL_TRNRD_DACT 1458
+#define PROSLIC_RAM_CAL_TRNRD_DACR 1459
+#define PROSLIC_RAM_RDC_SUM 1499
+#define PROSLIC_RAM_DCDC_STATUS 1551
+
+#define PROSLIC_CHAN_BROADCAST 0xFF
+
+/* BOM Constants */
+#define BOM_KAUDIO_PM 0x8000000L
+#define BOM_KAUDIO_NO_PM 0x3A2E8BAL
+#define BOM_AC_ADC_GAIN_PM 0x151EB80L
+#define BOM_AC_ADC_GAIN_NO_PM 0x99999AL
+#define FIXRL_VDC_SCALE 0xAE924B9L /** vdc sense scale when using fixed-rail */
+
+/* Generic Constants */
+#define COMP_5V 0x51EB82L
+#define VBATL_13V 0xF00000L
+#define COMP_10V 0xA3D705L
+#define ZCAL_V_RASUM_IDEAL_VAL 0x8F00000L
+#define ZCAL_DC_DAC_OS_VAL 0x1FFE0000L
+
+/* MADC Constants */
+#define SCALE_V_MADC 1074 /* 1/(1000*931.32e-9) mV */
+#define SCALE_I_MADC 597 /* 1/(1e6*1.676e-9) uA */
+#define SCALE_P_MADC 2386 /* 1/(1e3*419.095e-9) mW */
+
+/* Calibration Constants */
+#define CAL_LB_CMDAC 0x0C
+#define CAL_LB_TRNRD 0x03
+#define CAL_LB_ALL 0x0F
+#define TIMEOUT_MADC_CAL 100
+#define TIMEOUT_GEN_CAL 300
+#define TIMEOUT_LB_CAL 2410
+
+/* MWI Constants */
+#define SIL_MWI_USTAT_SET 0x04
+#define SIL_MWI_USTAT_CLEAR 0xFB
+#define SIL_MWI_TOGGLE_HIGH 0x0F
+#define SIL_MWI_TOGGLE_LOW 0x00
+#define SIL_MWI_VPK_MAX 110
+#define SIL_MWI_VPK_MIN 80
+#define SIL_MWI_LCRMASK_MAX 2000
+#define SIL_MWI_LCRMASK_MIN 5
+#define SIL_MWI_LCRMASK_SCALE 65536
+#define SIL_MWI_FLASH_OFF 0
+#define SIL_MWI_FLASH_ON 1
+
+/* Depricated functions now mapped directly to SiVoice versions... */
+
+#define ProSLIC_clearErrorFlag SiVoice_clearErrorFlag
+#define ProSLIC_createChannel SiVoice_createChannel
+#define ProSLIC_createControlInterface SiVoice_createControlInterface
+#define ProSLIC_createDevice SiVoice_createDevice
+#define ProSLIC_destroyChannel SiVoice_destroyChannel
+#define ProSLIC_destroyControlInterface SiVoice_destroyControlInterface
+#define ProSLIC_destroyDevice SiVoice_destroyDevice
+#define ProSLIC_getChannelEnable SiVoice_getChannelEnable
+#define ProSLIC_getErrorFlag SiVoice_getErrorFlag
+#define ProSLIC_Reset SiVoice_Reset
+#define ProSLIC_setChannelEnable SiVoice_setChannelEnable
+#define ProSLIC_setControlInterfaceCtrlObj SiVoice_setControlInterfaceCtrlObj
+#define ProSLIC_setControlInterfaceDelay SiVoice_setControlInterfaceDelay
+#define ProSLIC_setControlInterfaceGetTime SiVoice_setControlInterfaceGetTime
+#define ProSLIC_setControlInterfaceReadRAM SiVoice_setControlInterfaceReadRAM
+#define ProSLIC_setControlInterfaceReadRegister SiVoice_setControlInterfaceReadRegister
+#define ProSLIC_setControlInterfaceReset SiVoice_setControlInterfaceReset
+#define ProSLIC_setControlInterfaceSemaphore SiVoice_setControlInterfaceSemaphore
+#define ProSLIC_setControlInterfaceTimeElapsed SiVoice_setControlInterfaceTimeElapsed
+#define ProSLIC_setControlInterfaceTimerObj SiVoice_setControlInterfaceTimerObj
+#define ProSLIC_setControlInterfaceWriteRAM SiVoice_setControlInterfaceWriteRAM
+#define ProSLIC_setControlInterfaceWriteRegister SiVoice_setControlInterfaceWriteRegister
+#define ProSLIC_setSWDebugMode SiVoice_setSWDebugMode
+#define ProSLIC_SWInitChan SiVoice_SWInitChan
+#define ProSLIC_Version SiVoice_Version
+#define ProSLIC_ReadReg SiVoice_ReadReg
+#define ProSLIC_WriteReg SiVoice_WriteReg
+#define ProSLIC_ShutdownChannel ProSLIC_PowerDownConverter
+#define SI_MAX_INTERRUPTS 4
+
+#define PROSLIC_EXTENDED_GAIN_MAX 9
+#define PROSLIC_GAIN_MAX 6
+#define PROSLIC_GAIN_MIN -30
+/*
+** Initialization Sequence Location - Used by 18x & 17x
+*/
+typedef enum
+{
+ INIT_SEQ_BEGINNING,
+ INIT_SEQ_READ_ID,
+ INIT_SEQ_PRE_PATCH_LOAD,
+ INIT_SEQ_POST_PATCH_LOAD,
+ INIT_SEQ_PRE_CAL,
+ INIT_SEQ_POST_CAL,
+ INIT_SEQ_END
+} initSeqType;
+
+/** @mainpage
+ * This document is a supplement to the ProSLIC API Specification. It has most
+ * of the APIs documented and hyperlinked.
+ *
+ * This document has the following tabs:
+ *
+ * - Main Page (this page) - introduction to the document.
+ * - Related pages - mainly the deprecated list is located here.
+ * Although these identifiers are present in the current release, they are
+ * targeted for deletion in a future release. Any existing customer code
+ * using deprecated identifiers should be modified as indicated.
+ * - Modules - this is the meat of the document - this has each functional group in outline format listed here.
+ * - Data Structures - This has every data structure listed in in the ProSLIC API in alphabetical order.
+ * - Files - this has the source files in hyperlink format. @note In some cases the hyperlink generator will not properly
+ * generate the correct reference or not be able to find it. In this case please use an alternative method.
+ *
+ */
+
+/** @defgroup PROSLIC_TYPES ProSLIC General Datatypes/Function Definitions
+ * This section documents functions and data structures related to the
+ * ProSLIC/FXS chipsets.
+ * @{
+ */
+
+/*
+* ----------------ProSLIC Generic DataTypes/Function Definitions----
+**********************************************************************
+*/
+
+#define MAX_PROSLIC_IRQS 32 /**< How many interrupts are supported in the ProSLIC */
+
+#ifdef ENABLE_DEBUG
+#define PROSLIC_PRINT_ERROR(CHAN, ERROR)\
+ LOGPRINT("%sError encountered on channel: %d fault code: %d\n",\
+ LOGPRINT_PREFIX, (CHAN)->channel, (ERROR))
+#else
+#define PROSLIC_PRINT_ERROR(CHAN, ERROR)
+#endif
+
+/**********************************************************************/
+/**
+* Map Proslic types to SiVoice types
+*/
+typedef SiVoiceControlInterfaceType
+controlInterfaceType; /**< Map ProSLIC to SiVoice type */
+typedef SiVoiceControlInterfaceType
+proslicControlInterfaceType; /**< Map ProSLIC to SiVoice type */
+typedef SiVoiceDeviceType ProslicDeviceType; /**< Map ProSLIC to SiVoice type */
+typedef SiVoiceChanType proslicChanType; /**< Map ProSLIC to SiVoice type */
+
+/**
+* Define channel and device type pointers
+*/
+typedef ProslicDeviceType
+*proslicDeviceType_ptr; /**< Shortcut for pointer to a ProSLIC device type */
+typedef proslicChanType
+*proslicChanType_ptr; /**< Shortcut for pointer to a ProSLIC channel type */
+
+/** @} PROSLIC_TYPES */
+
+/** @addtogroup HC_DETECT
+ * @{
+ */
+
+/**
+* This is structure used to store pulse dial information
+*/
+#define SI_HC_NO_ACTIVITY 0x10
+#define SI_HC_NEED_MORE_POLLS 0x20
+#define SI_HC_ONHOOK_TIMEOUT 0x41
+#define SI_HC_OFFHOOK_TIMEOUT 0x42
+#define SI_HC_HOOKFLASH 0x43
+
+#define SI_HC_NONDIGIT_DONE(X) ((X) & 0x40)
+#define SI_HC_DIGIT_DONE(X) ((X) && ((X) < 11))
+
+typedef struct
+{
+ uInt8 currentPulseDigit;
+ uInt8 last_hook_state;
+ uInt8 lookingForTimeout;
+ uInt8 last_state_reported;
+ void *hookTime; /**< Timestamp for when the onhook detection occurred */
+} hookChangeType;
+
+/**
+* Defines structure for configuring hook change detection. Times are in mSec.
+*/
+typedef struct
+{
+ uInt16 minOnHook; /**< Min mSec for onhook/break time */
+ uInt16 maxOnHook; /**< Max mSec for onhook/break time */
+ uInt16 minOffHook; /**< Min mSec for offhook/make time */
+ uInt16 maxOffHook; /**< Max mSec for offhook/make time */
+ uInt16 minInterDigit; /**< Minimum interdigit time */
+ uInt16 minHookFlash; /**< minimum hook flash time */
+ uInt16 maxHookFlash; /**< maximum hook flash time */
+ uInt16 minHook; /**< Minimum hook time, which should be >> than maxHookFlash */
+} hookChange_Cfg;
+/** @} HC_DETECT*/
+
+
+/** @addtogroup PROSLIC_INTERRUPTS
+ * @{
+ */
+/**
+* Interrupt tags
+*/
+
+typedef enum
+{
+ IRQ_OSC1_T1,
+ IRQ_OSC1_T2,
+ IRQ_OSC2_T1,
+ IRQ_OSC2_T2,
+ IRQ_RING_T1,
+ IRQ_RING_T2,
+ IRQ_PM_T1,
+ IRQ_PM_T2,
+ IRQ_FSKBUF_AVAIL, /**< FSK FIFO depth reached */
+ IRQ_VBAT,
+ IRQ_RING_TRIP, /**< Ring Trip detected */
+ IRQ_LOOP_STATUS, /**< Loop Current changed */
+ IRQ_LONG_STAT,
+ IRQ_VOC_TRACK,
+ IRQ_DTMF, /**< DTMF Detected - call @ref ProSLIC_DTMFReadDigit to decode the value */
+ IRQ_INDIRECT, /**< Indirect/RAM access completed */
+ IRQ_TXMDM,
+ IRQ_RXMDM,
+ IRQ_PQ1, /**< Power alarm 1 */
+ IRQ_PQ2, /**< Power alarm 2 */
+ IRQ_PQ3, /**< Power alarm 3 */
+ IRQ_PQ4, /**< Power alarm 4 */
+ IRQ_PQ5, /**< Power alarm 5 */
+ IRQ_PQ6, /**< Power alarm 6 */
+ IRQ_RING_FAIL,
+ IRQ_CM_BAL,
+ IRQ_USER_0,
+ IRQ_USER_1,
+ IRQ_USER_2,
+ IRQ_USER_3,
+ IRQ_USER_4,
+ IRQ_USER_5,
+ IRQ_USER_6,
+ IRQ_USER_7,
+ IRQ_DSP,
+ IRQ_MADC_FS,
+ IRQ_P_HVIC,
+ IRQ_P_THERM, /**< Thermal alarm */
+ IRQ_P_OFFLD
+} ProslicInt;
+
+/**
+* Defines structure of interrupt data - used by @ref ProSLIC_GetInterrupts
+*/
+typedef struct
+{
+ ProslicInt
+ *irqs; /**< Pointer of an array of size MAX_PROSLIC_IRQS (this is to be allocated by the caller) */
+ uInt8 number; /**< Number of IRQs detected/pending */
+} proslicIntType;
+
+
+/** @} PROSLIC_INTERRUPTS */
+
+/** @addtogroup TONE_GEN
+ * @{
+ */
+/**
+* Defines structure for configuring 1 oscillator - see your data sheet for specifics or use the configuration
+* tool to have this filled in for you.
+*/
+typedef struct
+{
+ ramData freq;
+ ramData amp;
+ ramData phas;
+ uInt8 talo;
+ uInt8 tahi;
+ uInt8 tilo;
+ uInt8 tihi;
+} Oscillator_Cfg;
+
+/**
+ * Defines structure for tone configuration.
+ */
+typedef struct
+{
+ Oscillator_Cfg osc1;
+ Oscillator_Cfg osc2;
+ uInt8 omode;
+} ProSLIC_Tone_Cfg;
+
+typedef struct
+{
+ ramData fsk[2];
+ ramData fskamp[2];
+ ramData fskfreq[2];
+ uInt8 eightBit;
+ uInt8 fskdepth;
+} ProSLIC_FSK_Cfg;
+/** @} TONE_GEN */
+
+/*****************************************************************************/
+/** @addtogroup SIGNALING
+ * @{
+ */
+/**
+* Hook states - returned by @ref ProSLIC_ReadHookStatus()
+*/
+enum
+{
+ PROSLIC_ONHOOK, /**< Hook state is onhook */
+ PROSLIC_OFFHOOK /**< Hook state is offhook */
+};
+
+#ifndef SIVOICE_CFG_NEWTYPES_ONLY
+enum
+{
+ ONHOOK = PROSLIC_ONHOOK, /**< @deprecated- Please use PROSLIC_ONHOOK and PROSLIC_OFFHOOK for future code development */
+ OFFHOOK = PROSLIC_OFFHOOK
+};
+#endif
+
+/** @} SIGNALING */
+
+/*****************************************************************************/
+/** @addtogroup PCM_CONTROL
+ * @{
+* Loopback modes
+*/
+typedef enum
+{
+ PROSLIC_LOOPBACK_NONE, /**< Loopback disabled */
+ PROSLIC_LOOPBACK_DIG, /**< Loopback is toward the PCM side */
+ PROSLIC_LOOPBACK_ANA /**< Loopback is toward the analog side */
+} ProslicLoopbackModes;
+
+/**
+* Mute options - which direction to mute
+*/
+typedef enum
+{
+ PROSLIC_MUTE_NONE = 0, /**< Don't mute */
+ PROSLIC_MUTE_RX = 0x1, /**< Mute toward the RX side */
+ PROSLIC_MUTE_TX = 0x2, /**< Mute toward the TX side */
+ PROSLIC_MUTE_ALL = 0x3 /**< Mute both directions */
+} ProslicMuteModes;
+
+/** @} PCM_CONTROL */
+
+/*****************************************************************************/
+/** @addtogroup GAIN_CONTROL
+ * @{
+* Path Selector
+*/
+enum
+{
+ TXACGAIN_SEL = 0,
+ RXACGAIN_SEL = 1
+};
+
+
+/*
+** Defines structure for configuring audio gain on the fly
+*/
+typedef struct
+{
+ ramData acgain;
+ uInt8 mute;
+ ramData aceq_c0;
+ ramData aceq_c1;
+ ramData aceq_c2;
+ ramData aceq_c3;
+} ProSLIC_audioGain_Cfg;
+
+/** @} GAIN_CONTROL */
+
+/*****************************************************************************/
+/** @addtogroup LINESTATUS
+ * @{
+ */
+/**
+* enumeration of the Proslic polarity reversal states - used by ProSLIC_PolRev API
+*/
+enum
+{
+ POLREV_STOP, /**< Stop Polarity reversal */
+ POLREV_START, /**< Start Polarity reversal */
+ WINK_START, /**< Start Wink */
+ WINK_STOP /**< Stop Wink */
+};
+
+/**
+* Defines initialization data structures
+* Linefeed states - used in @ref ProSLIC_SetLinefeedStatus and @ref ProSLIC_SetLinefeedStatusBroadcast
+*/
+enum
+{
+ LF_OPEN, /**< Open circuit */
+ LF_FWD_ACTIVE, /**< Forward active */
+ LF_FWD_OHT, /**< Forward active, onhook transmission (used for CID/VMWI) */
+ LF_TIP_OPEN, /**< Tip open */
+ LF_RINGING, /**< Ringing */
+ LF_REV_ACTIVE, /**< Reverse battery/polarity reversed, active */
+ LF_REV_OHT, /**< Reverse battery/polarity reversed, active, onhook transmission (used for CID/VMWI) */
+ LF_RING_OPEN /**< Ring open */
+} ;
+/** @} LINESTATUS */
+
+
+
+
+/*****************************************************************************/
+/** @addtogroup GEN_CFG
+ * @{
+ */
+
+/**
+* Defines initialization data structures
+*/
+typedef struct
+{
+ uInt8 address;
+ uInt8 initValue;
+} ProslicRegInit;
+
+typedef struct
+{
+ uInt16 address;
+ ramData initValue;
+} ProslicRAMInit;
+
+/**
+* ProSLIC patch object
+*/
+typedef struct
+{
+ const ramData *patchData; /**< 1024 max*/
+ const uInt16 *patchEntries; /**< 8 max */
+ const uInt32 patchSerial;
+ const uInt16 *psRamAddr; /**< 128 max */
+ const ramData *psRamData; /**< 128 max */
+} proslicPatch;
+
+/** @} GEN_CFG */
+
+
+/*****************************************************************************/
+/** @addtogroup RING_CONTROL
+ * @{
+ */
+/**
+* Ringing type options
+* Ringing type options - Trapezoidal w/ a Crest factor CF11= Crest factor 1.1 or sinusoidal.
+*/
+typedef enum
+{
+ ProSLIC_RING_TRAP_CF11,
+ ProSLIC_RING_TRAP_CF12,
+ ProSLIC_RING_TRAP_CF13,
+ ProSLIC_RING_TRAP_CF14,
+ ProSLIC_RING_TRAP_CF15,
+ ProSLIC_RING_TRAP_CF16,
+ ProSLIC_RING_SINE /***< Plain old sinusoidal ringing */
+} ProSLIC_RINGTYPE_T;
+
+/**
+* Ringing (provisioned) object
+*/
+typedef struct
+{
+ ProSLIC_RINGTYPE_T
+ ringtype; /**< Is this a sinusoid or a trapezoidal ring shape? */
+ uInt8 freq; /**< In terms of Hz */
+ uInt8 amp; /**< in terms of 1 volt units */
+ uInt8 offset; /**< In terms of 1 volt units */
+} ProSLIC_dbgRingCfg;
+
+
+/** @} RING_CONTROL */
+
+/*****************************************************************************/
+/**
+* Line Monitor - returned by @ref ProSLIC_LineMonitor
+*/
+typedef struct
+{
+ int32 vtr; /**< Voltage, tip-ring in mV */
+ int32 vtip; /**< Voltage, tip-ground in mV */
+ int32 vring; /**< Voltage, ring-ground in mV */
+ int32 vbat; /**< Voltage, battery in mV */
+ int32 vdc; /**< Voltage, Vdc in mV */
+ int32 vlong; /**< Voltage, longitudinal in mV */
+ int32 itr; /**< Loop current, in uA tip-ring */
+ int32 itip; /**< Loop current, in uA tip */
+ int32 iring; /**< Loop current, in uA ring */
+ int32 ilong; /**< Loop current, in uA longitudinal */
+ int32 p_hvic; /**< On-chip Power Calculation in mw */
+} proslicMonitorType;
+
+/*****************************************************************************/
+/** @addtogroup PROSLIC_DCFEED
+ * @{
+ */
+/**
+* Powersave
+*/
+enum
+{
+ PWRSAVE_DISABLE = 0, /**< Disable power savings mode */
+ PWRSAVE_ENABLE = 1 /**< Enable power savings mode */
+};
+
+/**
+** DC Feed Preset
+*/
+typedef struct
+{
+ ramData slope_vlim;
+ ramData slope_rfeed;
+ ramData slope_ilim;
+ ramData delta1;
+ ramData delta2;
+ ramData v_vlim;
+ ramData v_rfeed;
+ ramData v_ilim;
+ ramData const_rfeed;
+ ramData const_ilim;
+ ramData i_vlim;
+ ramData lcronhk;
+ ramData lcroffhk;
+ ramData lcrdbi;
+ ramData longhith;
+ ramData longloth;
+ ramData longdbi;
+ ramData lcrmask;
+ ramData lcrmask_polrev;
+ ramData lcrmask_state;
+ ramData lcrmask_linecap;
+ ramData vcm_oh;
+ ramData vov_bat;
+ ramData vov_gnd;
+} ProSLIC_DCfeed_Cfg;
+
+/** @} PROSLIC_DCFEED */
+
+/*****************************************************************************/
+/** @defgroup ProSLIC_API ProSLIC API
+* proslic.c function declarations
+* @{
+*/
+
+/*****************************************************************************/
+/** @defgroup DIAGNOSTICS Diagnostics
+ * The functions in this group allow one to monitor the line state for abnormal
+ * situations.
+ * @{
+ */
+
+/**
+* Test State - used in polled tests (such as PSTN Check)
+*/
+typedef struct
+{
+ int32 stage; /**< What state is the test in */
+ int32 waitIterations; /**< How many iterations to stay in a particular state */
+ int32 sampleIterations; /**< How many samples have been collected */
+} proslicTestStateType;
+
+/**
+ * @brief
+ * This function allows one to monitor the instantaneous voltage and
+ * loop current values seen on tip/ring.
+ *
+ * @param[in] pProslic - which channel should the data be collected from
+ * @param[in,out] *monitor - the data collected
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int ProSLIC_LineMonitor(proslicChanType_ptr pProslic,
+ proslicMonitorType *monitor);
+
+/**
+ * @brief
+ * This function reads the MADC a scaled value
+ *
+ * @param[in] pProslic - which channel should the data be collected from
+ * @param[in] addr - address to read from (MADC_ILOOP, MADC_ITIP, etc).
+ * @param[in] scale - scale to use (0 = determine based upon MADC address)
+ * @retval int32 - scaled value requested or -1 if not supported.
+ *
+ */
+
+int32 ProSLIC_ReadMADCScaled(proslicChanType_ptr pProslic, uInt16 addr,
+ int32 scale);
+
+/** @defgroup PSTN_CHECK PSTN Check
+ * Monitor for excessive longitudinal current, which
+ * would be present if a live pstn line was connected
+ * to the port. To operate these sets of functions:
+ *
+ * - Iniitalize the PSTN object by calling @ref ProSLIC_InitPSTNCheckObj
+ * - Poll at a constant rate and call @ref ProSLIC_PSTNCheck. Check the return code of this function.
+ *
+ * Alternatively, you can call the DiffPSTNCheck versions of the above two functions.
+ *
+ * @note These functions may be disabled by doing a undef of @ref PSTN_DET_ENABLE in the configuration file.
+ * @{
+*/
+#define MAX_ILONG_SAMPLES 32 /**< How many samples to collect for PSTN check */
+#define MAX_PSTN_SAMPLES 16 /**< Used in the PSTN check status code to indicate the number of samples to collect */
+
+/**
+* FEMF OPEN voltage test enable
+*/
+enum
+{
+ FEMF_MEAS_DISABLE, /**< Do not measure FEMF as part of PSTN Check */
+ FEMF_MEAS_ENABLE /**< Do measure FEMF as part of PSTN Check */
+};
+
+/** Standard line interfaces */
+typedef struct
+{
+ int32 avgThresh;
+ int32 singleThresh;
+ int32 ilong[MAX_ILONG_SAMPLES];
+ uInt8 count;
+ uInt8 samples;
+ int32 avgIlong;
+ BOOLEAN buffFull;
+} proslicPSTNCheckObjType;
+
+typedef proslicPSTNCheckObjType *proslicPSTNCheckObjType_ptr;
+
+
+/** Re-Injection line interfaces (differential) */
+typedef struct
+{
+ proslicTestStateType pState;
+ int dcfPreset1;
+ int dcfPreset2;
+ int entryDCFeedPreset;
+ uInt8 lfstate_entry;
+ uInt8 enhanceRegSave;
+ uInt8 samples;
+ int32 vdiff1[MAX_PSTN_SAMPLES];
+ int32 vdiff2[MAX_PSTN_SAMPLES];
+ int32 iloop1[MAX_PSTN_SAMPLES];
+ int32 iloop2[MAX_PSTN_SAMPLES];
+ int32 vdiff1_avg;
+ int32 vdiff2_avg;
+ int32 iloop1_avg;
+ int32 iloop2_avg;
+ int32 rl1;
+ int32 rl2;
+ int32 rl_ratio;
+ int femf_enable;
+ int32 vdiff_open;
+ int32 max_femf_vopen;
+ int return_status;
+} proslicDiffPSTNCheckObjType;
+
+typedef proslicDiffPSTNCheckObjType *proslicDiffPSTNCheckObjType_ptr;
+
+/** @}PSTN_CHECK */
+/** @}DIAGNOSTICS */
+/*****************************************************************************/
+/*
+** proslic.c function declarations
+*/
+
+/*****************************************************************************/
+/** @defgroup GEN_CFG General configuration
+ * @{
+ */
+
+/**
+ * @brief
+ * Loads patch and initializes all ProSLIC devices. Performs all calibrations except
+ * longitudinal balance.
+ *
+ * @param[in] hProslic - which channel(s) to initialize, if size > 1, then the start of the array
+ * of channels to be initialized.
+ * @param[in] size - the number of channels to initialize.
+ * @param[in] preset - general configuration preset to apply
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa ProSLIC_Init
+ */
+
+int ProSLIC_Init_MultiBOM (proslicChanType_ptr *hProslic, int size, int preset);
+
+/**
+ * @brief
+ * Loads patch and initializes all ProSLIC devices. Performs all calibrations except
+ * longitudinal balance.
+ *
+ * @param[in] hProslic - which channel(s) to initialize, if size > 1, then the start of the array
+ * of channels to be initialized.
+ * @param[in] size - the number of channels to initialize.
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_Init (proslicChanType_ptr *hProslic, int size);
+
+/**
+ * @brief
+ * Loads patch and initializes all ProSLIC devices. NOTE: not all chipsets support this API.
+ *
+ * @param[in] hProslic - which channel(s) to initialize, if size > 1, then the start of the array
+ * of channels to be initialized.
+ * @param[in] size - the number of channels to initialize.
+ * @param[in] option - see initOptionsType
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_Init_with_Options (proslicChanType_ptr *hProslic, int size,
+ int option);
+
+/**
+ * @brief
+ * Performs soft reset then calls ProSLIC_Init()
+ *
+ * @param[in] hProslic - which channel(s) to initialize, if size > 1, then the start of the array
+ * of channels to be initialized.
+ * @param[in] size - the number of channels to initialize.
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_Reinit (proslicChanType_ptr *hProslic, int size);
+
+/**
+ * @brief
+ * Loads registers and RAM in the ProSLICs specified.
+ *
+ * @param[in] pProslic - array of channels
+ * @param[in] pRamTable - array of RAM locations and values to write
+ * @param[in] pRegTable - array of register locations and values to write
+ * @param[in] size - number of ProSLICS to write to.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @deprecated This function should NOT be used since it can bypass the standard initialization/operational state of the
+ * ProSLIC.
+ */
+
+int ProSLIC_LoadRegTables (proslicChanType_ptr *pProslic,
+ ProslicRAMInit *pRamTable, ProslicRegInit *pRegTable, int size);
+
+/**
+ * @brief
+ * Configure impedance synthesis
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which impedance configuration to load from the constants file.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be disabled by @ref DISABLE_ZSYNTH_SETUP
+ */
+
+int ProSLIC_ZsynthSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * This function configures the CI bits (GCI mode)
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which GCI preset to use from the constants file
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be disabled by @ref DISABLE_CI_SETUP
+ */
+
+int ProSLIC_GciCISetup (proslicChanType_ptr hProslic,int preset);
+
+/*****************************************************************************/
+/** @defgroup PROSLIC_DEBUG Debug
+ * This group of functions enables/disables debug messages as well as dump
+ * register contents.
+ * @{
+ */
+
+
+/**
+ * @brief
+ * This function allows access to SPI read RAM function pointer from interface
+ *
+ * @param[in] pProslic - pointer to channel structure
+ * @param[in] addr - address to read
+ * @retval ramData - RAM contents
+ *
+ */
+ramData ProSLIC_ReadRAM (proslicChanType *pProslic, uInt16 addr);
+
+/**
+ * @brief
+ * This function allows access to SPI write RAM function pointer from interface
+ *
+ * @param[in] pProslic - pointer to channel structure
+ * @param[in] addr - address to write
+ * @param[in] data to be written
+ * @retval int - @ref RC_NONE
+ *
+ */
+int ProSLIC_WriteRAM (proslicChanType *pProslic, uInt16 addr, ramData data);
+
+/**
+ * @brief
+ * This function dumps to console the register contents of several
+ * registers and RAM locations.
+ *
+ * @param[in] pProslic - which channel to dump the register contents of.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+int ProSLIC_PrintDebugData (proslicChanType *pProslic);
+
+/**
+ * @brief
+ * This function dumps the registers to the console using whatever
+ * I/O method is defined by LOGPRINT
+ *
+ * @param[in] pProslic - which channel to dump the register contents of.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+int ProSLIC_PrintDebugReg (proslicChanType *pProslic);
+
+/**
+ * @brief
+ * This function dumps the RAM to the console using whatever
+ * I/O method is defined by LOGPRINT
+ *
+ * @param[in] pProslic - which channel to dump the RAM contents of.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+int ProSLIC_PrintDebugRAM (proslicChanType *pProslic);
+
+/** @} PROSLIC_DEBUG */
+/*****************************************************************************/
+/** @defgroup PROSLIC_ENABLE Enable/disable channels (for init)
+ * @{
+ */
+
+/**
+ * @brief
+ * This function sets the channel enable status of the FXO channel on ProSLIC devices
+ * with integrated FXO. If NOT set, then when
+ * the various initialization routines such as @ref SiVoice_SWInitChan is called,
+ * then this particular channel will NOT be initialized.
+ *
+ * This function does not access the chipset directly, so SPI/GCI
+ * does not need to be up during this function call.
+ *
+ * @param[in,out] pProslic - which channel to return the status.
+ * @param[in] enable - The new value of the channel enable field. 0 = NOT enabled, 1 = enabled.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_getChannelEnable
+ */
+
+int ProSLIC_SetDAAEnable(proslicChanType *pProslic, int enable);
+
+/** @} PROSLIC_ENABLE */
+
+/*****************************************************************************/
+/** @defgroup PROSLIC_PATCH Patch management.
+ * This group of functions write and verify the patch data needed by the
+ * ProSLIC chipset.
+ * @{
+ */
+
+/**
+ * @brief
+ * Calls patch loading function for a particular channel/ProSLIC
+ *
+ * @param[in] hProslic - which channel/ProSLIC should be patched
+ * @param[in] pPatch - the patch data
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function should not be called directly under normal circumstances since the initialization function should
+ * perform this operation.
+ *
+ * @sa ProSLIC_Init
+ */
+
+int ProSLIC_LoadPatch (proslicChanType_ptr hProslic,const proslicPatch *pPatch);
+
+/**
+ * @brief
+ * Verifies patch loading function for a particular channel/ProSLIC
+ *
+ * @param[in] hProslic - which channel/ProSLIC should be patched
+ * @param[in] pPatch - the patch data to verify was written to.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function should not be called directly under normal circumstances since the initialization function should
+ * perform this operation, unless @ref DISABLE_VERIFY_PATCH is defined.
+ *
+ * @sa ProSLIC_Init
+ */
+
+int ProSLIC_VerifyPatch (proslicChanType_ptr hProslic,proslicPatch *pPatch);
+
+/** @} PROSLIC_PATCH */
+
+/*****************************************************************************/
+/** @defgroup PROSLIC_GPIO GPIO Control
+ * This group of functions configure, read and write the GPIO status pins.
+ * @{
+ */
+
+/**
+ * @brief
+ * This function configures the ProSLIC GPIOs by loading a gpio preset that was
+ * set in the configuration tool.
+ * @param[in] hProslic - which channel to configure the GPIO pins.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa ProSLIC_GPIOControl
+ */
+
+int ProSLIC_GPIOSetup (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This function controls the GPIOs of the ProSLIC.
+ *
+ * @param[in] hProslic - which channel to modify
+ * @param[in,out] pGpioData - pointer to GPIO status (typically 1 byte)
+ * @param[in] read - 1 = Read the status, 0 = write the status
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa ProSLIC_GPIOSetup
+ */
+
+int ProSLIC_GPIOControl (proslicChanType_ptr hProslic,uInt8 *pGpioData,
+ uInt8 read);
+
+/** @} PROSLIC_GPIO */
+/** @} GEN_CFG */
+
+/*****************************************************************************/
+/** @defgroup PROSLIC_PULSE_METER Pulse Metering
+ *
+ * This group contains functions related to pulse metering.
+ * @{
+ */
+
+/**
+* @brief
+* This function configures the ProSLIC pulse metering by loading a pulse metering preset.
+*
+* @param[in] hProslic - which channel should be configured
+* @param[in] preset - which preset to load from the defined settings made in the configuration tool.
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+* @sa ProSLIC_PulseMeterStart ProSLIC_PulseMeterStop
+*/
+
+int ProSLIC_PulseMeterSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * This function enables the pulse metering generator.
+ *
+ * @param[in] hProslic - which channel should play the tone.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa ProSLIC_PulseMeterSetup ProSLIC_PulseMeterStop ProSLIC_PulseMeterDisable
+ *
+ */
+int ProSLIC_PulseMeterEnable (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This function disables the pulse metering generator..
+ *
+ * @param[in] hProslic - which channel should play the tone.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa ProSLIC_PulseMeterSetup ProSLIC_PulseMeterStop ProSLIC_PulseMeterEnable
+ *
+ */
+
+int ProSLIC_PulseMeterDisable (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This function starts the pulse metering tone.
+ *
+ * @param[in] hProslic - which channel should play the tone.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa ProSLIC_PulseMeterSetup ProSLIC_PulseMeterStop
+ *
+ */
+
+int ProSLIC_PulseMeterStart (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This function stops the pulse metering tone.
+ *
+ * @param[in] hProslic - which channel should play the tone.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa PProSLIC_PulseMeterStart ProSLIC_PulseMeterSetup
+ *
+ */
+
+int ProSLIC_PulseMeterStop (proslicChanType_ptr hProslic);
+
+/** @} PROSLIC_PULSE_METER */
+
+/*****************************************************************************/
+/** @defgroup PROSLIC_INTERRUPTS Interrupt control and decode
+ * @{
+ */
+
+/**
+ * @brief
+ * Enables interrupts configured in the general configuration data structure.
+ *
+ * @param[in] hProslic - which channel to enable the interrupts.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int ProSLIC_EnableInterrupts (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This function reads the interrupts from the ProSLIC and places them into
+ * a @ref proslicIntType structure which contains up to @ref MAX_PROSLIC_IRQS
+ * interrupts.
+ *
+ * @param[in] hProslic - which channel to enable the interrupts.
+ * @param[in,out] pIntData - this structure contains the interrupts pending and the number of interrupts.
+ * @retval int - number of interrupts pending or RC_CHANNEL_TYPE_ERR if wrong chip type or 0 for no interrupts.
+ *
+ */
+
+int ProSLIC_GetInterrupts (proslicChanType_ptr hProslic,
+ proslicIntType *pIntData);
+
+/**
+ * @brief
+ * This function disables and clears interrupts on the given channel.
+ *
+ * @param[in] hProslic - which channel to disable
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_DisableInterrupts (proslicChanType_ptr hProslic);
+
+/** @} PROSLIC_INTERRUPTS */
+
+/*****************************************************************************/
+/** @defgroup SIGNALING Signaling - ring & line state, and hook state
+ * @{
+ */
+
+/**
+* Function: PROSLIC_ReadHookStatus
+*
+* @brief
+* Determine hook status
+* @param[in] hProslic - which channel to read from.
+* @param[out] *pHookStat - will contain either @ref PROSLIC_ONHOOK or @ref PROSLIC_OFFHOOK
+*
+*/
+
+int ProSLIC_ReadHookStatus (proslicChanType_ptr hProslic,uInt8 *pHookStat);
+
+/*****************************************************************************/
+/** @defgroup LINESTATUS Line Feed status
+ * @{
+ */
+
+/**
+ * @brief
+ * This function sets the linefeed state.
+ *
+ * @param[in] hProslic - which channel to modify
+ * @param[in] newLinefeed - new line feed state - examples: LF_OPEN, LF_FWD_ACTIVE
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_SetLinefeedStatus (proslicChanType_ptr hProslic,uInt8 newLinefeed);
+
+/**
+ * @brief
+ * This function sets the linefeed state for all channels on the same daisychain.
+ *
+ * @param[in] hProslic - which channel to modify
+ * @param[in] newLinefeed - new line feed state - examples: LF_OPEN, LF_FWD_ACTIVE
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_SetLinefeedStatusBroadcast (proslicChanType_ptr hProslic,
+ uInt8 newLinefeed);
+
+/**
+ * @brief
+ * This function sets the polarity/wink state of the channel.
+ *
+ * @param[in] hProslic - which channel to modify
+ * @param[in] abrupt - to change the state immediately
+ * @param[in] newPolRevState - new polarity state - examples: POLREV_STOP, POLREV_START and WINK_START
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_PolRev (proslicChanType_ptr hProslic,uInt8 abrupt,
+ uInt8 newPolRevState);
+
+/** @} LINESTATUS */
+
+/*****************************************************************************/
+/** @defgroup RING_CONTROL Ring generation
+ * @{
+ */
+
+/**
+ * @brief
+ * Configure the ringer to the given preset (see your constants header file for exact value to use).
+ * This includes timing, cadence, OHT mode, voltage levels, etc.
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which of the xxxx_Ring_Cfg structures to use to configure the channel.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be compiled out by defining @ref DISABLE_RING_SETUP
+ *
+ * @sa ProSLIC_dbgSetRinging ProSLIC_RingStart ProSLIC_RingStop
+ */
+
+int ProSLIC_RingSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * Starts the ringer as confgured by @ref ProSLIC_RingSetup . If the active and inactive timers are enabled,
+ * the ProSLIC will automatically turn on/off the ringer as programmed, else one will need to
+ * manually implement the ring cadence. In either case, one will need to call ProSLIC_RingStop to
+ * stop the ringer or one may call @ref ProSLIC_SetLinefeedStatus to change the state directly.
+ *
+ * @param[in] hProslic - which channel to enable ringing.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be compiled out by defining @ref DISABLE_RING_SETUP
+ * @deprecated - Will become a macro in a future release and later removed. Customers should just call ProSLIC_SetLinefeedStatus w/ LF_RINGING.
+ *
+ * @sa ProSLIC_dbgSetRinging ProSLIC_RingStop ProSLIC_RingSetup
+ */
+
+int ProSLIC_RingStart (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * Stop the ringer on the given channel and set the line state to forward active.
+ * @deprecated - Will become a macro in a future release. Customers should just call ProSLIC_SetLinefeedStatus w/ LF_FWD_ACTIVE.
+ *
+ * @param[in] hProslic - which channel to modify.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa ProSLIC_RingSetup ProSLIC_RingStart
+ *
+ * @deprecated customers are encouraged to use ProSLIC_SetLinefeedStatus
+ */
+
+int ProSLIC_RingStop (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * Provision function for setting up Ring type, frequency, amplitude and dc offset and
+ * to store them in the given preset.
+ *
+ * @note: This function calculates the values, it does not set them.
+ *
+ * @param[in] pProslic - which channel to modify
+ * @param[in] ringCfg - how to configure the channel's ringer
+ * @param[in] preset - where to store the new configuration.
+ * @sa ProSLIC_RingSetup ProSLIC_RingStart ProSLIC_RingStop
+ */
+
+int ProSLIC_dbgSetRinging (proslicChanType *pProslic,
+ ProSLIC_dbgRingCfg *ringCfg, int preset);
+
+/** @} RING_CONTROL */
+/** @} SIGNALING */
+
+/*****************************************************************************/
+/** @defgroup PROSLIC_AUDIO Audio
+ * This group of functions contains routines to configure the PCM bus, to generate tones, and to send FSK data.
+ *
+ * In order to start using the PCM bus, you would typically initialize the PCM bus with code similar to
+ * the following:
+ *
+ * @code
+ * if( (ProSLIC_PCMSetup(myProSLIC, MY_COMPANDING) != RC_NONE)
+ * || (ProSLIC_PCMTimeSlotSetup(myProSLIC, pcm_ts, pcm_ts) != RC_NONE)
+ * || (ProSLIC_PCMStart(myProSLIC) != RC_NONE))
+ * {
+ * return MY_PCM_INIT_ERROR;
+ * }
+ * @endcode
+ *
+ * @{
+ * @defgroup TONE_GEN Tone generation
+ * This group of functions is related to playing out general tones - such as dial tone, busy tone, etc. One would
+ * typically call @ref ProSLIC_ToneGenSetup first followed by @ref ProSLIC_ToneGenStart and after some time, a call to
+ * @ref ProSLIC_ToneGenStop to stop the tone. The direction of the tone and cadence (if any) are configured using the
+ * GUI configuration tool's TONE dialog box and then saved in the constants file.
+ *
+ * @{
+ */
+/**
+ * @brief
+ * Configure the tone generator to the given preset (see your constants header file for exact value to use). It does NOT
+ * play a particular tone out.
+ *
+ * @warning If @ref ProSLIC_FSKSetup was called earlier, this function will need to be called again.
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which of the xxxx_Tone_Cfg structures to use to configure the channel.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be compiled out by defining @ref DISABLE_TONE_SETUP.
+ *
+ * @note Typically, if one is using the ProSLIC for tone generation, you will be calling this function prior to each call
+ * into @ref ProSLIC_ToneGenStart so that the correct tone is played out.
+ */
+
+int ProSLIC_ToneGenSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * Configure the tone generator to the given preset (see your constants header file for exact value to use). It does NOT
+ * play a particular tone out.
+ *
+ * @warning If @ref ProSLIC_FSKSetup was called earlier, this function will need to be called again.
+ *
+ * @param[in] pProslic - which channel to configure
+ * @param[in] cfg - which of the xxxx_Tone_Cfg structures to use to configure the channel.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be compiled out by defining @ref DISABLE_TONE_SETUP.
+ *
+ * @note Typically, if one is using the ProSLIC for tone generation, you will be calling this function prior to each call
+ * into @ref ProSLIC_ToneGenStart so that the correct tone is played out.
+ */
+
+int ProSLIC_ToneGenSetupPtr(proslicChanType_ptr pProslic,
+ ProSLIC_Tone_Cfg *cfg);
+
+/**
+ * @brief
+ * This function starts the tone configured by @ref ProSLIC_ToneGenSetup.
+ * It is assumed that the @ref PROSLIC_AUDIO setup was performed
+ * prior to calling this function. Also, it is suggested that
+ * @ref ProSLIC_ToneGenSetup be called if @ref FSK_CONTROL
+ * functions were used.
+ *
+ * @param[in] hProslic - which channel should play the tone.
+ * @param[in] timerEn - are the timers to be enabled? 1 = Yes, 0 = No. When in doubt, set to 1.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_ToneGenSetup ProSLIC_ToneGenStop
+ */
+
+int ProSLIC_ToneGenStart (proslicChanType_ptr hProslic, uInt8 timerEn);
+
+/**
+ * @brief
+ * This function turns off tone generation initiated by @ref ProSLIC_ToneGenStart.
+ *
+ * @param[in] hProslic - which channel should stop playing the tone.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_ToneGenStart ProSLIC_ToneGenSetup
+ */
+
+int ProSLIC_ToneGenStop (proslicChanType_ptr hProslic);
+
+/** @} TONE_GEN */
+
+/*****************************************************************************/
+/** @defgroup FSK_CONTROL FSK/Caller ID generation
+ * This group of functions is related to FSK generation, typically used with Caller ID/Call Waiting
+ * functionality. To set the frequencies, the data rate, and the FSK FIFO depth, please use the configuration
+ * GUI FSK dialog box.
+ *
+ * Here's a simple example code fragment to send data via FSK:
+ *
+ * @code
+ * if( ProSLIC_FSKSetup(myProSLICChan, PROSLIC_NORTH_AMERICA_FSK) == RC_NONE)
+ * {
+ *
+ * // This should be called every time since it is likely a tone was played
+ * // earlier which reprograms the oscillators...
+ * ProSLIC_FSKSetup(myProSLICChan, FSK_TIA777A);
+ *
+ * // Enable the CID block, at this point no tones other than the FSK ones
+ * // should be played out...
+ * ProSLIC_EnableCID(myProSLICChan);
+ *
+ * bytes_left_to_send = bufsz;
+ *
+ * do
+ * {
+ * if(bytes_left_to_send < FIFO_DEPTH)
+ * {
+ * bytes_to_send = bytes_left_to_send;
+ * }
+ * else
+ * {
+ * bytes_to_send = FIFO_DEPTH;
+ * }
+ *
+ * if( ProSLIC_SendCID(myProSLICChan,buf,bytes_to_send) != RC_NONE)
+ * {
+ * ProSLIC_DisableCID(myProSLICChan);
+ * return MY_FSK_ERROR;
+ * }
+ *
+ * bytes_left_to_send -= bytes_to_send;
+ *
+ * if(bytes_left_to_send)
+ * {
+ * do
+ * {
+ * ProSLIC_CheckCIDBuffer(myProSLICChan, &is_fifo_empty);
+ *
+ * } while( is_fifo_empty != 1 );
+ * }
+ *
+ * }while( bytes_left_to_send > 0);
+ *
+ * ProSLIC_DisableCID(myProSLICChan);
+ * @endcode
+ *
+ * @note The above code fragment is sub-optimal since it does constantly poll the CID buffer
+ * state - one may want to implement the actual code using interrupts.
+ * @{
+ */
+
+/**
+ * @brief
+ * Configures the FSK generator from a configuration generated by the config tool.
+ *
+ * @warning If @ref ProSLIC_ToneGenSetup was called earlier, this function will need to be called again.
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which FSK configuration to use.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be compiled out by defining DISABLE_FSK_SETUP
+ */
+
+int ProSLIC_FSKSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * Configures the FSK generator from a configuration generated by the config tool.
+ *
+ * @warning If @ref ProSLIC_ToneGenSetup was called earlier, this function will need to be called again.
+ *
+ * @param[in] pProslic - which channel to configure
+ * @param[in] cfg - which FSK configuration to use.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be compiled out by defining DISABLE_FSK_SETUP
+ */
+
+int ProSLIC_FSKSetupPtr (proslicChanType_ptr pProslic, ProSLIC_FSK_Cfg *cfg);
+
+/**
+ * @brief
+ * This function enables FSK mode and clears the FSK FIFO. It is assumed that PCM has been enabled and that @ref ProSLIC_FSKSetup
+ * has been called at some point.
+ *
+ * @warning If @ref ProSLIC_ToneGenSetup was called earlier, @ref ProSLIC_FSKSetup will need to be called again.
+ *
+ * @param[in] hProslic - which channel to check upon.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int ProSLIC_EnableCID (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This function disables FSK mode.
+ *
+ * @param[in] hProslic - which channel to disable FSK mode.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int ProSLIC_DisableCID (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * Check if the FSK FIFO is empty or not.
+ *
+ * @param[in] hProslic - which channel to check upon.
+ * @param[out] fsk_buf_avail - is the buffer available? 1 = Yes, 0 = No.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note - This modifies the IRQ1 register contents, so some other interrupts may be lost. An alternative is to enable the
+ * FSK FIFO interrupt and trigger off of it when it does occur in your interrupt service routine.
+ */
+
+int ProSLIC_CheckCIDBuffer (proslicChanType_ptr hProslic, uInt8 *fsk_buf_avail);
+
+/**
+ * @brief
+ * Send numBytes as FSK encoded data. It is assumed that numBytes <= FIFO Depth (typically 8) and that the FIFO
+ * is free. It is also assumed that @ref ProSLIC_PCMStart has been called and that we're in
+ * @ref LF_FWD_OHT or @ref LF_REV_OHT mode for Type-1 or @ref LF_REV_ACTIVE or @ref LF_FWD_ACTIVE
+ * if we're in Type-2 caller ID.
+ *
+ * @param[in] hProslic - which channel to send the data through.
+ * @param[in] buffer - byte array of data to send.
+ * @param[in] numBytes - number of bytes to send. MUST be less than or equal to the FIFO size
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_CheckCIDBuffer ProSLIC_FSKSetup ProSLIC_EnableCID ProSLIC_DisableCID
+ */
+
+int ProSLIC_SendCID (proslicChanType_ptr hProslic, uInt8 *buffer,
+ uInt8 numBytes);
+
+/**
+ * @brief Control if the start/stop bits are enabled.
+ *
+ * @param[in] hProslic - which channel to adjust
+ * @param[in] enable_startStop - TRUE - start/stop bits are enabled, FALSE - disabled
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note: This does not replace @ref ProSLIC_FSKSetup, but is a supplement that toggles
+ * one of the registers that the preset modifies. It is assumed that @ref ProSLIC_FSKSetup
+ * was called at some point earlier in the code flow.
+ */
+
+int ProSLIC_ModifyCIDStartBits(proslicChanType_ptr hProslic,
+ uInt8 enable_startStop);
+
+
+/** @} FSK_CONTROL */
+
+/*****************************************************************************/
+/** @defgroup AUDIO_CONTROL Audio control/configuration
+ * @{
+ */
+/** @defgroup PCM_CONTROL PCM control
+ * This group of functions is used to configure and control the PCM bus. It is essential that @ref ProSLIC_PCMSetup,
+ * @ref ProSLIC_PCMTimeSlotSetup and @ref ProSLIC_PCMStart are called prior to any tone or FSK generation.
+ *
+ * See @ref PROSLIC_AUDIO code fragment on how the functions relate during initialization.
+ *
+ * @{
+ */
+
+/**
+ * @brief
+ * This configures the PCM bus with parameters such as companding and data latching timing.
+ *
+ * @param[in] hProslic - which channel should be configured
+ * @param[in] preset - which preset to use from the constants file (see configuration tool, PCM dialog box)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_PCMTimeSlotSetup ProSLIC_PCMStart
+ */
+
+int ProSLIC_PCMSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * This configures the ProSLIC to latch and send the PCM data at a particular timeslot in terms of PCM clocks (PCLK).
+ *
+ * Typically, for aLaw and uLaw, one can use the following calculation to set the rxcount and txcount parameters:
+ *
+ * rxcount = txcount = (channel_number)*8;
+ *
+ * For 16 bit linear, one can do the following:
+ *
+ * rxcount = txcount = (channel_number)*16;
+ *
+ * where channel_number = which ProSLIC channel on the PCM bus. For example, if one were to have 2 dual channel
+ * ProSLIC's on the same PCM bus, this value would range from 0 to 3.
+ *
+ * @param[in] hProslic - which channel should be configured
+ * @param[in] rxcount - how many clocks until reading data from the PCM bus
+ * @param[in] txcount - how many clocks until writing data to the PCM bus.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_PCMSetup ProSLIC_PCMStart
+ */
+
+int ProSLIC_PCMTimeSlotSetup (proslicChanType_ptr hProslic, uInt16 rxcount,
+ uInt16 txcount);
+
+/**
+ * @brief
+ * This enables PCM transfer on the given ProSLIC channel.
+ *
+ * @param[in] hProslic - - which channel should be enabled
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_PCMSetup ProSLIC_PCMTimeSlotSetup ProSLIC_PCMStop
+ */
+
+int ProSLIC_PCMStart (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This disables PCM transfer on the given ProSLIC channel. Typically, this is called for debugging
+ * purposes only.
+ *
+ * @param[in] hProslic - - which channel should be disabled
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_PCMSetup ProSLIC_PCMTimeSlotSetup ProSLIC_PCMStart
+ */
+
+int ProSLIC_PCMStop (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * Program desired loopback test mode for the given channel.
+ *
+ * @param[in] hProslic - which channel should be modified
+ * @param[in] newMode - what is the desired loopback mode.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int ProSLIC_SetLoopbackMode (proslicChanType_ptr hProslic,
+ ProslicLoopbackModes newMode);
+
+/**
+ * @brief
+ * Program desired mute test mode for the given channel.
+ *
+ * @param[in] hProslic - which channel should be modified
+ * @param[in] muteEn - what is the desired mode.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int ProSLIC_SetMuteStatus (proslicChanType_ptr hProslic,
+ ProslicMuteModes muteEn);
+
+/** @} PCM_CONTROL */
+
+/*****************************************************************************/
+/** @defgroup GAIN_CONTROL Gain control
+ * @{
+ */
+
+/**
+ * @brief
+ * Sets the TX audio gain (toward the network). This funcion DOES NOT actually calculate the values for the preset.
+ * To dynamically calculate the values, you would need to call @ref ProSLIC_dbgSetTXGain .
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which preset to use (this may be from the constants file)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note One can use this in conjunction with @ref ProSLIC_dbgSetTXGain to dynamically
+ * change the audio gain. It is important to have the presets of both routines match.
+ *
+ * The following code * fragment will set the TX audio gain to -5 dB:
+ *
+ * @code
+ * ProSLIC_dbgSetTXGain(myChannel, -5, MY_IMPEDENCE,0);
+ * ProSLIC_TXAudioGainSetup(myChannel,0);
+ * @endcode
+ *
+ * @sa ProSLIC_RXAudioGainSetup ProSLIC_dbgSetTXGain ProSLIC_AudioGainSetup
+ */
+
+int ProSLIC_TXAudioGainSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * Adjusts gain of TX audio path by scaling the PGA and Equalizer coefficients by the supplied values.
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which preset to use (this may be from the constants file)
+ * @param[in] pga_scale - scale factor which pga coefficients are to be multiplied
+ * @param[in] eq_scale - scale factor which equalizer coefficients are to be multiplied
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be used in lieu of @ref ProSLIC_dbgSetTXGain to dynamically
+ * change the audio gain when gain steps of 0.1dB do not suffice, or if an attenuation
+ * > 30dB is required.
+ *
+ * The following code * fragment will scale the TX audio gain by a factor of (0.707)*(0.500)
+ *
+ * @code
+ * uInt32 pga_gain_scale = 707;
+ * uInt32 eq_gain_scale = 500;
+ * ProSLIC_TXAudioGainScale(pProslic,DEFAULT_PRESET,pga_gain_scale,eq_gain_scale);
+ * @endcode
+ *
+ * @sa ProSLIC_RXAudioGainScale
+ */
+int ProSLIC_TXAudioGainScale (proslicChanType_ptr hProslic,int preset,
+ uInt32 pga_scale,uInt32 eq_scale);
+
+/**
+ * @brief
+ * Configures the RX audio gain (toward the telephone). This function DOES NOT actually calculate the values for the preset.
+ * To dynamically calculate the values, you would need to call @ref ProSLIC_dbgSetRXGain .
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which preset to use (this may be from the constants file)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note One can use this in conjunction with @ref ProSLIC_dbgSetRXGain to dynamically
+ * change the audio gain. It is important to have the presets of both routines match.
+ *
+ * The following code * fragment will set the RX audio gain to -1 dB:
+ *
+ * @code
+ * ProSLIC_dbgSetRXGain(myChannel, -1, MY_IMPEDENCE,0);
+ * ProSLIC_RXAudioGainSetup(myChannel,0);
+ * @endcode
+ *
+ * @sa ProSLIC_TXAudioGainSetup ProSLIC_dbgSetRXGain ProSLIC_AudioGainSetup
+ */
+
+int ProSLIC_RXAudioGainSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * Adjusts gain of RX audio path by scaling the PGA and Equalizer coefficients by the supplied values.
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - which preset to use (this may be from the constants file)
+ * @param[in] pga_scale - scale factor which pga coefficients are to be multiplied
+ * @param[in] eq_scale - scale factor which equalizer coefficients are to be multiplied
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be used in lieu of @ref ProSLIC_dbgSetRXGain to dynamically
+ * change the audio gain when gain steps of 0.1dB do not suffice, or if an attenuation
+ * > 30dB is required.
+ *
+ * The following code * fragment will scale the TX audio gain by a factor of (0.707)*(0.500)
+ *
+ * @code
+ * uInt32 pga_gain_scale = 707;
+ * uInt32 eq_gain_scale = 500;
+ * ProSLIC_RXAudioGainScale(pProslic,DEFAULT_PRESET,pga_gain_scale,eq_gain_scale);
+ * @endcode
+ *
+ * @sa ProSLIC_TXAudioGainScale
+ */
+int ProSLIC_RXAudioGainScale (proslicChanType_ptr hProslic,int preset,
+ uInt32 pga_scale,uInt32 eq_scale);
+
+/**
+ * @brief
+ * Configures and sets the audio gains - for both RX (toward the phone) and the TX (toward the network). Unlike
+ * the @ref ProSLIC_RXAudioGainSetup and @ref ProSLIC_TXAudioGainSetup this does both the calculations and then
+ * configures the given channel in one step. It is assumed that the preset gain array is at least 2 elements in size.
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] rxgain - what is the gain/loss of the RX transmit path in 1 dB units (negative = attenuation)
+ * @param[in] txgain - what is the gain/loss of the TX transmit path in 1 dB units (negative = attenuation)
+ * @param[in] preset - what is the impedance preset value
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * The following code * fragment will set the RX audio gain to -1 dB snd TX audio gain to -5 dB:
+ *
+ * @code
+ * ProSLIC_AudioGain(myChannel, -1, -5, MY_IMPEDENCE);
+ * @endcode
+ *
+ * @sa ProSLIC_TXAudioGainSetup ProSLIC_dbgSetRXGain ProSLIC_dbgSetRXGain ProSLIC_dbgSetTXGain
+ */
+
+int ProSLIC_AudioGainSetup (proslicChanType_ptr hProslic,int32 rxgain,
+ int32 txgain,int preset);
+
+/**
+ * @brief
+ * This function calculates the preset values for the RX audio (toward the telephone) - it does NOT set the
+ * actual register values. For that, please use @ref ProSLIC_RXAudioGainSetup .
+ *
+ * @param[in] pProslic - which channel to configure
+ * @param[in] gain - gain to set the preset values to.
+ * @param[in] impedance_preset - impedence preset in the constants file.
+ * @param[in] audio_gain_preset - index to the audio gain preset to store the value.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_RXAudioGainSetup ProSLIC_AudioGainSetup ProSLIC_dbgSetTXGain
+ */
+
+int ProSLIC_dbgSetRXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+/**
+ * @brief
+ * This function calculates the preset values for the TX audio (toward the network) - it does NOT set the
+ * actual register values. For that, please use @ref ProSLIC_TXAudioGainSetup .
+ *
+ * @param[in] pProslic - which channel to configure
+ * @param[in] gain - gain to set the preset values to.
+ * @param[in] impedance_preset - impedance preset in the constants file.
+ * @param[in] audio_gain_preset - index to the audio gain preset to store the value.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_TXAudioGainSetup ProSLIC_AudioGainSetup ProSLIC_dbgSetRXGain
+ */
+
+int ProSLIC_dbgSetTXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+/** @} GAIN_CONTROL */
+/** @} AUDIO_CONTROL */
+/** @} PROSLIC_AUDIO */
+
+/*****************************************************************************/
+/** @defgroup HC_DETECT Hook Change detection
+ *
+ * This function group has routines used to implement a pulse dial, hook flash
+ * and general hook change detection. The outline of how to use these
+ * functions is as follows:
+ *
+ * - Initialize the data structure w/ @ref ProSLIC_InitializeHookChangeDetect
+ * - When hook change is detected or if there has been no activity for a minimum
+ * of the interdigit time, call @ref ProSLIC_HookChangeDetect. Keep on calling
+ * the function until we have a return code not equal to SI_HC_NEED_MORE_POLLS.
+ * Again, the function should be called, when no hook activity is detected at
+ * minimum of the interdigit time.
+ *
+ * General theory (pulse digit):
+ *
+ * ---|___|-----|__|---------
+ *
+ * A B C B D
+ *
+ * A - Offhook (time unknown)
+ * B - Onhook (break time)
+ * C - Offhook (make time)
+ * D - Interdigit delay
+ *
+ * We report after D occurs a pulse digit as long as the duration for B
+ * is met.
+ *
+ * For hook flash, we are looking at
+ *
+ * ----|________________|-----------
+ *
+ *
+ * Here we're looking for the pulse width meets a certain min/max time. If the
+ * time is exceeded, then we have likely a onhook or offhook event.
+ *
+ * @note This set of functions require that the elapsed timer functions
+ * documented in @ref PROSLIC_CUSTOMER_TIMER are implemented.
+ *
+ * @{
+ */
+
+/**
+ * @brief
+ * Initialize pulse dial/hook detection parameters.
+ *
+ * @param[in,out] pPulse - the structure that is to be initialized. Refer to your target market's pulse dial standard for exact values.
+ * @param[in] hookTime - a timer object suitable to be passed to a function of type @ref system_timeElapsed_fptr
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_InitializeHookChangeDetect(hookChangeType *pPulse,void *hookTime);
+
+/**
+ * @brief
+ * Implements pulse dial detection and should be called at every hook transition and after the minimum interdigit delay time (should continue calling until
+ * the function returns back with a value other than SI_HC_NEED_MORE_POLLS.
+ *
+ * @param[in] pProslic - which channel had a hook transition.
+ * @param[in] pPulsedialCfg - what is the criteria to determine on/off hook states.
+ * @param[in,out] pPulseDialData - contians the timer information that was set in
+ * @ref ProSLIC_InitializeHookChangeDetect as well as the pulse digit detected
+ *
+ * @retval int - either SI_HC_xxx values or a value between 1-10 for the number of pulses detected. In most cases, a 0 is 10 pulses. Please refer to
+ * your country's pulse dial standard for exact encoding.
+ */
+
+uInt8 ProSLIC_HookChangeDetect (proslicChanType *pProslic,
+ hookChange_Cfg *pPulsedialCfg, hookChangeType *pPulseDialData);
+
+/** @} HC_DETECT */
+
+/*****************************************************************************/
+/** @addtogroup PROSLIC_AUDIO
+ * @{
+ * @defgroup PROSLIC_DTMF_DECODE DTMF Decode
+ * This section covers DTMF decoding.
+ *
+ * @note Not all chipsets support this capability. Please review your chipset
+ * documentation to confirm this capability is supported.
+ * @{
+ */
+
+/**
+ * @brief
+ * Read/Decode DTMF digits. The "raw" hexcode is returned in this function and would require
+ * further processing. For example, on the Si3217x chipset, the following mapping exists:
+ *
+ * DTMF Digit | API output value
+ * :-|:---
+ * 0 | 0xA
+ * 1 | 1
+ * 2 | 2
+ * 3 | 3
+ * 4 | 4
+ * 5 | 5
+ * 6 | 6
+ * 7 | 7
+ * 8 | 8
+ * 9 | 9
+ * A | 0xD
+ * B | 0xE
+ * C | 0xF
+ * D | 0
+ * \*| 0xB
+ * \# |0xC
+ *
+ * @note This function is only valid after @ref IRQ_DTMF occurred and should be called shortly
+ * thereafter.
+ *
+ * @warning Not all ProSLIC chipsets have a DTMF decoder. Please review your chipset to make
+ * sure this capability exists.
+ *
+ * @param[in] hProslic - which channel is to be decoded.
+ * @param[out] pDigit - "raw" DTMF value (see comments in description)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ *
+ */
+
+int ProSLIC_DTMFReadDigit (proslicChanType_ptr hProslic,uInt8 *pDigit);
+
+/** @} PROSLIC_DTMF_DECODE */
+/** @} PROSLIC_AUDIO */
+
+/*****************************************************************************/
+/** @defgroup PROSLIC_POWER_CONVERTER Power Converter control
+ * @{
+ */
+/**
+* @brief
+* Powers all DC/DC converters sequentially with delay to minimize peak power draw on VDC.
+* @param[in] hProslic - which channel to change state.
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+* @sa ProSLIC_PowerDownConverter
+*
+*/
+
+int ProSLIC_PowerUpConverter(proslicChanType_ptr hProslic);
+
+/**
+* @brief
+* Safely power down dcdc converter after ensuring linefeed
+* is in the open state. Test power down by setting error
+* flag if detected voltage does no fall below 5v.
+*
+* @param[in] hProslic - which channel to change state.
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+* @sa ProSLIC_PowerUpConverter
+*
+*/
+
+int ProSLIC_PowerDownConverter(proslicChanType_ptr hProslic);
+
+/**
+* @brief
+* Set channel flag to indicate that the polarity of the
+* DC-DC converter drive signal is to be inverted from what
+* is indicated in the General Parameters. This inversion is
+* relative to the polarity established by the General Parameters,
+* not an absolute polarity.
+*
+*
+* @param[in] hProslic - which channel to change state.
+* @param[in] flag - inversion flag (1 - inverted, 0 - no inversion)
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+* @sa ProSLIC_PowerUpConverter
+*
+*/
+int ProSLIC_SetDCDCInversionFlag(proslicChanType_ptr hProslic, uInt8 flag);
+
+
+/** @} PROSLIC_POWER_CONVERTER */
+/*****************************************************************************/
+/** @defgroup PROSLIC_LB_CALIBRATION LB Calibration
+ * @{
+ */
+
+/**
+ * @brief
+ * Run canned longitudinal balance calibration.
+ *
+ * @param[in] pProslic - start channel to start from for calibration.
+ * @param[in] size - number of channels to calibrate
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note
+ * Use the @ref ProSLIC_Init function to perform all calibrations except Longitudinal Balance (LB).
+ * Use the @ref ProSLIC_LBCal function to perform LB calibration. LB Calibration typically needs
+ * to execute LB calibration once per system setup without a load connected. The LB calibration
+ * results can be stored in non-volatile storage (flash, eeprom) and retrieved during your normal
+ * ProSLIC initialization.
+ *
+* @sa ProSLIC_GetLBCalResult ProSLIC_LoadPreviousLBCal ProSLIC_LoadPreviousLBCalPacked ProSLIC_GetLBCalResultPacked
+ */
+
+int ProSLIC_LBCal (proslicChanType_ptr *pProslic, int size);
+
+/**
+ * @brief
+ * This function returns the coefficient results of the last LB calibration.
+ *
+ * @param[in] pProslic - which channel to retrieve the values from.
+ * @param[out] result1 - results read from the last calibration
+ * @param[out] result2 - results read from the last calibration
+ * @param[out] result3 - results read from the last calibration
+ * @param[out] result4 - results read from the last calibration
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+* @sa ProSLIC_LBCal ProSLIC_LoadPreviousLBCal ProSLIC_LoadPreviousLBCalPacked ProSLIC_LBCal ProSLIC_GetLBCalResultPacked
+*/
+
+int ProSLIC_GetLBCalResult (proslicChanType *pProslic,int32 *result1,
+ int32 *result2,int32 *result3,int32 *result4);
+
+/**
+ * @brief
+ * This function loads previously stored LB calibration results to the appropriate ProSLIC
+ * RAM locations.
+ *
+ * @param[in] pProslic - which channel to program the values
+ * @param[in] result1 - values to be written
+ * @param[in] result2 - values to be written
+ * @param[in] result3 - values to be written
+ * @param[in] result4 - values to be written
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+* @sa ProSLIC_LBCal ProSLIC_LoadPreviousLBCalPacked ProSLIC_LBCal ProSLIC_GetLBCalResult ProSLIC_GetLBCalResultPacked
+*/
+
+int ProSLIC_LoadPreviousLBCal (proslicChanType *pProslic,int32 result1,
+ int32 result2,int32 result3,int32 result4);
+
+/**
+ * @brief
+ * This function returns the results of the last LB calibration packed into single int32.
+ *
+ * @param[in] pProslic - which channel to retrieve the values from.
+ * @param[out] result - results - where to store the value
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+* @sa ProSLIC_LBCal ProSLIC_LoadPreviousLBCal ProSLIC_LoadPreviousLBCalPacked ProSLIC_LBCal
+*/
+
+int ProSLIC_GetLBCalResultPacked (proslicChanType *pProslic,int32 *result);
+
+/**
+ * @brief
+ * This function loads previously stored LB calibration results that are in the packed format.
+ *
+ * @param[in] pProslic - which channel to retrieve the values from.
+ * @param[in] result - results read from @ref ProSLIC_GetLBCalResultPacked
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+* @sa ProSLIC_LBCal ProSLIC_LoadPreviousLBCal ProSLIC_LBCal ProSLIC_GetLBCalResultPacked
+*
+*/
+
+int ProSLIC_LoadPreviousLBCalPacked (proslicChanType *pProslic,int32 *result);
+
+/** @} PROSLIC_LB_CALIBRATION */
+
+
+/*****************************************************************************/
+/** @addtogroup DIAGNOSTICS
+ * @{
+ */
+
+/**
+ * @brief
+ * This function can be used to verify that the SPI interface is functioning
+ * properly by performing a series of read back tests. This test DOES modify
+ * certain registers, so a reinitialization will be required. This test is
+ * recommended only for development use.
+ *
+ * @param[in] pProslic - This should point to the channel that is to be verified.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error amd will typically return back
+ * @ref RC_SPI_FAIL if a SPI failure occured.
+ */
+
+int ProSLIC_VerifyControlInterface (proslicChanType_ptr pProslic);
+
+/** @addtogroup PSTN_CHECK PSTN Check
+ * @{
+ */
+
+/**
+ * @brief
+ * Allocates memory for a PSTN check object. One channel object is needed per
+ * ProSLIC channel.
+ *
+ * @param[in,out] pstnCheckObj - pointer to the object that is to be initialized.
+ * @param[in] num_objs - number of objects to allocate
+ *
+ * @retval 0 = OK
+ */
+
+int ProSLIC_CreatePSTNCheckObjs(proslicPSTNCheckObjType_ptr *pstnCheckObj,
+ unsigned int num_objs);
+#define ProSLIC_CreatePSTNCheckObj(PTRPTR) ProSLIC_CreatePSTNCheckObjs((PTRPTR), 1)
+
+/**
+ * @brief
+ * Allocates memory for a differential PSTN check object. One channel object is needed per
+ * ProSLIC channel.
+ *
+ * @param[in,out] pstnCheckObj - pointer to the object that is to be initialized.
+ * @param[in] num_objs - number of objects to allocate
+ *
+ * @retval 0 = OK
+ */
+
+int ProSLIC_CreateDiffPSTNCheckObjs(proslicDiffPSTNCheckObjType_ptr
+ *pstnCheckObj, unsigned int num_objs);
+#define ProSLIC_CreateDiffPSTNCheckObj(PTRPTR) ProSLIC_CreateDiffPSTNCheckObjs((PTRPTR), 1)
+
+/**
+ * @brief
+ * Destroys a PSTN check object and deallocates memory.
+ *
+ * @param[in] pstnCheckObj - object to deallocate.
+ *
+ * @retval 0 = OK
+ */
+
+#define ProSLIC_DestroyPSTNCheckObj ProSLIC_DestroyPSTNCheckObjs
+int ProSLIC_DestroyPSTNCheckObjs(proslicPSTNCheckObjType_ptr *pstnCheckObj);
+
+/**
+ * @brief
+ * Destroys a differential PSTN check object and deallocates memory.
+ *
+ * @param[in] pstnCheckObj - object to deallocate.
+ *
+ * @retval 0 = OK
+ */
+
+#define ProSLIC_DestroyDiffPSTNCheckObj ProSLIC_DestroyDiffPSTNCheckObjs
+int ProSLIC_DestroyDiffPSTNCheckObjs(proslicDiffPSTNCheckObjType_ptr
+ *pstnCheckObj);
+
+/**
+ * @brief
+ * Initialize pstnCheckObj structure members
+ *
+ * @param[in] pstnCheckObj - which object to initialize
+ * @param[in] avgThresh - Average current threshold that indicates a PSTN is present (uA).
+ * @param[in] singleThresh - Single current threshold that indicates a PSTN is present (uA).
+ * @param[in] samples - number of samples to collect
+ * @retval 0 = OK
+ */
+
+int ProSLIC_InitPSTNCheckObj(proslicPSTNCheckObjType_ptr pstnCheckObj,
+ int32 avgThresh, int32 singleThresh, uInt8 samples);
+
+/**
+ * @brief
+ * This function initializes a differential PSTN detection object.
+ *
+ * @param[in,out] pstnDiffCheckObj - object to be initialized
+ * @param[in] preset1 - DC Feed preset to be used for first loop I/V measurement
+ * @param[in] preset2 - DC Feed preset to be used for second loop I/V measurement
+ * @param[in] entry_preset - restore_preset DC Feed preset that is restored after PSTN check is complete.
+ * @param[in] femf_enable - Flag to enable OPEN state hazardous voltage measurement (0 = disabled, 1 = enabled)
+ * @retval 0 = OK
+ */
+
+int ProSLIC_InitDiffPSTNCheckObj(proslicDiffPSTNCheckObjType_ptr
+ pstnDiffCheckObj, int preset1, int preset2, int entry_preset, int femf_enable);
+
+/**
+ * @brief
+ * This function monitors longitudinal current (average and single sample) to quickly identify
+ * the presence of a live PSTN line. Sufficient polling needs to occur in order to quickly determine
+ * if a PSTN line is preset or not.
+ *
+ * @param[in] pProslic - which channel to run this test on.
+ * @param[in] pPSTNCheck - the initialized data structure that contains the intermediate results of this test.
+ * @retval 0 = no PSTN detected/thresholds have not been exceeded, 1 = PSTN detected, state machine reset.
+ *
+ * @note
+ * If wanting to restart the test, one will need to call @ref ProSLIC_InitPSTNCheckObj again. However, if the
+ * number of samples exceeds the buffer then the function will "wrap".
+ */
+
+int ProSLIC_PSTNCheck(proslicChanType *pProslic,
+ proslicPSTNCheckObjType *pPSTNCheck);
+
+/**
+ * @brief
+ * This function monitors for a foreign voltage (if enabled) and measures the differential I/V
+ * characteristics of the loop at 2 unique settings to detect a foreign PSTN. It is assumed that polling will
+ * occur at the configured value found in @ref PSTN_DET_POLL_RATE.
+ *
+ * @param[in] pProslic - channel to be monitored
+ * @param[in,out] pPSTNCheck - pointer to an initialized structure that is used by the function to
+ * store state information.
+ * @retval @ref RC_NONE - test is in progress, @ref RC_COMPLETE_NO_ERR - test complete, no errors, @ref RC_PSTN_OPEN_FEMF - detected foreign voltage, RC_CHANNEL_TYPE_ERR = a non-ProSLIC device was called to perform this function
+ */
+int ProSLIC_DiffPSTNCheck(proslicChanType *pProslic,
+ proslicDiffPSTNCheckObjType *pPSTNCheck);
+
+/** @} PSTN_CHECK */
+/** @} DIAGNOSTICS*/
+
+/*****************************************************************************/
+/** @defgroup PROSLIC_DCFEED DC Feed Setup and control
+ * @{
+ */
+
+/**
+ * @brief
+ * Configures the DC feed from a preset.
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] preset - the preset to use
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be disabled by @ref DISABLE_DCFEED_SETUP
+ */
+
+int ProSLIC_DCFeedSetup (proslicChanType_ptr hProslic,int preset);
+
+/**
+ * @brief
+ * Configures the DC feed from a preset.
+ *
+ * @param[in] hProslic - which channel to configure
+ * @param[in] cfg - pointer to preset storage structure
+ * @param[in] preset - the preset to use
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @note This function can be disabled by @ref DISABLE_DCFEED_SETUP
+ */
+int ProSLIC_DCFeedSetupCfg (proslicChanType_ptr hProslic,
+ ProSLIC_DCfeed_Cfg *cfg, int preset);
+
+/**
+ * @brief
+ * This function allows one to adjust the DC open circuit voltage level dynamically. Boundary checking is done.
+ *
+ * @note This function does NOT modify the register sets needed, it calculates the correct values and stores
+ * them in the correct preset. Use @ref ProSLIC_DCFeedSetup to program the device with the new values.
+ *
+ * @param[in] pProslic - which channel to configure
+ * @param[in] v_vlim_val - absolute voltage level
+ * @param[in] preset - DC Feed preset to be modified.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_dbgSetDCFeedIloop ProSLIC_DCFeedSetup
+ */
+
+int ProSLIC_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val,
+ int32 preset);
+
+/**
+ * @brief
+ * This function allows one to adjust the loop current level dynamically. Boundary checking is done.
+ *
+ * @note This function does NOT modify the register sets needed, it calculates the correct values and stores
+ * them in the correct preset. Use @ref ProSLIC_DCFeedSetup to program the device with the new values.
+ *
+ * @param[in] pProslic - which channel to configure
+ * @param[in] i_ilim_val - loop current level
+ * @param[in] preset - DC Feed preset to be modified.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_dbgSetDCFeedVopen ProSLIC_DCFeedSetup
+ */
+
+int ProSLIC_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val,
+ int32 preset);
+
+/**
+ * @brief
+ * This function allows one to enable/disable power savings mode found on some of the chipsets. This allows one
+ * to change the default value set in the GUI config tool.
+ *
+ * @param[in] pProslic - which channel to configure
+ * @param[in] pwrsave - power savings mode enabled or disabled - value expected: @ref PWRSAVE_DISABLE or @ref PWRSAVE_ENABLE
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int ProSLIC_SetPowersaveMode(proslicChanType *pProslic, int pwrsave);
+
+/** @} PROSLIC_DCFEED */
+
+/*****************************************************************************/
+/** @defgroup MESSAGE_WAITING Message Waiting Indicator routines
+ * @{
+ */
+
+/**
+ * @brief
+ * Configure optional MWI feature settings. Default values are 95v and 50ms.
+ *
+ * @details
+ * Set MWI flashing voltage level (Vpk), and duration that LCR is masked when
+ * MWI toggles.
+ *
+ * @note
+ * Proper patch must be loaded for this feature to work properly. Code does not
+ * automatically verify that this patch is loaded.
+ *
+ * @param[in] hProslic - channel to modify
+ * @param[in] vpk_mag - MWI voltage level (vpk) (no change is made if 0)
+ * @param[in] lcrmask_mwi - LCR mask duration (ms) (no change is made if 0)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_MWISetup (proslicChanType_ptr hProslic,uInt16 vpk_mag,
+ uInt16 lcrmask_mwi);
+
+/**
+ * @brief
+ * Enables message waiting indicator feature
+ *
+ * @details
+ * Message waiting (neon flashing) enabled if device is in the onhook state.
+ * Otherwise, function will not execute and return RC_MWI_ENABLE_FAIL. This
+ * function must be called to ENABLE MWI prior to calling ProSLIC_MWI to toggle
+ * the voltage level on TIP-RING.
+ *
+ * @note
+ * Proper patch must be loaded for this feature to work properly. Code does not
+ * automatically verify that this patch is loaded.
+ *
+ * @param[in] hProslic - channel to modify
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_MWIEnable (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * Disables message waiting indicator feature
+ *
+ * @details
+ * Message waiting (neon flashing) disable. Turns off flashing and disabled
+ * MWI feature.
+ *
+ * @note
+ * Proper patch must be loaded for this feature to work properly. Code does not
+ * automatically verify that this patch is loaded.
+ *
+ * @param[in] hProslic - channel to modify
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_MWIDisable (proslicChanType_ptr hProslic);
+
+
+/**
+ * @brief
+ * Implements message waiting indicator
+ *
+ * @details
+ * Message waiting (neon flashing) state toggling. If MWI feature has not been
+ * enabled by calling ProSLIC_SetMWIEnable(), then this function will return
+ * RC_MWI_NOT_ENABLED
+ *
+ * @note
+ * Proper patch must be loaded for this feature to work properly. Code does not
+ * automatically verify that this patch is loaded.
+ *
+ * @param[in] hProslic - channel to modify
+ * @param[in] flash_on - 0 = lamp off, 1 = lamp on.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_SetMWIState(proslicChanType_ptr hProslic,uInt8 flash_on);
+
+/**
+ * @brief
+ * Implements message waiting indicator with ramp configurability
+ *
+ * @details
+ * Message waiting (neon flashing) state toggling. If MWI feature has not been
+ * enabled by calling ProSLIC_SetMWIEnable(), then this function will return
+ * RC_MWI_NOT_ENABLED
+ *
+ * @note
+ * Proper patch must be loaded for this feature to work properly. Code does not
+ * automatically verify that this patch is loaded.
+ *
+ * @param[in] hProslic - channel to modify
+ * @param[in] flash_on - 0 = lamp off, 1 = lamp on.
+ * @param[in] step_delay - delay between VBATH steps (ms)
+ * @param[in] step_num - number of steps between low and high states
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_SetMWIState_ramp(proslicChanType_ptr hProslic,uInt8 flash_on,
+ uInt8 step_delay,uInt8 step_num);
+
+
+/**
+ * @brief
+ * Read MWI output state
+ *
+ * @details
+ * Message waiting (neon flashing) state read. If MWI feature has not been
+ * enabled by calling ProSLIC_SetMWIEnable(), then this function will return
+ * RC_MWI_NOT_ENABLED
+ *
+ * @note
+ * Proper patch must be loaded for this feature to work properly. Code does not
+ * automatically verify that this patch is loaded.
+ *
+ * @param[in] hProslic - channel to modify
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_GetMWIState(proslicChanType_ptr hProslic);
+
+
+/**
+ * @brief
+ * Implements message waiting indicator
+ *
+ * @details
+ * Message waiting (neon flashing) requires modifications to vbath_expect and slope_vlim.
+ * The old values are restored to turn off the lamp. The function assumes the channels
+ * are all configured the same. During off-hook event lamp must be disabled manually.
+ *
+ * @param[in] hProslic - channel to modify
+ * @param[in] lampOn - 0 = lamp is off, 1 = lamp is on.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @deprecated Use @ref ProSLIC_SetMWIState
+ */
+
+int ProSLIC_MWI (proslicChanType_ptr hProslic,uInt8 lampOn);
+
+/** @} MESSAGE_WAITING */
+
+/*****************************************************************************/
+/** @defgroup MISC MISC. routines
+ * @{
+ */
+
+/**
+ * @brief
+ * This function initiates PLL free run mode.
+ *
+ * @param[in] hProslic - which channel to modify
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_PLLFreeRunStart (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This function terminates PLL free run mode.
+ *
+ * @param[in] hProslic - which channel to modify
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_PLLFreeRunStop (proslicChanType_ptr hProslic);
+
+/**
+ * @brief
+ * This function returns PLL free run status.
+ *
+ * @param[in] hProslic - which channel to report upon.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int ProSLIC_GetPLLFreeRunStatus (proslicChanType_ptr hProslic);
+
+/**
+ *
+ * @brief
+ * Sets the ProSLIC into User Access Mode (UAM) on parts that support this. This is mainly
+ * used internally within the API.
+ *
+ * @param[in] pProslic - which channel to modify
+ * @param[in] isEnabled - is the User Access Mode enabled (NOTE: once enabled, it can not be disabled)
+ * @param[in] isBcast - is this a broadcast on the daisychain
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_SetUserMode(proslicChanType *pProslic,BOOLEAN isEnabled,
+ BOOLEAN isBcast);
+
+/*
+** @brief
+** Checks for improper ring exit (this is used internally by the API) and
+** not all chipsets need to call this.
+**
+** @param[in] pProslic - which ProSLIC to check.
+** Returns:
+** RC_NONE - Reinit not required
+** RC_REINIT_REQUIRED - Corrupted state machine - reinit required
+**
+*/
+int ProSLIC_isReinitRequired(proslicChanType *pProslic);
+
+/** @} MISC */
+/** @} */
+
+/* Hopefully customer's code will never call this function... */
+int ProSLIC_UnsupportedFeatureNoArg(proslicChanType_ptr pProslic,
+ const char *function_name);
+
+/* Helper function used by PSTN routines */
+#ifdef PSTN_DET_ENABLE
+void ProSLIC_PSTN_delay_poll(proslicTestStateType *pState, uInt16 delay);
+#endif
+
+#if defined(SI3218X) || defined(SI3226X) || defined(SI3228X) || defined(SI3217X)
+int ProSLIC_Calibrate(proslicChanType_ptr *hProslic, int maxChan, uInt8 *calr,
+ int maxTime);
+#endif
+/**
+ * @brief determine if the given channel is a ProSLIC or DAA
+ *
+ * @param[in,out] pProslic - channel to be probed.
+ * @retval PROSLIC | DAA | UNKNOWN
+ */
+int ProSLIC_identifyChannelType(proslicChanType *pProslic);
+
+/* The following functions are used as part of the chipset init functions, not meant to be called
+ outside this scope.
+*/
+int ProSLIC_ReInit_helper(proslicChanType_ptr *pProslic, int size,
+ initOptionsType init_option, int numChanPerDevice);
+int ProSLIC_VerifyMasterStat(proslicChanType_ptr);
+
+#endif /*end ifdef PROSLIC_H*/
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic_api_config.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic_api_config.h
new file mode 100644
index 0000000..b55e5c1
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic_api_config.h
@@ -0,0 +1,229 @@
+/*
+* Copyright 2007-2016 by Silicon Laboratories
+*
+* $Id: proslic_api_config.h 5481 2016-01-18 22:03:16Z nizajerk $
+*
+*
+* Author(s):
+* laj
+*
+* Distributed by:
+* Silicon Laboratories, Inc
+*
+* This file contains proprietary information.
+* No dissemination allowed without prior written permission from
+* Silicon Laboratories, Inc.
+*
+*
+*/
+#ifndef PROSLIC_API_CFG
+#define PROSLIC_API_CFG
+
+/** @defgroup PROSLIC_CFG ProSLIC Configuration Options
+ * @{
+ */
+
+/** @defgroup PROSLIC_DRIVER_SEL ProSLIC Driver Selection
+* Define device driver to be compiled.
+* @{
+*/
+#ifdef PROSLIC_DOXYGEN
+#define SI3217X /**< Define to support Si3217x chipset family in the build */
+#undef SI3217X
+#define SI3218X /**< Define to support Si3218x chipset family in the build */
+#undef SI3218X
+#define SI3226X /**< Define to support Si3226x chipset family in the build */
+#undef SI3226X
+#define SI3228X /**< Define to support Si3228x chipset family in the build */
+#undef SI3228X
+#endif
+
+#ifdef SI3217X_SUPPORT
+#define SI3217X /**< Define to support Si3217x chipset family in the build */
+#endif
+
+#ifdef SI3218X_SUPPORT
+#define SI3218X /**< Define to support Si3218x chipset family in the build */
+
+#endif
+
+#ifdef SI3226X_SUPPORT
+#define SI3226X /**< Define to support Si3226x chipset family in the build */
+#endif
+
+#ifndef SI324X
+#define SI324X /**< Define to support Si324x chipset family in the build */
+#undef SI324X
+#endif
+
+
+/** @} PROSLIC_DRIVER_SEL*/
+
+/** @defgroup CODE_OPTS Code feature options
+ * Select which options NOT to build - just uncomment out the undef to disable feature.
+ * @{
+ */
+#define DISABLE_VERIFY_PATCH /**< Disable patch load verification */
+#undef DISABLE_VERIFY_PATCH
+#define DISABLE_FSK_SETUP /**< DIsable the FSK setup API */
+#undef DISABLE_FSK_SETUP
+#define DISABLE_TONE_SETUP /**< Disable Tone setup API */
+#undef DISABLE_TONE_SETUP
+#define DISABLE_RING_SETUP /**< Disable Ring setup API */
+#undef DISABLE_RING_SETUP
+#define DISABLE_DCFEED_SETUP /**< Disable DC FEED setup API */
+#undef DISABLE_DCFEED_SETUP
+#define DISABLE_GPIO_SETUP /**< Disable GPIO setup API */
+#undef DISABLE_GPIO_SETUP
+#define DISABLE_PCM_SETUP /**< Disable PCM setup API */
+#undef DISABLE_PCM_SETUP
+#define ENABLE_DEBUG /**< Enable debug messages - function entry, etc. */
+/* #undef ENABLE_DEBUG */
+#define DISABLE_CI_SETUP /**< Disable CI Setup */
+#undef DISABLE_CI_SETUP
+#define DISABLE_ZSYNTH_SETUP /**< Disable Zsyth/impedance setup */
+#undef DISABLE_ZSYNTH_SETUP
+#define DISABLE_MALLOC /**< Don't use MALLOC/FREE, instead assume user will statically allocate */
+#undef DISABLE_MALLOC
+#define DISABLE_HPF_WIDEBAND /**< Disable RX and TX HPF when in WIDEBAND mode */
+#undef DISABLE_HPF_WIDEBAND
+#define PROSLIC_OPTIMIZE_INTERRUPTS /**< Enable optimization for interrupts for dual channel devices. This
+ optimization assumes channel number is on even boundaries - that is
+ 0,2,4, are the first channel for each dual channel devices.
+ */
+#define ENABLE_TRACES /**< Enable this to see major API calls during software execution. NOT recommended for production code. */
+#undef ENABLE_TRACES
+#ifdef PROSLIC_DOXYGEN
+#define SI_ENABLE_LOGGING /**< This will enable the ability to log to a file - this assumes the application supports this. See api_demo for example implementation */
+#undef SI_ENABLE_LOGGING
+#endif
+/**@} */
+
+
+#define SIVOICE_NEON_MWI_SUPPORT /**< Enable NEON Message Waiting Indicator support */
+/* #undef SIVOICE_NEON_MWI_SUPPORT */
+
+#define GCI_MODE /**< Set if GCI vs. SPI/PCM mode is to be used */
+#undef GCI_MODE
+
+#define ENABLE_HIRES_GAIN /**< Set for zsynth preset gains in dB*10 rather than dB */
+#undef ENABLE_HIRES_GAIN
+
+#define PRINT_TO_STRING 0 /**< Set this to 1 if printing to a string buffer vs. console - you may change/remove this*/
+
+
+/** @defgroup MULTI_BOM Multiple Device/BOM Option Support
+ * Assign patch structure names to macros used in device drivers
+* @{ */
+#define SIVOICE_MULTI_BOM_SUPPORT /**< Enable Multiple General Configuration Support */
+//#undef SIVOICE_MULTI_BOM_SUPPORT
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+#define SI3217X_PATCH_B_FLBK si3217xPatchRevBFlbk /**< Si3217x B Flyback DCDC Converter patch */
+#define SI3217X_PATCH_B_BKBT si3217xPatchRevBBkbt /**< Si3217x B Buck-boost DCDC Converter patch */
+#define SI3217X_PATCH_B_PBB si3217xPatchRevBBkbt /**< Si3217x B PMOS Buck-boost DCDC Converter patch */
+#define SI3217X_PATCH_B_LCQCUK si3217xPatchRevBFlbk /**< Si3217x C Quasi-CUK DCDC Converter patch */
+#define SI3217X_PATCH_C_FLBK si3217xPatchRevCFlbk /**< Si3217x C Flyback DCDC Converter patch */
+#define SI3217X_PATCH_C_BKBT si3217xPatchRevCFlbk /**< Si3217x C Buck-boost DCDC Converter patch */
+#define SI3217X_PATCH_C_PBB si3217xPatchRevCFlbk /**< Si3217x C PMOS Buck-boost DCDC Converter patch */
+#define SI3217X_PATCH_C_LCQCUK si3217xPatchRevCFlbk /**< Si3217x C Quasi-CUK DCDC Converter patch */
+
+#define SI3218X_PATCH_A si3218xPatchRevALCQC /**< Si3218x LCQC 5W DCDC Converter patch */
+
+#define SI3226X_PATCH_C_FLBK si3226xPatchRevCFlbk /**< Si3226x RevC Flyback DCDC Converter Patch */
+#define SI3226X_PATCH_C_CUK si3226xPatchRevCFlbk /**< Si3226x RevC Full CUK DCDC Converter Patch */
+#define SI3226X_PATCH_C_QCUK si3226xPatchRevCFlbk /**< Si3226x RevC Quasi-CUK DCDC Converter Patch */
+#define SI3226X_PATCH_C_LCQCUK si3226xPatchRevCFlbk /**< Si3226x RevC Low-cost QCUK DCDC Converter Patch */
+#define SI3226X_PATCH_C_TSS si3226xPatchRevCTss /**< Si3226x RevC TSS DCDC Converter Patch */
+#define SI3226X_PATCH_C_TSS_ISO si3226xPatchRevCTssIso /**< Si3226x RevC TSS (isolated) DCDC Converter Patch */
+#define SI3226X_PATCH_C_PBB si3226xPatchRevCFlbk /**< Si3226x PMOS Buck-boost DCDC Converter patch */
+#define SI3226x_PATCH_C_FIXRL SI3226X_PATCH_C_TSS
+#define SI3226X_PATCH_C_QSS si3226xPatchRevCTss /**< Si3226x RevC QSS DCDC Converter Patch */
+#define SI3226X_PATCH_C_BB si3226xPatchRevCFlbk /**< Si3226x BJT Buck-boost DCDC Converter patch */
+
+#define SI3228X_PATCH_A si3228xPatchRevALCQC /**< Si3228x LCQC 5W DCDC Converter patch */
+
+#endif
+
+/* Default patch names for backwards compatibility */
+#define SI3217X_PATCH_B_DEFAULT RevBPatch
+#define SI3217X_PATCH_C_DEFAULT RevCPatch
+#define SI3218X_PATCH_A_DEFAULT RevAPatch
+#define SI3226X_PATCH_C_DEFAULT RevCPatch
+#define SI3228X_PATCH_A_DEFAULT RevAPatch
+
+
+#define PROSLIC_LINUX_KERNEL
+/** @} MULTI_BOM */
+
+#if !defined(PROSLIC_LINUX_KERNEL)
+#include "stdio.h"
+
+#if (PRINT_TO_STRING)
+extern char outputBuffer[];
+#define LOGPRINT(...) sprintf(&(outputBuffer[strlen(outputBuffer)]),__VA_ARGS__)
+#else
+#define LOGPRINT printf
+#endif /* PRINT_TO_STRING */
+
+#else /* Linux kernel space */
+#include <linux/module.h>
+#define LOGPRINT printk
+#endif
+
+#ifdef SI_ENABLE_LOGGING
+
+#ifdef PROLSIC_LINUX_KERNEL
+#error "Logging currently implemented only for userspace programs."
+#endif
+
+extern FILE *SILABS_LOG_FP; /* This global variable would need to be initialized by the user's program - see the api demo for example */
+#endif /* SI_ENABLE_LOGGING */
+
+#ifdef ENABLE_DEBUG
+#define DEBUG_ENABLED(X) ((X)->debugMode & 1)
+
+#ifdef SI_ENABLE_LOGGING
+#define DEBUG_PRINT(CHPTR,...) if( DEBUG_ENABLED(CHPTR) ){ fprintf(SILABS_LOG_FP, __VA_ARGS__); fflush(SILABS_LOG_FP);}
+#else
+#define DEBUG_PRINT(CHPTR,...) if( DEBUG_ENABLED(CHPTR) ) LOGPRINT(__VA_ARGS__)
+#endif /* Logging */
+
+#else /* No Debug */
+/* Handled in si_voice.h */
+#endif
+
+#ifdef ENABLE_TRACES
+#define TRACE_ENABLED(X) ((X)->debugMode & 2)
+
+#ifdef SI_ENABLE_LOGGING
+#define TRACEPRINT(CHPTR,FMT,...) if(TRACE_ENABLED(CHPTR)) {fprintf(SILABS_LOG_FP, "#TRC:%s channel: %d "FMT,__FUNCTION__, (CHPTR)->channel,__VA_ARGS__); fflush(SILABS_LOG_FP); }
+#define TRACEPRINT_NOCHAN(FMT,...) fprintf(SILABS_LOG_FP, "#TRC:%s "FMT,__FUNCTION__, __VA_ARGS__); fflush(SILABS_LOG_FP)
+#else
+#define TRACEPRINT(CHPTR,FMT,...) if(TRACE_ENABLED(CHPTR)) LOGPRINT("TRC:%s channel: %d "FMT,__FUNCTION__, (CHPTR)->channel,__VA_ARGS__)
+#define TRACEPRINT_NOCHAN(FMT,...) LOGPRINT("TRC:%s "FMT,__FUNCTION__, __VA_ARGS__)
+
+#endif /* SI_ENABLE_LOGGING */
+#else
+/* Handled in si_voice.h */
+#endif
+
+
+/** @defgroup PSTN_CFG PSTN Detection Options
+* @{ */
+#define PSTN_DET_ENABLE /**< Define to include Differential PSTN detection code */
+#undef PSTN_DET_ENABLE
+
+#define PSTN_DET_OPEN_FEMF_SETTLE 1500 /**< OPEN foreign voltage measurement settle time */
+#define PSTN_DET_DIFF_SAMPLES 4 /**< Number of I/V samples averaged [1 to 16] */
+#define PSTN_DET_MIN_ILOOP 700 /**< Minimum acceptable loop current */
+#define PSTN_DET_MAX_FEMF 10000 /**< Maximum OPEN state foreign voltage */
+#define PSTN_DET_POLL_RATE 10 /**< Rate of re-entrant code in ms */
+#define PSTN_DET_DIFF_IV1_SETTLE 1000 /**< Settle time before first I/V measurment in ms */
+#define PSTN_DET_DIFF_IV2_SETTLE 1000 /**< Settle time before first I/V measurment in ms */
+
+/** @} PSTN_CFG */
+#define SIVOICE_CFG_NEWTYPES_ONLY 1 /**< Set if not supporting Legacy types */
+
+/**@} */
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic_tstin.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic_tstin.h
new file mode 100644
index 0000000..5ab4e4a
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/proslic_tstin.h
@@ -0,0 +1,409 @@
+/*
+** Copyright (c) 2011-2016 by Silicon Laboratories
+** $Id: proslic_tstin.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Author(s):
+** cdp
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the inward test implementations.
+**
+*/
+#ifndef PROSLIC_TSTIN_H
+#define PROSLIC_TSTIN_H
+
+#include "si_voice_datatypes.h"
+#include "proslic.h"
+
+/** @addtogroup DIAGNOSTICS
+ * @{
+ */
+/** @defgroup PROSLIC_TSTIN ProSLIC Inward Tests (Test-In)
+ * This section documents functions and data structures related to the
+ * ProSLIC/FXS inward test implementations.
+ * @{
+ */
+
+#define MIN_RINGING_SAMPLES 16 /**< Minimum number of ringing samples for measuring ring amplitude */
+#define MAX_RINGING_SAMPLES 255 /**< Maximum number of ringing samples for measuring ring amplitude */
+#define MIN_RINGING_SAMPLE_INTERVAL 1 /**< Minimum sample interval for measuring ring amplitude */
+#define MAX_RINGING_SAMPLE_INTERVAL 10 /**< Maximum sample interval for measuring ring amplitude */
+
+/**
+* Test-In results status
+*/
+enum
+{
+ TSTIN_RESULTS_INVALID,
+ TSTIN_RESULTS_VALID
+};
+
+/**
+* PCM format options
+*/
+enum
+{
+ PCM_8BIT,
+ PCM_16BIT
+};
+
+/**
+* Abort if Line-in-use option
+*/
+enum
+{
+ ABORT_LIU_DISABLED,
+ ABORT_LIU_ENABLED
+};
+
+/**
+* Check for loop closure option
+*/
+enum
+{
+ LCR_CHECK_DISABLED,
+ LCR_CHECK_ENABLED
+};
+
+/**
+* Check for ringtrip option
+*/
+enum
+{
+ RTP_CHECK_DISABLED,
+ RTP_CHECK_ENABLED
+};
+
+
+/**
+ * Defines generic test limit/value/status structure
+ */
+typedef struct
+{
+ int32 lowerLimit; /**< Lower test limit */
+ int32 upperLimit; /**< Upper test limit */
+ int32 value; /**< Numeric test result */
+ uInt8 testResult; /**< 0 - Fail, 1 - pass */
+} proslicTestObj;
+
+/**
+ * Defines structure for PCM Loopback Test
+ */
+typedef struct
+{
+ BOOLEAN testEnable; /**< Gate execution/updating of results with this flag */
+ BOOLEAN pcmLpbkEnabled; /**< Indicates if test data is valid (1) or stale (0) */
+ BOOLEAN pcm8BitLinear; /**< Set to use 8 bit linear mode (used if normally using ulaw or alaw) */
+ uInt8 pcmModeSave; /**< Store entry PCMMODE value */
+ uInt8 testResult; /**< OR of all test results in this structure */
+} proslicPcmLpbkTest;
+
+
+/**
+ * Defines structure for DC Feed Test
+ */
+typedef struct
+{
+ BOOLEAN testEnable; /**< Gate execution/updating of results with this flag */
+ BOOLEAN testDataValid; /**< Indicates if test data is valid (1) or stale (0) */
+ BOOLEAN abortIfLineInUse; /**< Abort test if LCR set at the start of test. Leaves results invalid */
+ BOOLEAN applyLcrThresh; /**< Apply alternate LCR thresholds to ensure LCR event occurs */
+ uInt32
+ altLcrOffThresh; /**< Optional LCROFFHK threshold to apply during test */
+ uInt32 altLcrOnThresh; /**< Optional LCRONHK threshold to apply during test */
+ BOOLEAN lcrStatus; /**< Indicates LCR status after applying test load */
+ proslicTestObj dcfeedVtipOnhook; /**< On-hook VTIP test results */
+ proslicTestObj dcfeedVringOnhook; /**< On-hook VRING test results */
+ proslicTestObj dcfeedVloopOnhook; /**< On-hook VLOOP test results */
+ proslicTestObj dcfeedVbatOnhook; /**< On-hook VBAT test results */
+ proslicTestObj dcfeedItipOnhook; /**< On-hook ITIP test results */
+ proslicTestObj dcfeedIringOnhook; /**< On-hook IRING test results */
+ proslicTestObj dcfeedIloopOnhook; /**< On-hook ILOOP test results */
+ proslicTestObj dcfeedIlongOnhook; /**< On-hook ILONG test results */
+ proslicTestObj dcfeedVtipOffhook; /**< Off-hook VTIP test results */
+ proslicTestObj dcfeedVringOffhook; /**< Off-hook VRING test results */
+ proslicTestObj dcfeedVloopOffhook; /**< Off-hook VLOOP test results */
+ proslicTestObj dcfeedVbatOffhook; /**< Off-hook VBAT test results */
+ proslicTestObj dcfeedItipOffhook; /**< Off-hook ITIP test results */
+ proslicTestObj dcfeedIringOffhook; /**< Off-hook IRING test results */
+ proslicTestObj dcfeedIloopOffhook; /**< Off-hook ILOOP test results */
+ proslicTestObj dcfeedIlongOffhook; /**< Off-hook ILONG test results */
+ uInt8 testResult; /**< OR of all test results in this structure */
+} proslicDcFeedTest;
+
+
+/**
+ * Defines structure for Ringing Test
+ */
+typedef struct
+{
+ BOOLEAN testEnable; /**< Gate execution/updating of results with this flag */
+ BOOLEAN testDataValid; /**< Indicates if test data is valid (1) or stale (0) */
+ BOOLEAN abortIfLineInUse; /**< Abort test if LCR set at the start of test. Leaves results invalid */
+ uInt16 numSamples; /**< Number of samples taken */
+ uInt8
+ sampleInterval; /**< Sample interval (in ms - range 1 to 100) */
+ BOOLEAN ringtripTestEnable; /**< Enable ringtrip test */
+ BOOLEAN rtpStatus; /**< RTP Bit */
+ proslicTestObj ringingVac; /**< Ringing AC Voltage test results */
+ proslicTestObj ringingVdc; /**< Ringing DC Voltage test results */
+ uInt8 testResult; /**< OR of all test results in this structure */
+} proslicRingingTest;
+
+/**
+ * Defines structure for Battery Test
+ */
+typedef struct
+{
+ BOOLEAN testEnable; /**< Gate execution/updating of results with this flag */
+ BOOLEAN testDataValid; /**< Indicates if test data is valid (1) or stale (0) */
+ proslicTestObj vbat; /**< VBAT test results */
+ uInt8 testResult; /**< OR of all test results in this structure */
+} proslicBatteryTest;
+
+/**
+ * Defines structure for Audio Test
+ */
+typedef struct
+{
+ BOOLEAN testEnable; /**< Gate execution/updating of results with this flag */
+ BOOLEAN testDataValid; /**< Indicates if test data is valid (1) or stale (0) */
+ BOOLEAN abortIfLineInUse; /**< Abort test if LCR set at the start of test. Leaves results invalid */
+ int32
+ zerodBm_mVpk; /**< 0dBm voltage (in mVpk) of ref impedance */
+ proslicTestObj txGain; /**< TX path gain test results */
+ proslicTestObj rxGain; /**< RX path gain test results */
+ uInt8 testResult; /**< OR of all test results in this structure */
+} proslicAudioTest;
+
+
+/**
+ * Defines structure for all tests
+ */
+typedef struct
+{
+ proslicPcmLpbkTest pcmLpbkTest;
+ proslicDcFeedTest dcFeedTest;
+ proslicRingingTest ringingTest;
+ proslicBatteryTest batteryTest;
+ proslicAudioTest audioTest;
+} proslicTestInObjType;
+
+typedef proslicTestInObjType *proslicTestInObjType_ptr;
+
+
+/**
+ * @brief
+ * Allocate memory and initialize the given structure.
+ *
+ * @param[in,out] *pTstin - the structure to initialize
+ * @param[in] num_objs - number of Testin structures to allocate.
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa ProSLIC_DestroyTestInObjs
+ */
+int ProSLIC_createTestInObjs(proslicTestInObjType_ptr *pTstin, uInt32 num_objs);
+#define ProSLIC_createTestInObj(X) ProSLIC_createTestInObjs((X),1)
+
+/**
+ * @brief
+ * Free memory reserved by the given structure.
+ *
+ * @param[in,out] *pTstin - the structure to initialize
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_destroyTestInObjs(proslicTestInObjType_ptr *pTstin);
+#define ProSLIC_destroyTestInObj ProSLIC_destroyTestInObjs
+
+/**
+ * @brief
+ * Enable PCM loopback.
+ *
+ * @param[in] pProslic - channel data structure
+ * @param[in,out] pTstin - all control, limits, and results
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_testInPCMLpbkEnable(proslicChanType_ptr pProslic,
+ proslicTestInObjType_ptr pTstin);
+
+
+/**
+ * @brief
+ * Disable PCM loopback.
+ *
+ * @param[in] pProslic - channel data structure
+ * @param[in,out] pTstin - all control, limits, and results
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_testInPCMLpbkDisable(proslicChanType_ptr pProslic,
+ proslicTestInObjType_ptr pTstin);
+
+
+/**
+ * @brief
+ * DC Feed Test - the pTstin->dcFeedTest contains control, limits and test result information.
+ *
+ * @param[in] pProslic - channel data structure
+ * @param[in,out] pTstin - all control, limits, and results
+ *
+ * @retval int - error from @ref errorCodeType
+ * @retval RC_TEST_PASSED indicates test completed and passed
+ * @retval RC_TEST_FAILED indicates test completed and failed
+ * @retval RC_UNSUPPORTED_FEATURE indicates feature not supported on this device
+ * @retval RC_TEST_DISABLED indicates test has not been initialized/enabled
+ * @retval RC_LINE_IN_USE indicates LCS already set
+ *
+ */
+int ProSLIC_testInDCFeed(proslicChanType_ptr pProslic,
+ proslicTestInObjType_ptr pTstin);
+
+
+/**
+ * @brief
+ * Ringing and Ringtrip Test
+ *
+ * @param[in] pProslic - channel data structure
+ * @param[in,out] pTstin - all control, limits, and results
+ *
+ * @retval int - error from @ref errorCodeType
+ * @retval RC_TEST_PASSED indicates test completed and passed
+ * @retval RC_TEST_FAILED indicates test completed and failed
+ * @retval RC_UNSUPPORTED_FEATURE indicates feature not supported on this device
+ * @retval RC_TEST_DISABLED indicates test has not been initialized/enabled
+ * @retval RC_LINE_IN_USE indicates LCS already set
+ *
+ */
+int ProSLIC_testInRinging(proslicChanType_ptr pProslic,
+ proslicTestInObjType_ptr pTstin);
+
+/**
+ * @brief
+ * Battery Test -
+ * pTstin contains both the configuration data and test results.
+ * See **pTstin->batteryTest.testResult - Pass/Fail result
+ *
+ * @param[in] pProslic - channel data structure
+ * @param[in,out] pTstin - configuration and test results
+ *
+ * @retval int - error from @ref errorCodeType
+ * @retval RC_TEST_PASSED indicates test completed and passed
+ * @retval RC_TEST_FAILED indicates test completed and failed
+ * @retval RC_UNSUPPORTED_FEATURE indicates feature not supported on this device
+ * @retval RC_TEST_DISABLED indicates test has not been initialized/enabled
+ *
+ */
+int ProSLIC_testInBattery(proslicChanType_ptr pProslic,
+ proslicTestInObjType_ptr pTstin);
+
+/**
+ * @brief
+ * Audio level inward test. pTstin->audioTest contains all control, limits and results.
+ *
+ * @param[in] pProslic - channel data structure
+ * @param[in,out] pTstin - all control, limits, and results
+ *
+ * @retval int - error from @ref errorCodeType
+ * @retval RC_TEST_PASSED indicates test completed and passed
+ * @retval RC_TEST_FAILED indicates test completed and failed
+ * @retval RC_UNSUPPORTED_FEATURE indicates feature not supported on this device
+ * @retval RC_TEST_DISABLED indicates test has not been initialized/enabled
+ * @retval RC_LINE_IN_USE indicates LCS already set
+ *
+ */
+int ProSLIC_testInAudio(proslicChanType_ptr pProslic,
+ proslicTestInObjType_ptr pTstin);
+
+/**
+ * @brief
+ * Initialize/Enable PCM Loopback Test. Links test config/limits
+ * to inward test data structure.
+ *
+ * @param[in,out] pTstin->pcmLpbkTest - all control, limits, and results
+ * @param[in] pcmLpbkTest - test config and limits to link to pTstin->pcmLpbkTest
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_testInPcmLpbkSetup(proslicTestInObjType *pTstin,
+ proslicPcmLpbkTest *pcmLpbkTest);
+
+/**
+ * @brief
+ * Initialize/Enable DC Feed Test. Links test config/limits
+ * to inward test data structure.
+ *
+ * @param[in,out] pTstin->dcFeedTest - all control, limits, and results
+ * @param[in] dcFeedTest - test config and limits to link to pTstin->dcFeedTest
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_testInDcFeedSetup(proslicTestInObjType *pTstin,
+ proslicDcFeedTest *dcFeedTest);
+
+/**
+ * @brief
+ * Initialize/Enable Ringing Test. Links test config/limits
+ * to inward test data structure.
+ *
+ * @param[in,out] pTstin->ringingTest - all control, limits, and results
+ * @param[in] ringingTest - test config and limits to link to pTstin->ringingTest
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_testInRingingSetup(proslicTestInObjType *pTstin,
+ proslicRingingTest *ringingTest);
+
+/**
+ * @brief
+ * Initialize/Enable Battery Test. Links test config/limits
+ * to inward test data structure.
+ *
+ * @param[in,out] pTstin->batteryTest - all control, limits, and results
+ * @param[in] batteryTest - test config and limits to link to pTstin->batteryTest
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_testInBatterySetup(proslicTestInObjType *pTstin,
+ proslicBatteryTest *batteryTest);
+
+/**
+ * @brief
+ * Initialize/Enable Audio Test. Links test config/limits
+ * to inward test data structure.
+ *
+ * @param[in,out] pTstin->audioTest - all control, limits, and results
+ * @param[in] audioTest - test config and limits to link to pTstin->audioTest
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+int ProSLIC_testInAudioSetup(proslicTestInObjType *pTstin,
+ proslicAudioTest *audioTest);
+
+
+/**
+ * @brief
+ * Debug utility to log presently loaded test limits
+ *
+ * @param[in] pProslic - channel data structure
+ * @param[in] pTstin - inward test data structure
+ *
+ * @retval int - error from @ref errorCodeType
+ * @retval RC_NONE indicates no error.
+ * @retval RC_UNSUPPORTED_FEATURE indicates feature not supported on this device
+ */
+int ProSLIC_testInPrintLimits(proslicChanType *pProslic,
+ proslicTestInObjType *pTstin);
+
+/** @} PROSLIC_TSTIN */
+/** @} DIAGNOSTICS */
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x.h
new file mode 100644
index 0000000..d4c39fe
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x.h
@@ -0,0 +1,295 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef SI3217XH_H
+#define SI3217XH_H
+
+#include "proslic.h"
+
+#define SI3217X_CHAN_PER_DEVICE 2 /* NOTE: 178 has 2 w/ a DAA enabled, we'll assume this is the case... */
+
+/*
+**
+** Si3217x General Constants
+**
+*/
+#define SI3217X_REVA 0
+#define SI3217X_REVB 1
+#define SI3217X_REVC 2
+
+/*
+** Calibration Constants
+*/
+#define SI3217XB_CAL_STD_CALR1 0xFF
+#define SI3217XB_CAL_STD_CALR2 0xF8
+
+#define SI3217XC_CAL_STD_CALR1 0xC0
+#define SI3217XC_CAL_STD_CALR2 0x18
+
+/* Timeouts in 10s of ms */
+#define SI3217X_TIMEOUT_DCDC_UP 200
+#define SI3217X_TIMEOUT_DCDC_DOWN 200
+
+
+/*
+** SI3217X DataTypes/Function Definitions
+*/
+
+#define NUMIRQ 4
+
+/*
+** Defines structure for configuring gpio
+*/
+typedef struct
+{
+ uInt8 outputEn;
+ uInt8 analog;
+ uInt8 direction;
+ uInt8 manual;
+ uInt8 polarity;
+ uInt8 openDrain;
+ uInt8 batselmap;
+} Si3217x_GPIO_Cfg;
+
+typedef ProSLIC_DCfeed_Cfg Si3217x_DCfeed_Cfg;
+
+/*
+** New Si3217x General Parameter Struct Supporting Revs B and C
+*/
+typedef struct
+{
+ /* Flags */
+ uInt8 device_key;
+ bomOptionsType bom_option;
+ gateDriveType gdrv_option;
+ vdcRangeType vdc_range;
+ vdaaSupportType daa_enable;
+ autoZcalType zcal_en;
+ pmBomType pm_bom;
+ /* Raw Parameters */
+ ramData i_oithresh;
+ ramData i_oithresh_lo;
+ ramData i_oithresh_hi;
+ ramData v_ovthresh;
+ ramData v_uvthresh;
+ ramData v_uvhyst;
+ /* RAM Updates */
+ ramData dcdc_fsw_vthlo;
+ ramData dcdc_fsw_vhyst;
+ ramData p_th_hvic;
+ ramData coef_p_hvic;
+ ramData bat_hyst;
+ ramData
+ vbath_expect; /* default - this is overwritten by dc feed preset */
+ ramData
+ vbatr_expect; /* default - this is overwritten by ring preset */
+ ramData pwrsave_timer;
+ ramData pwrsave_ofhk_thresh;
+ ramData vbat_track_min; /* Same as DCDC_VREF_MIN */
+ ramData vbat_track_min_rng; /* Same as DCDC_VREF_MIN_RNG */
+ ramData dcdc_fsw_norm;
+ ramData dcdc_fsw_norm_lo;
+ ramData dcdc_fsw_ring;
+ ramData dcdc_fsw_ring_lo;
+ ramData dcdc_din_lim;
+ ramData dcdc_vout_lim;
+ ramData dcdc_ana_scale;
+ ramData therm_dbi;
+ ramData vov_dcdc_slope;
+ ramData vov_dcdc_os;
+ ramData vov_ring_bat_dcdc;
+ ramData vov_ring_bat_max;
+ ramData dcdc_verr;
+ ramData dcdc_verr_hyst;
+ ramData pd_uvlo;
+ ramData pd_ovlo;
+ ramData pd_oclo;
+ ramData pd_swdrv;
+ ramData dcdc_uvpol;
+ ramData dcdc_rngtype;
+ ramData dcdc_ana_toff;
+ ramData dcdc_ana_tonmin;
+ ramData dcdc_ana_tonmax;
+ uInt8 irqen1;
+ uInt8 irqen2;
+ uInt8 irqen3;
+ uInt8 irqen4;
+ uInt8 enhance;
+ uInt8 daa_cntl;
+ uInt8 auto_reg;
+} Si3217x_General_Cfg;
+
+/*
+** Defines structure for configuring pcm
+*/
+typedef struct
+{
+ uInt8 pcmFormat;
+ uInt8 widebandEn;
+ uInt8 pcm_tri;
+ uInt8 tx_edge;
+ uInt8 alaw_inv;
+} Si3217x_PCM_Cfg;
+
+/*
+** Defines structure for configuring pulse metering
+*/
+typedef struct
+{
+ ramData pm_amp_thresh;
+ uInt8 pmFreq;
+ uInt8 pmRampRate;
+ uInt8 pmCalForce;
+ uInt8 pmPwrSave;
+ uInt8 pmAuto;
+ ramData pmActive;
+ ramData pmInactive;
+} Si3217x_PulseMeter_Cfg;
+/*
+** Defines structure for configuring FSK generation
+*/
+typedef ProSLIC_FSK_Cfg Si3217x_FSK_Cfg;
+
+
+/*
+** Defines structure for configuring impedance synthesis
+*/
+typedef struct
+{
+ ramData zsynth_b0;
+ ramData zsynth_b1;
+ ramData zsynth_b2;
+ ramData zsynth_a1;
+ ramData zsynth_a2;
+ uInt8 ra;
+} Si3217x_Zsynth_Cfg;
+
+/*
+** Defines structure for configuring hybrid
+*/
+typedef struct
+{
+ ramData ecfir_c2;
+ ramData ecfir_c3;
+ ramData ecfir_c4;
+ ramData ecfir_c5;
+ ramData ecfir_c6;
+ ramData ecfir_c7;
+ ramData ecfir_c8;
+ ramData ecfir_c9;
+ ramData ecfir_b0;
+ ramData ecfir_b1;
+ ramData ecfir_a1;
+ ramData ecfir_a2;
+} Si3217x_hybrid_Cfg;
+
+/*
+** Defines structure for configuring GCI CI bits
+*/
+typedef struct
+{
+ uInt8 gci_ci;
+} Si3217x_CI_Cfg;
+
+/*
+** Defines structure for configuring audio eq
+*/
+
+typedef struct
+{
+ ramData txaceq_c0;
+ ramData txaceq_c1;
+ ramData txaceq_c2;
+ ramData txaceq_c3;
+
+ ramData rxaceq_c0;
+ ramData rxaceq_c1;
+ ramData rxaceq_c2;
+ ramData rxaceq_c3;
+} Si3217x_audioEQ_Cfg;
+
+/*
+** Defines structure for configuring audio gain
+*/
+typedef ProSLIC_audioGain_Cfg Si3217x_audioGain_Cfg;
+
+
+
+typedef struct
+{
+ Si3217x_audioEQ_Cfg audioEQ;
+ Si3217x_hybrid_Cfg hybrid;
+ Si3217x_Zsynth_Cfg zsynth;
+ ramData txgain;
+ ramData rxgain;
+ ramData rxachpf_b0_1;
+ ramData rxachpf_b1_1;
+ ramData rxachpf_a1_1;
+ int16 txgain_db; /*overall gain associated with this configuration*/
+ int16 rxgain_db;
+} Si3217x_Impedance_Cfg;
+
+
+
+/*
+** Defines structure for configuring tone generator
+*/
+typedef ProSLIC_Tone_Cfg Si3217x_Tone_Cfg;
+
+/*
+** Defines structure for configuring ring generator
+*/
+typedef struct
+{
+ ramData rtper;
+ ramData freq;
+ ramData amp;
+ ramData phas;
+ ramData offset;
+ ramData slope_ring;
+ ramData iring_lim;
+ ramData rtacth;
+ ramData rtdcth;
+ ramData rtacdb;
+ ramData rtdcdb;
+ ramData vov_ring_bat;
+ ramData vov_ring_gnd;
+ ramData vbatr_expect;
+ uInt8 talo;
+ uInt8 tahi;
+ uInt8 tilo;
+ uInt8 tihi;
+ ramData adap_ring_min_i;
+ ramData counter_iring_val;
+ ramData counter_vtr_val;
+ ramData ar_const28;
+ ramData ar_const32;
+ ramData ar_const38;
+ ramData ar_const46;
+ ramData rrd_delay;
+ ramData rrd_delay2;
+ ramData dcdc_vref_min_rng;
+ uInt8 ringcon;
+ uInt8 userstat;
+ ramData vcm_ring;
+ ramData vcm_ring_fixed;
+ ramData delta_vcm;
+ ramData dcdc_rngtype;
+} Si3217x_Ring_Cfg;
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_common_registers.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_common_registers.h
new file mode 100644
index 0000000..52b337c
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_common_registers.h
@@ -0,0 +1,1313 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_common_registers.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**/
+
+#ifndef SI3217X_COMM_REGS_H
+#define SI3217X_COMM_REGS_H
+
+/*
+** SI3217X Common SPI Registers
+*/
+enum SI3217X_COMM_REG
+{
+ SI3217X_COM_REG_ID = 0,
+ SI3217X_COM_REG_RESET = 1,
+ SI3217X_COM_REG_MSTREN = 2,
+ SI3217X_COM_REG_MSTRSTAT = 3,
+ SI3217X_COM_REG_RAMSTAT = 4,
+ SI3217X_COM_REG_RAM_ADDR_HI = 5,
+ SI3217X_COM_REG_RAM_DATA_B0 = 6,
+ SI3217X_COM_REG_RAM_DATA_B1 = 7,
+ SI3217X_COM_REG_RAM_DATA_B2 = 8,
+ SI3217X_COM_REG_RAM_DATA_B3 = 9,
+ SI3217X_COM_REG_RAM_ADDR_LO = 10,
+ SI3217X_COM_REG_PCMMODE = 11,
+ SI3217X_COM_REG_PCMTXLO = 12,
+ SI3217X_COM_REG_PCMTXHI = 13,
+ SI3217X_COM_REG_PCMRXLO = 14,
+ SI3217X_COM_REG_PCMRXHI = 15,
+ SI3217X_COM_REG_IRQ = 16, /* not in 17B */
+ SI3217X_COM_REG_IRQ0 = 17,
+ SI3217X_COM_REG_IRQ1 = 18,
+ SI3217X_COM_REG_IRQ2 = 19,
+ SI3217X_COM_REG_IRQ3 = 20,
+ SI3217X_COM_REG_IRQ4 = 21,
+ SI3217X_COM_REG_IRQEN1 = 22,
+ SI3217X_COM_REG_IRQEN2 = 23,
+ SI3217X_COM_REG_IRQEN3 = 24,
+ SI3217X_COM_REG_IRQEN4 = 25,
+ SI3217X_COM_REG_CALR0 = 26,
+ SI3217X_COM_REG_CALR1 = 27,
+ SI3217X_COM_REG_CALR2 = 28,
+ SI3217X_COM_REG_CALR3 = 29,
+ SI3217X_COM_REG_LINEFEED = 30,
+ SI3217X_COM_REG_POLREV = 31,
+ SI3217X_COM_REG_SPEEDUP_DIS = 32,
+ SI3217X_COM_REG_SPEEDUP = 33,
+ SI3217X_COM_REG_LCRRTP = 34,
+ SI3217X_COM_REG_OFFLOAD = 35,
+ SI3217X_COM_REG_BATSELMAP = 36,
+ SI3217X_COM_REG_BATSEL = 37,
+ SI3217X_COM_REG_RINGCON = 38,
+ SI3217X_COM_REG_RINGTALO = 39,
+ SI3217X_COM_REG_RINGTAHI = 40,
+ SI3217X_COM_REG_RINGTILO = 41,
+ SI3217X_COM_REG_RINGTIHI = 42,
+ SI3217X_COM_REG_LOOPBACK = 43,
+ SI3217X_COM_REG_DIGCON = 44,
+ SI3217X_COM_REG_RA = 45,
+ SI3217X_COM_REG_ZCAL_EN = 46,
+ SI3217X_COM_REG_ENHANCE = 47,
+ SI3217X_COM_REG_OMODE = 48,
+ SI3217X_COM_REG_OCON = 49,
+ SI3217X_COM_REG_O1TALO = 50,
+ SI3217X_COM_REG_O1TAHI = 51,
+ SI3217X_COM_REG_O1TILO = 52,
+ SI3217X_COM_REG_O1TIHI = 53,
+ SI3217X_COM_REG_O2TALO = 54,
+ SI3217X_COM_REG_O2TAHI = 55,
+ SI3217X_COM_REG_O2TILO = 56,
+ SI3217X_COM_REG_O2TIHI = 57,
+ SI3217X_COM_REG_FSKDAT = 58,
+ SI3217X_COM_REG_FSKDEPTH = 59,
+ SI3217X_COM_REG_TONDTMF = 60,
+ SI3217X_COM_REG_TONDET = 61,
+ SI3217X_COM_REG_TONEN = 62,
+ SI3217X_COM_REG_GCI_CI = 63,
+ SI3217X_COM_REG_GLOBSTAT1 = 64,
+ SI3217X_COM_REG_GLOBSTAT2 = 65,
+ SI3217X_COM_REG_USERSTAT = 66,
+ SI3217X_COM_REG_GPIO = 67,
+ SI3217X_COM_REG_GPIO_CFG1 = 68,
+ SI3217X_COM_REG_GPIO_CFG2 = 69,
+ SI3217X_COM_REG_GPIO_CFG3 = 70,
+ SI3217X_COM_REG_DIAG1 = 71,
+ SI3217X_COM_REG_DIAG2 = 72,
+ SI3217X_COM_REG_CM_CLAMP = 73,
+ SI3217X_COM_REG_PMCON = 75,
+ SI3217X_COM_REG_AUTO = 80,
+ SI3217X_COM_REG_JMPEN = 81,
+ SI3217X_COM_REG_JMP0LO = 82,
+ SI3217X_COM_REG_JMP0HI = 83,
+ SI3217X_COM_REG_JMP1LO = 84,
+ SI3217X_COM_REG_JMP1HI = 85,
+ SI3217X_COM_REG_JMP2LO = 86,
+ SI3217X_COM_REG_JMP2HI = 87,
+ SI3217X_COM_REG_JMP3LO = 88,
+ SI3217X_COM_REG_JMP3HI = 89,
+ SI3217X_COM_REG_JMP4LO = 90,
+ SI3217X_COM_REG_JMP4HI = 91,
+ SI3217X_COM_REG_JMP5LO = 92,
+ SI3217X_COM_REG_JMP5HI = 93,
+ SI3217X_COM_REG_JMP6LO = 94,
+ SI3217X_COM_REG_JMP6HI = 95,
+ SI3217X_COM_REG_JMP7LO = 96,
+ SI3217X_COM_REG_JMP7HI = 97,
+ SI3217X_COM_REG_PDN = 98,
+ SI3217X_COM_REG_PDN_STAT = 99,
+ SI3217X_COM_REG_PDN2 = 100,
+ SI3217X_COM_REG_PDN2_STAT = 101,
+ SI3217X_COM_REG_M1_OSC_LO = 112,
+ SI3217X_COM_REG_M1_OSC_HI = 113,
+ SI3217X_COM_REG_BITCNT_LO = 114,
+ SI3217X_COM_REG_BITCNT_HI = 115,
+ SI3217X_COM_REG_PCLK_MULT = 116,
+ SI3217X_COM_REG_RAM_DATA_16 = 117,
+ SI3217X_COM_REG_BYPASS_ADDR_LO = 118,
+ SI3217X_COM_REG_BYPASS_ADDR_HI = 119,
+ SI3217X_COM_REG_PC_LO = 120,
+ SI3217X_COM_REG_PC_HI = 121,
+ SI3217X_COM_REG_PC_SHAD_LO = 122,
+ SI3217X_COM_REG_PC_SHAD_HI = 123,
+ SI3217X_COM_REG_PASS_LO = 124,
+ SI3217X_COM_REG_PASS_HI = 125,
+ SI3217X_COM_REG_TEST_CNTL = 126,
+ SI3217X_COM_REG_TEST_MODE = 127,
+};
+
+/*
+** SI3217X_COMM_RAM
+*/
+enum SI3217X_COMM_RAM
+{
+ SI3217X_COM_RAM_IRNGNG_SENSE = 0,
+ SI3217X_COM_RAM_MADC_VTIPC = 1,
+ SI3217X_COM_RAM_MADC_VRINGC = 2,
+ SI3217X_COM_RAM_MADC_VBAT = 3,
+ SI3217X_COM_RAM_MADC_VLONG = 4,
+ SI3217X_COM_RAM_UNUSED5 = 5,
+ SI3217X_COM_RAM_MADC_VDC = 6,
+ SI3217X_COM_RAM_MADC_ILONG = 7,
+ SI3217X_COM_RAM_MADC_ITIP = 8,
+ SI3217X_COM_RAM_MADC_IRING = 9,
+ SI3217X_COM_RAM_MADC_ILOOP = 10,
+ SI3217X_COM_RAM_VDIFF_SENSE = 11,
+ SI3217X_COM_RAM_VTIP = 12,
+ SI3217X_COM_RAM_VRING = 13,
+ SI3217X_COM_RAM_P_Q1_D = 14,
+ SI3217X_COM_RAM_P_Q1 = 20,
+ SI3217X_COM_RAM_DIAG_EX1 = 21,
+ SI3217X_COM_RAM_DIAG_EX2 = 22,
+ SI3217X_COM_RAM_DIAG_LPF_MADC = 23,
+ SI3217X_COM_RAM_DIAG_DMM_I = 24,
+ SI3217X_COM_RAM_DIAG_DMM_V = 25,
+ SI3217X_COM_RAM_OSC1FREQ = 26,
+ SI3217X_COM_RAM_OSC1AMP = 27,
+ SI3217X_COM_RAM_OSC1PHAS = 28,
+ SI3217X_COM_RAM_OSC2FREQ = 29,
+ SI3217X_COM_RAM_OSC2AMP = 30,
+ SI3217X_COM_RAM_OSC2PHAS = 31,
+ SI3217X_COM_RAM_TESTB0_1 = 32,
+ SI3217X_COM_RAM_TESTB1_1 = 33,
+ SI3217X_COM_RAM_TESTB2_1 = 34,
+ SI3217X_COM_RAM_TESTA1_1 = 35,
+ SI3217X_COM_RAM_TESTA2_1 = 36,
+ SI3217X_COM_RAM_TESTB0_2 = 37,
+ SI3217X_COM_RAM_TESTB1_2 = 38,
+ SI3217X_COM_RAM_TESTB2_2 = 39,
+ SI3217X_COM_RAM_TESTA1_2 = 40,
+ SI3217X_COM_RAM_TESTA2_2 = 41,
+ SI3217X_COM_RAM_TESTB0_3 = 42,
+ SI3217X_COM_RAM_TESTB1_3 = 43,
+ SI3217X_COM_RAM_TESTB2_3 = 44,
+ SI3217X_COM_RAM_TESTA1_3 = 45,
+ SI3217X_COM_RAM_TESTA2_3 = 46,
+ SI3217X_COM_RAM_TESTPKO = 47,
+ SI3217X_COM_RAM_TESTABO = 48,
+ SI3217X_COM_RAM_TESTWLN = 49,
+ SI3217X_COM_RAM_TESTAVBW = 50,
+ SI3217X_COM_RAM_TESTPKFL = 51,
+ SI3217X_COM_RAM_TESTAVFL = 52,
+ SI3217X_COM_RAM_TESTPKTH = 53,
+ SI3217X_COM_RAM_TESTAVTH = 54,
+ SI3217X_COM_RAM_DAC_IN_SYNC1 = 55,
+ SI3217X_COM_RAM_BYPASS_REG = 56,
+ SI3217X_COM_RAM_LCRMASK_CNT = 57,
+ SI3217X_COM_RAM_DAC_IN_SYNC = 58,
+ SI3217X_COM_RAM_TEMP = 59,
+ SI3217X_COM_RAM_TEMP_ISR = 60,
+ SI3217X_COM_RAM_P_Q2 = 61,
+ SI3217X_COM_RAM_P_Q3 = 62,
+ SI3217X_COM_RAM_P_Q4 = 63,
+ SI3217X_COM_RAM_P_Q5 = 64,
+ SI3217X_COM_RAM_P_Q6 = 65,
+ SI3217X_COM_RAM_ILOOP_FILT = 66,
+ SI3217X_COM_RAM_ILONG_FILT = 67,
+ SI3217X_COM_RAM_VBAT_FILT = 68,
+ SI3217X_COM_RAM_VDIFF_FILT = 69,
+ SI3217X_COM_RAM_VCM_FILT = 70,
+ SI3217X_COM_RAM_VBAT_CNT = 71,
+ SI3217X_COM_RAM_V_VLIM_SCALED = 72,
+ SI3217X_COM_RAM_V_VLIM_TRACK = 73,
+ SI3217X_COM_RAM_V_VLIM_MODFEED = 74,
+ SI3217X_COM_RAM_DIAG_P_OUT = 75,
+ SI3217X_COM_RAM_DIAG_COUNT = 76,
+ SI3217X_COM_RAM_ROW0_MAG = 77,
+ SI3217X_COM_RAM_ROW1_MAG = 78,
+ SI3217X_COM_RAM_ROW2_MAG = 79,
+ SI3217X_COM_RAM_ROW3_MAG = 80,
+ SI3217X_COM_RAM_COL0_MAG = 81,
+ SI3217X_COM_RAM_COL1_MAG = 82,
+ SI3217X_COM_RAM_COL2_MAG = 83,
+ SI3217X_COM_RAM_COL3_MAG = 84,
+ SI3217X_COM_RAM_ROW0_2ND_Y1 = 85,
+ SI3217X_COM_RAM_ROW1_2ND_Y1 = 86,
+ SI3217X_COM_RAM_ROW2_2ND_Y1 = 87,
+ SI3217X_COM_RAM_ROW3_2ND_Y1 = 88,
+ SI3217X_COM_RAM_COL0_2ND_Y1 = 89,
+ SI3217X_COM_RAM_COL1_2ND_Y1 = 90,
+ SI3217X_COM_RAM_COL2_2ND_Y1 = 91,
+ SI3217X_COM_RAM_COL3_2ND_Y1 = 92,
+ SI3217X_COM_RAM_ROW0_2ND_Y2 = 93,
+ SI3217X_COM_RAM_ROW1_2ND_Y2 = 94,
+ SI3217X_COM_RAM_ROW2_2ND_Y2 = 95,
+ SI3217X_COM_RAM_ROW3_2ND_Y2 = 96,
+ SI3217X_COM_RAM_COL0_2ND_Y2 = 97,
+ SI3217X_COM_RAM_COL1_2ND_Y2 = 98,
+ SI3217X_COM_RAM_COL2_2ND_Y2 = 99,
+ SI3217X_COM_RAM_COL3_2ND_Y2 = 100,
+ SI3217X_COM_RAM_DTMF_IN = 101,
+ SI3217X_COM_RAM_DTMFDTF_D2_1 = 102,
+ SI3217X_COM_RAM_DTMFDTF_D1_1 = 103,
+ SI3217X_COM_RAM_DTMFDTF_OUT_1 = 104,
+ SI3217X_COM_RAM_DTMFDTF_D2_2 = 105,
+ SI3217X_COM_RAM_DTMFDTF_D1_2 = 106,
+ SI3217X_COM_RAM_DTMFDTF_OUT_2 = 107,
+ SI3217X_COM_RAM_DTMFDTF_D2_3 = 108,
+ SI3217X_COM_RAM_DTMFDTF_D1_3 = 109,
+ SI3217X_COM_RAM_DTMFDTF_OUT_3 = 110,
+ SI3217X_COM_RAM_DTMFDTF_OUT = 111,
+ SI3217X_COM_RAM_DTMFLPF_D2_1 = 112,
+ SI3217X_COM_RAM_DTMFLPF_D1_1 = 113,
+ SI3217X_COM_RAM_DTMFLPF_OUT_1 = 114,
+ SI3217X_COM_RAM_DTMFLPF_D2_2 = 115,
+ SI3217X_COM_RAM_DTMFLPF_D1_2 = 116,
+ SI3217X_COM_RAM_DTMFLPF_OUT_2 = 117,
+ SI3217X_COM_RAM_DTMF_ROW = 118,
+ SI3217X_COM_RAM_DTMFHPF_D2_1 = 119,
+ SI3217X_COM_RAM_DTMFHPF_D1_1 = 120,
+ SI3217X_COM_RAM_DTMFHPF_OUT_1 = 121,
+ SI3217X_COM_RAM_DTMFHPF_D2_2 = 122,
+ SI3217X_COM_RAM_DTMFHPF_D1_2 = 123,
+ SI3217X_COM_RAM_DTMFHPF_OUT_2 = 124,
+ SI3217X_COM_RAM_DTMF_COL = 125,
+ SI3217X_COM_RAM_ROW_POWER = 126,
+ SI3217X_COM_RAM_COL_POWER = 127,
+ SI3217X_COM_RAM_GP_TIMER = 128,
+ SI3217X_COM_RAM_SPR_INTERP_DIF = 129,
+ SI3217X_COM_RAM_SPR_INTERP_DIF_OUT = 130,
+ SI3217X_COM_RAM_SPR_INTERP_INT = 131,
+ SI3217X_COM_RAM_SPR_CNT = 132,
+ SI3217X_COM_RAM_ROW0_Y1 = 133,
+ SI3217X_COM_RAM_ROW0_Y2 = 134,
+ SI3217X_COM_RAM_ROW1_Y1 = 135,
+ SI3217X_COM_RAM_ROW1_Y2 = 136,
+ SI3217X_COM_RAM_ROW2_Y1 = 137,
+ SI3217X_COM_RAM_ROW2_Y2 = 138,
+ SI3217X_COM_RAM_ROW3_Y1 = 139,
+ SI3217X_COM_RAM_ROW3_Y2 = 140,
+ SI3217X_COM_RAM_COL0_Y1 = 141,
+ SI3217X_COM_RAM_COL0_Y2 = 142,
+ SI3217X_COM_RAM_COL1_Y1 = 143,
+ SI3217X_COM_RAM_COL1_Y2 = 144,
+ SI3217X_COM_RAM_COL2_Y1 = 145,
+ SI3217X_COM_RAM_COL2_Y2 = 146,
+ SI3217X_COM_RAM_COL3_Y1 = 147,
+ SI3217X_COM_RAM_COL3_Y2 = 148,
+ SI3217X_COM_RAM_ROWMAX_MAG = 149,
+ SI3217X_COM_RAM_COLMAX_MAG = 150,
+ SI3217X_COM_RAM_ROW0_2ND_MAG = 151,
+ SI3217X_COM_RAM_COL0_2ND_MAG = 152,
+ SI3217X_COM_RAM_ROW_THR = 153,
+ SI3217X_COM_RAM_COL_THR = 154,
+ SI3217X_COM_RAM_OSC1_Y = 155,
+ SI3217X_COM_RAM_OSC2_Y = 156,
+ SI3217X_COM_RAM_OSC1_X = 157,
+ SI3217X_COM_RAM_OSC1_COEFF = 158,
+ SI3217X_COM_RAM_OSC2_X = 159,
+ SI3217X_COM_RAM_OSC2_COEFF = 160,
+ SI3217X_COM_RAM_RXACIIR_D2_1 = 161,
+ SI3217X_COM_RAM_RXACIIR_OUT_1 = 162,
+ SI3217X_COM_RAM_RXACIIR_D2_2 = 163,
+ SI3217X_COM_RAM_RXACIIR_D1_2 = 164,
+ SI3217X_COM_RAM_RXACIIR_OUT_2 = 165,
+ SI3217X_COM_RAM_RXACIIR_D2_3 = 166,
+ SI3217X_COM_RAM_RXACIIR_D1_3 = 167,
+ SI3217X_COM_RAM_RXACIIR_OUT = 168,
+ SI3217X_COM_RAM_RXACIIR_OUT_3 = 169,
+ SI3217X_COM_RAM_TXACCOMB_D1 = 170,
+ SI3217X_COM_RAM_TXACCOMB_D2 = 171,
+ SI3217X_COM_RAM_TXACCOMB_D3 = 172,
+ SI3217X_COM_RAM_TXACSINC_OUT = 173,
+ SI3217X_COM_RAM_TXACHPF_D1_2 = 174,
+ SI3217X_COM_RAM_TXACHPF_D2_1 = 175,
+ SI3217X_COM_RAM_TXACHPF_D2_2 = 176,
+ SI3217X_COM_RAM_TXACHPF_OUT = 177,
+ SI3217X_COM_RAM_TXACHPF_OUT_1 = 178,
+ SI3217X_COM_RAM_TXACHPF_OUT_2 = 179,
+ SI3217X_COM_RAM_TXACIIR_D2_1 = 180,
+ SI3217X_COM_RAM_TXACIIR_OUT_1 = 181,
+ SI3217X_COM_RAM_TXACIIR_D2_2 = 182,
+ SI3217X_COM_RAM_TXACIIR_D1_2 = 183,
+ SI3217X_COM_RAM_TXACIIR_OUT_2 = 184,
+ SI3217X_COM_RAM_TXACIIR_D2_3 = 185,
+ SI3217X_COM_RAM_TXACIIR_D1_3 = 186,
+ SI3217X_COM_RAM_TXACIIR_OUT_3 = 187,
+ SI3217X_COM_RAM_TXACIIR_OUT = 188,
+ SI3217X_COM_RAM_ECIIR_D1 = 189,
+ SI3217X_COM_RAM_ECIIR_D2 = 190,
+ SI3217X_COM_RAM_EC_DELAY1 = 191,
+ SI3217X_COM_RAM_EC_DELAY2 = 192,
+ SI3217X_COM_RAM_EC_DELAY3 = 193,
+ SI3217X_COM_RAM_EC_DELAY4 = 194,
+ SI3217X_COM_RAM_EC_DELAY5 = 195,
+ SI3217X_COM_RAM_EC_DELAY6 = 196,
+ SI3217X_COM_RAM_EC_DELAY7 = 197,
+ SI3217X_COM_RAM_EC_DELAY8 = 198,
+ SI3217X_COM_RAM_EC_DELAY9 = 199,
+ SI3217X_COM_RAM_EC_DELAY10 = 200,
+ SI3217X_COM_RAM_EC_DELAY11 = 201,
+ SI3217X_COM_RAM_ECHO_EST = 202,
+ SI3217X_COM_RAM_EC_OUT = 203,
+ SI3217X_COM_RAM_TESTFILT_OUT_1 = 204,
+ SI3217X_COM_RAM_TESTFILT_D1_1 = 205,
+ SI3217X_COM_RAM_TESTFILT_D2_1 = 206,
+ SI3217X_COM_RAM_TESTFILT_OUT_2 = 207,
+ SI3217X_COM_RAM_TESTFILT_D1_2 = 208,
+ SI3217X_COM_RAM_TESTFILT_D2_2 = 209,
+ SI3217X_COM_RAM_TESTFILT_OUT_3 = 210,
+ SI3217X_COM_RAM_TESTFILT_D1_3 = 211,
+ SI3217X_COM_RAM_TESTFILT_D2_3 = 212,
+ SI3217X_COM_RAM_TESTFILT_PEAK = 213,
+ SI3217X_COM_RAM_TESTFILT_ABS = 214,
+ SI3217X_COM_RAM_TESTFILT_MEANACC = 215,
+ SI3217X_COM_RAM_TESTFILT_COUNT = 216,
+ SI3217X_COM_RAM_TESTFILT_NO_OFFSET = 217,
+ SI3217X_COM_RAM_RING_X = 218,
+ SI3217X_COM_RAM_RING_Y = 219,
+ SI3217X_COM_RAM_RING_INT = 220,
+ SI3217X_COM_RAM_RING_Y_D1 = 221,
+ SI3217X_COM_RAM_RING_DIFF = 222,
+ SI3217X_COM_RAM_RING_DELTA = 223,
+ SI3217X_COM_RAM_WTCHDOG_CNT = 224,
+ SI3217X_COM_RAM_RING_WAVE = 225,
+ SI3217X_COM_RAM_UNUSED226 = 226,
+ SI3217X_COM_RAM_ONEKHZ_COUNT = 227,
+ SI3217X_COM_RAM_TX2100_Y1 = 228,
+ SI3217X_COM_RAM_TX2100_Y2 = 229,
+ SI3217X_COM_RAM_TX2100_MAG = 230,
+ SI3217X_COM_RAM_RX2100_Y1 = 231,
+ SI3217X_COM_RAM_RX2100_Y2 = 232,
+ SI3217X_COM_RAM_RX2100_MAG = 233,
+ SI3217X_COM_RAM_TX2100_POWER = 234,
+ SI3217X_COM_RAM_RX2100_POWER = 235,
+ SI3217X_COM_RAM_TX2100_IN = 236,
+ SI3217X_COM_RAM_RX2100_IN = 237,
+ SI3217X_COM_RAM_RINGTRIP_COUNT = 238,
+ SI3217X_COM_RAM_RINGTRIP_DC1 = 239,
+ SI3217X_COM_RAM_RINGTRIP_DC2 = 240,
+ SI3217X_COM_RAM_RINGTRIP_AC1 = 241,
+ SI3217X_COM_RAM_RINGTRIP_AC2 = 242,
+ SI3217X_COM_RAM_RINGTRIP_AC_COUNT = 243,
+ SI3217X_COM_RAM_RINGTRIP_DC_COUNT = 244,
+ SI3217X_COM_RAM_RINGTRIP_AC_RESULT = 245,
+ SI3217X_COM_RAM_RINGTRIP_DC_RESULT = 246,
+ SI3217X_COM_RAM_RINGTRIP_ABS = 247,
+ SI3217X_COM_RAM_TXACEQ_OUT = 248,
+ SI3217X_COM_RAM_LCR_DBI_CNT = 249,
+ SI3217X_COM_RAM_BAT_DBI_CNT = 250,
+ SI3217X_COM_RAM_LONG_DBI_CNT = 251,
+ SI3217X_COM_RAM_TXACEQ_DELAY3 = 252,
+ SI3217X_COM_RAM_TXACEQ_DELAY2 = 253,
+ SI3217X_COM_RAM_TXACEQ_DELAY1 = 254,
+ SI3217X_COM_RAM_RXACEQ_DELAY3 = 255,
+ SI3217X_COM_RAM_RXACEQ_DELAY2 = 256,
+ SI3217X_COM_RAM_RXACEQ_DELAY1 = 257,
+ SI3217X_COM_RAM_RXACEQ_IN = 258,
+ SI3217X_COM_RAM_TXDCCOMB_D1 = 259,
+ SI3217X_COM_RAM_TXDCCOMB_D2 = 260,
+ SI3217X_COM_RAM_TXDCSINC_OUT = 261,
+ SI3217X_COM_RAM_RXACDIFF_D1 = 262,
+ SI3217X_COM_RAM_DC_NOTCH_1 = 263,
+ SI3217X_COM_RAM_DC_NOTCH_2 = 264,
+ SI3217X_COM_RAM_DC_NOTCH_OUT = 265,
+ SI3217X_COM_RAM_DC_NOTCH_SCALED = 266,
+ SI3217X_COM_RAM_V_FEED_IN = 267,
+ SI3217X_COM_RAM_I_TAR = 268,
+ SI3217X_COM_RAM_CONST_VLIM = 269,
+ SI3217X_COM_RAM_UNITY = 270,
+ SI3217X_COM_RAM_TXACNOTCH_1 = 271,
+ SI3217X_COM_RAM_TXACNOTCH_2 = 272,
+ SI3217X_COM_RAM_TXACNOTCH_OUT = 273,
+ SI3217X_COM_RAM_ZSYNTH_1 = 274,
+ SI3217X_COM_RAM_ZSYNTH_2 = 275,
+ SI3217X_COM_RAM_ZSYNTH_OUT_1 = 276,
+ SI3217X_COM_RAM_TXACD2_1_0 = 277,
+ SI3217X_COM_RAM_TXACD2_1_1 = 278,
+ SI3217X_COM_RAM_TXACD2_1_2 = 279,
+ SI3217X_COM_RAM_TXACD2_1_3 = 280,
+ SI3217X_COM_RAM_TXACD2_1_4 = 281,
+ SI3217X_COM_RAM_TXACD2_1_5 = 282,
+ SI3217X_COM_RAM_TXACD2_1_OUT = 283,
+ SI3217X_COM_RAM_TXACD2_2_0 = 284,
+ SI3217X_COM_RAM_TXACD2_2_1 = 285,
+ SI3217X_COM_RAM_TXACD2_2_2 = 286,
+ SI3217X_COM_RAM_TXACD2_2_3 = 287,
+ SI3217X_COM_RAM_TXACD2_2_4 = 288,
+ SI3217X_COM_RAM_TXACD2_2_5 = 289,
+ SI3217X_COM_RAM_TXACD2_2_OUT = 290,
+ SI3217X_COM_RAM_TXACD2_3_0 = 291,
+ SI3217X_COM_RAM_TXACD2_3_1 = 292,
+ SI3217X_COM_RAM_TXACD2_3_2 = 293,
+ SI3217X_COM_RAM_TXACD2_3_3 = 294,
+ SI3217X_COM_RAM_TXACD2_3_4 = 295,
+ SI3217X_COM_RAM_TXACD2_3_5 = 296,
+ SI3217X_COM_RAM_TXACD2_3_OUT = 297,
+ SI3217X_COM_RAM_RXACI2_1_1 = 298,
+ SI3217X_COM_RAM_RXACI2_1_2 = 299,
+ SI3217X_COM_RAM_RXACI2_1_3 = 300,
+ SI3217X_COM_RAM_RXACI2_1_4 = 301,
+ SI3217X_COM_RAM_RXACI2_1_OUT = 302,
+ SI3217X_COM_RAM_RXACI2_2_1 = 303,
+ SI3217X_COM_RAM_RXACI2_2_2 = 304,
+ SI3217X_COM_RAM_RXACI2_2_3 = 305,
+ SI3217X_COM_RAM_RXACI2_2_4 = 306,
+ SI3217X_COM_RAM_RXACI2_2_OUT = 307,
+ SI3217X_COM_RAM_RXACI2_3_1 = 308,
+ SI3217X_COM_RAM_RXACI2_3_2 = 309,
+ SI3217X_COM_RAM_RXACI2_3_3 = 310,
+ SI3217X_COM_RAM_RXACI2_3_4 = 311,
+ SI3217X_COM_RAM_RXACI2_3_OUT = 312,
+ SI3217X_COM_RAM_TXACCOMP1 = 313,
+ SI3217X_COM_RAM_TXACCOMP_OUT = 314,
+ SI3217X_COM_RAM_RXACCOMP1 = 315,
+ SI3217X_COM_RAM_RXACCOMP_OUT = 316,
+ SI3217X_COM_RAM_RXACHPF_D1_2 = 317,
+ SI3217X_COM_RAM_RXACHPF_D2_1 = 318,
+ SI3217X_COM_RAM_RXACHPF_D2_2 = 319,
+ SI3217X_COM_RAM_RXACHPF_OUT = 320,
+ SI3217X_COM_RAM_RXACHPF_OUT_1 = 321,
+ SI3217X_COM_RAM_RXACHPF_OUT_2 = 322,
+ SI3217X_COM_RAM_RXACEQ_OUT = 323,
+ SI3217X_COM_RAM_METER_I_1 = 324,
+ SI3217X_COM_RAM_METER_I_OUT = 325,
+ SI3217X_COM_RAM_METER_LPF_1 = 326,
+ SI3217X_COM_RAM_METER_LPF_2 = 327,
+ SI3217X_COM_RAM_METER_BP_1 = 329,
+ SI3217X_COM_RAM_METER_BP_2 = 330,
+ SI3217X_COM_RAM_METER_BP_OUT = 331,
+ SI3217X_COM_RAM_METER_SRC_OUT = 332,
+ SI3217X_COM_RAM_RING_LPF_1 = 335,
+ SI3217X_COM_RAM_RING_LPF_2 = 336,
+ SI3217X_COM_RAM_RING_LPF_OUT = 337,
+ SI3217X_COM_RAM_RING_INTERP_DIFF = 338,
+ SI3217X_COM_RAM_RING_INTERP_DIFF_OUT = 339,
+ SI3217X_COM_RAM_RING_INTERP_INT = 340,
+ SI3217X_COM_RAM_RING_INTERP_INT_OUT = 341,
+ SI3217X_COM_RAM_V_ILIM_TRACK = 342,
+ SI3217X_COM_RAM_V_RFEED_TRACK = 343,
+ SI3217X_COM_RAM_LF_SPEEDUP_CNT = 344,
+ SI3217X_COM_RAM_DC_SPEEDUP_CNT = 345,
+ SI3217X_COM_RAM_AC_SPEEDUP_CNT = 346,
+ SI3217X_COM_RAM_LCR_SPEEDUP_CNT = 347,
+ SI3217X_COM_RAM_CM_SPEEDUP_CNT = 348,
+ SI3217X_COM_RAM_DC_SPEEDUP_MASK = 349,
+ SI3217X_COM_RAM_ZSYNTH_IN = 350,
+ SI3217X_COM_RAM_I_TAR_SAVE = 351,
+ SI3217X_COM_RAM_UNUSED352 = 352,
+ SI3217X_COM_RAM_UNUSED353 = 353,
+ SI3217X_COM_RAM_COUNTER_VTR = 354,
+ SI3217X_COM_RAM_I_RING_AVG = 355,
+ SI3217X_COM_RAM_COUNTER_IRING = 356,
+ SI3217X_COM_RAM_COMP_RATIO = 357,
+ SI3217X_COM_RAM_MADC_VBAT_DIV2 = 358,
+ SI3217X_COM_RAM_VDIFF_PK_T = 359,
+ SI3217X_COM_RAM_PEAK_CNT = 360,
+ SI3217X_COM_RAM_CM_DBI_CNT = 361,
+ SI3217X_COM_RAM_VCM_LAST = 362,
+ SI3217X_COM_RAM_VBATL_SENSE = 363,
+ SI3217X_COM_RAM_VBATH_SENSE = 364,
+ SI3217X_COM_RAM_VBATR_SENSE = 365,
+ SI3217X_COM_RAM_BAT_SETTLE_CNT = 366,
+ SI3217X_COM_RAM_VBAT_TGT = 367,
+ SI3217X_COM_RAM_VBAT_REQ = 368,
+ SI3217X_COM_RAM_VCM_HIRES = 369,
+ SI3217X_COM_RAM_VCM_LORES = 370,
+ SI3217X_COM_RAM_ILOOP1 = 371,
+ SI3217X_COM_RAM_ILONG2 = 372,
+ SI3217X_COM_RAM_ITIP1 = 373,
+ SI3217X_COM_RAM_IRING1 = 374,
+ SI3217X_COM_RAM_CAL_TEMP1 = 375,
+ SI3217X_COM_RAM_CAL_TEMP2 = 376,
+ SI3217X_COM_RAM_CAL_TEMP3 = 377,
+ SI3217X_COM_RAM_CAL_TEMP4 = 378,
+ SI3217X_COM_RAM_CAL_TEMP5 = 379,
+ SI3217X_COM_RAM_CAL_TEMP6 = 380,
+ SI3217X_COM_RAM_CAL_TEMP7 = 381,
+ SI3217X_COM_RAM_CMRR_DIVISOR = 382,
+ SI3217X_COM_RAM_CMRR_REMAINDER = 383,
+ SI3217X_COM_RAM_CMRR_Q_PTR = 384,
+ SI3217X_COM_RAM_CAL_ONHK_Z = 393,
+ SI3217X_COM_RAM_CAL_LB_SETTLE = 394,
+ SI3217X_COM_RAM_CAL_DECLPF_V0 = 395,
+ SI3217X_COM_RAM_CAL_DECLPF_V1 = 396,
+ SI3217X_COM_RAM_CAL_DECLPF_V2 = 397,
+ SI3217X_COM_RAM_CAL_GOERTZEL_V0 = 398,
+ SI3217X_COM_RAM_CAL_GOERTZEL_V1 = 399,
+ SI3217X_COM_RAM_CAL_DECLPF_Y = 400,
+ SI3217X_COM_RAM_CAL_GOERTZEL_Y = 401,
+ SI3217X_COM_RAM_P_HVIC = 402,
+ SI3217X_COM_RAM_VBATL_MIRROR = 403,
+ SI3217X_COM_RAM_VBATH_MIRROR = 404,
+ SI3217X_COM_RAM_VBATR_MIRROR = 405,
+ SI3217X_COM_RAM_DIAG_EX1_OUT = 406,
+ SI3217X_COM_RAM_DIAG_EX2_OUT = 407,
+ SI3217X_COM_RAM_DIAG_DMM_V_OUT = 408,
+ SI3217X_COM_RAM_DIAG_DMM_I_OUT = 409,
+ SI3217X_COM_RAM_DIAG_P = 410,
+ SI3217X_COM_RAM_DIAG_LPF_V = 411,
+ SI3217X_COM_RAM_DIAG_LPF_I = 412,
+ SI3217X_COM_RAM_DIAG_TONE_FLAG = 413,
+ SI3217X_COM_RAM_ILOOP1_LAST = 414,
+ SI3217X_COM_RAM_RING_ENTRY_VOC = 415,
+ SI3217X_COM_RAM_OSC1_X_SAVE = 417,
+ SI3217X_COM_RAM_EZSYNTH_1 = 418,
+ SI3217X_COM_RAM_EZSYNTH_2 = 419,
+ SI3217X_COM_RAM_ZSYNTH_OUT = 420,
+ SI3217X_COM_RAM_UNUSED421 = 421,
+ SI3217X_COM_RAM_CAL_SUBSTATE = 422,
+ SI3217X_COM_RAM_DIAG_EX1_DC_OUT = 423,
+ SI3217X_COM_RAM_DIAG_EX1_DC = 424,
+ SI3217X_COM_RAM_EZSYNTH_B1 = 425,
+ SI3217X_COM_RAM_EZSYNTH_B2 = 426,
+ SI3217X_COM_RAM_EZSYNTH_A1 = 427,
+ SI3217X_COM_RAM_EZSYNTH_A2 = 428,
+ SI3217X_COM_RAM_ILOOP1_FILT = 429,
+ SI3217X_COM_RAM_AC_PU_DELTA1_CNT = 430,
+ SI3217X_COM_RAM_AC_PU_DELTA2_CNT = 431,
+ SI3217X_COM_RAM_UNUSED432 = 432,
+ SI3217X_COM_RAM_UNUSED433 = 433,
+ SI3217X_COM_RAM_UNUSED434 = 434,
+ SI3217X_COM_RAM_AC_DAC_GAIN_SAVE = 435,
+ SI3217X_COM_RAM_RING_FLUSH_CNT = 436,
+ SI3217X_COM_RAM_UNUSED437 = 437,
+ SI3217X_COM_RAM_DIAG_VAR_OUT = 438,
+ SI3217X_COM_RAM_I_VBAT = 439,
+ SI3217X_COM_RAM_UNUSED440 = 440,
+ SI3217X_COM_RAM_CALTMP_LOOPCNT = 441,
+ SI3217X_COM_RAM_CALTMP_LOOPINC = 442,
+ SI3217X_COM_RAM_CALTMP_CODEINC = 444,
+ SI3217X_COM_RAM_CALTMP_TAUINC = 445,
+ SI3217X_COM_RAM_CALTMP_TAU = 446,
+ SI3217X_COM_RAM_CAL_TEMP8 = 447,
+ SI3217X_COM_RAM_PATCHID = 448,
+ SI3217X_COM_RAM_UNUSED449 = 449,
+ SI3217X_COM_RAM_UNUSED450 = 450,
+ SI3217X_COM_RAM_UNUSED451 = 451,
+ SI3217X_COM_RAM_CAL_LB_OFFSET_FWD = 452,
+ SI3217X_COM_RAM_CAL_LB_OFFSET_RVS = 453,
+ SI3217X_COM_RAM_COUNT_SPEEDUP = 454,
+ SI3217X_COM_RAM_SWEEP_COUNT = 455,
+ SI3217X_COM_RAM_AMP_RAMP = 456,
+ SI3217X_COM_RAM_DIAG_LPF_MADC_D = 457,
+ SI3217X_COM_RAM_DIAG_HPF_MADC = 458,
+ SI3217X_COM_RAM_TXDEC_OUT = 460,
+ SI3217X_COM_RAM_TXDEC_D1 = 461,
+ SI3217X_COM_RAM_TXDEC_D2 = 462,
+ SI3217X_COM_RAM_RXDEC_D1 = 463,
+ SI3217X_COM_RAM_RXDEC_D2 = 464,
+ SI3217X_COM_RAM_OSCINT1_D2_1 = 465,
+ SI3217X_COM_RAM_OSCINT1_D1_1 = 466,
+ SI3217X_COM_RAM_OSCINT1_OUT_1 = 467,
+ SI3217X_COM_RAM_OSCINT1_D2_2 = 468,
+ SI3217X_COM_RAM_OSCINT1_D1_2 = 469,
+ SI3217X_COM_RAM_OSCINT1_OUT = 470,
+ SI3217X_COM_RAM_OSCINT2_D2_1 = 471,
+ SI3217X_COM_RAM_OSCINT2_D1_1 = 472,
+ SI3217X_COM_RAM_OSCINT2_OUT_1 = 473,
+ SI3217X_COM_RAM_OSCINT2_D2_2 = 474,
+ SI3217X_COM_RAM_OSCINT2_D1_2 = 475,
+ SI3217X_COM_RAM_OSCINT2_OUT = 476,
+ SI3217X_COM_RAM_OSC1_Y_SAVE = 477,
+ SI3217X_COM_RAM_OSC2_Y_SAVE = 478,
+ SI3217X_COM_RAM_PWRSAVE_CNT = 479,
+ SI3217X_COM_RAM_VBATR_PK = 480,
+ SI3217X_COM_RAM_SPEEDUP_MASK_CNT = 481,
+ SI3217X_COM_RAM_VCM_RING_FIXED = 482,
+ SI3217X_COM_RAM_DELTA_VCM = 483,
+ SI3217X_COM_RAM_MADC_VTIPC_DIAG_OS = 484,
+ SI3217X_COM_RAM_MADC_VRINGC_DIAG_OS = 485,
+ SI3217X_COM_RAM_MADC_VLONG_DIAG_OS = 486,
+ SI3217X_COM_RAM_PWRSAVE_DBI_CNT = 492,
+ SI3217X_COM_RAM_COMP_RATIO_SAVE = 493,
+ SI3217X_COM_RAM_CAL_TEMP9 = 494,
+ SI3217X_COM_RAM_CAL_TEMP10 = 495,
+ SI3217X_COM_RAM_DAC_OFFSET_TEMP = 496,
+ SI3217X_COM_RAM_CAL_DAC_CODE = 497,
+ SI3217X_COM_RAM_DCDAC_OFFSET = 498,
+ SI3217X_COM_RAM_VDIFF_COARSE = 499,
+ SI3217X_COM_RAM_RXACIIR_OUT_4 = 500,
+ SI3217X_COM_RAM_UNUSED511 = 511,
+ SI3217X_COM_RAM_MINUS_ONE = 512,
+ SI3217X_COM_RAM_ILOOPLPF = 513,
+ SI3217X_COM_RAM_ILONGLPF = 514,
+ SI3217X_COM_RAM_BATLPF = 515,
+ SI3217X_COM_RAM_VDIFFLPF = 516,
+ SI3217X_COM_RAM_VCMLPF = 517,
+ SI3217X_COM_RAM_TXACIIR_B0_1 = 518,
+ SI3217X_COM_RAM_TXACIIR_B1_1 = 519,
+ SI3217X_COM_RAM_TXACIIR_A1_1 = 520,
+ SI3217X_COM_RAM_TXACIIR_B0_2 = 521,
+ SI3217X_COM_RAM_TXACIIR_B1_2 = 522,
+ SI3217X_COM_RAM_TXACIIR_B2_2 = 523,
+ SI3217X_COM_RAM_TXACIIR_A1_2 = 524,
+ SI3217X_COM_RAM_TXACIIR_A2_2 = 525,
+ SI3217X_COM_RAM_TXACIIR_B0_3 = 526,
+ SI3217X_COM_RAM_TXACIIR_B1_3 = 527,
+ SI3217X_COM_RAM_TXACIIR_B2_3 = 528,
+ SI3217X_COM_RAM_TXACIIR_A1_3 = 529,
+ SI3217X_COM_RAM_TXACIIR_A2_3 = 530,
+ SI3217X_COM_RAM_TXACHPF_B0_1 = 531,
+ SI3217X_COM_RAM_TXACHPF_B1_1 = 532,
+ SI3217X_COM_RAM_TXACHPF_A1_1 = 533,
+ SI3217X_COM_RAM_TXACHPF_B0_2 = 534,
+ SI3217X_COM_RAM_TXACHPF_B1_2 = 535,
+ SI3217X_COM_RAM_TXACHPF_B2_2 = 536,
+ SI3217X_COM_RAM_TXACHPF_A1_2 = 537,
+ SI3217X_COM_RAM_TXACHPF_A2_2 = 538,
+ SI3217X_COM_RAM_TXACHPF_GAIN = 539,
+ SI3217X_COM_RAM_TXACEQ_C0 = 540,
+ SI3217X_COM_RAM_TXACEQ_C1 = 541,
+ SI3217X_COM_RAM_TXACEQ_C2 = 542,
+ SI3217X_COM_RAM_TXACEQ_C3 = 543,
+ SI3217X_COM_RAM_TXACGAIN = 544,
+ SI3217X_COM_RAM_RXACGAIN = 545,
+ SI3217X_COM_RAM_RXACEQ_C0 = 546,
+ SI3217X_COM_RAM_RXACEQ_C1 = 547,
+ SI3217X_COM_RAM_RXACEQ_C2 = 548,
+ SI3217X_COM_RAM_RXACEQ_C3 = 549,
+ SI3217X_COM_RAM_RXACIIR_B0_1 = 550,
+ SI3217X_COM_RAM_RXACIIR_B1_1 = 551,
+ SI3217X_COM_RAM_RXACIIR_A1_1 = 552,
+ SI3217X_COM_RAM_RXACIIR_B0_2 = 553,
+ SI3217X_COM_RAM_RXACIIR_B1_2 = 554,
+ SI3217X_COM_RAM_RXACIIR_B2_2 = 555,
+ SI3217X_COM_RAM_RXACIIR_A1_2 = 556,
+ SI3217X_COM_RAM_RXACIIR_A2_2 = 557,
+ SI3217X_COM_RAM_RXACIIR_B0_3 = 558,
+ SI3217X_COM_RAM_RXACIIR_B1_3 = 559,
+ SI3217X_COM_RAM_RXACIIR_B2_3 = 560,
+ SI3217X_COM_RAM_RXACIIR_A1_3 = 561,
+ SI3217X_COM_RAM_RXACIIR_A2_3 = 562,
+ SI3217X_COM_RAM_ECFIR_C2 = 563,
+ SI3217X_COM_RAM_ECFIR_C3 = 564,
+ SI3217X_COM_RAM_ECFIR_C4 = 565,
+ SI3217X_COM_RAM_ECFIR_C5 = 566,
+ SI3217X_COM_RAM_ECFIR_C6 = 567,
+ SI3217X_COM_RAM_ECFIR_C7 = 568,
+ SI3217X_COM_RAM_ECFIR_C8 = 569,
+ SI3217X_COM_RAM_ECFIR_C9 = 570,
+ SI3217X_COM_RAM_ECIIR_B0 = 571,
+ SI3217X_COM_RAM_ECIIR_B1 = 572,
+ SI3217X_COM_RAM_ECIIR_A1 = 573,
+ SI3217X_COM_RAM_ECIIR_A2 = 574,
+ SI3217X_COM_RAM_DTMFDTF_B0_1 = 575,
+ SI3217X_COM_RAM_DTMFDTF_B1_1 = 576,
+ SI3217X_COM_RAM_DTMFDTF_B2_1 = 577,
+ SI3217X_COM_RAM_DTMFDTF_A1_1 = 578,
+ SI3217X_COM_RAM_DTMFDTF_A2_1 = 579,
+ SI3217X_COM_RAM_DTMFDTF_B0_2 = 580,
+ SI3217X_COM_RAM_DTMFDTF_B1_2 = 581,
+ SI3217X_COM_RAM_DTMFDTF_B2_2 = 582,
+ SI3217X_COM_RAM_DTMFDTF_A1_2 = 583,
+ SI3217X_COM_RAM_DTMFDTF_A2_2 = 584,
+ SI3217X_COM_RAM_DTMFDTF_B0_3 = 585,
+ SI3217X_COM_RAM_DTMFDTF_B1_3 = 586,
+ SI3217X_COM_RAM_DTMFDTF_B2_3 = 587,
+ SI3217X_COM_RAM_DTMFDTF_A1_3 = 588,
+ SI3217X_COM_RAM_DTMFDTF_A2_3 = 589,
+ SI3217X_COM_RAM_DTMFDTF_GAIN = 590,
+ SI3217X_COM_RAM_DTMFLPF_B0_1 = 591,
+ SI3217X_COM_RAM_DTMFLPF_B1_1 = 592,
+ SI3217X_COM_RAM_DTMFLPF_B2_1 = 593,
+ SI3217X_COM_RAM_DTMFLPF_A1_1 = 594,
+ SI3217X_COM_RAM_DTMFLPF_A2_1 = 595,
+ SI3217X_COM_RAM_DTMFLPF_B0_2 = 596,
+ SI3217X_COM_RAM_DTMFLPF_B1_2 = 597,
+ SI3217X_COM_RAM_DTMFLPF_B2_2 = 598,
+ SI3217X_COM_RAM_DTMFLPF_A1_2 = 599,
+ SI3217X_COM_RAM_DTMFLPF_A2_2 = 600,
+ SI3217X_COM_RAM_DTMFLPF_GAIN = 601,
+ SI3217X_COM_RAM_DTMFHPF_B0_1 = 602,
+ SI3217X_COM_RAM_DTMFHPF_B1_1 = 603,
+ SI3217X_COM_RAM_DTMFHPF_B2_1 = 604,
+ SI3217X_COM_RAM_DTMFHPF_A1_1 = 605,
+ SI3217X_COM_RAM_DTMFHPF_A2_1 = 606,
+ SI3217X_COM_RAM_DTMFHPF_B0_2 = 607,
+ SI3217X_COM_RAM_DTMFHPF_B1_2 = 608,
+ SI3217X_COM_RAM_DTMFHPF_B2_2 = 609,
+ SI3217X_COM_RAM_DTMFHPF_A1_2 = 610,
+ SI3217X_COM_RAM_DTMFHPF_A2_2 = 611,
+ SI3217X_COM_RAM_DTMFHPF_GAIN = 612,
+ SI3217X_COM_RAM_POWER_GAIN = 613,
+ SI3217X_COM_RAM_GOERTZEL_GAIN = 614,
+ SI3217X_COM_RAM_MODEM_GAIN = 615,
+ SI3217X_COM_RAM_HOTBIT1 = 616,
+ SI3217X_COM_RAM_HOTBIT0 = 617,
+ SI3217X_COM_RAM_ROW0_C1 = 618,
+ SI3217X_COM_RAM_ROW1_C1 = 619,
+ SI3217X_COM_RAM_ROW2_C1 = 620,
+ SI3217X_COM_RAM_ROW3_C1 = 621,
+ SI3217X_COM_RAM_COL0_C1 = 622,
+ SI3217X_COM_RAM_COL1_C1 = 623,
+ SI3217X_COM_RAM_COL2_C1 = 624,
+ SI3217X_COM_RAM_COL3_C1 = 625,
+ SI3217X_COM_RAM_ROW0_C2 = 626,
+ SI3217X_COM_RAM_ROW1_C2 = 627,
+ SI3217X_COM_RAM_ROW2_C2 = 628,
+ SI3217X_COM_RAM_ROW3_C2 = 629,
+ SI3217X_COM_RAM_COL0_C2 = 630,
+ SI3217X_COM_RAM_COL1_C2 = 631,
+ SI3217X_COM_RAM_COL2_C2 = 632,
+ SI3217X_COM_RAM_COL3_C2 = 633,
+ SI3217X_COM_RAM_SLOPE_VLIM = 634,
+ SI3217X_COM_RAM_SLOPE_RFEED = 635,
+ SI3217X_COM_RAM_SLOPE_ILIM = 636,
+ SI3217X_COM_RAM_SLOPE_RING = 637,
+ SI3217X_COM_RAM_SLOPE_DELTA1 = 638,
+ SI3217X_COM_RAM_SLOPE_DELTA2 = 639,
+ SI3217X_COM_RAM_V_VLIM = 640,
+ SI3217X_COM_RAM_V_RFEED = 641,
+ SI3217X_COM_RAM_V_ILIM = 642,
+ SI3217X_COM_RAM_CONST_RFEED = 643,
+ SI3217X_COM_RAM_CONST_ILIM = 644,
+ SI3217X_COM_RAM_I_VLIM = 645,
+ SI3217X_COM_RAM_DC_DAC_GAIN = 646,
+ SI3217X_COM_RAM_VDIFF_TH = 647,
+ SI3217X_COM_RAM_TXDEC_B0 = 648,
+ SI3217X_COM_RAM_TXDEC_B1 = 649,
+ SI3217X_COM_RAM_TXDEC_B2 = 650,
+ SI3217X_COM_RAM_TXDEC_A1 = 651,
+ SI3217X_COM_RAM_TXDEC_A2 = 652,
+ SI3217X_COM_RAM_ZSYNTH_B0 = 653,
+ SI3217X_COM_RAM_ZSYNTH_B1 = 654,
+ SI3217X_COM_RAM_ZSYNTH_B2 = 655,
+ SI3217X_COM_RAM_ZSYNTH_A1 = 656,
+ SI3217X_COM_RAM_ZSYNTH_A2 = 657,
+ SI3217X_COM_RAM_RXACHPF_B0_1 = 658,
+ SI3217X_COM_RAM_RXACHPF_B1_1 = 659,
+ SI3217X_COM_RAM_RXACHPF_A1_1 = 660,
+ SI3217X_COM_RAM_RXACHPF_B0_2 = 661,
+ SI3217X_COM_RAM_RXACHPF_B1_2 = 662,
+ SI3217X_COM_RAM_RXACHPF_B2_2 = 663,
+ SI3217X_COM_RAM_RXACHPF_A1_2 = 664,
+ SI3217X_COM_RAM_RXACHPF_A2_2 = 665,
+ SI3217X_COM_RAM_RXACHPF_GAIN = 666,
+ SI3217X_COM_RAM_MASK7LSB = 667,
+ SI3217X_COM_RAM_RXDEC_B0 = 668,
+ SI3217X_COM_RAM_RXDEC_B1 = 669,
+ SI3217X_COM_RAM_RXDEC_B2 = 670,
+ SI3217X_COM_RAM_RXDEC_A1 = 671,
+ SI3217X_COM_RAM_RXDEC_A2 = 672,
+ SI3217X_COM_RAM_OSCINT1_B0_1 = 673,
+ SI3217X_COM_RAM_OSCINT1_B1_1 = 674,
+ SI3217X_COM_RAM_OSCINT1_B2_1 = 675,
+ SI3217X_COM_RAM_OSCINT1_A1_1 = 676,
+ SI3217X_COM_RAM_OSCINT1_A2_1 = 677,
+ SI3217X_COM_RAM_OSCINT1_B0_2 = 678,
+ SI3217X_COM_RAM_OSCINT1_B1_2 = 679,
+ SI3217X_COM_RAM_OSCINT1_B2_2 = 680,
+ SI3217X_COM_RAM_OSCINT1_A1_2 = 681,
+ SI3217X_COM_RAM_OSCINT1_A2_2 = 682,
+ SI3217X_COM_RAM_OSCINT2_B0_1 = 683,
+ SI3217X_COM_RAM_OSCINT2_B1_1 = 684,
+ SI3217X_COM_RAM_OSCINT2_B2_1 = 685,
+ SI3217X_COM_RAM_OSCINT2_A1_1 = 686,
+ SI3217X_COM_RAM_OSCINT2_A2_1 = 687,
+ SI3217X_COM_RAM_OSCINT2_B0_2 = 688,
+ SI3217X_COM_RAM_OSCINT2_B1_2 = 689,
+ SI3217X_COM_RAM_OSCINT2_B2_2 = 690,
+ SI3217X_COM_RAM_OSCINT2_A1_2 = 691,
+ SI3217X_COM_RAM_OSCINT2_A2_2 = 692,
+ SI3217X_COM_RAM_UNUSED693 = 693,
+ SI3217X_COM_RAM_UNUSED694 = 694,
+ SI3217X_COM_RAM_UNUSED695 = 695,
+ SI3217X_COM_RAM_RING_LPF_B0 = 696,
+ SI3217X_COM_RAM_RING_LPF_B1 = 697,
+ SI3217X_COM_RAM_RING_LPF_B2 = 698,
+ SI3217X_COM_RAM_RING_LPF_A1 = 699,
+ SI3217X_COM_RAM_RING_LPF_A2 = 700,
+ SI3217X_COM_RAM_LCRDBI = 701,
+ SI3217X_COM_RAM_LONGDBI = 702,
+ SI3217X_COM_RAM_VBAT_TIMER = 703,
+ SI3217X_COM_RAM_LF_SPEEDUP_TIMER = 704,
+ SI3217X_COM_RAM_DC_SPEEDUP_TIMER = 705,
+ SI3217X_COM_RAM_AC_SPEEDUP_TIMER = 706,
+ SI3217X_COM_RAM_LCR_SPEEDUP_TIMER = 707,
+ SI3217X_COM_RAM_CM_SPEEDUP_TIMER = 708,
+ SI3217X_COM_RAM_VCM_TH = 709,
+ SI3217X_COM_RAM_AC_SPEEDUP_TH = 710,
+ SI3217X_COM_RAM_SPR_SIG_0 = 711,
+ SI3217X_COM_RAM_SPR_SIG_1 = 712,
+ SI3217X_COM_RAM_SPR_SIG_2 = 713,
+ SI3217X_COM_RAM_SPR_SIG_3 = 714,
+ SI3217X_COM_RAM_SPR_SIG_4 = 715,
+ SI3217X_COM_RAM_SPR_SIG_5 = 716,
+ SI3217X_COM_RAM_SPR_SIG_6 = 717,
+ SI3217X_COM_RAM_SPR_SIG_7 = 718,
+ SI3217X_COM_RAM_SPR_SIG_8 = 719,
+ SI3217X_COM_RAM_SPR_SIG_9 = 720,
+ SI3217X_COM_RAM_SPR_SIG_10 = 721,
+ SI3217X_COM_RAM_SPR_SIG_11 = 722,
+ SI3217X_COM_RAM_SPR_SIG_12 = 723,
+ SI3217X_COM_RAM_SPR_SIG_13 = 724,
+ SI3217X_COM_RAM_SPR_SIG_14 = 725,
+ SI3217X_COM_RAM_SPR_SIG_15 = 726,
+ SI3217X_COM_RAM_SPR_SIG_16 = 727,
+ SI3217X_COM_RAM_SPR_SIG_17 = 728,
+ SI3217X_COM_RAM_SPR_SIG_18 = 729,
+ SI3217X_COM_RAM_COUNTER_VTR_VAL = 730,
+ SI3217X_COM_RAM_CONST_028 = 731,
+ SI3217X_COM_RAM_CONST_032 = 732,
+ SI3217X_COM_RAM_CONST_038 = 733,
+ SI3217X_COM_RAM_CONST_046 = 734,
+ SI3217X_COM_RAM_COUNTER_IRING_VAL = 735,
+ SI3217X_COM_RAM_GAIN_RING = 736,
+ SI3217X_COM_RAM_RING_HYST = 737,
+ SI3217X_COM_RAM_COMP_Z = 738,
+ SI3217X_COM_RAM_CONST_115 = 739,
+ SI3217X_COM_RAM_CONST_110 = 740,
+ SI3217X_COM_RAM_CONST_105 = 741,
+ SI3217X_COM_RAM_CONST_100 = 742,
+ SI3217X_COM_RAM_CONST_095 = 743,
+ SI3217X_COM_RAM_CONST_090 = 744,
+ SI3217X_COM_RAM_CONST_085 = 745,
+ SI3217X_COM_RAM_V_RASUM_IDEAL = 746,
+ SI3217X_COM_RAM_CONST_ONE = 747,
+ SI3217X_COM_RAM_VCM_OH = 748,
+ SI3217X_COM_RAM_VCM_RING = 749,
+ SI3217X_COM_RAM_VCM_HYST = 750,
+ SI3217X_COM_RAM_VOV_GND = 751,
+ SI3217X_COM_RAM_VOV_BAT = 752,
+ SI3217X_COM_RAM_VOV_RING_BAT = 753,
+ SI3217X_COM_RAM_CM_DBI = 754,
+ SI3217X_COM_RAM_RTPER = 755,
+ SI3217X_COM_RAM_P_TH_HVIC = 756,
+ SI3217X_COM_RAM_COEF_P_HVIC = 759,
+ SI3217X_COM_RAM_BAT_HYST = 764,
+ SI3217X_COM_RAM_BAT_DBI = 765,
+ SI3217X_COM_RAM_VBATL_EXPECT = 766,
+ SI3217X_COM_RAM_VBATH_EXPECT = 767,
+ SI3217X_COM_RAM_VBATR_EXPECT = 768,
+ SI3217X_COM_RAM_BAT_SETTLE = 769,
+ SI3217X_COM_RAM_VBAT_IRQ_TH = 770,
+ SI3217X_COM_RAM_MADC_VTIPC_OS = 771,
+ SI3217X_COM_RAM_MADC_VRINGC_OS = 772,
+ SI3217X_COM_RAM_MADC_VBAT_OS = 773,
+ SI3217X_COM_RAM_MADC_VLONG_OS = 774,
+ SI3217X_COM_RAM_UNUSED775 = 775,
+ SI3217X_COM_RAM_MADC_VDC_OS = 776,
+ SI3217X_COM_RAM_MADC_ILONG_OS = 777,
+ SI3217X_COM_RAM_MADC_ILOOP_OS = 780,
+ SI3217X_COM_RAM_MADC_ILOOP_SCALE = 781,
+ SI3217X_COM_RAM_UNUSED782 = 782,
+ SI3217X_COM_RAM_UNUSED783 = 783,
+ SI3217X_COM_RAM_DC_ADC_OS = 784,
+ SI3217X_COM_RAM_CAL_UNITY = 785,
+ SI3217X_COM_RAM_UNUSED786 = 786,
+ SI3217X_COM_RAM_UNUSED787 = 787,
+ SI3217X_COM_RAM_ACADC_OFFSET = 788,
+ SI3217X_COM_RAM_ACDAC_OFFSET = 789,
+ SI3217X_COM_RAM_CAL_DCDAC_CODE = 790,
+ SI3217X_COM_RAM_CAL_DCDAC_15MA = 791,
+ SI3217X_COM_RAM_CAL_LB_TSQUELCH = 801,
+ SI3217X_COM_RAM_CAL_LB_TCHARGE = 802,
+ SI3217X_COM_RAM_CAL_LB_TSETTLE0 = 803,
+ SI3217X_COM_RAM_CAL_GOERTZEL_DLY = 804,
+ SI3217X_COM_RAM_CAL_GOERTZEL_ALPHA = 805,
+ SI3217X_COM_RAM_CAL_DECLPF_K = 806,
+ SI3217X_COM_RAM_CAL_DECLPF_B1 = 807,
+ SI3217X_COM_RAM_CAL_DECLPF_B2 = 808,
+ SI3217X_COM_RAM_CAL_DECLPF_A1 = 809,
+ SI3217X_COM_RAM_CAL_DECLPF_A2 = 810,
+ SI3217X_COM_RAM_CAL_ACADC_THRL = 811,
+ SI3217X_COM_RAM_CAL_ACADC_THRH = 812,
+ SI3217X_COM_RAM_CAL_ACADC_TSETTLE = 813,
+ SI3217X_COM_RAM_DTROW0TH = 814,
+ SI3217X_COM_RAM_DTROW1TH = 815,
+ SI3217X_COM_RAM_DTROW2TH = 816,
+ SI3217X_COM_RAM_DTROW3TH = 817,
+ SI3217X_COM_RAM_DTCOL0TH = 818,
+ SI3217X_COM_RAM_DTCOL1TH = 819,
+ SI3217X_COM_RAM_DTCOL2TH = 820,
+ SI3217X_COM_RAM_DTCOL3TH = 821,
+ SI3217X_COM_RAM_DTFTWTH = 822,
+ SI3217X_COM_RAM_DTRTWTH = 823,
+ SI3217X_COM_RAM_DTROWRTH = 824,
+ SI3217X_COM_RAM_DTCOLRTH = 825,
+ SI3217X_COM_RAM_DTROW2HTH = 826,
+ SI3217X_COM_RAM_DTCOL2HTH = 827,
+ SI3217X_COM_RAM_DTMINPTH = 828,
+ SI3217X_COM_RAM_DTHOTTH = 829,
+ SI3217X_COM_RAM_RXPWR = 830,
+ SI3217X_COM_RAM_TXPWR = 831,
+ SI3217X_COM_RAM_RXMODPWR = 832,
+ SI3217X_COM_RAM_TXMODPWR = 833,
+ SI3217X_COM_RAM_FSKFREQ0 = 834,
+ SI3217X_COM_RAM_FSKFREQ1 = 835,
+ SI3217X_COM_RAM_FSKAMP0 = 836,
+ SI3217X_COM_RAM_FSKAMP1 = 837,
+ SI3217X_COM_RAM_FSK01 = 838,
+ SI3217X_COM_RAM_FSK10 = 839,
+ SI3217X_COM_RAM_VOCDELTA = 840,
+ SI3217X_COM_RAM_VOCLTH = 841,
+ SI3217X_COM_RAM_VOCHTH = 842,
+ SI3217X_COM_RAM_RINGOF = 843,
+ SI3217X_COM_RAM_RINGFR = 844,
+ SI3217X_COM_RAM_RINGAMP = 845,
+ SI3217X_COM_RAM_RINGPHAS = 846,
+ SI3217X_COM_RAM_RTDCTH = 847,
+ SI3217X_COM_RAM_RTACTH = 848,
+ SI3217X_COM_RAM_RTDCDB = 849,
+ SI3217X_COM_RAM_RTACDB = 850,
+ SI3217X_COM_RAM_RTCOUNT = 851,
+ SI3217X_COM_RAM_LCROFFHK = 852,
+ SI3217X_COM_RAM_LCRONHK = 853,
+ SI3217X_COM_RAM_LCRMASK = 854,
+ SI3217X_COM_RAM_LCRMASK_POLREV = 855,
+ SI3217X_COM_RAM_LCRMASK_STATE = 856,
+ SI3217X_COM_RAM_LCRMASK_LINECAP = 857,
+ SI3217X_COM_RAM_LONGHITH = 858,
+ SI3217X_COM_RAM_LONGLOTH = 859,
+ SI3217X_COM_RAM_IRING_LIM = 860,
+ SI3217X_COM_RAM_AC_PU_DELTA1 = 861,
+ SI3217X_COM_RAM_AC_PU_DELTA2 = 862,
+ SI3217X_COM_RAM_DIAG_LPF_8K = 863,
+ SI3217X_COM_RAM_DIAG_LPF_128K = 864,
+ SI3217X_COM_RAM_DIAG_INV_N = 865,
+ SI3217X_COM_RAM_DIAG_GAIN = 866,
+ SI3217X_COM_RAM_DIAG_G_CAL = 867,
+ SI3217X_COM_RAM_DIAG_OS_CAL = 868,
+ SI3217X_COM_RAM_SPR_GAIN_TRIM = 869,
+ SI3217X_COM_RAM_AC_DAC_GAIN = 871,
+ SI3217X_COM_RAM_AC_DAC_GAIN0 = 874,
+ SI3217X_COM_RAM_EZSYNTH_B0 = 875,
+ SI3217X_COM_RAM_UNUSED876 = 876,
+ SI3217X_COM_RAM_UNUSED877 = 877,
+ SI3217X_COM_RAM_UNUSED878 = 878,
+ SI3217X_COM_RAM_UNUSED879 = 879,
+ SI3217X_COM_RAM_AC_ADC_GAIN = 880,
+ SI3217X_COM_RAM_ILOOP1LPF = 881,
+ SI3217X_COM_RAM_RING_FLUSH_TIMER = 882,
+ SI3217X_COM_RAM_ALAW_BIAS = 883,
+ SI3217X_COM_RAM_MADC_VTRC_SCALE = 884,
+ SI3217X_COM_RAM_MADC_VLONG_SCALE = 887,
+ SI3217X_COM_RAM_MADC_VLONG_SCALE_RING = 888,
+ SI3217X_COM_RAM_UNUSED889 = 889,
+ SI3217X_COM_RAM_MADC_VDC_SCALE = 890,
+ SI3217X_COM_RAM_MADC_ILONG_SCALE = 891,
+ SI3217X_COM_RAM_UNUSED893 = 893,
+ SI3217X_COM_RAM_VDIFF_SENSE_SCALE = 894,
+ SI3217X_COM_RAM_VDIFF_SENSE_SCALE_RING = 895,
+ SI3217X_COM_RAM_VOV_RING_GND = 896,
+ SI3217X_COM_RAM_DIAG_GAIN_DC = 897,
+ SI3217X_COM_RAM_CAL_LB_OSC1_FREQ = 898,
+ SI3217X_COM_RAM_CAL_DCDAC_9TAU = 899,
+ SI3217X_COM_RAM_CAL_MADC_9TAU = 900,
+ SI3217X_COM_RAM_ADAP_RING_MIN_I = 901,
+ SI3217X_COM_RAM_SWEEP_STEP = 902,
+ SI3217X_COM_RAM_SWEEP_STEP_SAVE = 903,
+ SI3217X_COM_RAM_SWEEP_REF = 904,
+ SI3217X_COM_RAM_AMP_STEP = 905,
+ SI3217X_COM_RAM_RXACGAIN_SAVE = 906,
+ SI3217X_COM_RAM_AMP_RAMP_INIT = 907,
+ SI3217X_COM_RAM_DIAG_HPF_GAIN = 908,
+ SI3217X_COM_RAM_DIAG_HPF_8K = 909,
+ SI3217X_COM_RAM_DIAG_ADJ_STEP = 910,
+ SI3217X_COM_RAM_UNUSED912 = 912,
+ SI3217X_COM_RAM_MADC_SCALE_INV = 913,
+ SI3217X_COM_RAM_UNUSED914 = 914,
+ SI3217X_COM_RAM_PWRSAVE_TIMER = 915,
+ SI3217X_COM_RAM_OFFHOOK_THRESH = 916,
+ SI3217X_COM_RAM_SPEEDUP_MASK_TIMER = 917,
+ SI3217X_COM_RAM_UNUSED918 = 918,
+ SI3217X_COM_RAM_VBAT_TRACK_MIN = 919,
+ SI3217X_COM_RAM_VBAT_TRACK_MIN_RNG = 920,
+ SI3217X_COM_RAM_DC_HOLD_DAC_OS = 927,
+ SI3217X_COM_RAM_NOTCH_B0 = 929,
+ SI3217X_COM_RAM_NOTCH_B1 = 930,
+ SI3217X_COM_RAM_NOTCH_B2 = 931,
+ SI3217X_COM_RAM_NOTCH_A1 = 932,
+ SI3217X_COM_RAM_NOTCH_A2 = 933,
+ SI3217X_COM_RAM_METER_LPF_B0 = 934,
+ SI3217X_COM_RAM_METER_LPF_B1 = 935,
+ SI3217X_COM_RAM_METER_LPF_B2 = 936,
+ SI3217X_COM_RAM_METER_LPF_A1 = 937,
+ SI3217X_COM_RAM_METER_LPF_A2 = 938,
+ SI3217X_COM_RAM_METER_SIG_0 = 939,
+ SI3217X_COM_RAM_METER_SIG_1 = 940,
+ SI3217X_COM_RAM_METER_SIG_2 = 941,
+ SI3217X_COM_RAM_METER_SIG_3 = 942,
+ SI3217X_COM_RAM_METER_SIG_4 = 943,
+ SI3217X_COM_RAM_METER_SIG_5 = 944,
+ SI3217X_COM_RAM_METER_SIG_6 = 945,
+ SI3217X_COM_RAM_METER_SIG_7 = 946,
+ SI3217X_COM_RAM_METER_SIG_8 = 947,
+ SI3217X_COM_RAM_METER_SIG_9 = 948,
+ SI3217X_COM_RAM_METER_SIG_10 = 949,
+ SI3217X_COM_RAM_METER_SIG_11 = 950,
+ SI3217X_COM_RAM_METER_SIG_12 = 951,
+ SI3217X_COM_RAM_METER_SIG_13 = 952,
+ SI3217X_COM_RAM_METER_SIG_14 = 953,
+ SI3217X_COM_RAM_METER_SIG_15 = 954,
+ SI3217X_COM_RAM_METER_BP_B0 = 955,
+ SI3217X_COM_RAM_METER_BP_B1 = 956,
+ SI3217X_COM_RAM_METER_BP_B2 = 957,
+ SI3217X_COM_RAM_METER_BP_A1 = 958,
+ SI3217X_COM_RAM_METER_BP_A2 = 959,
+ SI3217X_COM_RAM_PM_AMP_THRESH = 960,
+ SI3217X_COM_RAM_PWRSAVE_DBI = 962,
+ SI3217X_COM_RAM_DCDC_ANA_SCALE = 963,
+ SI3217X_COM_RAM_VOV_BAT_PWRSAVE_LO = 964,
+ SI3217X_COM_RAM_VOV_BAT_PWRSAVE_HI = 965,
+ SI3217X_COM_RAM_AC_ADC_GAIN0 = 966,
+ SI3217X_COM_RAM_SCALE_KAUDIO = 967,
+ SI3217X_COM_RAM_UNUSED1010 = 1010,
+ SI3217X_COM_RAM_UNUSED1011 = 1011,
+ SI3217X_COM_RAM_UNUSED1012 = 1012,
+ SI3217X_COM_RAM_UNUSED1013 = 1013,
+ SI3217X_COM_RAM_UNUSED1016 = 1016,
+ SI3217X_COM_RAM_UNUSED1022 = 1022,
+ SI3217X_COM_RAM_UNUSED1023 = 1023,
+ SI3217X_COM_RAM_DAC_IN = 1281,
+ SI3217X_COM_RAM_ADC_OUT = 1282,
+ SI3217X_COM_RAM_PASS1 = 1283,
+ SI3217X_COM_RAM_TX_AC_INT = 1284,
+ SI3217X_COM_RAM_RX_AC_DIFF = 1285,
+ SI3217X_COM_RAM_INDIRECT_WR = 1286,
+ SI3217X_COM_RAM_INDIRECT_RD = 1287,
+ SI3217X_COM_RAM_BYPASS_OUT = 1288,
+ SI3217X_COM_RAM_ACC = 1289,
+ SI3217X_COM_RAM_INDIRECT_RAM_A = 1290,
+ SI3217X_COM_RAM_INDIRECT_RAM_B = 1291,
+ SI3217X_COM_RAM_HOT_BIT1 = 1292,
+ SI3217X_COM_RAM_HOT_BIT0 = 1293,
+ SI3217X_COM_RAM_PASS0_ROW_PWR = 1294,
+ SI3217X_COM_RAM_PASS0_COL_PWR = 1295,
+ SI3217X_COM_RAM_PASS0_ROW = 1296,
+ SI3217X_COM_RAM_PASS0_COL = 1297,
+ SI3217X_COM_RAM_PASS0_ROW_REL = 1298,
+ SI3217X_COM_RAM_PASS0_COL_REL = 1299,
+ SI3217X_COM_RAM_PASS0_ROW_2ND = 1300,
+ SI3217X_COM_RAM_PASS0_COL_2ND = 1301,
+ SI3217X_COM_RAM_PASS0_REV_TW = 1302,
+ SI3217X_COM_RAM_PASS0_FWD_TW = 1303,
+ SI3217X_COM_RAM_DAA_ADC_OUT = 1304,
+ SI3217X_COM_RAM_CAL_CM_BAL_TEST = 1305,
+ SI3217X_COM_RAM_TONE1 = 1307,
+ SI3217X_COM_RAM_TONE2 = 1308,
+ SI3217X_COM_RAM_RING_TRIG = 1309,
+ SI3217X_COM_RAM_VCM_DAC = 1310,
+ SI3217X_COM_RAM_RING_DAC = 1312,
+ SI3217X_COM_RAM_VRING_CROSSING = 1313,
+ SI3217X_COM_RAM_UNUSED_REG290 = 1314,
+ SI3217X_COM_RAM_LINEFEED_SHADOW = 1315,
+ SI3217X_COM_RAM_ROW_DIGIT = 1319,
+ SI3217X_COM_RAM_COL_DIGIT = 1320,
+ SI3217X_COM_RAM_PQ1_IRQ = 1322,
+ SI3217X_COM_RAM_PQ2_IRQ = 1323,
+ SI3217X_COM_RAM_PQ3_IRQ = 1324,
+ SI3217X_COM_RAM_PQ4_IRQ = 1325,
+ SI3217X_COM_RAM_PQ5_IRQ = 1326,
+ SI3217X_COM_RAM_PQ6_IRQ = 1327,
+ SI3217X_COM_RAM_LCR_SET = 1328,
+ SI3217X_COM_RAM_LCR_CLR = 1329,
+ SI3217X_COM_RAM_RTP_SET = 1330,
+ SI3217X_COM_RAM_LONG_SET = 1331,
+ SI3217X_COM_RAM_LONG_CLR = 1332,
+ SI3217X_COM_RAM_VDIFF_IRQ = 1333,
+ SI3217X_COM_RAM_MODFEED_SET = 1334,
+ SI3217X_COM_RAM_MODFEED_CLR = 1335,
+ SI3217X_COM_RAM_LF_SPEEDUP_SET = 1336,
+ SI3217X_COM_RAM_LF_SPEEDUP_CLR = 1337,
+ SI3217X_COM_RAM_DC_SPEEDUP_SET = 1338,
+ SI3217X_COM_RAM_DC_SPEEDUP_CLR = 1339,
+ SI3217X_COM_RAM_AC_SPEEDUP_SET = 1340,
+ SI3217X_COM_RAM_AC_SPEEDUP_CLR = 1341,
+ SI3217X_COM_RAM_LCR_SPEEDUP_SET = 1342,
+ SI3217X_COM_RAM_LCR_SPEEDUP_CLR = 1343,
+ SI3217X_COM_RAM_CM_SPEEDUP_SET = 1344,
+ SI3217X_COM_RAM_CM_SPEEDUP_CLR = 1345,
+ SI3217X_COM_RAM_MODEMPASS0 = 1346,
+ SI3217X_COM_RAM_RX2100_PASS1_PWR = 1347,
+ SI3217X_COM_RAM_RX2100_PASS1_THR = 1348,
+ SI3217X_COM_RAM_TX2100_PASS1_PWR = 1349,
+ SI3217X_COM_RAM_TX2100_PASS1_THR = 1350,
+ SI3217X_COM_RAM_TXMDM_TRIG = 1351,
+ SI3217X_COM_RAM_RXMDM_TRIG = 1352,
+ SI3217X_COM_RAM_TX_FILT_CLR = 1354,
+ SI3217X_COM_RAM_TX_DC_INT = 1355,
+ SI3217X_COM_RAM_RX_DC_MOD_IN = 1356,
+ SI3217X_COM_RAM_DSP_ACCESS = 1357,
+ SI3217X_COM_RAM_PRAM_ADDR = 1358,
+ SI3217X_COM_RAM_PRAM_DATA = 1359,
+ SI3217X_COM_RAM_IND_RAM_A_BASE = 1360,
+ SI3217X_COM_RAM_IND_RAM_A_ADDR = 1361,
+ SI3217X_COM_RAM_IND_RAM_A_MOD = 1362,
+ SI3217X_COM_RAM_IND_RAM_B_BASE = 1363,
+ SI3217X_COM_RAM_IND_RAM_B_ADDR = 1364,
+ SI3217X_COM_RAM_IND_RAM_B_MOD = 1365,
+ SI3217X_COM_RAM_USER_B0 = 1369,
+ SI3217X_COM_RAM_USER_B1 = 1370,
+ SI3217X_COM_RAM_USER_B2 = 1371,
+ SI3217X_COM_RAM_USER_B3 = 1372,
+ SI3217X_COM_RAM_USER_B4 = 1373,
+ SI3217X_COM_RAM_USER_B5 = 1374,
+ SI3217X_COM_RAM_USER_B6 = 1375,
+ SI3217X_COM_RAM_USER_B7 = 1376,
+ SI3217X_COM_RAM_FLUSH_AUDIO_CLR = 1377,
+ SI3217X_COM_RAM_FLUSH_DC_CLR = 1378,
+ SI3217X_COM_RAM_SPR_CLR = 1379,
+ SI3217X_COM_RAM_GPI0 = 1380,
+ SI3217X_COM_RAM_GPI1 = 1381,
+ SI3217X_COM_RAM_GPI2 = 1382,
+ SI3217X_COM_RAM_GPI3 = 1383,
+ SI3217X_COM_RAM_GPO0 = 1384,
+ SI3217X_COM_RAM_GPO1 = 1385,
+ SI3217X_COM_RAM_GPO2 = 1386,
+ SI3217X_COM_RAM_GPO3 = 1387,
+ SI3217X_COM_RAM_GPO0_OE = 1388,
+ SI3217X_COM_RAM_GPO1_OE = 1389,
+ SI3217X_COM_RAM_GPO2_OE = 1390,
+ SI3217X_COM_RAM_GPO3_OE = 1391,
+ SI3217X_COM_RAM_BATSEL_L_SET = 1392,
+ SI3217X_COM_RAM_BATSEL_H_SET = 1393,
+ SI3217X_COM_RAM_BATSEL_R_SET = 1394,
+ SI3217X_COM_RAM_BATSEL_CLR = 1395,
+ SI3217X_COM_RAM_VBAT_IRQ = 1396,
+ SI3217X_COM_RAM_MADC_VTIPC_RAW = 1397,
+ SI3217X_COM_RAM_MADC_VRINGC_RAW = 1398,
+ SI3217X_COM_RAM_MADC_VBAT_RAW = 1399,
+ SI3217X_COM_RAM_MADC_VLONG_RAW = 1400,
+ SI3217X_COM_RAM_UNUSED_REG377 = 1401,
+ SI3217X_COM_RAM_MADC_VDC_RAW = 1402,
+ SI3217X_COM_RAM_MADC_ILONG_RAW = 1403,
+ SI3217X_COM_RAM_MADC_ILOOP_RAW = 1406,
+ SI3217X_COM_RAM_MADC_DIAG_RAW = 1407,
+ SI3217X_COM_RAM_CALR3_DSP = 1410,
+ SI3217X_COM_RAM_PD_MADC = 1411,
+ SI3217X_COM_RAM_UNUSED_REG388 = 1412,
+ SI3217X_COM_RAM_PD_BIAS = 1413,
+ SI3217X_COM_RAM_PD_DC_ADC = 1414,
+ SI3217X_COM_RAM_PD_DC_DAC = 1415,
+ SI3217X_COM_RAM_PD_DC_SNS = 1416,
+ SI3217X_COM_RAM_PD_DC_COARSE_SNS = 1417,
+ SI3217X_COM_RAM_PD_VBAT_SNS = 1418,
+ SI3217X_COM_RAM_PD_DC_BUF = 1419,
+ SI3217X_COM_RAM_PD_AC_ADC = 1420,
+ SI3217X_COM_RAM_PD_AC_DAC = 1421,
+ SI3217X_COM_RAM_PD_AC_SNS = 1422,
+ SI3217X_COM_RAM_PD_CM_SNS = 1423,
+ SI3217X_COM_RAM_PD_CM = 1424,
+ SI3217X_COM_RAM_PD_SUM = 1427,
+ SI3217X_COM_RAM_PD_LKGDAC = 1428,
+ SI3217X_COM_RAM_PD_HVIC = 1430,
+ SI3217X_COM_RAM_CMDAC_CHEN_B = 1432,
+ SI3217X_COM_RAM_SUM_CHEN_B = 1433,
+ SI3217X_COM_RAM_TRNRD_CHEN_B = 1434,
+ SI3217X_COM_RAM_DC_BUF_CHEN_B = 1436,
+ SI3217X_COM_RAM_AC_SNS_CHEN_B = 1437,
+ SI3217X_COM_RAM_DC_SNS_CHEN_B = 1438,
+ SI3217X_COM_RAM_LB_MUX_CHEN_B = 1439,
+ SI3217X_COM_RAM_CMDAC_EN_B = 1441,
+ SI3217X_COM_RAM_RA_EN_B = 1442,
+ SI3217X_COM_RAM_RD_EN_B = 1443,
+ SI3217X_COM_RAM_VCTL = 1444,
+ SI3217X_COM_RAM_UNUSED_REG422 = 1446,
+ SI3217X_COM_RAM_HVIC_STATE = 1447,
+ SI3217X_COM_RAM_HVIC_STATE_OBSERVE = 1448,
+ SI3217X_COM_RAM_HVIC_STATE_MAN = 1449,
+ SI3217X_COM_RAM_HVIC_STATE_READ = 1450,
+ SI3217X_COM_RAM_VCMDAC_SCALE_MAN = 1452,
+ SI3217X_COM_RAM_CAL_ACADC_CNTL = 1453,
+ SI3217X_COM_RAM_CAL_ACDAC_CNTL = 1454,
+ SI3217X_COM_RAM_CAL_DCDAC_CNTL = 1456,
+ SI3217X_COM_RAM_CAL_TRNRD_CNTL = 1457,
+ SI3217X_COM_RAM_CAL_TRNRD_DACT = 1458,
+ SI3217X_COM_RAM_CAL_TRNRD_DACR = 1459,
+ SI3217X_COM_RAM_LKG_UPT_ACTIVE = 1460,
+ SI3217X_COM_RAM_LKG_UPR_ACTIVE = 1461,
+ SI3217X_COM_RAM_LKG_DNT_ACTIVE = 1462,
+ SI3217X_COM_RAM_LKG_DNR_ACTIVE = 1463,
+ SI3217X_COM_RAM_CAL_LKG_EN_CNTL = 1468,
+ SI3217X_COM_RAM_CAL_PUPD_CNTL = 1469,
+ SI3217X_COM_RAM_CAL_AC_RCAL = 1471,
+ SI3217X_COM_RAM_CAL_DC_RCAL = 1472,
+ SI3217X_COM_RAM_KAC_MOD = 1473,
+ SI3217X_COM_RAM_KAC_SEL = 1474,
+ SI3217X_COM_RAM_SEL_RING = 1475,
+ SI3217X_COM_RAM_CMDAC_FWD = 1476,
+ SI3217X_COM_RAM_CMDAC_RVS = 1477,
+ SI3217X_COM_RAM_CAL_INC_STATE = 1478,
+ SI3217X_COM_RAM_CAL_DCDAC_COMP = 1479,
+ SI3217X_COM_RAM_BAT_SWITCH = 1480,
+ SI3217X_COM_RAM_CH_IRQ = 1481,
+ SI3217X_COM_RAM_ILOOP_CROSSING = 1482,
+ SI3217X_COM_RAM_VOC_FAILSAFE = 1483,
+ SI3217X_COM_RAM_UNUSED_REG461 = 1485,
+ SI3217X_COM_RAM_GENERIC_0 = 1486,
+ SI3217X_COM_RAM_GENERIC_1 = 1487,
+ SI3217X_COM_RAM_GENERIC_2 = 1488,
+ SI3217X_COM_RAM_GENERIC_3 = 1489,
+ SI3217X_COM_RAM_GENERIC_4 = 1490,
+ SI3217X_COM_RAM_GENERIC_5 = 1491,
+ SI3217X_COM_RAM_GENERIC_6 = 1492,
+ SI3217X_COM_RAM_GENERIC_7 = 1493,
+ SI3217X_COM_RAM_QHI_SET = 1496,
+ SI3217X_COM_RAM_QHI_CLR = 1497,
+ SI3217X_COM_RAM_RDC_SUM = 1499,
+ SI3217X_COM_RAM_FLUSH_AUDIO_MAN = 1506,
+ SI3217X_COM_RAM_FLUSH_DC_MAN = 1507,
+ SI3217X_COM_RAM_TIP_RING_CNTL = 1508,
+ SI3217X_COM_RAM_SQUELCH_SET = 1509,
+ SI3217X_COM_RAM_SQUELCH_CLR = 1510,
+ SI3217X_COM_RAM_CAL_STATE_MAN = 1511,
+ SI3217X_COM_RAM_UNUSED_REG488 = 1512,
+ SI3217X_COM_RAM_UNUSED_REG489 = 1513,
+ SI3217X_COM_RAM_RINGING_BW = 1514,
+ SI3217X_COM_RAM_AUDIO_MAN = 1515,
+ SI3217X_COM_RAM_HVIC_STATE_SPARE = 1516,
+ SI3217X_COM_RAM_RINGING_FAST_MAN = 1517,
+ SI3217X_COM_RAM_VCM_DAC_MAN = 1518,
+ SI3217X_COM_RAM_GENERIC_8 = 1522,
+ SI3217X_COM_RAM_GENERIC_9 = 1523,
+ SI3217X_COM_RAM_GENERIC_10 = 1524,
+ SI3217X_COM_RAM_GENERIC_11 = 1525,
+ SI3217X_COM_RAM_GENERIC_12 = 1527,
+ SI3217X_COM_RAM_GENERIC_13 = 1528,
+ SI3217X_COM_RAM_DC_HOLD_DAC = 1530,
+ SI3217X_COM_RAM_OFFHOOK_CMP = 1531,
+ SI3217X_COM_RAM_PWRSAVE_SET = 1532,
+ SI3217X_COM_RAM_PWRSAVE_CLR = 1533,
+ SI3217X_COM_RAM_PD_WKUP = 1534,
+ SI3217X_COM_RAM_SPEEDUP_MASK_SET = 1535,
+ SI3217X_COM_RAM_SPEEDUP_MASK_CLR = 1536,
+ SI3217X_COM_RAM_PD_DCDC = 1538,
+ SI3217X_COM_RAM_UNUSED_REG515 = 1539,
+ SI3217X_COM_RAM_PD_UVLO = 1540,
+ SI3217X_COM_RAM_PD_OVLO = 1541,
+ SI3217X_COM_RAM_PD_OCLO = 1542,
+ SI3217X_COM_RAM_PD_SWDRV = 1543,
+ SI3217X_COM_RAM_DCDC_UVHYST = 1545,
+ SI3217X_COM_RAM_DCDC_UVTHRESH = 1546,
+ SI3217X_COM_RAM_DCDC_OVTHRESH = 1547,
+ SI3217X_COM_RAM_DCDC_OITHRESH = 1548,
+ SI3217X_COM_RAM_DCDC_STATUS = 1551,
+ SI3217X_COM_RAM_DCDC_SWDRV_POL = 1553,
+ SI3217X_COM_RAM_DCDC_UVPOL = 1554,
+ SI3217X_COM_RAM_DCDC_VREF_MAN = 1557,
+ SI3217X_COM_RAM_DCDC_VREF_CTRL = 1558,
+ SI3217X_COM_RAM_DCDC_RNGTYPE = 1560,
+ SI3217X_COM_RAM_DCDC_DIN_FILT = 1561,
+ SI3217X_COM_RAM_DCDC_DOUT = 1563,
+ SI3217X_COM_RAM_UNUSED_REG540 = 1564,
+ SI3217X_COM_RAM_DCDC_OIMASK = 1565,
+ SI3217X_COM_RAM_DCDC_SC_SET = 1568,
+ SI3217X_COM_RAM_WAKE_HOLD = 1569,
+ SI3217X_COM_RAM_PD_AC_SQUELCH = 1570,
+ SI3217X_COM_RAM_PD_REF_OSC = 1571,
+ SI3217X_COM_RAM_PWRSAVE_MAN = 1573,
+ SI3217X_COM_RAM_PWRSAVE_SEL = 1574,
+ SI3217X_COM_RAM_PWRSAVE_CTRL_LO = 1575,
+ SI3217X_COM_RAM_PWRSAVE_CTRL_HI = 1576,
+ SI3217X_COM_RAM_PWRSAVE_HVIC_LO = 1577,
+ SI3217X_COM_RAM_PWRSAVE_HVIC_HI = 1578,
+ SI3217X_COM_RAM_DSP_PROM_MISR = 1579,
+ SI3217X_COM_RAM_DSP_CROM_MISR = 1580,
+ SI3217X_COM_RAM_DAA_PROM_MISR = 1581,
+ SI3217X_COM_RAM_DAA_CROM_MISR = 1582,
+ SI3217X_COM_RAM_RAMBIST_ERROR = 1583,
+ SI3217X_COM_RAM_DCDC_ANA_VREF = 1584,
+ SI3217X_COM_RAM_DCDC_ANA_GAIN = 1585,
+ SI3217X_COM_RAM_DCDC_ANA_TOFF = 1586,
+ SI3217X_COM_RAM_DCDC_ANA_TONMIN = 1587,
+ SI3217X_COM_RAM_DCDC_ANA_TONMAX = 1588,
+ SI3217X_COM_RAM_DCDC_ANA_DSHIFT = 1589,
+ SI3217X_COM_RAM_DCDC_ANA_LPOLY = 1590,
+ SI3217X_COM_RAM_DCDC_ANA_PSKIP = 1591,
+ SI3217X_COM_RAM_PD_DCDC_ANA = 1592,
+ SI3217X_COM_RAM_PWRPEND_SET = 1595,
+ SI3217X_COM_RAM_PD_CM_BUF = 1596,
+};
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_constants.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_constants.h
new file mode 100644
index 0000000..e6c621a
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_constants.h
@@ -0,0 +1,85 @@
+/*
+** Copyright (c) 2012 Silicon Laboratories, Inc.
+** 2012-05-01 09:19:57
+**
+** Si3217x ProSLIC API Configuration Tool Version 2.11.0
+*/
+
+
+#ifndef SI3217X_CONSTANTS_H
+#define SI3217X_CONSTANTS_H
+
+/** Ringing Presets */
+enum {
+ RING_MAX_VBAT_PROVISIONING,
+ RING_F20_45VRMS_0VDC_LPR,
+ RING_F20_45VRMS_0VDC_BAL,
+ RING_F20_45VRMS_0VDC_LPR_SHORTTIME,
+ RINGING_LAST_ENUM
+};
+
+/** DC_Feed Presets */
+enum {
+ DCFEED_48V_20MA,
+ DCFEED_48V_25MA,
+ DCFEED_PSTN_DET_1,
+ DCFEED_PSTN_DET_2,
+ DC_FEED_LAST_ENUM
+};
+
+/** Impedance Presets */
+enum {
+ ZSYN_600_0_0_30_0,
+ ZSYN_270_750_150_30_0,
+ ZSYN_370_620_310_30_0,
+ ZSYN_220_820_120_30_0,
+ ZSYN_600_0_1000_30_0,
+ ZSYN_200_680_100_30_0,
+ ZSYN_220_820_115_30_0,
+ WB_ZSYN_600_0_0_20_0,
+ IMPEDANCE_LAST_ENUM
+};
+
+
+/** FSK Presets */
+enum {
+ DEFAULT_FSK,
+ ITU_FSK,
+ FSK_LAST_ENUM
+};
+
+
+/** Pulse_Metering Presets */
+enum {
+ DEFAULT_PULSE_METERING,
+ PULSE_METERING_LAST_ENUM
+};
+
+
+/** Tone Presets */
+enum {
+ TONEGEN_FCC_DIAL,
+ TONEGEN_FCC_BUSY,
+ TONEGEN_FCC_RINGBACK,
+ //TONEGEN_FCC_REORDER,
+ TONEGEN_FCC_CONGESTION,
+ TONEGEN_CALL_WAITING,
+ TONEGEN_HOWLER,
+ TONE_LAST_ENUM
+};
+
+
+/** PCM Presets */
+enum {
+ PCM_8ULAW,
+ PCM_8ALAW,
+ PCM_16LIN,
+ PCM_16LIN_WB,
+ PCM_LAST_ENUM
+};
+
+
+
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_intf.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_intf.h
new file mode 100644
index 0000000..cf08498
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_intf.h
@@ -0,0 +1,665 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_intf.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Si3217x_Intf.h
+** Si3217x ProSLIC interface header file
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the ProSLIC driver.
+**
+**
+*/
+
+#ifndef SI3217X_INTF_H
+#define SI3217X_INTF_H
+
+typedef ProSLIC_DCfeed_Cfg Si3217x_DCfeed_Cfg;
+
+/* DC Feed */
+#ifndef DISABLE_DCFEED_SETUP
+extern Si3217x_DCfeed_Cfg Si3217x_DCfeed_Presets[];
+#endif
+
+
+/* The following macros are for backward compatibility */
+#define Si3217x_CheckCIDBuffer ProSLIC_CheckCIDBuffer
+#define Si3217x_DCFeedSetup(PCHAN, NDX) Si3217x_DCFeedSetupCfg((PCHAN),Si3217x_DCfeed_Presets, (NDX))
+#define Si3217x_DisableCID ProSLIC_DisableCID
+#define Si3217x_DisableInterrupts ProSLIC_DisableInterrupts
+#define Si3217x_DTMFReadDigit ProSLIC_DTMFReadDigit
+#define Si3217x_EnableCID ProSLIC_EnableCID
+#define Si3217x_GetInterrupts ProSLIC_GetInterrupts
+#define Si3217x_GetLBCalResult ProSLIC_GetLBCalResult
+#define Si3217x_GetLBCalResultPacked ProSLIC_GetLBCalResultPacked
+#define Si3217x_GetPLLFreeRunStatus ProSLIC_GetPLLFreeRunStatus
+#define Si3217x_GPIOControl ProSLIC_GPIOControl
+#define Si3217x_Init(PCHAN, SZ) Si3217x_Init_with_Options((PCHAN), (SZ), INIT_NO_OPT)
+#define Si3217x_LoadPatch ProSLIC_LoadPatch
+#define Si3217x_LoadPreviousLBCal ProSLIC_LoadPreviousLBCal
+#define Si3217x_LoadPreviousLBCalPacked ProSLIC_LoadPreviousLBCalPacked
+#define Si3217x_LoadRegTables ProSLIC_LoadRegTables
+#define Si3217x_ModemDetSetup(PCH, NDX) ProSLIC_UnsupportedFeatureNoArg((PCH), "Si3217x_ModemDetSetup")
+#define Si3217x_ModifyCIDStartBits ProSLIC_ModifyCIDStartBits
+#define Si3217x_PCMStart ProSLIC_PCMStart
+#define Si3217x_PCMStop ProSLIC_PCMStop
+#define Si3217x_PCMTimeSlotSetup ProSLIC_PCMTimeSlotSetup
+#define Si3217x_PLLFreeRunStart ProSLIC_PLLFreeRunStart
+#define Si3217x_PLLFreeRunStop ProSLIC_PLLFreeRunStop
+#define Si3217x_PolRev ProSLIC_PolRev
+#define Si3217x_PringDebugRAM ProSLIC_PrintDebugRAM
+#define Si3217x_PrintDebugData ProSLIC_PrintDebugData
+#define Si3217x_PrintDebugReg ProSLIC_PrintDebugReg
+#define Si3217x_PulseMeterDisable ProSLIC_PulseMeterDisable
+#define Si3217x_PulseMeterEnable ProSLIC_PulseMeterEnable
+#define Si3217x_PulseMeterStart ProSLIC_PulseMeterStart
+#define Si3217x_PulseMeterStop ProSLIC_PulseMeterStop
+#define Si3217x_ReadHookStatus ProSLIC_ReadHookStatus
+#define Si3217x_ReadRAM ProSLIC_ReadRAM
+#define Si3217x_ReadReg ProSLIC_ReadReg
+#define Si3217x_Reset SiVoice_Reset
+#define Si3217x_RingStart ProSLIC_RingStart
+#define Si3217x_RingStop ProSLIC_RingStop
+#define Si3217x_SendCID ProSLIC_SendCID
+#define Si3217x_SetLoopbackMode ProSLIC_SetLoopbackMode
+#define Si3217x_SetMuteStatus ProSLIC_SetMuteStatus
+#define Si3217x_SetPowersaveMode ProSLIC_SetPowersaveMode
+#define Si3217x_SetProfile(PCH, PRESET) ProSLIC_UnsupportedFeatureNoArg((PCH), "Si3217x_SetProfile")
+#define Si3217x_ToneGenStart ProSLIC_ToneGenStart
+#define Si3217x_ToneGenStop ProSLIC_ToneGenStop
+#define Si3217x_VerifyPatch ProSLIC_VerifyPatch
+#define Si3217x_WriteRAM ProSLIC_WriteRAM
+#define Si3217x_WriteReg ProSLIC_WriteReg
+#define Si3217x_VerifyControlInterface ProSLIC_VefifyControlInterface
+#define Si3217x_ShutdownChannel ProSLIC_PowerDownConverter
+#define Si3217x_PowerDownConverter ProSLIC_PowerDownConverter
+#define Si3217x_ToneGenSetup ProSLIC_ToneGenSetup
+#define Si3217x_FSKSetup ProSLIC_FSKSetup
+#define Si3217x_SetLinefeedStatusBroadcast ProSLIC_SetLinefeedStatusBroadcast
+
+
+/*
+**
+** PROSLIC INITIALIZATION FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_ShutdownChannel
+**
+** Description:
+** Safely shutdown channel w/o interruption to
+** other active channels
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+**
+** Return:
+** none
+*/
+int Si3217x_ShutdownChannel (proslicChanType_ptr hProslic);
+
+/*
+** Function: PROSLIC_Init_MultiBOM
+**
+** Description:
+** Initializes the ProSLIC w/ selected general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** size: number of channels
+** preset: General configuration preset
+**
+** Return:
+** none
+*/
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+int Si3217x_Init_MultiBOM (proslicChanType_ptr *hProslic,int size,int preset);
+#endif
+
+/*
+** Function: Si3217x_Init_with_Options
+**
+** Description:
+** Initializes the ProSLIC with an option.
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** size - number of continuous channels to initialize
+** init_opt - which initialization type to do.
+**
+** Return:
+** none
+*/
+int Si3217x_Init_with_Options (proslicChanType_ptr *pProslic, int size,
+ initOptionsType init_opt);
+
+/*
+** Function: Si3217x_PowerUpConverter
+**
+** Description:
+** Powers all DC/DC converters sequentially with delay to minimize
+** peak power draw on VDC.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_PowerUpConverter(proslicChanType_ptr hProslic);
+
+/*
+** Function: Si3217x_Calibrate
+**
+** Description:
+** Generic calibration function for Si3217x
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object,
+** size: maximum number of channels
+** calr: array of CALRx register values
+** maxTime: cal timeout (in ms)
+**
+** Return:
+** int
+*/
+int Si3217x_Calibrate (proslicChanType_ptr *hProslic, int size, uInt8 *calr,
+ int maxTime);
+
+/*
+** Function: PROSLIC_EnableInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** hProslic: pointer to Proslic object
+**
+** Return:
+**
+*/
+int Si3217x_EnableInterrupts (proslicChanType_ptr hProslic);
+
+/*
+**
+** PROSLIC CONFIGURATION FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_RingSetup
+**
+** Description:
+** configure ringing
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pRingSetup: pointer to ringing config structure
+**
+** Return:
+** none
+*/
+int Si3217x_RingSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_DTMFDecodeSetup
+**
+** Description:
+** configure dtmf decode
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pDTMFDec: pointer to dtmf decoder config structure
+**
+** Return:
+** none
+*/
+int Si3217x_DTMFDecodeSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_ZsynthSetup
+**
+** Description:
+** configure impedance synthesis
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pZynth: pointer to zsynth config structure
+**
+** Return:
+** none
+*/
+int Si3217x_ZsynthSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_GciCISetup
+**
+** Description:
+** configure CI bits (GCI mode)
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pCI: pointer to ringing config structure
+**
+** Return:
+** none
+*/
+int Si3217x_GciCISetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** preset: impedance preset to scale
+**
+** Return:
+** none
+*/
+int Si3217x_TXAudioGainSetup (proslicChanType *pProslic, int preset);
+int Si3217x_RXAudioGainSetup (proslicChanType *pProslic, int preset);
+#define Si3217x_AudioGainSetup ProSLIC_AudioGainSetup
+
+/*
+** Function: PROSLIC_TXAudioGainScale
+**
+** Description:
+** configure audio gains
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** preset: pointer to audio gains config structure
+** pga_scale: pga_scaling constant
+** eq_scale: equalizer scaling constant
+**
+** Return:
+** none
+*/
+int Si3217x_TXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale);
+
+/*
+** Function: PROSLIC_RXAudioGainScale
+**
+** Description:
+** configure audio gains
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** preset: pointer to audio gains config structure
+** pga_scale: pga_scaling constant
+** eq_scale: equalizer scaling constant
+**
+** Return:
+** none
+*/
+int Si3217x_RXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale);
+
+/*
+** Function: PROSLIC_AudioEQSetup
+**
+** Description:
+** configure audio equalizers
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pAudioEQ: pointer to ringing config structure
+**
+** Return:
+** none
+*/
+int Si3217x_AudioEQSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_DCFeedSetup
+**
+** Description:
+** configure dc feed
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pDcFeed: pointer to dc feed config structure
+**
+** Return:
+** none
+*/
+int Si3217x_DCFeedSetupCfg (proslicChanType *pProslic, ProSLIC_DCfeed_Cfg *cfg,
+ int preset);
+
+/*
+** Function: PROSLIC_GPIOSetup
+**
+** Description:
+** configure gpio
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pGpio: pointer to gpio config structure
+**
+** Return:
+** none
+*/
+int Si3217x_GPIOSetup (proslicChanType *pProslic);
+
+/*
+** Function: PROSLIC_PCMSetup
+**
+** Description:
+** configure pcm
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pPcm: pointer to pcm config structure
+**
+** Return:
+** none
+*/
+int Si3217x_PCMSetup(proslicChanType *pProslic, int preset);
+
+/*
+**
+** PROSLIC CONTROL FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_GetInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** hProslic: pointer to Proslic object
+** pIntData: pointer to interrupt info retrieved
+**
+** Return:
+**
+*/
+int Si3217x_GetInterrupts (proslicChanType_ptr hProslic,
+ proslicIntType *pIntData);
+
+/*
+** Function: PROSLIC_WriteLinefeed
+**
+** Description:
+** Sets linefeed state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** newLinefeed: new linefeed state
+**
+** Return:
+** none
+*/
+int Si3217x_SetLinefeedStatus (proslicChanType *pProslic,uInt8 newLinefeed);
+
+/*
+** Function: Si3217x_GetChipInfo
+**
+** Description:
+** Determine if DAA or ProSLIC present
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+**
+** Return:
+** channelType
+*/
+int Si3217x_GetChipInfo(proslicChanType *pProslic);
+
+
+/*
+** Function: ProSLIC_MWISetup
+**
+** Description:
+** Modify default MWI amplitude and switch debounce parameters
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** vpk_mag: peak flash voltage (vpk) - passing a 0 results
+** in no change to VBATH_NEON
+** lcmrmask_mwi: LCR mask time (ms) after MWI state switch - passing
+** a 0 results in no change to LCRMASK_MWI
+**
+** Return:
+** none
+*/
+int Si3217x_MWISetup (proslicChanType *pProslic,uInt16 vpk_mag,
+ uInt16 lcrmask_mwi);
+
+/*
+** Function: ProSLIC_MWIEnable
+**
+** Description:
+** Enable MWI feature
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3217x_MWIEnable (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_MWIDisable
+**
+** Description:
+** Disable MWI feature
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3217x_MWIDisable (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_SetMWIState
+**
+** Description:
+** Set MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** flash_on: 0 = low, 1 = high (VBATH_NEON)
+**
+** Return:
+** none
+*/
+int Si3217x_SetMWIState (proslicChanType *pProslic,uInt8 flash_on);
+
+/*
+** Function: ProSLIC_SetMWIState_ramp
+**
+** Description:
+** Set MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** flash_on: 0 = low, 1 = high (VBATH_NEON)
+** step_delay: delay between VBATH steps (ms)
+** step_num: number of steps between low and high states
+**
+** Return:
+** none
+*/
+int Si3217x_SetMWIState_ramp (proslicChanType *pProslic,uInt8 flash_on,
+ uInt8 step_delay,uInt8 step_num);
+
+/*
+** Function: ProSLIC_GetMWIState
+**
+** Description:
+** Read MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** 0 - Flash OFF, 1 - Flash ON, RC_MWI_NOT_ENABLED
+*/
+int Si3217x_GetMWIState (proslicChanType *pProslic);
+
+/*
+** Function: PROSLIC_MWI
+**
+** Description:
+** implements message waiting indicator
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** lampOn: 0 = turn lamp off, 1 = turn lamp on
+**
+** Return:
+** none
+**
+** Use Deprecated.
+*/
+int Si3217x_MWI (proslicChanType *pProslic,uInt8 lampOn);
+
+/*
+** Function: PROSLIC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pPulseCfg: pointer to pulse metering config structure
+**
+** Return:
+** none
+*/
+int Si3217x_PulseMeterSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_dbgSetDCFeed
+**
+** Description:
+** provision function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3217x_dbgSetDCFeed (proslicChanType *pProslic, uInt32 v_vlim_val,
+ uInt32 i_ilim_val, int32 preset);
+
+/*
+** Function: PROSLIC_dbgSetDCFeedVopen
+**
+** Description:
+** provision function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3217x_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val,
+ int32 preset);
+
+
+/*
+** Function: PROSLIC_dbgSetDCFeedIloop
+**
+** Description:
+** provision function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3217x_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val,
+ int32 preset);
+
+
+/*
+** Function: PROSLIC_dbgRingingSetup
+**
+** Description:
+** Provision function for setting up
+** Ring type, frequency, amplitude and dc offset.
+** Main use will be by peek/poke applications.
+*/
+int Si3217x_dbgSetRinging (proslicChanType *pProslic,
+ ProSLIC_dbgRingCfg *ringCfg, int preset);
+
+/*
+** Function: PROSLIC_dbgSetRXGain
+**
+** Description:
+** Provision function for setting up
+** RX path gain.
+*/
+int Si3217x_dbgSetRXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+/*
+** Function: PROSLIC_dbgSetTXGain
+**
+** Description:
+** Provision function for setting up
+** TX path gain.
+*/
+int Si3217x_dbgSetTXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+
+/*
+** Function: PROSLIC_LineMonitor
+**
+** Description:
+** Monitor line voltages and currents
+*/
+int Si3217x_LineMonitor(proslicChanType *pProslic, proslicMonitorType *monitor);
+
+
+/*
+** Function: PROSLIC_PSTNCheck
+**
+** Description:
+** Continuous monitor of ilong to detect hot pstn line
+*/
+int Si3217x_PSTNCheck(proslicChanType *pProslic,
+ proslicPSTNCheckObjType *pstnCheckObj);
+
+
+/*
+** Function: PROSLIC_PSTNCheck
+**
+** Description:
+** Continuous monitor of ilong to detect hot pstn line
+*/
+int Si3217x_DiffPSTNCheck(proslicChanType *pProslic,
+ proslicDiffPSTNCheckObjType *pstnCheckObj);
+
+/*
+** Function: PROSLIC_ReadMADCScaled
+**
+** Description:
+** Read MADC (or other sensed voltages/currents) and
+** return scaled value in int32 format
+*/
+int32 Si3217x_ReadMADCScaled(proslicChanType_ptr pProslic, uInt16 addr,
+ int32 scale);
+
+/*
+** Function: PROSLIC_SetDAAEnable
+**
+** Description:
+** Enable FXO channel (Si32178 only)
+*/
+int Si3217x_SetDAAEnable(proslicChanType *pProslic, int enable);
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_registers.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_registers.h
new file mode 100644
index 0000000..90e9a25
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_registers.h
@@ -0,0 +1,9 @@
+
+
+
+#include "si3217x_common_registers.h"
+#if 0
+#include "si3217x_revc_registers.h"
+#else
+#include "si3217x_revb_registers.h"
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_registersoldrevb.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_registersoldrevb.h
new file mode 100644
index 0000000..c454140
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_registersoldrevb.h
@@ -0,0 +1,1238 @@
+/*
+** Copyright (c) 2007 by Silicon Laboratories
+**
+** $Id: si3217x_registers.h 3468 2012-05-02 19:07:47Z cdp $
+**
+** Si3217x_Registers.h
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file that contains
+** register and RAM names definitions for
+** the Si3217x ProSLIC.
+**
+** Dependancies:
+**
+**
+*/
+#ifndef SI3217XREGS_H
+#define SI3217XREGS_H
+
+/*
+** This defines the neumomics for the SI3217X registers
+*/
+enum REGISTERS {
+ID,
+RESET,
+MSTREN,
+MSTRSTAT,
+RAMSTAT,
+RAM_ADDR_HI,
+RAM_DATA_B0,
+RAM_DATA_B1,
+RAM_DATA_B2,
+RAM_DATA_B3,
+RAM_ADDR_LO,
+PCMMODE,
+PCMTXLO,
+PCMTXHI,
+PCMRXLO,
+PCMRXHI,
+IRQ,
+IRQ0,
+IRQ1,
+IRQ2,
+IRQ3,
+IRQ4,
+IRQEN1,
+IRQEN2,
+IRQEN3,
+IRQEN4,
+CALR0,
+CALR1,
+CALR2,
+CALR3,
+LINEFEED,
+POLREV,
+SPEEDUP_DIS,
+SPEEDUP,
+LCRRTP,
+OFFLOAD,
+BATSELMAP,
+BATSEL,
+RINGCON,
+RINGTALO,
+RINGTAHI,
+RINGTILO,
+RINGTIHI,
+LOOPBACK,
+DIGCON,
+RA,
+ZCAL_EN,
+ENHANCE,
+OMODE,
+OCON,
+O1TALO,
+O1TAHI,
+O1TILO,
+O1TIHI,
+O2TALO,
+O2TAHI,
+O2TILO,
+O2TIHI,
+FSKDAT,
+FSKDEPTH,
+TONDTMF,
+TONDET,
+TONEN,
+GCI_CI,
+GLOBSTAT1,
+GLOBSTAT2,
+USERSTAT,
+GPIO,
+GPIO_CFG1,
+GPIO_CFG2,
+GPIO_CFG3,
+DIAG1,
+DIAG2,
+CM_CLAMP,
+DAA_CNTL,
+PMCON,
+REG76,
+REG77,
+REG78,
+REG79,
+AUTO,
+JMPEN,
+JMP0LO,
+JMP0HI,
+JMP1LO,
+JMP1HI,
+JMP2LO,
+JMP2HI,
+JMP3LO,
+JMP3HI,
+JMP4LO,
+JMP4HI,
+JMP5LO,
+JMP5HI,
+JMP6LO,
+JMP6HI,
+JMP7LO,
+JMP7HI,
+PDN,
+PDN_STAT,
+PDN2,
+PDN2_STAT,
+USERMODE_ENABLE = 126
+};
+
+
+/*
+** This defines the neumomics for the SI3217X RAM locations (revB)
+**
+*/
+enum SRAM {
+IRNGNG_SENSE,
+MADC_VTIPC,
+MADC_VRINGC,
+MADC_VBAT,
+MADC_VLONG,
+UNUSED5,
+MADC_VDC,
+MADC_ILONG,
+MADC_ITIP,
+MADC_IRING,
+MADC_ILOOP,
+VDIFF_SENSE,
+VTIP,
+VRING,
+P_Q1_D,
+P_Q2_D,
+P_Q3_D,
+P_Q4_D,
+P_Q5_D,
+P_Q6_D,
+P_Q1,
+DIAG_EX1,
+DIAG_EX2,
+DIAG_LPF_MADC,
+DIAG_DMM_I,
+DIAG_DMM_V,
+OSC1FREQ,
+OSC1AMP,
+OSC1PHAS,
+OSC2FREQ,
+OSC2AMP,
+OSC2PHAS,
+TESTB0_1,
+TESTB1_1,
+TESTB2_1,
+TESTA1_1,
+TESTA2_1,
+TESTB0_2,
+TESTB1_2,
+TESTB2_2,
+TESTA1_2,
+TESTA2_2,
+TESTB0_3,
+TESTB1_3,
+TESTB2_3,
+TESTA1_3,
+TESTA2_3,
+TESTPKO,
+TESTAVO,
+TESTWLN,
+TESTAVBW,
+TESTPKFL,
+TESTAVFL,
+TESTPKTH,
+TESTAVTH,
+DAC_IN_SYNC1,
+BYPASS_REG,
+LCRMASK_CNT,
+DAC_IN_SYNC,
+TEMP,
+TEMP_ISR,
+P_Q2,
+P_Q3,
+P_Q4,
+P_Q5,
+P_Q6,
+ILOOP_FILT,
+ILONG_FILT,
+VBAT_FILT,
+VDIFF_FILT,
+VCM_FILT,
+VBAT_CNT,
+V_VLIM_SCALED,
+V_VLIM_TRACK,
+V_VLIM_MODFEED,
+DIAG_P_OUT,
+DIAG_COUNT,
+ROW0_MAG,
+ROW1_MAG,
+ROW2_MAG,
+ROW3_MAG,
+COL0_MAG,
+COL1_MAG,
+COL2_MAG,
+COL3_MAG,
+ROW0_2ND_Y1,
+ROW1_2ND_Y1,
+ROW2_2ND_Y1,
+ROW3_2ND_Y1,
+COL0_2ND_Y1,
+COL1_2ND_Y1,
+COL2_2ND_Y1,
+COL3_2ND_Y1,
+ROW0_2ND_Y2,
+ROW1_2ND_Y2,
+ROW2_2ND_Y2,
+ROW3_2ND_Y2,
+COL0_2ND_Y2,
+COL1_2ND_Y2,
+COL2_2ND_Y2,
+COL3_2ND_Y2,
+DTMF_IN,
+DTMFDTF_D2_1,
+DTMFDTF_D1_1,
+DTMFDTF_OUT_1,
+DTMFDTF_D2_2,
+DTMFDTF_D1_2,
+DTMFDTF_OUT_2,
+DTMFDTF_D2_3,
+DTMFDTF_D1_3,
+DTMFDTF_OUT_3,
+DTMFDTF_OUT,
+DTMFLPF_D2_1,
+DTMFLPF_D1_1,
+DTMFLPF_OUT_1,
+DTMFLPF_D2_2,
+DTMFLPF_D1_2,
+DTMFLPF_OUT_2,
+DTMF_ROW,
+DTMFHPF_D2_1,
+DTMFHPF_D1_1,
+DTMFHPF_OUT_1,
+DTMFHPF_D2_2,
+DTMFHPF_D1_2,
+DTMFHPF_OUT_2,
+DTMF_COL,
+ROW_POWER,
+COL_POWER,
+GP_TIMER,
+SPR_INTERP_DIF,
+SPR_INTERP_DIF_OUT,
+SPR_INTERP_INT,
+SPR_CNT,
+ROW0_Y1,
+ROW0_Y2,
+ROW1_Y1,
+ROW1_Y2,
+ROW2_Y1,
+ROW2_Y2,
+ROW3_Y1,
+ROW3_Y2,
+COL0_Y1,
+COL0_Y2,
+COL1_Y1,
+COL1_Y2,
+COL2_Y1,
+COL2_Y2,
+COL3_Y1,
+COL3_Y2,
+ROWMAX_MAG,
+COLMAX_MAG,
+ROW0_2ND_MAG,
+COL0_2ND_MAG,
+ROW_THR,
+COL_THR,
+OSC1_Y,
+OSC2_Y,
+OSC1_X,
+OSC1_COEFF,
+OSC2_X,
+OSC2_COEFF,
+RXACIIR_D2_1,
+RXACIIR_OUT_1,
+RXACIIR_D2_2,
+RXACIIR_D1_2,
+RXACIIR_OUT_2,
+RXACIIR_D2_3,
+RXACIIR_D1_3,
+RXACIIR_OUT,
+RXACIIR_OUT_3,
+TXACCOMB_D1,
+TXACCOMB_D2,
+TXACCOMB_D3,
+TXACSINC_OUT,
+TXACHPF_D1_2,
+TXACHPF_D2_1,
+TXACHPF_D2_2,
+TXACHPF_OUT,
+TXACHPF_OUT_1,
+TXACHPF_OUT_2,
+TXACIIR_D2_1,
+TXACIIR_OUT_1,
+TXACIIR_D2_2,
+TXACIIR_D1_2,
+TXACIIR_OUT_2,
+TXACIIR_D2_3,
+TXACIIR_D1_3,
+TXACIIR_OUT_3,
+TXACIIR_OUT,
+ECIIR_D1,
+ECIIR_D2,
+EC_DELAY1,
+EC_DELAY2,
+EC_DELAY3,
+EC_DELAY4,
+EC_DELAY5,
+EC_DELAY6,
+EC_DELAY7,
+EC_DELAY8,
+EC_DELAY9,
+EC_DELAY10,
+EC_DELAY11,
+ECHO_EST,
+EC_OUT,
+TESTFILT_OUT_1,
+TESTFILT_D1_1,
+TESTFILT_D2_1,
+TESTFILT_OUT_2,
+TESTFILT_D1_2,
+TESTFILT_D2_2,
+TESTFILT_OUT_3,
+TESTFILT_D1_3,
+TESTFILT_D2_3,
+TESTFILT_PEAK,
+TESTFILT_ABS,
+TESTFILT_MEANACC,
+TESTFILT_COUNT,
+TESTFILT_NO_OFFSET,
+RING_X,
+RING_Y,
+RING_INT,
+RING_Y_D1,
+RING_DIFF,
+RING_DELTA,
+WTCHDOG_CNT,
+RING_WAVE,
+UNUSED226,
+ONEKHZ_COUNT,
+TX2100_Y1,
+TX2100_Y2,
+TX2100_MAG,
+RX2100_Y1,
+RX2100_Y2,
+RX2100_MAG,
+TX2100_POWER,
+RX2100_POWER,
+TX2100_IN,
+RX2100_IN,
+RINGTRIP_COUNT,
+RINGTRIP_DC1,
+RINGTRIP_DC2,
+RINGTRIP_AC1,
+RINGTRIP_AC2,
+RINGTRIP_AC_COUNT,
+RINGTRIP_DC_COUNT,
+RINGTRIP_AC_RESULT,
+RINGTRIP_DC_RESULT,
+RINGTRIP_ABS,
+TXACEQ_OUT,
+LCR_DBI_CNT,
+BAT_DBI_CNT,
+LONG_DBI_CNT,
+TXACEQ_DELAY3,
+TXACEQ_DELAY2,
+TXACEQ_DELAY1,
+RXACEQ_DELAY3,
+RXACEQ_DELAY2,
+RXACEQ_DELAY1,
+RXACEQ_IN,
+TXDCCOMB_D1,
+TXDCCOMB_D2,
+TXDCSINC_OUT,
+RXACDIFF_D1,
+DC_NOTCH_1,
+DC_NOTCH_2,
+DC_NOTCH_OUT,
+DC_NOTCH_SCALED,
+V_FEED_IN,
+I_TAR,
+CONST_VLIM,
+UNITY,
+TXACNOTCH_1,
+TXACNOTCH_2,
+TXACNOTCH_OUT,
+ZSYNTH_1,
+ZSYNTH_2,
+ZSYNTH_OUT_1,
+TXACD2_1_0,
+TXACD2_1_1,
+TXACD2_1_2,
+TXACD2_1_3,
+TXACD2_1_4,
+TXACD2_1_5,
+TXACD2_1_OUT,
+TXACD2_2_0,
+TXACD2_2_1,
+TXACD2_2_2,
+TXACD2_2_3,
+TXACD2_2_4,
+TXACD2_2_5,
+TXACD2_2_OUT,
+TXACD2_3_0,
+TXACD2_3_1,
+TXACD2_3_2,
+TXACD2_3_3,
+TXACD2_3_4,
+TXACD2_3_5,
+TXACD2_3_OUT,
+RXACI2_1_1,
+RXACI2_1_2,
+RXACI2_1_3,
+RXACI2_1_4,
+RXACI2_1_OUT,
+RXACI2_2_1,
+RXACI2_2_2,
+RXACI2_2_3,
+RXACI2_2_4,
+RXACI2_2_OUT,
+RXACI2_3_1,
+RXACI2_3_2,
+RXACI2_3_3,
+RXACI2_3_4,
+RXACI2_3_OUT,
+TXACCOMP1,
+TXACCOMP_OUT,
+RXACCOMP1,
+RXACCOMP_OUT,
+RXACHPF_D1_2,
+RXACHPF_D2_1,
+RXACHPF_D2_2,
+RXACHPF_OUT,
+RXACHPF_OUT_1,
+RXACHPF_OUT_2,
+RXACEQ_OUT,
+METER_I_1,
+METER_I_OUT,
+METER_LPF_1,
+METER_LPF_2,
+METER_LPF_OUT_1,
+METER_BP_1,
+METER_BP_2,
+METER_BP_OUT,
+METER_SRC_OUT,
+PMDIFF_D1,
+PMDIFF_D2,
+RING_LPF_1,
+RING_LPF_2,
+RING_LPF_OUT,
+RING_INTERP_DIFF,
+RING_INTERP_DIFF_OUT,
+RING_INTERP_INT,
+RING_INTERP_INT_OUT,
+V_ILIM_TRACK,
+V_RFEED_TRACK,
+LF_SPEEDUP_CNT,
+DC_SPEEDUP_CNT,
+AC_SPEEDUP_CNT,
+LCR_SPEEDUP_CNT,
+CM_SPEEDUP_CNT,
+DC_SPEEDUP_MASK,
+ZSYNTH_IN,
+I_TAR_SAVE,
+UNUSED352,
+UNUSED353,
+COUNTER_VTR,
+I_RING_AVG,
+COUNTER_IRING,
+COMP_RATIO,
+MADC_VBAT_DIV2,
+VDIFF_PK_T,
+PEAK_CNT,
+CM_DBI_CNT,
+VCM_LAST,
+VBATL_SENSE,
+VBATH_SENSE,
+VBATR_SENSE,
+BAT_SETTLE_CNT,
+VBAT_TGT,
+VBAT_REQ,
+VCM_HIRES,
+VCM_LORES,
+ILOOP1,
+ILONG2,
+ITIP1,
+IRING1,
+CAL_TEMP1,
+CAL_TEMP2,
+CAL_TEMP3,
+CAL_TEMP4,
+CAL_TEMP5,
+CAL_TEMP6,
+CAL_TEMP7,
+CMRR_DIVISOR,
+CMRR_REMAINDER,
+CMRR_Q_PTR,
+CAL_LKG_DWN_C0,
+CAL_LKG_DWN_V0,
+CAL_LKG_DWN_CN,
+CAL_LKG_DWN_VN,
+CAL_LKG_DWN_VLSB,
+CAL_LKG_DWN_ILSB,
+CAL_LKG_DWN_DACCODE,
+CAL_LKG_DWN_ICALC,
+CAL_ONHK_Z,
+CAL_LB_SETTLE,
+CAL_DECLPF_V0,
+CAL_DECLPF_V1,
+CAL_DECLPF_V2,
+CAL_GOERTZEL_V0,
+CAL_GOERTZEL_V1,
+CAL_DECLPF_Y,
+CAL_GOERTZEL_Y,
+P_HVIC,
+VBATL_MIRROR,
+VBATH_MIRROR,
+VBATR_MIRROR,
+DIAG_EX1_OUT,
+DIAG_EX2_OUT,
+DIAG_DMM_V_OUT,
+DIAG_DMM_I_OUT,
+DIAG_P,
+DIAG_LPF_V,
+DIAG_LPF_I,
+DIAG_TONE_FLAG,
+ILOOP1_LAST,
+RING_ENTRY_VOC,
+MADC_VBAT_LAST,
+OSC1_X_SAVE,
+EZSYNTH_1,
+EZSYNTH_2,
+ZSYNTH_OUT,
+UNUSED421,
+CAL_SUBSTATE,
+DIAG_EX1_DC_OUT,
+DIAG_EX1_DC,
+EZSYNTH_B1,
+EZSYNTH_B2,
+EZSYNTH_A1,
+EZSYNTH_A2,
+ILOOP1_FILT,
+AC_PU_DELTA1_CNT,
+AC_PU_DELTA2_CNT,
+UNUSED432,
+UNUSED433,
+UNUSED434,
+AC_DAC_GAIN_SAVE,
+RING_FLUSH_CNT,
+UNUSED437,
+DIAG_VAR_OUT,
+I_VBAT,
+UNUSED440,
+CALTMP_LOOPCNT,
+CALTMP_LOOPINC,
+CALTMP_ILOOPX1,
+CALTMP_CODEINC,
+CALTMP_TAUINC,
+CALTMP_TAU,
+CAL_TEMP8,
+PATCH_ID,
+UNUSED449,
+UNUSED450,
+UNUSED451,
+CAL_LB_OFFSET_FWD,
+CAL_LB_OFFSET_RVS,
+COUNT_SPEEDUP,
+SWEEP_COUNT,
+AMP_RAMP,
+DIAG_LPF_MADC_D,
+DIAG_HPF_MADC,
+DIAG_V_TAR,
+TXDEC_OUT,
+TXDEC_D1,
+TXDEC_D2,
+RXDEC_D1,
+RXDEC_D2,
+OSCINT1_D2_1,
+OSCINT1_D1_1,
+OSCINT1_OUT_1,
+OSCINT1_D2_2,
+OSCINT1_D1_2,
+OSCINT1_OUT,
+OSCINT2_D2_1,
+OSCINT2_D1_1,
+OSCINT2_OUT_1,
+OSCINT2_D2_2,
+OSCINT2_D1_2,
+OSCINT2_OUT,
+OSC1_Y_SAVE,
+OSC2_Y_SAVE,
+PWRSAVE_CNT,
+VBATR_PK,
+SPEEDUP_MASK_CNT,
+VCM_RING_FIXED,
+DELTA_VCM,
+MADC_VTIPC_DIAG_OS,
+MADC_VRINGC_DIAG_OS,
+MADC_VLONG_DIAG_OS,
+MADC_ISNS_DIAG_STBY_OS,
+MADC_ISNS_DIAG_OS,
+DCDC_FSW_VTHLO,
+DCDC_FSW_VHYST,
+DCDC_FSW_STATE,
+PWRSAVE_DBI_CNT,
+COMP_RATIO_SAVE,
+CAL_TEMP9,
+CAL_TEMP10,
+DAC_OFFSET_TEMP,
+CAL_DAC_CODE,
+DCDAC_OFFSET,
+VDIFF_COARSE,
+RXACIIR_OUT_4,
+UNUSED501,
+UNUSED502,
+CAL_TEMP11,
+UNUSED504,
+UNUSED505,
+UNUSED506,
+UNUSED507,
+UNUSED508,
+UNUSED509,
+UNUSED510,
+UNUSED511,
+MINUS_ONE,
+ILOOPLPF,
+ILONGLPF,
+BATLPF,
+VDIFFLPF,
+VCMLPF,
+TXACIIR_B0_1,
+TXACIIR_B1_1,
+TXACIIR_A1_1,
+TXACIIR_B0_2,
+TXACIIR_B1_2,
+TXACIIR_B2_2,
+TXACIIR_A1_2,
+TXACIIR_A2_2,
+TXACIIR_B0_3,
+TXACIIR_B1_3,
+TXACIIR_B2_3,
+TXACIIR_A1_3,
+TXACIIR_A2_3,
+TXACHPF_B0_1,
+TXACHPF_B1_1,
+TXACHPF_A1_1,
+TXACHPF_B0_2,
+TXACHPF_B1_2,
+TXACHPF_B2_2,
+TXACHPF_A1_2,
+TXACHPF_A2_2,
+TXACHPF_GAIN,
+TXACEQ_C0,
+TXACEQ_C1,
+TXACEQ_C2,
+TXACEQ_C3,
+TXACGAIN,
+RXACGAIN,
+RXACEQ_C0,
+RXACEQ_C1,
+RXACEQ_C2,
+RXACEQ_C3,
+RXACIIR_B0_1,
+RXACIIR_B1_1,
+RXACIIR_A1_1,
+RXACIIR_B0_2,
+RXACIIR_B1_2,
+RXACIIR_B2_2,
+RXACIIR_A1_2,
+RXACIIR_A2_2,
+RXACIIR_B0_3,
+RXACIIR_B1_3,
+RXACIIR_B2_3,
+RXACIIR_A1_3,
+RXACIIR_A2_3,
+ECFIR_C2,
+ECFIR_C3,
+ECFIR_C4,
+ECFIR_C5,
+ECFIR_C6,
+ECFIR_C7,
+ECFIR_C8,
+ECFIR_C9,
+ECIIR_B0,
+ECIIR_B1,
+ECIIR_A1,
+ECIIR_A2,
+DTMFDTF_B0_1,
+DTMFDTF_B1_1,
+DTMFDTF_B2_1,
+DTMFDTF_A1_1,
+DTMFDTF_A2_1,
+DTMFDTF_B0_2,
+DTMFDTF_B1_2,
+DTMFDTF_B2_2,
+DTMFDTF_A1_2,
+DTMFDTF_A2_2,
+DTMFDTF_B0_3,
+DTMFDTF_B1_3,
+DTMFDTF_B2_3,
+DTMFDTF_A1_3,
+DTMFDTF_A2_3,
+DTMFDTF_GAIN,
+DTMFLPF_B0_1,
+DTMFLPF_B1_1,
+DTMFLPF_B2_1,
+DTMFLPF_A1_1,
+DTMFLPF_A2_1,
+DTMFLPF_B0_2,
+DTMFLPF_B1_2,
+DTMFLPF_B2_2,
+DTMFLPF_A1_2,
+DTMFLPF_A2_2,
+DTMFLPF_GAIN,
+DTMFHPF_B0_1,
+DTMFHPF_B1_1,
+DTMFHPF_B2_1,
+DTMFHPF_A1_1,
+DTMFHPF_A2_1,
+DTMFHPF_B0_2,
+DTMFHPF_B1_2,
+DTMFHPF_B2_2,
+DTMFHPF_A1_2,
+DTMFHPF_A2_2,
+DTMFHPF_GAIN,
+POWER_GAIN,
+GOERTZEL_GAIN,
+MODEM_GAIN,
+HOTBIT1,
+HOTBIT0,
+ROW0_C1,
+ROW1_C1,
+ROW2_C1,
+ROW3_C1,
+COL0_C1,
+COL1_C1,
+COL2_C1,
+COL3_C1,
+ROW0_C2,
+ROW1_C2,
+ROW2_C2,
+ROW3_C2,
+COL0_C2,
+COL1_C2,
+COL2_C2,
+COL3_C2,
+SLOPE_VLIM,
+SLOPE_RFEED,
+SLOPE_ILIM,
+SLOPE_RING,
+SLOPE_DELTA1,
+SLOPE_DELTA2,
+V_VLIM,
+V_RFEED,
+V_ILIM,
+CONST_RFEED,
+CONST_ILIM,
+I_VLIM,
+DC_DAC_GAIN,
+VDIFF_TH,
+TXDEC_B0,
+TXDEC_B1,
+TXDEC_B2,
+TXDEC_A1,
+TXDEC_A2,
+ZSYNTH_B0,
+ZSYNTH_B1,
+ZSYNTH_B2,
+ZSYNTH_A1,
+ZSYNTH_A2,
+RXACHPF_B0_1,
+RXACHPF_B1_1,
+RXACHPF_A1_1,
+RXACHPF_B0_2,
+RXACHPF_B1_2,
+RXACHPF_B2_2,
+RXACHPF_A1_2,
+RXACHPF_A2_2,
+RXACHPF_GAIN,
+MASK7LSB,
+RXDEC_B0,
+RXDEC_B1,
+RXDEC_B2,
+RXDEC_A1,
+RXDEC_A2,
+OSCINT1_B0_1,
+OSCINT1_B1_1,
+OSCINT1_B2_1,
+OSCINT1_A1_1,
+OSCINT1_A2_1,
+OSCINT1_B0_2,
+OSCINT1_B1_2,
+OSCINT1_B2_2,
+OSCINT1_A1_2,
+OSCINT1_A2_2,
+OSCINT2_B0_1,
+OSCINT2_B1_1,
+OSCINT2_B2_1,
+OSCINT2_A1_1,
+OSCINT2_A2_1,
+OSCINT2_B0_2,
+OSCINT2_B1_2,
+OSCINT2_B2_2,
+OSCINT2_A1_2,
+OSCINT2_A2_2,
+UNUSED693,
+UNUSED694,
+UNUSED695,
+RING_LPF_B0,
+RING_LPF_B1,
+RING_LPF_B2,
+RING_LPF_A1,
+RING_LPF_A2,
+LCRDBI,
+LONGDBI,
+VBAT_TIMER,
+LF_SPEEDUP_TIMER,
+DC_SPEEDUP_TIMER,
+AC_SPEEDUP_TIMER,
+LCR_SPEEDUP_TIMER,
+CM_SPEEDUP_TIMER,
+VCM_TH,
+AC_SPEEDUP_TH,
+SPR_SIG_0,
+SPR_SIG_1,
+SPR_SIG_2,
+SPR_SIG_3,
+SPR_SIG_4,
+SPR_SIG_5,
+SPR_SIG_6,
+SPR_SIG_7,
+SPR_SIG_8,
+SPR_SIG_9,
+SPR_SIG_10,
+SPR_SIG_11,
+SPR_SIG_12,
+SPR_SIG_13,
+SPR_SIG_14,
+SPR_SIG_15,
+SPR_SIG_16,
+SPR_SIG_17,
+SPR_SIG_18,
+COUNTER_VTR_VAL,
+CONST_028,
+CONST_032,
+CONST_038,
+CONST_046,
+COUNTER_IRING_VAL,
+GAIN_RING,
+RING_HYST,
+COMP_Z,
+CONST_115,
+CONST_110,
+CONST_105,
+CONST_100,
+CONST_095,
+CONST_090,
+CONST_085,
+V_RASUM_IDEAL,
+CONST_ONE,
+VCM_OH,
+VCM_RING,
+VCM_HYST,
+VOV_GND,
+VOV_BAT,
+VOV_RING_BAT,
+CM_DBI,
+RTPER,
+P_TH_HVIC,
+P_TH_Q1256,
+P_TH_Q34,
+COEF_P_HVIC,
+COEF_Q1256,
+COEF_Q34,
+R_OFFLOAD,
+R_63,
+BAT_HYST,
+BAT_DBI,
+VBATL_EXPECT,
+VBATH_EXPECT,
+VBATR_EXPECT,
+BAT_SETTLE,
+VBAT_IRQ_TH,
+MADC_VTIPC_OS,
+MADC_VRINGC_OS,
+MADC_VBAT_OS,
+MADC_VLONG_OS,
+UNUSED775,
+MADC_VDC_OS,
+MADC_ILONG_OS,
+MADC_ISNS_STDBY_OS,
+MADC_ISNS_OS,
+MADC_ILOOP_OS,
+MADC_ILOOP_SCALE,
+UNUSED782,
+UNUSED783,
+DC_ADC_OS,
+CAL_UNITY,
+UNUSED786,
+UNUSED787,
+ACADC_OFFSET,
+ACDAC_OFFSET,
+CAL_DCDAC_CODE,
+CAL_DCDAC_15MA,
+CAL_LKG_TSETTLE,
+CAL_LKG_IREF100,
+CAL_LKG_LIM100UA,
+CAL_LKG_VREF25,
+CAL_LKG_VLSB_0_INV,
+CAL_LKG_RDCSNS_EFF,
+CAL_LKG_RDCOFF_EFF,
+CAL_LKG_CODE_OS,
+CAL_LKG_VMAX_THR,
+CAL_LB_TSQUELCH,
+CAL_LB_TCHARGE,
+CAL_LB_TSETTLE0,
+CAL_GOERTZEL_DLY,
+CAL_GOERTZEL_ALPHA,
+CAL_DECLPF_K,
+CAL_DECLPF_B1,
+CAL_DECLPF_B2,
+CAL_DECLPF_A1,
+CAL_DECLPF_A2,
+CAL_ACADC_THRL,
+CAL_ACADC_THRH,
+CAL_ACADC_TSETTLE,
+DTROW0TH,
+DTROW1TH,
+DTROW2TH,
+DTROW3TH,
+DTCOL0TH,
+DTCOL1TH,
+DTCOL2TH,
+DTCOL3TH,
+DTFTWTH,
+DTRTWTH,
+DTROWRTH,
+DTCOLRTH,
+DTROW2HTH,
+DTCOL2HTH,
+DTMINPTH,
+DTHOTTH,
+RXPWR,
+TXPWR,
+RXMODPWR,
+TXMODPWR,
+FSKFREQ0,
+FSKFREQ1,
+FSKAMP0,
+FSKAMP1,
+FSK01,
+FSK10,
+VOCDELTA,
+VOCLTH,
+VOCHTH,
+RINGOF,
+RINGFR,
+RINGAMP,
+RINGPHAS,
+RTDCTH,
+RTACTH,
+RTDCDB,
+RTACDB,
+RTCOUNT,
+LCROFFHK,
+LCRONHK,
+LCRMASK,
+LCRMASK_POLREV,
+LCRMASK_STATE,
+LCRMASK_LINECAP,
+LONGHITH,
+LONGLOTH,
+IRING_LIM,
+AC_PU_DELTA1,
+AC_PU_DELTA2,
+DIAG_LPF_8K,
+DIAG_LPF_128K,
+DIAG_INV_N,
+DIAG_GAIN,
+DIAG_G_CAL,
+DIAG_OS_CAL,
+SPR_GAIN_TRIM,
+MADC_VBAT_HYST,
+AC_DAC_GAIN,
+STDBY_THRLO,
+STDBY_THRHI,
+AC_DAC_GAIN0,
+EZSYNTH_B0,
+UNUSED876,
+UNUSED877,
+UNUSED878,
+UNUSED879,
+AC_ADC_GAIN,
+ILOOP1LPF,
+RING_FLUSH_TIMER,
+ALAW_BIAS,
+MADC_VTRC_SCALE,
+MADC_VBAT_SCALE0,
+MADC_VBAT_SCALE1,
+MADC_VLONG_SCALE,
+MADC_VLONG_SCALE_RING,
+UNUSED889,
+MADC_VDC_SCALE,
+MADC_ILONG_SCALE,
+MADC_ITR_SCALE,
+UNUSED893,
+VDIFF_SENSE_SCALE,
+VDIFF_SENSE_SCALE_RING,
+VOV_RING_GND,
+DIAG_GAIN_DC,
+CAL_LB_OSC1_FREQ,
+CAL_DCDAC_9TAU,
+CAL_MADC_9TAU,
+ADAP_RING_MIN_I,
+SWEEP_STEP,
+SWEEP_STEP_SAVE,
+SWEEP_REF,
+AMP_STEP,
+RXACGAIN_SAVE,
+AMP_RAMP_INIT,
+DIAG_HPF_GAIN,
+DIAG_HPF_8K,
+DIAG_ADJ_STEP,
+CAL_LKG_CODE_OS_COMP,
+UNUSED912,
+MADC_SCALE_INV,
+UNUSED914,
+PWRSAVE_TIMER,
+OFFHOOK_THRESH,
+SPEEDUP_MASK_TIMER,
+UNUSED918,
+DCDC_VREF_MIN,
+DCDC_VREF_MIN_RNG,
+DCDC_FSW_NORM,
+DCDC_FSW_NORM_LO,
+DCDC_FSW_RING,
+DCDC_FSW_RING_LO,
+DCDC_DIN_LIM,
+DCDC_VOUT_LIM,
+DC_HOLD_DAC_OS,
+DAA_DTMF_IN_SCALE,
+NOTCH_B0,
+NOTCH_B1,
+NOTCH_B2,
+NOTCH_A1,
+NOTCH_A2,
+METER_LPF_B0,
+METER_LPF_B1,
+METER_LPF_B2,
+METER_LPF_A1,
+METER_LPF_A2,
+METER_SIG_0,
+METER_SIG_1,
+METER_SIG_2,
+METER_SIG_3,
+METER_SIG_4,
+METER_SIG_5,
+METER_SIG_6,
+METER_SIG_7,
+METER_SIG_8,
+METER_SIG_9,
+METER_SIG_10,
+METER_SIG_11,
+METER_SIG_12,
+METER_SIG_13,
+METER_SIG_14,
+METER_SIG_15,
+METER_BP_B0,
+METER_BP_B1,
+METER_BP_B2,
+METER_BP_A1,
+METER_BP_A2,
+PM_AMP_THRESH,
+PM_GAIN,
+PWRSAVE_DBI,
+DCDC_ANA_SCALE,
+VOV_BAT_PWRSAVE_LO,
+VOV_BAT_PWRSAVE_HI,
+AC_ADC_GAIN0,
+SCALE_KAUDIO,
+UNUSED968,
+UNUSED969,
+UNUSED970,
+UNUSED971,
+UNUSED972,
+UNUSED973,
+UNUSED974,
+UNUSED975,
+UNUSED976,
+UNUSED977,
+UNUSED978,
+UNUSED979,
+UNUSED980,
+UNUSED981,
+UNUSED982,
+UNUSED983,
+UNUSED984,
+UNUSED985,
+UNUSED986,
+UNUSED987,
+UNUSED988,
+UNUSED989,
+UNUSED990,
+UNUSED991,
+UNUSED992,
+UNUSED993,
+UNUSED994,
+UNUSED995,
+UNUSED996,
+UNUSED997,
+UNUSED998,
+UNUSED999,
+UNUSED1000,
+UNUSED1001,
+UNUSED1002,
+UNUSED1003,
+UNUSED1004,
+UNUSED1005,
+UNUSED1006,
+UNUSED1007,
+UNUSED1008,
+UNUSED1009,
+UNUSED1010,
+UNUSED1011,
+UNUSED1012,
+UNUSED1013,
+UNUSED1014,
+UNUSED1015,
+UNUSED1016,
+UNUSED1017,
+UNUSED1018,
+UNUSED1019,
+UNUSED1020,
+UNUSED1021,
+UNUSED1022,
+UNUSED1023
+};
+
+/*
+** Patch Support RAM Redefinitions
+*/
+#define PSR_THREM_CNT UNUSED502
+#define PSR_FLUSH_FLAG UNUSED1005
+#define PSR_LBCAL_INIT_GUESS UNUSED1006
+#define PSR_LBCAL_Y3 UNUSED1007
+#define PSR_LBCAL_LINEAR_OS UNUSED1008
+#define PSR_LBCAL_Y1 UNUSED1009
+#define PSR_LBCAL_Y2 UNUSED1010
+#define PSR_RINGOFF_DBI UNUSED1011
+#define PSR_DCDC_OVTHRESH_NEW UNUSED1012
+#define PSR_DCDC_OVTHRESH_SAVE UNUSED1013
+#define PSR_LPR_BIT UNUSED1014
+#define PSR_VOV_RING_BAT_MAX UNUSED1015
+#define PSR_VDIFF_SENSE_DELAY UNUSED1016
+#define PSR_VOV_DCDC_OS UNUSED1017
+#define PSR_SLOPE_VOV_DCDC UNUSED1018
+#define PSR_VOV_RING_BAT_DCDC UNUSED1019
+#define PSR_VOV_RING_BAT_SI UNUSED1020
+#define PSR_LPR_CM_OS UNUSED1021
+#define PSR_LPR_SIG UNUSED1022
+#define PSR_LPR_SCALE UNUSED1023
+
+/*
+** This defines the neumomics for applicable SI3217X Memory-mapped register locations
+*/
+enum {
+ PD_BIAS = 1413,
+ PD_VBAT_SNS = 1418,
+ MADC_LOOP_MAN = 1445,
+ HVIC_CNTL_MAN = 1451,
+ CAL_TRNRD_DACT = 1458,
+ CAL_TRNRD_DACR,
+ CMDAC_FWD = 1476,
+ CMDAC_REV,
+ RDC_SUM = 1499,
+ DCDC_DCFF_ENABLE = 1522,
+ LKG_STBY_OFFSET = 1537,
+ PD_DCDC = 1538,
+ DCDC_UVHYST = 1545,
+ DCDC_UVTHRESH,
+ DCDC_OVTHRESH = 1547,
+ DCDC_OITHRESH,
+ UNUSED1549,
+ DCDC_CCM_THRESH,
+ DCDC_STATUS,
+ DCDC_FSW,
+ DCDC_SWDRV_POL,
+ DCDC_UVPOL,
+ DCDC_SWFET,
+ UNUSED1556,
+ UNUSED1557,
+ DCDC_VREF_CTRL,
+ UNUSED1559,
+ DCDC_RNGTYPE,
+ PD_REF_OSC = 1571,
+ DCDC_ANA_GAIN = 1585,
+ DCDC_ANA_TOFF,
+ DCDC_ANA_TONMIN,
+ DCDC_ANA_TONMAX,
+ DCDC_ANA_DSHIFT,
+ DCDC_ANA_LPOLY
+};
+
+#endif
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revb_intf.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revb_intf.h
new file mode 100644
index 0000000..de3261f
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revb_intf.h
@@ -0,0 +1,87 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_revb_intf.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Si3217x RevB ProSLIC interface header file
+**
+** Author(s):
+** cdp
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the Si3217x Rev B chip set.
+**
+**
+*/
+
+#ifndef SI3217X_REVB_INTF_H
+#define SI3217X_REVB_INTF_H
+
+
+/*
+** Function: Si3217x_RevB_GenParamUpdate
+**
+** Description:
+** Update Si3217x general parameters and other required modifications
+** to default reg/ram values
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_RevB_GenParamUpdate(proslicChanType_ptr hProslic,initSeqType seq);
+
+
+/*
+** Function: Si3217x_RevB_SelectPatch
+**
+** Description:
+** Select appropriate patch based on general parameters
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_RevB_SelectPatch(proslicChanType_ptr hProslic,
+ const proslicPatch **patch);
+
+
+/*
+** Function: Si3217x_RevB_ConverterSetup
+**
+** Description:
+** Program revision specific settings before powering converter
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_RevB_ConverterSetup(proslicChanType_ptr hProslic);
+
+
+/*
+** Function: Si3217x_RevB_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+int Si3217x_RevB_PulseMeterSetup (proslicChanType_ptr hProslic, int preset);
+
+/*
+** Function: Si3217x_RevB_PulseMeterStop
+**
+** Description:
+** stop pulse meter tone
+*/
+
+int Si3217x_RevBPulseMeterStop (proslicChanType_ptr hProslic);
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revb_registers.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revb_registers.h
new file mode 100644
index 0000000..7695f2a
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revb_registers.h
@@ -0,0 +1,206 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_revb_registers.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**/
+
+#ifndef SI3217X_REVB_REGS_H
+#define SI3217X_REVB_REGS_H
+
+/*
+** SI3217X RevB Unique SPI Registers
+*/
+enum SI3217X_REVB_REG
+{
+ SI3217X_REVB_REG_DAA_CNTL = 74,
+};
+
+/*
+** SI3217X_REVB_RAM
+*/
+enum SI3217X_REVB_RAM
+{
+ SI3217X_REVB_RAM_P_Q2_D = 15,
+ SI3217X_REVB_RAM_P_Q3_D = 16,
+ SI3217X_REVB_RAM_P_Q4_D = 17,
+ SI3217X_REVB_RAM_P_Q5_D = 18,
+ SI3217X_REVB_RAM_P_Q6_D = 19,
+ SI3217X_REVB_RAM_METER_LPF_OUT_1 = 328,
+ SI3217X_REVB_RAM_PMDIFF_D1 = 333,
+ SI3217X_REVB_RAM_PMDIFF_D2 = 334,
+ SI3217X_REVB_RAM_CAL_LKG_DWN_C0 = 385,
+ SI3217X_REVB_RAM_CAL_LKG_DWN_V0 = 386,
+ SI3217X_REVB_RAM_CAL_LKG_DWN_CN = 387,
+ SI3217X_REVB_RAM_CAL_LKG_DWN_VN = 388,
+ SI3217X_REVB_RAM_CAL_LKG_DWN_VLSB = 389,
+ SI3217X_REVB_RAM_CAL_LKG_DWN_ILSB = 390,
+ SI3217X_REVB_RAM_CAL_LKG_DWN_DACCODE = 391,
+ SI3217X_REVB_RAM_CAL_LKG_DWN_ICALC = 392,
+ SI3217X_REVB_RAM_MADC_VBAT_LAST = 416,
+ SI3217X_REVB_RAM_CALTMP_ILOOPX1 = 443,
+ SI3217X_REVB_RAM_DIAG_V_TAR = 459,
+ SI3217X_REVB_RAM_MADC_ISNS_DIAG_STBY_OS = 487,
+ SI3217X_REVB_RAM_MADC_ISNS_DIAG_OS = 488,
+ SI3217X_REVB_RAM_DCDC_FSW_VTHLO = 489,
+ SI3217X_REVB_RAM_DCDC_FSW_VHYST = 490,
+ SI3217X_REVB_RAM_DCDC_FSW_STATE = 491,
+ SI3217X_REVB_RAM_UNUSED501 = 501,
+ SI3217X_REVB_RAM_UNUSED502 = 502,
+ SI3217X_REVB_RAM_CAL_TEMP11 = 503,
+ SI3217X_REVB_RAM_UNUSED504 = 504,
+ SI3217X_REVB_RAM_UNUSED505 = 505,
+ SI3217X_REVB_RAM_UNUSED506 = 506,
+ SI3217X_REVB_RAM_UNUSED507 = 507,
+ SI3217X_REVB_RAM_UNUSED508 = 508,
+ SI3217X_REVB_RAM_UNUSED509 = 509,
+ SI3217X_REVB_RAM_UNUSED510 = 510,
+ SI3217X_REVB_RAM_P_TH_Q1256 = 757,
+ SI3217X_REVB_RAM_P_TH_Q34 = 758,
+ SI3217X_REVB_RAM_COEF_Q1256 = 760,
+ SI3217X_REVB_RAM_COEF_Q34 = 761,
+ SI3217X_REVB_RAM_R_OFFLOAD = 762,
+ SI3217X_REVB_RAM_R_63 = 763,
+ SI3217X_REVB_RAM_MADC_ISNS_STDBY_OS = 778,
+ SI3217X_REVB_RAM_MADC_ISNS_OS = 779,
+ SI3217X_REVB_RAM_CAL_LKG_TSETTLE = 792,
+ SI3217X_REVB_RAM_CAL_LKG_IREF100 = 793,
+ SI3217X_REVB_RAM_CAL_LKG_LIM100UA = 794,
+ SI3217X_REVB_RAM_CAL_LKG_VREF25 = 795,
+ SI3217X_REVB_RAM_CAL_LKG_VLSB_0_INV = 796,
+ SI3217X_REVB_RAM_CAL_LKG_RDCSNS_EFF = 797,
+ SI3217X_REVB_RAM_CAL_LKG_RDCOFF_EFF = 798,
+ SI3217X_REVB_RAM_CAL_LKG_CODE_OS = 799,
+ SI3217X_REVB_RAM_CAL_LKG_VMAX_THR = 800,
+ SI3217X_REVB_RAM_MADC_VBAT_HYST = 870,
+ SI3217X_REVB_RAM_STDBY_THRLO = 872,
+ SI3217X_REVB_RAM_STDBY_THRHI = 873,
+ SI3217X_REVB_RAM_MADC_VBAT_SCALE0 = 885,
+ SI3217X_REVB_RAM_MADC_VBAT_SCALE1 = 886,
+ SI3217X_REVB_RAM_MADC_ITR_SCALE = 892,
+ SI3217X_REVB_RAM_CAL_LKG_CODE_OS_COMP = 911,
+ SI3217X_REVB_RAM_DCDC_FSW_NORM = 921,
+ SI3217X_REVB_RAM_DCDC_FSW_NORM_LO = 922,
+ SI3217X_REVB_RAM_DCDC_FSW_RINGING = 923,
+ SI3217X_REVB_RAM_DCDC_FSW_RINGING_LO = 924,
+ SI3217X_REVB_RAM_DCDC_DIN_LIM = 925,
+ SI3217X_REVB_RAM_DCDC_VOUT_LIM = 926,
+ SI3217X_REVB_RAM_DAA_DTMF_IN_SCALE = 928,
+ SI3217X_REVB_RAM_PM_GAIN = 961,
+ SI3217X_REVB_RAM_UNUSED968 = 968,
+ SI3217X_REVB_RAM_UNUSED969 = 969,
+ SI3217X_REVB_RAM_UNUSED970 = 970,
+ SI3217X_REVB_RAM_UNUSED971 = 971,
+ SI3217X_REVB_RAM_UNUSED972 = 972,
+ SI3217X_REVB_RAM_UNUSED973 = 973,
+ SI3217X_REVB_RAM_UNUSED974 = 974,
+ SI3217X_REVB_RAM_UNUSED975 = 975,
+ SI3217X_REVB_RAM_UNUSED976 = 976,
+ SI3217X_REVB_RAM_UNUSED977 = 977,
+ SI3217X_REVB_RAM_UNUSED978 = 978,
+ SI3217X_REVB_RAM_UNUSED979 = 979,
+ SI3217X_REVB_RAM_UNUSED980 = 980,
+ SI3217X_REVB_RAM_UNUSED981 = 981,
+ SI3217X_REVB_RAM_UNUSED982 = 982,
+ SI3217X_REVB_RAM_UNUSED983 = 983,
+ SI3217X_REVB_RAM_UNUSED984 = 984,
+ SI3217X_REVB_RAM_UNUSED985 = 985,
+ SI3217X_REVB_RAM_UNUSED986 = 986,
+ SI3217X_REVB_RAM_UNUSED987 = 987,
+ SI3217X_REVB_RAM_UNUSED988 = 988,
+ SI3217X_REVB_RAM_UNUSED989 = 989,
+ SI3217X_REVB_RAM_UNUSED990 = 990,
+ SI3217X_REVB_RAM_UNUSED991 = 991,
+ SI3217X_REVB_RAM_UNUSED992 = 992,
+ SI3217X_REVB_RAM_UNUSED993 = 993,
+ SI3217X_REVB_RAM_UNUSED994 = 994,
+ SI3217X_REVB_RAM_UNUSED995 = 995,
+ SI3217X_REVB_RAM_UNUSED996 = 996,
+ SI3217X_REVB_RAM_UNUSED997 = 997,
+ SI3217X_REVB_RAM_UNUSED998 = 998,
+ SI3217X_REVB_RAM_UNUSED999 = 999,
+ SI3217X_REVB_RAM_UNUSED1000 = 1000,
+ SI3217X_REVB_RAM_UNUSED1001 = 1001,
+ SI3217X_REVB_RAM_UNUSED1002 = 1002,
+ SI3217X_REVB_RAM_UNUSED1003 = 1003,
+ SI3217X_REVB_RAM_UNUSED1004 = 1004,
+ SI3217X_REVB_RAM_UNUSED1005 = 1005,
+ SI3217X_REVB_RAM_UNUSED1006 = 1006,
+ SI3217X_REVB_RAM_UNUSED1007 = 1007,
+ SI3217X_REVB_RAM_UNUSED1008 = 1008,
+ SI3217X_REVB_RAM_UNUSED1009 = 1009,
+ SI3217X_REVB_RAM_UNUSED1014 = 1014,
+ SI3217X_REVB_RAM_UNUSED1015 = 1015,
+ SI3217X_REVB_RAM_UNUSED1017 = 1017,
+ SI3217X_REVB_RAM_UNUSED1018 = 1018,
+ SI3217X_REVB_RAM_UNUSED1019 = 1019,
+ SI3217X_REVB_RAM_UNUSED1020 = 1020,
+ SI3217X_REVB_RAM_UNUSED1021 = 1021,
+ SI3217X_REVB_RAM_DAC_OFFSET = 1280,
+ SI3217X_REVB_RAM_ADC_CAL = 1306,
+ SI3217X_REVB_RAM_VOC_DAC = 1311,
+ SI3217X_REVB_RAM_CHAN_ZERO = 1316,
+ SI3217X_REVB_RAM_CHAN_TOG = 1317,
+ SI3217X_REVB_RAM_CHAN_POP = 1318,
+ SI3217X_REVB_RAM_BIAS = 1321,
+ SI3217X_REVB_RAM_SLIC_DIAG_CLR = 1353,
+ SI3217X_REVB_RAM_METER_LPF_OUT = 1366,
+ SI3217X_REVB_RAM_METER_PK = 1367,
+ SI3217X_REVB_RAM_METER_FREQ = 1368,
+ SI3217X_REVB_RAM_MADC_ITIP_RAW = 1404,
+ SI3217X_REVB_RAM_MADC_IRING_RAW = 1405,
+ SI3217X_REVB_RAM_MADC_BATSCALE_SCHED = 1408,
+ SI3217X_REVB_RAM_CAL_HVIC_CNTL = 1409,
+ SI3217X_REVB_RAM_PD_PM_RAMP = 1425,
+ SI3217X_REVB_RAM_PD_PM_SINE = 1426,
+ SI3217X_REVB_RAM_PD_DISCROPA = 1429,
+ SI3217X_REVB_RAM_PM_DAC_CHEN_B = 1431,
+ SI3217X_REVB_RAM_PM_CHEN_B = 1435,
+ SI3217X_REVB_RAM_PM_GAIN_EN_B = 1440,
+ SI3217X_REVB_RAM_MADC_LOOP_MAN = 1445,
+ SI3217X_REVB_RAM_HVIC_CNTL_MAN = 1451,
+ SI3217X_REVB_RAM_CAL_DCADC_CNTL = 1455,
+ SI3217X_REVB_RAM_LKG_UPT_STBY = 1464,
+ SI3217X_REVB_RAM_LKG_UPR_STBY = 1465,
+ SI3217X_REVB_RAM_LKG_DNT_STBY = 1466,
+ SI3217X_REVB_RAM_LKG_DNR_STBY = 1467,
+ SI3217X_REVB_RAM_CAL_GPIO0_CTRL = 1470,
+ SI3217X_REVB_RAM_VBAT_DAC = 1484,
+ SI3217X_REVB_RAM_STDBY_SET = 1494,
+ SI3217X_REVB_RAM_STDBY_CLR = 1495,
+ SI3217X_REVB_RAM_CAL_HVIC_TR = 1498,
+ SI3217X_REVB_RAM_PM_SINE_MAN = 1500,
+ SI3217X_REVB_RAM_PM_SINE_VAL = 1501,
+ SI3217X_REVB_RAM_PM_RAMP_MAN = 1502,
+ SI3217X_REVB_RAM_PM_RAMP_VAL = 1503,
+ SI3217X_REVB_RAM_PM_GAIN_MAN = 1504,
+ SI3217X_REVB_RAM_PM_GAIN_VAL = 1505,
+ SI3217X_REVB_RAM_BATSEL_MAN = 1519,
+ SI3217X_REVB_RAM_HVIC_MAN = 1520,
+ SI3217X_REVB_RAM_PD_ISNS = 1521,
+ SI3217X_REVB_RAM_DISCR_FORCE = 1526,
+ SI3217X_REVB_RAM_CAP_LB_ON = 1529,
+ SI3217X_REVB_RAM_LKG_STBY_OFFSET = 1537,
+ SI3217X_REVB_RAM_PD_CCMDET = 1544,
+ SI3217X_REVB_RAM_DCDC_SWTHRESH = 1549,
+ SI3217X_REVB_RAM_DCDC_CCMTHRESH = 1550,
+ SI3217X_REVB_RAM_DCDC_FSW = 1552,
+ SI3217X_REVB_RAM_DCDC_SWFET = 1555,
+ SI3217X_REVB_RAM_DCDC_VREF = 1556,
+ SI3217X_REVB_RAM_DCDC_TESTMODE = 1559,
+ SI3217X_REVB_RAM_DCDC_CCMDET_FILT = 1562,
+ SI3217X_REVB_RAM_DCDC_DIN_MAN = 1566,
+ SI3217X_REVB_RAM_DCDC_DIN_VAL = 1567,
+ SI3217X_REVB_RAM_PD_BJTDRV = 1572,
+ SI3217X_REVB_RAM_PD_DCDC_DIG = 1593,
+ SI3217X_REVB_RAM_PD_OCLO_IDAC = 1594,
+};
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revc_intf.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revc_intf.h
new file mode 100644
index 0000000..df15df3
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revc_intf.h
@@ -0,0 +1,79 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_revc_intf.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Si3217x RevC ProSLIC interface header file
+**
+** Author(s):
+** cdp
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the Si3217x Rev C chip set.
+**
+**
+*/
+
+#ifndef SI3217X_REVC_INTF_H
+#define SI3217X_REVC_INTF_H
+
+
+/*
+** Function: Si3217x_RevC_GenParamUpdate
+**
+** Description:
+** Update Si3217x general parameters and other required modifications
+** to default reg/ram values
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_RevC_GenParamUpdate(proslicChanType_ptr hProslic,initSeqType seq);
+
+
+/*
+** Function: Si3217x_RevC_SelectPatch
+**
+** Description:
+** Select appropriate patch based on general parameters
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_RevC_SelectPatch(proslicChanType_ptr hProslic,
+ const proslicPatch **patch);
+
+/*
+** Function: Si3217x_RevC_ConverterSetup
+**
+** Description:
+** Program revision specific settings before powering converter
+**
+** Specifically, from general parameters and knowledge that this
+** is Rev C, setup dcff drive, gate drive polarity, and charge pump.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_RevC_ConverterSetup(proslicChanType_ptr pProslic);
+
+/*
+** Function: Si3217x_RevC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+int Si3217x_RevC_PulseMeterSetup (proslicChanType_ptr hProslic, int preset);
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revc_registers.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revc_registers.h
new file mode 100644
index 0000000..8f289d5
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3217x_revc_registers.h
@@ -0,0 +1,244 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_revc_registers.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**/
+
+#ifndef SI3217X_REVC_REGS_H
+#define SI3217X_REVC_REGS_H
+
+/*
+** SI3217X RevC Unique SPI Registers
+*/
+enum SI3217X_REVC_REG
+{
+ SI3217X_REVC_REG_DIAG3 = 74,
+ SI3217X_REVC_REG_PCLK_FAULT_CNTL = 76,
+};
+
+/*
+** SI3217X_REVC_RAM
+*/
+enum SI3217X_REVC_RAM
+{
+ SI3217X_REVC_RAM_INIT_GUESS = 15,
+ SI3217X_REVC_RAM_Y1 = 16,
+ SI3217X_REVC_RAM_Y2 = 17,
+ SI3217X_REVC_RAM_Y3 = 18,
+ SI3217X_REVC_RAM_UNUSED19 = 19,
+ SI3217X_REVC_RAM_METER_LPF_OUT = 328,
+ SI3217X_REVC_RAM_UNUSED333 = 333,
+ SI3217X_REVC_RAM_UNUSED334 = 334,
+ SI3217X_REVC_RAM_I_SOURCE1 = 385,
+ SI3217X_REVC_RAM_I_SOURCE2 = 386,
+ SI3217X_REVC_RAM_VTR1 = 387,
+ SI3217X_REVC_RAM_VTR2 = 388,
+ SI3217X_REVC_RAM_STOP_TIMER1 = 389,
+ SI3217X_REVC_RAM_STOP_TIMER2 = 390,
+ SI3217X_REVC_RAM_UNUSED391 = 391,
+ SI3217X_REVC_RAM_UNUSED392 = 392,
+ SI3217X_REVC_RAM_UNUSED416 = 416,
+ SI3217X_REVC_RAM_UNUSED443 = 443,
+ SI3217X_REVC_RAM_UNUSED459 = 459,
+ SI3217X_REVC_RAM_UNUSED487 = 487,
+ SI3217X_REVC_RAM_UNUSED488 = 488,
+ SI3217X_REVC_RAM_UNUSED489 = 489,
+ SI3217X_REVC_RAM_UNUSED490 = 490,
+ SI3217X_REVC_RAM_UNUSED491 = 491,
+ SI3217X_REVC_RAM_CAL_TEMP11 = 501,
+ SI3217X_REVC_RAM_METER_RAMP = 502,
+ SI3217X_REVC_RAM_METER_RAMP_DIR = 503,
+ SI3217X_REVC_RAM_METER_ON_T = 504,
+ SI3217X_REVC_RAM_METER_PK_DET = 505,
+ SI3217X_REVC_RAM_METER_PK_DET_T = 506,
+ SI3217X_REVC_RAM_THERM_CNT = 507,
+ SI3217X_REVC_RAM_VDIFF_SENSE_DELAY = 508,
+ SI3217X_REVC_RAM_RING_INTERP_DIFF_SYNC = 509,
+ SI3217X_REVC_RAM_CPUMP_DEB_CNT = 510,
+ SI3217X_REVC_RAM_UNUSED757 = 757,
+ SI3217X_REVC_RAM_UNUSED758 = 758,
+ SI3217X_REVC_RAM_UNUSED760 = 760,
+ SI3217X_REVC_RAM_UNUSED761 = 761,
+ SI3217X_REVC_RAM_UNUSED762 = 762,
+ SI3217X_REVC_RAM_UNUSED763 = 763,
+ SI3217X_REVC_RAM_UNUSED778 = 778,
+ SI3217X_REVC_RAM_UNUSED779 = 779,
+ SI3217X_REVC_RAM_UNUSED792 = 792,
+ SI3217X_REVC_RAM_UNUSED793 = 793,
+ SI3217X_REVC_RAM_UNUSED794 = 794,
+ SI3217X_REVC_RAM_UNUSED795 = 795,
+ SI3217X_REVC_RAM_UNUSED796 = 796,
+ SI3217X_REVC_RAM_UNUSED797 = 797,
+ SI3217X_REVC_RAM_UNUSED798 = 798,
+ SI3217X_REVC_RAM_UNUSED799 = 799,
+ SI3217X_REVC_RAM_UNUSED800 = 800,
+ SI3217X_REVC_RAM_UNUSED870 = 870,
+ SI3217X_REVC_RAM_UNUSED872 = 872,
+ SI3217X_REVC_RAM_UNUSED873 = 873,
+ SI3217X_REVC_RAM_UNUSED885 = 885,
+ SI3217X_REVC_RAM_MADC_VBAT_SCALE = 886,
+ SI3217X_REVC_RAM_UNUSED892 = 892,
+ SI3217X_REVC_RAM_UNUSED911 = 911,
+ SI3217X_REVC_RAM_UNUSED921 = 921,
+ SI3217X_REVC_RAM_UNUSED922 = 922,
+ SI3217X_REVC_RAM_UNUSED923 = 923,
+ SI3217X_REVC_RAM_UNUSED924 = 924,
+ SI3217X_REVC_RAM_UNUSED925 = 925,
+ SI3217X_REVC_RAM_UNUSED926 = 926,
+ SI3217X_REVC_RAM_UNUSED928 = 928,
+ SI3217X_REVC_RAM_METER_GAIN = 961,
+ SI3217X_REVC_RAM_METER_GAIN_TEMP = 968,
+ SI3217X_REVC_RAM_METER_RAMP_STEP = 969,
+ SI3217X_REVC_RAM_THERM_DBI = 970,
+ SI3217X_REVC_RAM_LPR_SCALE = 971,
+ SI3217X_REVC_RAM_LPR_CM_OS = 972,
+ SI3217X_REVC_RAM_VOV_DCDC_SLOPE = 973,
+ SI3217X_REVC_RAM_VOV_DCDC_OS = 974,
+ SI3217X_REVC_RAM_VOV_RING_BAT_MAX = 975,
+ SI3217X_REVC_RAM_SLOPE_VLIM1 = 976,
+ SI3217X_REVC_RAM_SLOPE_RFEED1 = 977,
+ SI3217X_REVC_RAM_SLOPE_ILIM1 = 978,
+ SI3217X_REVC_RAM_V_VLIM1 = 979,
+ SI3217X_REVC_RAM_V_RFEED1 = 980,
+ SI3217X_REVC_RAM_V_ILIM1 = 981,
+ SI3217X_REVC_RAM_CONST_RFEED1 = 982,
+ SI3217X_REVC_RAM_CONST_ILIM1 = 983,
+ SI3217X_REVC_RAM_I_VLIM1 = 984,
+ SI3217X_REVC_RAM_SLOPE_VLIM2 = 985,
+ SI3217X_REVC_RAM_SLOPE_RFEED2 = 986,
+ SI3217X_REVC_RAM_SLOPE_ILIM2 = 987,
+ SI3217X_REVC_RAM_V_VLIM2 = 988,
+ SI3217X_REVC_RAM_V_RFEED2 = 989,
+ SI3217X_REVC_RAM_V_ILIM2 = 990,
+ SI3217X_REVC_RAM_CONST_RFEED2 = 991,
+ SI3217X_REVC_RAM_CONST_ILIM2 = 992,
+ SI3217X_REVC_RAM_I_VLIM2 = 993,
+ SI3217X_REVC_RAM_DIAG_V_TAR = 994,
+ SI3217X_REVC_RAM_DIAG_V_TAR2 = 995,
+ SI3217X_REVC_RAM_STOP_TIMER1_VAL = 996,
+ SI3217X_REVC_RAM_STOP_TIMER2_VAL = 997,
+ SI3217X_REVC_RAM_DIAG_VCM1_TAR = 998,
+ SI3217X_REVC_RAM_DIAG_VCM_STEP = 999,
+ SI3217X_REVC_RAM_LKG_DNT_HIRES = 1000,
+ SI3217X_REVC_RAM_LKG_DNR_HIRES = 1001,
+ SI3217X_REVC_RAM_LINEAR_OS = 1002,
+ SI3217X_REVC_RAM_CPUMP_DEB = 1003,
+ SI3217X_REVC_RAM_DCDC_VERR = 1004,
+ SI3217X_REVC_RAM_DCDC_VERR_HYST = 1005,
+ SI3217X_REVC_RAM_DCDC_OITHRESH_LO = 1006,
+ SI3217X_REVC_RAM_DCDC_OITHRESH_HI = 1007,
+ SI3217X_REVC_RAM_HV_BIAS_ONHK = 1008,
+ SI3217X_REVC_RAM_HV_BIAS_OFFHK = 1009,
+ SI3217X_REVC_RAM_ILONG_RT_THRESH = 1014,
+ SI3217X_REVC_RAM_VOV_RING_BAT_DCDC = 1015,
+ SI3217X_REVC_RAM_LKG_LB_OFFSET = 1017,
+ SI3217X_REVC_RAM_LKG_OFHK_OFFSET = 1018,
+ SI3217X_REVC_RAM_SWEEP_FREQ_TH = 1019,
+ SI3217X_REVC_RAM_AMP_MOD_G = 1020,
+ SI3217X_REVC_RAM_AMP_MOD_OS = 1021,
+ SI3217X_REVC_RAM_UNUSED_REG256 = 1280,
+ SI3217X_REVC_RAM_UNUSED_REG282 = 1306,
+ SI3217X_REVC_RAM_UNUSED_REG287 = 1311,
+ SI3217X_REVC_RAM_UNUSED_REG292 = 1316,
+ SI3217X_REVC_RAM_UNUSED_REG293 = 1317,
+ SI3217X_REVC_RAM_UNUSED_REG294 = 1318,
+ SI3217X_REVC_RAM_UNUSED_REG297 = 1321,
+ SI3217X_REVC_RAM_UNUSED_REG329 = 1353,
+ SI3217X_REVC_RAM_UNUSED_REG342 = 1366,
+ SI3217X_REVC_RAM_UNUSED_REG343 = 1367,
+ SI3217X_REVC_RAM_UNUSED_REG344 = 1368,
+ SI3217X_REVC_RAM_UNUSED_REG380 = 1404,
+ SI3217X_REVC_RAM_UNUSED_REG381 = 1405,
+ SI3217X_REVC_RAM_UNUSED_REG384 = 1408,
+ SI3217X_REVC_RAM_UNUSED_REG385 = 1409,
+ SI3217X_REVC_RAM_UNUSED_REG401 = 1425,
+ SI3217X_REVC_RAM_UNUSED_REG402 = 1426,
+ SI3217X_REVC_RAM_UNUSED_REG405 = 1429,
+ SI3217X_REVC_RAM_UNUSED_REG407 = 1431,
+ SI3217X_REVC_RAM_UNUSED_REG411 = 1435,
+ SI3217X_REVC_RAM_UNUSED_REG416 = 1440,
+ SI3217X_REVC_RAM_UNUSED_REG421 = 1445,
+ SI3217X_REVC_RAM_UNUSED_REG427 = 1451,
+ SI3217X_REVC_RAM_UNUSED_REG431 = 1455,
+ SI3217X_REVC_RAM_LKG_UPT_OHT = 1464,
+ SI3217X_REVC_RAM_LKG_UPR_OHT = 1465,
+ SI3217X_REVC_RAM_LKG_DNT_OHT = 1466,
+ SI3217X_REVC_RAM_LKG_DNR_OHT = 1467,
+ SI3217X_REVC_RAM_UNUSED_REG446 = 1470,
+ SI3217X_REVC_RAM_UNUSED_REG460 = 1484,
+ SI3217X_REVC_RAM_UNUSED_REG470 = 1494,
+ SI3217X_REVC_RAM_UNUSED_REG471 = 1495,
+ SI3217X_REVC_RAM_UNUSED_REG474 = 1498,
+ SI3217X_REVC_RAM_UNUSED_REG476 = 1500,
+ SI3217X_REVC_RAM_UNUSED_REG477 = 1501,
+ SI3217X_REVC_RAM_UNUSED_REG478 = 1502,
+ SI3217X_REVC_RAM_UNUSED_REG479 = 1503,
+ SI3217X_REVC_RAM_UNUSED_REG480 = 1504,
+ SI3217X_REVC_RAM_UNUSED_REG481 = 1505,
+ SI3217X_REVC_RAM_UNUSED_REG495 = 1519,
+ SI3217X_REVC_RAM_UNUSED_REG496 = 1520,
+ SI3217X_REVC_RAM_UNUSED_REG497 = 1521,
+ SI3217X_REVC_RAM_UNUSED_REG502 = 1526,
+ SI3217X_REVC_RAM_UNUSED_REG505 = 1529,
+ SI3217X_REVC_RAM_UNUSED_REG513 = 1537,
+ SI3217X_REVC_RAM_UNUSED_REG520 = 1544,
+ SI3217X_REVC_RAM_UNUSED_REG525 = 1549,
+ SI3217X_REVC_RAM_UNUSED_REG526 = 1550,
+ SI3217X_REVC_RAM_UNUSED_REG528 = 1552,
+ SI3217X_REVC_RAM_UNUSED_REG529 = 1553,
+ SI3217X_REVC_RAM_DCDC_CPUMP = 1555,
+ SI3217X_REVC_RAM_UNUSED_REG532 = 1556,
+ SI3217X_REVC_RAM_UNUSED_REG535 = 1559,
+ SI3217X_REVC_RAM_UNUSED_REG538 = 1562,
+ SI3217X_REVC_RAM_UNUSED_REG542 = 1566,
+ SI3217X_REVC_RAM_UNUSED_REG543 = 1567,
+ SI3217X_REVC_RAM_UNUSED_REG548 = 1572,
+ SI3217X_REVC_RAM_UNUSED_REG569 = 1593,
+ SI3217X_REVC_RAM_UNUSED_REG570 = 1594,
+ SI3217X_REVC_RAM_JMP8 = 1597,
+ SI3217X_REVC_RAM_JMP9 = 1598,
+ SI3217X_REVC_RAM_JMP10 = 1599,
+ SI3217X_REVC_RAM_JMP11 = 1600,
+ SI3217X_REVC_RAM_JMP12 = 1601,
+ SI3217X_REVC_RAM_JMP13 = 1602,
+ SI3217X_REVC_RAM_JMP14 = 1603,
+ SI3217X_REVC_RAM_JMP15 = 1604,
+ SI3217X_REVC_RAM_METER_TRIG = 1605,
+ SI3217X_REVC_RAM_PM_ACTIVE = 1606,
+ SI3217X_REVC_RAM_PM_INACTIVE = 1607,
+ SI3217X_REVC_RAM_HVIC_VERSION = 1608,
+ SI3217X_REVC_RAM_THERM_OFF = 1609,
+ SI3217X_REVC_RAM_THERM_HI = 1610,
+ SI3217X_REVC_RAM_TEST_LOAD = 1611,
+ SI3217X_REVC_RAM_DC_HOLD_MAN = 1612,
+ SI3217X_REVC_RAM_DC_HOLD_DAC_MAN = 1613,
+ SI3217X_REVC_RAM_UNUSED_REG590 = 1614,
+ SI3217X_REVC_RAM_DCDC_CPUMP_LP = 1615,
+ SI3217X_REVC_RAM_DCDC_CPUMP_LP_MASK = 1616,
+ SI3217X_REVC_RAM_DCDC_CPUMP_PULLDOWN = 1617,
+ SI3217X_REVC_RAM_BOND_STATUS = 1618,
+ SI3217X_REVC_RAM_BOND_MAN = 1619,
+ SI3217X_REVC_RAM_BOND_VAL = 1620,
+ SI3217X_REVC_RAM_REF_DEBOUNCE_PCLK = 1633,
+ SI3217X_REVC_RAM_REF_DEBOUNCE_FSYNC = 1634,
+ SI3217X_REVC_RAM_DCDC_LIFT_EN = 1635,
+ SI3217X_REVC_RAM_DCDC_CPUMP_PGOOD = 1636,
+ SI3217X_REVC_RAM_DCDC_CPUMP_PGOOD_WKEN = 1637,
+ SI3217X_REVC_RAM_DCDC_CPUMP_PGOOD_FRC = 1638,
+ SI3217X_REVC_RAM_DCDC_CPUMP_LP_MASK_SH = 1639,
+ SI3217X_REVC_RAM_DCDC_UV_MAN = 1640,
+ SI3217X_REVC_RAM_DCDC_UV_DEBOUNCE = 1641,
+ SI3217X_REVC_RAM_DCDC_OV_MAN = 1642,
+ SI3217X_REVC_RAM_DCDC_OV_DEBOUNCE = 1643,
+ SI3217X_REVC_RAM_ANALOG3_TEST_MUX = 1644,
+};
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x.h
new file mode 100644
index 0000000..e73f22e
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x.h
@@ -0,0 +1,309 @@
+/*
+** Copyright (c) 2015-2016 by Silicon Laboratories
+**
+** $Id: si3218x.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef SI3218XH_H
+#define SI3218XH_H
+
+#include "proslic.h"
+
+#define SI3218X_CHAN_PER_DEVICE 1
+
+
+/*
+** Calibration Constants
+*/
+
+#define SI3218X_CAL_STD_CALR1 0xC0
+#define SI3218X_CAL_STD_CALR2 0x18
+
+/* Timeouts in 10s of ms */
+#define SI3218X_TIMEOUT_DCDC_UP 200
+#define SI3218X_TIMEOUT_DCDC_DOWN 200
+
+
+/*
+** SI3218X DataTypes/Function Definitions
+*/
+
+
+typedef ProSLIC_DCfeed_Cfg Si3218x_DCfeed_Cfg;
+
+/*
+** Si3218x General Parameter Struct
+*/
+typedef struct
+{
+ /* Flags */
+ uInt8 device_key;
+ bomOptionsType bom_option;
+ vdcRangeType vdc_range;
+ autoZcalType zcal_en;
+ pmBomType pm_bom;
+ /* Raw Parameters */
+ ramData i_oithresh_lo;
+ ramData i_oithresh_hi;
+ ramData v_ovthresh;
+ ramData v_uvthresh;
+ ramData v_uvhyst;
+ /* RAM Updates */
+ ramData dcdc_fsw_vthlo;
+ ramData dcdc_fsw_vhyst;
+ ramData p_th_hvic;
+ ramData coef_p_hvic;
+ ramData bat_hyst;
+ ramData
+ vbath_expect; /* default - this is overwritten by dc feed preset */
+ ramData
+ vbatr_expect; /* default - this is overwritten by ring preset */
+ ramData pwrsave_timer;
+ ramData pwrsave_ofhk_thresh;
+ ramData vbat_track_min; /* Same as DCDC_VREF_MIN */
+ ramData vbat_track_min_rng; /* Same as DCDC_VREF_MIN_RNG */
+ ramData dcdc_ana_scale;
+ ramData therm_dbi;
+ ramData vov_dcdc_slope;
+ ramData vov_dcdc_os;
+ ramData vov_ring_bat_dcdc;
+ ramData vov_ring_bat_max;
+ ramData dcdc_verr;
+ ramData dcdc_verr_hyst;
+ ramData pd_uvlo;
+ ramData pd_ovlo;
+ ramData pd_oclo;
+ ramData pd_swdrv;
+ ramData dcdc_uvpol;
+ ramData dcdc_rngtype;
+ ramData dcdc_ana_toff;
+ ramData dcdc_ana_tonmin;
+ ramData dcdc_ana_tonmax;
+ uInt8 irqen1;
+ uInt8 irqen2;
+ uInt8 irqen3;
+ uInt8 irqen4;
+ uInt8 enhance;
+ uInt8 auto_reg;
+} Si3218x_General_Cfg;
+
+/*
+** Defines structure for configuring pcm
+*/
+typedef struct
+{
+ uInt8 pcmFormat;
+ uInt8 widebandEn;
+ uInt8 pcm_tri;
+ uInt8 tx_edge;
+ uInt8 alaw_inv;
+} Si3218x_PCM_Cfg;
+
+/*
+** Defines structure for configuring pulse metering
+*/
+typedef struct
+{
+ ramData pm_amp_thresh;
+ uInt8 pmFreq;
+ uInt8 pmAuto;
+ ramData pmActive;
+ ramData pmInactive;
+} Si3218x_PulseMeter_Cfg;
+/*
+** Defines structure for configuring FSK generation
+*/
+typedef ProSLIC_FSK_Cfg Si3218x_FSK_Cfg;
+
+
+/*
+** Defines structure for configuring impedance synthesis
+*/
+typedef struct
+{
+ ramData zsynth_b0;
+ ramData zsynth_b1;
+ ramData zsynth_b2;
+ ramData zsynth_a1;
+ ramData zsynth_a2;
+ uInt8 ra;
+} Si3218x_Zsynth_Cfg;
+
+/*
+** Defines structure for configuring hybrid
+*/
+typedef struct
+{
+ ramData ecfir_c2;
+ ramData ecfir_c3;
+ ramData ecfir_c4;
+ ramData ecfir_c5;
+ ramData ecfir_c6;
+ ramData ecfir_c7;
+ ramData ecfir_c8;
+ ramData ecfir_c9;
+ ramData ecfir_b0;
+ ramData ecfir_b1;
+ ramData ecfir_a1;
+ ramData ecfir_a2;
+} Si3218x_hybrid_Cfg;
+
+/*
+** Defines structure for configuring GCI CI bits
+*/
+typedef struct
+{
+ uInt8 gci_ci;
+} Si3218x_CI_Cfg;
+
+/*
+** Defines structure for configuring audio eq
+*/
+
+typedef struct
+{
+ ramData txaceq_c0;
+ ramData txaceq_c1;
+ ramData txaceq_c2;
+ ramData txaceq_c3;
+
+ ramData rxaceq_c0;
+ ramData rxaceq_c1;
+ ramData rxaceq_c2;
+ ramData rxaceq_c3;
+} Si3218x_audioEQ_Cfg;
+
+/*
+** Defines structure for configuring audio gain
+*/
+typedef ProSLIC_audioGain_Cfg Si3218x_audioGain_Cfg;
+
+
+
+typedef struct
+{
+ Si3218x_audioEQ_Cfg audioEQ;
+ Si3218x_hybrid_Cfg hybrid;
+ Si3218x_Zsynth_Cfg zsynth;
+ ramData txgain;
+ ramData rxgain;
+ ramData rxachpf_b0_1;
+ ramData rxachpf_b1_1;
+ ramData rxachpf_a1_1;
+ int16 txgain_db; /*overall gain associated with this configuration*/
+ int16 rxgain_db;
+} Si3218x_Impedance_Cfg;
+
+
+
+/*
+** Defines structure for configuring tone generator
+*/
+typedef ProSLIC_Tone_Cfg Si3218x_Tone_Cfg;
+
+/*
+** Defines structure for configuring ring generator
+*/
+typedef struct
+{
+ ramData rtper;
+ ramData freq;
+ ramData amp;
+ ramData phas;
+ ramData offset;
+ ramData slope_ring;
+ ramData iring_lim;
+ ramData rtacth;
+ ramData rtdcth;
+ ramData rtacdb;
+ ramData rtdcdb;
+ ramData vov_ring_bat;
+ ramData vov_ring_gnd;
+ ramData vbatr_expect;
+ uInt8 talo;
+ uInt8 tahi;
+ uInt8 tilo;
+ uInt8 tihi;
+ ramData adap_ring_min_i;
+ ramData counter_iring_val;
+ ramData counter_vtr_val;
+ ramData ar_const28;
+ ramData ar_const32;
+ ramData ar_const38;
+ ramData ar_const46;
+ ramData rrd_delay;
+ ramData rrd_delay2;
+ ramData dcdc_vref_min_rng;
+ uInt8 ringcon;
+ uInt8 userstat;
+ ramData vcm_ring;
+ ramData vcm_ring_fixed;
+ ramData delta_vcm;
+ ramData dcdc_rngtype;
+} Si3218x_Ring_Cfg;
+
+
+
+
+
+/*
+** Function: Si3218x_RevC_GenParamUpdate
+**
+** Description:
+** Update Si3218x general parameters and other required modifications
+** to default reg/ram values
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_GenParamUpdate(proslicChanType_ptr hProslic,initSeqType seq);
+
+
+/*
+** Function: Si3217x_RevC_SelectPatch
+**
+** Description:
+** Select appropriate patch based on general parameters
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_SelectPatch(proslicChanType_ptr hProslic,
+ const proslicPatch **patch);
+
+/*
+** Function: Si3217x_RevC_ConverterSetup
+**
+** Description:
+** Program revision specific settings before powering converter
+**
+** Specifically, from general parameters and knowledge that this
+** is Rev C, setup dcff drive, gate drive polarity, and charge pump.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_ConverterSetup(proslicChanType_ptr pProslic);
+
+/*
+** Function: Si3217x_RevC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+int Si3218x_PulseMeterSetup (proslicChanType_ptr hProslic, int preset);
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_constants.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_constants.h
new file mode 100644
index 0000000..e44edac
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_constants.h
@@ -0,0 +1,83 @@
+/*
+** Copyright (c) 2016 Silicon Laboratories, Inc.
+** 2017-03-02 19:40:09
+**
+** Si3218x ProSLIC API Configuration Tool Version 4.0.7
+** Last Updated in API Release: 8.2.0
+** source XML file: 111.xml
+**
+** Auto generated file from configuration tool.
+*/
+
+
+#ifndef SI3218X_CONSTANTS_H
+#define SI3218X_CONSTANTS_H
+
+/** Ringing Presets */
+enum {
+ RING_MAX_VBAT_PROVISIONING,
+ RING_F20_45VRMS_0VDC_LPR,
+ RING_F20_45VRMS_0VDC_BAL, //no add para
+ RING_F20_45VRMS_0VDC_LPR_SHORTTIME,//no add para
+ RINGING_LAST_ENUM
+};
+
+/** DC_Feed Presets */
+enum {
+ DCFEED_48V_20MA,
+ DCFEED_48V_25MA,
+ DCFEED_PSTN_DET_1,
+ DCFEED_PSTN_DET_2,
+ DC_FEED_LAST_ENUM
+};
+
+/** Impedance Presets */
+enum {
+ ZSYN_600_0_0_30_0,
+ ZSYN_270_750_150_30_0,
+ ZSYN_370_620_310_30_0,
+ ZSYN_220_820_120_30_0,
+ ZSYN_600_0_1000_30_0,
+ ZSYN_200_680_100_30_0,
+ ZSYN_220_820_115_30_0,
+ WB_ZSYN_600_0_0_20_0,
+ IMPEDANCE_LAST_ENUM
+};
+
+/** FSK Presets */
+enum {
+ DEFAULT_FSK,
+ ITU_FSK,
+ FSK_LAST_ENUM
+};
+
+/** Pulse_Metering Presets */
+enum {
+ DEFAULT_PULSE_METERING,
+ PULSE_METERING_LAST_ENUM
+};
+
+/** Tone Presets */
+enum {
+ TONEGEN_FCC_DIAL,
+ TONEGEN_FCC_BUSY,
+ TONEGEN_FCC_RINGBACK,
+ TONEGEN_FCC_REORDER,
+ TONEGEN_FCC_CONGESTION,
+ TONEGEN_CALL_WAITING,
+ TONEGEN_HOWLER,
+ TONE_LAST_ENUM
+};
+
+/** PCM Presets */
+enum {
+ PCM_8ULAW,
+ PCM_8ALAW,
+ PCM_16LIN,
+ PCM_16LIN_WB,
+ PCM_LAST_ENUM
+};
+
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_intf.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_intf.h
new file mode 100644
index 0000000..61c8695
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_intf.h
@@ -0,0 +1,610 @@
+/*
+** Copyright (c) 2015-2016 by Silicon Laboratories
+**
+** $Id: si3218x_intf.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Si3218x ProSLIC interface header file
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the ProSLIC driver.
+**
+**
+*/
+
+#ifndef SI3218X_INTF_H
+#define SI3218X_INTF_H
+#include "si3218x.h"
+
+/* The following macros are for backward compatibility */
+#define Si3218x_LoadPatch ProSLIC_LoadPatch
+#define Si3218x_ReadHookStatus ProSLIC_ReadHookStatus
+#define Si3218x_DCFeedSetup(PCHAN, NDX) Si3218x_DCFeedSetupCfg((PCHAN),Si3218x_DCfeed_Presets, (NDX))
+#define Si3218x_VerifyPatch ProSLIC_VerifyPatch
+#define Si3218x_SetPowersaveMode ProSLIC_SetPowersaveMode
+#define Si3218x_Init(PCHAN, SZ) Si3218x_Init_with_Options((PCHAN), (SZ), INIT_NO_OPT)
+#define Si3218x_LoadRegTables ProSLIC_LoadRegTables
+#define Si3218x_VerifyControlInterface ProSLIC_VefifyControlInterface
+#define Si3218x_ShutdownChannel ProSLIC_PowerDownConverter
+#define Si3218x_PowerDownConverter ProSLIC_PowerDownConverter
+#define Si3218x_Calibrate ProSLIC_Calibrate
+#define Si3218x_SetLinefeedStatusBroadcast ProSLIC_SetLinefeedStatusBroadcast
+
+/* DC Feed */
+#ifndef DISABLE_DCFEED_SETUP
+extern Si3218x_DCfeed_Cfg Si3218x_DCfeed_Presets[];
+#endif
+
+/*
+**
+** PROSLIC INITIALIZATION FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_Init_MultiBOM
+**
+** Description:
+** Initializes the ProSLIC w/ selected general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** size: number of channels
+** preset: General configuration preset
+**
+** Return:
+** none
+*/
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+int Si3218x_Init_MultiBOM (proslicChanType_ptr *hProslic,int size,int preset);
+#endif
+
+/*
+** Function: Si3218x_Init_with_Options
+**
+** Description:
+** Initializes the ProSLIC with an option.
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** size - number of continuous channels to initialize
+** init_opt - which initialization type to do.
+**
+** Return:
+** none
+*/
+int Si3218x_Init_with_Options (proslicChanType_ptr *pProslic, int size,
+ initOptionsType init_opt);
+
+/*
+** Function: PROSLIC_VerifyControlInterface
+**
+** Description:
+** Verify SPI port read capabilities
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+**
+** Return:
+** none
+*/
+int Si3218x_VerifyControlInterface (proslicChanType_ptr hProslic);
+
+/*
+** Function: Si3218x_PowerUpConverter
+**
+** Description:
+** Powers all DC/DC converters sequentially with delay to minimize
+** peak power draw on VDC.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_PowerUpConverter(proslicChanType_ptr hProslic);
+
+/*
+** Function: Si3218x_PowerDownConverter
+**
+** Description:
+** Power down DCDC converter (selected channel only)
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_PowerDownConverter(proslicChanType_ptr hProslic);
+
+/*
+** Function: Si3218x_Calibrate
+**
+** Description:
+** Generic calibration function for Si3218x
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object,
+** size: maximum number of channels
+** calr: array of CALRx register values
+** maxTime: cal timeout (in ms)
+**
+** Return:
+** int
+*/
+int Si3218x_Calibrate (proslicChanType_ptr *hProslic, int size, uInt8 *calr,
+ int maxTime);
+
+/*
+** Function: PROSLIC_EnableInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** hProslic: pointer to Proslic object
+**
+** Return:
+**
+*/
+int Si3218x_EnableInterrupts (proslicChanType_ptr hProslic);
+
+/*
+**
+** PROSLIC CONFIGURATION FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_RingSetup
+**
+** Description:
+** configure ringing
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pRingSetup: pointer to ringing config structure
+**
+** Return:
+** none
+*/
+int Si3218x_RingSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_ZsynthSetup
+**
+** Description:
+** configure impedance synthesis
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pZynth: pointer to zsynth config structure
+**
+** Return:
+** none
+*/
+int Si3218x_ZsynthSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** preset: impedance preset to scale
+**
+** Return:
+** none
+*/
+int Si3218x_TXAudioGainSetup (proslicChanType *pProslic, int preset);
+int Si3218x_RXAudioGainSetup (proslicChanType *pProslic, int preset);
+#define Si3218x_AudioGainSetup ProSLIC_AudioGainSetup
+
+/*
+** Function: PROSLIC_TXAudioGainScale
+**
+** Description:
+** configure audio gains
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** preset: pointer to audio gains config structure
+** pga_scale: pga_scaling constant
+** eq_scale: equalizer scaling constant
+**
+** Return:
+** none
+*/
+int Si3218x_TXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale);
+
+/*
+** Function: PROSLIC_RXAudioGainScale
+**
+** Description:
+** configure audio gains
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** preset: pointer to audio gains config structure
+** pga_scale: pga_scaling constant
+** eq_scale: equalizer scaling constant
+**
+** Return:
+** none
+*/
+int Si3218x_RXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale);
+
+/*
+** Function: PROSLIC_AudioEQSetup
+**
+** Description:
+** configure audio equalizers
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pAudioEQ: pointer to ringing config structure
+**
+** Return:
+** none
+*/
+int Si3218x_AudioEQSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_DCFeedSetup
+**
+** Description:
+** configure dc feed
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pDcFeed: pointer to dc feed config structure
+**
+** Return:
+** none
+*/
+int Si3218x_DCFeedSetupCfg (proslicChanType *pProslic, ProSLIC_DCfeed_Cfg *cfg,
+ int preset);
+
+/*
+** Function: PROSLIC_PCMSetup
+**
+** Description:
+** configure pcm
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pPcm: pointer to pcm config structure
+**
+** Return:
+** none
+*/
+int Si3218x_PCMSetup(proslicChanType *pProslic, int preset);
+
+/*
+**
+** PROSLIC CONTROL FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_GetInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** hProslic: pointer to Proslic object
+** pIntData: pointer to interrupt info retrieved
+**
+** Return:
+**
+*/
+int Si3218x_GetInterrupts (proslicChanType_ptr hProslic,
+ proslicIntType *pIntData);
+
+/*
+** Function: PROSLIC_WriteLinefeed
+**
+** Description:
+** Sets linefeed state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** newLinefeed: new linefeed state
+**
+** Return:
+** none
+*/
+int Si3218x_SetLinefeedStatus (proslicChanType *pProslic,uInt8 newLinefeed);
+
+/*
+** Function: ProSLIC_MWISetup
+**
+** Description:
+** Modify default MWI amplitude and switch debounce parameters
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** vpk_mag: peak flash voltage (vpk) - passing a 0 results
+** in no change to VBATH_NEON
+** lcmrmask_mwi: LCR mask time (ms) after MWI state switch - passing
+** a 0 results in no change to LCRMASK_MWI
+**
+** Return:
+** none
+*/
+int Si3218x_MWISetup (proslicChanType *pProslic,uInt16 vpk_mag,
+ uInt16 lcrmask_mwi);
+
+/*
+** Function: ProSLIC_MWIEnable
+**
+** Description:
+** Enable MWI feature
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3218x_MWIEnable (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_MWIDisable
+**
+** Description:
+** Disable MWI feature
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3218x_MWIDisable (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_SetMWIState
+**
+** Description:
+** Set MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** flash_on: 0 = low, 1 = high (VBATH_NEON)
+**
+** Return:
+** none
+*/
+int Si3218x_SetMWIState (proslicChanType *pProslic,uInt8 flash_on);
+
+/*
+** Function: ProSLIC_SetMWIState_ramp
+**
+** Description:
+** Set MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** flash_on: 0 = low, 1 = high (VBATH_NEON)
+** step_delay: delay between VBATH steps (ms)
+** step_num: number of steps between low and high states
+**
+** Return:
+** none
+*/
+int Si3218x_SetMWIState_ramp (proslicChanType *pProslic,uInt8 flash_on,
+ uInt8 step_delay,uInt8 step_num);
+
+/*
+** Function: ProSLIC_GetMWIState
+**
+** Description:
+** Read MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** 0 - Flash OFF, 1 - Flash ON, RC_MWI_NOT_ENABLED
+*/
+int Si3218x_GetMWIState (proslicChanType *pProslic);
+
+/*
+** Function: PROSLIC_MWI
+**
+** Description:
+** implements message waiting indicator
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** lampOn: 0 = turn lamp off, 1 = turn lamp on
+**
+** Return:
+** none
+**
+** Use Deprecated.
+*/
+int Si3218x_MWI (proslicChanType *pProslic,uInt8 lampOn);
+
+/*
+** Function: PROSLIC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pPulseCfg: pointer to pulse metering config structure
+**
+** Return:
+** none
+*/
+int Si3218x_PulseMeterSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_dbgSetDCFeed
+**
+** Description:
+** provision function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3218x_dbgSetDCFeed (proslicChanType *pProslic, uInt32 v_vlim_val,
+ uInt32 i_ilim_val, int32 preset);
+
+/*
+** Function: PROSLIC_dbgSetDCFeedVopen
+**
+** Description:
+** provision function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3218x_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val,
+ int32 preset);
+
+
+/*
+** Function: PROSLIC_dbgSetDCFeedIloop
+**
+** Description:
+** provision function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3218x_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val,
+ int32 preset);
+
+
+/*
+** Function: PROSLIC_dbgRingingSetup
+**
+** Description:
+** Provision function for setting up
+** Ring type, frequency, amplitude and dc offset.
+** Main use will be by peek/poke applications.
+*/
+int Si3218x_dbgSetRinging (proslicChanType *pProslic,
+ ProSLIC_dbgRingCfg *ringCfg, int preset);
+
+/*
+** Function: PROSLIC_dbgSetRXGain
+**
+** Description:
+** Provision function for setting up
+** RX path gain.
+*/
+int Si3218x_dbgSetRXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+/*
+** Function: PROSLIC_dbgSetTXGain
+**
+** Description:
+** Provision function for setting up
+** TX path gain.
+*/
+int Si3218x_dbgSetTXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+
+/*
+** Function: PROSLIC_LineMonitor
+**
+** Description:
+** Monitor line voltages and currents
+*/
+int Si3218x_LineMonitor(proslicChanType *pProslic, proslicMonitorType *monitor);
+
+
+/*
+** Function: PROSLIC_PSTNCheck
+**
+** Description:
+** Continuous monitor of ilong to detect hot pstn line
+*/
+int Si3218x_PSTNCheck(proslicChanType *pProslic,
+ proslicPSTNCheckObjType *pstnCheckObj);
+
+
+/*
+** Function: PROSLIC_PSTNCheck
+**
+** Description:
+** Continuous monitor of ilong to detect hot pstn line
+*/
+int Si3218x_DiffPSTNCheck(proslicChanType *pProslic,
+ proslicDiffPSTNCheckObjType *pstnCheckObj);
+
+/*
+** Function: PROSLIC_ReadMADCScaled
+**
+** Description:
+** Read MADC (or other sensed voltages/currents) and
+** return scaled value in int32 format
+*/
+int32 Si3218x_ReadMADCScaled(proslicChanType_ptr pProslic, uInt16 addr,
+ int32 scale);
+
+/*
+** Function: Si3218x_GenParamUpdate
+**
+** Description:
+** Update Si3218x general parameters and other required modifications
+** to default reg/ram values
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_GenParamUpdate(proslicChanType_ptr hProslic,initSeqType seq);
+
+
+/*
+** Function: Si3218x_SelectPatch
+**
+** Description:
+** Select appropriate patch based on general parameters
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_SelectPatch(proslicChanType_ptr hProslic,
+ const proslicPatch **patch);
+
+/*
+** Function: Si3218x_ConverterSetup
+**
+** Description:
+** Program revision specific settings before powering converter
+**
+** Specifically, from general parameters and knowledge that this
+** is Rev C, setup dcff drive, gate drive polarity, and charge pump.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_ConverterSetup(proslicChanType_ptr pProslic);
+
+/*
+** Function: Si3218x8_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+int Si3218x_PulseMeterSetup (proslicChanType_ptr hProslic, int preset);
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_registers.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_registers.h
new file mode 100644
index 0000000..0660db5
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3218x_registers.h
@@ -0,0 +1,1521 @@
+/*
+** Copyright (c) 2015-2015 by Silicon Laboratories
+**
+** $Id: si3218x_registers.h 5475 2016-01-18 16:00:13Z elgeorge $
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**/
+
+#ifndef SI3218X_REGS_H
+#define SI3218X_REGS_H
+
+/*
+** SI3218X SPI Registers
+*/
+enum SI3218X_REG
+{
+ SI3218X_REG_ID = 0,
+ SI3218X_REG_RESET = 1,
+ SI3218X_REG_MSTREN = 2,
+ SI3218X_REG_MSTRSTAT = 3,
+ SI3218X_REG_RAMSTAT = 4,
+ SI3218X_REG_RAM_ADDR_HI = 5,
+ SI3218X_REG_RAM_DATA_B0 = 6,
+ SI3218X_REG_RAM_DATA_B1 = 7,
+ SI3218X_REG_RAM_DATA_B2 = 8,
+ SI3218X_REG_RAM_DATA_B3 = 9,
+ SI3218X_REG_RAM_ADDR_LO = 10,
+ SI3218X_REG_PCMMODE = 11,
+ SI3218X_REG_PCMTXLO = 12,
+ SI3218X_REG_PCMTXHI = 13,
+ SI3218X_REG_PCMRXLO = 14,
+ SI3218X_REG_PCMRXHI = 15,
+ SI3218X_REG_IRQ = 16,
+ SI3218X_REG_IRQ0 = 17,
+ SI3218X_REG_IRQ1 = 18,
+ SI3218X_REG_IRQ2 = 19,
+ SI3218X_REG_IRQ3 = 20,
+ SI3218X_REG_IRQ4 = 21,
+ SI3218X_REG_IRQEN1 = 22,
+ SI3218X_REG_IRQEN2 = 23,
+ SI3218X_REG_IRQEN3 = 24,
+ SI3218X_REG_IRQEN4 = 25,
+ SI3218X_REG_CALR0 = 26,
+ SI3218X_REG_CALR1 = 27,
+ SI3218X_REG_CALR2 = 28,
+ SI3218X_REG_CALR3 = 29,
+ SI3218X_REG_LINEFEED = 30,
+ SI3218X_REG_POLREV = 31,
+ SI3218X_REG_SPEEDUP_DIS = 32,
+ SI3218X_REG_SPEEDUP = 33,
+ SI3218X_REG_LCRRTP = 34,
+ SI3218X_REG_OFFLOAD = 35,
+ SI3218X_REG_BATSELMAP = 36,
+ SI3218X_REG_BATSEL = 37,
+ SI3218X_REG_RINGCON = 38,
+ SI3218X_REG_RINGTALO = 39,
+ SI3218X_REG_RINGTAHI = 40,
+ SI3218X_REG_RINGTILO = 41,
+ SI3218X_REG_RINGTIHI = 42,
+ SI3218X_REG_LOOPBACK = 43,
+ SI3218X_REG_DIGCON = 44,
+ SI3218X_REG_RA = 45,
+ SI3218X_REG_ZCAL_EN = 46,
+ SI3218X_REG_ENHANCE = 47,
+ SI3218X_REG_OMODE = 48,
+ SI3218X_REG_OCON = 49,
+ SI3218X_REG_O1TALO = 50,
+ SI3218X_REG_O1TAHI = 51,
+ SI3218X_REG_O1TILO = 52,
+ SI3218X_REG_O1TIHI = 53,
+ SI3218X_REG_O2TALO = 54,
+ SI3218X_REG_O2TAHI = 55,
+ SI3218X_REG_O2TILO = 56,
+ SI3218X_REG_O2TIHI = 57,
+ SI3218X_REG_FSKDAT = 58,
+ SI3218X_REG_FSKDEPTH = 59,
+ SI3218X_REG_TONDTMF = 60,
+ SI3218X_REG_TONDET = 61,
+ SI3218X_REG_TONEN = 62,
+ SI3218X_REG_GCI_CI = 63,
+ SI3218X_REG_GLOBSTAT1 = 64,
+ SI3218X_REG_GLOBSTAT2 = 65,
+ SI3218X_REG_USERSTAT = 66,
+ SI3218X_REG_GPIO_CFG1 = 68,
+ SI3218X_REG_DIAG1 = 71,
+ SI3218X_REG_DIAG2 = 72,
+ SI3218X_REG_CM_CLAMP = 73,
+ SI3218X_REG_DIAG3 = 74,
+ SI3218X_REG_PMCON = 75,
+ SI3218X_REG_PCLK_FAULT_CNTL = 76,
+ SI3218X_REG_AUTO = 80,
+ SI3218X_REG_JMPEN = 81,
+ SI3218X_REG_JMP0LO = 82,
+ SI3218X_REG_JMP0HI = 83,
+ SI3218X_REG_JMP1LO = 84,
+ SI3218X_REG_JMP1HI = 85,
+ SI3218X_REG_JMP2LO = 86,
+ SI3218X_REG_JMP2HI = 87,
+ SI3218X_REG_JMP3LO = 88,
+ SI3218X_REG_JMP3HI = 89,
+ SI3218X_REG_JMP4LO = 90,
+ SI3218X_REG_JMP4HI = 91,
+ SI3218X_REG_JMP5LO = 92,
+ SI3218X_REG_JMP5HI = 93,
+ SI3218X_REG_JMP6LO = 94,
+ SI3218X_REG_JMP6HI = 95,
+ SI3218X_REG_JMP7LO = 96,
+ SI3218X_REG_JMP7HI = 97,
+ SI3218X_REG_PDN = 98,
+ SI3218X_REG_PDN_STAT = 99,
+ SI3218X_REG_PDN2 = 100,
+ SI3218X_REG_PDN2_STAT = 101,
+ SI3218X_REG_M1_OSC_LO = 112,
+ SI3218X_REG_M1_OSC_HI = 113,
+ SI3218X_REG_BITCNT_LO = 114,
+ SI3218X_REG_BITCNT_HI = 115,
+ SI3218X_REG_PCLK_MULT = 116,
+ SI3218X_REG_RAM_DATA_16 = 117,
+ SI3218X_REG_BYPASS_ADDR_LO = 118,
+ SI3218X_REG_BYPASS_ADDR_HI = 119,
+ SI3218X_REG_PC_LO = 120,
+ SI3218X_REG_PC_HI = 121,
+ SI3218X_REG_PC_SHAD_LO = 122,
+ SI3218X_REG_PC_SHAD_HI = 123,
+ SI3218X_REG_PASS_LO = 124,
+ SI3218X_REG_PASS_HI = 125,
+ SI3218X_REG_TEST_CNTL = 126,
+ SI3218X_REG_TEST_MODE = 127,
+};
+
+/*
+** SI3218X_RAM
+*/
+enum SI3218X_RAM
+{
+ SI3218X_RAM_IRNGNG_SENSE = 0,
+ SI3218X_RAM_MADC_VTIPC = 1,
+ SI3218X_RAM_MADC_VRINGC = 2,
+ SI3218X_RAM_MADC_VBAT = 3,
+ SI3218X_RAM_MADC_VLONG = 4,
+ SI3218X_RAM_UNUSED5 = 5,
+ SI3218X_RAM_MADC_VDC = 6,
+ SI3218X_RAM_MADC_ILONG = 7,
+ SI3218X_RAM_MADC_ITIP = 8,
+ SI3218X_RAM_MADC_IRING = 9,
+ SI3218X_RAM_MADC_ILOOP = 10,
+ SI3218X_RAM_VDIFF_SENSE = 11,
+ SI3218X_RAM_VTIP = 12,
+ SI3218X_RAM_VRING = 13,
+ SI3218X_RAM_P_Q1_D = 14,
+ SI3218X_RAM_INIT_GUESS = 15,
+ SI3218X_RAM_Y1 = 16,
+ SI3218X_RAM_Y2 = 17,
+ SI3218X_RAM_Y3 = 18,
+ SI3218X_RAM_UNUSED19 = 19,
+ SI3218X_RAM_P_Q1 = 20,
+ SI3218X_RAM_DIAG_EX1 = 21,
+ SI3218X_RAM_DIAG_EX2 = 22,
+ SI3218X_RAM_DIAG_LPF_MADC = 23,
+ SI3218X_RAM_DIAG_DMM_I = 24,
+ SI3218X_RAM_DIAG_DMM_V = 25,
+ SI3218X_RAM_OSC1FREQ = 26,
+ SI3218X_RAM_OSC1AMP = 27,
+ SI3218X_RAM_OSC1PHAS = 28,
+ SI3218X_RAM_OSC2FREQ = 29,
+ SI3218X_RAM_OSC2AMP = 30,
+ SI3218X_RAM_OSC2PHAS = 31,
+ SI3218X_RAM_TESTB0_1 = 32,
+ SI3218X_RAM_TESTB1_1 = 33,
+ SI3218X_RAM_TESTB2_1 = 34,
+ SI3218X_RAM_TESTA1_1 = 35,
+ SI3218X_RAM_TESTA2_1 = 36,
+ SI3218X_RAM_TESTB0_2 = 37,
+ SI3218X_RAM_TESTB1_2 = 38,
+ SI3218X_RAM_TESTB2_2 = 39,
+ SI3218X_RAM_TESTA1_2 = 40,
+ SI3218X_RAM_TESTA2_2 = 41,
+ SI3218X_RAM_TESTB0_3 = 42,
+ SI3218X_RAM_TESTB1_3 = 43,
+ SI3218X_RAM_TESTB2_3 = 44,
+ SI3218X_RAM_TESTA1_3 = 45,
+ SI3218X_RAM_TESTA2_3 = 46,
+ SI3218X_RAM_TESTPKO = 47,
+ SI3218X_RAM_TESTABO = 48,
+ SI3218X_RAM_TESTWLN = 49,
+ SI3218X_RAM_TESTAVBW = 50,
+ SI3218X_RAM_TESTPKFL = 51,
+ SI3218X_RAM_TESTAVFL = 52,
+ SI3218X_RAM_TESTPKTH = 53,
+ SI3218X_RAM_TESTAVTH = 54,
+ SI3218X_RAM_DAC_IN_SYNC1 = 55,
+ SI3218X_RAM_BYPASS_REG = 56,
+ SI3218X_RAM_LCRMASK_CNT = 57,
+ SI3218X_RAM_DAC_IN_SYNC = 58,
+ SI3218X_RAM_TEMP = 59,
+ SI3218X_RAM_TEMP_ISR = 60,
+ SI3218X_RAM_P_Q2 = 61,
+ SI3218X_RAM_P_Q3 = 62,
+ SI3218X_RAM_P_Q4 = 63,
+ SI3218X_RAM_P_Q5 = 64,
+ SI3218X_RAM_P_Q6 = 65,
+ SI3218X_RAM_ILOOP_FILT = 66,
+ SI3218X_RAM_ILONG_FILT = 67,
+ SI3218X_RAM_VBAT_FILT = 68,
+ SI3218X_RAM_VDIFF_FILT = 69,
+ SI3218X_RAM_VCM_FILT = 70,
+ SI3218X_RAM_VBAT_CNT = 71,
+ SI3218X_RAM_V_VLIM_SCALED = 72,
+ SI3218X_RAM_V_VLIM_TRACK = 73,
+ SI3218X_RAM_V_VLIM_MODFEED = 74,
+ SI3218X_RAM_DIAG_P_OUT = 75,
+ SI3218X_RAM_DIAG_COUNT = 76,
+ SI3218X_RAM_ROW0_MAG = 77,
+ SI3218X_RAM_ROW1_MAG = 78,
+ SI3218X_RAM_ROW2_MAG = 79,
+ SI3218X_RAM_ROW3_MAG = 80,
+ SI3218X_RAM_COL0_MAG = 81,
+ SI3218X_RAM_COL1_MAG = 82,
+ SI3218X_RAM_COL2_MAG = 83,
+ SI3218X_RAM_COL3_MAG = 84,
+ SI3218X_RAM_ROW0_2ND_Y1 = 85,
+ SI3218X_RAM_ROW1_2ND_Y1 = 86,
+ SI3218X_RAM_ROW2_2ND_Y1 = 87,
+ SI3218X_RAM_ROW3_2ND_Y1 = 88,
+ SI3218X_RAM_COL0_2ND_Y1 = 89,
+ SI3218X_RAM_COL1_2ND_Y1 = 90,
+ SI3218X_RAM_COL2_2ND_Y1 = 91,
+ SI3218X_RAM_COL3_2ND_Y1 = 92,
+ SI3218X_RAM_ROW0_2ND_Y2 = 93,
+ SI3218X_RAM_ROW1_2ND_Y2 = 94,
+ SI3218X_RAM_ROW2_2ND_Y2 = 95,
+ SI3218X_RAM_ROW3_2ND_Y2 = 96,
+ SI3218X_RAM_COL0_2ND_Y2 = 97,
+ SI3218X_RAM_COL1_2ND_Y2 = 98,
+ SI3218X_RAM_COL2_2ND_Y2 = 99,
+ SI3218X_RAM_COL3_2ND_Y2 = 100,
+ SI3218X_RAM_DTMF_IN = 101,
+ SI3218X_RAM_DTMFDTF_D2_1 = 102,
+ SI3218X_RAM_DTMFDTF_D1_1 = 103,
+ SI3218X_RAM_DTMFDTF_OUT_1 = 104,
+ SI3218X_RAM_DTMFDTF_D2_2 = 105,
+ SI3218X_RAM_DTMFDTF_D1_2 = 106,
+ SI3218X_RAM_DTMFDTF_OUT_2 = 107,
+ SI3218X_RAM_DTMFDTF_D2_3 = 108,
+ SI3218X_RAM_DTMFDTF_D1_3 = 109,
+ SI3218X_RAM_DTMFDTF_OUT_3 = 110,
+ SI3218X_RAM_DTMFDTF_OUT = 111,
+ SI3218X_RAM_DTMFLPF_D2_1 = 112,
+ SI3218X_RAM_DTMFLPF_D1_1 = 113,
+ SI3218X_RAM_DTMFLPF_OUT_1 = 114,
+ SI3218X_RAM_DTMFLPF_D2_2 = 115,
+ SI3218X_RAM_DTMFLPF_D1_2 = 116,
+ SI3218X_RAM_DTMFLPF_OUT_2 = 117,
+ SI3218X_RAM_DTMF_ROW = 118,
+ SI3218X_RAM_DTMFHPF_D2_1 = 119,
+ SI3218X_RAM_DTMFHPF_D1_1 = 120,
+ SI3218X_RAM_DTMFHPF_OUT_1 = 121,
+ SI3218X_RAM_DTMFHPF_D2_2 = 122,
+ SI3218X_RAM_DTMFHPF_D1_2 = 123,
+ SI3218X_RAM_DTMFHPF_OUT_2 = 124,
+ SI3218X_RAM_DTMF_COL = 125,
+ SI3218X_RAM_ROW_POWER = 126,
+ SI3218X_RAM_COL_POWER = 127,
+ SI3218X_RAM_GP_TIMER = 128,
+ SI3218X_RAM_SPR_INTERP_DIF = 129,
+ SI3218X_RAM_SPR_INTERP_DIF_OUT = 130,
+ SI3218X_RAM_SPR_INTERP_INT = 131,
+ SI3218X_RAM_SPR_CNT = 132,
+ SI3218X_RAM_ROW0_Y1 = 133,
+ SI3218X_RAM_ROW0_Y2 = 134,
+ SI3218X_RAM_ROW1_Y1 = 135,
+ SI3218X_RAM_ROW1_Y2 = 136,
+ SI3218X_RAM_ROW2_Y1 = 137,
+ SI3218X_RAM_ROW2_Y2 = 138,
+ SI3218X_RAM_ROW3_Y1 = 139,
+ SI3218X_RAM_ROW3_Y2 = 140,
+ SI3218X_RAM_COL0_Y1 = 141,
+ SI3218X_RAM_COL0_Y2 = 142,
+ SI3218X_RAM_COL1_Y1 = 143,
+ SI3218X_RAM_COL1_Y2 = 144,
+ SI3218X_RAM_COL2_Y1 = 145,
+ SI3218X_RAM_COL2_Y2 = 146,
+ SI3218X_RAM_COL3_Y1 = 147,
+ SI3218X_RAM_COL3_Y2 = 148,
+ SI3218X_RAM_ROWMAX_MAG = 149,
+ SI3218X_RAM_COLMAX_MAG = 150,
+ SI3218X_RAM_ROW0_2ND_MAG = 151,
+ SI3218X_RAM_COL0_2ND_MAG = 152,
+ SI3218X_RAM_ROW_THR = 153,
+ SI3218X_RAM_COL_THR = 154,
+ SI3218X_RAM_OSC1_Y = 155,
+ SI3218X_RAM_OSC2_Y = 156,
+ SI3218X_RAM_OSC1_X = 157,
+ SI3218X_RAM_OSC1_COEFF = 158,
+ SI3218X_RAM_OSC2_X = 159,
+ SI3218X_RAM_OSC2_COEFF = 160,
+ SI3218X_RAM_RXACIIR_D2_1 = 161,
+ SI3218X_RAM_RXACIIR_OUT_1 = 162,
+ SI3218X_RAM_RXACIIR_D2_2 = 163,
+ SI3218X_RAM_RXACIIR_D1_2 = 164,
+ SI3218X_RAM_RXACIIR_OUT_2 = 165,
+ SI3218X_RAM_RXACIIR_D2_3 = 166,
+ SI3218X_RAM_RXACIIR_D1_3 = 167,
+ SI3218X_RAM_RXACIIR_OUT = 168,
+ SI3218X_RAM_RXACIIR_OUT_3 = 169,
+ SI3218X_RAM_TXACCOMB_D1 = 170,
+ SI3218X_RAM_TXACCOMB_D2 = 171,
+ SI3218X_RAM_TXACCOMB_D3 = 172,
+ SI3218X_RAM_TXACSINC_OUT = 173,
+ SI3218X_RAM_TXACHPF_D1_2 = 174,
+ SI3218X_RAM_TXACHPF_D2_1 = 175,
+ SI3218X_RAM_TXACHPF_D2_2 = 176,
+ SI3218X_RAM_TXACHPF_OUT = 177,
+ SI3218X_RAM_TXACHPF_OUT_1 = 178,
+ SI3218X_RAM_TXACHPF_OUT_2 = 179,
+ SI3218X_RAM_TXACIIR_D2_1 = 180,
+ SI3218X_RAM_TXACIIR_OUT_1 = 181,
+ SI3218X_RAM_TXACIIR_D2_2 = 182,
+ SI3218X_RAM_TXACIIR_D1_2 = 183,
+ SI3218X_RAM_TXACIIR_OUT_2 = 184,
+ SI3218X_RAM_TXACIIR_D2_3 = 185,
+ SI3218X_RAM_TXACIIR_D1_3 = 186,
+ SI3218X_RAM_TXACIIR_OUT_3 = 187,
+ SI3218X_RAM_TXACIIR_OUT = 188,
+ SI3218X_RAM_ECIIR_D1 = 189,
+ SI3218X_RAM_ECIIR_D2 = 190,
+ SI3218X_RAM_EC_DELAY1 = 191,
+ SI3218X_RAM_EC_DELAY2 = 192,
+ SI3218X_RAM_EC_DELAY3 = 193,
+ SI3218X_RAM_EC_DELAY4 = 194,
+ SI3218X_RAM_EC_DELAY5 = 195,
+ SI3218X_RAM_EC_DELAY6 = 196,
+ SI3218X_RAM_EC_DELAY7 = 197,
+ SI3218X_RAM_EC_DELAY8 = 198,
+ SI3218X_RAM_EC_DELAY9 = 199,
+ SI3218X_RAM_EC_DELAY10 = 200,
+ SI3218X_RAM_EC_DELAY11 = 201,
+ SI3218X_RAM_ECHO_EST = 202,
+ SI3218X_RAM_EC_OUT = 203,
+ SI3218X_RAM_TESTFILT_OUT_1 = 204,
+ SI3218X_RAM_TESTFILT_D1_1 = 205,
+ SI3218X_RAM_TESTFILT_D2_1 = 206,
+ SI3218X_RAM_TESTFILT_OUT_2 = 207,
+ SI3218X_RAM_TESTFILT_D1_2 = 208,
+ SI3218X_RAM_TESTFILT_D2_2 = 209,
+ SI3218X_RAM_TESTFILT_OUT_3 = 210,
+ SI3218X_RAM_TESTFILT_D1_3 = 211,
+ SI3218X_RAM_TESTFILT_D2_3 = 212,
+ SI3218X_RAM_TESTFILT_PEAK = 213,
+ SI3218X_RAM_TESTFILT_ABS = 214,
+ SI3218X_RAM_TESTFILT_MEANACC = 215,
+ SI3218X_RAM_TESTFILT_COUNT = 216,
+ SI3218X_RAM_TESTFILT_NO_OFFSET = 217,
+ SI3218X_RAM_RING_X = 218,
+ SI3218X_RAM_RING_Y = 219,
+ SI3218X_RAM_RING_INT = 220,
+ SI3218X_RAM_RING_Y_D1 = 221,
+ SI3218X_RAM_RING_DIFF = 222,
+ SI3218X_RAM_RING_DELTA = 223,
+ SI3218X_RAM_WTCHDOG_CNT = 224,
+ SI3218X_RAM_RING_WAVE = 225,
+ SI3218X_RAM_UNUSED226 = 226,
+ SI3218X_RAM_ONEKHZ_COUNT = 227,
+ SI3218X_RAM_TX2100_Y1 = 228,
+ SI3218X_RAM_TX2100_Y2 = 229,
+ SI3218X_RAM_TX2100_MAG = 230,
+ SI3218X_RAM_RX2100_Y1 = 231,
+ SI3218X_RAM_RX2100_Y2 = 232,
+ SI3218X_RAM_RX2100_MAG = 233,
+ SI3218X_RAM_TX2100_POWER = 234,
+ SI3218X_RAM_RX2100_POWER = 235,
+ SI3218X_RAM_TX2100_IN = 236,
+ SI3218X_RAM_RX2100_IN = 237,
+ SI3218X_RAM_RINGTRIP_COUNT = 238,
+ SI3218X_RAM_RINGTRIP_DC1 = 239,
+ SI3218X_RAM_RINGTRIP_DC2 = 240,
+ SI3218X_RAM_RINGTRIP_AC1 = 241,
+ SI3218X_RAM_RINGTRIP_AC2 = 242,
+ SI3218X_RAM_RINGTRIP_AC_COUNT = 243,
+ SI3218X_RAM_RINGTRIP_DC_COUNT = 244,
+ SI3218X_RAM_RINGTRIP_AC_RESULT = 245,
+ SI3218X_RAM_RINGTRIP_DC_RESULT = 246,
+ SI3218X_RAM_RINGTRIP_ABS = 247,
+ SI3218X_RAM_TXACEQ_OUT = 248,
+ SI3218X_RAM_LCR_DBI_CNT = 249,
+ SI3218X_RAM_BAT_DBI_CNT = 250,
+ SI3218X_RAM_LONG_DBI_CNT = 251,
+ SI3218X_RAM_TXACEQ_DELAY3 = 252,
+ SI3218X_RAM_TXACEQ_DELAY2 = 253,
+ SI3218X_RAM_TXACEQ_DELAY1 = 254,
+ SI3218X_RAM_RXACEQ_DELAY3 = 255,
+ SI3218X_RAM_RXACEQ_DELAY2 = 256,
+ SI3218X_RAM_RXACEQ_DELAY1 = 257,
+ SI3218X_RAM_RXACEQ_IN = 258,
+ SI3218X_RAM_TXDCCOMB_D1 = 259,
+ SI3218X_RAM_TXDCCOMB_D2 = 260,
+ SI3218X_RAM_TXDCSINC_OUT = 261,
+ SI3218X_RAM_RXACDIFF_D1 = 262,
+ SI3218X_RAM_DC_NOTCH_1 = 263,
+ SI3218X_RAM_DC_NOTCH_2 = 264,
+ SI3218X_RAM_DC_NOTCH_OUT = 265,
+ SI3218X_RAM_DC_NOTCH_SCALED = 266,
+ SI3218X_RAM_V_FEED_IN = 267,
+ SI3218X_RAM_I_TAR = 268,
+ SI3218X_RAM_CONST_VLIM = 269,
+ SI3218X_RAM_UNITY = 270,
+ SI3218X_RAM_TXACNOTCH_1 = 271,
+ SI3218X_RAM_TXACNOTCH_2 = 272,
+ SI3218X_RAM_TXACNOTCH_OUT = 273,
+ SI3218X_RAM_ZSYNTH_1 = 274,
+ SI3218X_RAM_ZSYNTH_2 = 275,
+ SI3218X_RAM_ZSYNTH_OUT_1 = 276,
+ SI3218X_RAM_TXACD2_1_0 = 277,
+ SI3218X_RAM_TXACD2_1_1 = 278,
+ SI3218X_RAM_TXACD2_1_2 = 279,
+ SI3218X_RAM_TXACD2_1_3 = 280,
+ SI3218X_RAM_TXACD2_1_4 = 281,
+ SI3218X_RAM_TXACD2_1_5 = 282,
+ SI3218X_RAM_TXACD2_1_OUT = 283,
+ SI3218X_RAM_TXACD2_2_0 = 284,
+ SI3218X_RAM_TXACD2_2_1 = 285,
+ SI3218X_RAM_TXACD2_2_2 = 286,
+ SI3218X_RAM_TXACD2_2_3 = 287,
+ SI3218X_RAM_TXACD2_2_4 = 288,
+ SI3218X_RAM_TXACD2_2_5 = 289,
+ SI3218X_RAM_TXACD2_2_OUT = 290,
+ SI3218X_RAM_TXACD2_3_0 = 291,
+ SI3218X_RAM_TXACD2_3_1 = 292,
+ SI3218X_RAM_TXACD2_3_2 = 293,
+ SI3218X_RAM_TXACD2_3_3 = 294,
+ SI3218X_RAM_TXACD2_3_4 = 295,
+ SI3218X_RAM_TXACD2_3_5 = 296,
+ SI3218X_RAM_TXACD2_3_OUT = 297,
+ SI3218X_RAM_RXACI2_1_1 = 298,
+ SI3218X_RAM_RXACI2_1_2 = 299,
+ SI3218X_RAM_RXACI2_1_3 = 300,
+ SI3218X_RAM_RXACI2_1_4 = 301,
+ SI3218X_RAM_RXACI2_1_OUT = 302,
+ SI3218X_RAM_RXACI2_2_1 = 303,
+ SI3218X_RAM_RXACI2_2_2 = 304,
+ SI3218X_RAM_RXACI2_2_3 = 305,
+ SI3218X_RAM_RXACI2_2_4 = 306,
+ SI3218X_RAM_RXACI2_2_OUT = 307,
+ SI3218X_RAM_RXACI2_3_1 = 308,
+ SI3218X_RAM_RXACI2_3_2 = 309,
+ SI3218X_RAM_RXACI2_3_3 = 310,
+ SI3218X_RAM_RXACI2_3_4 = 311,
+ SI3218X_RAM_RXACI2_3_OUT = 312,
+ SI3218X_RAM_TXACCOMP1 = 313,
+ SI3218X_RAM_TXACCOMP_OUT = 314,
+ SI3218X_RAM_RXACCOMP1 = 315,
+ SI3218X_RAM_RXACCOMP_OUT = 316,
+ SI3218X_RAM_RXACHPF_D1_2 = 317,
+ SI3218X_RAM_RXACHPF_D2_1 = 318,
+ SI3218X_RAM_RXACHPF_D2_2 = 319,
+ SI3218X_RAM_RXACHPF_OUT = 320,
+ SI3218X_RAM_RXACHPF_OUT_1 = 321,
+ SI3218X_RAM_RXACHPF_OUT_2 = 322,
+ SI3218X_RAM_RXACEQ_OUT = 323,
+ SI3218X_RAM_METER_I_1 = 324,
+ SI3218X_RAM_METER_I_OUT = 325,
+ SI3218X_RAM_METER_LPF_1 = 326,
+ SI3218X_RAM_METER_LPF_2 = 327,
+ SI3218X_RAM_METER_LPF_OUT = 328,
+ SI3218X_RAM_METER_BP_1 = 329,
+ SI3218X_RAM_METER_BP_2 = 330,
+ SI3218X_RAM_METER_BP_OUT = 331,
+ SI3218X_RAM_METER_SRC_OUT = 332,
+ SI3218X_RAM_UNUSED333 = 333,
+ SI3218X_RAM_UNUSED334 = 334,
+ SI3218X_RAM_RING_LPF_1 = 335,
+ SI3218X_RAM_RING_LPF_2 = 336,
+ SI3218X_RAM_RING_LPF_OUT = 337,
+ SI3218X_RAM_RING_INTERP_DIFF = 338,
+ SI3218X_RAM_RING_INTERP_DIFF_OUT = 339,
+ SI3218X_RAM_RING_INTERP_INT = 340,
+ SI3218X_RAM_RING_INTERP_INT_OUT = 341,
+ SI3218X_RAM_V_ILIM_TRACK = 342,
+ SI3218X_RAM_V_RFEED_TRACK = 343,
+ SI3218X_RAM_LF_SPEEDUP_CNT = 344,
+ SI3218X_RAM_DC_SPEEDUP_CNT = 345,
+ SI3218X_RAM_AC_SPEEDUP_CNT = 346,
+ SI3218X_RAM_LCR_SPEEDUP_CNT = 347,
+ SI3218X_RAM_CM_SPEEDUP_CNT = 348,
+ SI3218X_RAM_DC_SPEEDUP_MASK = 349,
+ SI3218X_RAM_ZSYNTH_IN = 350,
+ SI3218X_RAM_I_TAR_SAVE = 351,
+ SI3218X_RAM_UNUSED352 = 352,
+ SI3218X_RAM_UNUSED353 = 353,
+ SI3218X_RAM_COUNTER_VTR = 354,
+ SI3218X_RAM_I_RING_AVG = 355,
+ SI3218X_RAM_COUNTER_IRING = 356,
+ SI3218X_RAM_COMP_RATIO = 357,
+ SI3218X_RAM_MADC_VBAT_DIV2 = 358,
+ SI3218X_RAM_VDIFF_PK_T = 359,
+ SI3218X_RAM_PEAK_CNT = 360,
+ SI3218X_RAM_CM_DBI_CNT = 361,
+ SI3218X_RAM_VCM_LAST = 362,
+ SI3218X_RAM_VBATL_SENSE = 363,
+ SI3218X_RAM_VBATH_SENSE = 364,
+ SI3218X_RAM_VBATR_SENSE = 365,
+ SI3218X_RAM_BAT_SETTLE_CNT = 366,
+ SI3218X_RAM_VBAT_TGT = 367,
+ SI3218X_RAM_VBAT_REQ = 368,
+ SI3218X_RAM_VCM_HIRES = 369,
+ SI3218X_RAM_VCM_LORES = 370,
+ SI3218X_RAM_ILOOP1 = 371,
+ SI3218X_RAM_ILONG2 = 372,
+ SI3218X_RAM_ITIP1 = 373,
+ SI3218X_RAM_IRING1 = 374,
+ SI3218X_RAM_CAL_TEMP1 = 375,
+ SI3218X_RAM_CAL_TEMP2 = 376,
+ SI3218X_RAM_CAL_TEMP3 = 377,
+ SI3218X_RAM_CAL_TEMP4 = 378,
+ SI3218X_RAM_CAL_TEMP5 = 379,
+ SI3218X_RAM_CAL_TEMP6 = 380,
+ SI3218X_RAM_CAL_TEMP7 = 381,
+ SI3218X_RAM_CMRR_DIVISOR = 382,
+ SI3218X_RAM_CMRR_REMAINDER = 383,
+ SI3218X_RAM_CMRR_Q_PTR = 384,
+ SI3218X_RAM_I_SOURCE1 = 385,
+ SI3218X_RAM_I_SOURCE2 = 386,
+ SI3218X_RAM_VTR1 = 387,
+ SI3218X_RAM_VTR2 = 388,
+ SI3218X_RAM_STOP_TIMER1 = 389,
+ SI3218X_RAM_STOP_TIMER2 = 390,
+ SI3218X_RAM_UNUSED391 = 391,
+ SI3218X_RAM_UNUSED392 = 392,
+ SI3218X_RAM_CAL_ONHK_Z = 393,
+ SI3218X_RAM_CAL_LB_SETTLE = 394,
+ SI3218X_RAM_CAL_DECLPF_V0 = 395,
+ SI3218X_RAM_CAL_DECLPF_V1 = 396,
+ SI3218X_RAM_CAL_DECLPF_V2 = 397,
+ SI3218X_RAM_CAL_GOERTZEL_V0 = 398,
+ SI3218X_RAM_CAL_GOERTZEL_V1 = 399,
+ SI3218X_RAM_CAL_DECLPF_Y = 400,
+ SI3218X_RAM_CAL_GOERTZEL_Y = 401,
+ SI3218X_RAM_P_HVIC = 402,
+ SI3218X_RAM_VBATL_MIRROR = 403,
+ SI3218X_RAM_VBATH_MIRROR = 404,
+ SI3218X_RAM_VBATR_MIRROR = 405,
+ SI3218X_RAM_DIAG_EX1_OUT = 406,
+ SI3218X_RAM_DIAG_EX2_OUT = 407,
+ SI3218X_RAM_DIAG_DMM_V_OUT = 408,
+ SI3218X_RAM_DIAG_DMM_I_OUT = 409,
+ SI3218X_RAM_DIAG_P = 410,
+ SI3218X_RAM_DIAG_LPF_V = 411,
+ SI3218X_RAM_DIAG_LPF_I = 412,
+ SI3218X_RAM_DIAG_TONE_FLAG = 413,
+ SI3218X_RAM_ILOOP1_LAST = 414,
+ SI3218X_RAM_RING_ENTRY_VOC = 415,
+ SI3218X_RAM_UNUSED416 = 416,
+ SI3218X_RAM_OSC1_X_SAVE = 417,
+ SI3218X_RAM_EZSYNTH_1 = 418,
+ SI3218X_RAM_EZSYNTH_2 = 419,
+ SI3218X_RAM_ZSYNTH_OUT = 420,
+ SI3218X_RAM_UNUSED421 = 421,
+ SI3218X_RAM_CAL_SUBSTATE = 422,
+ SI3218X_RAM_DIAG_EX1_DC_OUT = 423,
+ SI3218X_RAM_DIAG_EX1_DC = 424,
+ SI3218X_RAM_EZSYNTH_B1 = 425,
+ SI3218X_RAM_EZSYNTH_B2 = 426,
+ SI3218X_RAM_EZSYNTH_A1 = 427,
+ SI3218X_RAM_EZSYNTH_A2 = 428,
+ SI3218X_RAM_ILOOP1_FILT = 429,
+ SI3218X_RAM_AC_PU_DELTA1_CNT = 430,
+ SI3218X_RAM_AC_PU_DELTA2_CNT = 431,
+ SI3218X_RAM_UNUSED432 = 432,
+ SI3218X_RAM_UNUSED433 = 433,
+ SI3218X_RAM_UNUSED434 = 434,
+ SI3218X_RAM_AC_DAC_GAIN_SAVE = 435,
+ SI3218X_RAM_RING_FLUSH_CNT = 436,
+ SI3218X_RAM_UNUSED437 = 437,
+ SI3218X_RAM_DIAG_VAR_OUT = 438,
+ SI3218X_RAM_I_VBAT = 439,
+ SI3218X_RAM_UNUSED440 = 440,
+ SI3218X_RAM_CALTMP_LOOPCNT = 441,
+ SI3218X_RAM_CALTMP_LOOPINC = 442,
+ SI3218X_RAM_UNUSED443 = 443,
+ SI3218X_RAM_CALTMP_CODEINC = 444,
+ SI3218X_RAM_CALTMP_TAUINC = 445,
+ SI3218X_RAM_CALTMP_TAU = 446,
+ SI3218X_RAM_CAL_TEMP8 = 447,
+ SI3218X_RAM_PATCHID = 448,
+ SI3218X_RAM_UNUSED449 = 449,
+ SI3218X_RAM_UNUSED450 = 450,
+ SI3218X_RAM_UNUSED451 = 451,
+ SI3218X_RAM_CAL_LB_OFFSET_FWD = 452,
+ SI3218X_RAM_CAL_LB_OFFSET_RVS = 453,
+ SI3218X_RAM_COUNT_SPEEDUP = 454,
+ SI3218X_RAM_SWEEP_COUNT = 455,
+ SI3218X_RAM_AMP_RAMP = 456,
+ SI3218X_RAM_DIAG_LPF_MADC_D = 457,
+ SI3218X_RAM_DIAG_HPF_MADC = 458,
+ SI3218X_RAM_UNUSED459 = 459,
+ SI3218X_RAM_TXDEC_OUT = 460,
+ SI3218X_RAM_TXDEC_D1 = 461,
+ SI3218X_RAM_TXDEC_D2 = 462,
+ SI3218X_RAM_RXDEC_D1 = 463,
+ SI3218X_RAM_RXDEC_D2 = 464,
+ SI3218X_RAM_OSCINT1_D2_1 = 465,
+ SI3218X_RAM_OSCINT1_D1_1 = 466,
+ SI3218X_RAM_OSCINT1_OUT_1 = 467,
+ SI3218X_RAM_OSCINT1_D2_2 = 468,
+ SI3218X_RAM_OSCINT1_D1_2 = 469,
+ SI3218X_RAM_OSCINT1_OUT = 470,
+ SI3218X_RAM_OSCINT2_D2_1 = 471,
+ SI3218X_RAM_OSCINT2_D1_1 = 472,
+ SI3218X_RAM_OSCINT2_OUT_1 = 473,
+ SI3218X_RAM_OSCINT2_D2_2 = 474,
+ SI3218X_RAM_OSCINT2_D1_2 = 475,
+ SI3218X_RAM_OSCINT2_OUT = 476,
+ SI3218X_RAM_OSC1_Y_SAVE = 477,
+ SI3218X_RAM_OSC2_Y_SAVE = 478,
+ SI3218X_RAM_PWRSAVE_CNT = 479,
+ SI3218X_RAM_VBATR_PK = 480,
+ SI3218X_RAM_SPEEDUP_MASK_CNT = 481,
+ SI3218X_RAM_VCM_RING_FIXED = 482,
+ SI3218X_RAM_DELTA_VCM = 483,
+ SI3218X_RAM_MADC_VTIPC_DIAG_OS = 484,
+ SI3218X_RAM_MADC_VRINGC_DIAG_OS = 485,
+ SI3218X_RAM_MADC_VLONG_DIAG_OS = 486,
+ SI3218X_RAM_UNUSED487 = 487,
+ SI3218X_RAM_UNUSED488 = 488,
+ SI3218X_RAM_UNUSED489 = 489,
+ SI3218X_RAM_UNUSED490 = 490,
+ SI3218X_RAM_UNUSED491 = 491,
+ SI3218X_RAM_PWRSAVE_DBI_CNT = 492,
+ SI3218X_RAM_COMP_RATIO_SAVE = 493,
+ SI3218X_RAM_CAL_TEMP9 = 494,
+ SI3218X_RAM_CAL_TEMP10 = 495,
+ SI3218X_RAM_DAC_OFFSET_TEMP = 496,
+ SI3218X_RAM_CAL_DAC_CODE = 497,
+ SI3218X_RAM_DCDAC_OFFSET = 498,
+ SI3218X_RAM_VDIFF_COARSE = 499,
+ SI3218X_RAM_RXACIIR_OUT_4 = 500,
+ SI3218X_RAM_CAL_TEMP11 = 501,
+ SI3218X_RAM_METER_RAMP = 502,
+ SI3218X_RAM_METER_RAMP_DIR = 503,
+ SI3218X_RAM_METER_ON_T = 504,
+ SI3218X_RAM_METER_PK_DET = 505,
+ SI3218X_RAM_METER_PK_DET_T = 506,
+ SI3218X_RAM_THERM_CNT = 507,
+ SI3218X_RAM_VDIFF_SENSE_DELAY = 508,
+ SI3218X_RAM_RING_INTERP_DIFF_SYNC = 509,
+ SI3218X_RAM_CPUMP_DEB_CNT = 510,
+ SI3218X_RAM_UNUSED511 = 511,
+ SI3218X_RAM_MINUS_ONE = 512,
+ SI3218X_RAM_ILOOPLPF = 513,
+ SI3218X_RAM_ILONGLPF = 514,
+ SI3218X_RAM_BATLPF = 515,
+ SI3218X_RAM_VDIFFLPF = 516,
+ SI3218X_RAM_VCMLPF = 517,
+ SI3218X_RAM_TXACIIR_B0_1 = 518,
+ SI3218X_RAM_TXACIIR_B1_1 = 519,
+ SI3218X_RAM_TXACIIR_A1_1 = 520,
+ SI3218X_RAM_TXACIIR_B0_2 = 521,
+ SI3218X_RAM_TXACIIR_B1_2 = 522,
+ SI3218X_RAM_TXACIIR_B2_2 = 523,
+ SI3218X_RAM_TXACIIR_A1_2 = 524,
+ SI3218X_RAM_TXACIIR_A2_2 = 525,
+ SI3218X_RAM_TXACIIR_B0_3 = 526,
+ SI3218X_RAM_TXACIIR_B1_3 = 527,
+ SI3218X_RAM_TXACIIR_B2_3 = 528,
+ SI3218X_RAM_TXACIIR_A1_3 = 529,
+ SI3218X_RAM_TXACIIR_A2_3 = 530,
+ SI3218X_RAM_TXACHPF_B0_1 = 531,
+ SI3218X_RAM_TXACHPF_B1_1 = 532,
+ SI3218X_RAM_TXACHPF_A1_1 = 533,
+ SI3218X_RAM_TXACHPF_B0_2 = 534,
+ SI3218X_RAM_TXACHPF_B1_2 = 535,
+ SI3218X_RAM_TXACHPF_B2_2 = 536,
+ SI3218X_RAM_TXACHPF_A1_2 = 537,
+ SI3218X_RAM_TXACHPF_A2_2 = 538,
+ SI3218X_RAM_TXACHPF_GAIN = 539,
+ SI3218X_RAM_TXACEQ_C0 = 540,
+ SI3218X_RAM_TXACEQ_C1 = 541,
+ SI3218X_RAM_TXACEQ_C2 = 542,
+ SI3218X_RAM_TXACEQ_C3 = 543,
+ SI3218X_RAM_TXACGAIN = 544,
+ SI3218X_RAM_RXACGAIN = 545,
+ SI3218X_RAM_RXACEQ_C0 = 546,
+ SI3218X_RAM_RXACEQ_C1 = 547,
+ SI3218X_RAM_RXACEQ_C2 = 548,
+ SI3218X_RAM_RXACEQ_C3 = 549,
+ SI3218X_RAM_RXACIIR_B0_1 = 550,
+ SI3218X_RAM_RXACIIR_B1_1 = 551,
+ SI3218X_RAM_RXACIIR_A1_1 = 552,
+ SI3218X_RAM_RXACIIR_B0_2 = 553,
+ SI3218X_RAM_RXACIIR_B1_2 = 554,
+ SI3218X_RAM_RXACIIR_B2_2 = 555,
+ SI3218X_RAM_RXACIIR_A1_2 = 556,
+ SI3218X_RAM_RXACIIR_A2_2 = 557,
+ SI3218X_RAM_RXACIIR_B0_3 = 558,
+ SI3218X_RAM_RXACIIR_B1_3 = 559,
+ SI3218X_RAM_RXACIIR_B2_3 = 560,
+ SI3218X_RAM_RXACIIR_A1_3 = 561,
+ SI3218X_RAM_RXACIIR_A2_3 = 562,
+ SI3218X_RAM_ECFIR_C2 = 563,
+ SI3218X_RAM_ECFIR_C3 = 564,
+ SI3218X_RAM_ECFIR_C4 = 565,
+ SI3218X_RAM_ECFIR_C5 = 566,
+ SI3218X_RAM_ECFIR_C6 = 567,
+ SI3218X_RAM_ECFIR_C7 = 568,
+ SI3218X_RAM_ECFIR_C8 = 569,
+ SI3218X_RAM_ECFIR_C9 = 570,
+ SI3218X_RAM_ECIIR_B0 = 571,
+ SI3218X_RAM_ECIIR_B1 = 572,
+ SI3218X_RAM_ECIIR_A1 = 573,
+ SI3218X_RAM_ECIIR_A2 = 574,
+ SI3218X_RAM_DTMFDTF_B0_1 = 575,
+ SI3218X_RAM_DTMFDTF_B1_1 = 576,
+ SI3218X_RAM_DTMFDTF_B2_1 = 577,
+ SI3218X_RAM_DTMFDTF_A1_1 = 578,
+ SI3218X_RAM_DTMFDTF_A2_1 = 579,
+ SI3218X_RAM_DTMFDTF_B0_2 = 580,
+ SI3218X_RAM_DTMFDTF_B1_2 = 581,
+ SI3218X_RAM_DTMFDTF_B2_2 = 582,
+ SI3218X_RAM_DTMFDTF_A1_2 = 583,
+ SI3218X_RAM_DTMFDTF_A2_2 = 584,
+ SI3218X_RAM_DTMFDTF_B0_3 = 585,
+ SI3218X_RAM_DTMFDTF_B1_3 = 586,
+ SI3218X_RAM_DTMFDTF_B2_3 = 587,
+ SI3218X_RAM_DTMFDTF_A1_3 = 588,
+ SI3218X_RAM_DTMFDTF_A2_3 = 589,
+ SI3218X_RAM_DTMFDTF_GAIN = 590,
+ SI3218X_RAM_DTMFLPF_B0_1 = 591,
+ SI3218X_RAM_DTMFLPF_B1_1 = 592,
+ SI3218X_RAM_DTMFLPF_B2_1 = 593,
+ SI3218X_RAM_DTMFLPF_A1_1 = 594,
+ SI3218X_RAM_DTMFLPF_A2_1 = 595,
+ SI3218X_RAM_DTMFLPF_B0_2 = 596,
+ SI3218X_RAM_DTMFLPF_B1_2 = 597,
+ SI3218X_RAM_DTMFLPF_B2_2 = 598,
+ SI3218X_RAM_DTMFLPF_A1_2 = 599,
+ SI3218X_RAM_DTMFLPF_A2_2 = 600,
+ SI3218X_RAM_DTMFLPF_GAIN = 601,
+ SI3218X_RAM_DTMFHPF_B0_1 = 602,
+ SI3218X_RAM_DTMFHPF_B1_1 = 603,
+ SI3218X_RAM_DTMFHPF_B2_1 = 604,
+ SI3218X_RAM_DTMFHPF_A1_1 = 605,
+ SI3218X_RAM_DTMFHPF_A2_1 = 606,
+ SI3218X_RAM_DTMFHPF_B0_2 = 607,
+ SI3218X_RAM_DTMFHPF_B1_2 = 608,
+ SI3218X_RAM_DTMFHPF_B2_2 = 609,
+ SI3218X_RAM_DTMFHPF_A1_2 = 610,
+ SI3218X_RAM_DTMFHPF_A2_2 = 611,
+ SI3218X_RAM_DTMFHPF_GAIN = 612,
+ SI3218X_RAM_POWER_GAIN = 613,
+ SI3218X_RAM_GOERTZEL_GAIN = 614,
+ SI3218X_RAM_MODEM_GAIN = 615,
+ SI3218X_RAM_HOTBIT1 = 616,
+ SI3218X_RAM_HOTBIT0 = 617,
+ SI3218X_RAM_ROW0_C1 = 618,
+ SI3218X_RAM_ROW1_C1 = 619,
+ SI3218X_RAM_ROW2_C1 = 620,
+ SI3218X_RAM_ROW3_C1 = 621,
+ SI3218X_RAM_COL0_C1 = 622,
+ SI3218X_RAM_COL1_C1 = 623,
+ SI3218X_RAM_COL2_C1 = 624,
+ SI3218X_RAM_COL3_C1 = 625,
+ SI3218X_RAM_ROW0_C2 = 626,
+ SI3218X_RAM_ROW1_C2 = 627,
+ SI3218X_RAM_ROW2_C2 = 628,
+ SI3218X_RAM_ROW3_C2 = 629,
+ SI3218X_RAM_COL0_C2 = 630,
+ SI3218X_RAM_COL1_C2 = 631,
+ SI3218X_RAM_COL2_C2 = 632,
+ SI3218X_RAM_COL3_C2 = 633,
+ SI3218X_RAM_SLOPE_VLIM = 634,
+ SI3218X_RAM_SLOPE_RFEED = 635,
+ SI3218X_RAM_SLOPE_ILIM = 636,
+ SI3218X_RAM_SLOPE_RING = 637,
+ SI3218X_RAM_SLOPE_DELTA1 = 638,
+ SI3218X_RAM_SLOPE_DELTA2 = 639,
+ SI3218X_RAM_V_VLIM = 640,
+ SI3218X_RAM_V_RFEED = 641,
+ SI3218X_RAM_V_ILIM = 642,
+ SI3218X_RAM_CONST_RFEED = 643,
+ SI3218X_RAM_CONST_ILIM = 644,
+ SI3218X_RAM_I_VLIM = 645,
+ SI3218X_RAM_DC_DAC_GAIN = 646,
+ SI3218X_RAM_VDIFF_TH = 647,
+ SI3218X_RAM_TXDEC_B0 = 648,
+ SI3218X_RAM_TXDEC_B1 = 649,
+ SI3218X_RAM_TXDEC_B2 = 650,
+ SI3218X_RAM_TXDEC_A1 = 651,
+ SI3218X_RAM_TXDEC_A2 = 652,
+ SI3218X_RAM_ZSYNTH_B0 = 653,
+ SI3218X_RAM_ZSYNTH_B1 = 654,
+ SI3218X_RAM_ZSYNTH_B2 = 655,
+ SI3218X_RAM_ZSYNTH_A1 = 656,
+ SI3218X_RAM_ZSYNTH_A2 = 657,
+ SI3218X_RAM_RXACHPF_B0_1 = 658,
+ SI3218X_RAM_RXACHPF_B1_1 = 659,
+ SI3218X_RAM_RXACHPF_A1_1 = 660,
+ SI3218X_RAM_RXACHPF_B0_2 = 661,
+ SI3218X_RAM_RXACHPF_B1_2 = 662,
+ SI3218X_RAM_RXACHPF_B2_2 = 663,
+ SI3218X_RAM_RXACHPF_A1_2 = 664,
+ SI3218X_RAM_RXACHPF_A2_2 = 665,
+ SI3218X_RAM_RXACHPF_GAIN = 666,
+ SI3218X_RAM_MASK7LSB = 667,
+ SI3218X_RAM_RXDEC_B0 = 668,
+ SI3218X_RAM_RXDEC_B1 = 669,
+ SI3218X_RAM_RXDEC_B2 = 670,
+ SI3218X_RAM_RXDEC_A1 = 671,
+ SI3218X_RAM_RXDEC_A2 = 672,
+ SI3218X_RAM_OSCINT1_B0_1 = 673,
+ SI3218X_RAM_OSCINT1_B1_1 = 674,
+ SI3218X_RAM_OSCINT1_B2_1 = 675,
+ SI3218X_RAM_OSCINT1_A1_1 = 676,
+ SI3218X_RAM_OSCINT1_A2_1 = 677,
+ SI3218X_RAM_OSCINT1_B0_2 = 678,
+ SI3218X_RAM_OSCINT1_B1_2 = 679,
+ SI3218X_RAM_OSCINT1_B2_2 = 680,
+ SI3218X_RAM_OSCINT1_A1_2 = 681,
+ SI3218X_RAM_OSCINT1_A2_2 = 682,
+ SI3218X_RAM_OSCINT2_B0_1 = 683,
+ SI3218X_RAM_OSCINT2_B1_1 = 684,
+ SI3218X_RAM_OSCINT2_B2_1 = 685,
+ SI3218X_RAM_OSCINT2_A1_1 = 686,
+ SI3218X_RAM_OSCINT2_A2_1 = 687,
+ SI3218X_RAM_OSCINT2_B0_2 = 688,
+ SI3218X_RAM_OSCINT2_B1_2 = 689,
+ SI3218X_RAM_OSCINT2_B2_2 = 690,
+ SI3218X_RAM_OSCINT2_A1_2 = 691,
+ SI3218X_RAM_OSCINT2_A2_2 = 692,
+ SI3218X_RAM_UNUSED693 = 693,
+ SI3218X_RAM_UNUSED694 = 694,
+ SI3218X_RAM_UNUSED695 = 695,
+ SI3218X_RAM_RING_LPF_B0 = 696,
+ SI3218X_RAM_RING_LPF_B1 = 697,
+ SI3218X_RAM_RING_LPF_B2 = 698,
+ SI3218X_RAM_RING_LPF_A1 = 699,
+ SI3218X_RAM_RING_LPF_A2 = 700,
+ SI3218X_RAM_LCRDBI = 701,
+ SI3218X_RAM_LONGDBI = 702,
+ SI3218X_RAM_VBAT_TIMER = 703,
+ SI3218X_RAM_LF_SPEEDUP_TIMER = 704,
+ SI3218X_RAM_DC_SPEEDUP_TIMER = 705,
+ SI3218X_RAM_AC_SPEEDUP_TIMER = 706,
+ SI3218X_RAM_LCR_SPEEDUP_TIMER = 707,
+ SI3218X_RAM_CM_SPEEDUP_TIMER = 708,
+ SI3218X_RAM_VCM_TH = 709,
+ SI3218X_RAM_AC_SPEEDUP_TH = 710,
+ SI3218X_RAM_SPR_SIG_0 = 711,
+ SI3218X_RAM_SPR_SIG_1 = 712,
+ SI3218X_RAM_SPR_SIG_2 = 713,
+ SI3218X_RAM_SPR_SIG_3 = 714,
+ SI3218X_RAM_SPR_SIG_4 = 715,
+ SI3218X_RAM_SPR_SIG_5 = 716,
+ SI3218X_RAM_SPR_SIG_6 = 717,
+ SI3218X_RAM_SPR_SIG_7 = 718,
+ SI3218X_RAM_SPR_SIG_8 = 719,
+ SI3218X_RAM_SPR_SIG_9 = 720,
+ SI3218X_RAM_SPR_SIG_10 = 721,
+ SI3218X_RAM_SPR_SIG_11 = 722,
+ SI3218X_RAM_SPR_SIG_12 = 723,
+ SI3218X_RAM_SPR_SIG_13 = 724,
+ SI3218X_RAM_SPR_SIG_14 = 725,
+ SI3218X_RAM_SPR_SIG_15 = 726,
+ SI3218X_RAM_SPR_SIG_16 = 727,
+ SI3218X_RAM_SPR_SIG_17 = 728,
+ SI3218X_RAM_SPR_SIG_18 = 729,
+ SI3218X_RAM_COUNTER_VTR_VAL = 730,
+ SI3218X_RAM_CONST_028 = 731,
+ SI3218X_RAM_CONST_032 = 732,
+ SI3218X_RAM_CONST_038 = 733,
+ SI3218X_RAM_CONST_046 = 734,
+ SI3218X_RAM_COUNTER_IRING_VAL = 735,
+ SI3218X_RAM_GAIN_RING = 736,
+ SI3218X_RAM_RING_HYST = 737,
+ SI3218X_RAM_COMP_Z = 738,
+ SI3218X_RAM_CONST_115 = 739,
+ SI3218X_RAM_CONST_110 = 740,
+ SI3218X_RAM_CONST_105 = 741,
+ SI3218X_RAM_CONST_100 = 742,
+ SI3218X_RAM_CONST_095 = 743,
+ SI3218X_RAM_CONST_090 = 744,
+ SI3218X_RAM_CONST_085 = 745,
+ SI3218X_RAM_V_RASUM_IDEAL = 746,
+ SI3218X_RAM_CONST_ONE = 747,
+ SI3218X_RAM_VCM_OH = 748,
+ SI3218X_RAM_VCM_RING = 749,
+ SI3218X_RAM_VCM_HYST = 750,
+ SI3218X_RAM_VOV_GND = 751,
+ SI3218X_RAM_VOV_BAT = 752,
+ SI3218X_RAM_VOV_RING_BAT = 753,
+ SI3218X_RAM_CM_DBI = 754,
+ SI3218X_RAM_RTPER = 755,
+ SI3218X_RAM_P_TH_HVIC = 756,
+ SI3218X_RAM_UNUSED757 = 757,
+ SI3218X_RAM_UNUSED758 = 758,
+ SI3218X_RAM_COEF_P_HVIC = 759,
+ SI3218X_RAM_UNUSED760 = 760,
+ SI3218X_RAM_UNUSED761 = 761,
+ SI3218X_RAM_UNUSED762 = 762,
+ SI3218X_RAM_UNUSED763 = 763,
+ SI3218X_RAM_BAT_HYST = 764,
+ SI3218X_RAM_BAT_DBI = 765,
+ SI3218X_RAM_VBATL_EXPECT = 766,
+ SI3218X_RAM_VBATH_EXPECT = 767,
+ SI3218X_RAM_VBATR_EXPECT = 768,
+ SI3218X_RAM_BAT_SETTLE = 769,
+ SI3218X_RAM_VBAT_IRQ_TH = 770,
+ SI3218X_RAM_MADC_VTIPC_OS = 771,
+ SI3218X_RAM_MADC_VRINGC_OS = 772,
+ SI3218X_RAM_MADC_VBAT_OS = 773,
+ SI3218X_RAM_MADC_VLONG_OS = 774,
+ SI3218X_RAM_UNUSED775 = 775,
+ SI3218X_RAM_MADC_VDC_OS = 776,
+ SI3218X_RAM_MADC_ILONG_OS = 777,
+ SI3218X_RAM_UNUSED778 = 778,
+ SI3218X_RAM_UNUSED779 = 779,
+ SI3218X_RAM_MADC_ILOOP_OS = 780,
+ SI3218X_RAM_MADC_ILOOP_SCALE = 781,
+ SI3218X_RAM_UNUSED782 = 782,
+ SI3218X_RAM_UNUSED783 = 783,
+ SI3218X_RAM_DC_ADC_OS = 784,
+ SI3218X_RAM_CAL_UNITY = 785,
+ SI3218X_RAM_UNUSED786 = 786,
+ SI3218X_RAM_UNUSED787 = 787,
+ SI3218X_RAM_ACADC_OFFSET = 788,
+ SI3218X_RAM_ACDAC_OFFSET = 789,
+ SI3218X_RAM_CAL_DCDAC_CODE = 790,
+ SI3218X_RAM_CAL_DCDAC_15MA = 791,
+ SI3218X_RAM_UNUSED792 = 792,
+ SI3218X_RAM_UNUSED793 = 793,
+ SI3218X_RAM_UNUSED794 = 794,
+ SI3218X_RAM_UNUSED795 = 795,
+ SI3218X_RAM_UNUSED796 = 796,
+ SI3218X_RAM_UNUSED797 = 797,
+ SI3218X_RAM_UNUSED798 = 798,
+ SI3218X_RAM_UNUSED799 = 799,
+ SI3218X_RAM_UNUSED800 = 800,
+ SI3218X_RAM_CAL_LB_TSQUELCH = 801,
+ SI3218X_RAM_CAL_LB_TCHARGE = 802,
+ SI3218X_RAM_CAL_LB_TSETTLE0 = 803,
+ SI3218X_RAM_CAL_GOERTZEL_DLY = 804,
+ SI3218X_RAM_CAL_GOERTZEL_ALPHA = 805,
+ SI3218X_RAM_CAL_DECLPF_K = 806,
+ SI3218X_RAM_CAL_DECLPF_B1 = 807,
+ SI3218X_RAM_CAL_DECLPF_B2 = 808,
+ SI3218X_RAM_CAL_DECLPF_A1 = 809,
+ SI3218X_RAM_CAL_DECLPF_A2 = 810,
+ SI3218X_RAM_CAL_ACADC_THRL = 811,
+ SI3218X_RAM_CAL_ACADC_THRH = 812,
+ SI3218X_RAM_CAL_ACADC_TSETTLE = 813,
+ SI3218X_RAM_DTROW0TH = 814,
+ SI3218X_RAM_DTROW1TH = 815,
+ SI3218X_RAM_DTROW2TH = 816,
+ SI3218X_RAM_DTROW3TH = 817,
+ SI3218X_RAM_DTCOL0TH = 818,
+ SI3218X_RAM_DTCOL1TH = 819,
+ SI3218X_RAM_DTCOL2TH = 820,
+ SI3218X_RAM_DTCOL3TH = 821,
+ SI3218X_RAM_DTFTWTH = 822,
+ SI3218X_RAM_DTRTWTH = 823,
+ SI3218X_RAM_DTROWRTH = 824,
+ SI3218X_RAM_DTCOLRTH = 825,
+ SI3218X_RAM_DTROW2HTH = 826,
+ SI3218X_RAM_DTCOL2HTH = 827,
+ SI3218X_RAM_DTMINPTH = 828,
+ SI3218X_RAM_DTHOTTH = 829,
+ SI3218X_RAM_RXPWR = 830,
+ SI3218X_RAM_TXPWR = 831,
+ SI3218X_RAM_RXMODPWR = 832,
+ SI3218X_RAM_TXMODPWR = 833,
+ SI3218X_RAM_FSKFREQ0 = 834,
+ SI3218X_RAM_FSKFREQ1 = 835,
+ SI3218X_RAM_FSKAMP0 = 836,
+ SI3218X_RAM_FSKAMP1 = 837,
+ SI3218X_RAM_FSK01 = 838,
+ SI3218X_RAM_FSK10 = 839,
+ SI3218X_RAM_VOCDELTA = 840,
+ SI3218X_RAM_VOCLTH = 841,
+ SI3218X_RAM_VOCHTH = 842,
+ SI3218X_RAM_RINGOF = 843,
+ SI3218X_RAM_RINGFR = 844,
+ SI3218X_RAM_RINGAMP = 845,
+ SI3218X_RAM_RINGPHAS = 846,
+ SI3218X_RAM_RTDCTH = 847,
+ SI3218X_RAM_RTACTH = 848,
+ SI3218X_RAM_RTDCDB = 849,
+ SI3218X_RAM_RTACDB = 850,
+ SI3218X_RAM_RTCOUNT = 851,
+ SI3218X_RAM_LCROFFHK = 852,
+ SI3218X_RAM_LCRONHK = 853,
+ SI3218X_RAM_LCRMASK = 854,
+ SI3218X_RAM_LCRMASK_POLREV = 855,
+ SI3218X_RAM_LCRMASK_STATE = 856,
+ SI3218X_RAM_LCRMASK_LINECAP = 857,
+ SI3218X_RAM_LONGHITH = 858,
+ SI3218X_RAM_LONGLOTH = 859,
+ SI3218X_RAM_IRING_LIM = 860,
+ SI3218X_RAM_AC_PU_DELTA1 = 861,
+ SI3218X_RAM_AC_PU_DELTA2 = 862,
+ SI3218X_RAM_DIAG_LPF_8K = 863,
+ SI3218X_RAM_DIAG_LPF_128K = 864,
+ SI3218X_RAM_DIAG_INV_N = 865,
+ SI3218X_RAM_DIAG_GAIN = 866,
+ SI3218X_RAM_DIAG_G_CAL = 867,
+ SI3218X_RAM_DIAG_OS_CAL = 868,
+ SI3218X_RAM_SPR_GAIN_TRIM = 869,
+ SI3218X_RAM_UNUSED870 = 870,
+ SI3218X_RAM_AC_DAC_GAIN = 871,
+ SI3218X_RAM_UNUSED872 = 872,
+ SI3218X_RAM_UNUSED873 = 873,
+ SI3218X_RAM_AC_DAC_GAIN0 = 874,
+ SI3218X_RAM_EZSYNTH_B0 = 875,
+ SI3218X_RAM_UNUSED876 = 876,
+ SI3218X_RAM_UNUSED877 = 877,
+ SI3218X_RAM_UNUSED878 = 878,
+ SI3218X_RAM_UNUSED879 = 879,
+ SI3218X_RAM_AC_ADC_GAIN = 880,
+ SI3218X_RAM_ILOOP1LPF = 881,
+ SI3218X_RAM_RING_FLUSH_TIMER = 882,
+ SI3218X_RAM_ALAW_BIAS = 883,
+ SI3218X_RAM_MADC_VTRC_SCALE = 884,
+ SI3218X_RAM_UNUSED885 = 885,
+ SI3218X_RAM_MADC_VBAT_SCALE = 886,
+ SI3218X_RAM_MADC_VLONG_SCALE = 887,
+ SI3218X_RAM_MADC_VLONG_SCALE_RING = 888,
+ SI3218X_RAM_UNUSED889 = 889,
+ SI3218X_RAM_MADC_VDC_SCALE = 890,
+ SI3218X_RAM_MADC_ILONG_SCALE = 891,
+ SI3218X_RAM_UNUSED892 = 892,
+ SI3218X_RAM_UNUSED893 = 893,
+ SI3218X_RAM_VDIFF_SENSE_SCALE = 894,
+ SI3218X_RAM_VDIFF_SENSE_SCALE_RING = 895,
+ SI3218X_RAM_VOV_RING_GND = 896,
+ SI3218X_RAM_DIAG_GAIN_DC = 897,
+ SI3218X_RAM_CAL_LB_OSC1_FREQ = 898,
+ SI3218X_RAM_CAL_DCDAC_9TAU = 899,
+ SI3218X_RAM_CAL_MADC_9TAU = 900,
+ SI3218X_RAM_ADAP_RING_MIN_I = 901,
+ SI3218X_RAM_SWEEP_STEP = 902,
+ SI3218X_RAM_SWEEP_STEP_SAVE = 903,
+ SI3218X_RAM_SWEEP_REF = 904,
+ SI3218X_RAM_AMP_STEP = 905,
+ SI3218X_RAM_RXACGAIN_SAVE = 906,
+ SI3218X_RAM_AMP_RAMP_INIT = 907,
+ SI3218X_RAM_DIAG_HPF_GAIN = 908,
+ SI3218X_RAM_DIAG_HPF_8K = 909,
+ SI3218X_RAM_DIAG_ADJ_STEP = 910,
+ SI3218X_RAM_UNUSED911 = 911,
+ SI3218X_RAM_UNUSED912 = 912,
+ SI3218X_RAM_MADC_SCALE_INV = 913,
+ SI3218X_RAM_UNUSED914 = 914,
+ SI3218X_RAM_PWRSAVE_TIMER = 915,
+ SI3218X_RAM_OFFHOOK_THRESH = 916,
+ SI3218X_RAM_SPEEDUP_MASK_TIMER = 917,
+ SI3218X_RAM_UNUSED918 = 918,
+ SI3218X_RAM_VBAT_TRACK_MIN = 919,
+ SI3218X_RAM_VBAT_TRACK_MIN_RNG = 920,
+ SI3218X_RAM_UNUSED921 = 921,
+ SI3218X_RAM_UNUSED922 = 922,
+ SI3218X_RAM_UNUSED923 = 923,
+ SI3218X_RAM_UNUSED924 = 924,
+ SI3218X_RAM_UNUSED925 = 925,
+ SI3218X_RAM_UNUSED926 = 926,
+ SI3218X_RAM_DC_HOLD_DAC_OS = 927,
+ SI3218X_RAM_UNUSED928 = 928,
+ SI3218X_RAM_NOTCH_B0 = 929,
+ SI3218X_RAM_NOTCH_B1 = 930,
+ SI3218X_RAM_NOTCH_B2 = 931,
+ SI3218X_RAM_NOTCH_A1 = 932,
+ SI3218X_RAM_NOTCH_A2 = 933,
+ SI3218X_RAM_METER_LPF_B0 = 934,
+ SI3218X_RAM_METER_LPF_B1 = 935,
+ SI3218X_RAM_METER_LPF_B2 = 936,
+ SI3218X_RAM_METER_LPF_A1 = 937,
+ SI3218X_RAM_METER_LPF_A2 = 938,
+ SI3218X_RAM_METER_SIG_0 = 939,
+ SI3218X_RAM_METER_SIG_1 = 940,
+ SI3218X_RAM_METER_SIG_2 = 941,
+ SI3218X_RAM_METER_SIG_3 = 942,
+ SI3218X_RAM_METER_SIG_4 = 943,
+ SI3218X_RAM_METER_SIG_5 = 944,
+ SI3218X_RAM_METER_SIG_6 = 945,
+ SI3218X_RAM_METER_SIG_7 = 946,
+ SI3218X_RAM_METER_SIG_8 = 947,
+ SI3218X_RAM_METER_SIG_9 = 948,
+ SI3218X_RAM_METER_SIG_10 = 949,
+ SI3218X_RAM_METER_SIG_11 = 950,
+ SI3218X_RAM_METER_SIG_12 = 951,
+ SI3218X_RAM_METER_SIG_13 = 952,
+ SI3218X_RAM_METER_SIG_14 = 953,
+ SI3218X_RAM_METER_SIG_15 = 954,
+ SI3218X_RAM_METER_BP_B0 = 955,
+ SI3218X_RAM_METER_BP_B1 = 956,
+ SI3218X_RAM_METER_BP_B2 = 957,
+ SI3218X_RAM_METER_BP_A1 = 958,
+ SI3218X_RAM_METER_BP_A2 = 959,
+ SI3218X_RAM_PM_AMP_THRESH = 960,
+ SI3218X_RAM_METER_GAIN = 961,
+ SI3218X_RAM_PWRSAVE_DBI = 962,
+ SI3218X_RAM_DCDC_ANA_SCALE = 963,
+ SI3218X_RAM_VOV_BAT_PWRSAVE_LO = 964,
+ SI3218X_RAM_VOV_BAT_PWRSAVE_HI = 965,
+ SI3218X_RAM_AC_ADC_GAIN0 = 966,
+ SI3218X_RAM_SCALE_KAUDIO = 967,
+ SI3218X_RAM_METER_GAIN_TEMP = 968,
+ SI3218X_RAM_METER_RAMP_STEP = 969,
+ SI3218X_RAM_THERM_DBI = 970,
+ SI3218X_RAM_LPR_SCALE = 971,
+ SI3218X_RAM_LPR_CM_OS = 972,
+ SI3218X_RAM_VOV_DCDC_SLOPE = 973,
+ SI3218X_RAM_VOV_DCDC_OS = 974,
+ SI3218X_RAM_VOV_RING_BAT_MAX = 975,
+ SI3218X_RAM_SLOPE_VLIM1 = 976,
+ SI3218X_RAM_SLOPE_RFEED1 = 977,
+ SI3218X_RAM_SLOPE_ILIM1 = 978,
+ SI3218X_RAM_V_VLIM1 = 979,
+ SI3218X_RAM_V_RFEED1 = 980,
+ SI3218X_RAM_V_ILIM1 = 981,
+ SI3218X_RAM_CONST_RFEED1 = 982,
+ SI3218X_RAM_CONST_ILIM1 = 983,
+ SI3218X_RAM_I_VLIM1 = 984,
+ SI3218X_RAM_SLOPE_VLIM2 = 985,
+ SI3218X_RAM_SLOPE_RFEED2 = 986,
+ SI3218X_RAM_SLOPE_ILIM2 = 987,
+ SI3218X_RAM_V_VLIM2 = 988,
+ SI3218X_RAM_V_RFEED2 = 989,
+ SI3218X_RAM_V_ILIM2 = 990,
+ SI3218X_RAM_CONST_RFEED2 = 991,
+ SI3218X_RAM_CONST_ILIM2 = 992,
+ SI3218X_RAM_I_VLIM2 = 993,
+ SI3218X_RAM_DIAG_V_TAR = 994,
+ SI3218X_RAM_DIAG_V_TAR2 = 995,
+ SI3218X_RAM_STOP_TIMER1_VAL = 996,
+ SI3218X_RAM_STOP_TIMER2_VAL = 997,
+ SI3218X_RAM_DIAG_VCM1_TAR = 998,
+ SI3218X_RAM_DIAG_VCM_STEP = 999,
+ SI3218X_RAM_LKG_DNT_HIRES = 1000,
+ SI3218X_RAM_LKG_DNR_HIRES = 1001,
+ SI3218X_RAM_LINEAR_OS = 1002,
+ SI3218X_RAM_CPUMP_DEB = 1003,
+ SI3218X_RAM_DCDC_VERR = 1004,
+ SI3218X_RAM_DCDC_VERR_HYST = 1005,
+ SI3218X_RAM_DCDC_OITHRESH_LO = 1006,
+ SI3218X_RAM_DCDC_OITHRESH_HI = 1007,
+ SI3218X_RAM_HV_BIAS_ONHK = 1008,
+ SI3218X_RAM_HV_BIAS_OFFHK = 1009,
+ SI3218X_RAM_UNUSED1010 = 1010,
+ SI3218X_RAM_UNUSED1011 = 1011,
+ SI3218X_RAM_UNUSED1012 = 1012,
+ SI3218X_RAM_UNUSED1013 = 1013,
+ SI3218X_RAM_ILONG_RT_THRESH = 1014,
+ SI3218X_RAM_VOV_RING_BAT_DCDC = 1015,
+ SI3218X_RAM_UNUSED1016 = 1016,
+ SI3218X_RAM_LKG_LB_OFFSET = 1017,
+ SI3218X_RAM_LKG_OFHK_OFFSET = 1018,
+ SI3218X_RAM_SWEEP_FREQ_TH = 1019,
+ SI3218X_RAM_AMP_MOD_G = 1020,
+ SI3218X_RAM_AMP_MOD_OS = 1021,
+ SI3218X_RAM_UNUSED1022 = 1022,
+ SI3218X_RAM_UNUSED1023 = 1023,
+ SI3218X_RAM_UNUSED_REG256 = 1280,
+ SI3218X_RAM_DAC_IN = 1281,
+ SI3218X_RAM_ADC_OUT = 1282,
+ SI3218X_RAM_PASS1 = 1283,
+ SI3218X_RAM_TX_AC_INT = 1284,
+ SI3218X_RAM_RX_AC_DIFF = 1285,
+ SI3218X_RAM_INDIRECT_WR = 1286,
+ SI3218X_RAM_INDIRECT_RD = 1287,
+ SI3218X_RAM_BYPASS_OUT = 1288,
+ SI3218X_RAM_ACC = 1289,
+ SI3218X_RAM_INDIRECT_RAM_A = 1290,
+ SI3218X_RAM_INDIRECT_RAM_B = 1291,
+ SI3218X_RAM_HOT_BIT1 = 1292,
+ SI3218X_RAM_HOT_BIT0 = 1293,
+ SI3218X_RAM_PASS0_ROW_PWR = 1294,
+ SI3218X_RAM_PASS0_COL_PWR = 1295,
+ SI3218X_RAM_PASS0_ROW = 1296,
+ SI3218X_RAM_PASS0_COL = 1297,
+ SI3218X_RAM_PASS0_ROW_REL = 1298,
+ SI3218X_RAM_PASS0_COL_REL = 1299,
+ SI3218X_RAM_PASS0_ROW_2ND = 1300,
+ SI3218X_RAM_PASS0_COL_2ND = 1301,
+ SI3218X_RAM_PASS0_REV_TW = 1302,
+ SI3218X_RAM_PASS0_FWD_TW = 1303,
+ SI3218X_RAM_DAA_ADC_OUT = 1304,
+ SI3218X_RAM_CAL_CM_BAL_TEST = 1305,
+ SI3218X_RAM_UNUSED_REG282 = 1306,
+ SI3218X_RAM_TONE1 = 1307,
+ SI3218X_RAM_TONE2 = 1308,
+ SI3218X_RAM_RING_TRIG = 1309,
+ SI3218X_RAM_VCM_DAC = 1310,
+ SI3218X_RAM_UNUSED_REG287 = 1311,
+ SI3218X_RAM_RING_DAC = 1312,
+ SI3218X_RAM_VRING_CROSSING = 1313,
+ SI3218X_RAM_UNUSED_REG290 = 1314,
+ SI3218X_RAM_LINEFEED_SHADOW = 1315,
+ SI3218X_RAM_UNUSED_REG292 = 1316,
+ SI3218X_RAM_UNUSED_REG293 = 1317,
+ SI3218X_RAM_UNUSED_REG294 = 1318,
+ SI3218X_RAM_ROW_DIGIT = 1319,
+ SI3218X_RAM_COL_DIGIT = 1320,
+ SI3218X_RAM_UNUSED_REG297 = 1321,
+ SI3218X_RAM_PQ1_IRQ = 1322,
+ SI3218X_RAM_PQ2_IRQ = 1323,
+ SI3218X_RAM_PQ3_IRQ = 1324,
+ SI3218X_RAM_PQ4_IRQ = 1325,
+ SI3218X_RAM_PQ5_IRQ = 1326,
+ SI3218X_RAM_PQ6_IRQ = 1327,
+ SI3218X_RAM_LCR_SET = 1328,
+ SI3218X_RAM_LCR_CLR = 1329,
+ SI3218X_RAM_RTP_SET = 1330,
+ SI3218X_RAM_LONG_SET = 1331,
+ SI3218X_RAM_LONG_CLR = 1332,
+ SI3218X_RAM_VDIFF_IRQ = 1333,
+ SI3218X_RAM_MODFEED_SET = 1334,
+ SI3218X_RAM_MODFEED_CLR = 1335,
+ SI3218X_RAM_LF_SPEEDUP_SET = 1336,
+ SI3218X_RAM_LF_SPEEDUP_CLR = 1337,
+ SI3218X_RAM_DC_SPEEDUP_SET = 1338,
+ SI3218X_RAM_DC_SPEEDUP_CLR = 1339,
+ SI3218X_RAM_AC_SPEEDUP_SET = 1340,
+ SI3218X_RAM_AC_SPEEDUP_CLR = 1341,
+ SI3218X_RAM_LCR_SPEEDUP_SET = 1342,
+ SI3218X_RAM_LCR_SPEEDUP_CLR = 1343,
+ SI3218X_RAM_CM_SPEEDUP_SET = 1344,
+ SI3218X_RAM_CM_SPEEDUP_CLR = 1345,
+ SI3218X_RAM_MODEMPASS0 = 1346,
+ SI3218X_RAM_RX2100_PASS1_PWR = 1347,
+ SI3218X_RAM_RX2100_PASS1_THR = 1348,
+ SI3218X_RAM_TX2100_PASS1_PWR = 1349,
+ SI3218X_RAM_TX2100_PASS1_THR = 1350,
+ SI3218X_RAM_TXMDM_TRIG = 1351,
+ SI3218X_RAM_RXMDM_TRIG = 1352,
+ SI3218X_RAM_UNUSED_REG329 = 1353,
+ SI3218X_RAM_TX_FILT_CLR = 1354,
+ SI3218X_RAM_TX_DC_INT = 1355,
+ SI3218X_RAM_RX_DC_MOD_IN = 1356,
+ SI3218X_RAM_DSP_ACCESS = 1357,
+ SI3218X_RAM_PRAM_ADDR = 1358,
+ SI3218X_RAM_PRAM_DATA = 1359,
+ SI3218X_RAM_IND_RAM_A_BASE = 1360,
+ SI3218X_RAM_IND_RAM_A_ADDR = 1361,
+ SI3218X_RAM_IND_RAM_A_MOD = 1362,
+ SI3218X_RAM_IND_RAM_B_BASE = 1363,
+ SI3218X_RAM_IND_RAM_B_ADDR = 1364,
+ SI3218X_RAM_IND_RAM_B_MOD = 1365,
+ SI3218X_RAM_UNUSED_REG342 = 1366,
+ SI3218X_RAM_UNUSED_REG343 = 1367,
+ SI3218X_RAM_UNUSED_REG344 = 1368,
+ SI3218X_RAM_USER_B0 = 1369,
+ SI3218X_RAM_USER_B1 = 1370,
+ SI3218X_RAM_USER_B2 = 1371,
+ SI3218X_RAM_USER_B3 = 1372,
+ SI3218X_RAM_USER_B4 = 1373,
+ SI3218X_RAM_USER_B5 = 1374,
+ SI3218X_RAM_USER_B6 = 1375,
+ SI3218X_RAM_USER_B7 = 1376,
+ SI3218X_RAM_FLUSH_AUDIO_CLR = 1377,
+ SI3218X_RAM_FLUSH_DC_CLR = 1378,
+ SI3218X_RAM_SPR_CLR = 1379,
+ SI3218X_RAM_GPI0 = 1380,
+ SI3218X_RAM_GPI1 = 1381,
+ SI3218X_RAM_GPI2 = 1382,
+ SI3218X_RAM_GPI3 = 1383,
+ SI3218X_RAM_GPO0 = 1384,
+ SI3218X_RAM_GPO1 = 1385,
+ SI3218X_RAM_GPO2 = 1386,
+ SI3218X_RAM_GPO3 = 1387,
+ SI3218X_RAM_GPO0_OE = 1388,
+ SI3218X_RAM_GPO1_OE = 1389,
+ SI3218X_RAM_GPO2_OE = 1390,
+ SI3218X_RAM_GPO3_OE = 1391,
+ SI3218X_RAM_BATSEL_L_SET = 1392,
+ SI3218X_RAM_BATSEL_H_SET = 1393,
+ SI3218X_RAM_BATSEL_R_SET = 1394,
+ SI3218X_RAM_BATSEL_CLR = 1395,
+ SI3218X_RAM_VBAT_IRQ = 1396,
+ SI3218X_RAM_MADC_VTIPC_RAW = 1397,
+ SI3218X_RAM_MADC_VRINGC_RAW = 1398,
+ SI3218X_RAM_MADC_VBAT_RAW = 1399,
+ SI3218X_RAM_MADC_VLONG_RAW = 1400,
+ SI3218X_RAM_UNUSED_REG377 = 1401,
+ SI3218X_RAM_MADC_VDC_RAW = 1402,
+ SI3218X_RAM_MADC_ILONG_RAW = 1403,
+ SI3218X_RAM_UNUSED_REG380 = 1404,
+ SI3218X_RAM_UNUSED_REG381 = 1405,
+ SI3218X_RAM_MADC_ILOOP_RAW = 1406,
+ SI3218X_RAM_MADC_DIAG_RAW = 1407,
+ SI3218X_RAM_UNUSED_REG384 = 1408,
+ SI3218X_RAM_UNUSED_REG385 = 1409,
+ SI3218X_RAM_CALR3_DSP = 1410,
+ SI3218X_RAM_PD_MADC = 1411,
+ SI3218X_RAM_UNUSED_REG388 = 1412,
+ SI3218X_RAM_PD_BIAS = 1413,
+ SI3218X_RAM_PD_DC_ADC = 1414,
+ SI3218X_RAM_PD_DC_DAC = 1415,
+ SI3218X_RAM_PD_DC_SNS = 1416,
+ SI3218X_RAM_PD_DC_COARSE_SNS = 1417,
+ SI3218X_RAM_PD_VBAT_SNS = 1418,
+ SI3218X_RAM_PD_DC_BUF = 1419,
+ SI3218X_RAM_PD_AC_ADC = 1420,
+ SI3218X_RAM_PD_AC_DAC = 1421,
+ SI3218X_RAM_PD_AC_SNS = 1422,
+ SI3218X_RAM_PD_CM_SNS = 1423,
+ SI3218X_RAM_PD_CM = 1424,
+ SI3218X_RAM_UNUSED_REG401 = 1425,
+ SI3218X_RAM_UNUSED_REG402 = 1426,
+ SI3218X_RAM_PD_SUM = 1427,
+ SI3218X_RAM_PD_LKGDAC = 1428,
+ SI3218X_RAM_UNUSED_REG405 = 1429,
+ SI3218X_RAM_PD_HVIC = 1430,
+ SI3218X_RAM_UNUSED_REG407 = 1431,
+ SI3218X_RAM_CMDAC_CHEN_B = 1432,
+ SI3218X_RAM_SUM_CHEN_B = 1433,
+ SI3218X_RAM_TRNRD_CHEN_B = 1434,
+ SI3218X_RAM_UNUSED_REG411 = 1435,
+ SI3218X_RAM_DC_BUF_CHEN_B = 1436,
+ SI3218X_RAM_AC_SNS_CHEN_B = 1437,
+ SI3218X_RAM_DC_SNS_CHEN_B = 1438,
+ SI3218X_RAM_LB_MUX_CHEN_B = 1439,
+ SI3218X_RAM_UNUSED_REG416 = 1440,
+ SI3218X_RAM_CMDAC_EN_B = 1441,
+ SI3218X_RAM_RA_EN_B = 1442,
+ SI3218X_RAM_RD_EN_B = 1443,
+ SI3218X_RAM_VCTL = 1444,
+ SI3218X_RAM_UNUSED_REG421 = 1445,
+ SI3218X_RAM_UNUSED_REG422 = 1446,
+ SI3218X_RAM_HVIC_STATE = 1447,
+ SI3218X_RAM_HVIC_STATE_OBSERVE = 1448,
+ SI3218X_RAM_HVIC_STATE_MAN = 1449,
+ SI3218X_RAM_HVIC_STATE_READ = 1450,
+ SI3218X_RAM_UNUSED_REG427 = 1451,
+ SI3218X_RAM_VCMDAC_SCALE_MAN = 1452,
+ SI3218X_RAM_CAL_ACADC_CNTL = 1453,
+ SI3218X_RAM_CAL_ACDAC_CNTL = 1454,
+ SI3218X_RAM_UNUSED_REG431 = 1455,
+ SI3218X_RAM_CAL_DCDAC_CNTL = 1456,
+ SI3218X_RAM_CAL_TRNRD_CNTL = 1457,
+ SI3218X_RAM_CAL_TRNRD_DACT = 1458,
+ SI3218X_RAM_CAL_TRNRD_DACR = 1459,
+ SI3218X_RAM_LKG_UPT_ACTIVE = 1460,
+ SI3218X_RAM_LKG_UPR_ACTIVE = 1461,
+ SI3218X_RAM_LKG_DNT_ACTIVE = 1462,
+ SI3218X_RAM_LKG_DNR_ACTIVE = 1463,
+ SI3218X_RAM_LKG_UPT_OHT = 1464,
+ SI3218X_RAM_LKG_UPR_OHT = 1465,
+ SI3218X_RAM_LKG_DNT_OHT = 1466,
+ SI3218X_RAM_LKG_DNR_OHT = 1467,
+ SI3218X_RAM_CAL_LKG_EN_CNTL = 1468,
+ SI3218X_RAM_CAL_PUPD_CNTL = 1469,
+ SI3218X_RAM_UNUSED_REG446 = 1470,
+ SI3218X_RAM_CAL_AC_RCAL = 1471,
+ SI3218X_RAM_CAL_DC_RCAL = 1472,
+ SI3218X_RAM_KAC_MOD = 1473,
+ SI3218X_RAM_KAC_SEL = 1474,
+ SI3218X_RAM_SEL_RING = 1475,
+ SI3218X_RAM_CMDAC_FWD = 1476,
+ SI3218X_RAM_CMDAC_RVS = 1477,
+ SI3218X_RAM_CAL_INC_STATE = 1478,
+ SI3218X_RAM_CAL_DCDAC_COMP = 1479,
+ SI3218X_RAM_BAT_SWITCH = 1480,
+ SI3218X_RAM_CH_IRQ = 1481,
+ SI3218X_RAM_ILOOP_CROSSING = 1482,
+ SI3218X_RAM_VOC_FAILSAFE = 1483,
+ SI3218X_RAM_UNUSED_REG460 = 1484,
+ SI3218X_RAM_UNUSED_REG461 = 1485,
+ SI3218X_RAM_GENERIC_0 = 1486,
+ SI3218X_RAM_GENERIC_1 = 1487,
+ SI3218X_RAM_GENERIC_2 = 1488,
+ SI3218X_RAM_GENERIC_3 = 1489,
+ SI3218X_RAM_GENERIC_4 = 1490,
+ SI3218X_RAM_GENERIC_5 = 1491,
+ SI3218X_RAM_GENERIC_6 = 1492,
+ SI3218X_RAM_GENERIC_7 = 1493,
+ SI3218X_RAM_UNUSED_REG470 = 1494,
+ SI3218X_RAM_UNUSED_REG471 = 1495,
+ SI3218X_RAM_QHI_SET = 1496,
+ SI3218X_RAM_QHI_CLR = 1497,
+ SI3218X_RAM_UNUSED_REG474 = 1498,
+ SI3218X_RAM_RDC_SUM = 1499,
+ SI3218X_RAM_UNUSED_REG476 = 1500,
+ SI3218X_RAM_UNUSED_REG477 = 1501,
+ SI3218X_RAM_UNUSED_REG478 = 1502,
+ SI3218X_RAM_UNUSED_REG479 = 1503,
+ SI3218X_RAM_UNUSED_REG480 = 1504,
+ SI3218X_RAM_UNUSED_REG481 = 1505,
+ SI3218X_RAM_FLUSH_AUDIO_MAN = 1506,
+ SI3218X_RAM_FLUSH_DC_MAN = 1507,
+ SI3218X_RAM_TIP_RING_CNTL = 1508,
+ SI3218X_RAM_SQUELCH_SET = 1509,
+ SI3218X_RAM_SQUELCH_CLR = 1510,
+ SI3218X_RAM_CAL_STATE_MAN = 1511,
+ SI3218X_RAM_UNUSED_REG488 = 1512,
+ SI3218X_RAM_UNUSED_REG489 = 1513,
+ SI3218X_RAM_RINGING_BW = 1514,
+ SI3218X_RAM_AUDIO_MAN = 1515,
+ SI3218X_RAM_HVIC_STATE_SPARE = 1516,
+ SI3218X_RAM_RINGING_FAST_MAN = 1517,
+ SI3218X_RAM_VCM_DAC_MAN = 1518,
+ SI3218X_RAM_UNUSED_REG495 = 1519,
+ SI3218X_RAM_UNUSED_REG496 = 1520,
+ SI3218X_RAM_UNUSED_REG497 = 1521,
+ SI3218X_RAM_GENERIC_8 = 1522,
+ SI3218X_RAM_GENERIC_9 = 1523,
+ SI3218X_RAM_GENERIC_10 = 1524,
+ SI3218X_RAM_GENERIC_11 = 1525,
+ SI3218X_RAM_UNUSED_REG502 = 1526,
+ SI3218X_RAM_GENERIC_12 = 1527,
+ SI3218X_RAM_GENERIC_13 = 1528,
+ SI3218X_RAM_UNUSED_REG505 = 1529,
+ SI3218X_RAM_DC_HOLD_DAC = 1530,
+ SI3218X_RAM_OFFHOOK_CMP = 1531,
+ SI3218X_RAM_PWRSAVE_SET = 1532,
+ SI3218X_RAM_PWRSAVE_CLR = 1533,
+ SI3218X_RAM_PD_WKUP = 1534,
+ SI3218X_RAM_SPEEDUP_MASK_SET = 1535,
+ SI3218X_RAM_SPEEDUP_MASK_CLR = 1536,
+ SI3218X_RAM_UNUSED_REG513 = 1537,
+ SI3218X_RAM_PD_DCDC = 1538,
+ SI3218X_RAM_UNUSED_REG515 = 1539,
+ SI3218X_RAM_PD_UVLO = 1540,
+ SI3218X_RAM_PD_OVLO = 1541,
+ SI3218X_RAM_PD_OCLO = 1542,
+ SI3218X_RAM_PD_SWDRV = 1543,
+ SI3218X_RAM_UNUSED_REG520 = 1544,
+ SI3218X_RAM_DCDC_UVHYST = 1545,
+ SI3218X_RAM_DCDC_UVTHRESH = 1546,
+ SI3218X_RAM_DCDC_OVTHRESH = 1547,
+ SI3218X_RAM_DCDC_OITHRESH = 1548,
+ SI3218X_RAM_UNUSED_REG525 = 1549,
+ SI3218X_RAM_UNUSED_REG526 = 1550,
+ SI3218X_RAM_DCDC_STATUS = 1551,
+ SI3218X_RAM_UNUSED_REG528 = 1552,
+ SI3218X_RAM_DCDC_SWDRV_POL = 1553,
+ SI3218X_RAM_DCDC_UVPOL = 1554,
+ SI3218X_RAM_DCDC_CPUMP = 1555,
+ SI3218X_RAM_UNUSED_REG532 = 1556,
+ SI3218X_RAM_DCDC_VREF_MAN = 1557,
+ SI3218X_RAM_DCDC_VREF_CTRL = 1558,
+ SI3218X_RAM_UNUSED_REG535 = 1559,
+ SI3218X_RAM_DCDC_RNGTYPE = 1560,
+ SI3218X_RAM_DCDC_DIN_FILT = 1561,
+ SI3218X_RAM_UNUSED_REG538 = 1562,
+ SI3218X_RAM_DCDC_DOUT = 1563,
+ SI3218X_RAM_UNUSED_REG540 = 1564,
+ SI3218X_RAM_DCDC_OIMASK = 1565,
+ SI3218X_RAM_UNUSED_REG542 = 1566,
+ SI3218X_RAM_UNUSED_REG543 = 1567,
+ SI3218X_RAM_DCDC_SC_SET = 1568,
+ SI3218X_RAM_WAKE_HOLD = 1569,
+ SI3218X_RAM_PD_AC_SQUELCH = 1570,
+ SI3218X_RAM_PD_REF_OSC = 1571,
+ SI3218X_RAM_UNUSED_REG548 = 1572,
+ SI3218X_RAM_PWRSAVE_MAN = 1573,
+ SI3218X_RAM_PWRSAVE_SEL = 1574,
+ SI3218X_RAM_PWRSAVE_CTRL_LO = 1575,
+ SI3218X_RAM_PWRSAVE_CTRL_HI = 1576,
+ SI3218X_RAM_PWRSAVE_HVIC_LO = 1577,
+ SI3218X_RAM_PWRSAVE_HVIC_HI = 1578,
+ SI3218X_RAM_DSP_PROM_MISR = 1579,
+ SI3218X_RAM_DSP_CROM_MISR = 1580,
+ SI3218X_RAM_DAA_PROM_MISR = 1581,
+ SI3218X_RAM_DAA_CROM_MISR = 1582,
+ SI3218X_RAM_RAMBIST_ERROR = 1583,
+ SI3218X_RAM_DCDC_ANA_VREF = 1584,
+ SI3218X_RAM_DCDC_ANA_GAIN = 1585,
+ SI3218X_RAM_DCDC_ANA_TOFF = 1586,
+ SI3218X_RAM_DCDC_ANA_TONMIN = 1587,
+ SI3218X_RAM_DCDC_ANA_TONMAX = 1588,
+ SI3218X_RAM_DCDC_ANA_DSHIFT = 1589,
+ SI3218X_RAM_DCDC_ANA_LPOLY = 1590,
+ SI3218X_RAM_DCDC_ANA_PSKIP = 1591,
+ SI3218X_RAM_PD_DCDC_ANA = 1592,
+ SI3218X_RAM_UNUSED_REG569 = 1593,
+ SI3218X_RAM_UNUSED_REG570 = 1594,
+ SI3218X_RAM_PWRPEND_SET = 1595,
+ SI3218X_RAM_PD_CM_BUF = 1596,
+ SI3218X_RAM_JMP8 = 1597,
+ SI3218X_RAM_JMP9 = 1598,
+ SI3218X_RAM_JMP10 = 1599,
+ SI3218X_RAM_JMP11 = 1600,
+ SI3218X_RAM_JMP12 = 1601,
+ SI3218X_RAM_JMP13 = 1602,
+ SI3218X_RAM_JMP14 = 1603,
+ SI3218X_RAM_JMP15 = 1604,
+ SI3218X_RAM_METER_TRIG = 1605,
+ SI3218X_RAM_PM_ACTIVE = 1606,
+ SI3218X_RAM_PM_INACTIVE = 1607,
+ SI3218X_RAM_HVIC_VERSION = 1608,
+ SI3218X_RAM_THERM_OFF = 1609,
+ SI3218X_RAM_THERM_HI = 1610,
+ SI3218X_RAM_TEST_LOAD = 1611,
+ SI3218X_RAM_DC_HOLD_MAN = 1612,
+ SI3218X_RAM_DC_HOLD_DAC_MAN = 1613,
+ SI3218X_RAM_UNUSED_REG590 = 1614,
+ SI3218X_RAM_DCDC_CPUMP_LP = 1615,
+ SI3218X_RAM_DCDC_CPUMP_LP_MASK = 1616,
+ SI3218X_RAM_DCDC_CPUMP_PULLDOWN = 1617,
+ SI3218X_RAM_BOND_STATUS = 1618,
+ SI3218X_RAM_BOND_MAN = 1619,
+ SI3218X_RAM_BOND_VAL = 1620,
+ SI3218X_RAM_REF_DEBOUNCE_PCLK = 1633,
+ SI3218X_RAM_REF_DEBOUNCE_FSYNC = 1634,
+ SI3218X_RAM_DCDC_LIFT_EN = 1635,
+ SI3218X_RAM_DCDC_CPUMP_PGOOD = 1636,
+ SI3218X_RAM_DCDC_CPUMP_PGOOD_WKEN = 1637,
+ SI3218X_RAM_DCDC_CPUMP_PGOOD_FRC = 1638,
+ SI3218X_RAM_DCDC_CPUMP_LP_MASK_SH = 1639,
+ SI3218X_RAM_DCDC_UV_MAN = 1640,
+ SI3218X_RAM_DCDC_UV_DEBOUNCE = 1641,
+ SI3218X_RAM_DCDC_OV_MAN = 1642,
+ SI3218X_RAM_DCDC_OV_DEBOUNCE = 1643,
+ SI3218X_RAM_ANALOG3_TEST_MUX = 1644,
+};
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x.h
new file mode 100644
index 0000000..9beeecb
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x.h
@@ -0,0 +1,276 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3226x.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef SI3226XH_H
+#define SI3226XH_H
+
+#include "proslic.h"
+
+#define SI3226X_CHAN_PER_DEVICE 2
+
+/*
+** SI3226X DataTypes/Function Definitions
+*/
+
+/*
+** Defines structure for configuring gpio
+*/
+typedef struct
+{
+ uInt8 outputEn;
+ uInt8 analog;
+ uInt8 direction;
+ uInt8 manual;
+ uInt8 polarity;
+ uInt8 openDrain;
+ uInt8 batselmap;
+} Si3226x_GPIO_Cfg;
+
+typedef ProSLIC_DCfeed_Cfg Si3226x_DCfeed_Cfg;
+typedef Si3226x_DCfeed_Cfg *Si3226x_DCfeed_Cfg_ptr;
+/*
+** Defines structure for general configuration and the dcdc converter
+*/
+typedef struct
+{
+ uInt8 device_key; /* Used to prevent loaded coeffs for another device */
+ bomOptionsType bomOpt;
+ batRailType batType;
+ ramData bat_hyst;
+ ramData vbatr_expect; /* default - this is overwritten by ring preset */
+ ramData vbath_expect; /* default - this is overwritten by dc feed preset */
+ ramData pwrsave_timer;
+ ramData offhook_thresh;
+ ramData vbat_track_min;
+ ramData vbat_track_min_rng;
+ ramData pwrsave_dbi;
+ ramData dcdc_ana_scale;
+ ramData vov_bat_pwrsave_min;
+ ramData vov_bat_pwrsave_min_rng;
+ ramData therm_dbi;
+ ramData cpump_dbi;
+ ramData dcdc_verr;
+ ramData dcdc_verr_hyst;
+ ramData dcdc_oithresh_lo;
+ ramData dcdc_oithresh_hi;
+ ramData pd_uvlo;
+ ramData pd_ovlo;
+ ramData pd_oclo;
+ ramData pd_swdrv;
+ ramData dcdc_uvhyst;
+ ramData dcdc_uvthresh;
+ ramData dcdc_ovthresh;
+ ramData dcdc_oithresh;
+ ramData dcdc_swdrv_pol;
+ ramData dcdc_uvpol;
+ ramData dcdc_vref_man;
+ ramData dcdc_vref_ctrl;
+ ramData dcdc_rngtype;
+ ramData dcdc_ana_vref;
+ ramData dcdc_ana_gain;
+ ramData dcdc_ana_toff;
+ ramData dcdc_ana_tonmin;
+ ramData dcdc_ana_tonmax;
+ ramData dcdc_ana_dshift;
+ ramData dcdc_ana_lpoly;
+ ramData dcdc_aux_invert;
+ ramData dcdc_cpump_lp;
+ ramData dcdc_cpump_pulldown;
+ ramData dcdc_lift_en;
+ ramData coef_p_hvic;
+ ramData p_th_hvic;
+ uInt8 vdc_range; /* Was cm_clamp pre 6.5.0 */
+ uInt8 autoRegister;
+ uInt8 irqen1;
+ uInt8 irqen2;
+ uInt8 irqen3;
+ uInt8 irqen4;
+ uInt8 enhance;
+ ramData scale_kaudio;
+ uInt8 zcal_en;
+ ramData lkg_ofhk_offset;
+ ramData lkg_lb_offset;
+ ramData vbath_delta;
+ ramData uvthresh_max;
+ ramData uvthresh_scale;
+ ramData uvthresh_bias;
+} Si3226x_General_Cfg;
+
+
+/*
+** Defines structure for configuring pcm
+*/
+typedef struct
+{
+ uInt8 pcmFormat;
+ uInt8 widebandEn;
+ uInt8 pcm_tri;
+ uInt8 tx_edge;
+ uInt8 alaw_inv;
+} Si3226x_PCM_Cfg;
+
+/*
+** Defines structure for configuring pulse metering
+*/
+typedef struct
+{
+ ramData pm_amp_thresh;
+ uInt8 pm_freq;
+ uInt8 pm_auto;
+ ramData pm_active;
+ ramData pm_inactive;
+} Si3226x_PulseMeter_Cfg;
+
+/*
+** Defines structure for configuring FSK generation
+*/
+typedef ProSLIC_FSK_Cfg Si3226x_FSK_Cfg;
+
+
+/*
+** Defines structure for configuring impedance synthesis
+*/
+typedef struct
+{
+ ramData zsynth_b0;
+ ramData zsynth_b1;
+ ramData zsynth_b2;
+ ramData zsynth_a1;
+ ramData zsynth_a2;
+ uInt8 ra;
+} Si3226x_Zsynth_Cfg;
+
+/*
+** Defines structure for configuring hybrid
+*/
+typedef struct
+{
+ ramData ecfir_c2;
+ ramData ecfir_c3;
+ ramData ecfir_c4;
+ ramData ecfir_c5;
+ ramData ecfir_c6;
+ ramData ecfir_c7;
+ ramData ecfir_c8;
+ ramData ecfir_c9;
+ ramData ecfir_b0;
+ ramData ecfir_b1;
+ ramData ecfir_a1;
+ ramData ecfir_a2;
+} Si3226x_hybrid_Cfg;
+
+/*
+** Defines structure for configuring GCI CI bits
+*/
+typedef struct
+{
+ uInt8 gci_ci;
+} Si3226x_CI_Cfg;
+
+/*
+** Defines structure for configuring audio eq
+*/
+
+typedef struct
+{
+ ramData txaceq_c0;
+ ramData txaceq_c1;
+ ramData txaceq_c2;
+ ramData txaceq_c3;
+
+ ramData rxaceq_c0;
+ ramData rxaceq_c1;
+ ramData rxaceq_c2;
+ ramData rxaceq_c3;
+} Si3226x_audioEQ_Cfg;
+
+
+
+/*
+** Defines structure for configuring audio gain
+*/
+
+typedef ProSLIC_audioGain_Cfg Si3226x_audioGain_Cfg;
+
+
+typedef struct
+{
+ Si3226x_audioEQ_Cfg audioEQ;
+ Si3226x_hybrid_Cfg hybrid;
+ Si3226x_Zsynth_Cfg zsynth;
+ ramData txgain;
+ ramData rxgain;
+ ramData rxachpf_b0_1;
+ ramData rxachpf_b1_1;
+ ramData rxachpf_a1_1;
+ int16 txgain_db; /*overall gain associated with this configuration*/
+ int16 rxgain_db;
+} Si3226x_Impedance_Cfg;
+
+
+
+/*
+** Defines structure for configuring tone generator
+*/
+typedef ProSLIC_Tone_Cfg Si3226x_Tone_Cfg;
+
+/*
+** Defines structure for configuring ring generator
+*/
+typedef struct
+{
+ ramData rtper;
+ ramData freq;
+ ramData amp;
+ ramData phas;
+ ramData offset;
+ ramData slope_ring;
+ ramData iring_lim;
+ ramData rtacth;
+ ramData rtdcth;
+ ramData rtacdb;
+ ramData rtdcdb;
+ ramData vov_ring_bat;
+ ramData vov_ring_gnd;
+ ramData vbatr_expect;
+ uInt8 talo;
+ uInt8 tahi;
+ uInt8 tilo;
+ uInt8 tihi;
+ ramData adap_ring_min_i;
+ ramData counter_iring_val;
+ ramData counter_vtr_val;
+ ramData ar_const28;
+ ramData ar_const32;
+ ramData ar_const38;
+ ramData ar_const46;
+ ramData rrd_delay;
+ ramData rrd_delay2;
+ ramData vbat_track_min_rng;
+ uInt8 ringcon;
+ uInt8 userstat;
+ ramData vcm_ring;
+ ramData vcm_ring_fixed;
+ ramData delta_vcm;
+ ramData dcdc_rngtype;
+ ramData vov_dcdc_slope;
+ ramData vov_dcdc_os;
+ ramData vov_ring_bat_max;
+} Si3226x_Ring_Cfg;
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x_intf.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x_intf.h
new file mode 100644
index 0000000..234fa37
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x_intf.h
@@ -0,0 +1,606 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3226x_intf.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Si3226x_Intf.h
+** Si3226x ProSLIC interface header file
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the ProSLIC driver.
+**
+**
+*/
+
+#ifndef SI3226X_INTF_H
+#define SI3226X_INTF_H
+#include "si3226x.h"
+
+/*
+**
+** Si3226x General Constants
+**
+*/
+#define SI3226X_REVA 0
+#define SI3226X_REVB 1
+#define SI3226X_REVC 3 /* This is revC bug - shows revD revision code */
+
+/*
+** Calibration Constants
+*/
+#define SI3226X_CAL_STD_CALR1 0xC0 /* FF */
+#define SI3226X_CAL_STD_CALR2 0x18 /* F8 */
+
+/* Timeouts in 10s of ms */
+#define SI3226X_TIMEOUT_DCDC_UP 200
+#define SI3226X_TIMEOUT_DCDC_DOWN 200
+
+/* The following macros are for backward compatibility */
+#define Si3226x_Cal(PCHAN,INTARG) ProSLIC_UnsupportedFeatureNoArg((PCHAN),"Si3226x_Cal")
+#define Si3226x_CheckCIDBuffer ProSLIC_CheckCIDBuffer
+#define Si3226x_DCFeedSetup(PCHAN,PRESET) Si3226x_DCFeedSetupCfg((PCHAN),Si3226x_DCfeed_Presets,(PRESET))
+#define Si3226x_DisableCID ProSLIC_DisableCID
+#define Si3226x_DisableInterrupts ProSLIC_DisableInterrupts
+#define Si3226x_DTMFReadDigit ProSLIC_DTMFReadDigit
+#define Si3226x_EnableCID ProSLIC_EnableCID
+#define Si3226x_GetInterrupts ProSLIC_GetInterrupts
+#define Si3226x_GetLBCalResult ProSLIC_GetLBCalResult
+#define Si3226x_GetPLLFreeRunStatus ProSLIC_GetPLLFreeRunStatus
+#define Si3226x_GPIOControl ProSLIC_GPIOControl
+#define Si3226x_Init(PCHAN,SZ) Si3226x_Init_with_Options((PCHAN),(SZ),INIT_NO_OPT)
+#define Si3226x_LoadPatch ProSLIC_LoadPatch
+#define Si3226x_LoadPreviousLBCal ProSLIC_LoadPreviousLBCal
+#define Si3226x_LoadPreviousLBCalPacked ProSLIC_LoadPreviousLBCalPacked
+#define Si3226x_LoadRegTables ProSLIC_LoadRegTables
+#define Si3226x_ModemDetSetup(PCHAN,PRESET) ProSLIC_UnsupportedFeatureNoArg((PCHAN),"Si3226x_ModemDetSetup")
+#define Si3226x_ModifyCIDStartBits ProSLIC_ModifyCIDStartBits
+#define Si3226x_PCMStart ProSLIC_PCMStart
+#define Si3226x_PCMStop ProSLIC_PCMStop
+#define Si3226x_PCMTimeSlotSetup ProSLIC_PCMTimeSlotSetup
+#define Si3226x_PLLFreeRunStart ProSLIC_PLLFreeRunStart
+#define Si3226x_PLLFreeRunStop ProSLIC_PLLFreeRunStop
+#define Si3226x_PolRev ProSLIC_PolRev
+#define Si3226x_PringDebugRAM ProSLIC_PrintDebugRAM
+#define Si3226x_PrintDebugData ProSLIC_PrintDebugData
+#define Si3226x_PrintDebugReg ProSLIC_PrintDebugReg
+#define Si3226x_PulseMeterDisable ProSLIC_PulseMeterDisable
+#define Si3226x_PulseMeterEnable ProSLIC_PulseMeterEnable
+#define Si3226x_PulseMeterStart ProSLIC_PulseMeterStart
+#define Si3226x_PulseMeterStop ProSLIC_PulseMeterDisable
+#define Si3226x_ReadHookStatus ProSLIC_ReadHookStatus
+#define Si3226x_ReadRAM ProSLIC_ReadRAM
+#define Si3226x_ReadReg ProSLIC_ReadReg
+#define Si3226x_Reset SiVoice_Reset
+#define Si3226x_RingStart ProSLIC_RingStart
+#define Si3226x_RingStop ProSLIC_RingStop
+#define Si3226x_SendCID ProSLIC_SendCID
+#define Si3226x_SetLoopbackMode ProSLIC_SetLoopbackMode
+#define Si3226x_SetMuteStatus ProSLIC_SetMuteStatus
+#define Si3226x_SetPowersaveMode ProSLIC_SetPowersaveMode
+#define Si3226x_SetProfile(PCHAN,PRESET) ProSLIC_UnsupportedFeatureNoArg((PCHAN),"Si3226x_SetProfile")
+#define Si3226x_ToneGenStart ProSLIC_ToneGenStart
+#define Si3226x_ToneGenStop ProSLIC_ToneGenStop
+#define Si3226x_VerifyPatch ProSLIC_VerifyPatch
+#define Si3226x_WriteRAM ProSLIC_WriteRAM
+#define Si3226x_WriteReg ProSLIC_WriteReg
+
+#define Si3226x_VerifyControlInterface ProSLIC_VefifyControlInterface
+#define Si3226x_ShutdownChannel ProSLIC_PowerDownConverter
+#define Si3226x_PowerDownConverter ProSLIC_PowerDownConverter
+#define Si3226x_Calibrate ProSLIC_Calibrate
+#define Si3226x_ToneGenSetup ProSLIC_ToneGenSetup
+#define Si3226x_FSKSetup ProSLIC_FSKSetup
+#define Si3226x_SetLinefeedStatusBroadcast ProSLIC_SetLinefeedStatusBroadcast
+
+/* DC Feed */
+#ifndef DISABLE_DCFEED_SETUP
+extern Si3226x_DCfeed_Cfg Si3226x_DCfeed_Presets[];
+#endif
+
+/*
+**
+** PROSLIC INITIALIZATION FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_ShutdownChannel
+**
+** Description:
+** Safely shutdown channel w/o interruption to
+** other active channels
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+**
+** Return:
+** none
+*/
+int Si3226x_ShutdownChannel (proslicChanType_ptr hProslic);
+
+/*
+** Function: PROSLIC_Init_MultiBOM
+**
+** Description:
+** Initializes the ProSLIC w/ selected general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** size: number of channels
+** preset: general configuration preset
+**
+** Return:
+** none
+*/
+int Si3226x_Init_MultiBOM (proslicChanType_ptr *hProslic,int size,int preset);
+
+/*
+** Function: Si3226x_Init_with_Options
+**
+** Description:
+** Initializes the ProSLIC with an option.
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** size - number of continuous channels to initialize
+** init_opt - which initialization type to do.
+**
+** Return:
+** none
+*/
+int Si3226x_Init_with_Options (proslicChanType_ptr *pProslic, int size,
+ initOptionsType init_opt);
+
+/*
+** Function: Si3226x_PowerUpConverter
+**
+** Description:
+** Powers all DC/DC converters sequentially with delay to minimize
+** peak power draw on VDC.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3226x_PowerUpConverter(proslicChanType_ptr hProslic);
+
+/*
+** Function: Si3226x_Calibrate
+**
+** Description:
+** Generic calibration function for Si3226x
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object,
+** size: maximum number of channels
+** calr: array of CALRx register values
+** maxTime: cal timeout (in ms)
+**
+** Return:
+** int
+*/
+int Si3226x_Calibrate (proslicChanType_ptr *hProslic, int size, uInt8 *calr,
+ int maxTime);
+
+/*
+** Function: PROSLIC_EnableInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** hProslic: pointer to Proslic object
+**
+** Return:
+**
+*/
+int Si3226x_EnableInterrupts (proslicChanType_ptr hProslic);
+
+/*
+**
+** PROSLIC CONFIGURATION FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_RingSetup
+**
+** Description:
+** configure ringing
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pRingSetup: pointer to ringing config structure
+**
+** Return:
+** none
+*/
+int Si3226x_RingSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_ZsynthSetup
+**
+** Description:
+** configure impedance synthesis
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pZynth: pointer to zsynth config structure
+**
+** Return:
+** none
+*/
+int Si3226x_ZsynthSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_GciCISetup
+**
+** Description:
+** configure CI bits (GCI mode)
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pCI: pointer to ringing config structure
+**
+** Return:
+** none
+*/
+int Si3226x_GciCISetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pAudio: pointer to audio gains config structure
+**
+** Return:
+** none
+*/
+int Si3226x_TXAudioGainSetup (proslicChanType *pProslic, int preset);
+int Si3226x_RXAudioGainSetup (proslicChanType *pProslic, int preset);
+#define Si3226x_AudioGainSetup ProSLIC_AudioGainSetup
+int Si3226x_TXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale);
+int Si3226x_RXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale);
+
+/*
+** Function: PROSLIC_DCFeedSetup
+**
+** Description:
+** configure dc feed
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pDcFeed: pointer to dc feed config structure
+**
+** Return:
+** none
+*/
+int Si3226x_DCFeedSetupCfg (proslicChanType *pProslic,ProSLIC_DCfeed_Cfg *cfg,
+ int preset);
+
+/*
+** Function: PROSLIC_GPIOSetup
+**
+** Description:
+** configure gpio
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pGpio: pointer to gpio config structure
+**
+** Return:
+** none
+*/
+int Si3226x_GPIOSetup (proslicChanType *pProslic);
+
+/*
+** Function: PROSLIC_PCMSetup
+**
+** Description:
+** configure pcm
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pPcm: pointer to pcm config structure
+**
+** Return:
+** none
+*/
+int Si3226x_PCMSetup (proslicChanType *pProslic, int preset);
+
+/*
+**
+** PROSLIC CONTROL FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_WriteLinefeed
+**
+** Description:
+** Sets linefeed state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** newLinefeed: new linefeed state
+**
+** Return:
+** none
+*/
+int Si3226x_SetLinefeedStatus (proslicChanType *pProslic,uInt8 newLinefeed);
+
+/*
+** Function: PROSLIC_SetLinefeedBroadcast
+**
+** Description:
+** Sets linefeed state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** newLinefeed: new linefeed state
+**
+** Return:
+** none
+*/
+int Si3226x_SetLinefeedStatusBroadcast (proslicChanType *pProslic,
+ uInt8 newLinefeed);
+
+/*
+** Function: ProSLIC_MWISetup
+**
+** Description:
+** Modify default MWI amplitude and switch debounce parameters
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** vpk_mag: peak flash voltgage (vpk) - passing a 0 results
+** in no change to VBATH_NEON
+** lcmrmask_mwi: LCR mask time (ms) after MWI state switch - passing
+** a 0 results in no change to LCRMASK_MWI
+**
+** Return:
+** none
+*/
+int Si3226x_MWISetup (proslicChanType *pProslic,uInt16 vpk_mag,
+ uInt16 lcrmask_mwi);
+
+/*
+** Function: ProSLIC_MWIEnable
+**
+** Description:
+** Enable MWI feature
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3226x_MWIEnable (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_MWIDisable
+**
+** Description:
+** Disable MWI feature
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3226x_MWIDisable (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_SetMWIState
+**
+** Description:
+** Set MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** flash_on: 0 = low, 1 = high (VBATH_NEON)
+**
+** Return:
+** none
+*/
+int Si3226x_SetMWIState (proslicChanType *pProslic,uInt8 flash_on);
+
+/*
+** Function: ProSLIC_SetMWIState_ramp
+**
+** Description:
+** Set MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** flash_on: 0 = low, 1 = high (VBATH_NEON)
+** step_delay: delay between VBATH steps (ms)
+** step_num: number of steps between low and high states
+**
+** Return:
+** none
+*/
+int Si3226x_SetMWIState_ramp (proslicChanType *pProslic,uInt8 flash_on,
+ uInt8 step_delay,uInt8 step_num);
+
+/*
+** Function: ProSLIC_GetMWIState
+**
+** Description:
+** Read MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** 0 - Flash OFF, 1 - Flash ON, RC_MWI_NOT_ENABLED
+
+*/
+int Si3226x_GetMWIState (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_MWI
+**
+** Description:
+** implements message waiting indicator
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** lampOn: 0 = turn lamp off, 1 = turn lamp on
+**
+** Return:
+** none
+**
+** Use Deprecated.
+*/
+int Si3226x_MWI (proslicChanType *pProslic,uInt8 lampOn);
+
+/*
+** Function: PROSLIC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pPulseCfg: pointer to pulse metering config structure
+**
+** Return:
+** none
+*/
+int Si3226x_PulseMeterSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_dbgSetDCFeed
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3226x_dbgSetDCFeed (proslicChanType *pProslic, uInt32 v_vlim_val,
+ uInt32 i_ilim_val, int32 preset);
+
+/*
+** Function: PROSLIC_dbgSetDCFeedVopen
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3226x_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val,
+ int32 preset);
+
+
+/*
+** Function: PROSLIC_dbgSetDCFeedIloop
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3226x_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val,
+ int32 preset);
+
+
+/*
+** Function: PROSLIC_dbgRingingSetup
+**
+** Description:
+** Provisionary function for setting up
+** Ring type, frequency, amplitude and dc offset.
+** Main use will be by peek/poke applications.
+*/
+int Si3226x_dbgSetRinging (proslicChanType *pProslic,
+ ProSLIC_dbgRingCfg *ringCfg, int preset);
+
+/*
+** Function: PROSLIC_dbgSetRXGain
+**
+** Description:
+** Provisionary function for setting up
+** RX path gain.
+*/
+int Si3226x_dbgSetRXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+/*
+** Function: PROSLIC_dbgSetTXGain
+**
+** Description:
+** Provisionary function for setting up
+** TX path gain.
+*/
+int Si3226x_dbgSetTXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+
+/*
+** Function: PROSLIC_LineMonitor
+**
+** Description:
+** Monitor line voltages and currents
+*/
+int Si3226x_LineMonitor(proslicChanType *pProslic, proslicMonitorType *monitor);
+
+
+/*
+** Function: PROSLIC_PSTNCheck
+**
+** Description:
+** Continuous monitor of ilong to detect hot pstn line
+*/
+int Si3226x_PSTNCheck(proslicChanType *pProslic,
+ proslicPSTNCheckObjType *pstnCheckObj);
+
+/*
+** Function: PROSLIC_DiffPSTNCheck
+**
+** Description:
+** Detection of foreign PSTN
+*/
+int Si3226x_DiffPSTNCheck (proslicChanType *pProslic,
+ proslicDiffPSTNCheckObjType *pPSTNCheck);
+
+/*
+** Function: PROSLIC_SetPowersaveMode
+**
+** Description:
+** Enable or Disable powersave mode
+*/
+int Si3226x_SetPowersaveMode(proslicChanType *pProslic, int pwrsave);
+
+/*
+** Function: PROSLIC_ReadMADCScaled
+**
+** Description:
+** ReadMADC (or other sensed voltage/currents) and
+** return scaled value in int32 format
+*/
+int32 Si3226x_ReadMADCScaled(proslicChanType *pProslic, uInt16 addr,
+ int32 scale);
+
+int Si3226x_GetChipInfo(proslicChanType_ptr pProslic);
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x_registers.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x_registers.h
new file mode 100644
index 0000000..77e3c6a
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3226x_registers.h
@@ -0,0 +1,1263 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3226x_registers.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Si3226_Registers.h
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file that contains
+** register and RAM names definitions for
+** the Si3226x ProSLIC.
+**
+**
+**
+*/
+
+#ifndef SI3226REGS_H
+#define SI3226REGS_H
+
+/*
+** This defines the mnemonics for the SI3226 registers
+*/
+enum REGISTERS
+{
+ ID = 0,
+ RESET = 1,
+ MSTREN = 2,
+ MSTRSTAT = 3,
+ RAMSTAT = 4,
+ RAM_ADDR_HI = 5,
+ RAM_DATA_B0 = 6,
+ RAM_DATA_B1 = 7,
+ RAM_DATA_B2 = 8,
+ RAM_DATA_B3 = 9,
+ RAM_ADDR_LO = 10,
+ PCMMODE = 11,
+ PCMTXLO = 12,
+ PCMTXHI = 13,
+ PCMRXLO = 14,
+ PCMRXHI = 15,
+ IRQ = 16,
+ IRQ0 = 17,
+ IRQ1 = 18,
+ IRQ2 = 19,
+ IRQ3 = 20,
+ IRQ4 = 21,
+ IRQEN1 = 22,
+ IRQEN2 = 23,
+ IRQEN3 = 24,
+ IRQEN4 = 25,
+ CALR0 = 26,
+ CALR1 = 27,
+ CALR2 = 28,
+ CALR3 = 29,
+ LINEFEED = 30,
+ POLREV = 31,
+ SPEEDUP_DIS = 32,
+ SPEEDUP = 33,
+ LCRRTP = 34,
+ OFFLOAD = 35,
+ BATSELMAP = 36,
+ BATSEL = 37,
+ RINGCON = 38,
+ RINGTALO = 39,
+ RINGTAHI = 40,
+ RINGTILO = 41,
+ RINGTIHI = 42,
+ LOOPBACK = 43,
+ DIGCON = 44,
+ RA = 45,
+ ZCAL_EN = 46,
+ ENHANCE = 47,
+ OMODE = 48,
+ OCON = 49,
+ O1TALO = 50,
+ O1TAHI = 51,
+ O1TILO = 52,
+ O1TIHI = 53,
+ O2TALO = 54,
+ O2TAHI = 55,
+ O2TILO = 56,
+ O2TIHI = 57,
+ FSKDAT = 58,
+ FSKDEPTH = 59,
+ TONDTMF = 60,
+ TONDET = 61,
+ TONEN = 62,
+ GCI_CI = 63,
+ GLOBSTAT1 = 64,
+ GLOBSTAT2 = 65,
+ USERSTAT = 66,
+ GPIO = 67,
+ GPIO_CFG1 = 68,
+ GPIO_CFG2 = 69,
+ GPIO_CFG3 = 70,
+ DIAG1 = 71,
+ DIAG2 = 72,
+ CM_CLAMP = 73,
+ DIAG3 = 74,
+ PMCON = 75,
+ PCLK_FAULT_CNTL = 76,
+ REG77 = 77,
+ REG78 = 78,
+ REG79 = 79,
+ AUTO = 80,
+ JMPEN = 81,
+ JMP0LO = 82,
+ JMP0HI = 83,
+ JMP1LO = 84,
+ JMP1HI = 85,
+ JMP2LO = 86,
+ JMP2HI = 87,
+ JMP3LO = 88,
+ JMP3HI = 89,
+ JMP4LO = 90,
+ JMP4HI = 91,
+ JMP5LO = 92,
+ JMP5HI = 93,
+ JMP6LO = 94,
+ JMP6HI = 95,
+ JMP7LO = 96,
+ JMP7HI = 97,
+ PDN = 98,
+ PDN_STAT = 99,
+ USERMODE_ENABLE = 126
+};
+
+
+/*
+** This defines the mnemonics for the SI3226x RAM locations (revB)
+*/
+enum SRAM
+{
+ IRNGNG_SENSE = 0,
+ MADC_VTIPC = 1,
+ MADC_VRINGC = 2,
+ MADC_VBAT = 3,
+ MADC_VLONG = 4,
+ UNUSED5 = 5,
+ MADC_VDC = 6,
+ MADC_ILONG = 7,
+ MADC_ITIP = 8,
+ MADC_IRING = 9,
+ MADC_ILOOP = 10,
+ VDIFF_SENSE = 11,
+ VTIP = 12,
+ VRING = 13,
+ P_Q1_D = 14,
+ P_Q2_D = 15,
+ P_Q3_D = 16,
+ P_Q4_D = 17,
+ P_Q5_D = 18,
+ P_Q6_D = 19,
+ P_Q1 = 20,
+ DIAG_EX1 = 21,
+ DIAG_EX2 = 22,
+ DIAG_LPF_MADC = 23,
+ DIAG_DMM_I = 24,
+ DIAG_DMM_V = 25,
+ OSC1FREQ = 26,
+ OSC1AMP = 27,
+ OSC1PHAS = 28,
+ OSC2FREQ = 29,
+ OSC2AMP = 30,
+ OSC2PHAS = 31,
+ TESTB0_1 = 32,
+ TESTB1_1 = 33,
+ TESTB2_1 = 34,
+ TESTA1_1 = 35,
+ TESTA2_1 = 36,
+ TESTB0_2 = 37,
+ TESTB1_2 = 38,
+ TESTB2_2 = 39,
+ TESTA1_2 = 40,
+ TESTA2_2 = 41,
+ TESTB0_3 = 42,
+ TESTB1_3 = 43,
+ TESTB2_3 = 44,
+ TESTA1_3 = 45,
+ TESTA2_3 = 46,
+ TESTPKO = 47,
+ TESTAVO = 48,
+ TESTWLN = 49,
+ TESTAVBW = 50,
+ TESTPKFL = 51,
+ TESTAVFL = 52,
+ TESTPKTH = 53,
+ TESTAVTH = 54,
+ DAC_IN_SYNC1 = 55,
+ BYPASS_REG = 56,
+ LCRMASK_CNT = 57,
+ DAC_IN_SYNC = 58,
+ TEMP = 59,
+ TEMP_ISR = 60,
+ P_Q2 = 61,
+ P_Q3 = 62,
+ P_Q4 = 63,
+ P_Q5 = 64,
+ P_Q6 = 65,
+ ILOOP_FILT = 66,
+ ILONG_FILT = 67,
+ VBAT_FILT = 68,
+ VDIFF_FILT = 69,
+ VCM_FILT = 70,
+ VBAT_CNT = 71,
+ V_VLIM_SCALED = 72,
+ V_VLIM_TRACK = 73,
+ V_VLIM_MODFEED = 74,
+ DIAG_P_OUT = 75,
+ DIAG_COUNT = 76,
+ ROW0_MAG = 77,
+ ROW1_MAG = 78,
+ ROW2_MAG = 79,
+ ROW3_MAG = 80,
+ COL0_MAG = 81,
+ COL1_MAG = 82,
+ COL2_MAG = 83,
+ COL3_MAG = 84,
+ ROW0_2ND_Y1 = 85,
+ ROW1_2ND_Y1 = 86,
+ ROW2_2ND_Y1 = 87,
+ ROW3_2ND_Y1 = 88,
+ COL0_2ND_Y1 = 89,
+ COL1_2ND_Y1 = 90,
+ COL2_2ND_Y1 = 91,
+ COL3_2ND_Y1 = 92,
+ ROW0_2ND_Y2 = 93,
+ ROW1_2ND_Y2 = 94,
+ ROW2_2ND_Y2 = 95,
+ ROW3_2ND_Y2 = 96,
+ COL0_2ND_Y2 = 97,
+ COL1_2ND_Y2 = 98,
+ COL2_2ND_Y2 = 99,
+ COL3_2ND_Y2 = 100,
+ DTMF_IN = 101,
+ DTMFDTF_D2_1 = 102,
+ DTMFDTF_D1_1 = 103,
+ DTMFDTF_OUT_1 = 104,
+ DTMFDTF_D2_2 = 105,
+ DTMFDTF_D1_2 = 106,
+ DTMFDTF_OUT_2 = 107,
+ DTMFDTF_D2_3 = 108,
+ DTMFDTF_D1_3 = 109,
+ DTMFDTF_OUT_3 = 110,
+ DTMFDTF_OUT = 111,
+ DTMFLPF_D2_1 = 112,
+ DTMFLPF_D1_1 = 113,
+ DTMFLPF_OUT_1 = 114,
+ DTMFLPF_D2_2 = 115,
+ DTMFLPF_D1_2 = 116,
+ DTMFLPF_OUT_2 = 117,
+ DTMF_ROW = 118,
+ DTMFHPF_D2_1 = 119,
+ DTMFHPF_D1_1 = 120,
+ DTMFHPF_OUT_1 = 121,
+ DTMFHPF_D2_2 = 122,
+ DTMFHPF_D1_2 = 123,
+ DTMFHPF_OUT_2 = 124,
+ DTMF_COL = 125,
+ ROW_POWER = 126,
+ COL_POWER = 127,
+ GP_TIMER = 128,
+ SPR_INTERP_DIF = 129,
+ SPR_INTERP_DIF_OUT = 130,
+ SPR_INTERP_INT = 131,
+ SPR_CNT = 132,
+ ROW0_Y1 = 133,
+ ROW0_Y2 = 134,
+ ROW1_Y1 = 135,
+ ROW1_Y2 = 136,
+ ROW2_Y1 = 137,
+ ROW2_Y2 = 138,
+ ROW3_Y1 = 139,
+ ROW3_Y2 = 140,
+ COL0_Y1 = 141,
+ COL0_Y2 = 142,
+ COL1_Y1 = 143,
+ COL1_Y2 = 144,
+ COL2_Y1 = 145,
+ COL2_Y2 = 146,
+ COL3_Y1 = 147,
+ COL3_Y2 = 148,
+ ROWMAX_MAG = 149,
+ COLMAX_MAG = 150,
+ ROW0_2ND_MAG = 151,
+ COL0_2ND_MAG = 152,
+ ROW_THR = 153,
+ COL_THR = 154,
+ OSC1_Y = 155,
+ OSC2_Y = 156,
+ OSC1_X = 157,
+ OSC1_COEFF = 158,
+ OSC2_X = 159,
+ OSC2_COEFF = 160,
+ RXACIIR_D2_1 = 161,
+ RXACIIR_OUT_1 = 162,
+ RXACIIR_D2_2 = 163,
+ RXACIIR_D1_2 = 164,
+ RXACIIR_OUT_2 = 165,
+ RXACIIR_D2_3 = 166,
+ RXACIIR_D1_3 = 167,
+ RXACIIR_OUT = 168,
+ RXACIIR_OUT_3 = 169,
+ TXACCOMB_D1 = 170,
+ TXACCOMB_D2 = 171,
+ TXACCOMB_D3 = 172,
+ TXACSINC_OUT = 173,
+ TXACHPF_D1_2 = 174,
+ TXACHPF_D2_1 = 175,
+ TXACHPF_D2_2 = 176,
+ TXACHPF_OUT = 177,
+ TXACHPF_OUT_1 = 178,
+ TXACHPF_OUT_2 = 179,
+ TXACIIR_D2_1 = 180,
+ TXACIIR_OUT_1 = 181,
+ TXACIIR_D2_2 = 182,
+ TXACIIR_D1_2 = 183,
+ TXACIIR_OUT_2 = 184,
+ TXACIIR_D2_3 = 185,
+ TXACIIR_D1_3 = 186,
+ TXACIIR_OUT_3 = 187,
+ TXACIIR_OUT = 188,
+ ECIIR_D1 = 189,
+ ECIIR_D2 = 190,
+ EC_DELAY1 = 191,
+ EC_DELAY2 = 192,
+ EC_DELAY3 = 193,
+ EC_DELAY4 = 194,
+ EC_DELAY5 = 195,
+ EC_DELAY6 = 196,
+ EC_DELAY7 = 197,
+ EC_DELAY8 = 198,
+ EC_DELAY9 = 199,
+ EC_DELAY10 = 200,
+ EC_DELAY11 = 201,
+ ECHO_EST = 202,
+ EC_OUT = 203,
+ TESTFILT_OUT_1 = 204,
+ TESTFILT_D1_1 = 205,
+ TESTFILT_D2_1 = 206,
+ TESTFILT_OUT_2 = 207,
+ TESTFILT_D1_2 = 208,
+ TESTFILT_D2_2 = 209,
+ TESTFILT_OUT_3 = 210,
+ TESTFILT_D1_3 = 211,
+ TESTFILT_D2_3 = 212,
+ TESTFILT_PEAK = 213,
+ TESTFILT_ABS = 214,
+ TESTFILT_MEANACC = 215,
+ TESTFILT_COUNT = 216,
+ TESTFILT_NO_OFFSET = 217,
+ RING_X = 218,
+ RING_Y = 219,
+ RING_INT = 220,
+ RING_Y_D1 = 221,
+ RING_DIFF = 222,
+ RING_DELTA = 223,
+ WTCHDOG_CNT = 224,
+ RING_WAVE = 225,
+ UNUSED226 = 226,
+ ONEKHZ_COUNT = 227,
+ TX2100_Y1 = 228,
+ TX2100_Y2 = 229,
+ TX2100_MAG = 230,
+ RX2100_Y1 = 231,
+ RX2100_Y2 = 232,
+ RX2100_MAG = 233,
+ TX2100_POWER = 234,
+ RX2100_POWER = 235,
+ TX2100_IN = 236,
+ RX2100_IN = 237,
+ RINGTRIP_COUNT = 238,
+ RINGTRIP_DC1 = 239,
+ RINGTRIP_DC2 = 240,
+ RINGTRIP_AC1 = 241,
+ RINGTRIP_AC2 = 242,
+ RINGTRIP_AC_COUNT = 243,
+ RINGTRIP_DC_COUNT = 244,
+ RINGTRIP_AC_RESULT = 245,
+ RINGTRIP_DC_RESULT = 246,
+ RINGTRIP_ABS = 247,
+ TXACEQ_OUT = 248,
+ LCR_DBI_CNT = 249,
+ BAT_DBI_CNT = 250,
+ LONG_DBI_CNT = 251,
+ TXACEQ_DELAY3 = 252,
+ TXACEQ_DELAY2 = 253,
+ TXACEQ_DELAY1 = 254,
+ RXACEQ_DELAY3 = 255,
+ RXACEQ_DELAY2 = 256,
+ RXACEQ_DELAY1 = 257,
+ RXACEQ_IN = 258,
+ TXDCCOMB_D1 = 259,
+ TXDCCOMB_D2 = 260,
+ TXDCSINC_OUT = 261,
+ RXACDIFF_D1 = 262,
+ DC_NOTCH_1 = 263,
+ DC_NOTCH_2 = 264,
+ DC_NOTCH_OUT = 265,
+ DC_NOTCH_SCALED = 266,
+ V_FEED_IN = 267,
+ I_TAR = 268,
+ CONST_VLIM = 269,
+ UNITY = 270,
+ TXACNOTCH_1 = 271,
+ TXACNOTCH_2 = 272,
+ TXACNOTCH_OUT = 273,
+ ZSYNTH_1 = 274,
+ ZSYNTH_2 = 275,
+ ZSYNTH_OUT_1 = 276,
+ TXACD2_1_0 = 277,
+ TXACD2_1_1 = 278,
+ TXACD2_1_2 = 279,
+ TXACD2_1_3 = 280,
+ TXACD2_1_4 = 281,
+ TXACD2_1_5 = 282,
+ TXACD2_1_OUT = 283,
+ TXACD2_2_0 = 284,
+ TXACD2_2_1 = 285,
+ TXACD2_2_2 = 286,
+ TXACD2_2_3 = 287,
+ TXACD2_2_4 = 288,
+ TXACD2_2_5 = 289,
+ TXACD2_2_OUT = 290,
+ TXACD2_3_0 = 291,
+ TXACD2_3_1 = 292,
+ TXACD2_3_2 = 293,
+ TXACD2_3_3 = 294,
+ TXACD2_3_4 = 295,
+ TXACD2_3_5 = 296,
+ TXACD2_3_OUT = 297,
+ RXACI2_1_1 = 298,
+ RXACI2_1_2 = 299,
+ RXACI2_1_3 = 300,
+ RXACI2_1_4 = 301,
+ RXACI2_1_OUT = 302,
+ RXACI2_2_1 = 303,
+ RXACI2_2_2 = 304,
+ RXACI2_2_3 = 305,
+ RXACI2_2_4 = 306,
+ RXACI2_2_OUT = 307,
+ RXACI2_3_1 = 308,
+ RXACI2_3_2 = 309,
+ RXACI2_3_3 = 310,
+ RXACI2_3_4 = 311,
+ RXACI2_3_OUT = 312,
+ TXACCOMP1 = 313,
+ TXACCOMP_OUT = 314,
+ RXACCOMP1 = 315,
+ RXACCOMP_OUT = 316,
+ RXACHPF_D1_2 = 317,
+ RXACHPF_D2_1 = 318,
+ RXACHPF_D2_2 = 319,
+ RXACHPF_OUT = 320,
+ RXACHPF_OUT_1 = 321,
+ RXACHPF_OUT_2 = 322,
+ RXACEQ_OUT = 323,
+ METER_I_1 = 324,
+ METER_I_OUT = 325,
+ METER_LPF_1 = 326,
+ METER_LPF_2 = 327,
+ METER_LPF_OUT_1 = 328,
+ METER_BP_1 = 329,
+ METER_BP_2 = 330,
+ METER_BP_OUT = 331,
+ METER_SRC_OUT = 332,
+ UNUSED333 = 333,
+ UNUSED334 = 334,
+ RING_LPF_1 = 335,
+ RING_LPF_2 = 336,
+ RING_LPF_OUT = 337,
+ RING_INTERP_DIFF = 338,
+ RING_INTERP_DIFF_OUT = 339,
+ RING_INTERP_INT = 340,
+ RING_INTERP_INT_OUT = 341,
+ V_ILIM_TRACK = 342,
+ V_RFEED_TRACK = 343,
+ LF_SPEEDUP_CNT = 344,
+ DC_SPEEDUP_CNT = 345,
+ AC_SPEEDUP_CNT = 346,
+ LCR_SPEEDUP_CNT = 347,
+ CM_SPEEDUP_CNT = 348,
+ DC_SPEEDUP_MASK = 349,
+ ZSYNTH_IN = 350,
+ I_TAR_SAVE = 351,
+ UNUSED352 = 352,
+ UNUSED353 = 353,
+ COUNTER_VTR = 354,
+ I_RING_AVG = 355,
+ COUNTER_IRING = 356,
+ COMP_RATIO = 357,
+ MADC_VBAT_DIV2 = 358,
+ VDIFF_PK_T = 359,
+ PEAK_CNT = 360,
+ CM_DBI_CNT = 361,
+ VCM_LAST = 362,
+ VBATL_SENSE = 363,
+ VBATH_SENSE = 364,
+ VBATR_SENSE = 365,
+ BAT_SETTLE_CNT = 366,
+ VBAT_TGT = 367,
+ VBAT_REQ = 368,
+ VCM_HIRES = 369,
+ VCM_LORES = 370,
+ ILOOP1 = 371,
+ ILONG2 = 372,
+ ITIP1 = 373,
+ IRING1 = 374,
+ CAL_TEMP1 = 375,
+ CAL_TEMP2 = 376,
+ CAL_TEMP3 = 377,
+ CAL_TEMP4 = 378,
+ CAL_TEMP5 = 379,
+ CAL_TEMP6 = 380,
+ CAL_TEMP7 = 381,
+ CMRR_DIVISOR = 382,
+ CMRR_REMAINDER = 383,
+ CMRR_Q_PTR = 384,
+ I_SOURCE1 = 385,
+ I_SOURCE2 = 386,
+ VTR1 = 387,
+ VTR2 = 388,
+ STOP_TIMER1 = 389,
+ STOP_TIMER2 = 390,
+ UNUSED391 = 391,
+ UNUSED392 = 392,
+ CAL_ONHK_Z = 393,
+ CAL_LB_SETTLE = 394,
+ CAL_DECLPF_V0 = 395,
+ CAL_DECLPF_V1 = 396,
+ CAL_DECLPF_V2 = 397,
+ CAL_GOERTZEL_V0 = 398,
+ CAL_GOERTZEL_V1 = 399,
+ CAL_DECLPF_Y = 400,
+ CAL_GOERTZEL_Y = 401,
+ P_HVIC = 402,
+ VBATL_MIRROR = 403,
+ VBATH_MIRROR = 404,
+ VBATR_MIRROR = 405,
+ DIAG_EX1_OUT = 406,
+ DIAG_EX2_OUT = 407,
+ DIAG_DMM_V_OUT = 408,
+ DIAG_DMM_I_OUT = 409,
+ DIAG_P = 410,
+ DIAG_LPF_V = 411,
+ DIAG_LPF_I = 412,
+ DIAG_TONE_FLAG = 413,
+ ILOOP1_LAST = 414,
+ RING_ENTRY_VOC = 415,
+ UNUSED416 = 416,
+ OSC1_X_SAVE = 417,
+ EZSYNTH_1 = 418,
+ EZSYNTH_2 = 419,
+ ZSYNTH_OUT = 420,
+ UNUSED421 = 421,
+ CAL_SUBSTATE = 422,
+ DIAG_EX1_DC_OUT = 423,
+ DIAG_EX1_DC = 424,
+ EZSYNTH_B1 = 425,
+ EZSYNTH_B2 = 426,
+ EZSYNTH_A1 = 427,
+ EZSYNTH_A2 = 428,
+ ILOOP1_FILT = 429,
+ AC_PU_DELTA1_CNT = 430,
+ AC_PU_DELTA2_CNT = 431,
+ UNUSED432 = 432,
+ UNUSED433 = 433,
+ UNUSED434 = 434,
+ AC_DAC_GAIN_SAVE = 435,
+ RING_FLUSH_CNT = 436,
+ UNUSED437 = 437,
+ DIAG_VAR_OUT = 438,
+ I_VBAT = 439,
+ P_OFFLOAD = 440,
+ CALTMP_LOOPCNT = 441,
+ CALTMP_LOOPINC = 442,
+ UNUSED443 = 443,
+ CALTMP_CODEINC = 444,
+ CALTMP_TAUINC = 445,
+ CALTMP_TAU = 446,
+ CAL_TEMP8 = 447,
+ PATCH_ID = 448,
+ UNUSED449 = 449,
+ UNUSED450 = 450,
+ UNUSED451 = 451,
+ CAL_LB_OFFSET_FWD = 452,
+ CAL_LB_OFFSET_RVS = 453,
+ COUNT_SPEEDUP = 454,
+ SWEEP_COUNT = 455,
+ AMP_RAMP = 456,
+ DIAG_LPF_MADC_D = 457,
+ DIAG_HPF_MADC = 458,
+ UNUSED459 = 459,
+ TXDEC_OUT = 460,
+ TXDEC_D1 = 461,
+ TXDEC_D2 = 462,
+ RXDEC_D1 = 463,
+ RXDEC_D2 = 464,
+ OSCINT1_D2_1 = 465,
+ OSCINT1_D1_1 = 466,
+ OSCINT1_OUT_1 = 467,
+ OSCINT1_D2_2 = 468,
+ OSCINT1_D1_2 = 469,
+ OSCINT1_OUT = 470,
+ OSCINT2_D2_1 = 471,
+ OSCINT2_D1_1 = 472,
+ OSCINT2_OUT_1 = 473,
+ OSCINT2_D2_2 = 474,
+ OSCINT2_D1_2 = 475,
+ OSCINT2_OUT = 476,
+ OSC1_Y_SAVE = 477,
+ OSC2_Y_SAVE = 478,
+ PWRSAVE_CNT = 479,
+ VBATR_PK = 480,
+ SPEEDUP_MASK_CNT = 481,
+ VCM_RING_FIXED = 482,
+ DELTA_VCM = 483,
+ MADC_VTIPC_DIAG_OS = 484,
+ MADC_VRINGC_DIAG_OS = 485,
+ MADC_VLONG_DIAG_OS = 486,
+ INIT_GUESS = 487,
+ Y1 = 488,
+ Y2 = 489,
+ Y3 = 490,
+ UNUSED491 = 491,
+ PWRSAVE_DBI_CNT = 492,
+ COMP_RATIO_SAVE = 493,
+ CAL_TEMP9 = 494,
+ CAL_TEMP10 = 495,
+ DAC_OFFSET_TEMP = 496,
+ CAL_DAC_CODE = 497,
+ DCDAC_OFFSET = 498,
+ VDIFF_COARSE = 499,
+ RXACIIR_OUT_4 = 500,
+ CAL_TEMP11 = 501,
+ METER_RAMP = 502,
+ METER_RAMP_DIR = 503,
+ METER_ON_T = 504,
+ METER_PK_DET = 505,
+ METER_PK_DET_T = 506,
+ THERM_CNT = 507,
+ VDIFF_SENSE_DELAY = 508,
+ UNUSED509 = 509,
+ CPUMP_DEB_CNT = 510,
+ UNUSED511 = 511,
+ MINUS_ONE = 512,
+ ILOOPLPF = 513,
+ ILONGLPF = 514,
+ BATLPF = 515,
+ VDIFFLPF = 516,
+ VCMLPF = 517,
+ TXACIIR_B0_1 = 518,
+ TXACIIR_B1_1 = 519,
+ TXACIIR_A1_1 = 520,
+ TXACIIR_B0_2 = 521,
+ TXACIIR_B1_2 = 522,
+ TXACIIR_B2_2 = 523,
+ TXACIIR_A1_2 = 524,
+ TXACIIR_A2_2 = 525,
+ TXACIIR_B0_3 = 526,
+ TXACIIR_B1_3 = 527,
+ TXACIIR_B2_3 = 528,
+ TXACIIR_A1_3 = 529,
+ TXACIIR_A2_3 = 530,
+ TXACHPF_B0_1 = 531,
+ TXACHPF_B1_1 = 532,
+ TXACHPF_A1_1 = 533,
+ TXACHPF_B0_2 = 534,
+ TXACHPF_B1_2 = 535,
+ TXACHPF_B2_2 = 536,
+ TXACHPF_A1_2 = 537,
+ TXACHPF_A2_2 = 538,
+ TXACHPF_GAIN = 539,
+ TXACEQ_C0 = 540,
+ TXACEQ_C1 = 541,
+ TXACEQ_C2 = 542,
+ TXACEQ_C3 = 543,
+ TXACGAIN = 544,
+ RXACGAIN = 545,
+ RXACEQ_C0 = 546,
+ RXACEQ_C1 = 547,
+ RXACEQ_C2 = 548,
+ RXACEQ_C3 = 549,
+ RXACIIR_B0_1 = 550,
+ RXACIIR_B1_1 = 551,
+ RXACIIR_A1_1 = 552,
+ RXACIIR_B0_2 = 553,
+ RXACIIR_B1_2 = 554,
+ RXACIIR_B2_2 = 555,
+ RXACIIR_A1_2 = 556,
+ RXACIIR_A2_2 = 557,
+ RXACIIR_B0_3 = 558,
+ RXACIIR_B1_3 = 559,
+ RXACIIR_B2_3 = 560,
+ RXACIIR_A1_3 = 561,
+ RXACIIR_A2_3 = 562,
+ ECFIR_C2 = 563,
+ ECFIR_C3 = 564,
+ ECFIR_C4 = 565,
+ ECFIR_C5 = 566,
+ ECFIR_C6 = 567,
+ ECFIR_C7 = 568,
+ ECFIR_C8 = 569,
+ ECFIR_C9 = 570,
+ ECIIR_B0 = 571,
+ ECIIR_B1 = 572,
+ ECIIR_A1 = 573,
+ ECIIR_A2 = 574,
+ DTMFDTF_B0_1 = 575,
+ DTMFDTF_B1_1 = 576,
+ DTMFDTF_B2_1 = 577,
+ DTMFDTF_A1_1 = 578,
+ DTMFDTF_A2_1 = 579,
+ DTMFDTF_B0_2 = 580,
+ DTMFDTF_B1_2 = 581,
+ DTMFDTF_B2_2 = 582,
+ DTMFDTF_A1_2 = 583,
+ DTMFDTF_A2_2 = 584,
+ DTMFDTF_B0_3 = 585,
+ DTMFDTF_B1_3 = 586,
+ DTMFDTF_B2_3 = 587,
+ DTMFDTF_A1_3 = 588,
+ DTMFDTF_A2_3 = 589,
+ DTMFDTF_GAIN = 590,
+ DTMFLPF_B0_1 = 591,
+ DTMFLPF_B1_1 = 592,
+ DTMFLPF_B2_1 = 593,
+ DTMFLPF_A1_1 = 594,
+ DTMFLPF_A2_1 = 595,
+ DTMFLPF_B0_2 = 596,
+ DTMFLPF_B1_2 = 597,
+ DTMFLPF_B2_2 = 598,
+ DTMFLPF_A1_2 = 599,
+ DTMFLPF_A2_2 = 600,
+ DTMFLPF_GAIN = 601,
+ DTMFHPF_B0_1 = 602,
+ DTMFHPF_B1_1 = 603,
+ DTMFHPF_B2_1 = 604,
+ DTMFHPF_A1_1 = 605,
+ DTMFHPF_A2_1 = 606,
+ DTMFHPF_B0_2 = 607,
+ DTMFHPF_B1_2 = 608,
+ DTMFHPF_B2_2 = 609,
+ DTMFHPF_A1_2 = 610,
+ DTMFHPF_A2_2 = 611,
+ DTMFHPF_GAIN = 612,
+ POWER_GAIN = 613,
+ GOERTZEL_GAIN = 614,
+ MODEM_GAIN = 615,
+ HOTBIT1 = 616,
+ HOTBIT0 = 617,
+ ROW0_C1 = 618,
+ ROW1_C1 = 619,
+ ROW2_C1 = 620,
+ ROW3_C1 = 621,
+ COL0_C1 = 622,
+ COL1_C1 = 623,
+ COL2_C1 = 624,
+ COL3_C1 = 625,
+ ROW0_C2 = 626,
+ ROW1_C2 = 627,
+ ROW2_C2 = 628,
+ ROW3_C2 = 629,
+ COL0_C2 = 630,
+ COL1_C2 = 631,
+ COL2_C2 = 632,
+ COL3_C2 = 633,
+ SLOPE_VLIM = 634,
+ SLOPE_RFEED = 635,
+ SLOPE_ILIM = 636,
+ SLOPE_RING = 637,
+ SLOPE_DELTA1 = 638,
+ SLOPE_DELTA2 = 639,
+ V_VLIM = 640,
+ V_RFEED = 641,
+ V_ILIM = 642,
+ CONST_RFEED = 643,
+ CONST_ILIM = 644,
+ I_VLIM = 645,
+ DC_DAC_GAIN = 646,
+ VDIFF_TH = 647,
+ TXDEC_B0 = 648,
+ TXDEC_B1 = 649,
+ TXDEC_B2 = 650,
+ TXDEC_A1 = 651,
+ TXDEC_A2 = 652,
+ ZSYNTH_B0 = 653,
+ ZSYNTH_B1 = 654,
+ ZSYNTH_B2 = 655,
+ ZSYNTH_A1 = 656,
+ ZSYNTH_A2 = 657,
+ RXACHPF_B0_1 = 658,
+ RXACHPF_B1_1 = 659,
+ RXACHPF_A1_1 = 660,
+ RXACHPF_B0_2 = 661,
+ RXACHPF_B1_2 = 662,
+ RXACHPF_B2_2 = 663,
+ RXACHPF_A1_2 = 664,
+ RXACHPF_A2_2 = 665,
+ RXACHPF_GAIN = 666,
+ MASK7LSB = 667,
+ RXDEC_B0 = 668,
+ RXDEC_B1 = 669,
+ RXDEC_B2 = 670,
+ RXDEC_A1 = 671,
+ RXDEC_A2 = 672,
+ OSCINT1_B0_1 = 673,
+ OSCINT1_B1_1 = 674,
+ OSCINT1_B2_1 = 675,
+ OSCINT1_A1_1 = 676,
+ OSCINT1_A2_1 = 677,
+ OSCINT1_B0_2 = 678,
+ OSCINT1_B1_2 = 679,
+ OSCINT1_B2_2 = 680,
+ OSCINT1_A1_2 = 681,
+ OSCINT1_A2_2 = 682,
+ OSCINT2_B0_1 = 683,
+ OSCINT2_B1_1 = 684,
+ OSCINT2_B2_1 = 685,
+ OSCINT2_A1_1 = 686,
+ OSCINT2_A2_1 = 687,
+ OSCINT2_B0_2 = 688,
+ OSCINT2_B1_2 = 689,
+ OSCINT2_B2_2 = 690,
+ OSCINT2_A1_2 = 691,
+ OSCINT2_A2_2 = 692,
+ UNUSED693 = 693,
+ UNUSED694 = 694,
+ UNUSED695 = 695,
+ RING_LPF_B0 = 696,
+ RING_LPF_B1 = 697,
+ RING_LPF_B2 = 698,
+ RING_LPF_A1 = 699,
+ RING_LPF_A2 = 700,
+ LCRDBI = 701,
+ LONGDBI = 702,
+ VBAT_TIMER = 703,
+ LF_SPEEDUP_TIMER = 704,
+ DC_SPEEDUP_TIMER = 705,
+ AC_SPEEDUP_TIMER = 706,
+ LCR_SPEEDUP_TIMER = 707,
+ CM_SPEEDUP_TIMER = 708,
+ VCM_TH = 709,
+ AC_SPEEDUP_TH = 710,
+ SPR_SIG_0 = 711,
+ SPR_SIG_1 = 712,
+ SPR_SIG_2 = 713,
+ SPR_SIG_3 = 714,
+ SPR_SIG_4 = 715,
+ SPR_SIG_5 = 716,
+ SPR_SIG_6 = 717,
+ SPR_SIG_7 = 718,
+ SPR_SIG_8 = 719,
+ SPR_SIG_9 = 720,
+ SPR_SIG_10 = 721,
+ SPR_SIG_11 = 722,
+ SPR_SIG_12 = 723,
+ SPR_SIG_13 = 724,
+ SPR_SIG_14 = 725,
+ SPR_SIG_15 = 726,
+ SPR_SIG_16 = 727,
+ SPR_SIG_17 = 728,
+ SPR_SIG_18 = 729,
+ COUNTER_VTR_VAL = 730,
+ CONST_028 = 731,
+ CONST_032 = 732,
+ CONST_038 = 733,
+ CONST_046 = 734,
+ COUNTER_IRING_VAL = 735,
+ GAIN_RING = 736,
+ RING_HYST = 737,
+ COMP_Z = 738,
+ CONST_115 = 739,
+ CONST_110 = 740,
+ CONST_105 = 741,
+ CONST_100 = 742,
+ CONST_095 = 743,
+ CONST_090 = 744,
+ CONST_085 = 745,
+ V_RASUM_IDEAL = 746,
+ CONST_ONE = 747,
+ VCM_OH = 748,
+ VCM_RING = 749,
+ VCM_HYST = 750,
+ VOV_GND = 751,
+ VOV_BAT = 752,
+ VOV_RING_BAT = 753,
+ CM_DBI = 754,
+ RTPER = 755,
+ P_TH_HVIC = 756,
+ UNUSED757 = 757,
+ UNUSED758 = 758,
+ COEF_P_HVIC = 759,
+ COEF_Q1256 = 760,
+ UNUSED761 = 761,
+ UNUSED762 = 762,
+ UNUSED763 = 763,
+ BAT_HYST = 764,
+ BAT_DBI = 765,
+ VBATL_EXPECT = 766,
+ VBATH_EXPECT = 767,
+ VBATR_EXPECT = 768,
+ BAT_SETTLE = 769,
+ VBAT_IRQ_TH = 770,
+ MADC_VTIPC_OS = 771,
+ MADC_VRINGC_OS = 772,
+ MADC_VBAT_OS = 773,
+ MADC_VLONG_OS = 774,
+ UNUSED775 = 775,
+ MADC_VDC_OS = 776,
+ MADC_ILONG_OS = 777,
+ UNUSED778 = 778,
+ UNUSED779 = 779,
+ MADC_ILOOP_OS = 780,
+ MADC_SCALE_ILOOP = 781,
+ UNUSED782 = 782,
+ UNUSED783 = 783,
+ DC_ADC_OS = 784,
+ CAL_UNITY = 785,
+ UNUSED786 = 786,
+ UNUSED787 = 787,
+ ACADC_OFFSET = 788,
+ ACDAC_OFFSET = 789,
+ CAL_DCDAC_CODE = 790,
+ CAL_DCDAC_15MA = 791,
+ UNUSED792 = 792,
+ UNUSED793 = 793,
+ UNUSED794 = 794,
+ UNUSED795 = 795,
+ UNUSED796 = 796,
+ UNUSED797 = 797,
+ UNUSED798 = 798,
+ UNUSED799 = 799,
+ UNUSED800 = 800,
+ CAL_LB_TSQUELCH = 801,
+ CAL_LB_TCHARGE = 802,
+ CAL_LB_TSETTLE0 = 803,
+ CAL_GOERTZEL_DLY = 804,
+ CAL_GOERTZEL_ALPHA = 805,
+ CAL_DECLPF_K = 806,
+ CAL_DECLPF_B1 = 807,
+ CAL_DECLPF_B2 = 808,
+ CAL_DECLPF_A1 = 809,
+ CAL_DECLPF_A2 = 810,
+ CAL_ACADC_THRL = 811,
+ CAL_ACADC_THRH = 812,
+ CAL_ACADC_TSETTLE = 813,
+ DTROW0TH = 814,
+ DTROW1TH = 815,
+ DTROW2TH = 816,
+ DTROW3TH = 817,
+ DTCOL0TH = 818,
+ DTCOL1TH = 819,
+ DTCOL2TH = 820,
+ DTCOL3TH = 821,
+ DTFTWTH = 822,
+ DTRTWTH = 823,
+ DTROWRTH = 824,
+ DTCOLRTH = 825,
+ DTROW2HTH = 826,
+ DTCOL2HTH = 827,
+ DTMINPTH = 828,
+ DTHOTTH = 829,
+ RXPWR = 830,
+ TXPWR = 831,
+ RXMODPWR = 832,
+ TXMODPWR = 833,
+ FSKFREQ0 = 834,
+ FSKFREQ1 = 835,
+ FSKAMP0 = 836,
+ FSKAMP1 = 837,
+ FSK01 = 838,
+ FSK10 = 839,
+ VOCDELTA = 840,
+ VOCLTH = 841,
+ VOCHTH = 842,
+ RINGOF = 843,
+ RINGFR = 844,
+ RINGAMP = 845,
+ RINGPHAS = 846,
+ RTDCTH = 847,
+ RTACTH = 848,
+ RTDCDB = 849,
+ RTACDB = 850,
+ RTCOUNT = 851,
+ LCROFFHK = 852,
+ LCRONHK = 853,
+ LCRMASK = 854,
+ LCRMASK_POLREV = 855,
+ LCRMASK_STATE = 856,
+ LCRMASK_LINECAP = 857,
+ LONGHITH = 858,
+ LONGLOTH = 859,
+ IRING_LIM = 860,
+ AC_PU_DELTA1 = 861,
+ AC_PU_DELTA2 = 862,
+ DIAG_LPF_8K = 863,
+ DIAG_LPF_128K = 864,
+ DIAG_INV_N = 865,
+ DIAG_GAIN = 866,
+ DIAG_G_CAL = 867,
+ DIAG_OS_CAL = 868,
+ SPR_GAIN_TRIM = 869,
+ UNUSED870 = 870,
+ AC_DAC_GAIN = 871,
+ UNUSED872 = 872,
+ UNUSED873 = 873,
+ AC_DAC_GAIN0 = 874,
+ EZSYNTH_B0 = 875,
+ OFFLD_DAC_SCALE = 876,
+ UNUSED877 = 877,
+ OFFLD_DAC_OS = 878,
+ UNUSED879 = 879,
+ AC_ADC_GAIN = 880,
+ ILOOP1LPF = 881,
+ RING_FLUSH_TIMER = 882,
+ ALAW_BIAS = 883,
+ MADC_VTRC_SCALE = 884,
+ MADC_VBAT_SCALE = 885,
+ UNUSED886 = 886,
+ MADC_VLONG_SCALE = 887,
+ MADC_VLONG_SCALE_RING = 888,
+ UNUSED889 = 889,
+ MADC_VDC_SCALE = 890,
+ MADC_ILONG_SCALE = 891,
+ UNUSED892 = 892,
+ UNUSED893 = 893,
+ VDIFF_SENSE_SCALE = 894,
+ VDIFF_SENSE_SCALE_RING = 895,
+ VOV_RING_GND = 896,
+ P_TH_OFFLOAD = 897,
+ CAL_LB_OSC1_FREQ = 898,
+ CAL_DCDAC_9TAU = 899,
+ CAL_MADC_9TAU = 900,
+ ADAP_RING_MIN_I = 901,
+ SWEEP_STEP = 902,
+ SWEEP_STEP_SAVE = 903,
+ SWEEP_REF = 904,
+ AMP_STEP = 905,
+ RXACGAIN_SAVE = 906,
+ AMP_RAMP_INIT = 907,
+ DIAG_HPF_GAIN = 908,
+ DIAG_HPF_8K = 909,
+ DIAG_ADJ_STEP = 910,
+ UNUSED911 = 911,
+ UNUSED912 = 912,
+ MADC_SCALE_INV = 913,
+ UNUSED914 = 914,
+ PWRSAVE_TIMER = 915,
+ OFFHOOK_THRESH = 916,
+ SPEEDUP_MASK_TIMER = 917,
+ XTALK_TIMER = 918,
+ VBAT_TRACK_MIN = 919,
+ VBAT_TRACK_MIN_RNG = 920,
+ UNUSED921 = 921,
+ UNUSED922 = 922,
+ UNUSED923 = 923,
+ UNUSED924 = 924,
+ UNUSED925 = 925,
+ UNUSED926 = 926,
+ DC_HOLD_DAC_OS = 927,
+ DAA_DTMF_IN_SCALE = 928,
+ NOTCH_B0 = 929,
+ NOTCH_B1 = 930,
+ NOTCH_B2 = 931,
+ NOTCH_A1 = 932,
+ NOTCH_A2 = 933,
+ METER_LPF_B0 = 934,
+ METER_LPF_B1 = 935,
+ METER_LPF_B2 = 936,
+ METER_LPF_A1 = 937,
+ METER_LPF_A2 = 938,
+ METER_SIG_0 = 939,
+ METER_SIG_1 = 940,
+ METER_SIG_2 = 941,
+ METER_SIG_3 = 942,
+ METER_SIG_4 = 943,
+ METER_SIG_5 = 944,
+ METER_SIG_6 = 945,
+ METER_SIG_7 = 946,
+ METER_SIG_8 = 947,
+ METER_SIG_9 = 948,
+ METER_SIG_10 = 949,
+ METER_SIG_11 = 950,
+ METER_SIG_12 = 951,
+ METER_SIG_13 = 952,
+ METER_SIG_14 = 953,
+ METER_SIG_15 = 954,
+ METER_BP_B0 = 955,
+ METER_BP_B1 = 956,
+ METER_BP_B2 = 957,
+ METER_BP_A1 = 958,
+ METER_BP_A2 = 959,
+ PM_AMP_THRESH = 960,
+ PM_GAIN = 961,
+ PWRSAVE_DBI = 962,
+ DCDC_ANA_SCALE = 963,
+ VOV_BAT_PWRSAVE_LO = 964,
+ VOV_BAT_PWRSAVE_HI = 965,
+ AC_ADC_GAIN0 = 966,
+ SCALE_KAUDIO = 967,
+ METER_GAIN_TEMP = 968,
+ METER_RAMP_STEP = 969,
+ THERM_DBI = 970,
+ LPR_SCALE = 971,
+ LPR_CM_OS = 972,
+ VOV_DCDC_SLOPE = 973,
+ VOV_DCDC_OS = 974,
+ VOV_RING_BAT_MAX = 975,
+ SLOPE_VLIM1 = 976,
+ SLOPE_RFEED1 = 977,
+ SLOPE_ILIM1 = 978,
+ V_VLIM1 = 979,
+ V_RFEED1 = 980,
+ V_ILIM1 = 981,
+ CONST_RFEED1 = 982,
+ CONST_ILIM1 = 983,
+ I_VLIM1 = 984,
+ SLOPE_VLIM2 = 985,
+ SLOPE_RFEED2 = 986,
+ SLOPE_ILIM2 = 987,
+ V_VLIM2 = 988,
+ V_RFEED2 = 989,
+ V_ILIM2 = 990,
+ CONST_RFEED2 = 991,
+ CONST_ILIM2 = 992,
+ I_VLIM2 = 993,
+ DIAG_V_TAR = 994,
+ DIAG_V_TAR2 = 995,
+ STOP_TIMER1_VAL = 996,
+ STOP_TIMER2_VAL = 997,
+ DIAG_VCM1_TAR = 998,
+ DIAG_VCM_STEP = 999,
+ LKG_DNT_HIRES = 1000,
+ LKG_DNR_HIRES = 1001,
+ LINEAR_OS = 1002,
+ CPUMP_DEB = 1003,
+ DCDC_VERR = 1004,
+ DCDC_VERR_HYST = 1005,
+ DCDC_OITHRESH_LO = 1006,
+ DCDC_OITHRESH_HI = 1007,
+ HV_BIAS_ONHK = 1008,
+ HV_BIAS_OFFHK = 1009,
+#ifdef USE_SI3226X_REVB_DEFINES
+ RING_ENTRY_DLY = 1010,
+ RING_EXIT_DLY = 1011,
+ VBAT_FIXRL_RING = 1012,
+ VBAT_FIXRL_ACT = 1013,
+ VBAT_FIXRL_LP = 1014,
+ VOV_RING_BAT_DCDC = 1015,
+ P_OFFLOAD_VBAT_HYST = 1016,
+ LKG_OFHK_OFFSET = 1017,
+ LKG_LB_OFFSET = 1018,
+ UNUSED1019 = 1019,
+ VBATH_DELTA = 1020,
+ UVTHRESH_MAX = 1021,
+ UVTHRESH_SCALE = 1022,
+ UVTHRESH_BIAS = 1023
+#else
+ UVTHRESH_BIAS = 1010,
+ UVTHRESH_SCALE = 1011,
+ UVTHRESH_MAX = 1012,
+ VBATH_DELTA = 1013,
+ UNUSED1014 = 1014,
+ VOV_RING_BAT_DCDC = 1015,
+ P_OFFLOAD_VBAT_HYST = 1016,
+ LKG_LB_OFFSET = 1017,
+ LKG_OFHK_OFFSET = 1018
+#endif
+};
+
+/*
+** This defines the mnemonics for applicable SI3226X Memory-mapped register locations
+*/
+enum
+{
+ PD_BIAS = 1413,
+ PD_VBAT_SNS = 1418,
+ PD_HVIC = 1430,
+ MADC_LOOP_MAN = 1445,
+ HVIC_CNTL_MAN = 1451,
+ CAL_TRNRD_DACT = 1458,
+ CAL_TRNRD_DACR,
+ CMDAC_FWD = 1476,
+ CMDAC_REV,
+ RDC_SUM = 1499,
+ PD_OFFLD_DAC = 1512,
+ PD_OFFLD_GM = 1513,
+ PD_DCDC = 1538,
+ PD_UVLO = 1540,
+ PD_OVLO,
+ PD_OCLO,
+ DCDC_UVHYST = 1545,
+ DCDC_UVTHRESH,
+ DCDC_OVTHRESH = 1547,
+ DCDC_OITHRESH,
+ UNUSED1549,
+ DCDC_CCM_THRESH,
+ DCDC_STATUS,
+ DCDC_FSW,
+ DCDC_SWDRV_POL,
+ DCDC_UVPOL,
+ DCDC_CPUMP,
+ UNUSED1556,
+ UNUSED1557,
+ DCDC_VREF_CTRL,
+ UNUSED1559,
+ DCDC_RNGTYPE,
+ DCDC_DCFF_ENABLE = 1635,
+ DCDC_OIMASK = 1565,
+ PD_REF_OSC = 1571,
+ PWRSAVE_CTRL_LO = 1575,
+ DCDC_ANA_GAIN = 1585,
+ DCDC_ANA_TOFF,
+ DCDC_ANA_TONMIN,
+ DCDC_ANA_TONMAX,
+ DCDC_ANA_DSHIFT,
+ DCDC_ANA_LPOLY,
+ DCDC_PD_ANA = 1592,
+ PATCH_JMP8 = 1597,
+ PM_ACTIVE = 1606,
+ PM_INACTIVE = 1607,
+ DCDC_CPUMP_LP_MASK = 1616,
+ DCDC_UV_MAN = 1640,
+ DCDC_UV_DEBOUNCE = 1641,
+ DCDC_OV_MAN = 1642,
+ DCDC_OV_DEBOUNCE = 1643,
+ OFFLD_DAC_MAN = 1646
+};
+
+/* Temporary Rev B Support During Rev C Adoption */
+#define LKG_OFHK_OFFSET_REVB 1017
+#define LKG_LB_OFFSET_REVB 1018
+#define VBATH_DELTA_REVB 1020
+#define UVTHRESH_MAX_REVB 1021
+#define UVTHRESH_SCALE_REVB 1022
+#define UVTHRESH_BIAS_REVB 1023
+
+/* Temporarily map obsolete ram locations for debug purposes */
+#define DCDC_FSW_NORM UNUSED921
+#define DCDC_FSW_NORM_LO UNUSED922
+#define DCDC_DIN_LIM UNUSED925
+#define DCDC_FSW_RING UNUSED923
+#define DCDC_FSW_RING_LO UNUSED924
+#define DCDC_VOUT_LIM UNUSED926
+#define DCDC_FSW_VHYST Y3
+#define DCDC_FSW_VTHLO Y2
+#define DAA_CNTL 74
+#define DCDC_VREF_MIN VBAT_TRACK_MIN
+#define DCDC_VREF_MIN_RNG VBAT_TRACK_MIN_RNG
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x.h
new file mode 100644
index 0000000..c286e83
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x.h
@@ -0,0 +1,258 @@
+/*
+** Copyright (c) 2015-2016 by Silicon Laboratories
+**
+** $Id: si3228x.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef SI3228XH_H
+#define SI3228XH_H
+
+#include "proslic.h"
+
+
+#define SI3228X_CHAN_PER_DEVICE 2
+
+/*
+** SI3228X DataTypes/Function Definitions
+*/
+
+typedef ProSLIC_DCfeed_Cfg Si3228x_DCfeed_Cfg;
+typedef Si3228x_DCfeed_Cfg *Si3228x_DCfeed_Cfg_ptr;
+/*
+** Defines structure for general configuration and the dcdc converter
+*/
+typedef struct
+{
+ uInt8 device_key; /* Used to prevent loaded coeffs for another device */
+ bomOptionsType bomOpt;
+ batRailType batType;
+ ramData bat_hyst;
+ ramData vbatr_expect; /* default - this is overwritten by ring preset */
+ ramData vbath_expect; /* default - this is overwritten by dc feed preset */
+ ramData pwrsave_timer;
+ ramData offhook_thresh;
+ ramData vbat_track_min;
+ ramData vbat_track_min_rng;
+ ramData pwrsave_dbi;
+ ramData dcdc_ana_scale;
+ ramData vov_bat_pwrsave_min;
+ ramData vov_bat_pwrsave_min_rng;
+ ramData therm_dbi;
+ ramData cpump_dbi;
+ ramData dcdc_verr;
+ ramData dcdc_verr_hyst;
+ ramData dcdc_oithresh_lo;
+ ramData dcdc_oithresh_hi;
+ ramData pd_uvlo;
+ ramData pd_ovlo;
+ ramData pd_oclo;
+ ramData pd_swdrv;
+ ramData dcdc_uvhyst;
+ ramData dcdc_uvthresh;
+ ramData dcdc_ovthresh;
+ ramData dcdc_oithresh;
+ ramData dcdc_swdrv_pol;
+ ramData dcdc_uvpol;
+ ramData dcdc_vref_man;
+ ramData dcdc_vref_ctrl;
+ ramData dcdc_rngtype;
+ ramData dcdc_ana_vref;
+ ramData dcdc_ana_gain;
+ ramData dcdc_ana_toff;
+ ramData dcdc_ana_tonmin;
+ ramData dcdc_ana_tonmax;
+ ramData dcdc_ana_dshift;
+ ramData dcdc_ana_lpoly;
+ ramData dcdc_aux_invert;
+ ramData dcdc_cpump_lp;
+ ramData dcdc_cpump_pulldown;
+ ramData dcdc_lift_en;
+ ramData coef_p_hvic;
+ ramData p_th_hvic;
+ uInt8 vdc_range;
+ uInt8 autoRegister;
+ uInt8 irqen1;
+ uInt8 irqen2;
+ uInt8 irqen3;
+ uInt8 irqen4;
+ uInt8 enhance;
+ ramData scale_kaudio;
+ uInt8 zcal_en;
+ ramData lkg_ofhk_offset;
+ ramData lkg_lb_offset;
+ ramData vbath_delta;
+ ramData uvthresh_max;
+ ramData uvthresh_scale;
+ ramData uvthresh_bias;
+} Si3228x_General_Cfg;
+
+
+/*
+** Defines structure for configuring pcm
+*/
+typedef struct
+{
+ uInt8 pcmFormat;
+ uInt8 widebandEn;
+ uInt8 pcm_tri;
+ uInt8 tx_edge;
+ uInt8 alaw_inv;
+} Si3228x_PCM_Cfg;
+
+/*
+** Defines structure for configuring pulse metering
+*/
+typedef struct
+{
+ ramData pm_amp_thresh;
+ uInt8 pm_freq;
+ uInt8 pm_auto;
+ ramData pm_active;
+ ramData pm_inactive;
+} Si3228x_PulseMeter_Cfg;
+
+/*
+** Defines structure for configuring FSK generation
+*/
+typedef ProSLIC_FSK_Cfg Si3228x_FSK_Cfg;
+
+
+/*
+** Defines structure for configuring impedance synthesis
+*/
+typedef struct
+{
+ ramData zsynth_b0;
+ ramData zsynth_b1;
+ ramData zsynth_b2;
+ ramData zsynth_a1;
+ ramData zsynth_a2;
+ uInt8 ra;
+} Si3228x_Zsynth_Cfg;
+
+/*
+** Defines structure for configuring hybrid
+*/
+typedef struct
+{
+ ramData ecfir_c2;
+ ramData ecfir_c3;
+ ramData ecfir_c4;
+ ramData ecfir_c5;
+ ramData ecfir_c6;
+ ramData ecfir_c7;
+ ramData ecfir_c8;
+ ramData ecfir_c9;
+ ramData ecfir_b0;
+ ramData ecfir_b1;
+ ramData ecfir_a1;
+ ramData ecfir_a2;
+} Si3228x_hybrid_Cfg;
+
+
+/*
+** Defines structure for configuring audio eq
+*/
+
+typedef struct
+{
+ ramData txaceq_c0;
+ ramData txaceq_c1;
+ ramData txaceq_c2;
+ ramData txaceq_c3;
+
+ ramData rxaceq_c0;
+ ramData rxaceq_c1;
+ ramData rxaceq_c2;
+ ramData rxaceq_c3;
+} Si3228x_audioEQ_Cfg;
+
+
+
+/*
+** Defines structure for configuring audio gain
+*/
+
+typedef ProSLIC_audioGain_Cfg Si3228x_audioGain_Cfg;
+
+
+typedef struct
+{
+ Si3228x_audioEQ_Cfg audioEQ;
+ Si3228x_hybrid_Cfg hybrid;
+ Si3228x_Zsynth_Cfg zsynth;
+ ramData txgain;
+ ramData rxgain;
+ ramData rxachpf_b0_1;
+ ramData rxachpf_b1_1;
+ ramData rxachpf_a1_1;
+ int16 txgain_db; /*overall gain associated with this configuration*/
+ int16 rxgain_db;
+} Si3228x_Impedance_Cfg;
+
+
+
+/*
+** Defines structure for configuring tone generator
+*/
+typedef ProSLIC_Tone_Cfg Si3228x_Tone_Cfg;
+
+/*
+** Defines structure for configuring ring generator
+*/
+typedef struct
+{
+ ramData rtper;
+ ramData freq;
+ ramData amp;
+ ramData phas;
+ ramData offset;
+ ramData slope_ring;
+ ramData iring_lim;
+ ramData rtacth;
+ ramData rtdcth;
+ ramData rtacdb;
+ ramData rtdcdb;
+ ramData vov_ring_bat;
+ ramData vov_ring_gnd;
+ ramData vbatr_expect;
+ uInt8 talo;
+ uInt8 tahi;
+ uInt8 tilo;
+ uInt8 tihi;
+ ramData adap_ring_min_i;
+ ramData counter_iring_val;
+ ramData counter_vtr_val;
+ ramData ar_const28;
+ ramData ar_const32;
+ ramData ar_const38;
+ ramData ar_const46;
+ ramData rrd_delay;
+ ramData rrd_delay2;
+ ramData vbat_track_min_rng;
+ uInt8 ringcon;
+ uInt8 userstat;
+ ramData vcm_ring;
+ ramData vcm_ring_fixed;
+ ramData delta_vcm;
+ ramData dcdc_rngtype;
+ ramData vov_dcdc_slope;
+ ramData vov_dcdc_os;
+ ramData vov_ring_bat_max;
+ ramData smart_ring_period;
+ ramData smart_ring_phase;
+} Si3228x_Ring_Cfg;
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x_intf.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x_intf.h
new file mode 100644
index 0000000..872b5d9
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x_intf.h
@@ -0,0 +1,518 @@
+/*
+** Copyright (c) 2015-2016 by Silicon Laboratories
+**
+** $Id: si3228x_intf.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Si3228x_Intf.h
+** Si3228x ProSLIC interface header file
+**
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the ProSLIC driver.
+**
+**
+*/
+
+#ifndef SI3228X_INTF_H
+#define SI3228X_INTF_H
+#include "si3228x.h"
+
+/*
+** Calibration Constants
+*/
+#define SI3228X_CAL_STD_CALR1 0xC0 /* FF */
+#define SI3228X_CAL_STD_CALR2 0x18 /* F8 */
+
+/* Timeouts in 10s of ms */
+#define SI3228X_TIMEOUT_DCDC_UP 200
+#define SI3228X_TIMEOUT_DCDC_DOWN 200
+
+/* The following macros are for backward compatibility */
+#define Si3228x_DCFeedSetup(PCHAN,PRESET) Si3228x_DCFeedSetupCfg((PCHAN),Si3228x_DCfeed_Presets,(PRESET))
+#define Si3228x_LoadPatch ProSLIC_LoadPatch
+#define Si3228x_ReadHookStatus ProSLIC_ReadHookStatus
+#define Si3228x_SetPowersaveMode ProSLIC_SetPowersaveMode
+#define Si3228x_VerifyPatch ProSLIC_VerifyPatch
+#define Si3228x_Init(PCHAN,SZ) Si3228x_Init_with_Options((PCHAN),(SZ),INIT_NO_OPT)
+#define Si3228x_VerifyControlInterface ProSLIC_VefifyControlInterface
+#define Si3228x_ShutdownChannel ProSLIC_PowerDownConverter
+#define Si3228x_PowerDownConverter ProSLIC_PowerDownConverter
+#define Si3228x_Calibrate ProSLIC_Calibrate
+#define Si3228x_SetLinefeedStatusBroadcast ProSLIC_SetLinefeedStatusBroadcast
+
+/* DC Feed */
+#ifndef DISABLE_DCFEED_SETUP
+extern Si3228x_DCfeed_Cfg Si3228x_DCfeed_Presets[];
+#endif
+
+
+/*
+**
+** PROSLIC INITIALIZATION FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_Init_MultiBOM
+**
+** Description:
+** Initializes the ProSLIC w/ selected general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** size: number of channels
+** preset: general configuration preset
+**
+** Return:
+** none
+*/
+int Si3228x_Init_MultiBOM (proslicChanType_ptr *hProslic,int size,int preset);
+
+/*
+** Function: Si3228x_Init_with_Options
+**
+** Description:
+** Initializes the ProSLIC with an option.
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** size - number of continuous channels to initialize
+** init_opt - which initialization type to do.
+**
+** Return:
+** none
+*/
+int Si3228x_Init_with_Options (proslicChanType_ptr *pProslic, int size,
+ initOptionsType init_opt);
+
+/*
+** Function: PROSLIC_VerifyControlInterface
+**
+** Description:
+** Verify SPI port read capabilities
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+**
+** Return:
+** none
+*/
+int Si3228x_VerifyControlInterface (proslicChanType_ptr hProslic);
+
+/*
+** Function: Si3228x_PowerUpConverter
+**
+** Description:
+** Powers all DC/DC converters sequentially with delay to minimize
+** peak power draw on VDC.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3228x_PowerUpConverter(proslicChanType_ptr hProslic);
+
+/*
+** Function: Si3228x_Calibrate
+**
+** Description:
+** Generic calibration function for Si3228x
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object,
+** size: maximum number of channels
+** calr: array of CALRx register values
+** maxTime: cal timeout (in ms)
+**
+** Return:
+** int
+*/
+int Si3228x_Calibrate (proslicChanType_ptr *hProslic, int size, uInt8 *calr,
+ int maxTime);
+
+/*
+** Function: PROSLIC_EnableInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** hProslic: pointer to Proslic object
+**
+** Return:
+**
+*/
+int Si3228x_EnableInterrupts (proslicChanType_ptr hProslic);
+
+/*
+**
+** PROSLIC CONFIGURATION FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_RingSetup
+**
+** Description:
+** configure ringing
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pRingSetup: pointer to ringing config structure
+**
+** Return:
+** none
+*/
+int Si3228x_RingSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_ZsynthSetup
+**
+** Description:
+** configure impedance synthesis
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pZynth: pointer to zsynth config structure
+**
+** Return:
+** none
+*/
+int Si3228x_ZsynthSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pAudio: pointer to audio gains config structure
+**
+** Return:
+** none
+*/
+int Si3228x_TXAudioGainSetup (proslicChanType *pProslic, int preset);
+int Si3228x_RXAudioGainSetup (proslicChanType *pProslic, int preset);
+#define Si3228x_AudioGainSetup ProSLIC_AudioGainSetup
+int Si3228x_TXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale);
+int Si3228x_RXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale);
+
+/*
+** Function: PROSLIC_DCFeedSetup
+**
+** Description:
+** configure dc feed
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pDcFeed: pointer to dc feed config structure
+**
+** Return:
+** none
+*/
+int Si3228x_DCFeedSetupCfg (proslicChanType *pProslic,ProSLIC_DCfeed_Cfg *cfg,
+ int preset);
+
+/*
+** Function: PROSLIC_PCMSetup
+**
+** Description:
+** configure pcm
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pPcm: pointer to pcm config structure
+**
+** Return:
+** none
+*/
+int Si3228x_PCMSetup (proslicChanType *pProslic, int preset);
+
+/*
+**
+** PROSLIC CONTROL FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_WriteLinefeed
+**
+** Description:
+** Sets linefeed state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** newLinefeed: new linefeed state
+**
+** Return:
+** none
+*/
+int Si3228x_SetLinefeedStatus (proslicChanType *pProslic,uInt8 newLinefeed);
+
+/*
+** Function: PROSLIC_SetLinefeedBroadcast
+**
+** Description:
+** Sets linefeed state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** newLinefeed: new linefeed state
+**
+** Return:
+** none
+*/
+int Si3228x_SetLinefeedStatusBroadcast (proslicChanType *pProslic,
+ uInt8 newLinefeed);
+
+/*
+** Function: ProSLIC_MWISetup
+**
+** Description:
+** Modify default MWI amplitude and switch debounce parameters
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** vpk_mag: peak flash voltgage (vpk) - passing a 0 results
+** in no change to VBATH_NEON
+** lcmrmask_mwi: LCR mask time (ms) after MWI state switch - passing
+** a 0 results in no change to LCRMASK_MWI
+**
+** Return:
+** none
+*/
+int Si3228x_MWISetup (proslicChanType *pProslic,uInt16 vpk_mag,
+ uInt16 lcrmask_mwi);
+
+/*
+** Function: ProSLIC_MWIEnable
+**
+** Description:
+** Enable MWI feature
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3228x_MWIEnable (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_MWIDisable
+**
+** Description:
+** Disable MWI feature
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3228x_MWIDisable (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_SetMWIState
+**
+** Description:
+** Set MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** flash_on: 0 = low, 1 = high (VBATH_NEON)
+**
+** Return:
+** none
+*/
+int Si3228x_SetMWIState (proslicChanType *pProslic,uInt8 flash_on);
+
+/*
+** Function: ProSLIC_SetMWIState_ramp
+**
+** Description:
+** Set MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** flash_on: 0 = low, 1 = high (VBATH_NEON)
+** step_delay: delay between VBATH steps (ms)
+** step_num: number of steps between low and high states
+**
+** Return:
+** none
+*/
+int Si3228x_SetMWIState_ramp (proslicChanType *pProslic,uInt8 flash_on,
+ uInt8 step_delay,uInt8 step_num);
+
+/*
+** Function: ProSLIC_GetMWIState
+**
+** Description:
+** Read MWI state
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** 0 - Flash OFF, 1 - Flash ON, RC_MWI_NOT_ENABLED
+*/
+int Si3228x_GetMWIState (proslicChanType *pProslic);
+
+/*
+** Function: ProSLIC_MWI
+**
+** Description:
+** implements message waiting indicator
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** lampOn: 0 = turn lamp off, 1 = turn lamp on
+**
+** Return:
+** none
+**
+** Use Deprecated.
+*/
+int Si3228x_MWI (proslicChanType *pProslic,uInt8 lampOn);
+
+/*
+** Function: PROSLIC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+** pPulseCfg: pointer to pulse metering config structure
+**
+** Return:
+** none
+*/
+int Si3228x_PulseMeterSetup (proslicChanType *pProslic, int preset);
+
+/*
+** Function: PROSLIC_dbgSetDCFeed
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3228x_dbgSetDCFeed (proslicChanType *pProslic, uInt32 v_vlim_val,
+ uInt32 i_ilim_val, int32 preset);
+
+/*
+** Function: PROSLIC_dbgSetDCFeedVopen
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3228x_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val,
+ int32 preset);
+
+
+/*
+** Function: PROSLIC_dbgSetDCFeedIloop
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3228x_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val,
+ int32 preset);
+
+
+/*
+** Function: PROSLIC_dbgRingingSetup
+**
+** Description:
+** Provisionary function for setting up
+** Ring type, frequency, amplitude and dc offset.
+** Main use will be by peek/poke applications.
+*/
+int Si3228x_dbgSetRinging (proslicChanType *pProslic,
+ ProSLIC_dbgRingCfg *ringCfg, int preset);
+
+/*
+** Function: PROSLIC_dbgSetRXGain
+**
+** Description:
+** Provisionary function for setting up
+** RX path gain.
+*/
+int Si3228x_dbgSetRXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+/*
+** Function: PROSLIC_dbgSetTXGain
+**
+** Description:
+** Provisionary function for setting up
+** TX path gain.
+*/
+int Si3228x_dbgSetTXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset);
+
+
+/*
+** Function: PROSLIC_LineMonitor
+**
+** Description:
+** Monitor line voltages and currents
+*/
+int Si3228x_LineMonitor(proslicChanType *pProslic, proslicMonitorType *monitor);
+
+
+/*
+** Function: PROSLIC_PSTNCheck
+**
+** Description:
+** Continuous monitor of ilong to detect hot pstn line
+*/
+int Si3228x_PSTNCheck(proslicChanType *pProslic,
+ proslicPSTNCheckObjType *pstnCheckObj);
+
+/*
+** Function: PROSLIC_DiffPSTNCheck
+**
+** Description:
+** Detection of foreign PSTN
+*/
+int Si3228x_DiffPSTNCheck (proslicChanType *pProslic,
+ proslicDiffPSTNCheckObjType *pPSTNCheck);
+
+/*
+** Function: PROSLIC_SetPowersaveMode
+**
+** Description:
+** Enable or Disable powersave mode
+*/
+int Si3228x_SetPowersaveMode(proslicChanType *pProslic, int pwrsave);
+
+/*
+** Function: PROSLIC_ReadMADCScaled
+**
+** Description:
+** ReadMADC (or other sensed voltage/currents) and
+** return scaled value in int32 format
+*/
+int32 Si3228x_ReadMADCScaled(proslicChanType *pProslic, uInt16 addr,
+ int32 scale);
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x_registers.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x_registers.h
new file mode 100644
index 0000000..f81e5c2
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si3228x_registers.h
@@ -0,0 +1,1236 @@
+/*
+** Copyright (c) 2015-2016 by Silicon Laboratories
+**
+** $Id: si3228x_registers.h 5475 2016-01-18 16:00:13Z elgeorge $
+**
+** Si3228_Registers.h
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file that contains
+** register and RAM names definitions for
+** the Si3228x ProSLIC.
+**
+**
+**
+*/
+#ifndef SI3228REGS_H
+#define SI3228REGS_H
+
+/*
+** This defines the mnemonics for the SI3228x registers
+*/
+enum REGISTERS
+{
+ ID = 0,
+ RESET = 1,
+ MSTREN = 2,
+ MSTRSTAT = 3,
+ RAMSTAT = 4,
+ RAM_ADDR_HI = 5,
+ RAM_DATA_B0 = 6,
+ RAM_DATA_B1 = 7,
+ RAM_DATA_B2 = 8,
+ RAM_DATA_B3 = 9,
+ RAM_ADDR_LO = 10,
+ PCMMODE = 11,
+ PCMTXLO = 12,
+ PCMTXHI = 13,
+ PCMRXLO = 14,
+ PCMRXHI = 15,
+ IRQ = 16,
+ IRQ0 = 17,
+ IRQ1 = 18,
+ IRQ2 = 19,
+ IRQ3 = 20,
+ IRQ4 = 21,
+ IRQEN1 = 22,
+ IRQEN2 = 23,
+ IRQEN3 = 24,
+ IRQEN4 = 25,
+ CALR0 = 26,
+ CALR1 = 27,
+ CALR2 = 28,
+ CALR3 = 29,
+ LINEFEED = 30,
+ POLREV = 31,
+ SPEEDUP_DIS = 32,
+ SPEEDUP = 33,
+ LCRRTP = 34,
+ OFFLOAD = 35,
+ BATSELMAP = 36,
+ BATSEL = 37,
+ RINGCON = 38,
+ RINGTALO = 39,
+ RINGTAHI = 40,
+ RINGTILO = 41,
+ RINGTIHI = 42,
+ LOOPBACK = 43,
+ DIGCON = 44,
+ RA = 45,
+ ZCAL_EN = 46,
+ ENHANCE = 47,
+ OMODE = 48,
+ OCON = 49,
+ O1TALO = 50,
+ O1TAHI = 51,
+ O1TILO = 52,
+ O1TIHI = 53,
+ O2TALO = 54,
+ O2TAHI = 55,
+ O2TILO = 56,
+ O2TIHI = 57,
+ FSKDAT = 58,
+ FSKDEPTH = 59,
+ TONDTMF = 60,
+ TONDET = 61,
+ TONEN = 62,
+ GCI_CI = 63,
+ GLOBSTAT1 = 64,
+ GLOBSTAT2 = 65,
+ USERSTAT = 66,
+ GPIO_CFG1 = 68,
+ DIAG1 = 71,
+ DIAG2 = 72,
+ CM_CLAMP = 73,
+ DIAG3 = 74,
+ PMCON = 75,
+ PCLK_FAULT_CNTL = 76,
+ REG77 = 77,
+ REG78 = 78,
+ REG79 = 79,
+ AUTO = 80,
+ JMPEN = 81,
+ JMP0LO = 82,
+ JMP0HI = 83,
+ JMP1LO = 84,
+ JMP1HI = 85,
+ JMP2LO = 86,
+ JMP2HI = 87,
+ JMP3LO = 88,
+ JMP3HI = 89,
+ JMP4LO = 90,
+ JMP4HI = 91,
+ JMP5LO = 92,
+ JMP5HI = 93,
+ JMP6LO = 94,
+ JMP6HI = 95,
+ JMP7LO = 96,
+ JMP7HI = 97,
+ PDN = 98,
+ PDN_STAT = 99,
+ USERMODE_ENABLE = 126
+};
+
+
+/*
+** This defines the mnemonics for the SI3228x RAM locations
+*/
+enum SRAM
+{
+ IRNGNG_SENSE = 0,
+ MADC_VTIPC = 1,
+ MADC_VRINGC = 2,
+ MADC_VBAT = 3,
+ MADC_VLONG = 4,
+ UNUSED5 = 5,
+ MADC_VDC = 6,
+ MADC_ILONG = 7,
+ MADC_ITIP = 8,
+ MADC_IRING = 9,
+ MADC_ILOOP = 10,
+ VDIFF_SENSE = 11,
+ VTIP = 12,
+ VRING = 13,
+ P_Q1_D = 14,
+ P_Q2_D = 15,
+ P_Q3_D = 16,
+ P_Q4_D = 17,
+ P_Q5_D = 18,
+ P_Q6_D = 19,
+ P_Q1 = 20,
+ DIAG_EX1 = 21,
+ DIAG_EX2 = 22,
+ DIAG_LPF_MADC = 23,
+ DIAG_DMM_I = 24,
+ DIAG_DMM_V = 25,
+ OSC1FREQ = 26,
+ OSC1AMP = 27,
+ OSC1PHAS = 28,
+ OSC2FREQ = 29,
+ OSC2AMP = 30,
+ OSC2PHAS = 31,
+ TESTB0_1 = 32,
+ TESTB1_1 = 33,
+ TESTB2_1 = 34,
+ TESTA1_1 = 35,
+ TESTA2_1 = 36,
+ TESTB0_2 = 37,
+ TESTB1_2 = 38,
+ TESTB2_2 = 39,
+ TESTA1_2 = 40,
+ TESTA2_2 = 41,
+ TESTB0_3 = 42,
+ TESTB1_3 = 43,
+ TESTB2_3 = 44,
+ TESTA1_3 = 45,
+ TESTA2_3 = 46,
+ TESTPKO = 47,
+ TESTAVO = 48,
+ TESTWLN = 49,
+ TESTAVBW = 50,
+ TESTPKFL = 51,
+ TESTAVFL = 52,
+ TESTPKTH = 53,
+ TESTAVTH = 54,
+ DAC_IN_SYNC1 = 55,
+ BYPASS_REG = 56,
+ LCRMASK_CNT = 57,
+ DAC_IN_SYNC = 58,
+ TEMP = 59,
+ TEMP_ISR = 60,
+ P_Q2 = 61,
+ P_Q3 = 62,
+ P_Q4 = 63,
+ P_Q5 = 64,
+ P_Q6 = 65,
+ ILOOP_FILT = 66,
+ ILONG_FILT = 67,
+ VBAT_FILT = 68,
+ VDIFF_FILT = 69,
+ VCM_FILT = 70,
+ VBAT_CNT = 71,
+ V_VLIM_SCALED = 72,
+ V_VLIM_TRACK = 73,
+ V_VLIM_MODFEED = 74,
+ DIAG_P_OUT = 75,
+ DIAG_COUNT = 76,
+ ROW0_MAG = 77,
+ ROW1_MAG = 78,
+ ROW2_MAG = 79,
+ ROW3_MAG = 80,
+ COL0_MAG = 81,
+ COL1_MAG = 82,
+ COL2_MAG = 83,
+ COL3_MAG = 84,
+ ROW0_2ND_Y1 = 85,
+ ROW1_2ND_Y1 = 86,
+ ROW2_2ND_Y1 = 87,
+ ROW3_2ND_Y1 = 88,
+ COL0_2ND_Y1 = 89,
+ COL1_2ND_Y1 = 90,
+ COL2_2ND_Y1 = 91,
+ COL3_2ND_Y1 = 92,
+ ROW0_2ND_Y2 = 93,
+ ROW1_2ND_Y2 = 94,
+ ROW2_2ND_Y2 = 95,
+ ROW3_2ND_Y2 = 96,
+ COL0_2ND_Y2 = 97,
+ COL1_2ND_Y2 = 98,
+ COL2_2ND_Y2 = 99,
+ COL3_2ND_Y2 = 100,
+ DTMF_IN = 101,
+ DTMFDTF_D2_1 = 102,
+ DTMFDTF_D1_1 = 103,
+ DTMFDTF_OUT_1 = 104,
+ DTMFDTF_D2_2 = 105,
+ DTMFDTF_D1_2 = 106,
+ DTMFDTF_OUT_2 = 107,
+ DTMFDTF_D2_3 = 108,
+ DTMFDTF_D1_3 = 109,
+ DTMFDTF_OUT_3 = 110,
+ DTMFDTF_OUT = 111,
+ DTMFLPF_D2_1 = 112,
+ DTMFLPF_D1_1 = 113,
+ DTMFLPF_OUT_1 = 114,
+ DTMFLPF_D2_2 = 115,
+ DTMFLPF_D1_2 = 116,
+ DTMFLPF_OUT_2 = 117,
+ DTMF_ROW = 118,
+ DTMFHPF_D2_1 = 119,
+ DTMFHPF_D1_1 = 120,
+ DTMFHPF_OUT_1 = 121,
+ DTMFHPF_D2_2 = 122,
+ DTMFHPF_D1_2 = 123,
+ DTMFHPF_OUT_2 = 124,
+ DTMF_COL = 125,
+ ROW_POWER = 126,
+ COL_POWER = 127,
+ GP_TIMER = 128,
+ SPR_INTERP_DIF = 129,
+ SPR_INTERP_DIF_OUT = 130,
+ SPR_INTERP_INT = 131,
+ SPR_CNT = 132,
+ ROW0_Y1 = 133,
+ ROW0_Y2 = 134,
+ ROW1_Y1 = 135,
+ ROW1_Y2 = 136,
+ ROW2_Y1 = 137,
+ ROW2_Y2 = 138,
+ ROW3_Y1 = 139,
+ ROW3_Y2 = 140,
+ COL0_Y1 = 141,
+ COL0_Y2 = 142,
+ COL1_Y1 = 143,
+ COL1_Y2 = 144,
+ COL2_Y1 = 145,
+ COL2_Y2 = 146,
+ COL3_Y1 = 147,
+ COL3_Y2 = 148,
+ ROWMAX_MAG = 149,
+ COLMAX_MAG = 150,
+ ROW0_2ND_MAG = 151,
+ COL0_2ND_MAG = 152,
+ ROW_THR = 153,
+ COL_THR = 154,
+ OSC1_Y = 155,
+ OSC2_Y = 156,
+ OSC1_X = 157,
+ OSC1_COEFF = 158,
+ OSC2_X = 159,
+ OSC2_COEFF = 160,
+ RXACIIR_D2_1 = 161,
+ RXACIIR_OUT_1 = 162,
+ RXACIIR_D2_2 = 163,
+ RXACIIR_D1_2 = 164,
+ RXACIIR_OUT_2 = 165,
+ RXACIIR_D2_3 = 166,
+ RXACIIR_D1_3 = 167,
+ RXACIIR_OUT = 168,
+ RXACIIR_OUT_3 = 169,
+ TXACCOMB_D1 = 170,
+ TXACCOMB_D2 = 171,
+ TXACCOMB_D3 = 172,
+ TXACSINC_OUT = 173,
+ TXACHPF_D1_2 = 174,
+ TXACHPF_D2_1 = 175,
+ TXACHPF_D2_2 = 176,
+ TXACHPF_OUT = 177,
+ TXACHPF_OUT_1 = 178,
+ TXACHPF_OUT_2 = 179,
+ TXACIIR_D2_1 = 180,
+ TXACIIR_OUT_1 = 181,
+ TXACIIR_D2_2 = 182,
+ TXACIIR_D1_2 = 183,
+ TXACIIR_OUT_2 = 184,
+ TXACIIR_D2_3 = 185,
+ TXACIIR_D1_3 = 186,
+ TXACIIR_OUT_3 = 187,
+ TXACIIR_OUT = 188,
+ ECIIR_D1 = 189,
+ ECIIR_D2 = 190,
+ EC_DELAY1 = 191,
+ EC_DELAY2 = 192,
+ EC_DELAY3 = 193,
+ EC_DELAY4 = 194,
+ EC_DELAY5 = 195,
+ EC_DELAY6 = 196,
+ EC_DELAY7 = 197,
+ EC_DELAY8 = 198,
+ EC_DELAY9 = 199,
+ EC_DELAY10 = 200,
+ EC_DELAY11 = 201,
+ ECHO_EST = 202,
+ EC_OUT = 203,
+ TESTFILT_OUT_1 = 204,
+ TESTFILT_D1_1 = 205,
+ TESTFILT_D2_1 = 206,
+ TESTFILT_OUT_2 = 207,
+ TESTFILT_D1_2 = 208,
+ TESTFILT_D2_2 = 209,
+ TESTFILT_OUT_3 = 210,
+ TESTFILT_D1_3 = 211,
+ TESTFILT_D2_3 = 212,
+ TESTFILT_PEAK = 213,
+ TESTFILT_ABS = 214,
+ TESTFILT_MEANACC = 215,
+ TESTFILT_COUNT = 216,
+ TESTFILT_NO_OFFSET = 217,
+ RING_X = 218,
+ RING_Y = 219,
+ RING_INT = 220,
+ RING_Y_D1 = 221,
+ RING_DIFF = 222,
+ RING_DELTA = 223,
+ WTCHDOG_CNT = 224,
+ RING_WAVE = 225,
+ UNUSED226 = 226,
+ ONEKHZ_COUNT = 227,
+ TX2100_Y1 = 228,
+ TX2100_Y2 = 229,
+ TX2100_MAG = 230,
+ RX2100_Y1 = 231,
+ RX2100_Y2 = 232,
+ RX2100_MAG = 233,
+ TX2100_POWER = 234,
+ RX2100_POWER = 235,
+ TX2100_IN = 236,
+ RX2100_IN = 237,
+ RINGTRIP_COUNT = 238,
+ RINGTRIP_DC1 = 239,
+ RINGTRIP_DC2 = 240,
+ RINGTRIP_AC1 = 241,
+ RINGTRIP_AC2 = 242,
+ RINGTRIP_AC_COUNT = 243,
+ RINGTRIP_DC_COUNT = 244,
+ RINGTRIP_AC_RESULT = 245,
+ RINGTRIP_DC_RESULT = 246,
+ RINGTRIP_ABS = 247,
+ TXACEQ_OUT = 248,
+ LCR_DBI_CNT = 249,
+ BAT_DBI_CNT = 250,
+ LONG_DBI_CNT = 251,
+ TXACEQ_DELAY3 = 252,
+ TXACEQ_DELAY2 = 253,
+ TXACEQ_DELAY1 = 254,
+ RXACEQ_DELAY3 = 255,
+ RXACEQ_DELAY2 = 256,
+ RXACEQ_DELAY1 = 257,
+ RXACEQ_IN = 258,
+ TXDCCOMB_D1 = 259,
+ TXDCCOMB_D2 = 260,
+ TXDCSINC_OUT = 261,
+ RXACDIFF_D1 = 262,
+ DC_NOTCH_1 = 263,
+ DC_NOTCH_2 = 264,
+ DC_NOTCH_OUT = 265,
+ DC_NOTCH_SCALED = 266,
+ V_FEED_IN = 267,
+ I_TAR = 268,
+ CONST_VLIM = 269,
+ UNITY = 270,
+ TXACNOTCH_1 = 271,
+ TXACNOTCH_2 = 272,
+ TXACNOTCH_OUT = 273,
+ ZSYNTH_1 = 274,
+ ZSYNTH_2 = 275,
+ ZSYNTH_OUT_1 = 276,
+ TXACD2_1_0 = 277,
+ TXACD2_1_1 = 278,
+ TXACD2_1_2 = 279,
+ TXACD2_1_3 = 280,
+ TXACD2_1_4 = 281,
+ TXACD2_1_5 = 282,
+ TXACD2_1_OUT = 283,
+ TXACD2_2_0 = 284,
+ TXACD2_2_1 = 285,
+ TXACD2_2_2 = 286,
+ TXACD2_2_3 = 287,
+ TXACD2_2_4 = 288,
+ TXACD2_2_5 = 289,
+ TXACD2_2_OUT = 290,
+ TXACD2_3_0 = 291,
+ TXACD2_3_1 = 292,
+ TXACD2_3_2 = 293,
+ TXACD2_3_3 = 294,
+ TXACD2_3_4 = 295,
+ TXACD2_3_5 = 296,
+ TXACD2_3_OUT = 297,
+ RXACI2_1_1 = 298,
+ RXACI2_1_2 = 299,
+ RXACI2_1_3 = 300,
+ RXACI2_1_4 = 301,
+ RXACI2_1_OUT = 302,
+ RXACI2_2_1 = 303,
+ RXACI2_2_2 = 304,
+ RXACI2_2_3 = 305,
+ RXACI2_2_4 = 306,
+ RXACI2_2_OUT = 307,
+ RXACI2_3_1 = 308,
+ RXACI2_3_2 = 309,
+ RXACI2_3_3 = 310,
+ RXACI2_3_4 = 311,
+ RXACI2_3_OUT = 312,
+ TXACCOMP1 = 313,
+ TXACCOMP_OUT = 314,
+ RXACCOMP1 = 315,
+ RXACCOMP_OUT = 316,
+ RXACHPF_D1_2 = 317,
+ RXACHPF_D2_1 = 318,
+ RXACHPF_D2_2 = 319,
+ RXACHPF_OUT = 320,
+ RXACHPF_OUT_1 = 321,
+ RXACHPF_OUT_2 = 322,
+ RXACEQ_OUT = 323,
+ METER_I_1 = 324,
+ METER_I_OUT = 325,
+ METER_LPF_1 = 326,
+ METER_LPF_2 = 327,
+ METER_LPF_OUT_1 = 328,
+ METER_BP_1 = 329,
+ METER_BP_2 = 330,
+ METER_BP_OUT = 331,
+ METER_SRC_OUT = 332,
+ UNUSED333 = 333,
+ UNUSED334 = 334,
+ RING_LPF_1 = 335,
+ RING_LPF_2 = 336,
+ RING_LPF_OUT = 337,
+ RING_INTERP_DIFF = 338,
+ RING_INTERP_DIFF_OUT = 339,
+ RING_INTERP_INT = 340,
+ RING_INTERP_INT_OUT = 341,
+ V_ILIM_TRACK = 342,
+ V_RFEED_TRACK = 343,
+ LF_SPEEDUP_CNT = 344,
+ DC_SPEEDUP_CNT = 345,
+ AC_SPEEDUP_CNT = 346,
+ LCR_SPEEDUP_CNT = 347,
+ CM_SPEEDUP_CNT = 348,
+ DC_SPEEDUP_MASK = 349,
+ ZSYNTH_IN = 350,
+ I_TAR_SAVE = 351,
+ UNUSED352 = 352,
+ UNUSED353 = 353,
+ COUNTER_VTR = 354,
+ I_RING_AVG = 355,
+ COUNTER_IRING = 356,
+ COMP_RATIO = 357,
+ MADC_VBAT_DIV2 = 358,
+ VDIFF_PK_T = 359,
+ PEAK_CNT = 360,
+ CM_DBI_CNT = 361,
+ VCM_LAST = 362,
+ VBATL_SENSE = 363,
+ VBATH_SENSE = 364,
+ VBATR_SENSE = 365,
+ BAT_SETTLE_CNT = 366,
+ VBAT_TGT = 367,
+ VBAT_REQ = 368,
+ VCM_HIRES = 369,
+ VCM_LORES = 370,
+ ILOOP1 = 371,
+ ILONG2 = 372,
+ ITIP1 = 373,
+ IRING1 = 374,
+ CAL_TEMP1 = 375,
+ CAL_TEMP2 = 376,
+ CAL_TEMP3 = 377,
+ CAL_TEMP4 = 378,
+ CAL_TEMP5 = 379,
+ CAL_TEMP6 = 380,
+ CAL_TEMP7 = 381,
+ CMRR_DIVISOR = 382,
+ CMRR_REMAINDER = 383,
+ CMRR_Q_PTR = 384,
+ I_SOURCE1 = 385,
+ I_SOURCE2 = 386,
+ VTR1 = 387,
+ VTR2 = 388,
+ STOP_TIMER1 = 389,
+ STOP_TIMER2 = 390,
+ UNUSED391 = 391,
+ UNUSED392 = 392,
+ CAL_ONHK_Z = 393,
+ CAL_LB_SETTLE = 394,
+ CAL_DECLPF_V0 = 395,
+ CAL_DECLPF_V1 = 396,
+ CAL_DECLPF_V2 = 397,
+ CAL_GOERTZEL_V0 = 398,
+ CAL_GOERTZEL_V1 = 399,
+ CAL_DECLPF_Y = 400,
+ CAL_GOERTZEL_Y = 401,
+ P_HVIC = 402,
+ VBATL_MIRROR = 403,
+ VBATH_MIRROR = 404,
+ VBATR_MIRROR = 405,
+ DIAG_EX1_OUT = 406,
+ DIAG_EX2_OUT = 407,
+ DIAG_DMM_V_OUT = 408,
+ DIAG_DMM_I_OUT = 409,
+ DIAG_P = 410,
+ DIAG_LPF_V = 411,
+ DIAG_LPF_I = 412,
+ DIAG_TONE_FLAG = 413,
+ ILOOP1_LAST = 414,
+ RING_ENTRY_VOC = 415,
+ UNUSED416 = 416,
+ OSC1_X_SAVE = 417,
+ EZSYNTH_1 = 418,
+ EZSYNTH_2 = 419,
+ ZSYNTH_OUT = 420,
+ UNUSED421 = 421,
+ CAL_SUBSTATE = 422,
+ DIAG_EX1_DC_OUT = 423,
+ DIAG_EX1_DC = 424,
+ EZSYNTH_B1 = 425,
+ EZSYNTH_B2 = 426,
+ EZSYNTH_A1 = 427,
+ EZSYNTH_A2 = 428,
+ ILOOP1_FILT = 429,
+ AC_PU_DELTA1_CNT = 430,
+ AC_PU_DELTA2_CNT = 431,
+ SMART_RING_PHASE = 432,
+ SMART_RING_PERIOD = 433,
+ SMART_RING_COUNTER = 434,
+ AC_DAC_GAIN_SAVE = 435,
+ RING_FLUSH_CNT = 436,
+ RESERVED437 = 437,
+ DIAG_VAR_OUT = 438,
+ I_VBAT = 439,
+ P_OFFLOAD = 440,
+ CALTMP_LOOPCNT = 441,
+ CALTMP_LOOPINC = 442,
+ UNUSED443 = 443,
+ CALTMP_CODEINC = 444,
+ CALTMP_TAUINC = 445,
+ CALTMP_TAU = 446,
+ CAL_TEMP8 = 447,
+ PATCH_ID = 448,
+ UNUSED449 = 449,
+ RESERVED450 = 450,
+ UNUSED451 = 451,
+ CAL_LB_OFFSET_FWD = 452,
+ CAL_LB_OFFSET_RVS = 453,
+ COUNT_SPEEDUP = 454,
+ SWEEP_COUNT = 455,
+ AMP_RAMP = 456,
+ DIAG_LPF_MADC_D = 457,
+ DIAG_HPF_MADC = 458,
+ UNUSED459 = 459,
+ TXDEC_OUT = 460,
+ TXDEC_D1 = 461,
+ TXDEC_D2 = 462,
+ RXDEC_D1 = 463,
+ RXDEC_D2 = 464,
+ OSCINT1_D2_1 = 465,
+ OSCINT1_D1_1 = 466,
+ OSCINT1_OUT_1 = 467,
+ OSCINT1_D2_2 = 468,
+ OSCINT1_D1_2 = 469,
+ OSCINT1_OUT = 470,
+ OSCINT2_D2_1 = 471,
+ OSCINT2_D1_1 = 472,
+ OSCINT2_OUT_1 = 473,
+ OSCINT2_D2_2 = 474,
+ OSCINT2_D1_2 = 475,
+ OSCINT2_OUT = 476,
+ OSC1_Y_SAVE = 477,
+ OSC2_Y_SAVE = 478,
+ PWRSAVE_CNT = 479,
+ VBATR_PK = 480,
+ SPEEDUP_MASK_CNT = 481,
+ VCM_RING_FIXED = 482,
+ DELTA_VCM = 483,
+ MADC_VTIPC_DIAG_OS = 484,
+ MADC_VRINGC_DIAG_OS = 485,
+ MADC_VLONG_DIAG_OS = 486,
+ INIT_GUESS = 487,
+ Y1 = 488,
+ Y2 = 489,
+ Y3 = 490,
+ UNUSED491 = 491,
+ PWRSAVE_DBI_CNT = 492,
+ COMP_RATIO_SAVE = 493,
+ CAL_TEMP9 = 494,
+ CAL_TEMP10 = 495,
+ DAC_OFFSET_TEMP = 496,
+ CAL_DAC_CODE = 497,
+ DCDAC_OFFSET = 498,
+ VDIFF_COARSE = 499,
+ RXACIIR_OUT_4 = 500,
+ CAL_TEMP11 = 501,
+ METER_RAMP = 502,
+ METER_RAMP_DIR = 503,
+ METER_ON_T = 504,
+ METER_PK_DET = 505,
+ METER_PK_DET_T = 506,
+ THERM_CNT = 507,
+ VDIFF_SENSE_DELAY = 508,
+ UNUSED509 = 509,
+ CPUMP_DEB_CNT = 510,
+ UNUSED511 = 511,
+ MINUS_ONE = 512,
+ ILOOPLPF = 513,
+ ILONGLPF = 514,
+ BATLPF = 515,
+ VDIFFLPF = 516,
+ VCMLPF = 517,
+ TXACIIR_B0_1 = 518,
+ TXACIIR_B1_1 = 519,
+ TXACIIR_A1_1 = 520,
+ TXACIIR_B0_2 = 521,
+ TXACIIR_B1_2 = 522,
+ TXACIIR_B2_2 = 523,
+ TXACIIR_A1_2 = 524,
+ TXACIIR_A2_2 = 525,
+ TXACIIR_B0_3 = 526,
+ TXACIIR_B1_3 = 527,
+ TXACIIR_B2_3 = 528,
+ TXACIIR_A1_3 = 529,
+ TXACIIR_A2_3 = 530,
+ TXACHPF_B0_1 = 531,
+ TXACHPF_B1_1 = 532,
+ TXACHPF_A1_1 = 533,
+ TXACHPF_B0_2 = 534,
+ TXACHPF_B1_2 = 535,
+ TXACHPF_B2_2 = 536,
+ TXACHPF_A1_2 = 537,
+ TXACHPF_A2_2 = 538,
+ TXACHPF_GAIN = 539,
+ TXACEQ_C0 = 540,
+ TXACEQ_C1 = 541,
+ TXACEQ_C2 = 542,
+ TXACEQ_C3 = 543,
+ TXACGAIN = 544,
+ RXACGAIN = 545,
+ RXACEQ_C0 = 546,
+ RXACEQ_C1 = 547,
+ RXACEQ_C2 = 548,
+ RXACEQ_C3 = 549,
+ RXACIIR_B0_1 = 550,
+ RXACIIR_B1_1 = 551,
+ RXACIIR_A1_1 = 552,
+ RXACIIR_B0_2 = 553,
+ RXACIIR_B1_2 = 554,
+ RXACIIR_B2_2 = 555,
+ RXACIIR_A1_2 = 556,
+ RXACIIR_A2_2 = 557,
+ RXACIIR_B0_3 = 558,
+ RXACIIR_B1_3 = 559,
+ RXACIIR_B2_3 = 560,
+ RXACIIR_A1_3 = 561,
+ RXACIIR_A2_3 = 562,
+ ECFIR_C2 = 563,
+ ECFIR_C3 = 564,
+ ECFIR_C4 = 565,
+ ECFIR_C5 = 566,
+ ECFIR_C6 = 567,
+ ECFIR_C7 = 568,
+ ECFIR_C8 = 569,
+ ECFIR_C9 = 570,
+ ECIIR_B0 = 571,
+ ECIIR_B1 = 572,
+ ECIIR_A1 = 573,
+ ECIIR_A2 = 574,
+ DTMFDTF_B0_1 = 575,
+ DTMFDTF_B1_1 = 576,
+ DTMFDTF_B2_1 = 577,
+ DTMFDTF_A1_1 = 578,
+ DTMFDTF_A2_1 = 579,
+ DTMFDTF_B0_2 = 580,
+ DTMFDTF_B1_2 = 581,
+ DTMFDTF_B2_2 = 582,
+ DTMFDTF_A1_2 = 583,
+ DTMFDTF_A2_2 = 584,
+ DTMFDTF_B0_3 = 585,
+ DTMFDTF_B1_3 = 586,
+ DTMFDTF_B2_3 = 587,
+ DTMFDTF_A1_3 = 588,
+ DTMFDTF_A2_3 = 589,
+ DTMFDTF_GAIN = 590,
+ DTMFLPF_B0_1 = 591,
+ DTMFLPF_B1_1 = 592,
+ DTMFLPF_B2_1 = 593,
+ DTMFLPF_A1_1 = 594,
+ DTMFLPF_A2_1 = 595,
+ DTMFLPF_B0_2 = 596,
+ DTMFLPF_B1_2 = 597,
+ DTMFLPF_B2_2 = 598,
+ DTMFLPF_A1_2 = 599,
+ DTMFLPF_A2_2 = 600,
+ DTMFLPF_GAIN = 601,
+ DTMFHPF_B0_1 = 602,
+ DTMFHPF_B1_1 = 603,
+ DTMFHPF_B2_1 = 604,
+ DTMFHPF_A1_1 = 605,
+ DTMFHPF_A2_1 = 606,
+ DTMFHPF_B0_2 = 607,
+ DTMFHPF_B1_2 = 608,
+ DTMFHPF_B2_2 = 609,
+ DTMFHPF_A1_2 = 610,
+ DTMFHPF_A2_2 = 611,
+ DTMFHPF_GAIN = 612,
+ POWER_GAIN = 613,
+ GOERTZEL_GAIN = 614,
+ MODEM_GAIN = 615,
+ HOTBIT1 = 616,
+ HOTBIT0 = 617,
+ ROW0_C1 = 618,
+ ROW1_C1 = 619,
+ ROW2_C1 = 620,
+ ROW3_C1 = 621,
+ COL0_C1 = 622,
+ COL1_C1 = 623,
+ COL2_C1 = 624,
+ COL3_C1 = 625,
+ ROW0_C2 = 626,
+ ROW1_C2 = 627,
+ ROW2_C2 = 628,
+ ROW3_C2 = 629,
+ COL0_C2 = 630,
+ COL1_C2 = 631,
+ COL2_C2 = 632,
+ COL3_C2 = 633,
+ SLOPE_VLIM = 634,
+ SLOPE_RFEED = 635,
+ SLOPE_ILIM = 636,
+ SLOPE_RING = 637,
+ SLOPE_DELTA1 = 638,
+ SLOPE_DELTA2 = 639,
+ V_VLIM = 640,
+ V_RFEED = 641,
+ V_ILIM = 642,
+ CONST_RFEED = 643,
+ CONST_ILIM = 644,
+ I_VLIM = 645,
+ DC_DAC_GAIN = 646,
+ VDIFF_TH = 647,
+ TXDEC_B0 = 648,
+ TXDEC_B1 = 649,
+ TXDEC_B2 = 650,
+ TXDEC_A1 = 651,
+ TXDEC_A2 = 652,
+ ZSYNTH_B0 = 653,
+ ZSYNTH_B1 = 654,
+ ZSYNTH_B2 = 655,
+ ZSYNTH_A1 = 656,
+ ZSYNTH_A2 = 657,
+ RXACHPF_B0_1 = 658,
+ RXACHPF_B1_1 = 659,
+ RXACHPF_A1_1 = 660,
+ RXACHPF_B0_2 = 661,
+ RXACHPF_B1_2 = 662,
+ RXACHPF_B2_2 = 663,
+ RXACHPF_A1_2 = 664,
+ RXACHPF_A2_2 = 665,
+ RXACHPF_GAIN = 666,
+ MASK7LSB = 667,
+ RXDEC_B0 = 668,
+ RXDEC_B1 = 669,
+ RXDEC_B2 = 670,
+ RXDEC_A1 = 671,
+ RXDEC_A2 = 672,
+ OSCINT1_B0_1 = 673,
+ OSCINT1_B1_1 = 674,
+ OSCINT1_B2_1 = 675,
+ OSCINT1_A1_1 = 676,
+ OSCINT1_A2_1 = 677,
+ OSCINT1_B0_2 = 678,
+ OSCINT1_B1_2 = 679,
+ OSCINT1_B2_2 = 680,
+ OSCINT1_A1_2 = 681,
+ OSCINT1_A2_2 = 682,
+ OSCINT2_B0_1 = 683,
+ OSCINT2_B1_1 = 684,
+ OSCINT2_B2_1 = 685,
+ OSCINT2_A1_1 = 686,
+ OSCINT2_A2_1 = 687,
+ OSCINT2_B0_2 = 688,
+ OSCINT2_B1_2 = 689,
+ OSCINT2_B2_2 = 690,
+ OSCINT2_A1_2 = 691,
+ OSCINT2_A2_2 = 692,
+ UNUSED693 = 693,
+ UNUSED694 = 694,
+ UNUSED695 = 695,
+ RING_LPF_B0 = 696,
+ RING_LPF_B1 = 697,
+ RING_LPF_B2 = 698,
+ RING_LPF_A1 = 699,
+ RING_LPF_A2 = 700,
+ LCRDBI = 701,
+ LONGDBI = 702,
+ VBAT_TIMER = 703,
+ LF_SPEEDUP_TIMER = 704,
+ DC_SPEEDUP_TIMER = 705,
+ AC_SPEEDUP_TIMER = 706,
+ LCR_SPEEDUP_TIMER = 707,
+ CM_SPEEDUP_TIMER = 708,
+ VCM_TH = 709,
+ AC_SPEEDUP_TH = 710,
+ SPR_SIG_0 = 711,
+ SPR_SIG_1 = 712,
+ SPR_SIG_2 = 713,
+ SPR_SIG_3 = 714,
+ SPR_SIG_4 = 715,
+ SPR_SIG_5 = 716,
+ SPR_SIG_6 = 717,
+ SPR_SIG_7 = 718,
+ SPR_SIG_8 = 719,
+ SPR_SIG_9 = 720,
+ SPR_SIG_10 = 721,
+ SPR_SIG_11 = 722,
+ SPR_SIG_12 = 723,
+ SPR_SIG_13 = 724,
+ SPR_SIG_14 = 725,
+ SPR_SIG_15 = 726,
+ SPR_SIG_16 = 727,
+ SPR_SIG_17 = 728,
+ SPR_SIG_18 = 729,
+ COUNTER_VTR_VAL = 730,
+ CONST_028 = 731,
+ CONST_032 = 732,
+ CONST_038 = 733,
+ CONST_046 = 734,
+ COUNTER_IRING_VAL = 735,
+ GAIN_RING = 736,
+ RING_HYST = 737,
+ COMP_Z = 738,
+ CONST_115 = 739,
+ CONST_110 = 740,
+ CONST_105 = 741,
+ CONST_100 = 742,
+ CONST_095 = 743,
+ CONST_090 = 744,
+ CONST_085 = 745,
+ V_RASUM_IDEAL = 746,
+ CONST_ONE = 747,
+ VCM_OH = 748,
+ VCM_RING = 749,
+ VCM_HYST = 750,
+ VOV_GND = 751,
+ VOV_BAT = 752,
+ VOV_RING_BAT = 753,
+ CM_DBI = 754,
+ RTPER = 755,
+ P_TH_HVIC = 756,
+ UNUSED757 = 757,
+ UNUSED758 = 758,
+ COEF_P_HVIC = 759,
+ COEF_Q1256 = 760,
+ UNUSED761 = 761,
+ UNUSED762 = 762,
+ UNUSED763 = 763,
+ BAT_HYST = 764,
+ BAT_DBI = 765,
+ VBATL_EXPECT = 766,
+ VBATH_EXPECT = 767,
+ VBATR_EXPECT = 768,
+ BAT_SETTLE = 769,
+ VBAT_IRQ_TH = 770,
+ MADC_VTIPC_OS = 771,
+ MADC_VRINGC_OS = 772,
+ MADC_VBAT_OS = 773,
+ MADC_VLONG_OS = 774,
+ UNUSED775 = 775,
+ MADC_VDC_OS = 776,
+ MADC_ILONG_OS = 777,
+ UNUSED778 = 778,
+ UNUSED779 = 779,
+ MADC_ILOOP_OS = 780,
+ MADC_SCALE_ILOOP = 781,
+ UNUSED782 = 782,
+ UNUSED783 = 783,
+ DC_ADC_OS = 784,
+ CAL_UNITY = 785,
+ UNUSED786 = 786,
+ UNUSED787 = 787,
+ ACADC_OFFSET = 788,
+ ACDAC_OFFSET = 789,
+ CAL_DCDAC_CODE = 790,
+ CAL_DCDAC_15MA = 791,
+ UNUSED792 = 792,
+ UNUSED793 = 793,
+ UNUSED794 = 794,
+ UNUSED795 = 795,
+ UNUSED796 = 796,
+ UNUSED797 = 797,
+ UNUSED798 = 798,
+ UNUSED799 = 799,
+ UNUSED800 = 800,
+ CAL_LB_TSQUELCH = 801,
+ CAL_LB_TCHARGE = 802,
+ CAL_LB_TSETTLE0 = 803,
+ CAL_GOERTZEL_DLY = 804,
+ CAL_GOERTZEL_ALPHA = 805,
+ CAL_DECLPF_K = 806,
+ CAL_DECLPF_B1 = 807,
+ CAL_DECLPF_B2 = 808,
+ CAL_DECLPF_A1 = 809,
+ CAL_DECLPF_A2 = 810,
+ CAL_ACADC_THRL = 811,
+ CAL_ACADC_THRH = 812,
+ CAL_ACADC_TSETTLE = 813,
+ DTROW0TH = 814,
+ DTROW1TH = 815,
+ DTROW2TH = 816,
+ DTROW3TH = 817,
+ DTCOL0TH = 818,
+ DTCOL1TH = 819,
+ DTCOL2TH = 820,
+ DTCOL3TH = 821,
+ DTFTWTH = 822,
+ DTRTWTH = 823,
+ DTROWRTH = 824,
+ DTCOLRTH = 825,
+ DTROW2HTH = 826,
+ DTCOL2HTH = 827,
+ DTMINPTH = 828,
+ DTHOTTH = 829,
+ RXPWR = 830,
+ TXPWR = 831,
+ RXMODPWR = 832,
+ TXMODPWR = 833,
+ FSKFREQ0 = 834,
+ FSKFREQ1 = 835,
+ FSKAMP0 = 836,
+ FSKAMP1 = 837,
+ FSK01 = 838,
+ FSK10 = 839,
+ VOCDELTA = 840,
+ VOCLTH = 841,
+ VOCHTH = 842,
+ RINGOF = 843,
+ RINGFR = 844,
+ RINGAMP = 845,
+ RINGPHAS = 846,
+ RTDCTH = 847,
+ RTACTH = 848,
+ RTDCDB = 849,
+ RTACDB = 850,
+ RTCOUNT = 851,
+ LCROFFHK = 852,
+ LCRONHK = 853,
+ LCRMASK = 854,
+ LCRMASK_POLREV = 855,
+ LCRMASK_STATE = 856,
+ LCRMASK_LINECAP = 857,
+ LONGHITH = 858,
+ LONGLOTH = 859,
+ IRING_LIM = 860,
+ AC_PU_DELTA1 = 861,
+ AC_PU_DELTA2 = 862,
+ DIAG_LPF_8K = 863,
+ DIAG_LPF_128K = 864,
+ DIAG_INV_N = 865,
+ DIAG_GAIN = 866,
+ DIAG_G_CAL = 867,
+ DIAG_OS_CAL = 868,
+ SPR_GAIN_TRIM = 869,
+ UNUSED870 = 870,
+ AC_DAC_GAIN = 871,
+ UNUSED872 = 872,
+ UNUSED873 = 873,
+ AC_DAC_GAIN0 = 874,
+ EZSYNTH_B0 = 875,
+ OFFLD_DAC_SCALE = 876,
+ UNUSED877 = 877,
+ OFFLD_DAC_OS = 878,
+ UNUSED879 = 879,
+ AC_ADC_GAIN = 880,
+ ILOOP1LPF = 881,
+ RING_FLUSH_TIMER = 882,
+ ALAW_BIAS = 883,
+ MADC_VTRC_SCALE = 884,
+ MADC_VBAT_SCALE = 885,
+ UNUSED886 = 886,
+ MADC_VLONG_SCALE = 887,
+ MADC_VLONG_SCALE_RING = 888,
+ UNUSED889 = 889,
+ MADC_VDC_SCALE = 890,
+ MADC_ILONG_SCALE = 891,
+ UNUSED892 = 892,
+ UNUSED893 = 893,
+ VDIFF_SENSE_SCALE = 894,
+ VDIFF_SENSE_SCALE_RING = 895,
+ VOV_RING_GND = 896,
+ P_TH_OFFLOAD = 897,
+ CAL_LB_OSC1_FREQ = 898,
+ CAL_DCDAC_9TAU = 899,
+ CAL_MADC_9TAU = 900,
+ ADAP_RING_MIN_I = 901,
+ SWEEP_STEP = 902,
+ SWEEP_STEP_SAVE = 903,
+ SWEEP_REF = 904,
+ AMP_STEP = 905,
+ RXACGAIN_SAVE = 906,
+ AMP_RAMP_INIT = 907,
+ DIAG_HPF_GAIN = 908,
+ DIAG_HPF_8K = 909,
+ DIAG_ADJ_STEP = 910,
+ UNUSED911 = 911,
+ UNUSED912 = 912,
+ MADC_SCALE_INV = 913,
+ UNUSED914 = 914,
+ PWRSAVE_TIMER = 915,
+ OFFHOOK_THRESH = 916,
+ SPEEDUP_MASK_TIMER = 917,
+ XTALK_TIMER = 918,
+ VBAT_TRACK_MIN = 919,
+ VBAT_TRACK_MIN_RNG = 920,
+ UNUSED921 = 921,
+ UNUSED922 = 922,
+ UNUSED923 = 923,
+ UNUSED924 = 924,
+ UNUSED925 = 925,
+ UNUSED926 = 926,
+ DC_HOLD_DAC_OS = 927,
+ DAA_DTMF_IN_SCALE = 928,
+ NOTCH_B0 = 929,
+ NOTCH_B1 = 930,
+ NOTCH_B2 = 931,
+ NOTCH_A1 = 932,
+ NOTCH_A2 = 933,
+ METER_LPF_B0 = 934,
+ METER_LPF_B1 = 935,
+ METER_LPF_B2 = 936,
+ METER_LPF_A1 = 937,
+ METER_LPF_A2 = 938,
+ METER_SIG_0 = 939,
+ METER_SIG_1 = 940,
+ METER_SIG_2 = 941,
+ METER_SIG_3 = 942,
+ METER_SIG_4 = 943,
+ METER_SIG_5 = 944,
+ METER_SIG_6 = 945,
+ METER_SIG_7 = 946,
+ METER_SIG_8 = 947,
+ METER_SIG_9 = 948,
+ METER_SIG_10 = 949,
+ METER_SIG_11 = 950,
+ METER_SIG_12 = 951,
+ METER_SIG_13 = 952,
+ METER_SIG_14 = 953,
+ METER_SIG_15 = 954,
+ METER_BP_B0 = 955,
+ METER_BP_B1 = 956,
+ METER_BP_B2 = 957,
+ METER_BP_A1 = 958,
+ METER_BP_A2 = 959,
+ PM_AMP_THRESH = 960,
+ PM_GAIN = 961,
+ PWRSAVE_DBI = 962,
+ DCDC_ANA_SCALE = 963,
+ VOV_BAT_PWRSAVE_LO = 964,
+ VOV_BAT_PWRSAVE_HI = 965,
+ AC_ADC_GAIN0 = 966,
+ SCALE_KAUDIO = 967,
+ METER_GAIN_TEMP = 968,
+ METER_RAMP_STEP = 969,
+ THERM_DBI = 970,
+ LPR_SCALE = 971,
+ LPR_CM_OS = 972,
+ VOV_DCDC_SLOPE = 973,
+ VOV_DCDC_OS = 974,
+ VOV_RING_BAT_MAX = 975,
+ SLOPE_VLIM1 = 976,
+ SLOPE_RFEED1 = 977,
+ SLOPE_ILIM1 = 978,
+ V_VLIM1 = 979,
+ V_RFEED1 = 980,
+ V_ILIM1 = 981,
+ CONST_RFEED1 = 982,
+ CONST_ILIM1 = 983,
+ I_VLIM1 = 984,
+ SLOPE_VLIM2 = 985,
+ SLOPE_RFEED2 = 986,
+ SLOPE_ILIM2 = 987,
+ V_VLIM2 = 988,
+ V_RFEED2 = 989,
+ V_ILIM2 = 990,
+ CONST_RFEED2 = 991,
+ CONST_ILIM2 = 992,
+ I_VLIM2 = 993,
+ DIAG_V_TAR = 994,
+ DIAG_V_TAR2 = 995,
+ STOP_TIMER1_VAL = 996,
+ STOP_TIMER2_VAL = 997,
+ DIAG_VCM1_TAR = 998,
+ DIAG_VCM_STEP = 999,
+ LKG_DNT_HIRES = 1000,
+ LKG_DNR_HIRES = 1001,
+ LINEAR_OS = 1002,
+ CPUMP_DEB = 1003,
+ DCDC_VERR = 1004,
+ DCDC_VERR_HYST = 1005,
+ DCDC_OITHRESH_LO = 1006,
+ DCDC_OITHRESH_HI = 1007,
+ HV_BIAS_ONHK = 1008,
+ HV_BIAS_OFFHK = 1009,
+ UVTHRESH_BIAS = 1010,
+ UVTHRESH_SCALE = 1011,
+ UVTHRESH_MAX = 1012,
+ VBATH_DELTA = 1013,
+ UNUSED1014 = 1014,
+ VOV_RING_BAT_DCDC = 1015,
+ P_OFFLOAD_VBAT_HYST = 1016,
+ LKG_LB_OFFSET = 1017,
+ LKG_OFHK_OFFSET = 1018
+};
+
+/*
+** This defines the mnemonics for applicable SI3228X Memory-mapped register locations
+*/
+enum
+{
+ PD_BIAS = 1413,
+ PD_VBAT_SNS = 1418,
+ PD_HVIC = 1430,
+ MADC_LOOP_MAN = 1445,
+ HVIC_CNTL_MAN = 1451,
+ CAL_TRNRD_DACT = 1458,
+ CAL_TRNRD_DACR,
+ CMDAC_FWD = 1476,
+ CMDAC_REV,
+ RDC_SUM = 1499,
+ PD_OFFLD_DAC = 1512,
+ PD_OFFLD_GM = 1513,
+ PD_DCDC = 1538,
+ PD_UVLO = 1540,
+ PD_OVLO,
+ PD_OCLO,
+ DCDC_UVHYST = 1545,
+ DCDC_UVTHRESH,
+ DCDC_OVTHRESH = 1547,
+ DCDC_OITHRESH,
+ UNUSED1549,
+ DCDC_CCM_THRESH,
+ DCDC_STATUS,
+ DCDC_FSW,
+ DCDC_SWDRV_POL,
+ DCDC_UVPOL,
+ DCDC_CPUMP,
+ UNUSED1556,
+ UNUSED1557,
+ DCDC_VREF_CTRL,
+ UNUSED1559,
+ DCDC_RNGTYPE,
+ DCDC_DCFF_ENABLE = 1635,
+ DCDC_OIMASK = 1565,
+ PD_REF_OSC = 1571,
+ PWRSAVE_CTRL_LO = 1575,
+ DCDC_ANA_GAIN = 1585,
+ DCDC_ANA_TOFF,
+ DCDC_ANA_TONMIN,
+ DCDC_ANA_TONMAX,
+ DCDC_ANA_DSHIFT,
+ DCDC_ANA_LPOLY,
+ DCDC_PD_ANA = 1592,
+ PATCH_JMP8 = 1597,
+ PM_ACTIVE = 1606,
+ PM_INACTIVE = 1607,
+ DCDC_CPUMP_LP_MASK = 1616,
+ DCDC_UV_MAN = 1640,
+ DCDC_UV_DEBOUNCE = 1641,
+ DCDC_OV_MAN = 1642,
+ DCDC_OV_DEBOUNCE = 1643,
+ OFFLD_DAC_MAN = 1646
+};
+
+
+/* Temporarily map obsolete ram locations for debug purposes */
+#define DCDC_FSW_NORM UNUSED921
+#define DCDC_FSW_NORM_LO UNUSED922
+#define DCDC_DIN_LIM UNUSED925
+#define DCDC_FSW_RING UNUSED923
+#define DCDC_FSW_RING_LO UNUSED924
+#define DCDC_VOUT_LIM UNUSED926
+#define DCDC_FSW_VHYST Y3
+#define DCDC_FSW_VTHLO Y2
+#define DAA_CNTL 74
+#define DCDC_VREF_MIN VBAT_TRACK_MIN
+#define DCDC_VREF_MIN_RNG VBAT_TRACK_MIN_RNG
+
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si32xxx_multibom_constants.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si32xxx_multibom_constants.h
new file mode 100644
index 0000000..3218de1
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si32xxx_multibom_constants.h
@@ -0,0 +1,112 @@
+/*
+** Copyright (c) 2015 Silicon Laboratories, Inc.
+**
+** Example use of multiple devices and/or device bom options in which
+** presets are generically selected, while the general configuration is
+** explicitly selected.
+**
+** This is an autogenerated file. Do not modify.
+**
+*/
+
+
+#ifndef SI32XXX_CONSTANTS_H
+#define SI32XXX_CONSTANTS_H
+
+/** Ringing Presets */
+enum {
+ RING_MAX_VBAT_PROVISIONING,
+ RING_F20_45VRMS_0VDC_LPR,
+ RING_F20_45VRMS_0VDC_BAL,
+ RINGING_LAST_ENUM
+};
+
+/** DC_Feed Presets */
+enum {
+ DCFEED_48V_20MA,
+ DCFEED_48V_25MA,
+ DCFEED_PSTN_DET_1,
+ DCFEED_PSTN_DET_2,
+ DC_FEED_LAST_ENUM
+};
+
+/** Impedance Presets */
+enum {
+ ZSYN_600_0_0_30_0,
+ ZSYN_270_750_150_30_0,
+ ZSYN_370_620_310_30_0,
+ ZSYN_220_820_120_30_0,
+ ZSYN_600_0_1000_30_0,
+ ZSYN_200_680_100_30_0,
+ ZSYN_220_820_115_30_0,
+ WB_ZSYN_600_0_0_20_0,
+ IMPEDANCE_LAST_ENUM
+};
+
+/** FSK Presets */
+enum {
+ DEFAULT_FSK,
+ FSK_LAST_ENUM
+};
+
+/** Pulse_Metering Presets */
+enum {
+ DEFAULT_PULSE_METERING,
+ PULSE_METERING_LAST_ENUM
+};
+
+/** Tone Presets */
+enum {
+ TONEGEN_FCC_DIAL,
+ TONEGEN_FCC_BUSY,
+ TONEGEN_FCC_RINGBACK,
+ TONEGEN_FCC_REORDER,
+ TONEGEN_FCC_CONGESTION,
+ TONE_LAST_ENUM
+};
+
+/** PCM Presets */
+enum {
+ PCM_8ULAW,
+ PCM_8ALAW,
+ PCM_16LIN,
+ PCM_16LIN_WB,
+ PCM_LAST_ENUM
+};
+/** General Parameters */
+enum{
+ SI3217X_GEN_PARAM_FLYBACK_GDRV,
+ SI3217X_GEN_PARAM_FLYBACK_NO_GDRV,
+ SI3217X_GEN_PARAM_BUCK_BOOST_NO_GDRV,
+ SI3217X_GEN_PARAM_LCQC3W,
+ SI3217X_GEN_PARAM_LCQC6W,
+ SI3217X_GEN_PARAM_LAST
+};
+
+enum{
+ SI3226X_GEN_PARAM_FLYBACK,
+ SI3226X_GEN_PARAM_TSS,
+ SI3226X_GEN_PARAM_TSS_ISO,
+ SI3226X_GEN_PARAM_LCQC7P6W,
+ SI3226X_GEN_PARAM_LCQC3W,
+ SI3226X_GEN_PARAM_CUK,
+ SI3226X_GEN_PARAM_QSS,
+ SI3226X_GEN_PARAM_BUCK_BOOST,
+ SI3226X_GEN_PARAM_LCQC6W,
+ SI3226X_GEN_PARAM_LAST
+};
+
+enum{
+ SI3218X_LCQC5W,
+ SI3218X_LCCB,
+ SI3218X_GEN_PARAM_LAST
+};
+
+enum{
+ SI3228X_LCQC5W,
+ SI3228X_LCCB,
+ SI3228X_GEN_PARAM_LAST
+};
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice.h
new file mode 100644
index 0000000..a3783c6
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice.h
@@ -0,0 +1,879 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si_voice.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the main header file for the ProSLIC API software.
+**
+**
+*/
+
+#ifndef SI_VOICE_H
+#define SI_VOICE_H
+
+#include <linux/spi/spi.h>
+
+#include "proslic_api_config.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+
+/* The following macros are in place so that if the customer did not define them, the "safe" default is not disable the functionality.*/
+#ifndef ENABLE_DEBUG
+#define DEBUG_PRINT(...)
+#define DEBUG_ENABLED(X) 0
+#endif
+
+#ifndef ENABLE_TRACES
+#define TRACE_ENABLED(X) 0
+#define TRACEPRINT(...)
+#define TRACEPRINT_NOCHAN(...)
+#endif
+
+#ifndef LOGPRINT
+#define LOGPRINT(...)
+#endif
+
+/** @defgroup SIVOICE SiVoice definitions
+
+ * @{
+ */
+/*****************************************************************************/
+/** @defgroup CHIPFAM Chip family definitions
+ * @{
+ */
+#define SI3217X_TYPE 4 /**< Single channel chipset*/
+#define SI3226X_TYPE 5 /**< Dual channel chipset */
+#define SI3218X_TYPE 6 /**< Single channel chipset*/
+#define SI3228X_TYPE 7 /**< Dual channel chipset */
+#define SI3050_TYPE 20 /**< Single channel FXO chipset */
+
+/** @} CHIPFAM */
+/*****************************************************************************/
+
+
+/*
+* Workaroud for building on windows systems
+*/
+
+#ifdef RC_NONE
+#undef RC_NONE
+#endif
+
+#define SIVOICE_RC_NONE RC_NONE
+
+/**
+* This is the main Silicon Labs control interface object. do not access directly!
+*/
+typedef struct
+{
+ void *hCtrl; /**< user provided SPI/GCI structure */
+ ctrl_Reset_fptr Reset_fptr; /**< user provided reset function */
+ ctrl_WriteRegister_fptr
+ WriteRegister_fptr; /**< user provided SPI/GCI write register function */
+ ctrl_ReadRegister_fptr
+ ReadRegister_fptr; /**< user provided SPI/GI read register function */
+ ctrl_WriteRAM_fptr
+ WriteRAM_fptr; /**< ProSLIC only - user provided SPI/GCI read RAM/Indirect register function */
+ ctrl_ReadRAM_fptr ReadRAM_fptr; /**< ProSLIC only */
+ ctrl_Semaphore_fptr Semaphore_fptr; /**< ProSLIC only */
+ void *hTimer; /**< user provided Timer data structure */
+ system_delay_fptr
+ Delay_fptr; /**< user supplied mSec delay function */
+ system_timeElapsed_fptr
+ timeElapsed_fptr; /**< user provided mSec time elapsed function */
+ system_getTime_fptr
+ getTime_fptr; /**< user provided timestamp function */
+} SiVoiceControlInterfaceType;
+
+
+typedef enum
+{
+ SI32171, /* '170 is the HV version of this part */
+ SI32172, /* '173 is the HV version of this part */
+ SI32174,
+ SI32175,
+ SI32176,
+ SI32177,
+ SI32178,
+ SI32179,
+ SI32260,
+ SI32261,
+ SI32262,
+ SI32263,
+ SI32264,
+ SI32265,
+ SI32266,
+ SI32267,
+ SI32268,
+ SI32269,
+ SI32360,
+ SI32361,
+ SI32180,
+ SI32181,
+ SI32182,
+ SI32183,
+ SI32184,
+ SI32185,
+ SI32186,
+ SI32187,
+ SI32188,
+ SI32189, /* Place holder */
+ SI32280,
+ SI32281,
+ SI32282,
+ SI32283,
+ SI32284,
+ SI32285,
+ SI32286,
+ SI32287,
+ SI32289, /* Place holder */
+ SI3050 = 100,
+ UNSUPPORTED_PART_NUM = 255
+} partNumberType;
+
+/**
+* Chip revision definition for easier readability in the source code
+*/
+typedef enum
+{
+ A,
+ B,
+ C,
+ D,
+ E,
+ F,
+ G
+} revisionType ;
+
+
+typedef enum
+{
+ UNKNOWN, /**< Channel type has not been initialized or is still unknown */
+ PROSLIC, /**< Channel type is a ProSLIC/FXS */
+ DAA /**< Channel type is a DAA/FXO */
+} channelTypeType;
+
+/**
+* These are the error codes for ProSLIC failures
+*/
+typedef enum
+{
+ RC_IGNORE = 0,
+ RC_NONE= 0, /**< Means the function did not encounter an error */
+ RC_TEST_PASSED = 0,
+ RC_TEST_FAILED = 1,
+ RC_COMPLETE_NO_ERR = 1, /**< A test completed, no error detected */
+ RC_POWER_ALARM_Q1,
+ RC_POWER_ALARM_Q2,
+ RC_POWER_ALARM_Q3,
+ RC_POWER_ALARM_Q4,
+ RC_POWER_ALARM_Q5,
+ RC_POWER_ALARM_Q6,
+ RC_SPI_FAIL, /**< SPI Communications failure */
+ RC_POWER_LEAK,
+ RC_VBAT_UP_TIMEOUT,
+ RC_VBAT_OUT_OF_RANGE,
+ RC_VBAT_DOWN_TIMEOUT,
+ RC_TG_RG_SHORT,
+ RC_CM_CAL_ERR,
+ RC_RING_FAIL_INT,
+ RC_CAL_TIMEOUT,
+ RC_PATCH_ERR,
+ RC_BROADCAST_FAIL, /**< Broadcast unavailable for requested operation */
+ RC_UNSUPPORTED_FEATURE, /**< Feature is not supported by the chipset*/
+ RC_CHANNEL_TYPE_ERR, /**< Channel type does not support called function */
+ RC_GAIN_DELTA_TOO_LARGE, /**< Requested gain delta too large */
+ RC_GAIN_OUT_OF_RANGE, /**< Gain requested exceeds range */
+ RC_POWER_ALARM_HVIC, /**< Power alarm on HVIC */
+ RC_POWER_ALARM_OFFLD, /**< Power alarm on offload transistor */
+ RC_THERMAL_ALARM_HVIC, /**< Thermal alarm detected */
+ RC_NO_MEM, /**< Out of memory */
+ RC_INVALID_GEN_PARAM, /**< Invalid general parameter */
+ RC_LINE_IN_USE, /**< Line is in use (LCS detected) */
+ RC_RING_V_LIMITED, /**< Ringer voltage limited - signal may be clipped */
+ RC_PSTN_CHECK_SINGLE_FAIL, /**< PSTN detect single current exceeds limit */
+ RC_PSTN_CHECK_AVG_FAIL, /**< PSTN detect average current exceeds limit */
+ RC_VDAA_ILOOP_OVLD, /**< Overload detected */
+ RC_UNSUPPORTED_OPTION, /**< Function parameter is not supported at this time */
+ RC_FDT_TIMEOUT, /**< Timeout waiting for valid frame detect */
+ RC_PSTN_OPEN_FEMF, /**< Detected FEMF, device left in open state */
+ RC_VDAA_PAR_HANDSET_DET, /**< Parallel handset detected */
+ RC_VDAA_PAR_HANDSET_NOT_DET, /**< Parallel handset not detected */
+ RC_PATCH_RAM_VERIFY_FAIL, /**< Patch RAM verification failure */
+ RC_PATCH_ENTRY_VERIFY_FAIL, /**< Patch entry table verification failure */
+ RC_UNSUPPORTED_DEVICE_REV, /**< Device revision not supported */
+ RC_INVALID_PATCH, /**< No patch for selected options */
+ RC_INVALID_PRESET, /**< Invalid Preset value */
+ RC_TEST_DISABLED, /**< Test Not enabled */
+ RC_RING_START_FAIL, /**< Ringing failed to start */
+ RC_MWI_ENABLE_FAIL, /**< Failed to enable MWI feature */
+ RC_MWI_IN_USE, /**< MWI active and unable to be modified */
+ RC_MWI_NOT_ENABLED, /**< MWI not enabled */
+ RC_DCDC_SETUP_ERR, /**< DCDC not properly initialized prior to powerup */
+ RC_PLL_FREERUN_ACTIVE, /**< PLL In Freerun Mode */
+ RC_UNSUPPORTED_VDC_RANGE, /**< VDC Range Unsupported */
+ RC_NON_FATAL_INIT_ERR, /**< Generic error to indicate a non-fatal error during init */
+ RC_REINIT_REQUIRED = 255 /**< Soft Reset Required */
+} errorCodeType;
+
+/**********************************************************************/
+/**
+ * @defgroup PROLSIC_BRD_DESIGN Board design settings
+ * @{
+ */
+/**
+* BOM Option Tag - refer to hardware design
+*/
+
+typedef enum
+{
+ DEFAULT, /**< DCDC: Unspecified */
+ BO_DCDC_FLYBACK, /**< DCDC: flyback design */
+ BO_DCDC_LCQC_7P6W, /**< DCDC: quasi-cuk design */
+ BO_DCDC_QCUK = BO_DCDC_LCQC_7P6W, /**< @deprecated DCDC: quasi-cuk design (deprecated name, use BO_DCDC_LCQC_7P6W) */
+ BO_DCDC_BUCK_BOOST, /**< DCDC: BJT buck-boost design */
+ BO_DCDC_LCQC_3W, /**< DCDC: low-cost quasi-cuk design */
+ BO_DCDC_LCQCUK = BO_DCDC_LCQC_3W, /**< DCDC: low-cost quasi-cuk design */
+ BO_DCDC_P_BUCK_BOOST_5V, /**< @deprecated DCDC: PMOS buck-boost 5v design */
+ BO_DCDC_P_BUCK_BOOST_12V, /**< @deprecated DCDC: PMOS buck-boost 12v design */
+ BO_DCDC_P_BUCK_BOOST_12V_HV, /**< @deprecated DCDC: PMOS buck-boost 12v design, high voltage */
+ BO_DCDC_CUK, /**< DCDC: full cuk design */
+ BO_DCDC_PMOS_BUCK_BOOST, /**< @deprecated DCDC: PMOS buck-boost design */
+ BO_DCDC_LCQC_6W, /**< DCDC: low cost quasi-cuk design, 6W capability */
+ BO_DCDC_LCQC_5W, /**< DCDC: low cost quasi-cuk design, 5W capability - '180 & '280 parts */
+ BO_DCDC_LCCB /**< DCDC: low cost capacitive boost design - '180 & '280 parts */
+} bomOptionsType;
+
+/**
+* VDC input voltage range option tags - please refer hardware design
+*/
+typedef enum
+{
+ VDC_3P0_6P0,
+ VDC_4P5_16P0,
+ VDC_4P5_27P0,
+ VDC_7P0_20P0,
+ VDC_8P0_16P0,
+ VDC_9P0_16P0,
+ VDC_9P0_24P0,
+ VDC_10P8_20P0,
+ VDC_27P0_42P0,
+ VDC_10P8_13P2
+} vdcRangeType;
+
+/**
+* Battery Rail option tags - please refer hardware design
+*/
+typedef enum
+{
+ BO_DCDC_TSS, /**< Used for Fixed Rail DC-DC supplies */
+ BO_DCDC_TRACKING, /**< Used for Tracking DC-DC supplies */
+ BO_DCDC_EXTERNAL, /**< Used for external fixed rail supplies */
+ BO_DCDC_TSS_ISO, /**< Used for isolated TSS supplies */
+ BO_DCDC_QSS, /**< Used for QSS Designs */
+ BO_DCDC_FIXED_RAIL = BO_DCDC_TSS /**< Fixed rail replaced by TSS */
+#ifndef SIVOICE_CFG_NEWTYPES_ONLY
+ ,FIXED = BO_DCDC_FIXED_RAIL /**< @deprecated use BO_DCDC_FIXED_RAIL */
+ ,TRACKING = BO_DCDC_TRACKING /**< @deprecated use BO_DCDC_TRACKING */
+#endif
+ ,BO_DCDC_UNKNOWN
+} batRailType;
+
+/**
+* FET Gate Driver option tags
+*/
+
+typedef enum
+{
+ BO_GDRV_NOT_INSTALLED = 0,
+ BO_GDRV_INSTALLED = 1
+} gateDriveType;
+
+/**
+* Auto ZCAL Enable option tags
+*/
+
+typedef enum
+{
+ AUTO_ZCAL_DISABLED = 0,
+ AUTO_ZCAL_ENABLED = 1
+} autoZcalType;
+
+/**
+* VDAA Support option tags
+*/
+typedef enum
+{
+ VDAA_DISABLED = 0,
+ VDAA_ENABLED = 1
+} vdaaSupportType;
+
+/**
+* PM BOM Support option tags
+*/
+
+typedef enum
+{
+ BO_STD_BOM,
+ BO_PM_BOM
+} pmBomType;
+
+/**
+* Initialization options to allow init flow and/or content to be
+* altered at runtime
+*/
+typedef enum
+{
+ INIT_NO_OPT, /**< No initialization option */
+ INIT_REINIT, /**< Reinitialization option */
+ INIT_NO_CAL, /**< Skip calibration only */
+ INIT_NO_PATCH_LOAD, /**< Skip patch load */
+ INIT_SOFTRESET /**< SLIC is running after a SOC reset */
+} initOptionsType;
+
+/**
+** This is the main Voice device object
+*/
+typedef struct
+{
+ SiVoiceControlInterfaceType
+ *ctrlInterface; /**< How do we talk to the system? User supplied functions are connected here */
+ revisionType chipRev; /**< What revision is the chip? */
+ partNumberType
+ chipType; /**< What member of the particular family is this chip? */
+ uInt8 lsRev; /**< DAA: what rev is the line side chip? */
+ uInt8 lsType; /**< DAA: what type is the line side chip */
+} SiVoiceDeviceType;
+
+typedef SiVoiceDeviceType *SiVoiceDeviceType_ptr; /**< Shortcut typedef */
+
+
+/**
+** This is the main ProSLIC channel object
+*/
+typedef struct
+{
+ SiVoiceDeviceType_ptr
+ deviceId; /**< Information about the device associated with this channel */
+ uInt8 channel; /**< Which channel is this device? This is a system parameter meaning if you have 2 dual channel devices in your system, this number would then typically go from 0-3 */
+ channelTypeType channelType; /**< Is this a ProSLIC or a DAA */
+ errorCodeType
+ error; /**< Storage for the current error state - used only for APIs that don't return back an error */
+ int debugMode; /**< Are we debugging on this channel? */
+ int channelEnable; /**< is the channel enabled or not? If not, this channel is not initialized */
+ bomOptionsType bomOption; /**< Device/PCB specific */
+ uInt8 dcdc_polarity_invert; /**< Invert DCDC polarity from what is provided in general parameters */
+ uInt8 scratch; /**< Internal use only */
+ uInt8 scratch2; /**< Internal use only */
+} SiVoiceChanType;
+
+
+typedef SiVoiceChanType *SiVoiceChanType_ptr;
+/** @} */
+
+/*****************************************************************************/
+/** @defgroup SIVOICE_IF_CFG SiVoice System control interface functions
+ *
+ * These functions are used by the ProSLIC API to access system resources
+ * such as SPI/GCI access, memory allocation/deallocation and timers.
+ *
+ * @{
+ */
+/*****************************************************************************/
+/** @defgroup SIVOICE_MEMORY_IF SiVoice Memory allocation/deallocation
+ *
+ * These functions dynamically allocate and deallocate memory for the given
+ * structures. malloc() and memset() are called for allocation and free() is
+ * called for deallocation. These functions are typically called during
+ * initialization of the API and at the tear down of the API. If customers
+ * prefer to use statically allocated structures, then they must ensure that
+ * the structure elements are zero'ed out.
+ *
+ * @{
+ */
+
+/**
+ @brief
+ * Allocate memory and initialize the given structure.
+ *
+ * @param[in,out] pCtrlIntf - the structure to initialize
+ * @param[in] interface_count - number of device interfaces present. Typically 1 interface per SPI controller.
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa SiVoice_destroyControlInterfaces
+ */
+
+int SiVoice_createControlInterfaces (SiVoiceControlInterfaceType **pCtrlIntf,
+ uInt32 interface_count);
+#define SiVoice_createControlInterface(X) SiVoice_createControlInterfaces((X),1)
+
+/**
+ @brief
+ * Destroys the given structure and deallocates memory.
+ *
+ * @param[in,out] pCtrlIntf - the structure to destroy/deallocate
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa SiVoice_createControlInterfaces
+ */
+
+int SiVoice_destroyControlInterfaces (SiVoiceControlInterfaceType **pCtrlIntf);
+#define SiVoice_destroyControlInterface SiVoice_destroyControlInterfaces
+
+/**
+ @brief
+ * Allocate memory and initialize the given structure.
+ *
+ * @param[in,out] pDev - the structure to initialize
+ * @param[in] device_count - number of devices to allocate.
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa SiVoice_destroyDevices
+ */
+
+int SiVoice_createDevices (SiVoiceDeviceType **pDev, uInt32 device_count);
+#define SiVoice_createDevice(X) SiVoice_createDevices((X),1)
+
+/**
+ @brief
+ * Destroys the given structure and deallocates memory.
+ *
+ * @param[in,out] pDev - the structure to destroy/deallocate
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa SiVoice_createDevices
+ */
+
+int SiVoice_destroyDevices (SiVoiceDeviceType **pDev);
+
+#define SiVoice_destroyDevice SiVoice_destroyDevices
+
+/**
+ @brief
+ * Allocate memory and initialize the given structure.
+ *
+ * @param[in,out] pChan - the structure to initialize
+ * @param[in] channel_count - number of channels to allocate.
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa SiVoice_destroyChannels
+ */
+
+int SiVoice_createChannels (SiVoiceChanType_ptr *pChan, uInt32 channel_count);
+
+#define SiVoice_createChannel(X) SiVoice_createChannels((X),1)
+
+/**
+ @brief
+ * Destroys the given structure and deallocates memory.
+ *
+ * @param[in,out] pChan - the structure to destroy/deallocate
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa SiVoice_createChannels
+ */
+
+#define SiVoice_destroyChannel SiVoice_destroyChannels
+int SiVoice_destroyChannels (SiVoiceChanType_ptr *pChan);
+/** @} SIVOICE_MEMORY_IF */
+
+/*****************************************************************************/
+/** @defgroup SIVOICE_IO SiVoice SPI/GCI access routines
+ * This group of functions are used to associate the transport mechanism (SPI, GCI) functions with the API. The actual
+ * functions being references are normally implemented by the customer for their particular OS and platform.
+ *
+ * @{
+ */
+
+/**
+ @brief
+ * Associate a interface object with a user supplied data structure. This
+ * structure is passed to all the I/O routines that the ProSLIC API calls.
+ *
+ * @param[in,out] pCtrlIntf - which interface to associate
+ * the user supplied structure with.
+ * @param[in] *hCtrl - the user supplied structure that is passed to the IO functions.
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int SiVoice_setControlInterfaceCtrlObj (SiVoiceControlInterfaceType *pCtrlIntf,
+ void *hCtrl);
+
+/**
+ @brief
+ * Associate a interface object with the reset function.
+ *
+ * @param[in,out] pCtrlIntf - which interface to associate
+ * the user supplied function with.
+ * @param[in] Reset_fptr - the reset function pointer
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int SiVoice_setControlInterfaceReset (SiVoiceControlInterfaceType *pCtrlIntf,
+ ctrl_Reset_fptr Reset_fptr);
+
+/**
+ @brief
+ * Associate a interface object with the register write function.
+ *
+ * @param[in,out] pCtrlIntf - which interface to associate
+ * the user supplied function with.
+ * @param[in] WriteRegister_fptr - the register write function pointer
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int SiVoice_setControlInterfaceWriteRegister (SiVoiceControlInterfaceType
+ *pCtrlIntf, ctrl_WriteRegister_fptr WriteRegister_fptr);
+
+/**
+ @brief
+ * Associate a interface object with the register read function.
+ *
+ * @param[in,out] pCtrlIntf - which interface to associate
+ * the user supplied function with.
+ * @param[in] ReadRegister_fptr- the register read function pointer
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int SiVoice_setControlInterfaceReadRegister (SiVoiceControlInterfaceType
+ *pCtrlIntf, ctrl_ReadRegister_fptr ReadRegister_fptr);
+
+/**
+ @brief
+ * Associate a interface object with the write RAM function.
+ *
+ * @param[in,out] pCtrlIntf - which interface to associate
+ * the user supplied function with.
+ * @param[in] WriteRAM_fptr - the reset function pointer
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int SiVoice_setControlInterfaceWriteRAM (SiVoiceControlInterfaceType *pCtrlIntf,
+ ctrl_WriteRAM_fptr WriteRAM_fptr);
+
+/**
+ @brief
+ * Associate a interface object with the read RAM function.
+ *
+ * @param[in,out] pCtrlIntf - which interface to associate
+ * the user supplied function with.
+ * @param[in] ReadRAM_fptr - the read RAM function pointer
+ *
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int SiVoice_setControlInterfaceReadRAM (SiVoiceControlInterfaceType *pCtrlIntf,
+ ctrl_ReadRAM_fptr ReadRAM_fptr);
+/** @} SIVOICE_IO */
+
+/*****************************************************************************/
+/** @defgroup SIVOICE_TIMER SiVoice Timer functions
+ *
+ * This group of functions associates the customer supplied timer routines with
+ * the ProSLIC API. Please note, for most applications, only the delay routine
+ * is required. The other routines are needed for the pulse digit API.
+ * @{
+ */
+
+/**
+ @brief
+ * This function associates a timer object - which is user defined, but it is
+ * used with ALL channels of the particular control interface.
+ *
+ * @param[in] pCtrlIntf which control interface to associate the given timer object with.
+ * @param[in] *hTimer - the timer ojbect that is passed to all timer functions.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa SiVoice_setControlInterfaceDelay SiVoice_setControlInterfaceTimeElapsed SiVoice_setControlInterfaceGetTime PROSLIC_TIMER
+ */
+
+int SiVoice_setControlInterfaceTimerObj (SiVoiceControlInterfaceType *pCtrlIntf,
+ void *hTimer);
+
+/**
+ @brief
+ * Associate a timer delay function with a given control interface. The
+ * delay function takes in an argument of the timer object and the time in mSec
+ * and delays the thread/task for at least the time requested.
+ *
+ * @param[in] pCtrlIntf - which control interface to associate the function with.
+ * @param[in] Delay_fptr - the pointer to the delay function.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa SiVoice_setControlInterfaceTimerObj SiVoice_setControlInterfaceTimeElapsed SiVoice_setControlInterfaceGetTime PROSLIC_TIMER
+ */
+
+int SiVoice_setControlInterfaceDelay (SiVoiceControlInterfaceType *pCtrlIntf,
+ system_delay_fptr Delay_fptr);
+
+/**
+ * Description:
+ * Associate a time elapsed function with a given control interface. The
+ * time elapsed function uses the values from the function specified in
+ * @ref SiVoice_setControlInterfaceGetTime and computes the delta time
+ * in mSec.
+ * @param[in] pCtrlIntf - which control interface to associate the function with.
+ * @param[in] timeElapsed_fptr - the pointer to the elapsed time function.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa SiVoice_setControlInterfaceTimerObj SiVoice_setControlInterfaceGetTime SiVoice_setControlInterfaceDelay PROSLIC_TIMER
+ */
+
+int SiVoice_setControlInterfaceTimeElapsed (SiVoiceControlInterfaceType
+ *pCtrlIntf, system_timeElapsed_fptr timeElapsed_fptr);
+
+/**
+ * Description:
+ * Associate a time get function with a given control interface. The
+ * time get function returns a value in a form of a void pointer that
+ * is suitable to be used with the function specified in @ref SiVoice_setControlInterfaceTimeElapsed .
+ * This is typically used as a timestamp of when an event started. The resolution needs to be in terms
+ * of mSec.
+ *
+ * @param[in] pCtrlIntf - which control interface to associate the function with.
+ * @param[in] getTime_fptr - the pointer to the get time function.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa SiVoice_setControlInterfaceTimerObj SiVoice_setControlInterfaceTimeElapsed SiVoice_setControlInterfaceDelay PROSLIC_TIMER
+ */
+
+int SiVoice_setControlInterfaceGetTime (SiVoiceControlInterfaceType *pCtrlIntf,
+ system_getTime_fptr getTime_fptr);
+
+/** @} SIVOICE_TIMER */
+
+/*****************************************************************************/
+/** @defgroup SIVOICE_PROC_CONTROL SiVoice Process control
+ * @{
+ */
+
+/**
+ @brief
+ * This function associates a user defined semaphore/critical section
+ * function with the given interface.
+ *
+ * @param[in,out] pCtrlIntf the interface to associate the function with.
+ * @param[in] semaphore_fptr - the function pointer for semaphore control.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int SiVoice_setControlInterfaceSemaphore (SiVoiceControlInterfaceType
+ *pCtrlIntf, ctrl_Semaphore_fptr semaphore_fptr);
+
+/** @} SIVOICE_PROC_CONTROL */
+/*****************************************************************************/
+/** @} SIVOICE_IF_CFG*/
+/*****************************************************************************/
+/** @defgroup SIVOICE_INIT Initialization routines
+ * @{
+ */
+
+/**
+ @brief
+ * This function initializes the various channel structure elements.
+ * This function does not access the chipset directly, so SPI/GCI
+ * does not need to be up during this function call.
+ *
+ * @param[in,out] hProslic - which channel to initialize.
+ * @param[in] channel - Which channel index is this. For example, for a 4 channel system, this would typically range from 0 to 3.
+ * @param[in] chipType - chipset family type for example @ref SI3217X_TYPE or @ref SI3217X_TYPE
+ * @param[in] pDeviceObj - Device structure pointer associated with this channel
+ * @param[in] pCtrlIntf - Control interface associated with this channel
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_SWInitChan
+ */
+
+int SiVoice_SWInitChan (SiVoiceChanType_ptr hProslic,int channel,int chipType,
+ SiVoiceDeviceType *pDeviceObj, SiVoiceControlInterfaceType *pCtrlIntf);
+
+/**
+ @brief
+ * This function calls the user supplied reset function to put and take out the channel from reset. This is
+ * typically done during initialization and may be assumed to be a "global" reset - that is 1 reset per
+ * daisychain vs. 1 per device.
+ *
+ * @note This function can take more than 500 mSec to complete.
+ *
+ * @param[in] pChan - which channel to reset, if a "global reset", then any channel on the daisy chain is sufficient.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int SiVoice_Reset (SiVoiceChanType_ptr pChan);
+
+/** @} SIVOICE_INIT */
+
+/*****************************************************************************/
+/** @defgroup SIVOICE_DEBUG Debug
+ * @{
+ */
+
+/**
+ @brief
+ * This function enables or disables the debug mode, assuming @ref ENABLE_DEBUG is set in the configuration file.
+ *
+ * @param[in] pChan - which channel to set the debug flag.
+ * @param[in] debugEn - 0 = Not set, 1 = set.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int SiVoice_setSWDebugMode (SiVoiceChanType_ptr pChan, int debugEn);
+
+/**
+ @brief
+ * This function enables or disables the debug mode, assuming @ref ENABLE_TRACES is set in the configuration file.
+ *
+ * @param[in] pChan - which channel to set the debug flag.
+ * @param[in] traceEn - 0 = Not set, 1 = set.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int SiVoice_setTraceMode (SiVoiceChanType_ptr pChan, int traceEn);
+
+/**
+ * @brief
+ * This function allows access to SPI read register function pointer from interface
+ *
+ * @param[in] hProslic - pointer to channel structure
+ * @param[in] addr - address to read
+ * @retval uInt8 - register contents
+ *
+ */
+
+uInt8 SiVoice_ReadReg (SiVoiceChanType_ptr hProslic, uInt8 addr);
+
+/**
+ * @brief
+ * This function allows access to SPI write register function pointer from interface
+ *
+ * @param[in] pProslic - pointer to channel structure
+ * @param[in] addr - address to write
+ * @param[in] data to be written
+ * @retval int - @ref RC_NONE
+ *
+ */
+int SiVoice_WriteReg (SiVoiceChanType_ptr pProslic, uInt8 addr, uInt8 data);
+
+/** @} SIVOICE_DEBUG */
+
+/*****************************************************************************/
+/** @defgroup SIVOICE_ERROR Return code functions
+ * @{
+ */
+
+/**
+ @brief
+ * This function returns the error flag that may be set by some function in where
+ * @ref errorCodeType is not returned.
+ *
+ * @note For functions that DO return errorCodeType, the return value here is undefined.
+ *
+ * @param[in] pChan - which channel to clear the error flag
+ * @param[in,out] *error - The current value of error flag.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa SiVoice_clearErrorFlag
+ */
+
+int SiVoice_getErrorFlag (SiVoiceChanType_ptr pChan, int *error);
+
+/**
+ @brief
+ * This function clears the error flag that may be set by some function in where
+ * @ref errorCodeType is not returned.
+ *
+ * @param[in,out] pChan - which channel to clear the error flag
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa SiVoice_getErrorFlag
+ */
+
+int SiVoice_clearErrorFlag (SiVoiceChanType_ptr pChan);
+
+/** @} SIVOICE_ERROR */
+
+/*****************************************************************************/
+/** @defgroup SIVOICE_ENABLE Enable/disable channels (for init)
+ * @{
+ */
+/**
+ @brief
+ * This function sets the channel enable status. If NOT set, then when
+ * the various initialization routines such as @ref SiVoice_SWInitChan is called,
+ * then this particular channel will NOT be initialized.
+ *
+ * This function does not access the chipset directly, so SPI/GCI
+ * does not need to be up during this function call.
+ *
+ * @param[in,out] pChan - which channel to return the status.
+ * @param[in] chanEn - The new value of the channel enable field. 0 = NOT enabled, 1 = enabled.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa SiVoice_getChannelEnable
+ */
+
+int SiVoice_setChannelEnable (SiVoiceChanType_ptr pChan, int chanEn);
+
+/**
+ @brief
+ * This function returns back if the channel is enabled or not.
+ * This function does not access the chipset directly, so SPI/GCI
+ * does not need to be up during this function call.
+ *
+ * @param[in] pChan - which channel to return the status.
+ * @param[in,out] chanEn* - The current value of if the channel is enabled. 0 = NOT enabled, 1 = enabled.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa SiVoice_setChannelEnable
+ */
+
+int SiVoice_getChannelEnable (SiVoiceChanType_ptr pChan, int *chanEn);
+
+/** @} SIVOICE_ENABLE */
+/** @defgroup SIVOICE_MISC Other functions that don't fit into other categories
+ * @{
+ */
+/**
+ @brief
+ * This function returns the current version of the ProSLIC API release as
+ * a NULL terminated string.
+ * @retval char * - string containing the API release string.
+ */
+char *SiVoice_Version(void);
+
+/**
+ * @brief
+ * This function probes an array of channel pointers to determine the number of
+ * ProSLIC's,if not NULL and DAA's, if not NULL. Should only be called after a reset.
+ * @param[in,out] pProslic - an array of channel pointers to iterate through. ChannelType is modified.
+ * @param[in] size - number of channels to pobe.
+ * @param[out] slicCount - if not NULL, the number of SLIC's detected.
+ * @param[out] daaCount - if not NULL, the number of DAA's detected.
+ * @retval RC_NONE if successful.
+ */
+int SiVoice_IdentifyChannels(SiVoiceChanType_ptr *pProslic, int size,
+ int *slicCount, int *daaCount);
+
+/** @} SIVOICE_MISC */
+
+/*****************************************************************************/
+/** @} SIVOICE */
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_ctrl.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_ctrl.h
new file mode 100644
index 0000000..96dcb8b
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_ctrl.h
@@ -0,0 +1,124 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si_voice_ctrl.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** si_voice_ctrl.h
+** SPI driver header file
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** File Description:
+** This is the header file for the control driver used
+** in the ProSLIC demonstration code.
+**
+**
+*/
+
+#ifndef CTRL_H
+#define CTRL_H
+
+/** @defgroup PROSLIC_CUSTOMER_APIS Customer implemented functions
+ * This section has documentation related to APIs that the customer
+ * needs to implement to allow the ProSLIC API to function correctly.
+ *
+ * @note Please note, in addition to the functions mentioned here, the
+ * customer will need to review/modify si_voice_datatypes.h to match
+ * the native datatypes of their system.
+ *
+ * @{
+ */
+/*****************************************************************************/
+/** @defgroup PROSLIC_CUSTOMER_CONTROL Customer implemented control functions
+ * This group of function pointer prototypes need to be implemented by the
+ * customer in order for the ProSLIC API to function correctly. These functions
+ * need to be associated with the API by the functions documented in @ref SIVOICE_IO
+ * @{
+ */
+
+/**
+* @brief
+* Sets/clears the reset pin of all the ProSLICs/VDAAs
+*
+* @param[in] *hCtrl - which interface to reset (this is a customer supplied structure)
+* @param[in] in_reset - 0 = Take the device out of reset, 1 = place the device(s) in reset
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*/
+
+typedef int (*ctrl_Reset_fptr) (void *hCtrl, int in_reset);
+
+/**
+* @brief
+* Register write function pointer
+*
+* @param[in] *hCtrl - which interface to communicate through (this is a customer supplied structure)
+* @param[in] channel - ProSLIC channel to write to (this is the value passed is the same as found in @ref SiVoice_SWInitChan)
+* @param[in] regAddr - Address of register to write
+* @param[in] data - data to write to register
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+*/
+
+typedef int (*ctrl_WriteRegister_fptr) (void *hCtrl, uInt8 channel,
+ uInt8 regAddr, uInt8 data);
+
+/**
+* @brief
+* RAM write function pointer
+*
+* @param[in] *hCtrl - which interface to communicate through (this is a customer supplied structure)
+* @param[in] channel - ProSLIC channel to write to (this is the value passed is the same as found in @ref SiVoice_SWInitChan)
+* @param[in] ramAddr - Address of the RAM location to write
+* @param[in] ramData - data to write to the RAM location
+* @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*
+*/
+
+typedef int (*ctrl_WriteRAM_fptr) (void *hCtrl, uInt8 channel, uInt16 ramAddr,
+ ramData data);
+
+/**
+* @brief
+* Register read function pointer
+*
+* @param[in] *hCtrl - which interface to communicate through (this is a customer supplied structure)
+* @param[in] channel - ProSLIC channel to read from (this is the value passed is the same as found in @ref SiVoice_SWInitChan)
+* @param[in] regAddr - Address of register to read from
+* @retval uInt8 - the value read. If an error occurs, this value is undefined.
+*/
+
+typedef uInt8 (*ctrl_ReadRegister_fptr) (void *hCtrl, uInt8 channel,
+ uInt8 regAddr);
+
+/**
+* @brief
+* RAM read function pointer
+*
+* @param[in] *hCtrl - which interface to communicate through (this is a customer supplied structure)
+* @param[in] channel - ProSLIC channel to read from (this is the value passed is the same as found in @ref SiVoice_SWInitChan)
+* @param[in] ramAddr - Address of the RAM location to read from
+* @retval ramData - the value read. If an error occurs, this value is undefined.
+*/
+
+typedef ramData (*ctrl_ReadRAM_fptr) (void *hCtrl, uInt8 channel,
+ uInt16 ramAddr);
+
+/**
+ * @brief
+ * Critical Section/Semaphore function pointer
+ *
+* @param[in] *hCtrl - which interface to communicate through (this is a customer supplied structure)
+* @param[in] in_critical_section - request to lock the critical section 1 = lock, 0 = unlock
+* @retval 1 = success, 0 = failed
+*/
+
+typedef int (*ctrl_Semaphore_fptr) (void *hCtrl, int in_critical_section);
+
+/** @} PROSLIC_CUSTOMER_CONTROL */
+/** @} */
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_datatypes.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_datatypes.h
new file mode 100644
index 0000000..e4c883e
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_datatypes.h
@@ -0,0 +1,95 @@
+/*
+** Copyright (c) 2007-2015 by Silicon Laboratories
+**
+** $Id: si_voice_datatypes.h 5150 2015-10-05 18:56:06Z nizajerk $
+**
+** si_voice_datatypes.h
+** ProSLIC datatypes file
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file that contains
+** type definitions for the data types
+** used in the demonstration code.
+**
+** Dependancies:
+**
+**
+*/
+#ifndef DATATYPES_H
+#define DATATYPES_H
+#include "proslic_api_config.h"
+
+#ifndef TRUE
+#define TRUE (1)
+#endif
+#ifndef FALSE
+#define FALSE (0)
+#endif
+
+#ifndef NULL
+#define NULL ((void *) 0)
+#endif
+
+#if defined(PROSLIC_LINUX_KERNEL)
+#include <linux/types.h>
+typedef u_int8_t BOOLEAN;
+typedef int8_t int8;
+typedef u_int8_t uInt8;
+typedef uInt8 uChar;
+typedef int16_t int16;
+typedef u_int16_t uInt16;
+typedef int32_t int32;
+typedef u_int32_t uInt32;
+#elif defined(WIN32)
+#include <wtypes.h>
+typedef char int8;
+typedef unsigned char uInt8;
+typedef uInt8 uChar;
+typedef short int int16;
+typedef unsigned short int uInt16;
+typedef long int32;
+typedef unsigned long uInt32;
+#else
+#include <stdint.h>
+typedef uint8_t BOOLEAN;
+typedef int8_t int8;
+typedef uint8_t uInt8;
+typedef uint8_t uChar;
+typedef int16_t int16;
+typedef uint16_t uInt16;
+typedef int32_t int32;
+typedef uint32_t uInt32;
+#endif
+
+/*
+** RAM data
+*/
+typedef uInt32 ramData;
+
+#ifndef DISABLE_MALLOC
+#ifndef PROSLIC_LINUX_KERNEL
+#include <stdlib.h>
+#define SIVOICE_CALLOC calloc
+#define SIVOICE_FREE free
+#define SIVOICE_MALLOC malloc
+#define SIVOICE_MEMSET memset
+#else
+#include <linux/slab.h>
+/* NOTE: kcalloc was introduced in ~2.6.14, otherwise use kzalloc() with (X)*(Y) for the block size */
+#define SIVOICE_CALLOC(X,Y) kcalloc((X),(Y), GFP_KERNEL)
+#define SIVOICE_FREE(X) kfree((X))
+#define SIVOICE_MALLOC(X) kmalloc((X), GFP_KERNEL)
+#define SIVOICE_MEMSET memset
+#endif /* PROSLIC_LINUX_KERNEL */
+#endif /* DISABLE_MALLOC */
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_timer_intf.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_timer_intf.h
new file mode 100644
index 0000000..2e75a62
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/si_voice_timer_intf.h
@@ -0,0 +1,106 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si_voice_timer_intf.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** System specific functions header file
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** File Description:
+** This is the header file for the system specific functions like timer functions.
+**
+**
+*/
+
+#ifndef TIMER_INTF_H
+#define TIMER_INTF_H
+
+/** @addtogroup PROSLIC_CUSTOMER_APIS
+ * @{
+ * @defgroup PROSLIC_CUSTOMER_TIMER Customer implemented timer functions
+ * This section has documentation related to timers: delays and timestamps. The void * is a customer
+ * supplied timer data structure that the user specifies in @ref SiVoice_setControlInterfaceTimerObj.
+ * These functions need to be associated with the functions documented in @ref SIVOICE_TIMER
+ *
+ * @note For the majority of implementations, the only function that is required is the delay function.
+ *
+ * @{
+ */
+
+/**
+ * @brief
+ * System time delay function pointer
+ *
+ * @param[in] hTimer - the system timer object
+ * @param[in] timeInMS - number of mSec to suspend the task/thread executing.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+*/
+
+typedef int (*system_delay_fptr) (void *hTimer, int timeInMs);
+
+/**
+ * @brief
+ * System time elapsed function pointer
+ *
+ * @details
+ * This function combined with @ref system_getTime_fptr function allow one to determine
+ * the time elapsed between the two event times.
+ *
+ * The example pseudo code below shows how one may see this function used in conjunction with
+ * the function pointed by @ref system_getTime_fptr to do some processing while waiting
+ * for a time to expire.
+ *
+ * @code
+ * my_timer_obj time_now;
+ *
+ * getTime(my_prosclic_obj->timer_obj_ptr, (void *)(&time_now));
+ *
+ * Some events occur here...
+ *
+ * do
+ * {
+ * time_elapsed(my_proslic_obj->timer_obj_ptr,(void *)(&time_now), &elapsed_time_mSec);
+ *
+ * Do something here...
+ *
+ * }while(elapsed_time_mSec < Desired delay);
+ *
+ * Change state...
+ *
+ * @endcode
+ *
+ * @param[in] *hTimer - the system timer object
+ * @param[in] *startTime - the time object returned by @ref system_getTime_fptr - the "start time" of the event.
+ * @param[out] *timeInMs - the time in mSec between the "start time" and the current time.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa system_getTime_fptr
+*/
+
+typedef int (*system_timeElapsed_fptr) (void *hTimer, void *startTime,
+ int *timeInMs);
+
+/**
+ * @brief
+ * Retrieve system time in mSec resolution.
+ *
+ * @details
+ * This function combined with @ref system_timeElapsed_fptr function allow one to determine
+ * the time elapsed between the two event times.
+ *
+ * @param[in] *hTimer - the system timer object
+ * @param[in] *time - the time stamp object needed by @ref system_timeElapsed_fptr
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa system_timeElapsed_fptr
+*/
+
+typedef int (*system_getTime_fptr) (void *hTimer, void *time);
+
+/** @}
+ * @} */
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/silicon_spi.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/silicon_spi.h
new file mode 100644
index 0000000..937b355
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/silicon_spi.h
@@ -0,0 +1,118 @@
+/*
+** $Id: spi.h 109 2008-10-22 19:45:09Z lajordan@SILABS.COM $
+**
+** This file is system specific and should be edited for your hardware platform
+**
+** This file is used by proslic_timer_intf.h and proslic_spiGci.h
+*/
+#ifndef SPI_TYPE_H
+#define SPI_TYPE_H
+
+#include "si_voice_datatypes.h"
+
+#define SPI_BRDCST_BIT 0x80
+#define SPI_READ_BIT 0x40
+#define SPI_REG_BIT 0x20
+#define SPI_CID_MASK 0x1f
+
+#define CHIP_NUM_IN_DAISY 4
+
+
+/*
+** SPI/GCI structure
+*/
+typedef struct{
+ int port;
+} ctrl_S;
+
+/*
+** Function: SPI_Init
+**
+** Description:
+** Initializes the SPI interface
+*/
+void SPI_Init (void);
+
+/*
+** Function: SPI_Exit
+**
+** Description:
+** Free the SPI interface
+*/
+void SPI_Exit (void);
+
+
+/*
+** Function: SlicHardReset
+**
+** Description:
+** Reset the chip
+*/
+void SlicHardReset(void);
+
+/*
+** Function: ctrl_ResetWrapper
+**
+** Description:
+** Sets the reset pin of the ProSLIC
+*/
+int ctrl_ResetWrapper (void *hCtrl, int status);
+
+/*
+** register read
+**
+** Description:
+** Reads ProSLIC registers
+*/
+unsigned char ctrl_ReadRegisterWrapper (void *hCtrl, unsigned char channel, unsigned char regAddr);
+
+/*
+** Function: ctrl_WriteRegisterWrapper
+**
+** Description:
+** Writes ProSLIC registers
+*/
+int ctrl_WriteRegisterWrapper (void *hSpiGci, unsigned char channel, unsigned char regAddr, unsigned char data);
+
+/*
+** Function: ctrl_WriteRAMWrapper
+**
+** Description:
+** Writes ProSLIC RAM
+*/
+int ctrl_WriteRAMWrapper (void *hSpiGci, unsigned char channel, unsigned short ramAddr, unsigned int data);
+
+/*
+** Function: ctrl_ReadRAMWrapper
+**
+** Description:
+** Reads ProSLIC RAM
+*/
+unsigned int ctrl_ReadRAMWrapper (void *hSpiGci, unsigned char channel, unsigned short ramAddr);
+
+#endif
+/*
+** $Log: spi.h,v $
+** Revision 1.2 2007/10/22 21:38:10 lajordan
+** fixed some warnings
+**
+** Revision 1.1 2007/10/22 20:52:09 lajordan
+** no message
+**
+** Revision 1.1 2007/06/01 02:27:11 lajordan
+** no message
+**
+** Revision 1.2 2007/02/21 16:53:07 lajordan
+** no message
+**
+** Revision 1.1 2007/02/16 23:55:15 lajordan
+** no message
+**
+** Revision 1.2 2007/02/15 23:33:25 lajordan
+** no message
+**
+** Revision 1.1.1.1 2006/07/13 20:26:08 lajordan
+** no message
+**
+*/
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/timer_adt.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/timer_adt.h
new file mode 100644
index 0000000..44dabf0
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/timer_adt.h
@@ -0,0 +1,83 @@
+/*
+** $Id: dummy_timer.h 109 2008-10-22 19:45:09Z lajordan@SILABS.COM $
+**
+** This file is system specific and should be edited for your hardware platform
+**
+**
+*/
+#ifndef TIME_TYPE_H
+#define TIME_TYPE_H
+
+
+
+/*
+** System timer interface structure
+*/
+typedef struct{
+ int timerInfo;
+} systemTimer_S;
+
+/*
+** System time stamp
+*/
+typedef struct{
+ int timestamp;
+} timeStamp;
+
+/*
+** Function: SYSTEM_TimerInit
+**
+** Description:
+** Initializes the timer used in the delay and time measurement functions
+** by doing a long inaccurate sleep and counting the ticks
+**
+** Input Parameters:
+**
+** Return:
+** none
+*/
+void TimerInit (systemTimer_S *pTimerObj);
+/*
+** Function: DelayWrapper
+**
+** Description:
+** Waits the specified number of ms
+**
+** Input Parameters:
+** hTimer: timer pointer
+** timeInMs: time in ms to wait
+**
+** Return:
+** none
+*/
+int time_DelayWrapper (void *hTimer, int timeInMs);
+
+
+/*
+** Function: TimeElapsedWrapper
+**
+** Description:
+** Calculates number of ms that have elapsed
+**
+** Input Parameters:
+** hTImer: pointer to timer object
+** startTime: timer value when function last called
+** timeInMs: pointer to time elapsed
+**
+** Return:
+** timeInMs: time elapsed since start time
+*/
+int time_TimeElapsedWrapper (void *hTimer, void *startTime, int *timeInMs);
+
+int time_GetTimeWrapper (void *hTimer, void *time);
+#endif
+/*
+** $Log: dummy_timer.h,v $
+** Revision 1.1 2007/10/22 21:38:32 lajordan
+** fixed some warnings
+**
+** Revision 1.1 2007/10/22 20:49:21 lajordan
+** no message
+**
+**
+*/
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa.h
new file mode 100644
index 0000000..ae4ca51
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa.h
@@ -0,0 +1,1147 @@
+/*
+** Copyright (c) 2008-2016 by Silicon Laboratories
+**
+** $Id: vdaa.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Vdaa VoiceDAA interface header file
+**
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the main VoiceDAA API and is used
+** in the VoiceDAA demonstration code.
+**
+**
+*/
+
+#ifndef VDAA_INTF_H
+#define VDAA_INTF_H
+
+#include "si_voice_datatypes.h"
+#include "si_voice.h"
+/*****************************************************************************/
+/** @defgroup VDAA_API VDAA API
+ * This section covers APIs and definitions related to the VDAA/FXO.
+ * @{
+ */
+
+/*
+** Constants
+*/
+#define BROADCAST 0xff
+#define LCS_SCALE_NUM 33 /* Line Current Status Scale */
+#define LCS_SCALE_DEN 10 /* Line Current Status Scale */
+
+/* Macro substitution from Vdaa legacy API's to SiVoice API's */
+#define Vdaa_createControlInterface SiVoice_createControlInterface
+#define Vdaa_destroyControlInterface SiVoice_destroyControlInterface
+#define Vdaa_createDevice SiVoice_createDevice
+#define Vdaa_destroyDevice SiVoice_destroyDevice
+#define Vdaa_createChannel SiVoice_createChannel
+#define Vdaa_destroyChannel SiVoice_destroyChannel
+
+#define Vdaa_setControlInterfaceCtrlObj SiVoice_setControlInterfaceCtrlObj
+#define Vdaa_setControlInterfaceReset SiVoice_setControlInterfaceReset
+#define Vdaa_setControlInterfaceWriteRAM SiVoice_setControlInterfaceWriteRAM
+#define Vdaa_setControlInterfaceReadRAM SiVoice_setControlInterfaceReadRAM
+#define Vdaa_setControlInterfaceWriteRegister SiVoice_setControlInterfaceWriteRegister
+#define Vdaa_setControlInterfaceReadRegister SiVoice_setControlInterfaceReadRegister
+#define Vdaa_setControlInterfaceTimerObj SiVoice_setControlInterfaceTimerObj
+#define Vdaa_setControlInterfaceDelay SiVoice_setControlInterfaceDelay
+#define Vdaa_setControlInterfaceSemaphore SiVoice_setControlInterfaceSemaphore
+#define Vdaa_setControlInterfaceTimeElapsed SiVoice_setControlInterfaceTimeElapsed
+#define Vdaa_setControlInterfaceGetTime SiVoice_setControlInterfaceGetTime
+
+#define Vdaa_SWInitChan SiVoice_SWInitChan
+
+#define Vdaa_setSWDebugMode SiVoice_setSWDebugMode
+#define Vdaa_getErrorFlag SiVoice_getErrorFlag
+#define Vdaa_clearErrorFlag SiVoice_clearErrorFlag
+
+#define Vdaa_setChannelEnable SiVoice_setChannelEnable
+#define Vdaa_getChannelEnable SiVoice_getChannelEnable
+
+#define Vdaa_Reset SiVoice_Reset
+#define Vdaa_Version SiVoice_Version
+
+#define SI3050_CHAN_PER_DEVICE 1
+
+/*
+**
+** VDAA Initialization/Configuration Parameter Options
+**
+*/
+/*
+** This defines names for the PCM Data Format
+*/
+typedef enum
+{
+ A_LAW = 0, /**< 00 = A-Law. Signed magnitude data format */
+ U_LAW = 1, /**< 01 = u-Law. Signed magnitude data format */
+ LINEAR_16_BIT = 3 /**< 11 = 16-bit linear (2s complement data format) */
+} tPcmFormat;
+
+/*
+** This defines names for the phcf bits
+*/
+typedef enum
+{
+ PCLK_1_PER_BIT = 0,
+ PCLK_2_PER_BIT = 1
+} tPHCF;
+
+
+/*
+** This defines names for the tri bit
+*/
+typedef enum
+{
+ TRI_POS_EDGE = 0,
+ TRI_NEG_EDGE = 1
+} tTRI;
+
+
+/**
+** This defines names for the AC impedance range
+*/
+typedef enum
+{
+ AC_600, /**< 600 Ohms */
+ AC_900, /**< 900 O */
+ AC_270__750_150, /**< 270 O + (750 O || 150 nF) and 275 O + (780 O || 150 nF) */
+ AC_220__820_120, /**< 220 O + (820 O || 120 nF) and 220 O + (820 O || 115 nF) */
+ AC_370__620_310, /**< 370 O + (620 O || 310 nF) */
+ AC_320__1050_230, /**< 320 O + (1050 O || 230 nF) */
+ AC_370__820_110, /**< 370 O + (820 O || 110 nF) */
+ AC_275__780_115, /**< 275 O + (780 O || 115 nF) */
+ AC_120__820_110, /**< 120 O + (820 O || 110 nF) */
+ AC_350__1000_210, /**< 350 O + (1000 O || 210 nF) */
+ AC_200__680_100, /**< 200 O + (680 O || 100 nF) */
+ AC_600__2160, /**< 600 O + 2.16 uF */
+ AC_900__1000, /**< 900 O + 1 uF */
+ AC_900__2160, /**< 900 O + 2.16 uF */
+ AC_600__1000, /**< 600 O + 1 uF */
+ AC_Global_impedance /**< Global impedance */
+} tAC_Z;
+
+/**
+** This defines names for the DC impedance range
+*/
+typedef enum
+{
+ DC_50, /**< 50 Ohms dc termination is selected */
+ DC_800 /**< 800 Ohms dc termination is selected */
+
+} tDC_Z;
+
+/**
+** This defines names for the ringer impedance range
+*/
+typedef enum
+{
+ RZ_MAX = 0,
+ RZ_SYNTH = 1
+} tRZ;
+
+/**
+** This defines names for the dc voltage adjust
+*/
+typedef enum
+{
+ DCV3_1 = 0,
+ DCV3_2 = 1,
+ DCV3_35 = 2,
+ DCV3_5 = 3
+} tDCV;
+
+/**
+** This defines names for the minimum loop current
+*/
+typedef enum
+{
+ MINI_10MA = 0,
+ MINI_12MA = 1,
+ MINI_14MA = 2,
+ MINI_16MA = 3
+} tMINI;
+
+/**
+** This defines names for the current limiting enable bit
+*/
+typedef enum
+{
+ ILIM_DISABLED = 0,
+ ILIM_ENABLED = 1
+} tILIM;
+
+/**
+** This defines names for the ring detect interupt mode
+*/
+typedef enum
+{
+ RDI_BEG_BURST = 0,
+ RDI_BEG_END_BURST = 1
+} tRDI;
+
+/**
+** This defines names for the on hook speed / spark quenching
+*/
+typedef enum
+{
+ OHS_LESS_THAN_0_5MS = 0,
+ OHS_3MS = 1,
+ OHS_26MS = 0xE
+} tOHS;
+
+/**
+** This defines names for the hbe bit
+*/
+typedef enum
+{
+ HYBRID_DISABLED = 0,
+ HYBRID_ENABLED = 1
+} tHBE;
+
+
+/**
+** Gain/Attenuation Select
+*/
+typedef enum
+{
+ XGA_GAIN,
+ XGA_ATTEN
+} tXGA;
+
+/**
+** MUTE Control Options
+*/
+typedef enum
+{
+ MUTE_DISABLE_ALL,
+ MUTE_DISABLE_RX,
+ MUTE_DISABLE_TX,
+ MUTE_ENABLE_RX,
+ MUTE_ENABLE_TX,
+ MUTE_ENABLE_ALL
+} tMUTE;
+
+/**
+** This defines names for the ring delay setting
+*/
+typedef enum
+{
+ RDLY_0MS = 0,
+ RDLY_256MS = 1,
+ RDLY_512MS = 2,
+ RDLY_768MS = 3,
+ RDLY_1024MS = 4,
+ RDLY_1280MS = 5,
+ RDLY_1536MS = 6,
+ RDLY_1792MS = 7
+} tRDLY;
+
+/**
+** This defines names for the ring timeouts
+*/
+typedef enum
+{
+ RTO_128MS = 1,
+ RTO_256MS = 2,
+ RTO_384MS = 3,
+ RTO_512MS = 4,
+ RTO_640MS = 5,
+ RTO_768MS = 6,
+ RTO_896MS = 7,
+ RTO_1024MS = 8,
+ RTO_1152MS = 9,
+ RTO_1280MS = 10,
+ RTO_1408MS = 11,
+ RTO_1536MS = 12,
+ RTO_1664MS = 13,
+ RTO_1792MS = 14,
+ RTO_1920MS = 15
+} tRTO;
+
+/**
+** This defines names for the ring timeouts
+*/
+typedef enum
+{
+ RCC_100MS = 0,
+ RCC_150MS = 1,
+ RCC_200MS = 2,
+ RCC_256MS = 3,
+ RCC_384MS = 4,
+ RCC_512MS = 5,
+ RCC_640MS = 6,
+ RCC_1024MS = 7
+} tRCC;
+
+/**
+** This defines names for the ring validation modes
+*/
+typedef enum
+{
+ RNGV_DISABLED = 0,
+ RNGV_ENABLED = 1
+} tRNGV;
+
+/**
+** This defines names for the rfwe bit
+*/
+typedef enum
+{
+ RFWE_HALF_WAVE = 0,
+ RFWE_FULL_WAVE = 1,
+ RFWE_RNGV_RING_ENV = 0,
+ RFWE_RNGV_THRESH_CROSS = 1
+} tRFWE;
+
+/**
+** This defines names for the rt and rt2 bit
+*/
+typedef enum
+{
+ RT__13_5VRMS_16_5VRMS = 0,
+ RT__19_35VRMS_23_65VRMS = 2,
+ RT__40_5VRMS_49_5VRMS = 3
+} tRT;
+
+/**
+** This defines names for the rt and rt2 bit
+*/
+typedef enum
+{
+ RGDT_ACTIVE_LOW = 0,
+ RGDT_ACTIVE_HI = 1
+} tRPOL;
+
+
+/**
+** This defines names for the interrupts
+*/
+typedef enum
+{
+ POLI,
+ TGDI,
+ LCSOI,
+ DODI,
+ BTDI,
+ FTDI,
+ ROVI,
+ RDTI,
+ CVI /**< Current/Voltage Interrupt REGISTER#44 */
+} vdaaInt;
+
+/**
+** Interrupt Bitmask Fields
+*/
+typedef enum
+{
+ POLM = 1,
+ TGDM = 2, /**< Si3050 Only */
+ LCSOM = 4,
+ DODM = 8,
+ BTDM = 16,
+ FDTM = 32,
+ ROVM = 64,
+ RDTM = 128
+} vdaaIntMask;
+
+
+/**
+** This defines names for the idl bit (obsolete)
+*/
+typedef enum
+{
+ IDL_DISABLED = 0,
+ IDL_ENABLED = 1
+} tIDL;
+
+/**
+** This defines names for the ddl bit (obsolete)
+*/
+typedef enum
+{
+ DDL_NORMAL_OPERATION = 0,
+ DDL_PCM_LOOPBACK = 1
+} tDDL;
+
+/**
+** Loopback Modes
+*/
+typedef enum
+{
+ LPBK_NONE = 0,
+ LPBK_IDL = 1,
+ LPBK_DDL = 2,
+ LPBK_PCML = 3
+} tLpbkMode;
+
+/**
+** Loopback Status
+*/
+typedef enum
+{
+ LPBK_DISABLED = 0,
+ LPBK_ENABLED = 1
+} tLpbkStatus;
+
+/**
+** This defines names for the interrupt pin modes
+*/
+typedef enum
+{
+ INTE_DISABLED = 0,
+ INTE_ENABLED = 1
+} tInte;
+
+/**
+** This defines names for the interrupt pin polarities
+*/
+typedef enum
+{
+ INTE_ACTIVE_LOW = 0,
+ INTE_ACTIVE_HIGH = 1
+} tIntePol;
+
+/**
+** This defines names for the pwm settings
+*/
+typedef enum
+{
+ PWM_DELTA_SIGMA = 0,
+ PWM_CONVENTIONAL_16KHZ = 1,
+ PWM_CONVENTIONAL_32KHZ = 2
+} tPwmMode;
+
+/**
+** PWME
+*/
+typedef enum
+{
+ PWM_DISABLED = 0,
+ PWM_ENABLED
+} tPWME;
+
+/**
+** RCALD control
+*/
+typedef enum
+{
+ RES_CAL_ENABLED = 0,
+ RES_CAL_DISABLED
+} tRCALD;
+
+/**
+** Voice DAA Hook states
+*/
+enum
+{
+ VDAA_DIG_LOOPBACK = 1,
+ VDAA_ONHOOK = 2,
+ VDAA_OFFHOOK = 3,
+ VDAA_ONHOOK_MONITOR = 4
+};
+
+/**
+** FDT Monitoring Options
+*/
+enum
+{
+ FDT_MONITOR_OFF = 0,
+ FDT_MONITOR_ON
+};
+
+
+/**
+** Offhook Speed Select
+*/
+typedef enum
+{
+ FOH_512,
+ FOH_128,
+ FOH_64,
+ FOH_8
+} tFOH;
+
+/**
+** Sample Rate Control
+*/
+typedef enum
+{
+ FS_8KHZ,
+ FS_16KHZ
+} tHSSM;
+
+/**
+** Line Voltage Force Disable
+*/
+typedef enum
+{
+ LVS_FORCE_ENABLED = 0,
+ LVS_FORCE_DISABLED
+} tLVFD;
+
+/**
+** Current/Voltage Monitor Select
+*/
+typedef enum
+{
+ CVS_CURRENT,
+ CVS_VOLTAGE
+} tCVS;
+
+/**
+** Current/Voltage Interrupt Polarity
+*/
+typedef enum
+{
+ CVP_BELOW,
+ CVP_ABOVE
+} tCVP;
+
+/**
+** Guarded Clear
+*/
+typedef enum
+{
+ GCE_DISABLED = 0,
+ GCE_ENABLED
+} tGCE;
+
+/**
+** SPI Mode (Si3050 Only)
+*/
+typedef enum
+{
+ SPIM_TRI_CS,
+ SPIM_TRI_SCLK
+} tSPIM;
+
+/**
+** FILT
+*/
+typedef enum
+{
+ FILT_HPF_5HZ,
+ FILT_HPF_200HZ
+} tFILT;
+
+/**
+** IIRE
+*/
+typedef enum
+{
+ IIR_DISABLED = 0,
+ IIR_ENABLED
+} tIIRE;
+
+/**
+** FULL2
+*/
+typedef enum
+{
+ FULL2_DISABLED = 0,
+ FULL2_ENABLED
+} tFULL2;
+
+/**
+** FULL
+*/
+typedef enum
+{
+ FULL_DISABLED = 0,
+ FULL_ENABLED
+} tFULL;
+
+/**
+** RG1
+*/
+typedef enum
+{
+ RG1_DISABLED = 0,
+ RG1_ENABLED
+} tRG1;
+
+
+/**
+** -----------------------------
+** CONFIGURATION DATA STRUCTURES
+** -----------------------------
+*/
+
+/**
+** (Updated) Structure for General Parameters
+*/
+typedef struct
+{
+ tInte inte; /* INTE */
+ tIntePol intp; /* INTP */
+ tRCALD rcald; /* RCALD */
+ tHSSM hssm; /* HSSM */
+ tFOH foh; /* FOH */
+ tLVFD lvfd; /* LVFD */
+ tCVS cvs; /* CVS */
+ tCVP cvp; /* CVP */
+ tGCE gce; /* GCE */
+ tIIRE iire; /* IIRE */
+ tFULL2 full2; /* FULL2 */
+ tFULL full; /* FULL */
+ tFILT filt; /* FILT */
+ tRG1 rg1; /* RG1 */
+ tPwmMode pwmm; /* PWMM Si3050 Only */
+ tPWME pwmEnable; /* PWME Si3050 Only */
+ tSPIM spim; /* SPIM Si3050 Only */
+} vdaa_General_Cfg;
+
+
+/**
+** (NEW) Structure for Country Presets
+*/
+typedef struct
+{
+ tRZ rz;
+ tDC_Z dcr;
+ tAC_Z acim;
+ tDCV dcv;
+ tMINI mini;
+ tILIM ilim;
+ tOHS ohs_sq;
+ tHBE hbe;
+} vdaa_Country_Cfg;
+
+/**
+** (NEW) Structure for Hybrid Presets
+*/
+typedef struct
+{
+ uInt8 hyb1;
+ uInt8 hyb2;
+ uInt8 hyb3;
+ uInt8 hyb4;
+ uInt8 hyb5;
+ uInt8 hyb6;
+ uInt8 hyb7;
+ uInt8 hyb8;
+} vdaa_Hybrid_Cfg;
+
+/**
+** Structure for PCM configuration presets
+*/
+typedef struct
+{
+ tPcmFormat pcmFormat;
+ tPHCF pcmHwy;
+ tTRI pcm_tri;
+} vdaa_PCM_Cfg;
+
+/** @addtogroup VDAA_AUDIO
+ * @{
+ */
+/** @addtogroup VDAA_GAIN_CONTROL
+ * @{
+ */
+/*
+** (Updated) Structure for Audio path gain preset
+*/
+typedef struct
+{
+ uInt8 mute;
+ tXGA xga2;
+ uInt8 acgain2;
+ tXGA xga3;
+ uInt8 acgain3;
+ uInt8 callProgress;
+ BOOLEAN cpEn;
+} vdaa_audioGain_Cfg;
+
+/** @} VDAA_GAIN_CONTROL*/
+/** @} */
+/*
+** Structure for configuring ring detect config
+*/
+
+typedef struct
+{
+ tRDLY rdly;
+ tRT rt;
+ uInt8 rmx;
+ tRTO rto;
+ tRCC rcc;
+ tRNGV rngv;
+ uInt8 ras;
+ tRFWE rfwe;
+ tRDI rdi;
+ tRPOL rpol;
+} vdaa_Ring_Detect_Cfg;
+
+
+/*
+** Defines structure of interrupt data
+*/
+typedef struct
+{
+ vdaaInt *irqs;
+ uInt8 number;
+} vdaaIntType;
+
+/*
+** Defines structure for configuring Loop Back
+*/
+typedef struct
+{
+ tIDL isoDigLB;
+ tDDL digDataLB;
+} vdaa_Loopback_Cfg;
+
+
+/*
+** Generic Flag
+*/
+typedef enum
+{
+ VDAA_BIT_SET = 1,
+ VDAA_BIT_CLEAR = 0
+} tVdaaBit;
+
+/*
+** Defines structure for daa current status (ring detect/hook stat)
+*/
+typedef struct
+{
+ tVdaaBit ringDetectedNeg;
+ tVdaaBit ringDetectedPos;
+ tVdaaBit ringDetected;
+ tVdaaBit offhook;
+ tVdaaBit onhookLineMonitor;
+} vdaaRingDetectStatusType;
+
+
+typedef SiVoiceControlInterfaceType vdaaControlInterfaceType;
+typedef SiVoiceDeviceType vdaaDeviceType;
+typedef SiVoiceChanType vdaaChanType;
+
+/*
+** This is the main VoiceDAA interface object pointer
+*/
+typedef vdaaChanType *vdaaChanType_ptr;
+
+/*
+** Defines initialization data structures
+*/
+typedef struct
+{
+ uInt8 address;
+ uInt8 initValue;
+} vdaaRegInit;
+
+
+typedef enum
+{
+ PAR_HANDSET_NOT_DETECTED = 0,
+ PAR_HANDSET_DETECTED = 1
+} vdaaPHDStatus;
+
+/*
+** Line In Use Configuration Structure
+*/
+typedef struct
+{
+ vdaaPHDStatus status;
+ int8 min_onhook_vloop;
+ int8 min_offhook_vloop;
+ int16 min_offhook_iloop;
+ int8 measured_vloop;
+ int16 measured_iloop;
+} vdaa_LIU_Config;
+
+/*
+** Function Declarations
+*/
+
+/*****************************************************************************/
+/** @defgroup VDAA_AUDIO Audio
+ * @{
+ */
+/** @defgroup VDAA_GAIN_CONTROL Gain Control
+ * This section covers functions that allow one to adjust the audio
+ * gains - with TX toward the network/SOC/DSP and RX toward the tip/ring.
+ *
+ * @{
+ */
+
+/**
+ * @brief
+ * Sets the TX audio gain (toward the network).
+ *
+ * @param[in] pVdaa - which channel to configure
+ * @param[in] preset - which preset to use (this may be from the constants file)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_TXAudioGainSetup (vdaaChanType *pVdaa,int32 preset);
+
+/**
+ * @brief
+ * Sets the RX audio gain (toward the tip/ring).
+ *
+ * @param[in] pVdaa - which channel to configure
+ * @param[in] preset - which preset to use (this may be from the constants file)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_RXAudioGainSetup (vdaaChanType *pVdaa,int32 preset);
+
+/** @} VDAA_GAIN_CONTROL */
+
+/*****************************************************************************/
+/** @defgroup VDAA_AUDIO_CONTROL Audio control/configuration
+ * This group of functions is used to configure and control the PCM bus. It is essential that @ref Vdaa_PCMSetup,
+ * @ref Vdaa_PCMTimeSlotSetup and @ref Vdaa_PCMStart are called prior to any audio processing.
+ * @{
+ */
+
+/**
+ * @brief
+ * This configures the PCM bus with parameters such as companding and data latching timing.
+ *
+ * @param[in] pVdaa - which channel should be configured
+ * @param[in] preset - which preset to use from the constants file (see configuration tool, PCM dialog box)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa Vdaa_PCMTimeSlotSetup ProSLIC_PCMStart
+ */
+
+int Vdaa_PCMSetup (vdaaChanType *pVdaa,int32 preset);
+
+/**
+ * @brief
+ * This configures the ProSLIC to latch and send the PCM data at a particular timeslot in terms of PCM clocks (PCLK).
+ *
+ * Typically, for aLaw and uLaw, one can use the following calculation to set the rxcount and txcount parameters:
+ *
+ * rxcount = txcount = (channel_number)*8;
+ *
+ * For 16 bit linear, one can do the following:
+ *
+ * rxcount = txcount = (channel_number)*16;
+ *
+ * where channel_number = which ProSLIC channel on the PCM bus. For example, if one were to have 2 dual channel
+ * VDAA's on the same PCM bus, this value would range from 0 to 3.
+ *
+ * @param[in] pVdaa - which channel should be configured
+ * @param[in] rxcount - how many clocks until reading data from the PCM bus
+ * @param[in] txcount - how many clocks until writing data to the PCM bus.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa Vdaa_PCMSetup Vdaa_PCMStart
+ */
+
+int Vdaa_PCMTimeSlotSetup (vdaaChanType *pVdaa, uInt16 rxcount, uInt16 txcount);
+
+/**
+ * @brief
+ * This enables PCM transfer on the given ProSLIC channel.
+ *
+ * @param[in] pVdaa - - which channel should be enabled
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa ProSLIC_PCMSetup ProSLIC_PCMTimeSlotSetup ProSLIC_PCMStop
+ */
+
+int Vdaa_PCMStart (vdaaChanType *pVdaa);
+
+/**
+ * @brief
+ * This disables PCM transfer on the given VDAA channel. Typically, this is called for debugging
+ * purposes only.
+ *
+ * @param[in] pVdaa - - which channel should be disabled
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ * @sa Vdaa_PCMSetup Vdaa_PCMTimeSlotSetup Vdaa_PCMStart
+ */
+
+int Vdaa_PCMStop (vdaaChanType *pVdaa);
+
+/**
+ * @brief
+ * Program desired mute mode for the given channel.
+ *
+ * @param[in] pVdaa - which channel should be modified
+ * @param[in] mute - what is the desired mode.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int Vdaa_SetAudioMute(vdaaChanType *pVdaa, tMUTE mute);
+
+/**
+ * @brief
+ * Program desired loopback test mode for the given channel.
+ *
+ * @param[in] pVdaa - which channel should be modified
+ * @param[in] lpbk_mode - what is the desired loopback mode.
+ * @param[in] lpbk_status - is this to enable or disable the loopback mode.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int Vdaa_SetLoopbackMode(vdaaChanType_ptr pVdaa, tLpbkMode lpbk_mode,
+ tLpbkStatus lpbk_status);
+
+/*****************************************************************************/
+/** @} VDAA_AUDIO */
+/** @} */
+/** @defgroup VDAA_RING Ring detection
+ * @{
+ */
+
+/**
+ * @brief This function configures ringing detect for the Vdaa.
+ * @param[in] pVdaa - which channel to program
+ * @param[in] preset - Index of predefined ring detect setup configuration
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_RingDetectSetup (vdaaChanType *pVdaa,int32 preset);
+
+
+/**
+ * @brief This function reads ring detect/hook status and populates the structure passed via pStatus.
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @param[out] pStatus - updated ring status.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_ReadRingDetectStatus (vdaaChanType *pVdaa,
+ vdaaRingDetectStatusType *pStatus);
+
+/** @} VDAA_RING */
+
+/*****************************************************************************/
+/** @defgroup VDAA_LINE_STATE Line state
+ * @{
+ */
+
+
+/**
+ * @brief This function sets the Voice DAA hook status
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @param[in] newHookStatus - new hook state (VDAA_ONHOOK, VDAA_OFFHOOK, VDAA_DIG_LOOPBACK or VDAA_ONHOOK_MONITOR)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_SetHookStatus (vdaaChanType *pVdaa,uInt8 newHookStatus);
+
+/**
+ * @brief This function powers up the Voice DAA lineside device.
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_PowerupLineside(vdaaChanType_ptr pVdaa);
+
+/**
+ * @brief This function powers down the Voice DAA line side device.
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_PowerdownLineside(vdaaChanType_ptr pVdaa);
+
+/**
+ * @brief Read VDAA Hook Status
+ * @param[in] pVdaa - which channel to return the hook status.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+uInt8 Vdaa_GetHookStatus (vdaaChanType *pVdaa);
+
+/** @} VDAA_LINE_STATE */
+
+/*****************************************************************************/
+/** @defgroup VDAA_DIAG Diagnostics
+ * @{
+ */
+
+/**
+ * @brief This function returns the Voice DAA linefeed status.
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @param[in,out] vloop - Pointer to loop voltage variable (set by this function) - in Volts
+ * @param[in,out] iloop - Pointer to loop current variable (set by this function) - in mA
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_ReadLinefeedStatus (vdaaChanType *pVdaa,int8 *vloop, int16 *iloop);
+
+/**
+ * @brief This function initializes the vdaa_LIU_Config datastructure for line in use feature
+ * @param[in,out] liuCfg - Pointer to vdaa_LIU_Config structure (user allocates)
+ * @param[in] minOnV - minimum onhook loop voltage that indicates no parallel handset is present (V)
+ * @param[in] minOffV - minimum offhook loop voltage that indicates no parallel handset is present (V)
+ * @param[in] minOffI - minimum offhook loop current that indicates no parallel handset is preset (mA)
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa Vdaa_CheckForLineInUse
+ */
+
+int Vdaa_InitLineInUseCheck(vdaa_LIU_Config *liuCfg,int8 minOnV,int8 minOffV,
+ int16 minOffI );
+
+/**
+ * @brief Monitor LVCS to detect intrusion or parallel handset
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @param[in,out] liuCfg - Pointer to vdaa_LIU_Config structure
+ * @retval VDAA_ONHOOK or VDAA_OFFHOOK (in use)
+ * @sa Vdaa_InitLineInUseCheck
+ */
+
+uInt8 Vdaa_CheckForLineInUse(vdaaChanType *pVdaa, vdaa_LIU_Config *liuCfg);
+
+/**
+ * @brief This function returns the status of the Frame Detect (FDT) bit.
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @retval int - 0 - Frame NOT detected, 1 = Frame detected
+ */
+
+int Vdaa_ReadFDTStatus(vdaaChanType_ptr pVdaa);
+
+/** @} VDAA_DIAG */
+
+/*****************************************************************************/
+/** @defgroup VDAA_INTERRUPTS Interrupts
+ * @{
+ */
+
+
+/**
+ * @brief Enables interrupts based on passed 9-bit bitmask. Bit values defined by vdaaIntMask enum.
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @param[in] bitmask - a logical or of @ref vdaaIntMask enum
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_SetInterruptMask(vdaaChanType *pVdaa, vdaaIntMask bitmask);
+
+/**
+ * @brief Returns the current interrupt status.
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @param[out] pIntData - interrupt mask showing which interrupts are set.
+ * @retval int - the number of interrupts set or RC_IGNORE
+ */
+
+int Vdaa_GetInterrupts (vdaaChanType *pVdaa,vdaaIntType *pIntData);
+
+/**
+ * @brief Clears ALL interrupts
+ * @param[in] pVdaa - Pointer to Voice DAA channel structure
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_ClearInterrupts (vdaaChanType *pVdaa);
+
+/** @} VDAA_INTERRUPTS */
+
+/*****************************************************************************/
+/** @defgroup VDAA_INIT Initialization
+ * @{
+ */
+
+/*****************************************************************************/
+/** @defgroup VDAA_HW_INIT Hardware/line initialization
+ * @{
+ */
+
+/**
+ * @brief
+ * This function configures the Voice DAA with a predefined country configuration preset.
+ *
+ * @param[in] pVdaa - which channel to initialize
+ * @param[in] preset - The preset to use to configure the VDAA with.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int Vdaa_CountrySetup (vdaaChanType *pVdaa,int32 preset);
+
+/**
+ * @brief
+ * This function configures the Voice DAA digital hybrid with a predefined preset.
+ *
+ * @param[in] pVdaa - which channel to initialize
+ * @param[in] preset - Index of predefined digital hybrid preset
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ * @sa Vdaa_SetHybridEnable
+ */
+
+int Vdaa_HybridSetup (vdaaChanType *pVdaa,int32 preset);
+
+/**
+ * @brief
+ * This function fully initializes and loads the general config parameters to all Vdaa devices
+ * a given daisychain up to a given number.
+ *
+ * @param[in] pVdaa - which channel to initialize or start from if size>1
+ * @param[in] size - the number of channels to initialize, should be at least 1
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int Vdaa_Init (vdaaChanType_ptr *pVdaa,int size);
+
+/**
+ * @brief
+ * This function calibrates the ADC (analog to digital converter) of the Vdaa device(s).
+ *
+ * @param[in] pVdaa - which channel to calibrate or starting channel if size>1
+ * @param[in] size - the number of channels to calibrate.
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int Vdaa_ADCCal (vdaaChanType_ptr pVdaa, int32 size);
+
+/**
+ * @brief
+ * This function controls the Voice DAA digital hybrid.
+ *
+ * @param[in] pVdaa - which channel to set/unset
+ * @param[in] enable - TRUE: enable digital hybrid, FALSE: disable digital hybrid
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ *
+ */
+
+int Vdaa_SetHybridEnable(vdaaChanType_ptr pVdaa, int enable);
+
+/** @} VDAA_HW_INIT */
+/*****************************************************************************/
+
+
+/**
+ * @brief Enables watchdog timer
+ * @param[in] pVdaa - the channel to enable the watchdog
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_EnableWatchdog(vdaaChanType_ptr pVdaa);
+
+/**
+ * @brief Execute a soft reset on a given channel.
+ * @param[in] pVdaa - the channel to reset
+ * @retval int - error from @ref errorCodeType @ref RC_NONE indicates no error.
+ */
+
+int Vdaa_SoftReset(vdaaChanType_ptr pVdaa);/** @} VDAA_INIT */
+
+/** @} MISC */
+
+/** @} VDAA_API */
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_api_config.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_api_config.h
new file mode 100644
index 0000000..5c5f9eb
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_api_config.h
@@ -0,0 +1,48 @@
+/*
+** Copyright © 2008-2010 by Silicon Laboratories
+**
+** $Id: vdaa_api_config.h 4882 2015-04-17 23:13:52Z nizajerk $
+**
+** vdaa_api_config.h
+** VoiceDAA header config file
+**
+** Author(s):
+** naqamar, laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This file is used
+** in the VoiceDAA demonstration code.
+**
+**
+*/
+
+#ifndef VDAA_API_CFG_H
+#define VDAA_API_CFG_H
+
+/* #define DISABLE_MALLOC */
+/* #define DISABLE_VDAA_RING_DETECT_SETUP */
+/* #define DISABLE_VDAA_AUDIO_GAIN_SETUP */
+/* #define DISABLE_VDAA_PCM_SETUP */
+/* #define DISABLE_VDAA_COUNTRY_SETUP */
+/* #define DISABLE_VDAA_HYBRID_SETUP */
+#define DISABLE_VDAA_LOOPBACK_SETUP
+#define DISABLE_VDAA_IMPEDANCE_SETUP
+
+#ifndef ENABLE_DEBUG
+#define ENABLE_DEBUG
+#endif
+#if 0
+#include "stdio.h"
+#define LOGPRINT printf
+#else
+#define LOGPRINT printk
+#endif
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_constants.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_constants.h
new file mode 100644
index 0000000..2c4a8f9
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_constants.h
@@ -0,0 +1,57 @@
+/*
+** Copyright (c) 2016 Silicon Laboratories, Inc.
+** 2016-01-14 23:55:02
+**
+** Si3217x ProSLIC API Configuration Tool Version 4.0.3
+** Last Updated in API Release: 8.0.0
+** Auto generated file from configuration tool
+*/
+
+
+#ifndef VDAA_CONSTANTS_H
+#define VDAA_CONSTANTS_H
+
+/** Vdaa_Country Presets */
+enum {
+ COU_USA,
+ COU_GERMANY,
+ COU_CHINA,
+ COU_AUSTRALIA,
+ VDAA_COUNTRY_LAST_ENUM
+};
+
+/** Vdaa_Audio_Gain Presets */
+enum {
+ AUDIO_GAIN_0DB,
+ AUDIO_ATTEN_4DB,
+ AUDIO_ATTEN_6DB,
+ AUDIO_ATTEN_11DB,
+ VDAA_AUDIO_GAIN_LAST_ENUM
+};
+
+/** Vdaa_Ring_Validation Presets */
+enum {
+ RING_DET_NOVAL_LOWV,
+ RING_DET_VAL_HIGHV,
+ VDAA_RING_VALIDATION_LAST_ENUM
+};
+
+/** Vdaa_PCM Presets */
+enum {
+ VDAA_PCM_8ULAW,
+ VDAA_PCM_8ALAW,
+ VDAA_PCM_16LIN,
+ VDAA_PCM_LAST_ENUM
+};
+
+/** Vdaa_Hybrid Presets */
+enum {
+ HYB_600_0_0_500FT_24AWG,
+ HYB_270_750_150_500FT_24AWG,
+ HYB_200_680_100_500FT_24AWG,
+ HYB_220_820_120_500FT_24AWG,
+ VDAA_HYBRID_LAST_ENUM
+};
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_registers.h b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_registers.h
new file mode 100644
index 0000000..8bfc7cc
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/include/vdaa_registers.h
@@ -0,0 +1,87 @@
+/*
+** Copyright (c) 2008-2016 by Silicon Laboratories
+**
+** $Id: vdaa_registers.h 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef SI3050REGS_H
+#define SI3050REGS_H
+
+
+enum REGISTERS
+{
+ CTRL1 = 1, /* Control */
+ CTRL2 = 2, /* Control */
+ INTE_MSK = 3, /* Interrupt Mask */
+ INTE_SRC = 4, /* Interrupt Source */
+ DAA_CTRL1 = 5, /* DAA Control 1 */
+ DAA_CTRL2 = 6, /* DAA Control 2 */
+ SMPL_CTRL = 7, /* Sample Rate Control */
+ RESVD8 = 8, /* Reserved */
+ RESVD9 = 9, /* Reserved */
+ DAA_CTRL3 = 10, /* DAA Control 3 */
+ SYS_LINE_DEV_REV = 11, /* System- and Line-Side Device Revision */
+ LSIDE_STAT = 12, /* Line-Side Device Status */
+ LSIDE_REV = 13, /* Line-Side Device Revision */
+ DAA_CTRL4 = 14, /* DAA Control 4 RPOL */
+ TXRX_GN_CTRL = 15, /* TX/RX Gain Control 1 */
+ INTL_CTRL1 = 16, /* International Control 1 */
+ INTL_CTRL2 = 17, /* International Control 2 */
+ INTL_CTRL3 = 18, /* International Control 3 */
+ INTL_CTRL4 = 19, /* International Control 4 */
+ RXCALL_PROG_ATTEN = 20, /* Call Progress RX Attenuation */
+ TXCALL_PROG_ATTEN = 21, /* Call Progress TX Attenuation */
+ RNG_VLD_CTRL1 = 22, /* Ring Validation Control 1 */
+ RNG_VLD_CTRL2 = 23, /* Ring Validation Control 2 */
+ RNG_VLD_CTRL3 = 24, /* ing Validation Control 3 */
+ RES_CALIB = 25, /* Resistor Calibration */
+ DC_TERM_CTRL = 26, /* DC Termination Control */
+ RESVD27 = 27, /* Reserved */
+ LP_CRNT_STAT = 28, /* Loop Current Status */
+ LINE_VOLT_STAT = 29, /* Line Voltage Status */
+ AC_TERM_CTRL = 30, /* AC Termination Control */
+ DAA_CTRL5 = 31, /* DAA Control 5 */
+ GND_STRT_CTRL = 32, /* Ground Start Control */
+ PCM_SPI_CTRL = 33, /* PCM/SPI Mode Select */
+ PCMTX_CNT_LO = 34, /* PCM Transmit Start Count - Low Byte */
+ PCMTX_CNT_HI = 35, /* PCM Transmit Start Count - High Byte */
+ PCMRX_CNT_LO = 36, /* PCM Receive Start Count - Low Byte */
+ PCMRX_CNT_HI = 37, /* PCM Receive Start Count - High Byte */
+ TX_GN_CTRL2 = 38, /* TX Gain Control 2 */
+ RX_GN_CTRL2 = 39, /* RX Gain Control 2 */
+ TX_GN_CTRL3 = 40, /* TX Gain Control 3 */
+ RX_GN_CTRL3 = 41, /* RX Gain Control 3 */
+ GCI_CTRL = 42, /* GCI Control */
+ LN_VI_THRESH_INTE = 43, /* Line Current/Voltage Threshold Interrupt */
+ LN_VI_THRESH_INTE_CTRL=44, /* Line Current/Voltage Threshold Interrupt Control */
+ HYB1 = 45, /* Programmable Hybrid Register 1 */
+ HYB2 = 46, /* Programmable Hybrid Register 2 */
+ HYB3 = 47, /* Programmable Hybrid Register 3 */
+ HYB4 = 48, /* Programmable Hybrid Register 4 */
+ HYB5 = 49, /* Programmable Hybrid Register 5 */
+ HYB6 = 50, /* Programmable Hybrid Register 6 */
+ HYB7 = 51, /* Programmable Hybrid Register 7 */
+ HYB8 = 52, /* Programmable Hybrid Register 8 */
+ RESVD53 = 53, /* Reserved 53 */
+ RESVD54 = 54, /* Reserved 54 */
+ RESVD55 = 55, /* Reserved 55 */
+ RESVD56 = 56, /* Reserved 56 */
+ RESVD57 = 57, /* Reserved 57 */
+ RESVD58 = 58, /* Reserved 58 */
+ SPRK_QNCH_CTRL = 59 /* Spark Quenching Control */
+
+};
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/proslic.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/proslic.c
new file mode 100644
index 0000000..3f316cc
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/proslic.c
@@ -0,0 +1,3916 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: proslic.c 5454 2016-01-15 01:53:48Z nizajerk $
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the generic interface file for the ProSLIC drivers.
+**
+** Customers should be calling this level for ProSLIC specific
+** functions (vs. chipset specific versions of the code)
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#include "proslic_api_config.h"
+
+#ifdef ENABLE_DEBUG
+#define LOGPRINT_PREFIX "ProSLIC:"
+#endif
+
+#ifdef SI3217X
+#include "si3217x.h"
+#include "si3217x_intf.h"
+#ifndef DISABLE_FSK_SETUP
+extern ProSLIC_FSK_Cfg Si3217x_FSK_Presets[];
+#endif
+#ifndef DISABLE_TONE_SETUP
+extern ProSLIC_Tone_Cfg Si3217x_Tone_Presets[];
+#endif
+
+#endif
+#ifdef SI3218X
+#include "si3218x.h"
+#include "si3218x_intf.h"
+#ifndef DISABLE_FSK_SETUP
+extern ProSLIC_FSK_Cfg Si3218x_FSK_Presets[];
+#endif
+#ifndef DISABLE_TONE_SETUP
+extern ProSLIC_Tone_Cfg Si3218x_Tone_Presets[];
+#endif
+
+#endif
+#ifdef SI3226X
+#include "si3226x.h"
+#include "si3226x_intf.h"
+extern Si3226x_General_Cfg Si3226x_General_Configuration;
+#ifndef DISABLE_FSK_SETUP
+extern ProSLIC_FSK_Cfg Si3226x_FSK_Presets[];
+#endif
+#ifndef DISABLE_TONE_SETUP
+extern ProSLIC_Tone_Cfg Si3226x_Tone_Presets[];
+#endif
+
+#endif
+#ifdef SI3228X
+#include "si3228x.h"
+#include "si3228x_intf.h"
+extern Si3228x_General_Cfg Si3228x_General_Configuration;
+#ifndef DISABLE_FSK_SETUP
+extern ProSLIC_FSK_Cfg Si3228x_FSK_Presets[];
+#endif
+#ifndef DISABLE_TONE_SETUP
+extern ProSLIC_Tone_Cfg Si3228x_Tone_Presets[];
+#endif
+
+#endif
+
+#define pCtrl(X) (X)->deviceId->ctrlInterface
+#define pProHW(X) pCtrl((X))->hCtrl
+#define WriteRAM(PCHAN, CHANNEL, RAMADDR, RAMDATA) (PCHAN)->deviceId->ctrlInterface->WriteRAM_fptr(pProHW(PCHAN), (CHANNEL), (RAMADDR), (RAMDATA))
+#define ReadRAM(PCHAN, CHANNEL, RAMADDR) (PCHAN)->deviceId->ctrlInterface->ReadRAM_fptr(pProHW(PCHAN), (CHANNEL), (RAMADDR))
+#define SetSemaphore(X) (X)->deviceId->ctrlInterface->Semaphore_fptr
+#define ReadReg(PCHAN, CHANNEL, REGADDR) (PCHAN)->deviceId->ctrlInterface->ReadRegister_fptr(pProHW(PCHAN), (CHANNEL), (REGADDR))
+#define WriteReg(PCHAN, CHANNEL, REGADDR, REGDATA) (PCHAN)->deviceId->ctrlInterface->WriteRegister_fptr(pProHW(PCHAN), (CHANNEL), (REGADDR), (REGDATA))
+
+/*
+** Timers
+*/
+#define TimeElapsed pProslic->deviceId->ctrlInterface->timeElapsed_fptr
+#define getTime pProslic->deviceId->ctrlInterface->getTime_fptr
+#define pProTimer pProslic->deviceId->ctrlInterface->hTimer
+#define Delay pProslic->deviceId->ctrlInterface->Delay_fptr
+#define pProTimerX(X) ((X)->deviceId->ctrlInterface->hTimer)
+#define DelayX(X,Y) ((X)->deviceId->ctrlInterface->Delay_fptr(pProTimerX(X),Y))
+
+
+#define PROSLIC_TIMEOUT_DCDC_DOWN 200 /* Number of 10 mSec ticks */
+
+/*****************************************************************************************************/
+int32 ProSLIC_ReadMADCScaled(proslicChanType_ptr hProslic,uInt16 addr,
+ int32 scale)
+{
+ TRACEPRINT(hProslic,"addr: %u scale: %ld\n", addr, scale);
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_ReadMADCScaled(hProslic,addr,scale);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_ReadMADCScaled(hProslic,addr,scale);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_ReadMADCScaled(hProslic,addr,scale);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_ReadMADCScaled(hProslic,addr,scale);
+ }
+#endif
+ return -1;
+}
+
+/*****************************************************************************************************/
+ramData ProSLIC_ReadRAM(proslicChanType_ptr hProslic,uInt16 addr)
+{
+ TRACEPRINT(hProslic, "addr: %u\n", addr);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ return (ReadRAM(hProslic, hProslic->channel, addr));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_WriteRAM(proslicChanType_ptr hProslic,uInt16 addr, ramData data)
+{
+ TRACEPRINT(hProslic, "addr: %u data: 0x%04X\n", addr, data);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ return (WriteRAM(hProslic, hProslic->channel, addr,data));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PrintDebugData(proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+#ifdef ENABLE_DEBUG
+ ProSLIC_PrintDebugReg(hProslic);
+ return ProSLIC_PrintDebugRAM(hProslic);
+#else
+ return RC_NONE;
+#endif
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PrintDebugReg(proslicChanType_ptr hProslic)
+{
+#ifdef ENABLE_DEBUG
+ uInt8 regAddr;
+ TRACEPRINT(hProslic, "\n", NULL);
+
+ /*
+ NOTE: Not all ProSLICs have defined values after location 99
+ (and have 1 location after that), but for simplicity, we print them anyway...
+ */
+ for(regAddr = 0; regAddr < 127; regAddr++)
+ {
+ LOGPRINT("%sRegister %003u = 0x%02X\n", LOGPRINT_PREFIX, regAddr,
+ ReadReg(hProslic, hProslic->channel, regAddr));
+ }
+#endif
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+/* NOTE: locations above 1024 are protected, the API disables protection during initialization, but if this
+ function is called prior to initialization, then UAM is not set and will impact the ReadRAM call...
+ Upper limit is based upon chipset type...
+*/
+int ProSLIC_PrintDebugRAM(proslicChanType_ptr hProslic)
+{
+#ifdef ENABLE_DEBUG
+ uInt16 ramAddr;
+ uInt16 maxAddr= 0;
+ TRACEPRINT(hProslic, "\n",NULL);
+
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ maxAddr = 1596;
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ maxAddr = 1644;
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ maxAddr = 1646;
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ maxAddr = 1646;
+ }
+#endif
+
+ for(ramAddr = 0; ramAddr < maxAddr; ramAddr++)
+ {
+ LOGPRINT("%sRAM %04u = 0x%08X\n", LOGPRINT_PREFIX, ramAddr,
+ (unsigned int)(ReadRAM(hProslic, hProslic->channel, ramAddr)));
+ }
+
+#endif /* ENABLE_DEBUG */
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+/*
+** Function: isVerifiedProslic
+**
+** Description:
+** Determine if DAA or ProSLIC present
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+**
+** Return:
+** channelType
+*/
+int ProSLIC_identifyChannelType(proslicChanType *pProslic)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "\n",NULL);
+ /*
+ ** Register 13 (DAA) always has bits 0:1 set to 0 and bit 6 set to 1
+ ** Register 13 (PROSLIC) can have bits 0:1, and 4 set, while all others are undefined
+ ** Write 0x13 to Reg 13. The following return values are expected -
+ **
+ ** 0x00 or 0xFF : No device present
+ ** 0x4X : DAA
+ ** 0x13 : PROSLIC
+ */
+
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_PCMTXHI,0x13);
+ Delay(pProTimer,5);
+
+ /* Now check if the value took */
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_PCMTXHI);
+
+ if( data == 0x13)
+ {
+ return PROSLIC;
+ }
+ else if (data == 0x40)
+ {
+ return DAA;
+ }
+ else
+ {
+ return UNKNOWN;
+ }
+}
+
+/*****************************************************************************************************/
+int ProSLIC_VerifyControlInterface(proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n",NULL);
+ if (ProSLIC_identifyChannelType(hProslic) != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /* Note: ProSLIC_identifyChannelType() did a register w/r test earlier */
+
+ /* Verify RAM rd/wr with innocuous RAM location */
+ WriteRAM(hProslic,hProslic->channel,PROSLIC_RAM_VERIFY_IO,0x12345678L);
+ if (ReadRAM(hProslic,hProslic->channel, PROSLIC_RAM_VERIFY_IO) != 0x12345678L)
+ {
+ hProslic->error = RC_SPI_FAIL;
+ DEBUG_PRINT(hProslic, "%sProslic %d RAM not communicating. RAM access fail.\n",
+ LOGPRINT_PREFIX, hProslic->channel);
+ return RC_SPI_FAIL;
+ }
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_VerifyMasterStat(proslicChanType_ptr pProslic)
+{
+ uInt8 regData;
+
+ TRACEPRINT(pProslic, "\n", NULL);
+ WriteReg(pProslic,pProslic->channel, PROSLIC_REG_MSTRSTAT,
+ 0xFF); /* Clear Master status */
+ regData = ReadReg(pProslic, pProslic->channel, PROSLIC_REG_MSTRSTAT);
+
+ if( regData != 0x1F )
+ {
+ return RC_SPI_FAIL;
+ }
+ else
+ {
+ return RC_NONE;
+ }
+}
+
+/*****************************************************************************************************/
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+int ProSLIC_Init_MultiBOM (proslicChanType_ptr *hProslic,int size, int preset)
+{
+ TRACEPRINT(hProslic, "size: %d preset: %d\n", size, preset);
+ printk("ProSLIC_Init_MultiBOM preset:%d,%d\n",preset,(*hProslic)->deviceId->chipType);
+
+#ifdef SI3217X
+ if ((*hProslic)->deviceId->chipType >= SI32171
+ && (*hProslic)->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_Init_MultiBOM(hProslic,size,preset);
+ }
+#endif
+#ifdef SI3218X
+ if ((*hProslic)->deviceId->chipType >= SI32180
+ && (*hProslic)->deviceId->chipType <= SI32189)
+ {
+
+ return Si3218x_Init_MultiBOM(hProslic,size,preset);
+ }
+#endif
+#ifdef SI3226X
+ if ((*hProslic)->deviceId->chipType >= SI32260
+ && (*hProslic)->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_Init_MultiBOM(hProslic,size,preset);
+ }
+#endif
+#ifdef SI3228X
+ if ((*hProslic)->deviceId->chipType >= SI32280
+ && (*hProslic)->deviceId->chipType <= SI32289)
+ {
+
+ return Si3228x_Init_MultiBOM(hProslic,size,preset);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+/*****************************************************************************************************/
+int ProSLIC_Init (proslicChanType_ptr *hProslic,int size)
+{
+ TRACEPRINT(*hProslic, "size: %d\n", size);
+ return ProSLIC_Init_with_Options(hProslic, size, INIT_NO_OPT);
+}
+
+/*****************************************************************************************************/
+int ProSLIC_Reinit (proslicChanType_ptr *hProslic,int size)
+{
+ TRACEPRINT(*hProslic, "size: %d\n", size);
+ return ProSLIC_Init_with_Options(hProslic, size, INIT_REINIT);
+}
+
+/*****************************************************************************************************/
+int ProSLIC_Init_with_Options (proslicChanType_ptr *hProslic,int size,
+ int option)
+{
+ TRACEPRINT(*hProslic, "size: %d option: %d\n", size, option);
+#ifdef SI3226X
+ if ((*hProslic)->deviceId->chipType >= SI32260
+ && (*hProslic)->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_Init_with_Options(hProslic,size, option);
+ }
+#endif
+#ifdef SI3228X
+ if ((*hProslic)->deviceId->chipType >= SI32280
+ && (*hProslic)->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_Init_with_Options(hProslic,size, option);
+ }
+#endif
+#ifdef SI3217X
+ if ((*hProslic)->deviceId->chipType >= SI32171
+ && (*hProslic)->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_Init_with_Options(hProslic,size, option);
+ }
+#endif
+#ifdef SI3218X
+ if ((*hProslic)->deviceId->chipType >= SI32180
+ && (*hProslic)->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_Init_with_Options(hProslic,size, option);
+ }
+#endif
+ return RC_IGNORE;
+}
+
+/*****************************************************************************************************/
+#if defined(SI3217X) || defined(SI3218X) || defined SI3226X || defined SI3228X
+/* Check patch data - returns TRUE if no error.*/
+static BOOLEAN ProSLIC_VerifyPatchData(proslicChanType *pProslic,
+ const ramData *data, uInt16 maxCount )
+{
+ int loop;
+ ramData read_data;
+ TRACEPRINT(pProslic, "dataptr: %p, count: %d\n", data, maxCount);
+
+ for(loop = 0; loop < maxCount; loop++)
+ {
+ if(*data)
+ {
+ read_data = ReadRAM(pProslic, pProslic->channel, PROSLIC_RAM_PRAM_DATA);
+ if( ((*data) << 9) != read_data)
+ {
+ return FALSE;
+ }
+ }
+ else
+ {
+ break;
+ }
+ data++;
+ }
+ return TRUE;
+}
+
+/* Check if the jump table is written correctly.. */
+static BOOLEAN ProSLIC_VerifyPatchJMPLow(proslicChanType *pProslic,
+ const uInt16 *data)
+{
+ uInt8 address = PATCH_JMPTBL_START_ADDR;
+ int regData;
+
+ TRACEPRINT(pProslic, "dataptr: %p\n", data);
+ for(address = PATCH_JMPTBL_START_ADDR;
+ address < (PATCH_JMPTBL_START_ADDR+(2*PATCH_NUM_LOW_ENTRIES)); address++)
+ {
+ if(*data)
+ {
+ regData = ReadReg(pProslic, pProslic->channel, address);
+ if(regData != ((*data) & 0xFF))
+ {
+ return FALSE;
+ }
+
+ address++;
+
+ regData = ReadReg(pProslic, pProslic->channel, address);
+ if(regData != (((*data)>>8) & 0xFF))
+ {
+ return FALSE;
+ }
+
+ data++;
+ }
+ else
+ {
+ break;
+ }
+ }
+ return TRUE;
+}
+
+#if defined SI3226X || defined SI3228X || defined SI3218X
+/* For chipsets supporting more than 8 jump entries, verify them */
+static BOOLEAN ProSLIC_VerifyPatchJMPHigh(proslicChanType *pProslic,
+ const uInt16 *data)
+{
+ uInt16 address = PATCH_JMPTBL_HIGH_ADDR;
+ ramData read_data;
+
+ TRACEPRINT(pProslic, "dataptr: %p\n", data);
+ for(address = PATCH_JMPTBL_HIGH_ADDR;
+ address < (PATCH_JMPTBL_HIGH_ADDR+PATCH_NUM_HIGH_ENTRIES); address++)
+ {
+ read_data = (ReadRAM(pProslic, pProslic->channel, address) & 0x1FFFL);
+ if(*data != read_data)
+ {
+ return FALSE;
+
+ }
+ data++;
+ }
+ return TRUE;
+}
+#endif /* SI3226X, SI3228X, SI3218X */
+
+/* Load the first 8 jump table entries */
+static void ProSLIC_LoadPatchJMPLow(proslicChanType *pProslic, uInt8 channel,
+ const uInt16 *data)
+{
+ uInt8 address;
+ TRACEPRINT(pProslic, "chan: %d dataptr: %p\n", channel, data);
+ for(address = PATCH_JMPTBL_START_ADDR;
+ address < (PATCH_JMPTBL_START_ADDR+(2*PATCH_NUM_LOW_ENTRIES)); address++)
+ {
+ WriteReg(pProslic, channel, address,((*data) & 0xFF));
+ address++;
+ WriteReg(pProslic, channel, address,(((*data)>>8) & 0xFF));
+ data++;
+ }
+}
+
+/* Load Patch data */
+static void ProSLIC_LoadPatchData(proslicChanType *pProslic, uInt8 channel,
+ const ramData *data)
+{
+ int loop;
+
+ TRACEPRINT(pProslic, "chan: %d dataptr: %p\n", channel, data);
+ WriteRAM(pProslic, channel, PROSLIC_RAM_PRAM_ADDR, 0);
+
+ for(loop = 0; loop < PATCH_MAX_SIZE; loop++)
+ {
+ if(*data)
+ {
+ /* Can we take advantage of auto increment, if not, set the address */
+ if( (pProslic->deviceId->chipRev < 3)
+ && (channel == PROSLIC_CHAN_BROADCAST))
+ {
+ WriteRAM(pProslic, channel, PROSLIC_RAM_PRAM_ADDR, loop << 19);
+ }
+
+ WriteRAM(pProslic, channel, PROSLIC_RAM_PRAM_DATA, (*data) << 9);
+ }
+ else
+ {
+ return;
+ }
+ data++;
+ }
+}
+
+/* Load Support RAM - basically RAM address/data pairs to be written as part of the Patch process */
+static void ProSLIC_LoadSupportRAM(proslicChanType *pProslic, uInt8 channel,
+ const uInt16 *address, const ramData *data)
+{
+ TRACEPRINT(pProslic, "chan: %d addressptr: %p dataptr: %p\n", channel, address,
+ data);
+ while( *address )
+ {
+ WriteRAM(pProslic, channel, *address, *data);
+ address++;
+ data++;
+ }
+}
+
+#if defined SI3226X || defined SI3228X || defined SI3218X
+/* Load Jump table high for chipsets supporting more than 8 jump entries */
+static void ProSLIC_LoadJMPHigh(proslicChanType *pProslic, uInt8 channel,
+ const uInt16 *data)
+{
+ uInt16 loop;
+ TRACEPRINT(pProslic, "chan: %d dataptr: %p\n", channel, data);
+ for(loop = PATCH_JMPTBL_HIGH_ADDR;
+ loop < (PATCH_JMPTBL_HIGH_ADDR+PATCH_NUM_HIGH_ENTRIES); loop++)
+ {
+ WriteRAM(pProslic, channel, loop, ((*data) & 0x1FFFL) );
+ data++;
+ }
+}
+#endif /* SI3226X, SI3228X, SI3218X */
+
+/* Code assumes ProSLIC_LoadPatch has verified chip type */
+BOOLEAN ProSLIC_LoadPatch_extended(proslicChanType *pProslic,
+ const proslicPatch *pPatch, BOOLEAN is_broadcast)
+{
+ uInt8 channel;
+ const uInt16 jmp_disable[PATCH_NUM_LOW_ENTRIES] = {0,0,0,0,0,0,0,0};
+#if defined SI3226X || defined SI3228X || defined SI3218X
+ BOOLEAN hasJmpTableHigh = FALSE;
+ const uInt16 jmphigh_disable[PATCH_NUM_HIGH_ENTRIES] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL};
+#endif
+ TRACEPRINT(pProslic, "patchptr: %p bcast: %d\n", pPatch, is_broadcast);
+
+ if(pPatch == NULL)
+ {
+ return RC_NONE;
+ }
+
+ if(is_broadcast == TRUE)
+ {
+ channel = PROSLIC_CHAN_BROADCAST;
+ }
+ else
+ {
+ channel = pProslic->channel;
+ }
+
+ DEBUG_PRINT(pProslic, "%sloading patch: %08lx\n", LOGPRINT_PREFIX,
+ pPatch->patchSerial);
+
+ ProSLIC_SetUserMode(pProslic,TRUE, is_broadcast);
+
+ /* Disable Patch */
+ WriteReg(pProslic, channel, PROSLIC_REG_JMPEN, 0);
+ ProSLIC_LoadPatchJMPLow(pProslic, channel, jmp_disable);
+
+#if defined SI3226X || defined SI3228X || defined SI3218X
+ if( 0
+#ifdef SI3226X
+ || (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+#endif
+#ifdef SI3228X
+ || (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+#endif
+#ifdef SI3218X
+ || (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+#endif
+ )
+ {
+ hasJmpTableHigh = TRUE;
+ ProSLIC_LoadJMPHigh(pProslic, channel, jmphigh_disable);
+ }
+#endif
+
+ ProSLIC_LoadPatchData(pProslic, channel, pPatch->patchData);
+
+ /* Make sure last RAM write completed */
+ Delay(pProTimer, 1);
+
+ WriteReg(pProslic, channel, PROSLIC_REG_RAM_ADDR_HI, 0);
+
+ ProSLIC_LoadPatchJMPLow(pProslic, channel, pPatch->patchEntries);
+
+#if defined SI3226X || defined SI3228X || defined SI3218X
+ if(hasJmpTableHigh == TRUE)
+ {
+ ProSLIC_LoadJMPHigh(pProslic, channel,
+ &(pPatch->patchEntries[PATCH_NUM_LOW_ENTRIES]));
+ }
+#endif
+ WriteRAM(pProslic, channel, PROSLIC_RAM_PATCHID,
+ pPatch->patchSerial); /* write the patch ID */
+ ProSLIC_LoadSupportRAM(pProslic, channel, pPatch->psRamAddr, pPatch->psRamData);
+#ifdef DISABLE_VERIFY_PATCH
+ WriteReg(pProslic, channel, PROSLIC_REG_JMPEN, 1);
+#endif
+ return RC_NONE;
+
+}
+
+#endif /* patch helper functions */
+
+
+int ProSLIC_LoadPatch (proslicChanType_ptr pProslic,const proslicPatch *pPatch)
+{
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ return ProSLIC_LoadPatch_extended(pProslic, pPatch, FALSE);
+}
+
+/*****************************************************************************************************/
+int ProSLIC_VerifyPatch (proslicChanType_ptr hProslic,proslicPatch *pPatch)
+{
+ TRACEPRINT(hProslic, "patchptr: %p\n", pPatch);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ if(pPatch == NULL)
+ {
+ return RC_NONE;
+ }
+
+ WriteReg(hProslic, hProslic->channel, PROSLIC_REG_JMPEN, 0);
+ WriteRAM(hProslic, hProslic->channel, PROSLIC_RAM_PRAM_ADDR, 0);
+
+ if(ProSLIC_VerifyPatchData(hProslic, pPatch->patchData,
+ PATCH_MAX_SIZE) == FALSE)
+ {
+ DEBUG_PRINT(hProslic, "%sPatch data corrupted: channel %d\n",LOGPRINT_PREFIX,
+ hProslic->channel);
+ WriteRAM(hProslic, hProslic->channel, PROSLIC_RAM_PATCHID,
+ 0UL); /* Mark patch as invalid */
+ return RC_PATCH_RAM_VERIFY_FAIL;
+ }
+
+ /*zero out RAM_ADDR_HI*/
+ WriteReg (hProslic, hProslic->channel, PROSLIC_REG_RAM_ADDR_HI,0);
+
+ if( ProSLIC_VerifyPatchJMPLow(hProslic, pPatch->patchEntries) == FALSE)
+ {
+ DEBUG_PRINT(hProslic,"%sPatch jumptable corrupted: channel %d\n",
+ LOGPRINT_PREFIX,hProslic->channel);
+ WriteRAM(hProslic, hProslic->channel, PROSLIC_RAM_PATCHID,
+ 0UL); /* Mark patch as invalid */
+ return RC_PATCH_RAM_VERIFY_FAIL;
+ }
+
+#if defined SI3226X || defined SI3228X || defined SI3218X
+ if( 0
+#ifdef SI3226X
+ || (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+#endif
+#ifdef SI3228X
+ || (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+#endif
+#ifdef SI3218X
+ || (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+#endif
+ )
+
+ {
+ if( ProSLIC_VerifyPatchJMPHigh(hProslic,
+ &(pPatch->patchEntries[PATCH_NUM_HIGH_ENTRIES])) == FALSE)
+ {
+ DEBUG_PRINT(hProslic,"%sPatch jumptable high corrupted: channel %d\n",
+ LOGPRINT_PREFIX,hProslic->channel);
+ WriteRAM(hProslic, hProslic->channel, PROSLIC_RAM_PATCHID,
+ 0UL); /* Mark patch as invalid */
+ return RC_PATCH_ENTRY_VERIFY_FAIL;
+ }
+ }
+
+#endif
+
+ WriteReg (hProslic, hProslic->channel, PROSLIC_REG_JMPEN,
+ 1); /*enable the patch*/
+
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_SetMuteStatus (proslicChanType_ptr pProslic,
+ ProslicMuteModes muteEn)
+{
+
+ uInt8 regTemp;
+ uInt8 newRegValue;
+ TRACEPRINT(pProslic, "muteEn: %d\n", muteEn);
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ regTemp = ReadReg (pProslic,pProslic->channel,PROSLIC_REG_DIGCON);
+
+ WriteReg (pProslic,pProslic->channel,PROSLIC_REG_DIGCON,regTemp&~(0x3));
+ newRegValue = regTemp &~(0x3);
+
+ if (muteEn & PROSLIC_MUTE_RX)
+ {
+ newRegValue |= 1;
+ }
+
+ if (muteEn & PROSLIC_MUTE_TX)
+ {
+ newRegValue |= 2;
+ }
+
+ if(newRegValue != regTemp)
+ {
+ return WriteReg (pProslic,pProslic->channel,PROSLIC_REG_DIGCON,newRegValue);
+ }
+
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_SetLoopbackMode (proslicChanType_ptr pProslic,
+ ProslicLoopbackModes newMode)
+{
+ uInt8 regTemp, newValue;
+ TRACEPRINT(pProslic, "mode: %d\n", newMode);
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ newValue = regTemp = ReadReg (pProslic,pProslic->channel,PROSLIC_REG_LOOPBACK);
+
+ switch (newMode)
+ {
+ case PROSLIC_LOOPBACK_NONE:
+ newValue &= ~(0x11);
+ break;
+
+ case PROSLIC_LOOPBACK_DIG:
+ newValue |= 1;
+ break;
+
+ case PROSLIC_LOOPBACK_ANA:
+ newValue |= 0x10;
+ break;
+ }
+
+ if(newValue != regTemp)
+ {
+ return WriteReg (pProslic,pProslic->channel,PROSLIC_REG_LOOPBACK, newValue);
+ }
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_EnableInterrupts (proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_EnableInterrupts(hProslic);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_EnableInterrupts(hProslic);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_EnableInterrupts(hProslic);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_EnableInterrupts(hProslic);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+
+/*****************************************************************************************************/
+int ProSLIC_DisableInterrupts (proslicChanType_ptr hProslic)
+{
+#ifdef GCI_MODE
+ uInt8 data;
+#endif
+ uInt8 i;
+ TRACEPRINT(hProslic, "\n", NULL);
+
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ for(i = PROSLIC_REG_IRQEN1; i < PROSLIC_REG_IRQEN4; i++)
+ {
+ /* Disable the interupts */
+ WriteReg(hProslic, hProslic->channel, i, 0);
+ }
+
+ /* Clear the pending interrupts */
+ for(i = PROSLIC_REG_IRQ1; i < PROSLIC_REG_IRQ4; i++)
+ {
+#ifdef GCI_MODE
+ data = ReadReg(hProslic, hProslic->channel, i);
+ WriteReg( hProslic, hProslic->channel, i, data);
+#else
+ (void)ReadReg(hProslic, hProslic->channel, i);
+#endif
+ }
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_RingSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset: %d\n", preset);
+#ifndef DISABLE_RING_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_RingSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_RingSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_RingSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_RingSetup(hProslic,preset);
+ }
+#endif
+#endif /*DISABLE_RING_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_ToneGenSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset: %d\n", preset);
+#ifndef DISABLE_TONE_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return ProSLIC_ToneGenSetupPtr(hProslic,&(Si3217x_Tone_Presets[preset]));
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return ProSLIC_ToneGenSetupPtr(hProslic, &(Si3218x_Tone_Presets[preset]));
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return ProSLIC_ToneGenSetupPtr(hProslic, &(Si3226x_Tone_Presets[preset]));
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return ProSLIC_ToneGenSetupPtr(hProslic, &(Si3228x_Tone_Presets[preset]));
+ }
+#endif
+#endif /*DISABLE_TONE_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_FSKSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset: %d\n", preset);
+#ifndef DISABLE_FSK_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return ProSLIC_FSKSetupPtr(hProslic, &Si3217x_FSK_Presets[preset]);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return ProSLIC_FSKSetupPtr(hProslic, &Si3218x_FSK_Presets[preset]);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return ProSLIC_FSKSetupPtr(hProslic, &Si3226x_FSK_Presets[preset]);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return ProSLIC_FSKSetupPtr(hProslic,&Si3228x_FSK_Presets[preset]);
+ }
+#endif
+#endif /*DISABLE_FSK_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_ZsynthSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset: %d\n", preset);
+#ifndef DISABLE_ZSYNTH_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_ZsynthSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_ZsynthSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_ZsynthSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_ZsynthSetup(hProslic,preset);
+ }
+#endif
+#endif /*DISABLE_ZSYNTH_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_GciCISetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset: %d\n", preset);
+#ifndef DISABLE_CI_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_GciCISetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_GciCISetup(hProslic,preset);
+ }
+#endif
+#endif /*DISABLE_CI_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_TXAudioGainSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset: %d\n", preset);
+#ifndef DISABLE_AUDIOGAIN_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_TXAudioGainSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_TXAudioGainSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_TXAudioGainSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_TXAudioGainSetup(hProslic,preset);
+ }
+#endif
+#endif /*DISABLE_AUDIOGAIN_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_RXAudioGainSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset: %d\n", preset);
+#ifndef DISABLE_AUDIOGAIN_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_RXAudioGainSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_RXAudioGainSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_RXAudioGainSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_RXAudioGainSetup(hProslic,preset);
+ }
+#endif
+#endif /*DISABLE_AUDIOGAIN_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_TXAudioGainScale (proslicChanType_ptr hProslic,int preset,
+ uInt32 pga_scale, uInt32 eq_scale)
+{
+ TRACEPRINT(hProslic, "preset: %d pga_scale: %u eq_scale: %u\n", preset,
+ pga_scale, eq_scale);
+#ifndef DISABLE_AUDIOGAIN_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_TXAudioGainScale(hProslic,preset,pga_scale,eq_scale);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_TXAudioGainScale(hProslic,preset,pga_scale,eq_scale);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_TXAudioGainScale(hProslic,preset,pga_scale,eq_scale);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_TXAudioGainScale(hProslic,preset,pga_scale,eq_scale);
+ }
+#endif
+#endif /*DISABLE_AUDIOGAIN_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_RXAudioGainScale (proslicChanType_ptr hProslic,int preset,
+ uInt32 pga_scale, uInt32 eq_scale)
+{
+ TRACEPRINT(hProslic, "preset: %d pga_scale: %u eq_scale: %u\n", preset,
+ pga_scale, eq_scale);
+#ifndef DISABLE_AUDIOGAIN_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_RXAudioGainScale(hProslic,preset,pga_scale,eq_scale);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_RXAudioGainScale(hProslic,preset,pga_scale,eq_scale);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_RXAudioGainScale(hProslic,preset,pga_scale,eq_scale);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_RXAudioGainScale(hProslic,preset,pga_scale,eq_scale);
+ }
+#endif
+#endif /*DISABLE_AUDIOGAIN_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_AudioGainSetup (proslicChanType_ptr pProslic,int32 rxgain,
+ int32 txgain,int preset)
+{
+ int rc = RC_NONE; /* Assigned for the case of DISABLE_AUDIOGAIN_SETUP set */
+#ifndef DISABLE_AUDIOGAIN_SETUP
+ int atx_preset = TXACGAIN_SEL;
+ int arx_preset = RXACGAIN_SEL;
+ TRACEPRINT(pProslic, "rxgain: %d txgain: %d preset: %d\n", rxgain, txgain,
+ preset);
+
+ rc = ProSLIC_dbgSetTXGain(pProslic,txgain,preset,atx_preset);
+
+ if( rc == RC_NONE)
+ {
+ rc = ProSLIC_TXAudioGainSetup(pProslic,TXACGAIN_SEL);
+ }
+
+ if( rc == RC_NONE)
+ {
+ rc = ProSLIC_dbgSetRXGain(pProslic,rxgain,preset,arx_preset);
+ }
+
+ if( rc == RC_NONE)
+ {
+ rc = ProSLIC_RXAudioGainSetup(pProslic,RXACGAIN_SEL);
+ }
+
+#endif /*DISABLE_AUDIOGAIN_SETUP*/
+ return rc;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_DCFeedSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset: %d\n", preset);
+#ifndef DISABLE_DCFEED_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_DCFeedSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_DCFeedSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_DCFeedSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_DCFeedSetup(hProslic,preset);
+ }
+#endif
+#endif /*DISABLE_DCFEED_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_DCFeedSetupCfg (proslicChanType_ptr hProslic,
+ ProSLIC_DCfeed_Cfg *cfg, int preset)
+{
+ TRACEPRINT(hProslic, "cfgPtr = %p preset = %d\n", cfg, preset);
+#ifndef DISABLE_DCFEED_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_DCFeedSetupCfg(hProslic,cfg,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_DCFeedSetupCfg(hProslic,cfg,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_DCFeedSetupCfg(hProslic,cfg,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_DCFeedSetupCfg(hProslic,cfg,preset);
+ }
+#endif
+#endif /*DISABLE_DCFEED_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_GPIOSetup (proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+#ifndef DISABLE_GPIO_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_GPIOSetup(hProslic);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_GPIOSetup(hProslic);
+ }
+#endif
+#endif /*DISABLE_GPIO_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PulseMeterSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset = %d\n", preset);
+#ifndef DISABLE_PULSE_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_PulseMeterSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_PulseMeterSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_PulseMeterSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_PulseMeterSetup(hProslic,preset);
+ }
+#endif
+#endif /*DISABLE_PULSE_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PCMSetup (proslicChanType_ptr hProslic,int preset)
+{
+ TRACEPRINT(hProslic, "preset = %d\n", preset);
+#ifndef DISABLE_PCM_SETUP
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_PCMSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_PCMSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_PCMSetup(hProslic,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_PCMSetup(hProslic,preset);
+ }
+#endif
+#endif /*DISABLE_PCM_SETUP*/
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PCMTimeSlotSetup (proslicChanType_ptr pProslic, uInt16 rxcount,
+ uInt16 txcount)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "rx = %u tx = %u\n", rxcount, txcount);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ data = txcount & 0xff;
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_PCMTXLO,data);
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_PCMTXHI);
+ data &= 0x10; /* keep TX_EDGE bit */
+ data |= ((txcount >> 8)&0x03) ;
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_PCMTXHI,data);
+ data = rxcount & 0xff;
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_PCMRXLO,data);
+ data = rxcount >> 8 ;
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_PCMRXHI,data);
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+typedef ProslicInt proslicIntTypeMap[SI_MAX_INTERRUPTS][8];
+
+static int ProSLIC_ReadInterruptsHelper(proslicChanType_ptr pProslic,
+ uInt8 *regData, uInt8 numChannels)
+{
+ uInt8 i;
+ uInt8 intsActive;
+ uInt8 *currentData = regData;
+ SILABS_UNREFERENCED_PARAMETER(numChannels);
+
+ intsActive = ReadReg(pProslic, pProslic->channel, PROSLIC_REG_IRQ0);
+
+#ifdef PROSLIC_OPTIMIZE_INTERRUPTS
+ /* For dual channel devices, we need to shift the upper nibble for the second channel
+ if the caller requested the second channel. We determine this by channel ID being
+ even or odd. If this is NOT true - for example a Si3217x and then a Si3226x chipset
+ configuration on the same daisychain, then this optimization logic will not work */
+#if defined(SI3226X) || defined(SI3228X)
+ if( (numChannels != 0) && ((pProslic->channel) & 0x1))
+ {
+ intsActive = intsActive >> 4;
+ }
+#endif /* Multichannel devices */
+#endif
+
+ /* If there are no interrupts, stop... return back to calling function */
+ if((intsActive &0xF) == 0)
+ {
+ return RC_IGNORE;
+ }
+
+ for(i = PROSLIC_REG_IRQ1; i < PROSLIC_REG_IRQ4; i++)
+ {
+#ifdef PROSLIC_OPTIMIZE_INTERRUPTS
+ /* Read IRQn Register only if IRQ0 states there was an interrupt pending, otherwise
+ skip it. This eliminates unneeded SPI transactions.
+ */
+ if( (intsActive & (1<<(i-PROSLIC_REG_IRQ1))) == 0)
+ {
+ *currentData++ = 0;
+ continue;
+ }
+#endif
+ *currentData = (uInt8)ReadReg(pProslic, pProslic->channel, i);
+#ifdef GCI_MODDE
+ WriteReg(pProslic, pProslic->channel, i, *current_data);
+#endif
+ currentData++;
+ } /* for loop */
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*
+ Reads IRQ0 to determine if an interrupt has occurred for the particular device,
+ if so, reads the interrupt register(s) that fired the interrupt and then
+ maps the interrupt(s) to the generic interrupt value to return to the caller.
+
+ Code assumes normal chipset/compatibility testing has already been done.
+*/
+static int ProSLIC_GetInterruptHelper(proslicChanType_ptr pProslic,
+ const proslicIntTypeMap intMap, proslicIntType *pIntData, uInt8 numChannels)
+{
+ int i,j;
+ uInt8 intData[SI_MAX_INTERRUPTS];
+ uInt8 *currentData;
+ uInt8 map, intCount;
+ BOOLEAN safetyInt = FALSE;
+
+ /* Initialize interrupt count to 0 */
+ pIntData-> number = 0;
+
+ if( ProSLIC_ReadInterruptsHelper(pProslic, intData, numChannels) == RC_IGNORE)
+ {
+ /* No interrupts for the given channel. */
+ return RC_NONE;
+ }
+
+ /* At this point we've collected all the registers, now decode the data */
+ currentData = intData;
+ intCount = 0;
+ for(i = 0; i < SI_MAX_INTERRUPTS; i++)
+ {
+ if(*currentData)
+ {
+ for(j = 0; j < 8; j++)
+ {
+ if( *currentData & (1<<j) )
+ {
+ map = intMap[i][j];
+ pIntData->irqs[intCount] = map;
+
+ if( (map == IRQ_P_HVIC)
+ || (map == IRQ_P_THERM) )
+ {
+ safetyInt = TRUE;
+ }
+
+ intCount++;
+ }
+ }
+ }
+ currentData++;
+ }
+ pIntData->number = intCount;
+
+ if( safetyInt == TRUE)
+ {
+ if(ProSLIC_isReinitRequired(pProslic))
+ {
+ return RC_REINIT_REQUIRED;
+ }
+ }
+
+ return pIntData->number;
+}
+
+
+int ProSLIC_GetInterrupts (proslicChanType_ptr hProslic,
+ proslicIntType *pIntData)
+{
+ const proslicIntTypeMap interruptMap =
+ {
+ {IRQ_OSC1_T1, IRQ_OSC1_T2, IRQ_OSC2_T1, IRQ_OSC2_T2, IRQ_RING_T1, IRQ_RING_T2, IRQ_FSKBUF_AVAIL, IRQ_VBAT},
+ {IRQ_RING_TRIP, IRQ_LOOP_STATUS, IRQ_LONG_STAT, IRQ_VOC_TRACK, IRQ_DTMF, IRQ_INDIRECT, IRQ_TXMDM, IRQ_RXMDM},
+ {IRQ_P_HVIC, IRQ_P_THERM, IRQ_PQ3, IRQ_PQ4, IRQ_PQ5, IRQ_PQ6, IRQ_DSP, IRQ_MADC_FS},
+ {IRQ_USER_0, IRQ_USER_1, IRQ_USER_2, IRQ_USER_3, IRQ_USER_4, IRQ_USER_5, IRQ_USER_6, IRQ_USER_7}
+ };
+ pIntData->number=0;
+ /* TRACEPRINT(hProslic, "\n", NULL); */
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#if defined (SI3217X) || defined (SI3218X)
+ if (0
+#ifdef SI3217X
+ || (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+#endif
+#ifdef SI3218X
+ || (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+#endif
+ )
+ {
+ return ProSLIC_GetInterruptHelper(hProslic, interruptMap, pIntData, 1);
+ }
+#endif
+#if defined (SI3226X) || defined (SI3228X)
+ if( 0
+#ifdef SI3226X
+ || (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+#endif
+#ifdef SI3228X
+ || (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+#endif
+ )
+ {
+ return ProSLIC_GetInterruptHelper(hProslic, interruptMap, pIntData, 2);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_ReadHookStatus (proslicChanType_ptr pProslic,uInt8 *pHookStat)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ *pHookStat = PROSLIC_ONHOOK;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ if (ReadReg(pProslic,pProslic->channel,PROSLIC_REG_LCRRTP) & 2)
+ {
+ *pHookStat=PROSLIC_OFFHOOK;
+ }
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_SetLinefeedStatus (proslicChanType_ptr hProslic, uInt8 newLinefeed)
+{
+ printk("ProSLIC_SetLinefeedStatus channelType %d, chipType %d\n",
+ hProslic->channelType, hProslic->deviceId->chipType );
+ TRACEPRINT(hProslic, "linefeed = %u\n", newLinefeed);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_SetLinefeedStatus(hProslic,newLinefeed);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_SetLinefeedStatus(hProslic,newLinefeed);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_SetLinefeedStatus(hProslic,newLinefeed);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_SetLinefeedStatus(hProslic,newLinefeed);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_SetLinefeedStatusBroadcast (proslicChanType_ptr hProslic,
+ uInt8 newLinefeed)
+{
+ TRACEPRINT(hProslic, "linefeed = %u\n", newLinefeed);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ WriteReg(hProslic, PROSLIC_CHAN_BROADCAST, PROSLIC_REG_LINEFEED, newLinefeed);
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PolRev (proslicChanType_ptr pProslic,uInt8 abrupt,
+ uInt8 newPolRevState)
+{
+ uInt8 data = 0;
+ TRACEPRINT(pProslic, "abrupt = %u newPolRevState = %u\n", abrupt,
+ newPolRevState);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ switch (newPolRevState)
+ {
+ case POLREV_STOP:
+ data = 0;
+ break;
+ case POLREV_START:
+ data = 2;
+ break;
+ case WINK_START:
+ data = 6;
+ break;
+ case WINK_STOP:
+ data = 4;
+ break;
+ }
+
+ /* Cannot polrev/wink while low power mode is active */
+ ProSLIC_SetPowersaveMode(pProslic,PWRSAVE_DISABLE);
+
+ if (abrupt)
+ {
+ data |= 1;
+ }
+
+ WriteReg(pProslic, pProslic->channel, PROSLIC_REG_POLREV,data);
+
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_GPIOControl (proslicChanType_ptr pProslic,uInt8 *pGpioData,
+ uInt8 read)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#if defined(SI3217X) || defined (SI3226X)
+ if( 0
+#ifdef SI3217X
+ || (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+#endif
+#ifdef SI3226X
+ || (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+#endif
+ )
+ {
+ if (read)
+ {
+ *pGpioData = 0xf & ReadReg(pProslic,pProslic->channel,PROSLIC_REG_GPIO);
+ }
+ else
+ {
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_GPIO,
+ (*pGpioData)|(ReadReg(pProslic,pProslic->channel,PROSLIC_REG_GPIO)&0xf0));
+ }
+ return RC_NONE;
+ }
+#endif /* non-si321x case */
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+/*
+** Optional Neon Message Waiting Support
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int ProSLIC_MWISetup (proslicChanType_ptr hProslic, uInt16 vpk_mag,
+ uInt16 lcrmask_mwi)
+{
+ TRACEPRINT(hProslic, "vpk_mag = %u lcrmask_mwi = 0x%02x\n", vpk_mag,
+ lcrmask_mwi);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_MWISetup(hProslic,vpk_mag,lcrmask_mwi);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_MWISetup(hProslic,vpk_mag,lcrmask_mwi);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_MWISetup(hProslic,vpk_mag,lcrmask_mwi);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_MWISetup(hProslic,vpk_mag,lcrmask_mwi);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+/*****************************************************************************************************/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int ProSLIC_MWIEnable (proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_MWIEnable(hProslic);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_MWIEnable(hProslic);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_MWIEnable(hProslic);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_MWIEnable(hProslic);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+/*****************************************************************************************************/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int ProSLIC_MWIDisable (proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_MWIDisable(hProslic);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_MWIDisable(hProslic);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_MWIDisable(hProslic);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_MWIDisable(hProslic);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+/*****************************************************************************************************/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int ProSLIC_SetMWIState (proslicChanType_ptr hProslic,uInt8 flash_on)
+{
+ TRACEPRINT(hProslic, "flash_on = %u\n", flash_on);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_SetMWIState(hProslic,flash_on);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_SetMWIState(hProslic,flash_on);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_SetMWIState(hProslic,flash_on);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_SetMWIState(hProslic,flash_on);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+/*****************************************************************************************************/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int ProSLIC_SetMWIState_ramp (proslicChanType_ptr hProslic,uInt8 flash_on,
+ uInt8 step_delay, uInt8 step_num)
+{
+ TRACEPRINT(hProslic, "flash_on = %u\n", flash_on);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_SetMWIState_ramp(hProslic,flash_on,step_delay,step_num);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_SetMWIState_ramp(hProslic,flash_on,step_delay,step_num);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_SetMWIState_ramp(hProslic,flash_on,step_delay,step_num);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_SetMWIState_ramp(hProslic,flash_on,step_delay,step_num);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+/*****************************************************************************************************/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int ProSLIC_GetMWIState (proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_GetMWIState(hProslic);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_GetMWIState(hProslic);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_GetMWIState(hProslic);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_GetMWIState(hProslic);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+/*****************************************************************************************************/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int ProSLIC_MWI (proslicChanType_ptr hProslic,uInt8 lampOn)
+{
+ TRACEPRINT(hProslic, "lampOn = %u\n", lampOn);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_MWI(hProslic,lampOn);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_MWI(hProslic,lampOn);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_MWI(hProslic,lampOn);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_MWI(hProslic,lampOn);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+
+/*****************************************************************************************************/
+int ProSLIC_ToneGenStart (proslicChanType_ptr pProslic,uInt8 timerEn)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "timerEn = %u\n", timerEn);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic, "%s%s on channel %d\n",LOGPRINT_PREFIX, __FUNCTION__,
+ pProslic->channel);
+
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_OCON);
+ data |= 0x11 + (timerEn ? 0x66 : 0);
+ return WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OCON,data);
+}
+
+/*****************************************************************************************************/
+int ProSLIC_ToneGenStop (proslicChanType_ptr pProslic)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic,"%s%s on channel %d\n",LOGPRINT_PREFIX, __FUNCTION__,
+ pProslic->channel);
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_OCON);
+ data &= ~(0x77);
+ return WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OCON,data);
+}
+
+/*****************************************************************************************************/
+int ProSLIC_RingStart (proslicChanType_ptr pProslic)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic, "%sRingStart\n", LOGPRINT_PREFIX);
+ return(ProSLIC_SetLinefeedStatus(pProslic, LF_RINGING));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_RingStop (proslicChanType_ptr pProslic)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic,"%sRingStop\n", LOGPRINT_PREFIX);
+ return(ProSLIC_SetLinefeedStatus(pProslic, LF_FWD_ACTIVE));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_CheckCIDBuffer (proslicChanType_ptr pProslic, uInt8 *fsk_buf_avail)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ data = ReadReg(pProslic,pProslic->channel, PROSLIC_REG_IRQ1);
+#ifdef GCI_MODE
+ WriteReg(pProslic,pProslic->channel, PROSLIC_REG_IRQ1,data); /*clear (for GCI)*/
+#endif
+ *fsk_buf_avail = (data&0x40) ? 1 : 0;
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_EnableCID (proslicChanType_ptr pProslic)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic, "%sEnableCID on channel %d\n",LOGPRINT_PREFIX,
+ pProslic->channel);
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OCON,0);
+
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_OMODE);
+ data |= 0xA;
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OMODE,data);
+
+ return(WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OCON,0x5));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_DisableCID (proslicChanType_ptr pProslic)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic, "%sDisableCID on channel %d\n",LOGPRINT_PREFIX,
+ pProslic->channel);
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OCON,0);
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_OMODE);
+ data &= ~(0x8);
+ return(WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OMODE,data));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_SendCID (proslicChanType_ptr pProslic, uInt8 *buffer,
+ uInt8 numBytes)
+{
+ TRACEPRINT(pProslic, "numBytes = %u\n", numBytes);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT (pProslic, "%sSendCID on channel %d\n",LOGPRINT_PREFIX,
+ pProslic->channel);
+ while (numBytes-- > 0)
+ {
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_FSKDAT,*(buffer++));
+ }
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_ModifyCIDStartBits(proslicChanType_ptr pProslic,
+ uInt8 enable_startStop)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "enable_startStop = %u\n", enable_startStop);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_OMODE);
+
+ if(enable_startStop == FALSE)
+ {
+ data &= ~0x80;
+ }
+ else
+ {
+ data |= 0x80;
+ }
+
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OMODE,data);
+
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PCMStart (proslicChanType_ptr pProslic)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic, "%sPCMStart\n", LOGPRINT_PREFIX);
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_PCMMODE);
+ data |= 0x10;
+ return WriteReg(pProslic,pProslic->channel,PROSLIC_REG_PCMMODE,data);
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PCMStop (proslicChanType_ptr pProslic)
+{
+ uInt8 data;
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic, "%sPCMStart\n", LOGPRINT_PREFIX);
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_PCMMODE);
+ data &= ~0x10;
+ return WriteReg(pProslic,pProslic->channel,PROSLIC_REG_PCMMODE,data);
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_ResetDialPulseDetect
+**
+** Description:
+** reset dial pulse detection state machine (helper function for
+** ProSLIC_InitializeHookChangeDetect.
+*/
+static void ProSLIC_ResetDialPulseDetect(hookChangeType *pPulse)
+{
+ pPulse->currentPulseDigit = 0;
+ pPulse->lookingForTimeout = 0;
+ pPulse->last_hook_state = 5; /* this is invalid */
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_InitializeHookChangeDetect
+**
+** Description:
+** Initialize dial pulse detection parameters
+*/
+int ProSLIC_InitializeHookChangeDetect(hookChangeType *pPulse,void *hookTime)
+{
+ TRACEPRINT_NOCHAN("\n", NULL);
+ pPulse->hookTime = hookTime;
+ pPulse->last_state_reported = SI_HC_NO_ACTIVITY;
+ ProSLIC_ResetDialPulseDetect(pPulse);
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_HookChangeDetect
+**
+** Description:
+** implements pulse dial detection and should be called at every hook transition
+*/
+uInt8 ProSLIC_HookChangeDetect (proslicChanType *pProslic,
+ hookChange_Cfg *pHookChangeCfg, hookChangeType *pHookChangeData)
+{
+ uInt8 hookStat;
+ int delta_time;
+
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ TimeElapsed(pProTimer,pHookChangeData->hookTime,&delta_time);
+ ProSLIC_ReadHookStatus(pProslic,&hookStat);
+
+ /* Did we have a hook state change? */
+ if(hookStat != pHookChangeData->last_hook_state)
+ {
+ pHookChangeData->last_hook_state = hookStat;
+ getTime(pProTimer,pHookChangeData->hookTime);
+ pHookChangeData->lookingForTimeout = 1;
+
+ if (hookStat == PROSLIC_OFFHOOK)
+ {
+ if ((delta_time >= (pHookChangeCfg->minOnHook))
+ && (delta_time <= (pHookChangeCfg->maxOnHook)))
+ {
+ pHookChangeData->currentPulseDigit++;
+ }
+ else
+ {
+ /* Did we see a hook flash? */
+ if( (delta_time >= pHookChangeCfg->minHookFlash)
+ && (delta_time <= pHookChangeCfg->maxHookFlash) )
+ {
+ pHookChangeData->last_state_reported = SI_HC_HOOKFLASH;
+ ProSLIC_ResetDialPulseDetect(pHookChangeData);
+ return SI_HC_HOOKFLASH;
+ }
+ }
+ }
+
+ return SI_HC_NEED_MORE_POLLS;
+ }
+
+ if( (pHookChangeData->lookingForTimeout == 1)
+ && (delta_time >= pHookChangeCfg->minInterDigit) )
+ {
+
+ if(delta_time > pHookChangeCfg->minHook)
+ {
+ if(pHookChangeData->last_hook_state == PROSLIC_ONHOOK)
+ {
+ ProSLIC_ResetDialPulseDetect(pHookChangeData);
+ pHookChangeData->last_state_reported = SI_HC_ONHOOK_TIMEOUT;
+ return SI_HC_ONHOOK_TIMEOUT;
+ }
+
+ if(pHookChangeData->last_hook_state == PROSLIC_OFFHOOK)
+ {
+ ProSLIC_ResetDialPulseDetect(pHookChangeData);
+
+ /* Check if we saw either a pulse digit or hook flash prior to this,
+ * if so, we're already offhook, so do not report a offhook event,
+ * just stop polling.
+ */
+ if((pHookChangeData->last_state_reported == SI_HC_ONHOOK_TIMEOUT)
+ || (pHookChangeData->last_state_reported == SI_HC_NO_ACTIVITY) )
+ {
+ pHookChangeData->last_state_reported = SI_HC_OFFHOOK_TIMEOUT;
+ return SI_HC_OFFHOOK_TIMEOUT;
+ }
+ else
+ {
+ return SI_HC_NO_ACTIVITY;
+ }
+ }
+ }
+ else
+ {
+ uInt8 last_digit = pHookChangeData->currentPulseDigit;
+
+ if(last_digit)
+ {
+ pHookChangeData->last_state_reported = last_digit;
+ ProSLIC_ResetDialPulseDetect(pHookChangeData);
+ return last_digit;
+ }
+ }
+ return SI_HC_NEED_MORE_POLLS;
+ }
+
+ return SI_HC_NEED_MORE_POLLS;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_DTMFReadDigit (proslicChanType_ptr pProslic,uInt8 *pDigit)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ DEBUG_PRINT(pProslic, "%sDTMFReadDigit on channel %d\n",LOGPRINT_PREFIX,
+ pProslic->channel);
+ *pDigit = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_TONDTMF) & 0xf;
+
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PLLFreeRunStart (proslicChanType_ptr hProslic)
+{
+ uInt8 tmp;
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ WriteReg(hProslic,hProslic->channel,PROSLIC_REG_ZCAL_EN,0x00);
+ tmp = ReadReg(hProslic,hProslic->channel,PROSLIC_REG_ENHANCE);
+ return(WriteReg(hProslic,hProslic->channel,PROSLIC_REG_ENHANCE,tmp|0x4));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PLLFreeRunStop (proslicChanType_ptr hProslic)
+{
+ uInt8 tmp;
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ tmp = ReadReg(hProslic,hProslic->channel,PROSLIC_REG_ENHANCE);
+ WriteReg(hProslic,hProslic->channel,PROSLIC_REG_ENHANCE,tmp&~(0x4));
+ return WriteReg(hProslic,hProslic->channel,PROSLIC_REG_ZCAL_EN,0x04);
+}
+
+/*****************************************************************************************************/
+int ProSLIC_GetPLLFreeRunStatus (proslicChanType_ptr hProslic)
+{
+ uInt8 tmp;
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ tmp = ReadReg(hProslic,hProslic->channel,PROSLIC_REG_ENHANCE);
+ if(tmp & 0x02)
+ {
+ return RC_PLL_FREERUN_ACTIVE;
+ }
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PulseMeterEnable (proslicChanType_ptr hProslic)
+{
+ uInt8 widebandEn;
+ TRACEPRINT(hProslic, "\n", NULL);
+
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ widebandEn = ReadReg(hProslic,hProslic->channel,PROSLIC_REG_ENHANCE) & 0x01;
+
+ if (widebandEn)
+ {
+ DEBUG_PRINT (hProslic,
+ "%s Pulse Metering is not supported while Wideband Mode is enabled.\n",
+ LOGPRINT_PREFIX);
+ }
+
+#if defined (SI3217X) || defined (SI3218X) || defined (SI3226X) || defined (SI3228X)
+ if(0
+#ifdef SI3217X
+ || (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+#endif
+#ifdef SI3218X
+ ||(hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189 && !widebandEn)
+#endif
+#ifdef SI3226X
+ || (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+#endif
+#ifdef SI3228X
+ || (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289 && !widebandEn)
+#endif
+ )
+ {
+ return WriteReg(hProslic,hProslic->channel,PROSLIC_REG_PMCON,ReadReg(hProslic,
+ hProslic->channel,PROSLIC_REG_PMCON) | (0x01));
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PulseMeterDisable (proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ return(WriteReg(hProslic,hProslic->channel,PROSLIC_REG_PMCON,ReadReg(hProslic,
+ hProslic->channel,PROSLIC_REG_PMCON) & ~(0x05)));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PulseMeterStart (proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ return WriteReg(hProslic,hProslic->channel,PROSLIC_REG_PMCON,ReadReg(hProslic,
+ hProslic->channel,PROSLIC_REG_PMCON) | (0x5));
+}
+
+/*****************************************************************************************************/
+int ProSLIC_PulseMeterStop (proslicChanType_ptr hProslic)
+{
+ TRACEPRINT(hProslic, "\n", NULL);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return(WriteReg(hProslic,hProslic->channel,PROSLIC_REG_PMCON,ReadReg(hProslic,
+ hProslic->channel,PROSLIC_REG_PMCON) & ~(0x04)));
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return(WriteReg(hProslic,hProslic->channel,PROSLIC_REG_PMCON,ReadReg(hProslic,
+ hProslic->channel,PROSLIC_REG_PMCON) & ~(0x04)));
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return ProSLIC_PulseMeterDisable(hProslic);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return ProSLIC_PulseMeterDisable(hProslic);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_SetDCDCInversionFlag (proslicChanType_ptr hProslic, uInt8 flag)
+{
+ TRACEPRINT(hProslic, "flag = %u\n", flag);
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ hProslic->dcdc_polarity_invert = flag;
+ return RC_COMPLETE_NO_ERR;
+}
+
+
+int ProSLIC_PowerUpConverter (proslicChanType_ptr hProslic)
+{
+ if(hProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_PowerUpConverter(hProslic);
+ }
+#endif
+#ifdef SI3218X
+ if (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_PowerUpConverter(hProslic);
+ }
+#endif
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_PowerUpConverter(hProslic);
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_PowerUpConverter(hProslic);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+/*****************************************************************************************************/
+static int ProSLIC_GetBatType(proslicChanType_ptr hProslic)
+{
+#if defined(SI3217X) || defined(SI3218X)
+ if (0
+#if defined(SI3217X)
+ ||(hProslic->deviceId->chipType >= SI32171
+ && hProslic->deviceId->chipType <= SI32179)
+#endif
+#ifdef SI3218X
+ || (hProslic->deviceId->chipType >= SI32180
+ && hProslic->deviceId->chipType <= SI32189)
+#endif
+ )
+ {
+ return BO_DCDC_UNKNOWN;
+ }
+#endif
+
+#ifdef SI3226X
+ if (hProslic->deviceId->chipType >= SI32260
+ && hProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_General_Configuration.batType;
+ }
+#endif
+#ifdef SI3228X
+ if (hProslic->deviceId->chipType >= SI32280
+ && hProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_General_Configuration.batType;
+ }
+#endif
+}
+/*****************************************************************************************************/
+int ProSLIC_PowerDownConverter (proslicChanType_ptr pProslic)
+{
+ errorCodeType error = RC_NONE;
+ int32 vbat;
+ int timer = 0;
+ TRACEPRINT(pProslic, "\n", NULL);
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ /* Force channel out of powersavings mode and then put it in open state */
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_LINEFEED,LF_FWD_OHT);
+ Delay(pProTimer,10);
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_LINEFEED, LF_OPEN);
+ Delay(pProTimer,50);
+
+ /* Don't try to shutdown converter if we're using external supplies or if the
+ converter is alread shutdown.
+ */
+ if((ProSLIC_GetBatType(pProslic) == BO_DCDC_EXTERNAL) ||
+ (ReadRAM(pProslic,pProslic->channel,PROSLIC_RAM_PD_DCDC) & 0x100000) )
+ {
+ return RC_NONE;
+ }
+
+ WriteRAM(pProslic,pProslic->channel,PROSLIC_RAM_PD_DCDC,0x900000L);
+ Delay(pProTimer,50);
+
+ do
+ {
+ vbat = ReadRAM(pProslic, pProslic->channel, PROSLIC_RAM_RAM_MADC_VBAT);
+ if(vbat & 0x10000000L)
+ {
+ vbat |= 0xF0000000L;
+ }
+ Delay(pProTimer,10);
+ }
+ while((vbat > COMP_5V) && (timer++ < PROSLIC_TIMEOUT_DCDC_DOWN));
+
+ DEBUG_PRINT(pProslic, "%s VBAT Down = %d.%d v\n", LOGPRINT_PREFIX,
+ (int)((vbat/SCALE_V_MADC)/1000),
+ (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+
+ if(timer > PROSLIC_TIMEOUT_DCDC_DOWN)
+ {
+ /* Error handling - shutdown converter, disable channel, set error tag */
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_DOWN_TIMEOUT;
+ DEBUG_PRINT(pProslic, "%sDCDC Power Down timeout channel %d\n", LOGPRINT_PREFIX,
+ pProslic->channel);
+ }
+ return error;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_LBCal (proslicChanType_ptr *pProslic, int size)
+{
+ int k;
+ int timeout;
+ uInt8 data;
+ uInt8 lfState, enhance_value;
+ TRACEPRINT(*pProslic, "size = %d\n", size);
+
+ if((*pProslic)->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ /* For all channels, save settings, initiate LBCAL */
+ for(k = 0; k < size; k++)
+ {
+ if( (pProslic[k]->channelEnable) && (pProslic[k]->channelType == PROSLIC) )
+ {
+ DEBUG_PRINT(pProslic[k], "%sStarting LB Cal on channel %d\n", LOGPRINT_PREFIX,
+ pProslic[k]->channel);
+ /* Preserve old settings */
+ lfState = ReadReg(pProslic[k], pProslic[k]->channel, PROSLIC_REG_LINEFEED);
+ enhance_value = ReadReg(pProslic[k], pProslic[k]->channel, PROSLIC_REG_ENHANCE);
+ ProSLIC_SetPowersaveMode(pProslic[k], PWRSAVE_DISABLE);
+ ProSLIC_SetLinefeedStatus(pProslic[k], LF_FWD_ACTIVE);
+ WriteReg(pProslic[k], pProslic[k]->channel, PROSLIC_REG_CALR0, CAL_LB_ALL);
+ WriteReg(pProslic[k], pProslic[k]->channel, PROSLIC_REG_CALR3, 0x80);
+ pProslic[k]->error = RC_CAL_TIMEOUT; /* Assume failure */
+
+ timeout = 0;
+ do
+ {
+ data = ReadReg(pProslic[k], pProslic[k]->channel, PROSLIC_REG_CALR3);
+ DelayX(*pProslic, 10);
+ timeout++;
+ }
+ while((data & 0x80) && (timeout < TIMEOUT_LB_CAL));
+
+ if( (data & 0x80) )
+ {
+ DEBUG_PRINT(pProslic[k], "%sLB Cal timeout on channel %d\n", LOGPRINT_PREFIX,
+ pProslic[k]->channel);
+ WriteReg(pProslic[k], pProslic[k]->channel, PROSLIC_REG_LINEFEED, LF_OPEN);
+ return RC_CAL_TIMEOUT;
+ }
+ else
+ {
+ WriteReg(pProslic[k], pProslic[k]->channel, PROSLIC_REG_LINEFEED, lfState);
+ WriteReg(pProslic[k], pProslic[k]->channel, PROSLIC_REG_ENHANCE, enhance_value);
+ pProslic[k]->error = RC_NONE;
+ }
+ }
+ }
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+#define PROSLIC_RAM_CMDAC_FWD 1476
+#define PROSLIC_RAM_CMDAC_REV 1477
+#define PROSLIC_RAM_CAL_TRNRD_DACT 1458
+#define PROSLIC_RAM_CAL_TRNRD_DACR 1459
+
+int ProSLIC_GetLBCalResult (proslicChanType *pProslic,int32 *result1,
+ int32 *result2, int32 *result3, int32 *result4)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ *result1 = ReadRAM(pProslic, pProslic->channel, PROSLIC_RAM_CMDAC_FWD);
+ *result2 = ReadRAM(pProslic, pProslic->channel, PROSLIC_RAM_CMDAC_REV);
+ *result3 = ReadRAM(pProslic, pProslic->channel, PROSLIC_RAM_CAL_TRNRD_DACT);
+ *result4 = ReadRAM(pProslic, pProslic->channel, PROSLIC_RAM_CAL_TRNRD_DACR);
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_GetLBCalResultPacked (proslicChanType *pProslic,int32 *result)
+{
+ int32 results[4];
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ if( ProSLIC_GetLBCalResult(pProslic, &(results[0]), &(results[1]),
+ &(results[2]), &(results[3])) == 0 )
+ {
+ /*
+ Bits 31:24 CMDAC_FWD[25:18]
+ Bits 23:16 CMDAC_REV[25:18]
+ Bits 15:8 CAL_TRNRD_DACT[20:13]
+ Bits 7:0 CAL_TRNRD_DACR[20:13]
+ */
+ *result = (results[0]<<6) & 0xff000000L;
+ *result |=(results[1]>>1) & 0x00ff0000L;
+ *result |=(results[2]>>5) & 0x0000ff00L;
+ *result |=(results[3]>>13)& 0x000000ffL;
+ return RC_NONE;
+ }
+}
+
+/*****************************************************************************************************/
+int ProSLIC_LoadPreviousLBCal (proslicChanType *pProslic,int32 result1,
+ int32 result2,int32 result3,int32 result4)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ WriteRAM(pProslic,pProslic->channel,PROSLIC_RAM_CMDAC_FWD,result1);
+ WriteRAM(pProslic,pProslic->channel,PROSLIC_RAM_CMDAC_REV,result2);
+ WriteRAM(pProslic,pProslic->channel,PROSLIC_RAM_CAL_TRNRD_DACT,result3);
+ WriteRAM(pProslic,pProslic->channel,PROSLIC_RAM_CAL_TRNRD_DACR,result4);
+#ifdef API_TEST
+ ramVal = ReadRAM(pProslic,pProslic->channel,PROSLIC_RAM_CMDAC_FWD);
+ LOGPRINT ("%s UNPACKED CMDAC_FWD = %08x\n", LOGPRINT_PREFIX, ramVal);
+ ramVal = ReadRAM(pProslic, pProslic->channel,PROSLIC_RAM_CMDAC_REV);
+ LOGPRINT ("%s UNPACKED CMDAC_REF = %08x\n", LOGPRINT_PREFIX, ramVal);
+ ramVal = ReadRAM(pProslic,pProslic->channel,PROSLIC_RAM_CAL_TRNRD_DACT);
+ LOGPRINT ("%s UNPACKED CAL_TRNRD_DACT = %08x\n", LOGPRINT_PREFIX, ramVal);
+ ramVal = ReadRAM(pProslic,pProslic->channel,PROSLIC_RAM_CAL_TRNRD_DACR);
+ LOGPRINT ("%s UNPACKED CAL_TRNRD_DACR = %08x\n", LOGPRINT_PREFIX, ramVal);
+#endif
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_LoadPreviousLBCalPacked (proslicChanType *pProslic,int32 *result)
+{
+ ramData ramVal[4];
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ ramVal[0] = (*result&0xff000000L)>>6;
+ ramVal[1] = (*result&0x00ff0000L)<<1;
+ ramVal[2] = (*result&0x0000ff00L)<<5;
+ ramVal[3] = (*result&0x000000ffL)<<13;
+
+ return ProSLIC_LoadPreviousLBCal(pProslic, ramVal[0], ramVal[1], ramVal[2],
+ ramVal[3]);
+}
+
+/*****************************************************************************************************/
+int ProSLIC_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val,
+ int32 preset)
+{
+ TRACEPRINT(pProslic, "v_vlim_val = %u preset = %d\n", v_vlim_val, preset);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_dbgSetDCFeedVopen (pProslic,v_vlim_val,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_dbgSetDCFeedVopen (pProslic,v_vlim_val,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_dbgSetDCFeedVopen (pProslic,v_vlim_val,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_dbgSetDCFeedVopen (pProslic,v_vlim_val,preset);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val,
+ int32 preset)
+{
+ TRACEPRINT(pProslic, "i_ilim_val = %u preset = %d\n", i_ilim_val, preset);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_dbgSetDCFeedIloop (pProslic,i_ilim_val,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_dbgSetDCFeedIloop (pProslic,i_ilim_val,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_dbgSetDCFeedIloop (pProslic,i_ilim_val,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_dbgSetDCFeedIloop (pProslic,i_ilim_val,preset);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_dbgSetRinging (proslicChanType *pProslic,
+ ProSLIC_dbgRingCfg *ringCfg, int preset)
+{
+ TRACEPRINT(pProslic, "preset = %d\n", preset);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_dbgSetRinging (pProslic,ringCfg,preset);
+ }
+#endif
+#ifdef SI3218X
+ if (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_dbgSetRinging (pProslic,ringCfg,preset);
+ }
+#endif
+#ifdef SI3226X
+ if (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_dbgSetRinging (pProslic,ringCfg,preset);
+ }
+#endif
+#ifdef SI3228X
+ if (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_dbgSetRinging (pProslic,ringCfg,preset);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_dbgSetRXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset)
+{
+ TRACEPRINT(pProslic, "gain = %d imp_preset = %d audio_gain_preset = %d\n", gain,
+ impedance_preset, audio_gain_preset);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_dbgSetRXGain (pProslic,gain,impedance_preset,audio_gain_preset);
+ }
+#endif
+#ifdef SI3218X
+ if (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_dbgSetRXGain (pProslic,gain,impedance_preset,audio_gain_preset);
+ }
+#endif
+#ifdef SI3226X
+ if (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_dbgSetRXGain (pProslic,gain,impedance_preset,audio_gain_preset);
+ }
+#endif
+#ifdef SI3228X
+ if (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_dbgSetRXGain (pProslic,gain,impedance_preset,audio_gain_preset);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_dbgSetTXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset)
+{
+ TRACEPRINT(pProslic, "gain = %d imp_preset = %d audio_gain_preset = %d\n", gain,
+ impedance_preset, audio_gain_preset);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_dbgSetTXGain (pProslic,gain,impedance_preset,audio_gain_preset);
+ }
+#endif
+#ifdef SI3218X
+ if (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_dbgSetTXGain (pProslic,gain,impedance_preset,audio_gain_preset);
+ }
+#endif
+#ifdef SI3226X
+ if (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_dbgSetTXGain (pProslic,gain,impedance_preset,audio_gain_preset);
+ }
+#endif
+#ifdef SI3228X
+ if (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_dbgSetTXGain (pProslic,gain,impedance_preset,audio_gain_preset);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_LineMonitor
+**
+** Description:
+** Generic monitoring function
+**
+** Returns:
+** 0
+*/
+int ProSLIC_LineMonitor (proslicChanType *pProslic, proslicMonitorType *monitor)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_LineMonitor (pProslic, monitor);
+ }
+#endif
+#ifdef SI3218X
+ if (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_LineMonitor (pProslic, monitor);
+ }
+#endif
+#ifdef SI3226X
+ if (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_LineMonitor (pProslic, monitor);
+ }
+#endif
+#ifdef SI3228X
+ if (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_LineMonitor (pProslic, monitor);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_PSTNCheck
+**
+** Description:
+** Monitor for excessive longitudinal current, which
+** would be present if a live pstn line was connected
+** to the port.
+**
+** Returns:
+** 0 - no pstn detected
+** 1 - pstn detected
+*/
+int ProSLIC_PSTNCheck (proslicChanType *pProslic,
+ proslicPSTNCheckObjType *pPSTNCheck)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_PSTNCheck (pProslic,pPSTNCheck);
+ }
+#endif
+#ifdef SI3218X
+ if (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_PSTNCheck (pProslic,pPSTNCheck);
+ }
+#endif
+#ifdef SI3226X
+ if (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_PSTNCheck (pProslic,pPSTNCheck);
+ }
+#endif
+#ifdef SI3228X
+ if (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_PSTNCheck (pProslic,pPSTNCheck);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_DiffPSTNCheck
+**
+** Description:
+** Monitor for excessive longitudinal current, which
+** would be present if a live pstn line was connected
+** to the port.
+**
+** Returns:
+** RC_NONE - test in progress
+** RC_IGNORE - non-ProSLIC channel
+** RC_COMPLETE_NO_ERR - ProSLIC does not support feature.
+** RC_PSTN_OPEN_FEMF | RC_COMPLETE_NO_ERR - test completed.
+**
+*/
+#ifdef PSTN_DET_ENABLE
+int ProSLIC_DiffPSTNCheck (proslicChanType *pProslic,
+ proslicDiffPSTNCheckObjType *pPSTNCheck)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ return Si3217x_DiffPSTNCheck (pProslic,pPSTNCheck);
+ }
+#endif
+#ifdef SI3218X
+ if (pProslic->deviceId->chipType >= SI32180
+ && pProslic->deviceId->chipType <= SI32189)
+ {
+ return Si3218x_DiffPSTNCheck (pProslic,pPSTNCheck);
+ }
+#endif
+#ifdef SI3226X
+ if (pProslic->deviceId->chipType >= SI32260
+ && pProslic->deviceId->chipType <= SI32269)
+ {
+ return Si3226x_DiffPSTNCheck (pProslic,pPSTNCheck);
+ }
+#endif
+#ifdef SI3228X
+ if (pProslic->deviceId->chipType >= SI32280
+ && pProslic->deviceId->chipType <= SI32289)
+ {
+ return Si3228x_DiffPSTNCheck (pProslic,pPSTNCheck);
+ }
+#endif
+ return RC_COMPLETE_NO_ERR;
+}
+#endif
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_CreatePSTNCheckObj
+**
+** Description:
+** Allocate memory for pstnCheckObj
+**
+** Returns:
+** RC_NONE
+** RC_NO_MEM if failed to allocate memory.
+** RC_UNSUPPORTED_FEATER if malloc disabled
+*/
+int ProSLIC_CreatePSTNCheckObjs(proslicPSTNCheckObjType_ptr *pstnCheckObj,
+ unsigned int num_objs)
+{
+ TRACEPRINT_NOCHAN("num_objs = %u\n", num_objs);
+#ifndef DISABLE_MALLOC
+ *pstnCheckObj = SIVOICE_CALLOC(sizeof(proslicPSTNCheckObjType),num_objs);
+ if(*pstnCheckObj == NULL)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%s: %s: failed to allocate memory", LOGPRINT_PREFIX, __FUNCTION__);
+#endif
+ return RC_NO_MEM;
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_CreateDiffPSTNCheckObjs
+**
+** Description:
+** Allocate memory for proslicDiffPstnCheckObjs
+**
+** Returns:
+** RC_NONE
+** RC_NO_MEM if failed to allocate memory.
+** RC_UNSUPPORTED_FEATURE if malloc disabled
+*/
+
+#ifdef PSTN_DET_ENABLE
+int ProSLIC_CreateDiffPSTNCheckObjs(proslicDiffPSTNCheckObjType_ptr
+ *pstnCheckObj, unsigned int num_objs)
+{
+ TRACEPRINT_NOCHAN("num_objs = %u\n", num_objs);
+#ifndef DISABLE_MALLOC
+ *pstnCheckObj = SIVOICE_CALLOC(sizeof(proslicDiffPSTNCheckObjType),num_objs);
+ if(*pstnCheckObj == NULL)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%s: %s: failed to allocate memory", LOGPRINT_PREFIX, __FUNCTION__);
+#endif
+ return RC_NO_MEM;
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+#endif
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_DestroyPSTNCheckObjs
+**
+** Description:
+** Free memory for pstnCheckObj
+**
+** Returns:
+** RC_NONE
+** RC_UNSUPPORTED_FEATER if malloc disabled
+*/
+int ProSLIC_DestroyPSTNCheckObjs(proslicPSTNCheckObjType_ptr *pstnCheckObj)
+{
+ TRACEPRINT_NOCHAN("\n", NULL);
+#ifndef DISABLE_MALLOC
+ if(pstnCheckObj)
+ {
+ SIVOICE_FREE((proslicPSTNCheckObjType_ptr)*pstnCheckObj);
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_DestroyDiffPSTNCheckObjs
+**
+** Description:
+** Free memory for pstnDiffCheckObj
+**
+** Returns:
+** RC_NONE
+** RC_UNSUPPORTED_FEATER if malloc disabled
+*/
+#ifdef PSTN_DET_ENABLE
+int ProSLIC_DestroyDiffPSTNCheckObjs(proslicDiffPSTNCheckObjType_ptr
+ *pstnCheckObj)
+{
+ TRACEPRINT_NOCHAN("\n", NULL);
+#ifndef DISABLE_MALLOC
+ if(pstnCheckObj)
+ {
+ SIVOICE_FREE((proslicDiffPSTNCheckObjType_ptr)*pstnCheckObj);
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+#endif
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_InitPSTNCheckObj
+**
+** Description:
+** Initialize pstnCheckObj structure members
+**
+** Returns:
+** RC_NONE
+*/
+int ProSLIC_InitPSTNCheckObj(proslicPSTNCheckObjType_ptr pstnCheckObj,
+ int32 avgThresh, int32 singleThresh, uInt8 samples)
+{
+ TRACEPRINT_NOCHAN("avgThres = %d singleThresh = %d samples = %u\n", avgThresh,
+ avgThresh, samples);
+ pstnCheckObj->avgThresh = avgThresh;
+ pstnCheckObj->singleThresh = singleThresh;
+ pstnCheckObj->samples = samples;
+ pstnCheckObj->avgIlong = 0;
+ pstnCheckObj->count = 0;
+ pstnCheckObj->buffFull = 0;
+
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_InitDiffPSTNCheckObj
+**
+** Description:
+** Initialize pstnCheckObj structure members
+**
+** Returns:
+** RC_NONE
+*/
+#ifdef PSTN_DET_ENABLE
+int ProSLIC_InitDiffPSTNCheckObj(proslicDiffPSTNCheckObjType_ptr
+ pstnDiffCheckObj,
+ int preset1,
+ int preset2,
+ int entry_preset,
+ int femf_enable)
+{
+ TRACEPRINT_NOCHAN("p1 = %d p2 = %d ep = %d femf_enable = %d\n", preset1,
+ preset2, entry_preset, femf_enable);
+ pstnDiffCheckObj->samples = PSTN_DET_DIFF_SAMPLES;
+ pstnDiffCheckObj->max_femf_vopen = PSTN_DET_MAX_FEMF;
+ pstnDiffCheckObj->entryDCFeedPreset = entry_preset;
+ pstnDiffCheckObj->dcfPreset1 = preset1;
+ pstnDiffCheckObj->dcfPreset2 = preset2;
+ pstnDiffCheckObj->femf_enable = femf_enable;
+ pstnDiffCheckObj->pState.stage = 0;
+ pstnDiffCheckObj->pState.sampleIterations = 0;
+ pstnDiffCheckObj->pState.waitIterations = 0;
+
+ return RC_NONE;
+}
+#endif
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_SetPwrsaveMode
+**
+** Description:
+** Enable or disable powersave mode
+**
+** Returns:
+** RC_NONE
+*/
+#define PROSLIC_REG_ENHANCE 47
+
+int ProSLIC_SetPowersaveMode (proslicChanType *pProslic, int pwrsave)
+{
+ uInt8 regData;
+ TRACEPRINT(pProslic, "pwrsave = %d\n", pwrsave);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+ regData = ReadReg(pProslic,pProslic->channel, PROSLIC_REG_ENHANCE);
+
+ if(pwrsave == PWRSAVE_DISABLE)
+ {
+#ifdef SI3217X
+ if (pProslic->deviceId->chipType >= SI32171
+ && pProslic->deviceId->chipType <= SI32179)
+ {
+ regData &= 0x27;
+ }
+ else
+ {
+#endif
+ regData &= 0x07;
+#ifdef SI3217X
+ }
+#endif
+ }
+ else
+ {
+ regData |= 0x10;
+ }
+
+ return WriteReg(pProslic,pProslic->channel, PROSLIC_REG_ENHANCE, regData);
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_SetDAAEnable
+**
+** Description:
+** Enable or disable adjacent FXO (Si32178 only)
+**
+** Returns:
+** RC_NONE
+*/
+int ProSLIC_SetDAAEnable (proslicChanType *pProslic, int enable)
+{
+ TRACEPRINT(pProslic, "\n", NULL);
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+#ifdef SI3217X
+ return Si3217x_SetDAAEnable (pProslic,enable);
+#else
+ SILABS_UNREFERENCED_PARAMETER(enable);
+ return RC_NONE;
+#endif
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_SetUserMode
+**
+** Description: Enables User Access Mode (UAM) if the part supports it.
+**
+** Returns:
+** RC_NONE if successful.
+*/
+#define PROSLIC_REG_USERMODE_ENABLE 126
+
+int ProSLIC_SetUserMode(proslicChanType *pProslic,BOOLEAN isEnabled,
+ BOOLEAN isBcast)
+{
+ uInt8 data;
+ uInt8 channel;
+
+ TRACEPRINT(pProslic, "enable = %d bcast = %d\n", (int)isEnabled, (int)isBcast);
+ if(isEnabled == FALSE)
+ {
+ return RC_NONE;
+ }
+
+ if( pProslic->channelType != PROSLIC )
+ {
+ return RC_UNSUPPORTED_FEATURE;
+ }
+
+ if(isBcast == TRUE)
+ {
+ channel = PROSLIC_CHAN_BROADCAST;
+ }
+ else
+ {
+ channel = pProslic->channel;
+ }
+
+ data = ReadReg(pProslic,channel,
+ PROSLIC_REG_USERMODE_ENABLE); /*we check first channel. we assume all channels same user mode state for broadcast */
+
+ if (((data&1) != 0) == isEnabled)
+ {
+ return RC_NONE;
+ }
+
+ WriteReg(pProslic,channel,PROSLIC_REG_USERMODE_ENABLE,2);
+ WriteReg(pProslic,channel,PROSLIC_REG_USERMODE_ENABLE,8);
+ WriteReg(pProslic,channel,PROSLIC_REG_USERMODE_ENABLE,0xe);
+ return WriteReg(pProslic,channel,PROSLIC_REG_USERMODE_ENABLE,0);
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_isReinitRequired
+**
+** Description:
+** Checks for improper ring exit
+**
+** Returns:
+** RC_NONE - Reinit not required
+** RC_REINIT_REQUIRED - Corrupted state machine - reinit required
+**
+*/
+
+int ProSLIC_isReinitRequired(proslicChanType *pProslic)
+{
+ uInt8 lf;
+ ramData rkdc_sum;
+ TRACEPRINT(pProslic, "\n", NULL);
+
+ if( pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ /* Check for improper ring exit which may cause dcfeed corruption */
+
+ lf = ReadReg(pProslic, pProslic->channel,PROSLIC_REG_LINEFEED);
+ rkdc_sum = ReadRAM(pProslic,pProslic->channel,PROSLIC_RAM_RDC_SUM);
+ DEBUG_PRINT(pProslic, "%sisReinitRequired: Linefeed = %d RDC_SUM = %d",
+ LOGPRINT_PREFIX, (int)lf, (int) rkdc_sum);
+ if((rkdc_sum & 0x400000)&&(lf != 0x44))
+ {
+ return RC_REINIT_REQUIRED;
+ }
+ else
+ {
+ return RC_NONE;
+ }
+}
+
+/*****************************************************************************************************/
+/*
+** Function: LoadRegTable
+**
+** Description:
+** Generic function to load register/RAM with predefined addr/value
+*/
+int ProSLIC_LoadRegTable (proslicChanType *pProslic, ProslicRAMInit *pRamTable,
+ ProslicRegInit *pRegTable, int broadcast)
+{
+ uInt16 i;
+ uInt8 channel;
+
+ TRACEPRINT(pProslic, "bcast = %d\n", broadcast);
+ /* DAA doesn't have a RAM table.. skip it... */
+ if( (pRamTable != 0)
+ && (pProslic->channelType != PROSLIC) )
+ {
+ return RC_IGNORE;
+ }
+
+ if (broadcast)
+ {
+ channel = PROSLIC_CHAN_BROADCAST;
+ }
+ else
+ {
+ channel = pProslic->channel;
+ }
+
+ i=0;
+ if (pRamTable != 0)
+ {
+ while (pRamTable[i].address != 0xffff)
+ {
+ WriteRAM(pProslic,channel,pRamTable[i].address,pRamTable[i].initValue);
+ i++;
+ }
+ }
+ i=0;
+ if (pRegTable != 0)
+ {
+ while (pRegTable[i].address != 0xff)
+ {
+ WriteReg(pProslic,channel,pRegTable[i].address,pRegTable[i].initValue);
+ i++;
+ }
+ }
+
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+/*
+** Function: LoadRegTables
+**
+** Description:
+** Generic function to load register/RAM with predefined addr/value
+*/
+
+int ProSLIC_LoadRegTables(proslicChanType_ptr *pProslic,
+ ProslicRAMInit *pRamTable, ProslicRegInit *pRegTable, int size)
+{
+ int i;
+ TRACEPRINT(*pProslic, "size = %d\n", size);
+ for (i=0; i<size; i++)
+ {
+ if (pProslic[i]->channelEnable)
+ {
+ ProSLIC_LoadRegTable(pProslic[i],pRamTable,pRegTable,FALSE);
+ }
+ }
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+int ProSLIC_UnsupportedFeatureNoArg(proslicChanType_ptr pProslic,
+ const char *function_name)
+{
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%s: unsupported %s was called on channel %d\n", LOGPRINT_PREFIX,
+ function_name, pProslic->channel);
+#else
+ SILABS_UNREFERENCED_PARAMETER(pProslic);
+ SILABS_UNREFERENCED_PARAMETER(function_name);
+#endif
+ return RC_UNSUPPORTED_FEATURE;
+}
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_PSTN_delay_poll
+**
+** Description:
+** Delay function called within PSTN detection functions
+**
+** Return Value:
+** none
+*/
+#ifdef PSTN_DET_ENABLE
+void ProSLIC_PSTN_delay_poll(proslicTestStateType *pState, uInt16 delay)
+{
+ uInt16 delayCount;
+
+ if((delay/PSTN_DET_POLL_RATE) < 2)
+ {
+ delayCount = 0;
+ }
+ else
+ {
+ delayCount = (delay/PSTN_DET_POLL_RATE) - 2;
+ }
+
+ pState->waitIterations++;
+ if((pState->waitIterations == delayCount) || (delayCount == 0))
+ {
+ pState->waitIterations = 0;
+ pState->stage++;
+ }
+}
+#endif
+
+/*****************************************************************************************************/
+/*
+** Function: ProSLIC_Calibrate
+**
+** Description:
+** Performs calibration based on passed ptr to array of
+** desired CALRn settings.
+**
+** Starts calibration on all channels sequentially (not broadcast)
+** and continuously polls for completion. Return error code if
+** CAL_EN does not clear for each enabled channel within the passed
+** timeout period.
+*/
+int ProSLIC_Calibrate(proslicChanType_ptr *pProslic, int maxChan, uInt8 *calr,
+ int maxTime)
+{
+ int i,j, cal_en;
+ int cal_en_chan = 0;
+ int timer = 0;
+
+ TRACEPRINT(*pProslic, "maxChan = %d time = %d\n", maxChan, maxTime );
+ if ((*pProslic)->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ for(i = 0; i < maxChan; i++)
+ {
+ if((pProslic[i]->channelEnable)&&(pProslic[i]->channelType == PROSLIC))
+ {
+ for(j = 0; j < 4; j++)
+ {
+ WriteReg(pProslic[i], pProslic[i]->channel, (PROSLIC_REG_CALR0+j), calr[j]);
+ }
+ }
+ }
+
+ /* Wait for calibration to complete */
+ do
+ {
+ cal_en = 0;
+ DelayX(*pProslic, 10);
+ for(i = 0; i < maxChan; i++)
+ {
+ if( (pProslic[i]->channelEnable) && (pProslic[i]->channelType == PROSLIC))
+ {
+ cal_en_chan = ReadReg(pProslic[i], pProslic[i]->channel, PROSLIC_REG_CALR3);
+ if( (cal_en_chan & 0x80) && (timer == maxTime) )
+ {
+ DEBUG_PRINT(pProslic[i], "%sCalibration timed out on channel %d\n",
+ LOGPRINT_PREFIX, pProslic[i]->channel);
+ pProslic[i]->channelEnable = 0;
+ pProslic[i]->error = RC_CAL_TIMEOUT;
+ }
+ cal_en |= cal_en_chan;
+ }
+ }
+ }
+ while( (timer++ <= maxTime) && (cal_en & 0x80) );
+}
+
+/*****************************************************************************************************/
+/* This function is used by the xxxx_Init_with_Options - do not call this directly... */
+int ProSLIC_ReInit_helper(proslicChanType_ptr *pProslic, int size,
+ initOptionsType init_option, int numChanPerDevice)
+{
+ int i, chanCount;
+ proslicChanType_ptr currentChan;
+
+ if(init_option == INIT_REINIT)
+ {
+ chanCount = 1;
+ }
+ else
+ {
+ chanCount = size;
+ }
+
+ /* Preserve linefeed state.. */
+ for(i = 0, currentChan = *pProslic; i < chanCount; i++, currentChan++)
+ {
+ currentChan->scratch = ReadReg(currentChan, currentChan->channel,
+ PROSLIC_REG_LINEFEED);
+ ProSLIC_PowerDownConverter(currentChan);
+ }
+
+ DelayX(*pProslic, 10); /* Wait to ensure system is powered down... */
+
+ /* Do a soft reset if reinit is requested...*/
+ if(init_option == INIT_REINIT)
+ {
+ for(i = 0; i < chanCount; i++)
+ {
+ if(numChanPerDevice == 2)
+ {
+ WriteReg(pProslic[i], pProslic[i]->channel, PROSLIC_REG_RESET,
+ (i&1)+1); /* reset 1 channel at a time */
+ }
+ else
+ {
+ WriteReg(pProslic[i], pProslic[i]->channel, PROSLIC_REG_RESET, 1);
+ }
+ }
+ DelayX(*pProslic, 100); /* Wait for a soft reset */
+ }
+ return RC_NONE;
+}
+
+/*****************************************************************************************************/
+#ifndef DISABLE_TONE_SETUP
+int ProSLIC_ToneGenSetupPtr(proslicChanType_ptr pProslic, ProSLIC_Tone_Cfg *cfg)
+{
+ TRACEPRINT(pProslic, "\n",NULL);
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteRAM(pProslic, pProslic->channel,PROSLIC_RAM_OSC1FREQ, cfg->osc1.freq);
+ WriteRAM(pProslic, pProslic->channel,PROSLIC_RAM_OSC1AMP, cfg->osc1.amp);
+ WriteRAM(pProslic, pProslic->channel,PROSLIC_RAM_OSC1PHAS, cfg->osc1.phas);
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_O1TAHI,cfg->osc1.tahi);
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_O1TALO,cfg->osc1.talo);
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_O1TIHI,cfg->osc1.tihi);
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_O1TILO,cfg->osc1.tilo);
+
+ WriteRAM(pProslic, pProslic->channel,PROSLIC_RAM_OSC2FREQ, cfg->osc2.freq);
+ WriteRAM(pProslic, pProslic->channel,PROSLIC_RAM_OSC2AMP, cfg->osc2.amp);
+ WriteRAM(pProslic, pProslic->channel,PROSLIC_RAM_OSC2PHAS, cfg->osc2.phas);
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_O2TAHI,cfg->osc2.tahi);
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_O2TALO,cfg->osc2.talo);
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_O2TIHI,cfg->osc2.tihi);
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_O2TILO,cfg->osc2.tilo);
+
+
+ WriteReg(pProslic, pProslic->channel,PROSLIC_REG_OMODE,cfg->omode);
+ return RC_NONE;
+}
+#endif /* DISABLE_TONE_SETUP */
+
+/*****************************************************************************************************/
+#ifndef DISABLE_FSK_SETUP
+int ProSLIC_FSKSetupPtr (proslicChanType_ptr pProslic, ProSLIC_FSK_Cfg *cfg)
+{
+ uInt8 data;
+ int i;
+
+ TRACEPRINT(pProslic, "\n",NULL);
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_FSKDEPTH,
+ 0x08); /* Clear Buffer */
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_O1TAHI,0);
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_O1TIHI,0);
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_O1TILO,0);
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_O1TALO,0x13);
+
+ data = ReadReg(pProslic,pProslic->channel,PROSLIC_REG_OMODE);
+ if (cfg->eightBit)
+ {
+ data |= 0x80;
+ }
+ else
+ {
+ data &= ~(0x80);
+ }
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_FSKDEPTH,cfg->fskdepth);
+ WriteReg(pProslic,pProslic->channel,PROSLIC_REG_OMODE,data);
+
+ for(i = 0; i < 2; i++)
+ {
+ WriteRAM(pProslic,pProslic->channel,PROSLIC_RAM_FSK01+i,cfg->fsk[i]);
+ WriteRAM(pProslic,pProslic->channel,PROSLIC_RAM_FSKAMP0+i,cfg->fskamp[i]);
+ WriteRAM(pProslic,pProslic->channel,PROSLIC_RAM_FSKFREQ0+i,cfg->fskfreq[i]);
+ }
+ return RC_NONE;
+}
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_MULTI_BOM_constants.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_MULTI_BOM_constants.c
new file mode 100644
index 0000000..9c29a08
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_MULTI_BOM_constants.c
@@ -0,0 +1,1039 @@
+/*
+** Copyright (c) 2016 Silicon Laboratories, Inc.
+** 2016-01-13 01:25:26
+**
+** Si3217x ProSLIC API Configuration Tool Version 4.0.3
+** Last Updated in API Release: 8.0.0
+** Auto generated file from configuration tool
+*/
+
+
+#include "proslic.h"
+#include "si3217x.h"
+
+Si3217x_General_Cfg Si3217x_General_Configuration = {
+0x73, /* DEVICE_KEY */
+BO_DCDC_BUCK_BOOST, /* BOM_OPT */
+BO_GDRV_NOT_INSTALLED, /* GDRV_OPTION */
+VDC_8P0_16P0, /* VDC_RANGE_OPT */
+VDAA_DISABLED, /* DAA_ENABLE */
+AUTO_ZCAL_ENABLED, /* ZCAL_ENABLE */
+BO_STD_BOM, /* PM_BOM */
+1400L, /* I_OITHRESH (1400mA) */
+900L, /* I_OITHRESH_LO (900mA) */
+1400L, /* I_OITHRESH_HI (1400mA) */
+94000L, /* V_OVTHRESH (94000mV) */
+5000L, /* V_UVTHRESH (5000mV) */
+1000L, /* V_UVHYST (1000mV) */
+0x00000000L, /* DCDC_FSW_VTHLO */
+0x00000000L, /* DCDC_FSW_VHYST */
+0x0048D15BL, /* P_TH_HVIC */
+0x07FEB800L, /* COEF_P_HVIC */
+0x00083120L, /* BAT_HYST */
+0x03D70A20L, /* VBATH_EXPECT (60.00V) */
+0x06147AB2L, /* VBATR_EXPECT (95.00V) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00C00000L, /* VBAT_TRACK_MIN */
+0x01800000L, /* VBAT_TRACK_MIN_RNG */
+0x00200000L, /* DCDC_FSW_NORM */
+0x00200000L, /* DCDC_FSW_NORM_LO */
+0x00200000L, /* DCDC_FSW_RINGING */
+0x00200000L, /* DCDC_FSW_RINGING_LO */
+0x0D980000L, /* DCDC_DIN_LIM */
+0x00C00000L, /* DCDC_VOUT_LIM */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00800000L, /* THERM_DBI */
+0x00FFFFFFL, /* VOV_DCDC_SLOPE */
+0x00A18937L, /* VOV_DCDC_OS */
+0x00A18937L, /* VOV_RING_BAT_DCDC */
+0x00E49BA5L, /* VOV_RING_BAT_MAX */
+0x01018900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00000000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_RNGTYPE */
+0x00600000L, /* DCDC_ANA_TOFF */
+0x00400000L, /* DCDC_ANA_TONMIN */
+0x01500000L, /* DCDC_ANA_TONMAX */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x30, /* ENHANCE */
+0x01, /* DAA_CNTL */
+0x3F, /* AUTO */
+};
+
+
+/* Start of MULTI BOM section */
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+
+#include "si32xxx_multibom_constants.h"
+int si3217x_genconf_multi_max_preset = SI3217X_GEN_PARAM_LAST;
+
+Si3217x_General_Cfg Si3217x_General_Configuration_MultiBOM[SI3217X_GEN_PARAM_LAST] = {
+{ /* SI3217X_GEN_PARAM_FLYBACK_GDRV */
+0x73, /* DEVICE_KEY */
+BO_DCDC_FLYBACK, /* BOM_OPT */
+BO_GDRV_INSTALLED, /* GDRV_OPTION */
+VDC_7P0_20P0, /* VDC_RANGE_OPT */
+VDAA_ENABLED, /* DAA_ENABLE */
+AUTO_ZCAL_ENABLED, /* ZCAL_ENABLE */
+BO_STD_BOM, /* PM_BOM */
+1100L, /* I_OITHRESH (1100mA) */
+900L, /* I_OITHRESH_LO (900mA) */
+1700L, /* I_OITHRESH_HI (1700mA) */
+136000L, /* V_OVTHRESH (136000mV) */
+5000L, /* V_UVTHRESH (5000mV) */
+1000L, /* V_UVHYST (1000mV) */
+0x00000000L, /* DCDC_FSW_VTHLO */
+0x00000000L, /* DCDC_FSW_VHYST */
+0x0048D15BL, /* P_TH_HVIC */
+0x07FEB800L, /* COEF_P_HVIC */
+0x00083120L, /* BAT_HYST */
+0x03D70A20L, /* VBATH_EXPECT (60.00V) */
+0x070A3D3AL, /* VBATR_EXPECT (110.00V) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00200000L, /* DCDC_FSW_NORM */
+0x00200000L, /* DCDC_FSW_NORM_LO */
+0x00200000L, /* DCDC_FSW_RINGING */
+0x00200000L, /* DCDC_FSW_RINGING_LO */
+0x0D980000L, /* DCDC_DIN_LIM */
+0x00C00000L, /* DCDC_VOUT_LIM */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00800000L, /* THERM_DBI */
+0x00FFFFFFL, /* VOV_DCDC_SLOPE */
+0x00A18937L, /* VOV_DCDC_OS */
+0x00A18937L, /* VOV_RING_BAT_DCDC */
+0x00E49BA5L, /* VOV_RING_BAT_MAX */
+0x01018900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00000000L, /* DCDC_UVPOL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x30, /* ENHANCE */
+0x01, /* DAA_CNTL */
+0x3F, /* AUTO */
+},
+{ /* SI3217X_GEN_PARAM_FLYBACK_NO_GDRV */
+0x71, /* DEVICE_KEY */
+BO_DCDC_FLYBACK, /* BOM_OPT */
+BO_GDRV_NOT_INSTALLED, /* GDRV_OPTION */
+VDC_7P0_20P0, /* VDC_RANGE_OPT */
+VDAA_DISABLED, /* DAA_ENABLE */
+AUTO_ZCAL_ENABLED, /* ZCAL_ENABLE */
+BO_STD_BOM, /* PM_BOM */
+1100L, /* I_OITHRESH (1100mA) */
+900L, /* I_OITHRESH_LO (900mA) */
+1700L, /* I_OITHRESH_HI (1700mA) */
+136000L, /* V_OVTHRESH (136000mV) */
+5000L, /* V_UVTHRESH (5000mV) */
+1000L, /* V_UVHYST (1000mV) */
+0x00000000L, /* DCDC_FSW_VTHLO */
+0x00000000L, /* DCDC_FSW_VHYST */
+0x0048D15BL, /* P_TH_HVIC */
+0x07FEB800L, /* COEF_P_HVIC */
+0x00083120L, /* BAT_HYST */
+0x03D70A20L, /* VBATH_EXPECT (60.00V) */
+0x070A3D3AL, /* VBATR_EXPECT (110.00V) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00200000L, /* DCDC_FSW_NORM */
+0x00200000L, /* DCDC_FSW_NORM_LO */
+0x00200000L, /* DCDC_FSW_RINGING */
+0x00200000L, /* DCDC_FSW_RINGING_LO */
+0x0D980000L, /* DCDC_DIN_LIM */
+0x00C00000L, /* DCDC_VOUT_LIM */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00800000L, /* THERM_DBI */
+0x00FFFFFFL, /* VOV_DCDC_SLOPE */
+0x00A18937L, /* VOV_DCDC_OS */
+0x00A18937L, /* VOV_RING_BAT_DCDC */
+0x00E49BA5L, /* VOV_RING_BAT_MAX */
+0x01018900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00000000L, /* DCDC_UVPOL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x30, /* ENHANCE */
+0x00, /* DAA_CNTL */
+0x3F, /* AUTO */
+},
+{ /* SI3217X_GEN_PARAM_BUCK_BOOST_NO_GDRV */
+0x73, /* DEVICE_KEY */
+BO_DCDC_BUCK_BOOST, /* BOM_OPT */
+BO_GDRV_NOT_INSTALLED, /* GDRV_OPTION */
+VDC_8P0_16P0, /* VDC_RANGE_OPT */
+VDAA_ENABLED, /* DAA_ENABLE */
+AUTO_ZCAL_ENABLED, /* ZCAL_ENABLE */
+BO_STD_BOM, /* PM_BOM */
+1100L, /* I_OITHRESH (1400mA) */
+900L, /* I_OITHRESH_LO (900mA) */
+1700L, /* I_OITHRESH_HI (1400mA) */
+136000L, /* V_OVTHRESH (94000mV) */
+5000L, /* V_UVTHRESH (5000mV) */
+1000L, /* V_UVHYST (1000mV) */
+0x00000000L, /* DCDC_FSW_VTHLO */
+0x00000000L, /* DCDC_FSW_VHYST */
+0x0048D15BL, /* P_TH_HVIC */
+0x07FEB800L, /* COEF_P_HVIC */
+0x00083120L, /* BAT_HYST */
+0x03D70A20L, /* VBATH_EXPECT (60.00V) */
+//0x0147AE0AL, /* VBATH_EXPECT (20.00V) */
+//0x028F5C15L, /* VBATH_EXPECT (40.00V) */
+//0x01EB8510L, /* VBATH_EXPECT (30.00V) */
+//0x023D7092L, /* VBATH_EXPECT (35.00V) */
+//0x03851E9DL, /* VBATH_EXPECT (55.00V) */
+0x06147AB2L, /* VBATR_EXPECT (95.00V) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00C00000L, /* VBAT_TRACK_MIN */
+0x01800000L, /* VBAT_TRACK_MIN_RNG */
+0x00200000L, /* DCDC_FSW_NORM */
+0x00200000L, /* DCDC_FSW_NORM_LO */
+0x00200000L, /* DCDC_FSW_RINGING */
+0x00200000L, /* DCDC_FSW_RINGING_LO */
+0x0D980000L, /* DCDC_DIN_LIM */
+0x00C00000L, /* DCDC_VOUT_LIM */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00800000L, /* THERM_DBI */
+0x00FFFFFFL, /* VOV_DCDC_SLOPE */
+0x00A18937L, /* VOV_DCDC_OS */
+0x00A18937L, /* VOV_RING_BAT_DCDC */
+0x00E49BA5L, /* VOV_RING_BAT_MAX */
+0x01018900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00000000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_RNGTYPE */
+0x00600000L, //0x00600000L, /* DCDC_ANA_TOFF */
+0x003F0000L, //0x00400000L, /* DCDC_ANA_TONMIN */
+0x00800000L, //0x01500000L, /* DCDC_ANA_TONMAX */
+0x40, /* IRQEN1 */
+0x12, /* IRQEN */
+0x00, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x30, /* ENHANCE */
+0x00, /* DAA_CNTL */
+0x3E, /* AUTO */
+},
+{ /* SI3217X_GEN_PARAM_LCQC3W */
+0x71, /* DEVICE_KEY */
+BO_DCDC_LCQC_3W, /* BOM_OPT */
+BO_GDRV_NOT_INSTALLED, /* GDRV_OPTION */
+VDC_4P5_16P0, /* VDC_RANGE_OPT */
+VDAA_DISABLED, /* DAA_ENABLE */
+AUTO_ZCAL_ENABLED, /* ZCAL_ENABLE */
+BO_STD_BOM, /* PM_BOM */
+1850L, /* I_OITHRESH (1850mA) */
+900L, /* I_OITHRESH_LO (900mA) */
+1850L, /* I_OITHRESH_HI (1850mA) */
+128000L, /* V_OVTHRESH (128000mV) */
+5000L, /* V_UVTHRESH (5000mV) */
+1000L, /* V_UVHYST (1000mV) */
+0x00000000L, /* DCDC_FSW_VTHLO */
+0x00000000L, /* DCDC_FSW_VHYST */
+0x0048D15BL, /* P_TH_HVIC */
+0x07FEB800L, /* COEF_P_HVIC */
+0x00083120L, /* BAT_HYST */
+0x03D70A20L, /* VBATH_EXPECT (60.00V) */
+0x070A3D3AL, /* VBATR_EXPECT (110.00V) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00200000L, /* DCDC_FSW_NORM */
+0x00200000L, /* DCDC_FSW_NORM_LO */
+0x00200000L, /* DCDC_FSW_RINGING */
+0x00200000L, /* DCDC_FSW_RINGING_LO */
+0x0D980000L, /* DCDC_DIN_LIM */
+0x00C00000L, /* DCDC_VOUT_LIM */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00800000L, /* THERM_DBI */
+0x00FFFFFFL, /* VOV_DCDC_SLOPE */
+0x00A18937L, /* VOV_DCDC_OS */
+0x00A18937L, /* VOV_RING_BAT_DCDC */
+0x00E49BA5L, /* VOV_RING_BAT_MAX */
+0x01018900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00000000L, /* DCDC_UVPOL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x30, /* ENHANCE */
+0x00, /* DAA_CNTL */
+0x3F, /* AUTO */
+},
+{ /* SI3217X_GEN_PARAM_LCQC6W */
+0x71, /* DEVICE_KEY */
+BO_DCDC_LCQC_6W, /* BOM_OPT */
+BO_GDRV_NOT_INSTALLED, /* GDRV_OPTION */
+VDC_4P5_16P0, /* VDC_RANGE_OPT */
+VDAA_DISABLED, /* DAA_ENABLE */
+AUTO_ZCAL_ENABLED, /* ZCAL_ENABLE */
+BO_STD_BOM, /* PM_BOM */
+1750L, /* I_OITHRESH (1750mA) */
+900L, /* I_OITHRESH_LO (900mA) */
+1750L, /* I_OITHRESH_HI (1750mA) */
+128000L, /* V_OVTHRESH (128000mV) */
+5000L, /* V_UVTHRESH (5000mV) */
+1000L, /* V_UVHYST (1000mV) */
+0x00000000L, /* DCDC_FSW_VTHLO */
+0x00000000L, /* DCDC_FSW_VHYST */
+0x0048D15BL, /* P_TH_HVIC */
+0x07FEB800L, /* COEF_P_HVIC */
+0x00083120L, /* BAT_HYST */
+0x03D70A20L, /* VBATH_EXPECT (60.00V) */
+0x070A3D3AL, /* VBATR_EXPECT (110.00V) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00200000L, /* DCDC_FSW_NORM */
+0x00200000L, /* DCDC_FSW_NORM_LO */
+0x00200000L, /* DCDC_FSW_RINGING */
+0x00200000L, /* DCDC_FSW_RINGING_LO */
+0x0D980000L, /* DCDC_DIN_LIM */
+0x00C00000L, /* DCDC_VOUT_LIM */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00800000L, /* THERM_DBI */
+0x00FFFFFFL, /* VOV_DCDC_SLOPE */
+0x00A18937L, /* VOV_DCDC_OS */
+0x00A18937L, /* VOV_RING_BAT_DCDC */
+0x00E49BA5L, /* VOV_RING_BAT_MAX */
+0x01018900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00000000L, /* DCDC_UVPOL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x30, /* ENHANCE */
+0x00, /* DAA_CNTL */
+0x3F, /* AUTO */
+}
+};
+#endif
+
+
+/* End of MULTI BOM section */
+
+Si3217x_GPIO_Cfg Si3217x_GPIO_Configuration = {
+0x00, /* GPIO_OE */
+0x06, /* GPIO_ANA */
+0x00, /* GPIO_DIR */
+0x00, /* GPIO_MAN */
+0x00, /* GPIO_POL */
+0x00, /* GPIO_OD */
+0x00 /* BATSELMAP */
+};
+Si3217x_CI_Cfg Si3217x_CI_Presets [] = {
+{0}
+};
+Si3217x_audioGain_Cfg Si3217x_audioGain_Presets [] = {
+{0x1377080L,0, 0x0L, 0x0L, 0x0L, 0x0L},
+{0x80C3180L,0, 0x0L, 0x0L, 0x0L, 0x0L}
+};
+
+Si3217x_Ring_Cfg Si3217x_Ring_Presets[] ={
+{
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 3, Rcpe = 600 ohms
+ Rprot = 30 ohms, Type = LPR, Waveform = SINE
+*/
+0x00050000L, /* RTPER */
+0x07EFE000L, /* RINGFR (20.000 Hz) */
+0x0025D5BFL, /* RINGAMP (64.490 vrms) */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x008B9ACAL, /* IRING_LIM (90.000 mA) */
+0x00608636L, /* RTACTH (53.304 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00006000L, /* RTACDB (75.000 ms) */
+0x00006000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x070A0AA8L, /* VBATR_EXPECT (109.988 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00051EB8L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x01, /* USERSTAT */
+0x03850554L, /* VCM_RING (51.994 v) */
+0x03850554L, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_MAX_VBAT_PROVISIONING */
+{
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 5, Rcpe = 600 ohms
+ Rprot = 30 ohms, Type = LPR, Waveform = SINE
+*/
+0x00050000L, /* RTPER */
+0x07EFE000L, /* RINGFR (20.000 Hz) */
+0x001B9F2EL, /* RINGAMP (45.000 vrms) */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x008B9ACAL, /* IRING_LIM (90.000 mA) */
+0x0068E9B4L, /* RTACTH (57.936 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00006000L, /* RTACDB (75.000 ms) */
+0x00006000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x0558ABFCL, /* VBATR_EXPECT (83.537 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00051EB8L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x58, /* RINGCON */
+0x01, /* USERSTAT */
+0x02AC55FEL, /* VCM_RING (38.769 v) */
+0x02AC55FEL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F20_45VRMS_0VDC_LPR */
+{
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 5, Rcpe = 600 ohms
+ Rprot = 30 ohms, Type = BALANCED, Waveform = SINE
+*/
+0x00050000L, /* RTPER */
+0x07EFE000L, /* RINGFR (20.000 Hz) */
+0x001B9F2EL, /* RINGAMP (45.000 vrms) */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x008B9ACAL, /* IRING_LIM (90.000 mA) */
+0x0068E9B4L, /* RTACTH (57.936 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00006000L, /* RTACDB (75.000 ms) */
+0x00006000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x0558ABFCL, /* VBATR_EXPECT (83.537 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00051EB8L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x02AC55FEL, /* VCM_RING (38.769 v) */
+0x02AC55FEL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F20_45VRMS_0VDC_BAL */
+{
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 5, Rcpe = 600 ohms
+ Rprot = 30 ohms, Type = LPR, Waveform = SINE
+*/
+0x00050000L, /* RTPER */
+0x07EFE000L, /* RINGFR (20.000 Hz) */
+0x001B9F2EL, /* RINGAMP (45.000 vrms) */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x008B9ACAL, /* IRING_LIM (90.000 mA) */
+0x0068E9B4L, /* RTACTH (57.936 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00006000L, /* RTACDB (75.000 ms) */
+0x00006000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x0558ABFCL, /* VBATR_EXPECT (83.537 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x0, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00051EB8L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x58, /* RINGCON */
+0x01, /* USERSTAT */
+0x02AC55FEL, /* VCM_RING (38.769 v) */
+0x02AC55FEL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F20_45VRMS_0VDC_LPR_SHORTTIME */
+};
+
+Si3217x_DCfeed_Cfg Si3217x_DCfeed_Presets[] = {
+{
+0x1C8A024CL, /* SLOPE_VLIM */
+0x1F909679L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1D5B21A9L, /* SLOPE_DELTA1 */
+0x1DD87A3EL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x00B4F3C3L, /* CONST_RFEED (15.000 mA) */
+0x005D0FA6L, /* CONST_ILIM (20.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_48V_20MA */
+{
+0x1C8A024CL, /* SLOPE_VLIM */
+0x1EE08C11L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1C940D71L, /* SLOPE_DELTA1 */
+0x1DD87A3EL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x01241BC9L, /* CONST_RFEED (15.000 mA) */
+0x0074538FL, /* CONST_ILIM (25.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_48V_25MA */
+{
+0x1E655196L, /* SLOPE_VLIM */
+0x001904EFL, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1B4CAD9EL, /* SLOPE_DELTA1 */
+0x1BB0F47CL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x043AA4A6L, /* V_RFEED (36.000 v) */
+0x025977EAL, /* V_ILIM (20.000 v) */
+0x0068B19AL, /* CONST_RFEED (18.000 mA) */
+0x005D0FA6L, /* CONST_ILIM (20.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_PSTN_DET_1 */
+{
+0x1A10433FL, /* SLOPE_VLIM */
+0x1C206275L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1C1F426FL, /* SLOPE_DELTA1 */
+0x1EB51625L, /* SLOPE_DELTA2 */
+0x041C91DBL, /* V_VLIM (35.000 v) */
+0x03E06C43L, /* V_RFEED (33.000 v) */
+0x038633E0L, /* V_ILIM (30.000 v) */
+0x022E5DE5L, /* CONST_RFEED (10.000 mA) */
+0x005D0FA6L, /* CONST_ILIM (20.000 mA) */
+0x0021373DL, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+} /* DCFEED_PSTN_DET_2 */
+};
+
+Si3217x_Impedance_Cfg Si3217x_Impedance_Presets[] ={
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=600_0_0 rprot=30 rfuse=0 emi_cap=10*/
+{
+{0x07F46C00L, 0x000E4600L, 0x00008580L, 0x1FFD6100L, /* TXACEQ */
+ 0x07EF5000L, 0x0013F580L, 0x1FFDE000L, 0x1FFCB280L}, /* RXACEQ */
+{0x0027CB00L, 0x1F8A8880L, 0x02801180L, 0x1F625C80L, /* ECFIR/ECIIR */
+ 0x0314FB00L, 0x1E6B8E80L, 0x00C5FF00L, 0x1FC96F00L,
+ 0x1FFD1200L, 0x00023C00L, 0x0ED29D00L, 0x192A9400L},
+{0x00810E00L, 0x1EFEBE80L, 0x00803500L, 0x0FF66D00L, /* ZSYNTH */
+ 0x18099080L, 0x59},
+ 0x088E0D80L, /* TXACGAIN */
+ 0x01456D80L, /* RXACGAIN */
+ 0x07ABE580L, 0x18541B00L, 0x0757CB00L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_600_0_0_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=270_750_150 rprot=30 rfuse=0 emi_cap=10*/
+{
+{0x0715CB80L, 0x1FD56880L, 0x000D4480L, 0x1FFEAE00L, /* TXACEQ */
+ 0x0A834F80L, 0x1BA7E500L, 0x0080D300L, 0x1FDC1580L}, /* RXACEQ */
+{0x0017A080L, 0x1FDE3600L, 0x0129F900L, 0x01915280L, /* ECFIR/ECIIR */
+ 0x01434280L, 0x018E9E00L, 0x1FFE1200L, 0x0085E000L,
+ 0x001ECE80L, 0x1FDF3C80L, 0x0CC9EA00L, 0x1B2E1180L},
+{0x00C66800L, 0x1DD9CB80L, 0x015F8F00L, 0x0CB97F00L, /* ZSYNTH */
+ 0x1B44F480L, 0x94},
+ 0x08000000L, /* TXACGAIN */
+ 0x0108FB80L, /* RXACGAIN */
+ 0x07BB6980L, 0x18449700L, 0x0776D380L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_270_750_150_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=370_620_310 rprot=30 rfuse=0 emi_cap=10*/
+{
+{0x07E59E80L, 0x1FD33400L, 0x1FFDF800L, 0x1FFD8300L, /* TXACEQ */
+ 0x09F38000L, 0x1C1C5A00L, 0x1F94D700L, 0x1FDE5800L}, /* RXACEQ */
+{0x00234480L, 0x1F9CDD00L, 0x01F5D580L, 0x1FF39000L, /* ECFIR/ECIIR */
+ 0x02C17180L, 0x1FBE2500L, 0x00DFFE80L, 0x00441A80L,
+ 0x003BF800L, 0x1FC42400L, 0x0D9EB380L, 0x1A514580L},
+{0x003ED200L, 0x1F5D6B80L, 0x0063B100L, 0x0F12E200L, /* ZSYNTH */
+ 0x18EC9380L, 0x8B},
+ 0x08000000L, /* TXACGAIN */
+ 0x0127C700L, /* RXACGAIN */
+ 0x07B51200L, 0x184AEE80L, 0x076A2480L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_370_620_310_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=220_820_120 rprot=30 rfuse=0 emi_cap=10*/
+{
+{0x06E2A580L, 0x1FD1DF80L, 0x00068880L, 0x1FFCE200L, /* TXACEQ */
+ 0x0A7AFB00L, 0x1BC11F80L, 0x009C4E80L, 0x1FD60300L}, /* RXACEQ */
+{0x002C9880L, 0x1F530400L, 0x02CF4D80L, 0x1E895880L, /* ECFIR/ECIIR */
+ 0x055F7200L, 0x1E034600L, 0x023B9080L, 0x1FB01780L,
+ 0x00339380L, 0x1FC98F80L, 0x0B7EA900L, 0x1C760400L},
+{0x022C8200L, 0x1A9F3E80L, 0x03332100L, 0x0A0D4700L, /* ZSYNTH */
+ 0x1DEBC480L, 0x8D},
+ 0x08000000L, /* TXACGAIN */
+ 0x01013A80L, /* RXACGAIN */
+ 0x07BEF980L, 0x18410700L, 0x077DF280L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_220_820_120_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=600_0_0 rprot=30 rfuse=0 emi_cap=10*/
+{
+{0x07F46C00L, 0x000E4600L, 0x00008580L, 0x1FFD6100L, /* TXACEQ */
+ 0x07EF5000L, 0x0013F580L, 0x1FFDE000L, 0x1FFCB280L}, /* RXACEQ */
+{0x0027CB00L, 0x1F8A8880L, 0x02801180L, 0x1F625C80L, /* ECFIR/ECIIR */
+ 0x0314FB00L, 0x1E6B8E80L, 0x00C5FF00L, 0x1FC96F00L,
+ 0x1FFD1200L, 0x00023C00L, 0x0ED29D00L, 0x192A9400L},
+{0x00810E00L, 0x1EFEBE80L, 0x00803500L, 0x0FF66D00L, /* ZSYNTH */
+ 0x18099080L, 0x59},
+ 0x088E0D80L, /* TXACGAIN */
+ 0x01456D80L, /* RXACGAIN */
+ 0x07ABE580L, 0x18541B00L, 0x0757CB00L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_600_0_1000_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=200_680_100 rprot=30 rfuse=0 emi_cap=10*/
+{
+{0x07365D80L, 0x1FC64180L, 0x00022980L, 0x1FFCE300L, /* TXACEQ */
+ 0x09C28580L, 0x1D1FD880L, 0x0071A280L, 0x1FDF7500L}, /* RXACEQ */
+{0x1FF15A00L, 0x005C0600L, 0x00828200L, 0x01B11D00L, /* ECFIR/ECIIR */
+ 0x027BB800L, 0x1EE9F200L, 0x028BAB80L, 0x1E57BE80L,
+ 0x01007580L, 0x1EF8B780L, 0x0556EE80L, 0x028DFB80L},
+{0x014F2C00L, 0x1C7A1180L, 0x02369A00L, 0x0A138100L, /* ZSYNTH */
+ 0x1DEA2280L, 0x8E},
+ 0x08000000L, /* TXACGAIN */
+ 0x010C7E80L, /* RXACGAIN */
+ 0x07BB2500L, 0x1844DB80L, 0x07764980L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_200_680_100_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=220_820_115 rprot=30 rfuse=0 emi_cap=10*/
+{
+{0x06D56400L, 0x1FDF1780L, 0x00095A80L, 0x1FFDA880L, /* TXACEQ */
+ 0x0A596300L, 0x1C067880L, 0x0095EF00L, 0x1FD7AF00L}, /* RXACEQ */
+{0x00164300L, 0x1FD81880L, 0x0150CC80L, 0x0151BB80L, /* ECFIR/ECIIR */
+ 0x01DA1A00L, 0x0142CB80L, 0x0027DE80L, 0x0076A180L,
+ 0x0012F980L, 0x1FEAE000L, 0x0CC70C80L, 0x1B2DF000L},
+{0x00246300L, 0x1E5E0580L, 0x017D2300L, 0x0A138100L, /* ZSYNTH */
+ 0x1DEA2280L, 0xA7},
+ 0x08000000L, /* TXACGAIN */
+ 0x01009500L, /* RXACGAIN */
+ 0x07BBEE80L, 0x18441200L, 0x0777DD80L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_220_820_115_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=600_0_0 rprot=20 rfuse=0 emi_cap=0*/
+{
+{0x0817F080L, 0x1FE39600L, 0x0005A280L, 0x1FFC7600L, /* TXACEQ */
+ 0x07FA6E80L, 0x1FFD4F80L, 0x1FF80500L, 0x1FFDE780L}, /* RXACEQ */
+{0x00538E00L, 0x1F47A800L, 0x02957D00L, 0x00128700L, /* ECFIR/ECIIR */
+ 0x0194DD80L, 0x000E7100L, 0x1FC5B180L, 0x00061600L,
+ 0x0021B480L, 0x1FE88600L, 0x1FCAD600L, 0x1FD00E80L},
+{0x006A0F00L, 0x1F499F80L, 0x004C8900L, 0x0A152400L, /* ZSYNTH */
+ 0x1DE9B580L, 0x68},
+ 0x08419500L, /* TXACGAIN */
+ 0x01365F00L, /* RXACGAIN */
+ 0x07BB5700L, 0x1844A980L, 0x0776AE80L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ } /* WB_ZSYN_600_0_0_20_0 */
+};
+
+Si3217x_FSK_Cfg Si3217x_FSK_Presets[] ={
+{
+0x02232000L, /* FSK01 */
+0x077C2000L, /* FSK10 */
+0x003C0000L, /* FSKAMP0 (0.220 vrms )*/
+0x00200000L, /* FSKAMP1 (0.220 vrms) */
+0x06B60000L, /* FSKFREQ0 (2200.0 Hz space) */
+0x079C0000L, /* FSKFREQ1 (1200.0 Hz mark) */
+0x00, /* FSK8 */
+0x00, /* FSKDEPTH (1 deep fifo) */
+} , /* BELLCORE_FSK */
+{
+0x026fe23aL, /* FSK01 */
+0x0690b937L, /* FSK10 */
+0x003f8924L, /* FSKAMP0 (0.220 vrms )*/
+0x0026b5b9L, /* FSKAMP1 (0.220 vrms) */
+0x06d234ebL, /* FSKFREQ0 (2100.0 Hz space) */
+0x078a86d7L, /* FSKFREQ1 (1300.0 Hz mark) */
+0x00, /* FSK8 */
+0x00, /* FSKDEPTH (1 deep fifo) */
+} /* ITU_FSK */
+};
+
+Si3217x_PulseMeter_Cfg Si3217x_PulseMeter_Presets[] ={
+{
+0x007A2B6AL, /* PM_AMP_THRESH (1.000) */
+0, /* Freq (12kHz) */
+0, /* PM_RAMP (24kHz)*/
+0, /* PM_FORCE (First)*/
+0, /* PWR_SAVE (off)*/
+0, /* PM_AUTO (off)*/
+0x07D00000L, /* PM_active (2000 ms) */
+0x07D00000L /* PM_inactive (2000 ms) */
+ } /* DEFAULT_PULSE_METERING */
+};
+
+Si3217x_Tone_Cfg Si3217x_Tone_Presets[] = {
+{
+ {
+ 0x07B30000L, /* OSC1FREQ (350.000 Hz) */
+ 0x000C6000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x00, /* O1TALO (0 ms) */
+ 0x00, /* O1TAHI */
+ 0x00, /* O1TILO (0 ms) */
+ 0x00 /* O1TIHI */
+ },
+ {
+ 0x07870000L, /* OSC2FREQ (440.000 Hz) */
+ 0x000FA000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x00, /* O2TALO (0 ms) */
+ 0x00, /* O2TAHI */
+ 0x00, /* O2TILO (0 ms) */
+ 0x00 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_DIAL */
+{
+ {
+ 0x07700000L, /* OSC1FREQ (480.000 Hz) */
+ 0x00112000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0xA0, /* O1TALO (500 ms) */
+ 0x0F, /* O1TAHI */
+ 0xA0, /* O1TILO (500 ms) */
+ 0x0F /* O1TIHI */
+ },
+ {
+ 0x07120000L, /* OSC2FREQ (620.000 Hz) */
+ 0x00164000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0xA0, /* O2TALO (500 ms) */
+ 0x0F, /* O2TAHI */
+ 0xA0, /* O2TILO (500 ms) */
+ 0x0F /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_BUSY */
+{
+ {
+ 0x07700000L, /* OSC1FREQ (480.000 Hz) */
+ 0x00112000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x80, /* O1TALO (2000 ms) */
+ 0x3E, /* O1TAHI */
+ 0x00, /* O1TILO (4000 ms) */
+ 0x7D /* O1TIHI */
+ },
+ {
+ 0x07870000L, /* OSC2FREQ (440.000 Hz) */
+ 0x000FA000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x80, /* O2TALO (2000 ms) */
+ 0x3E, /* O2TAHI */
+ 0x00, /* O2TILO (4000 ms) */
+ 0x7D /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_RINGBACK */
+#if 0
+{
+ {
+ 0x07700000L, /* OSC1FREQ (480.000 Hz) */
+ 0x00112000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x60, /* O1TALO (300 ms) */
+ 0x09, /* O1TAHI */
+ 0x60, /* O1TILO (300 ms) */
+ 0x09 /* O1TIHI */
+ },
+ {
+ 0x07120000L, /* OSC2FREQ (620.000 Hz) */
+ 0x00164000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x60, /* O2TALO (300 ms) */
+ 0x09, /* O2TAHI */
+ 0x40, /* O2TILO (200 ms) */
+ 0x06 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_REORDER */
+#endif
+{
+ {
+ 0x07700000L, /* OSC1FREQ (480.000 Hz) */
+ 0x00112000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x40, /* O1TALO (200 ms) */
+ 0x06, /* O1TAHI */
+ 0x40, /* O1TILO (200 ms) */
+ 0x06 /* O1TIHI */
+ },
+ {
+ 0x07120000L, /* OSC2FREQ (620.000 Hz) */
+ 0x00164000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x40, /* O2TALO (200 ms) */
+ 0x06, /* O2TAHI */
+ 0x40, /* O2TILO (200 ms) */
+ 0x06 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_CONGESTION */
+{
+ {
+ 0x07870000L, /* OSC1FREQ (440.000 Hz) */
+ 0x000FA000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x20, /* O1TALO (100 ms) */
+ 0x03, /* O1TAHI */
+ 0x60, /* O1TILO (3500 ms) */
+ 0x6D /* O1TIHI */
+ },
+ {
+ 0x07870000L, /* OSC2FREQ (440.000 Hz) */
+ 0x000FA000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x20, /* O2TALO (100 ms) */
+ 0x03, /* O2TAHI */
+ 0x60, /* O2TILO (3500 ms) */
+ 0x6D /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* CALL_WAITING_TONE */
+{
+ {
+ 0x078F0000L, /* OSC1FREQ (425.000 Hz) */
+ 0x000F2000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x40, /* O1TALO (200 ms) */
+ 0x06, /* O1TAHI */
+ 0x40, /* O1TILO (200 ms) */
+ 0x06 /* O1TIHI */
+ },
+ {
+ 0x078F0000L, /* OSC2FREQ (425.000 Hz) */
+ 0x000F2000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x40, /* O2TALO (200 ms) */
+ 0x06, /* O2TAHI */
+ 0x40, /* O2TILO (200 ms) */
+ 0x06 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+} /* HOWLER_TONE */
+
+};
+
+Si3217x_PCM_Cfg Si3217x_PCM_Presets[] ={
+ {
+ 0x01, /* PCM_FMT - u-Law */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT NONE */
+ }, /* PCM_8ULAW */
+ {
+ 0x00, /* PCM_FMT - A-Law */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT NONE */
+ }, /* PCM_8ALAW */
+ {
+ 0x03, /* PCM_FMT - 16-bit Linear */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT NONE */
+ }, /* PCM_16LIN */
+ {
+ 0x03, /* PCM_FMT - 16-bit Linear */
+ 0x01, /* WIDEBAND - ENABLED (7kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT NONE */
+ } /* PCM_16LIN_WB */
+};
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_intf.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_intf.c
new file mode 100644
index 0000000..07d4698
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_intf.c
@@ -0,0 +1,3567 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_intf.c 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** SI3217X_Intf.c
+** SI3217X ProSLIC interface implementation file
+**
+** Author(s):
+** cdp
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#include "si3217x.h"
+#include "si3217x_intf.h"
+#include "si3217x_common_registers.h"
+#include "proslic_api_config.h"
+
+#include "si3217x_revb_intf.h"
+#include "si3217x_revc_intf.h"
+
+#define PRAM_ADDR (334 + 0x400)
+#define PRAM_DATA (335 + 0x400)
+#define SI3217X_IRING_LIM_MAX 0x8B9ACAL
+
+#define WriteReg pProslic->deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadReg pProslic->deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHW pProslic->deviceId->ctrlInterface->hCtrl
+#define Delay pProslic->deviceId->ctrlInterface->Delay_fptr
+#define pProTimer pProslic->deviceId->ctrlInterface->hTimer
+#define WriteRAM pProslic->deviceId->ctrlInterface->WriteRAM_fptr
+#define ReadRAM pProslic->deviceId->ctrlInterface->ReadRAM_fptr
+
+#define WriteRegX deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadRegX deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHWX deviceId->ctrlInterface->hCtrl
+#define DelayX deviceId->ctrlInterface->Delay_fptr
+#define pProTimerX deviceId->ctrlInterface->hTimer
+#define ReadRAMX deviceId->ctrlInterface->ReadRAM_fptr
+#define WriteRAMX deviceId->ctrlInterface->WriteRAM_fptr
+
+#define BROADCAST 0xff
+
+/*
+** Define patch parameters that can be modified by API
+*/
+#define SI3217X_PRAM_VBATH_NEON 995
+#define SI3217X_PRAM_LCRMASK_MWI 987
+#define SI3217X_PRAM_VBATH_EXPECT_SAVE 992
+
+#ifdef ENABLE_DEBUG
+static const char LOGPRINT_PREFIX[] = "Si3217x: ";
+#endif
+
+/*
+** Externs
+*/
+
+/* General Configuration */
+extern Si3217x_General_Cfg Si3217x_General_Configuration;
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+extern const proslicPatch SI3217X_PATCH_B_FLBK;
+extern const proslicPatch SI3217X_PATCH_B_BKBT;
+extern const proslicPatch SI3217X_PATCH_B_PBB;
+extern const proslicPatch SI3217X_PATCH_C_FLBK;
+extern const proslicPatch SI3217X_PATCH_C_BKBT;
+extern const proslicPatch SI3217X_PATCH_C_PBB;
+extern const proslicPatch SI3217X_PATCH_C_LCQCUK;
+extern Si3217x_General_Cfg Si3217x_General_Configuration_MultiBOM[];
+extern int si3217x_genconf_multi_max_preset;
+#else
+extern const proslicPatch SI3217X_PATCH_B_DEFAULT;
+extern const proslicPatch SI3217X_PATCH_C_DEFAULT;
+#endif
+
+
+/* Ringing */
+#ifndef DISABLE_RING_SETUP
+extern Si3217x_Ring_Cfg Si3217x_Ring_Presets[];
+#endif
+
+/* Zsynth */
+#ifndef DISABLE_ZSYNTH_SETUP
+extern Si3217x_Impedance_Cfg Si3217x_Impedance_Presets [];
+#endif
+
+/* CI/GCI */
+#ifndef DISABLE_CI_SETUP
+extern Si3217x_CI_Cfg Si3217x_CI_Presets [];
+#endif
+
+/* Audio Gain Scratch */
+extern Si3217x_audioGain_Cfg Si3217x_audioGain_Presets[];
+
+
+/* GPIO */
+#ifndef DISABLE_GPIO_SETUP
+extern Si3217x_GPIO_Cfg Si3217x_GPIO_Configuration ;
+#endif
+
+/* Pulse Metering */
+#ifndef DISABLE_PULSE_SETUP
+extern Si3217x_PulseMeter_Cfg Si3217x_PulseMeter_Presets [];
+#endif
+
+/* PCM */
+#ifndef DISABLE_PCM_SETUP
+extern Si3217x_PCM_Cfg Si3217x_PCM_Presets [];
+#endif
+
+/*
+** Local functions are defined first
+*/
+
+
+/*
+** Function: getChipType
+**
+** Description:
+** Decode ID register to identify chip type
+**
+** Input Parameters:
+** ID register value
+**
+** Return:
+** partNumberType
+*/
+static partNumberType getChipType(uInt8 data)
+{
+ /* For the parts that have a HV variant, we map to the lower voltage version,
+ the actual differences are handled in the constants file
+ */
+ const uInt8 revBPartNums[8] =
+ {
+ SI32171, UNSUPPORTED_PART_NUM, UNSUPPORTED_PART_NUM, UNSUPPORTED_PART_NUM,
+ SI32176, SI32177, SI32178, UNSUPPORTED_PART_NUM
+ };
+
+ const uInt8 revCPartNums[8] =
+ {
+ SI32171, UNSUPPORTED_PART_NUM, UNSUPPORTED_PART_NUM, SI32175,
+ SI32176, SI32172, SI32174, UNSUPPORTED_PART_NUM
+ };
+
+ uInt8 partNum = (data & 0x38) >> 3;
+ if( (data & 0x7) ==1 ) /* Rev B */
+ {
+ return revBPartNums[ partNum ];
+ }
+
+ if ( (data & 0x7) == 2 ) /* Rev C */
+ {
+ return revCPartNums[ partNum ];
+ }
+
+ return UNSUPPORTED_PART_NUM;
+}
+
+/*
+** Function: Si3217x_GetChipInfo
+**
+** Description:
+** Determine if DAA or ProSLIC present
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+**
+** Return:
+** channelType
+*/
+int Si3217x_GetChipInfo(proslicChanType *pProslic)
+{
+ uInt8 data, id;
+ uInt8 daaEnableSave = 0;
+ int returnCode;
+
+ /*
+ ** Set bit 0 of DAA_CNTL reg regardless of channel
+ ** type. This will allow us to see the DAA register
+ ** space if an Si32178 or Si3050 occupies that channel.
+ ** If it is a DAA channel, the register that is actually
+ ** written is FXO Control 3, since the address bit 6 is
+ ** ignored. This sets DDL (digital loopback). This should
+ ** be OK provided it is returned to it's entry state once
+ ** the channel type has been identified.
+ **
+ **
+ */
+
+ /*
+ ** Note: DIAG3 replaced DAA_CNTL on Si3217x RevC. Setting DIAG3.0
+ ** sets PD_GR909, which powers down the HVIC. Must pre-check
+ ** the device revision before doing DAA check.
+ */
+ id = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_ID);
+ if(id&0x02)
+ {
+ pProslic->channelType = PROSLIC;
+ pProslic->deviceId->chipRev = id & 0x7;
+ pProslic->deviceId->chipType = getChipType(id);
+ printk("howard %s, chipRev %d, chipType %d\n", __func__, pProslic->deviceId->chipRev, pProslic->deviceId->chipType);
+ if(pProslic->deviceId->chipType == UNSUPPORTED_PART_NUM)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%sregister 0 read = 0x%02X\n", LOGPRINT_PREFIX, id);
+#endif
+ return RC_SPI_FAIL;
+ }
+ else
+ {
+ return RC_NONE;
+ }
+ }
+
+ /* If the DAA control register was enabled, then check if this is the
+ correct setting.
+ */
+ if(Si3217x_General_Configuration.daa_cntl != 0)
+ {
+ daaEnableSave = ReadReg(pProHW,pProslic->channel,74);
+ WriteReg(pProHW,pProslic->channel,74,daaEnableSave|0x01);
+ data = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_PCMTXHI);
+ DEBUG_PRINT(pProslic, "%sisVerifiedProslic : REG VAL = %02x\n", LOGPRINT_PREFIX,
+ data);
+ if ( data == 0x40 ) /* Always 0x40 if lineside device is not enabled yet*/
+ {
+ pProslic->channelType = DAA;
+ WriteReg(pProHW,pProslic->channel,74,daaEnableSave);
+ return RC_NONE; /* Even though this not a SLIC, mark it as a valid part */
+ }
+ } /* DAA not enabled */
+ /* Not a VDAA - could be ProSLIC or empty channel */
+ data = ReadReg(pProHW,pProslic->channel,
+ SI3217X_COM_REG_PCMMODE); /* always 0x05 after reset */
+ if ( data == 0x05)
+ {
+ pProslic->deviceId->chipRev = id & 0x7;
+ pProslic->deviceId->chipType = getChipType(id);
+
+ if(pProslic->deviceId->chipType == UNSUPPORTED_PART_NUM)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%sregister 0 read = 0x%02X\n", LOGPRINT_PREFIX, id);
+#endif
+ return RC_SPI_FAIL;
+ }
+ else
+ {
+ return RC_NONE;
+ }
+
+ pProslic->channelType = PROSLIC;
+ returnCode = RC_NONE;
+ }
+ else
+ {
+ pProslic->channelType = UNKNOWN;
+ returnCode = RC_CHANNEL_TYPE_ERR;
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%sregister 11 read = 0x%02X\n", LOGPRINT_PREFIX, data);
+#endif
+ }
+ return returnCode;
+}
+
+
+/*
+** Function: Si3217x_PowerUpConverter
+**
+** Description:
+** Powers all DC/DC converters sequentially with delay to minimize
+** peak power draw on VDC.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_PowerUpConverter(proslicChanType_ptr pProslic)
+{
+ errorCodeType error = RC_DCDC_SETUP_ERR;
+ int32 vbath,vbat;
+ uInt8 reg = 0;
+ int timer = 0;
+
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ //WriteRAM(pProHW,pProslic->channel,1553,0x80000L);
+
+ /*
+ ** - powerup digital dc/dc w/ OV clamping and shutdown
+ ** - delay
+ ** - verify no short circuits by looking for vbath/2
+ ** - clear dcdc status
+ ** - switch to analog converter with OV clamping only (no shutdown)
+ ** - select analog dcdc and disable pwrsave
+ ** - delay
+ */
+
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_LINEFEED,
+ LF_FWD_OHT); /* Force out of pwrsave mode if called in error */
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_LINEFEED,
+ LF_OPEN); /* Ensure open line before powering up converter */
+ reg = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_ENHANCE);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_ENHANCE,
+ reg&0x07); /* Disable powersave mode */
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_DCDC,
+ 0x700000L); /* In case OV or UV previously occurred */
+
+ /*
+ ** Setup converter drive polarity and charge pump enable
+ ** based on revision, bom, and converter type
+ */
+ if(pProslic->deviceId->chipRev == SI3217X_REVB)
+ {
+ error = Si3217x_RevB_ConverterSetup(pProslic);
+ }
+ else /* Add revC option here */
+ {
+ error = Si3217x_RevC_ConverterSetup(pProslic);
+ }
+
+ if(error != RC_NONE)
+ {
+ DEBUG_PRINT(pProslic, "%sChannel %d : DCDC initialization failed\n",
+ LOGPRINT_PREFIX, pProslic->channel);
+ return error;
+ }
+ //WriteRAM(pProHW,pProslic->channel,1553,0x100000L);
+ uInt16 ramAddr=1553;
+ LOGPRINT("%sRAM %04u = 0x%08X\n", LOGPRINT_PREFIX,
+ ramAddr, (unsigned int)(ReadRAM(pProHW,pProslic->channel, ramAddr)));
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_DCDC,0x600000L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_BIAS,0x200000L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_HVIC,0x200000L);
+ Delay(pProTimer,50);
+ vbath = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT);
+ vbat = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_MADC_VBAT);
+ if(vbat & 0x10000000L)
+ {
+ vbat |= 0xF0000000L;
+ }
+ printk("howard %s vbat %d, vbath %d\n", __func__, vbat, vbath);
+#if 0
+ uInt8 regAddr;
+
+
+ /*
+ NOTE: Not all ProSLICs have defined values after location 99
+ (and have 1 location after that), but for simplicity, we print them anyway...
+ */
+ for(regAddr = 0; regAddr < 127; regAddr++)
+ {
+ LOGPRINT("%sRegister %003u = 0x%02X\n", LOGPRINT_PREFIX,
+ regAddr, ReadReg(pProHW,pProslic->channel, regAddr));
+ }
+
+ for(ramAddr = 0; ramAddr < 1596; ramAddr++)
+ {
+ LOGPRINT("%sRAM %04u = 0x%08X\n", LOGPRINT_PREFIX,
+ ramAddr, (unsigned int)(ReadRAM(pProHW,pProslic->channel, ramAddr)));
+ }
+#endif
+ if(vbat < (vbath / 2))
+ {
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_DCDC,
+ 0x300000L); /* shutdown converter */
+ DEBUG_PRINT(pProslic,
+ "%sChannel %d : DCDC Short Circuit Failure - disabling channel VBAT = %d.%d\n",
+ LOGPRINT_PREFIX, pProslic->channel, (int)((vbat/SCALE_V_MADC)/1000),
+ (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ return error;
+ }
+ else /* Enable analog converter */
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_DCDC_STATUS,0L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_DCDC,0x400000L);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_ENHANCE,
+ reg); /* Restore ENHANCE */
+ Delay(pProTimer,50);
+ }
+
+ /*
+ ** - monitor vbat vs expected level (VBATH_EXPECT)
+ */
+ vbath = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT);
+ do
+ {
+ vbat = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_MADC_VBAT);
+ if(vbat & 0x10000000L)
+ {
+ vbat |= 0xF0000000L;
+ }
+ Delay(pProTimer,10);
+ }
+ while((vbat < (vbath - COMP_5V))
+ &&(timer++ < SI3217X_TIMEOUT_DCDC_UP)); /* 2 sec timeout */
+
+ DEBUG_PRINT (pProslic, "%sChannel %d : VBAT Up = %d.%d v\n",
+ LOGPRINT_PREFIX,
+ pProslic->channel,(int)((vbat/SCALE_V_MADC)/1000),
+ (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ if(timer > SI3217X_TIMEOUT_DCDC_UP)
+ {
+ /* Error handling - shutdown converter, disable channel, set error tag */
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_DCDC,
+ 0x900000L); /* shutdown converter */
+ DEBUG_PRINT (pProslic, "%sChannel %d : DCDC Power up timeout : Status=0x%08X\n",
+ LOGPRINT_PREFIX, pProslic->channel, ReadRAM(pProHW,pProslic->channel,
+ (int)SI3217X_COM_RAM_DCDC_STATUS));
+ }
+
+ return error;
+}
+
+/*
+** Functions below are defined in header file and can be called by external files
+*/
+
+/*
+**
+** PROSLIC INITIALIZATION FUNCTIONS
+**
+*/
+
+/*
+** Function: Si3217x_Init_MultiBOM
+**
+** Description:
+** - probe SPI to establish daisy chain length
+** - load patch
+** - initialize general parameters
+** - calibrate madc
+** - bring up DC/DC converters
+** - calibrate everything except madc & lb
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+int Si3217x_Init_MultiBOM (proslicChanType_ptr *pProslic, int size, int preset)
+{
+
+ if(preset < si3217x_genconf_multi_max_preset)
+ {
+ /* Copy selected General Configuration parameters to Std structure */
+ Si3217x_General_Configuration = Si3217x_General_Configuration_MultiBOM[preset];
+ }
+ else
+ {
+ return RC_INVALID_PRESET;
+ }
+
+ return Si3217x_Init(pProslic,size);
+}
+#endif
+
+/* Iterate through the number of channels to determine if it's a SLIC, DAA, or unknown. Rev ID and chiptype is
+ * also filled in.
+ */
+int SiVoice_IdentifyChannels(SiVoiceChanType_ptr *pProslic, int size,
+ int *slicCount, int *daaCount)
+{
+ int i;
+ int rc = RC_NONE;
+ SiVoiceChanType_ptr currentChannel;
+
+ TRACEPRINT( *pProslic, "size = %d\n", size);
+
+ if(slicCount)
+ {
+ *slicCount = 0;
+ }
+ if(daaCount)
+ {
+ *daaCount = 0;
+ }
+
+ for(i = 0; i < size; i++)
+ {
+ currentChannel = pProslic[i];
+ /* SiVoice_SWInitChan() fills in the chipType initially with something the user provided, fill it
+ * in with the correct info.. The GetChipInfo may probe registers to compare them with their
+ * initial values, so this function MUST only be called after a chipset reset.
+ */
+#ifdef SI3217X
+ if (currentChannel->deviceId->chipType >= SI32171
+ && currentChannel->deviceId->chipType <= SI32179)
+ {
+ rc = Si3217x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3218X
+ if (currentChannel->deviceId->chipType >= SI32180
+ && currentChannel->deviceId->chipType <= SI32189)
+ {
+ rc = Si3218x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3226X
+ if (currentChannel->deviceId->chipType >= SI32260
+ && currentChannel->deviceId->chipType <= SI32269)
+ {
+ rc = Si3226x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3228X
+ if (currentChannel->deviceId->chipType >= SI32280
+ && currentChannel->deviceId->chipType <= SI32289)
+ {
+ rc = Si3228x_GetChipInfo(currentChannel);
+ }
+#endif
+ if(rc != RC_NONE)
+ {
+ return rc;
+ }
+
+ currentChannel->channelType = ProSLIC_identifyChannelType(currentChannel);
+ if(currentChannel->channelType == PROSLIC)
+ {
+ if(slicCount)
+ {
+ (*slicCount)++;
+ }
+ }
+ else if(currentChannel->channelType == DAA)
+ {
+ if(daaCount)
+ {
+ (*daaCount)++;
+ }
+ }
+#ifdef ENABLE_DEBUG
+ {
+ const char *dev_type = "UNKNOWN";
+ if(currentChannel->channelType == PROSLIC)
+ {
+ dev_type = "PROSLIC";
+ }
+ else if(currentChannel->channelType == DAA)
+ {
+ dev_type = "DAA";
+ }
+ LOGPRINT("%sChannel %d: Type = %s Rev = %d\n",
+ LOGPRINT_PREFIX, currentChannel->channel, dev_type,
+ currentChannel->deviceId->chipRev);
+
+ }
+#endif /* ENABLE_DEBUG */
+ }
+ return RC_NONE;
+}
+
+
+/*
+** Function: Si3217x_Init_with_Options
+**
+** Description:
+** - probe SPI to establish daisy chain length
+** - load patch
+** - initialize general parameters
+** - calibrate madc
+** - bring up DC/DC converters
+** - calibrate everything except madc & lb
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+
+int Si3217x_Init_with_Options (proslicChanType_ptr *pProslic, int size,
+ initOptionsType init_opt)
+{
+ /*
+ ** This function will initialize the chipRev and chipType members in pProslic
+ ** as well as load the initialization structures.
+ */
+ uInt8 data;
+ uInt8 calSetup[] = {0x00, 0x00, 0x01, 0x80};
+ int j,k;
+ int device_count = 0;
+ const proslicPatch *patch;
+ uInt8 status;
+
+ LOGPRINT("%s(%d) size = %d init_opt = %d\n", __FUNCTION__, __LINE__, size,
+ init_opt);
+
+ if( (init_opt == INIT_REINIT) || (init_opt == INIT_SOFTRESET) )
+ {
+ ProSLIC_ReInit_helper(pProslic, size, init_opt, SI3217X_CHAN_PER_DEVICE);
+ }
+ else
+ {
+ if( (SiVoice_IdentifyChannels(pProslic, size, &device_count, NULL) != RC_NONE)
+ ||(device_count == 0) )
+ {
+ DEBUG_PRINT(*pProslic, "%s: failed to detect any ProSLICs", LOGPRINT_PREFIX);
+ return RC_SPI_FAIL;
+ }
+
+ /*
+ ** Probe each channel and enable all channels that respond
+ */
+ for (k=0; k<size; k++)
+ {
+ if ((pProslic[k]->channelEnable)
+ &&(pProslic[k]->channelType == PROSLIC))
+ {
+ if ( (ProSLIC_VerifyMasterStat(pProslic[k]) != RC_NONE)
+ || (ProSLIC_VerifyControlInterface(pProslic[k]) != RC_NONE) )
+ {
+ pProslic[k]->channelEnable = 0;
+ pProslic[k]->error = RC_SPI_FAIL;
+ return pProslic[k]->error; /* Halt init if SPI fail */
+ }
+ }
+ }
+ } /* init_opt */
+
+
+ if( (init_opt != INIT_NO_PATCH_LOAD) && (init_opt != INIT_SOFTRESET) )
+ {
+ /*
+ ** Load patch (load on every channel since single channel device)
+ */
+ for (k=0; k<size; k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+
+ /* Select Patch*/
+ printk("howard %s, chipRev %d, bom_option %d\n", __func__,
+ pProslic[k]->deviceId->chipRev, Si3217x_General_Configuration.bom_option);
+ if (pProslic[k]->deviceId->chipRev == SI3217X_REVB )
+ {
+ status = (uInt8) Si3217x_RevB_SelectPatch(pProslic[k],&patch);
+ }
+ else if (pProslic[k]->deviceId->chipRev == SI3217X_REVC )
+ {
+ status = (uInt8) Si3217x_RevC_SelectPatch(pProslic[k],&patch);
+ }
+ else
+ {
+ DEBUG_PRINT (pProslic[k], "%sChannel %d : Unsupported Device Revision (%d)\n",
+ LOGPRINT_PREFIX,
+ pProslic[k]->channel,pProslic[k]->deviceId->chipRev );
+ pProslic[k]->channelEnable = 0;
+ pProslic[k]->error = RC_UNSUPPORTED_DEVICE_REV;
+ return RC_UNSUPPORTED_DEVICE_REV;
+ }
+
+ data = 1; /* Use this as a flag to see if we need to load the patch */
+ /* Check if the patch is different than we expect */
+ if(init_opt == INIT_SOFTRESET)
+ {
+ uInt32 patchData;
+ patchData = pProslic[k]->ReadRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,
+ SI3217X_COM_RAM_PATCHID);
+
+ if( patchData == patch->patchSerial)
+ {
+ data = 0;
+ }
+ }
+
+ /* Load Patch */
+ if(status == RC_NONE)
+ {
+ if(data == 1)
+ {
+ Si3217x_LoadPatch(pProslic[k],patch);
+ }
+ }
+ else
+ {
+ return status;
+ }
+
+ /* Optional Patch Verification */
+#ifndef DISABLE_VERIFY_PATCH
+ if(data == 1)
+ {
+ data = (uInt8)Si3217x_VerifyPatch(pProslic[k],patch);
+ if (data)
+ {
+ pProslic[k]->channelEnable=0;
+ pProslic[k]->error = RC_PATCH_ERR;
+ }
+ }
+#endif
+ } /* channel == PROSLIC */
+ } /* for all channles */
+ }/* init_opt - need to reload patch */
+
+ /*
+ ** Load general parameters - includes all BOM dependencies
+ */
+ for (k=0; k<size; k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ if(pProslic[k]->deviceId->chipRev == SI3217X_REVB)
+ {
+ Si3217x_RevB_GenParamUpdate(pProslic[k],INIT_SEQ_PRE_CAL);
+ }
+ else
+ {
+ Si3217x_RevC_GenParamUpdate(pProslic[k],INIT_SEQ_PRE_CAL);
+ }
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX,pProslic[k]->channel,
+ SI3217X_COM_RAM_IRING_LIM,SI3217X_IRING_LIM_MAX);
+ }
+ }
+
+ if((init_opt != INIT_NO_CAL)
+ && (init_opt != INIT_SOFTRESET)) /* Must recal on single channel devices */
+ {
+ /*
+ ** Calibrate (madc offset)
+ */
+ ProSLIC_Calibrate(pProslic,size,calSetup,TIMEOUT_MADC_CAL);
+ }/* init_opt */
+
+ /*
+ ** Bring up DC/DC converters sequentially to minimize
+ ** peak power demand on VDC
+ */
+
+ for (k=0; k<size; k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ pProslic[k]->error = Si3217x_PowerUpConverter(pProslic[k]);
+ }
+ }
+
+ if((init_opt != INIT_NO_CAL) && (init_opt != INIT_SOFTRESET))
+ {
+ /*
+ ** Calibrate remaining cals (except madc, lb)
+ ** ASSUME: same chip revs across selection... for the given
+ ** general configuration, this is usually a safe assumption.
+ */
+ data = (*pProslic)->deviceId->chipRev;
+ j = 0;
+ /* We need to iterate through and find any mismatches in revs, stop
+ when we do and do a calibrate with the prior block's value.
+ */
+ for(k= 0; k < size; k++)
+ {
+ if(pProslic[k]->deviceId->chipRev != data)
+ {
+ if(data == SI3217X_REVB)
+ {
+ calSetup[1] = SI3217XB_CAL_STD_CALR1;
+ calSetup[2] = SI3217XB_CAL_STD_CALR2;
+ }
+ else /* ASSUME: Rev C or greater */
+ {
+ calSetup[1] = SI3217XC_CAL_STD_CALR1;
+ calSetup[2] = SI3217XC_CAL_STD_CALR2;
+ }
+ ProSLIC_Calibrate(&pProslic[j],(k-j),calSetup,TIMEOUT_GEN_CAL);
+ j = k;
+ data = pProslic[k]->deviceId->chipRev;
+ }
+ }
+
+ /* Handle the last block of chips needing to be calibrated */
+ if(data == SI3217X_REVB)
+ {
+ calSetup[1] = SI3217XB_CAL_STD_CALR1;
+ calSetup[2] = SI3217XB_CAL_STD_CALR2;
+ }
+ else /* ASSUME: Rev C or greater */
+ {
+ calSetup[1] = SI3217XC_CAL_STD_CALR1;
+ calSetup[2] = SI3217XC_CAL_STD_CALR2;
+ }
+ ProSLIC_Calibrate(&pProslic[j],(size-j),calSetup,TIMEOUT_GEN_CAL);
+ }
+
+ /*
+ ** Apply post calibration general parameters
+ */
+ for (k=0; k<size; k++)
+ {
+
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ if(pProslic[k]->deviceId->chipRev == SI3217X_REVB)
+ {
+ Si3217x_RevB_GenParamUpdate(pProslic[k],INIT_SEQ_POST_CAL);
+ }
+ else
+ {
+ Si3217x_RevC_GenParamUpdate(pProslic[k],INIT_SEQ_POST_CAL);
+ }
+ }
+
+ /* Restore linefeed state after initialization for REINIT or SOFTRESET */
+ if((init_opt == INIT_REINIT) || (init_opt == INIT_SOFTRESET))
+ {
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX,pProslic[k]->channel,
+ SI3217X_COM_REG_LINEFEED,pProslic[k]->scratch);
+ }
+ }
+
+ /*
+ ** If any channel incurred a non-fatal error, return
+ ** RC_NON_FATAL_INIT_ERR to trigger user to read each channel's
+ ** error status
+ */
+ for (k=0; k<size; k++)
+ {
+ if(pProslic[k]->error != RC_NONE)
+ {
+ return RC_NON_FATAL_INIT_ERR;
+ }
+ }
+ DEBUG_PRINT(*pProslic, "%s: ProSLIC initialization completed.\n",
+ LOGPRINT_PREFIX);
+ return RC_NONE;
+}
+
+/*
+** Function: Si3217x_EnableInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+**
+** Returns:
+** 0
+*/
+int Si3217x_EnableInterrupts (proslicChanType_ptr pProslic)
+{
+ uInt8 i;
+#ifdef GCI_MODE
+ uInt8 data;
+#endif
+ /* Clear pending interrupts first */
+ for(i = SI3217X_COM_REG_IRQ1; i < SI3217X_COM_REG_IRQ4; i++)
+ {
+#ifdef GCI_MODE
+ data = ReadReg(pProHW,pProslic->channel, i);
+ WriteReg(pProHW,pProslic->channel,i,data); /*clear interrupts (gci only)*/
+#else
+ (void)ReadReg(pProHW,pProslic->channel, i);
+#endif
+
+ }
+
+ if (pProslic->deviceId->chipRev == SI3217X_REVA) /*madc_vbat broken in rev a*/
+ {
+ WriteReg (pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN1,
+ Si3217x_General_Configuration.irqen1&0x7f);
+ }
+ else
+ {
+ WriteReg (pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN1,
+ Si3217x_General_Configuration.irqen1);
+ }
+
+ WriteReg (pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN2,
+ Si3217x_General_Configuration.irqen2);
+
+ if (pProslic->deviceId->chipRev == SI3217X_REVA) /*madc_vbat broken in rev a*/
+ {
+ WriteReg (pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN3,
+ Si3217x_General_Configuration.irqen3&0xC0);
+ }
+ else
+ {
+ WriteReg (pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN3,
+ Si3217x_General_Configuration.irqen3);
+ }
+
+ WriteReg (pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN4,
+ Si3217x_General_Configuration.irqen4);
+
+ return RC_NONE;
+}
+
+/*
+**
+** PROSLIC CONFIGURATION FUNCTIONS
+**
+*/
+
+/*
+** Function: Si3217x_RingSetup
+**
+** Description:
+** configure ringing
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** preset: ring preset
+**
+** Returns:
+** 0
+*/
+#ifndef DISABLE_RING_SETUP
+int Si3217x_RingSetup (proslicChanType *pProslic, int preset)
+{
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RTPER,
+ Si3217x_Ring_Presets[preset].rtper);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RINGFR,
+ Si3217x_Ring_Presets[preset].freq);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RINGAMP,
+ Si3217x_Ring_Presets[preset].amp);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RINGPHAS,
+ Si3217x_Ring_Presets[preset].phas);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RINGOF,
+ Si3217x_Ring_Presets[preset].offset);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_RING,
+ Si3217x_Ring_Presets[preset].slope_ring);
+
+ if(Si3217x_Ring_Presets[preset].iring_lim > SI3217X_IRING_LIM_MAX)
+ {
+ Si3217x_Ring_Presets[preset].iring_lim = SI3217X_IRING_LIM_MAX;
+ }
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_IRING_LIM,
+ Si3217x_Ring_Presets[preset].iring_lim);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RTACTH,
+ Si3217x_Ring_Presets[preset].rtacth);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RTDCTH,
+ Si3217x_Ring_Presets[preset].rtdcth);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RTACDB,
+ Si3217x_Ring_Presets[preset].rtacdb);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RTDCDB,
+ Si3217x_Ring_Presets[preset].rtdcdb);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VOV_RING_BAT,
+ Si3217x_Ring_Presets[preset].vov_ring_bat);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VOV_RING_GND,
+ Si3217x_Ring_Presets[preset].vov_ring_gnd);
+
+#ifndef NOCLAMP_VBATR
+ /* Always limit VBATR_EXPECT to the general configuration maximum */
+ if(Si3217x_Ring_Presets[preset].vbatr_expect >
+ Si3217x_General_Configuration.vbatr_expect)
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATR_EXPECT,
+ Si3217x_General_Configuration.vbatr_expect);
+ DEBUG_PRINT(pProslic,
+ "%sRingSetup : VBATR_EXPECT : Clamped to Gen Conf Limit\n",LOGPRINT_PREFIX);
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATR_EXPECT,
+ Si3217x_Ring_Presets[preset].vbatr_expect);
+ }
+
+#else
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATR_EXPECT,
+ Si3217x_Ring_Presets[preset].vbatr_expect);
+#endif
+
+
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_RINGTALO,
+ Si3217x_Ring_Presets[preset].talo);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_RINGTAHI,
+ Si3217x_Ring_Presets[preset].tahi);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_RINGTILO,
+ Si3217x_Ring_Presets[preset].tilo);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_RINGTIHI,
+ Si3217x_Ring_Presets[preset].tihi);
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBAT_TRACK_MIN_RNG,
+ Si3217x_Ring_Presets[preset].dcdc_vref_min_rng);
+
+ /*
+ ** LPR Handler for RevB/RevC Differences
+ **
+ ** If revC and USERSTAT == 0x01, adjust RINGCON and clear USERSTAT
+ */
+ if ((pProslic->deviceId->chipRev == SI3217X_REVC )
+ &&(Si3217x_Ring_Presets[preset].userstat == 0x01))
+ {
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_RINGCON,
+ (0x80|Si3217x_Ring_Presets[preset].ringcon) & ~(0x40));
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_USERSTAT,0x00);
+ }
+ else
+ {
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_RINGCON,
+ Si3217x_Ring_Presets[preset].ringcon);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_USERSTAT,
+ Si3217x_Ring_Presets[preset].userstat);
+ }
+
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VCM_RING,
+ Si3217x_Ring_Presets[preset].vcm_ring);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VCM_RING_FIXED,
+ Si3217x_Ring_Presets[preset].vcm_ring_fixed);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_DELTA_VCM,
+ Si3217x_Ring_Presets[preset].delta_vcm);
+
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_DCDC_RNGTYPE,
+ Si3217x_Ring_Presets[preset].dcdc_rngtype);
+
+
+ /*
+ ** If multi bom supported **AND** a buck boost converter
+ ** is being used, force dcdc_rngtype to be fixed.
+ */
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+#define DCDC_RNGTYPE_BKBT 0L
+ /* Automatically adjust DCDC_RNGTYPE */
+ if(Si3217x_General_Configuration.bom_option == BO_DCDC_BUCK_BOOST)
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_DCDC_RNGTYPE,
+ DCDC_RNGTYPE_BKBT);
+ }
+#endif
+
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_ZsynthSetup
+**
+** Description:
+** configure impedance synthesis
+*/
+#ifndef DISABLE_ZSYNTH_SETUP
+int Si3217x_ZsynthSetup (proslicChanType *pProslic, int preset)
+{
+ uInt8 lf;
+ uInt8 cal_en = 0;
+ uInt16 timer = 500;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ lf = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_LINEFEED);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_LINEFEED,0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C0,
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C1,
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C2,
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C3,
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c3);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C0,
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C1,
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C2,
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C3,
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c3);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECFIR_C2,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECFIR_C3,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_c3);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECFIR_C4,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_c4);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECFIR_C5,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_c5);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECFIR_C6,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_c6);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECFIR_C7,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_c7);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECFIR_C8,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_c8);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECFIR_C9,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_c9);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECIIR_B0,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_b0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECIIR_B1,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_b1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECIIR_A1,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_a1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ECIIR_A2,
+ Si3217x_Impedance_Presets[preset].hybrid.ecfir_a2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ZSYNTH_A1,
+ Si3217x_Impedance_Presets[preset].zsynth.zsynth_a1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ZSYNTH_A2,
+ Si3217x_Impedance_Presets[preset].zsynth.zsynth_a2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ZSYNTH_B1,
+ Si3217x_Impedance_Presets[preset].zsynth.zsynth_b1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ZSYNTH_B0,
+ Si3217x_Impedance_Presets[preset].zsynth.zsynth_b0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ZSYNTH_B2,
+ Si3217x_Impedance_Presets[preset].zsynth.zsynth_b2);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_RA,
+ Si3217x_Impedance_Presets[preset].zsynth.ra);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACGAIN,
+ Si3217x_Impedance_Presets[preset].txgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACGAIN_SAVE,
+ Si3217x_Impedance_Presets[preset].rxgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACGAIN,
+ Si3217x_Impedance_Presets[preset].rxgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_B0_1,
+ Si3217x_Impedance_Presets[preset].rxachpf_b0_1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_B1_1,
+ Si3217x_Impedance_Presets[preset].rxachpf_b1_1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_A1_1,
+ Si3217x_Impedance_Presets[preset].rxachpf_a1_1);
+
+ /*
+ ** Scale based on desired gain plan
+ */
+ Si3217x_dbgSetTXGain(pProslic,Si3217x_Impedance_Presets[preset].txgain_db,
+ preset,TXACGAIN_SEL);
+ Si3217x_dbgSetRXGain(pProslic,Si3217x_Impedance_Presets[preset].rxgain_db,
+ preset,RXACGAIN_SEL);
+ Si3217x_TXAudioGainSetup(pProslic,TXACGAIN_SEL);
+ Si3217x_RXAudioGainSetup(pProslic,RXACGAIN_SEL);
+
+ /*
+ ** Perform Zcal in case OHT used (eg. no offhook event to trigger auto Zcal)
+ */
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_CALR0,0x00);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_CALR1,0x40);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_CALR2,0x00);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_CALR3,0x80); /* start cal */
+
+ /* Wait for zcal to finish */
+ do
+ {
+ cal_en = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_CALR3);
+ Delay(pProTimer,1);
+ timer--;
+ }
+ while((cal_en&0x80)&&(timer>0));
+
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_LINEFEED,lf);
+
+ if(timer > 0)
+ {
+ return RC_NONE;
+ }
+ else
+ {
+ return RC_CAL_TIMEOUT;
+ }
+}
+#endif
+
+/*
+** Function: PROSLIC_GciCISetup
+**
+** Description:
+** configure CI bits (GCI mode)
+*/
+#ifndef DISABLE_CI_SETUP
+int Si3217x_GciCISetup (proslicChanType *pProslic, int preset)
+{
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_GCI_CI,
+ Si3217x_CI_Presets[preset].gci_ci);
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+*/
+int Si3217x_TXAudioGainSetup (proslicChanType *pProslic, int preset)
+{
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACGAIN,
+ Si3217x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C0,
+ Si3217x_audioGain_Presets[preset].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C1,
+ Si3217x_audioGain_Presets[preset].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C2,
+ Si3217x_audioGain_Presets[preset].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C3,
+ Si3217x_audioGain_Presets[preset].aceq_c3);
+
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+*/
+int Si3217x_RXAudioGainSetup (proslicChanType *pProslic, int preset)
+{
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACGAIN_SAVE,
+ Si3217x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACGAIN,
+ Si3217x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C0,
+ Si3217x_audioGain_Presets[preset].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C1,
+ Si3217x_audioGain_Presets[preset].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C2,
+ Si3217x_audioGain_Presets[preset].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C3,
+ Si3217x_audioGain_Presets[preset].aceq_c3);
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: PROSLIC_AudioGainScale
+**
+** Description:
+** Multiply path gain by passed value for PGA and EQ scale (no reference to dB,
+** multiply by a scale factor)
+*/
+int Si3217x_AudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale,int rx_tx_sel)
+{
+
+ if(rx_tx_sel == TXACGAIN_SEL)
+ {
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].acgain =
+ (Si3217x_Impedance_Presets[preset].txgain/1000)*pga_scale;
+ if (Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c0 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c1 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c2 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c3 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+ }
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].aceq_c0 = ((int32)
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c0/1000)*eq_scale;
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].aceq_c1 = ((int32)
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c1/1000)*eq_scale;
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].aceq_c2 = ((int32)
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c2/1000)*eq_scale;
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].aceq_c3 = ((int32)
+ Si3217x_Impedance_Presets[preset].audioEQ.txaceq_c3/1000)*eq_scale;
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACGAIN,
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C0,
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C1,
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C2,
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACEQ_C3,
+ Si3217x_audioGain_Presets[TXACGAIN_SEL].aceq_c3);
+ }
+ else
+ {
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].acgain =
+ (Si3217x_Impedance_Presets[preset].rxgain/1000)*pga_scale;
+ if (Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+ }
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].aceq_c0 = ((int32)
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c0/1000)*eq_scale;
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].aceq_c1 = ((int32)
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c1/1000)*eq_scale;
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].aceq_c2 = ((int32)
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c2/1000)*eq_scale;
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].aceq_c3 = ((int32)
+ Si3217x_Impedance_Presets[preset].audioEQ.rxaceq_c3/1000)*eq_scale;
+
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACGAIN_SAVE,
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACGAIN,
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C0,
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C1,
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C2,
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACEQ_C3,
+ Si3217x_audioGain_Presets[RXACGAIN_SEL].aceq_c3);
+ }
+ return 0;
+}
+int Si3217x_TXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale)
+{
+ return Si3217x_AudioGainScale(pProslic,preset,pga_scale,eq_scale,TXACGAIN_SEL);
+}
+int Si3217x_RXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale)
+{
+ return Si3217x_AudioGainScale(pProslic,preset,pga_scale,eq_scale,RXACGAIN_SEL);
+}
+
+
+/*
+** Function: PROSLIC_DCFeedSetup
+**
+** Description:
+** configure dc feed
+*/
+#ifndef DISABLE_DCFEED_SETUP
+int Si3217x_DCFeedSetupCfg (proslicChanType *pProslic, Si3217x_DCfeed_Cfg *cfg,
+ int preset)
+{
+ uInt8 lf;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ lf = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_LINEFEED);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_LINEFEED,0);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_VLIM,
+ cfg[preset].slope_vlim);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_RFEED,
+ cfg[preset].slope_rfeed);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_ILIM,
+ cfg[preset].slope_ilim);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_DELTA1,
+ cfg[preset].delta1);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_DELTA2,
+ cfg[preset].delta2);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_V_VLIM,cfg[preset].v_vlim);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_V_RFEED,cfg[preset].v_rfeed);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_V_ILIM,cfg[preset].v_ilim);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_CONST_RFEED,
+ cfg[preset].const_rfeed);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_CONST_ILIM,
+ cfg[preset].const_ilim);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_I_VLIM,cfg[preset].i_vlim);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LCRONHK,cfg[preset].lcronhk);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LCROFFHK,
+ cfg[preset].lcroffhk);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LCRDBI,cfg[preset].lcrdbi);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LONGHITH,
+ cfg[preset].longhith);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LONGLOTH,
+ cfg[preset].longloth);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LONGDBI,cfg[preset].longdbi);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LCRMASK,cfg[preset].lcrmask);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LCRMASK_POLREV,
+ cfg[preset].lcrmask_polrev);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LCRMASK_STATE,
+ cfg[preset].lcrmask_state);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_LCRMASK_LINECAP,
+ cfg[preset].lcrmask_linecap);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VCM_OH,cfg[preset].vcm_oh);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VOV_BAT,cfg[preset].vov_bat);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VOV_GND,cfg[preset].vov_gnd);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_LINEFEED,lf);
+
+ return RC_NONE;
+}
+
+#endif
+
+/*
+** Function: PROSLIC_GPIOSetup
+**
+** Description:
+** configure gpio
+*/
+#ifndef DISABLE_GPIO_SETUP
+int Si3217x_GPIOSetup (proslicChanType *pProslic)
+{
+ uInt8 data;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ data = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_GPIO);
+ data |= Si3217x_GPIO_Configuration.outputEn << 4;
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_GPIO,data);
+ data = Si3217x_GPIO_Configuration.analog << 4;
+ data |= Si3217x_GPIO_Configuration.direction;
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_GPIO_CFG1,data);
+ data = Si3217x_GPIO_Configuration.manual << 4;
+ data |= Si3217x_GPIO_Configuration.polarity;
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_GPIO_CFG2,data);
+ data |= Si3217x_GPIO_Configuration.openDrain;
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_GPIO_CFG3,data);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+#ifndef DISABLE_PULSE_SETUP
+int Si3217x_PulseMeterSetup (proslicChanType *pProslic, int preset)
+{
+ int retval = 0;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ if(pProslic->deviceId->chipRev == SI3217X_REVB)
+ {
+ retval = Si3217x_RevB_PulseMeterSetup(pProslic, preset);
+ }
+ else
+ {
+ retval = Si3217x_RevC_PulseMeterSetup(pProslic, preset);
+ }
+
+ return retval;
+}
+#endif
+
+/*
+** Function: PROSLIC_PCMSetup
+**
+** Description:
+** configure pcm
+*/
+#ifndef DISABLE_PCM_SETUP
+int Si3217x_PCMSetup(proslicChanType *pProslic, int preset)
+{
+ uInt8 regTemp;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ if (Si3217x_PCM_Presets[preset].widebandEn)
+ {
+ if ((pProslic->deviceId->chipType == SI32171)
+ ||( pProslic->deviceId->chipType == SI32172))
+ {
+ return RC_UNSUPPORTED_FEATURE;
+ }
+
+ /* TXIIR settings */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B0_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B1_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A2_3,0x19D5F700L);
+ /* RXIIR settings */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B0_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B1_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A2_3,0x19D5F700L);
+ /*
+ ** RXHPF
+ ** Note: Calling ProSLIC_ZsynthSetup() will overwrite some
+ ** of these values. ProSLIC_PCMSetup() should always
+ ** be called after loading coefficients when using
+ ** wideband mode
+ */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_B0_1,0x7CFF900L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_B1_1,0x18300700L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_A1_1,0x79FF201L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_B0_2,0x7CEDA1DL);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_B1_2,0x106320D4L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_B2_2,0x7CEDA1DL);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_A1_2,0xF9A910FL);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_A2_2,0x185FFDA8L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACHPF_GAIN,0x08000000L);
+ /* TXHPF */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_B0_1,0x0C7FF4CEL);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_B1_1,0x13800B32L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_A1_1,0x079FF201L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_B0_2,0x030FDD10L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_B1_2,0x19E0996CL);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_B2_2,0x030FDD10L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_A1_2,0x0F9A910FL);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_A2_2,0x185FFDA8L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_GAIN,0x0CD30000L);
+
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIGCON);
+#ifndef DISABLE_HPF_WIDEBAND
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIGCON,
+ regTemp&~(0xC)); /* Enable HPF */
+#else
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIGCON,
+ regTemp|(0xC)); /* Disable HPF */
+#endif
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_ENHANCE);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_ENHANCE,regTemp|1);
+ }
+ else
+ {
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIGCON);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIGCON,regTemp&~(0xC));
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B0_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B1_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACIIR_A2_3,0x19D5F700L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B0_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B1_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_RXACIIR_A2_3,0x19D5F700L);
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_ENHANCE);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_ENHANCE,regTemp&~(1));
+ }
+ regTemp = Si3217x_PCM_Presets[preset].pcmFormat;
+ regTemp |= Si3217x_PCM_Presets[preset].pcm_tri << 5;
+ regTemp |= Si3217x_PCM_Presets[preset].alaw_inv << 2;
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_PCMMODE,regTemp);
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_PCMTXHI);
+ regTemp &= 3;
+ regTemp |= Si3217x_PCM_Presets[preset].tx_edge<<4;
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_PCMTXHI,regTemp);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+**
+** PROSLIC CONTROL FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_SetLinefeedStatus
+**
+** Description:
+** Sets linefeed state
+*/
+int Si3217x_SetLinefeedStatus (proslicChanType *pProslic,uInt8 newLinefeed)
+{
+ uInt8 regTemp;
+ int reg = 0;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ reg = SI3217X_COM_REG_LINEFEED;
+ printk("write reg %d\n", reg);
+ WriteReg (pProHW, pProslic->channel, SI3217X_COM_REG_LINEFEED,newLinefeed);
+ if ((newLinefeed&0xf) == LF_RINGING)
+ {
+ /*disable vbat interrupt during ringing*/
+ reg = SI3217X_COM_REG_IRQEN1;
+ printk("read write reg %d\n", reg);
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN1);
+ WriteReg (pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN1,regTemp&(~0x80));
+ }
+ else
+ {
+ reg = SI3217X_COM_REG_IRQEN1;
+ printk("write reg %d\n", reg);
+ WriteReg (pProHW,pProslic->channel,SI3217X_COM_REG_IRQEN1,
+ Si3217x_General_Configuration.irqen1);
+ }
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_MWISetup
+**
+** Description:
+** Modify default vpk or lcrmask_mwi. Passing 0 will result in the parameter
+** not being modified.
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3217x_MWISetup (proslicChanType *pProslic,uInt16 vpk_mag,
+ uInt16 lcrmask_mwi)
+{
+ uInt32 ram_val;
+
+ /* Verify MWI not enabled - cannot make changes while enabled */
+ if(ReadReg(pProHW,pProslic->channel,
+ SI3217X_COM_REG_USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ return RC_MWI_IN_USE;
+ }
+
+ /* Voltage mod */
+ if(vpk_mag > 0) /* Skip if 0 passed */
+ {
+ /* Clamp supplied value to allowable range */
+ if(vpk_mag > SIL_MWI_VPK_MAX)
+ {
+ vpk_mag = SIL_MWI_VPK_MAX;
+ }
+ if(vpk_mag < SIL_MWI_VPK_MIN)
+ {
+ vpk_mag = SIL_MWI_VPK_MIN;
+ }
+ ram_val = vpk_mag * SCALE_V_MADC * 1000L;
+ WriteRAM(pProHW,pProslic->channel,SI3217X_PRAM_VBATH_NEON,ram_val);
+ }
+
+ /* LCRMASK mod */
+ if(lcrmask_mwi > 0) /* Skip if 0 passed */
+ {
+ /* Clamp supplied value to allowable range */
+ if(lcrmask_mwi > SIL_MWI_LCRMASK_MAX)
+ {
+ lcrmask_mwi = SIL_MWI_LCRMASK_MAX;
+ }
+ if(lcrmask_mwi < SIL_MWI_LCRMASK_MIN)
+ {
+ lcrmask_mwi = SIL_MWI_LCRMASK_MIN;
+ }
+ ram_val = lcrmask_mwi * SIL_MWI_LCRMASK_SCALE;
+ WriteRAM(pProHW,pProslic->channel,SI3217X_PRAM_LCRMASK_MWI,ram_val);
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWIEnable
+**
+** Description:
+** Enables MWI feature
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3217x_MWIEnable (proslicChanType *pProslic)
+{
+ uInt8 val;
+
+ /*
+ ** Check for conditions that would prevent enabling MWI
+ */
+ ProSLIC_ReadHookStatus(pProslic,&val);
+ if(val != PROSLIC_ONHOOK)
+ {
+ return RC_MWI_ENABLE_FAIL;
+ }
+ else
+ {
+ /* Clear DIAG1 and set USERSTAT enable bit */
+ ProSLIC_SetPowersaveMode(pProslic,PWRSAVE_DISABLE);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIAG1,SIL_MWI_TOGGLE_LOW);
+ val = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_USERSTAT);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_USERSTAT,
+ val|SIL_MWI_USTAT_SET);
+ }
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWIDisable
+**
+** Description:
+** Disables MWI feature
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3217x_MWIDisable (proslicChanType *pProslic)
+{
+ uInt8 val;
+
+ /* Clear DIAG1 and USERSTAT enable bit */
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIAG1,SIL_MWI_TOGGLE_LOW);
+ val = ReadReg(pProHW,pProslic->channel,SI3217X_COM_REG_USERSTAT);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_USERSTAT,
+ val&SIL_MWI_USTAT_CLEAR);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_SetMWIState
+**
+** Description:
+** Set MWI State. Must be enabled via ProSLIC_MWIEnable prior
+** to calling this function
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3217x_SetMWIState(proslicChanType *pProslic,uInt8 flash_on)
+{
+
+ /* Only continue if MWI is enabled */
+ if(ReadReg(pProHW,pProslic->channel,
+ SI3217X_COM_REG_USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ if(flash_on)
+ {
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIAG1,SIL_MWI_TOGGLE_HIGH);
+ }
+ else
+ {
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIAG1,SIL_MWI_TOGGLE_LOW);
+ }
+ }
+ else
+ {
+ return RC_MWI_NOT_ENABLED;
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_SetMWIState_ramp
+**
+** Description:
+** Set MWI State with option for number of ramp steps. Must be enabled via ProSLIC_MWIEnable prior
+** to calling this function
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3217x_SetMWIState_ramp(proslicChanType *pProslic,uInt8 flash_on,
+ uInt8 step_delay,uInt8 step_num)
+{
+ uInt32 vbath;
+ uInt32 vbath_low;
+ uInt32 vpk_mag;
+ int i=0;
+
+ /* Only continue if MWI is enabled */
+ if(ReadReg(pProHW,pProslic->channel,
+ SI3217X_COM_REG_USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ vpk_mag = ReadRAM(pProHW,pProslic->channel,SI3217X_PRAM_VBATH_NEON);
+ vbath_low = ReadRAM(pProHW,pProslic->channel,SI3217X_PRAM_VBATH_EXPECT_SAVE);
+
+ if(flash_on)
+ {
+ vbath = ReadRAM(pProHW,pProslic->channel,SI3217X_PRAM_VBATH_EXPECT_SAVE);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT,vbath);
+
+ for(i=0; i<step_num; i++)
+ {
+ Delay(pProTimer,step_delay);
+ vbath += (vpk_mag - vbath_low)/step_num;
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT,vbath);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIAG1,SIL_MWI_TOGGLE_HIGH);
+
+ }
+ }
+ else
+ {
+ vbath = vpk_mag;
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT,vbath);
+
+ for(i=0; i<step_num; i++)
+ {
+ Delay(pProTimer,step_delay);
+ vbath -= (vpk_mag - vbath_low)/step_num;
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT,vbath);
+ }
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_DIAG1,SIL_MWI_TOGGLE_LOW);
+ }
+ }
+ else
+ {
+ return RC_MWI_NOT_ENABLED;
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_GetMWIState
+**
+** Description:
+** Read MWI State. Must be enabled via ProSLIC_MWIEnable prior
+** to calling this function
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3217x_GetMWIState(proslicChanType *pProslic)
+{
+
+ /* Only continue if MWI is enabled */
+ if(ReadReg(pProHW,pProslic->channel,
+ SI3217X_COM_REG_USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ if(ReadReg(pProHW,pProslic->channel,
+ SI3217X_COM_REG_DIAG1) & SIL_MWI_TOGGLE_HIGH)
+ {
+ return SIL_MWI_FLASH_ON;
+ }
+ else
+ {
+ return SIL_MWI_FLASH_OFF;
+ }
+ }
+ else
+ {
+ return RC_MWI_NOT_ENABLED;
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWI
+**
+** Description:
+** implements message waiting indicator
+**
+** Message waiting (neon flashing) requires modifications to vbath_expect
+** and slope_vlim. The old values are restored to turn off the lamp. We
+** assume all channels set up the same. During off-hook event lamp must
+** be disabled manually.
+**
+** Deprecated. Use Si3217x_SetMWIState()
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3217x_MWI (proslicChanType *pProslic,uInt8 lampOn)
+{
+ static int32 vbath_save = 0;
+ static int32 slope_vlim_save = 0;
+ uInt8 hkStat;
+ int32 slope_vlim_tmp;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ slope_vlim_tmp = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_VLIM);
+ Si3217x_ReadHookStatus(pProslic,&hkStat);
+
+ if (lampOn && (hkStat == PROSLIC_OFFHOOK) ) /*cant neon flash during offhook*/
+ {
+ DEBUG_PRINT (pProslic, "%sSi3217x MWI cannot operate offhook\n",
+ LOGPRINT_PREFIX);
+ return RC_LINE_IN_USE;
+ }
+
+ if (lampOn)
+ {
+ if (slope_vlim_tmp != 0x8000000L) /*check we're not already on*/
+ {
+ vbath_save = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT);
+ slope_vlim_save = slope_vlim_tmp;
+ }
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT,
+ 0x7AE147AL);/*120V*/
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_VLIM,0x8000000L);
+ }
+ else
+ {
+ if (vbath_save != 0) /*check we saved some valid value first*/
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT,vbath_save);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_SLOPE_VLIM,slope_vlim_save);
+ }
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_dbgSetDCFeed
+**
+** Description:
+** provisionally function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3217x_dbgSetDCFeed (proslicChanType *pProslic, uInt32 v_vlim_val,
+ uInt32 i_ilim_val, int32 preset)
+{
+ /* Note: * needs more descriptive return codes in the event of an out of range argument */
+ uInt16 vslope = 160;
+ uInt16 rslope = 720;
+ uInt32 vscale1 = 1386;
+ uInt32 vscale2 =
+ 1422; /* 1386x1422 = 1970892 broken down to minimize trunc err */
+ uInt32 iscale1 = 913;
+ uInt32 iscale2 = 334; /* 913x334 = 304942 */
+ uInt32 i_rfeed_val, v_rfeed_val, const_rfeed_val, i_vlim_val, const_ilim_val,
+ v_ilim_val;
+ int32 signedVal;
+ /* Set Linefeed to open state before modifying DC Feed */
+
+ /* Assumptions must be made to minimize computations. This limits the
+ ** range of available settings, but should be more than adequate for
+ ** short loop applications.
+ **
+ ** Assumtions:
+ **
+ ** SLOPE_VLIM => 160ohms
+ ** SLOPE_RFEED => 720ohms
+ ** I_RFEED => 3*I_ILIM/4
+ **
+ ** With these assumptions, the DC Feed parameters now become
+ **
+ ** Inputs: V_VLIM, I_ILIM
+ ** Constants: SLOPE_VLIM, SLOPE_ILIM, SLOPE_RFEED, SLOPE_DELTA1, SLOPE_DELTA2
+ ** Outputs: V_RFEED, V_ILIM, I_VLIM, CONST_RFEED, CONST_ILIM
+ **
+ */
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /* Validate arguments */
+ if((i_ilim_val < 15)||(i_ilim_val > 45))
+ {
+ return 1; /* need error code */
+ }
+ if((v_vlim_val < 30)||(v_vlim_val > 52))
+ {
+ return 1; /* need error code */
+ }
+
+ /* Calculate voltages in mV and currents in uA */
+ v_vlim_val *= 1000;
+ i_ilim_val *= 1000;
+
+ /* I_RFEED */
+ i_rfeed_val = (3*i_ilim_val)/4;
+
+ /* V_RFEED */
+ v_rfeed_val = v_vlim_val - (i_rfeed_val*vslope)/1000;
+
+ /* V_ILIM */
+ v_ilim_val = v_rfeed_val - (rslope*(i_ilim_val - i_rfeed_val))/1000;
+
+ /* I_VLIM */
+ i_vlim_val = (v_vlim_val*1000)/4903;
+
+ /* CONST_RFEED */
+ signedVal = v_rfeed_val * (i_ilim_val - i_rfeed_val);
+ signedVal /= (v_rfeed_val - v_ilim_val);
+ signedVal = i_rfeed_val + signedVal;
+
+ /* signedVal in uA here */
+ signedVal *= iscale1;
+ signedVal /= 100;
+ signedVal *= iscale2;
+ signedVal /= 10;
+
+ if(signedVal < 0)
+ {
+ const_rfeed_val = (signedVal)+ (1L<<29);
+ }
+ else
+ {
+ const_rfeed_val = signedVal & 0x1FFFFFFF;
+ }
+
+ /* CONST_ILIM */
+ const_ilim_val = i_ilim_val;
+
+ /* compute RAM values */
+ v_vlim_val *= vscale1;
+ v_vlim_val /= 100;
+ v_vlim_val *= vscale2;
+ v_vlim_val /= 10;
+
+ v_rfeed_val *= vscale1;
+ v_rfeed_val /= 100;
+ v_rfeed_val *= vscale2;
+ v_rfeed_val /= 10;
+
+ v_ilim_val *= vscale1;
+ v_ilim_val /= 100;
+ v_ilim_val *= vscale2;
+ v_ilim_val /= 10;
+
+ const_ilim_val *= iscale1;
+ const_ilim_val /= 100;
+ const_ilim_val *= iscale2;
+ const_ilim_val /= 10;
+
+ i_vlim_val *= iscale1;
+ i_vlim_val /= 100;
+ i_vlim_val *= iscale2;
+ i_vlim_val /= 10;
+
+ Si3217x_DCfeed_Presets[preset].slope_vlim = 0x18842BD7L;
+ Si3217x_DCfeed_Presets[preset].slope_rfeed = 0x1E8886DEL;
+ Si3217x_DCfeed_Presets[preset].slope_ilim = 0x40A0E0L;
+ Si3217x_DCfeed_Presets[preset].delta1 = 0x1EABA1BFL;
+ Si3217x_DCfeed_Presets[preset].delta2 = 0x1EF744EAL;
+ Si3217x_DCfeed_Presets[preset].v_vlim = v_vlim_val;
+ Si3217x_DCfeed_Presets[preset].v_rfeed = v_rfeed_val;
+ Si3217x_DCfeed_Presets[preset].v_ilim = v_ilim_val;
+ Si3217x_DCfeed_Presets[preset].const_rfeed = const_rfeed_val;
+ Si3217x_DCfeed_Presets[preset].const_ilim = const_ilim_val;
+ Si3217x_DCfeed_Presets[preset].i_vlim = i_vlim_val;
+
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_dbgSetDCFeedVopen
+**
+** Description:
+** provisionally function for setting up
+** dcfeed given desired open circuit voltage.
+** Entry I_ILIM value will be used.
+*/
+int Si3217x_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val,
+ int32 preset)
+{
+ uInt32 i_ilim_val;
+ uInt32 iscale1 = 913;
+ uInt32 iscale2 = 334; /* 913x334 = 304942 */
+
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /* Read present CONST_ILIM value */
+ i_ilim_val = Si3217x_DCfeed_Presets[preset].const_ilim;
+
+
+ i_ilim_val /= iscale2;
+ i_ilim_val /= iscale1;
+
+ return Si3217x_dbgSetDCFeed(pProslic,v_vlim_val,i_ilim_val,preset);
+}
+
+/*
+** Function: PROSLIC_dbgSetDCFeedIloop
+**
+** Description:
+** provisionally function for setting up
+** dcfeed given desired loop current.
+** Entry V_VLIM value will be used.
+*/
+int Si3217x_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val,
+ int32 preset)
+{
+ uInt32 v_vlim_val;
+ uInt32 vscale1 = 1386;
+ uInt32 vscale2 =
+ 1422; /* 1386x1422 = 1970892 broken down to minimize trunc err */
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /* Read present V_VLIM value */
+ v_vlim_val = Si3217x_DCfeed_Presets[preset].v_vlim;
+
+ v_vlim_val /= vscale2;
+ v_vlim_val /= vscale1;
+
+ return Si3217x_dbgSetDCFeed(pProslic,v_vlim_val,i_ilim_val, preset);
+}
+
+typedef struct
+{
+ uInt8 freq;
+ ramData ringfr; /* trise scale for trap */
+ uInt32 ampScale;
+} ProSLIC_SineRingFreqLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ ramData rtacth;
+ ramData rtper;
+ ramData rtdb;
+} ProSLIC_SineRingtripLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ uInt16 cfVal[6];
+} ProSLIC_TrapRingFreqLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ ramData rtper;
+ ramData rtdb;
+ uInt32 rtacth[6];
+} ProSLIC_TrapRingtripLookup;
+
+/*
+** Function: PROSLIC_dbgRingingSetup
+**
+** Description:
+** Provision function for setting up
+** Ring type, frequency, amplitude and dc offset.
+** Main use will be by peek/poke applications.
+*/
+int Si3217x_dbgSetRinging (proslicChanType *pProslic,
+ ProSLIC_dbgRingCfg *ringCfg, int preset)
+{
+ int errVal,i=0;
+ uInt32 vScale = 1608872L; /* (2^28/170.25)*((100+4903)/4903) */
+ ramData dcdcVminTmp;
+
+ const ProSLIC_SineRingFreqLookup sineRingFreqTable[] =
+ /* Freq RINGFR, vScale */
+ {
+ {15, 0x7F6E930L, 18968L},
+ {16, 0x7F5A8E0L, 20234L},
+ {20, 0x7EFD9D5L, 25301L},
+ {22, 0x7EC770AL, 27843L},
+ {23, 0x7EAA6E2L, 29113L},
+ {25, 0x7E6C925L, 31649L},
+ {30, 0x7DBB96BL, 38014L},
+ {34, 0x7D34155L, 42270L}, /* Actually 33.33Hz */
+ {35, 0x7CEAD72L, 44397L},
+ {40, 0x7BFA887L, 50802L},
+ {45, 0x7AEAE74L, 57233L},
+ {50, 0x79BC384L, 63693L},
+ {0,0,0}
+ }; /* terminator */
+
+ const ProSLIC_SineRingtripLookup sineRingtripTable[] =
+ /* Freq rtacth */
+ {
+ {15, 11440000L, 0x6A000L, 0x4000L },
+ {16, 10810000L, 0x64000L, 0x4000L },
+ {20, 8690000L, 0x50000L, 0x8000L },
+ {22, 7835000L, 0x48000L, 0x8000L },
+ {23, 7622000L, 0x46000L, 0x8000L },
+ {25, 6980000L, 0x40000L, 0xA000L },
+ {30, 5900000L, 0x36000L, 0xA000L },
+ {34, 10490000L, 0x60000L, 0x6000L }, /* Actually 33.33 */
+ {35, 10060000L, 0x5C000L, 0x6000L },
+ {40, 8750000L, 0x50000L, 0x8000L },
+ {45, 7880000L, 0x48000L, 0x8000L },
+ {50, 7010000L, 0x40000L, 0xA000L },
+ {0,0L}
+ }; /* terminator */
+
+ const ProSLIC_TrapRingFreqLookup trapRingFreqTable[] =
+ /* Freq multCF11 multCF12 multCF13 multCF14 multCF15 multCF16*/
+ {
+ {15, {69,122, 163, 196, 222,244}},
+ {16, {65,115, 153, 184, 208,229}},
+ {20, {52,92, 122, 147, 167,183}},
+ {22, {47,83, 111, 134, 152,166}},
+ {23, {45,80, 107, 128, 145,159}},
+ {25, {42,73, 98, 118, 133,146}},
+ {30, {35,61, 82, 98, 111,122}},
+ {34, {31,55, 73, 88, 100,110}},
+ {35, {30,52, 70, 84, 95,104}},
+ {40, {26,46, 61, 73, 83,91}},
+ {45, {23,41, 54, 65, 74,81}},
+ {50, {21,37, 49, 59, 67,73}},
+ {0,{0L,0L,0L,0L}} /* terminator */
+ };
+
+
+ const ProSLIC_TrapRingtripLookup trapRingtripTable[] =
+ /* Freq rtper rtdb rtacthCR11 rtacthCR12 rtacthCR13 rtacthCR14 rtacthCR15 rtacthCR16*/
+ {
+ {15, 0x6A000L, 0x4000L, {16214894L, 14369375L, 12933127L, 11793508L, 10874121L, 10121671L}},
+ {16, 0x64000L, 0x4000L, {15201463L, 13471289L, 12124806L, 11056414L, 10194489L, 9489067L}},
+ {20, 0x50000L, 0x6000L, {12161171L, 10777031L, 9699845L, 8845131L, 8155591L, 7591253L}},
+ {22, 0x48000L, 0x6000L, {11055610L, 9797301L, 8818041L, 8041028L, 7414174L, 6901139L}},
+ {23, 0x46000L, 0x6000L, {10574931L, 9371331L, 8434648L, 7691418L, 7091818L, 6601090L}},
+ {25, 0x40000L, 0x8000L, {9728937L, 8621625L, 7759876L, 7076105L, 6524473L, 6073003L}},
+ {30, 0x36000L, 0x8000L, {8107447L, 7184687L, 6466563L, 5896754L, 5437061L, 5060836L}},
+ {34, 0x60000L, 0x6000L, {7297432L, 6466865L, 5820489L, 5307609L, 4893844L, 4555208L}},
+ {35, 0x5C000L, 0x6000L, {6949240L, 6158303L, 5542769L, 5054361L, 4660338L, 4337859L}},
+ {40, 0x50000L, 0x6000L, {6080585L, 5388516L, 4849923L, 4422565L, 4077796L, 3795627L}},
+ {45, 0x48000L, 0x6000L, {5404965L, 4789792L, 4311042L, 3931169L, 3624707L, 3373890L}},
+ {50, 0x40000L, 0x8000L, {4864468L, 4310812L, 3879938L, 3538052L, 3262236L, 3036501L}},
+ {0,0x0L, 0x0L, {0L,0L,0L,0L}} /* terminator */
+ };
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ errVal = RC_NONE;
+
+ switch(ringCfg->ringtype)
+ {
+ case ProSLIC_RING_SINE:
+ i=0;
+ do
+ {
+ if(sineRingFreqTable[i].freq >= ringCfg->freq)
+ {
+ break;
+ }
+ i++;
+ }
+ while (sineRingFreqTable[i].freq);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(sineRingFreqTable[i].freq == 0)
+ {
+ i--;
+ errVal = RC_RING_V_LIMITED;
+ }
+
+ /* Update RINGFR RINGAMP, RINGOFFSET, and RINGCON */
+ Si3217x_Ring_Presets[preset].freq = sineRingFreqTable[i].ringfr;
+ Si3217x_Ring_Presets[preset].amp = ringCfg->amp * sineRingFreqTable[i].ampScale;
+ Si3217x_Ring_Presets[preset].offset = ringCfg->offset * vScale;
+ Si3217x_Ring_Presets[preset].phas = 0L;
+
+ /* Don't alter anything in RINGCON other than clearing the TRAP bit */
+ Si3217x_Ring_Presets[preset].ringcon &= 0xFE;
+
+ Si3217x_Ring_Presets[preset].rtper = sineRingtripTable[i].rtper;
+ Si3217x_Ring_Presets[preset].rtacdb = sineRingtripTable[i].rtdb;
+ Si3217x_Ring_Presets[preset].rtdcdb = sineRingtripTable[i].rtdb;
+ Si3217x_Ring_Presets[preset].rtdcth = 0xFFFFFFFL;
+ Si3217x_Ring_Presets[preset].rtacth = sineRingtripTable[i].rtacth;
+ break;
+
+ case ProSLIC_RING_TRAP_CF11:
+ case ProSLIC_RING_TRAP_CF12:
+ case ProSLIC_RING_TRAP_CF13:
+ case ProSLIC_RING_TRAP_CF14:
+ case ProSLIC_RING_TRAP_CF15:
+ case ProSLIC_RING_TRAP_CF16:
+ i=0;
+ do
+ {
+ if(trapRingFreqTable[i].freq >= ringCfg->freq)
+ {
+ break;
+ }
+ i++;
+ }
+ while (trapRingFreqTable[i].freq);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(trapRingFreqTable[i].freq == 0)
+ {
+ i--;
+ errVal = RC_RING_V_LIMITED;
+ }
+
+ /* Update RINGFR RINGAMP, RINGOFFSET, and RINGCON */
+ Si3217x_Ring_Presets[preset].amp = ringCfg->amp * vScale;
+ Si3217x_Ring_Presets[preset].freq =
+ Si3217x_Ring_Presets[preset].amp/trapRingFreqTable[i].cfVal[ringCfg->ringtype];
+ Si3217x_Ring_Presets[preset].offset = ringCfg->offset * vScale;
+ Si3217x_Ring_Presets[preset].phas = 262144000L/trapRingFreqTable[i].freq;
+
+ /* Don't alter anything in RINGCON other than setting the TRAP bit */
+ Si3217x_Ring_Presets[preset].ringcon |= 0x01;
+
+ /* RTPER and debouce timers */
+ Si3217x_Ring_Presets[preset].rtper = trapRingtripTable[i].rtper;
+ Si3217x_Ring_Presets[preset].rtacdb = trapRingtripTable[i].rtdb;
+ Si3217x_Ring_Presets[preset].rtdcdb = trapRingtripTable[i].rtdb;
+
+
+ Si3217x_Ring_Presets[preset].rtdcth = 0xFFFFFFFL;
+ Si3217x_Ring_Presets[preset].rtacth =
+ trapRingtripTable[i].rtacth[ringCfg->ringtype];
+
+
+ break;
+ }
+
+ /*
+ ** DCDC tracking sluggish under light load at higher ring freq.
+ ** Reduce tracking depth above 40Hz. This should have no effect
+ ** if using the Buck-Boost architecture.
+ */
+ if((sineRingFreqTable[i].freq >= 40)
+ ||(Si3217x_General_Configuration.bom_option == BO_DCDC_BUCK_BOOST))
+ {
+ dcdcVminTmp = ringCfg->amp + ringCfg->offset;
+ dcdcVminTmp *= 1000;
+ dcdcVminTmp *= SCALE_V_MADC;
+ Si3217x_Ring_Presets[preset].dcdc_vref_min_rng = dcdcVminTmp;
+ }
+ else
+ {
+ Si3217x_Ring_Presets[preset].dcdc_vref_min_rng = 0x1800000L;
+ }
+
+ return errVal;
+}
+
+
+typedef struct
+{
+ int32 gain;
+ uInt32 scale;
+} ProSLIC_GainScaleLookup;
+
+#ifndef ENABLE_HIRES_GAIN
+static int Si3217x_dbgSetGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int tx_rx_sel)
+{
+ int errVal = 0;
+ int32 i;
+ int32 gain_pga, gain_eq;
+ const ProSLIC_GainScaleLookup gainScaleTable[]
+ = /* gain, scale=10^(gain/20) */
+ {
+ {-30, 32},
+ {-29, 35},
+ {-28, 40},
+ {-27, 45},
+ {-26, 50},
+ {-25, 56},
+ {-24, 63},
+ {-23, 71},
+ {-22, 79},
+ {-21, 89},
+ {-20, 100},
+ {-19, 112},
+ {-18, 126},
+ {-17, 141},
+ {-16, 158},
+ {-15, 178},
+ {-14, 200},
+ {-13, 224},
+ {-12, 251},
+ {-11, 282},
+ {-10, 316},
+ {-9, 355},
+ {-8, 398},
+ {-7, 447},
+ {-6, 501},
+ {-5, 562},
+ {-4, 631},
+ {-3, 708},
+ {-2, 794},
+ {-1, 891},
+ {0, 1000},
+ {1, 1122},
+ {2, 1259},
+ {3, 1413},
+ {4, 1585},
+ {5, 1778},
+ {6, 1995},
+ {0xff,0} /* terminator */
+ };
+
+ /*
+ ** 5.4.0 - Removed relative gain scaling. to support automatic adjustment based on
+ ** gain plan provided in txgain_db and rxgain_db. It is presumed that all
+ ** coefficients were generated for 0dB/0dB gain and the txgain_db and rxgain_db
+ ** parameters will be used to scale the gain using the existing gain provisioning
+ ** infrastructure when the zsynth preset is loaded. This function will ignore
+ ** the txgain_db and rxgain_db parameters and scale absolute gain presuming a
+ ** 0dB/0dB coefficient set.
+ */
+
+ /*
+ ** 6.0.0 - Modifying where gain/attenuation is placed to minimize clipping.
+ **
+ ** RX Path: -30dB < gain < 0dB - All in RXACGAIN
+ ** 0dB < gain < 6dB - All in RXACEQ
+ **
+ ** TX Path: -30dB < gain < 0dB - All in TXACEQ
+ ** 0dB < gain < 6dB - All in TXACGAIN
+ */
+
+ /* Test against max gain */
+ if (gain > PROSLIC_EXTENDED_GAIN_MAX)
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+ DEBUG_PRINT(pProslic, "%sdbgSetGain: Gain %d out of range\n", LOGPRINT_PREFIX,
+ (int)gain);
+ gain = PROSLIC_EXTENDED_GAIN_MAX; /* Clamp to maximum */
+ }
+
+ /* Test against min gain */
+ if (gain < PROSLIC_GAIN_MIN)
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+ DEBUG_PRINT(pProslic, "%sdbgSetGain: Gain %d out of range\n", LOGPRINT_PREFIX,
+ (int)gain);
+ gain = PROSLIC_GAIN_MIN; /* Clamp to minimum */
+ }
+
+ /* Distribute gain */
+ if(gain == 0)
+ {
+ gain_pga = 0;
+ gain_eq = 0;
+ }
+ else if(gain > PROSLIC_GAIN_MAX)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = PROSLIC_GAIN_MAX;
+ gain_eq = gain - PROSLIC_GAIN_MAX;
+ }
+ else
+ {
+ gain_pga = gain - PROSLIC_GAIN_MAX;
+ gain_eq = PROSLIC_GAIN_MAX;
+ }
+ }
+ else if(gain > 0)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = gain;
+ gain_eq = 0;
+ }
+ else
+ {
+ gain_pga = 0;
+ gain_eq = gain;
+ }
+ }
+ else
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = 0;
+ gain_eq = gain;
+ }
+ else
+ {
+ gain_pga = gain;
+ gain_eq = 0;
+ }
+
+ }
+
+
+ /*
+ ** Lookup PGA Appropriate PGA Gain
+ */
+ i=0;
+ do
+ {
+ if(gainScaleTable[i].gain >= gain_pga) /* was gain_1 */
+ {
+ break;
+ }
+ i++;
+ }
+ while (gainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(gainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ Si3217x_audioGain_Presets[0].acgain =
+ (Si3217x_Impedance_Presets[impedance_preset].txgain/1000)
+ *gainScaleTable[i].scale;
+ }
+ else
+ {
+ Si3217x_audioGain_Presets[1].acgain =
+ (Si3217x_Impedance_Presets[impedance_preset].rxgain/1000)
+ *gainScaleTable[i].scale;
+ }
+
+
+ /*
+ ** Lookup EQ Gain
+ */
+ i=0;
+ do
+ {
+ if(gainScaleTable[i].gain >= gain_eq) /* was gain_2 */
+ {
+ break;
+ }
+ i++;
+ }
+ while (gainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(gainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ /*sign extend negative numbers*/
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+ }
+
+ Si3217x_audioGain_Presets[0].aceq_c0 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0/1000)
+ *gainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[0].aceq_c1 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1/1000)
+ *gainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[0].aceq_c2 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2/1000)
+ *gainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[0].aceq_c3 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3/1000)
+ *gainScaleTable[i].scale;
+ }
+ else
+ {
+ /*sign extend negative numbers*/
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+ }
+
+ Si3217x_audioGain_Presets[1].aceq_c0 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0/1000)
+ *gainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[1].aceq_c1 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1/1000)
+ *gainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[1].aceq_c2 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2/1000)
+ *gainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[1].aceq_c3 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3/1000)
+ *gainScaleTable[i].scale;
+ }
+
+
+ return errVal;
+}
+#else /* ENABLE_HIRES_GAIN */
+/*
+** Function: Si3217x_dbgSetGainHiRes()
+**
+** Description:
+** Provision function for setting up
+** TX and RX gain with 0.1dB resolution instead
+** of 1.0dB resolution
+*/
+static int Si3217x_dbgSetGainHiRes (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int tx_rx_sel)
+{
+ int errVal = 0;
+ int32 i;
+ int32 coarseGainIndex, fineGainIndex;
+ int32 gain_pga, gain_eq;
+ int32 coarseGain, fineGain;
+ int32 tmp;
+ const ProSLIC_GainScaleLookup coarseGainScaleTable[]
+ = /* gain, scale=10^(gain/20) */
+ {
+ {-30, 32},
+ {-29, 35},
+ {-28, 40},
+ {-27, 45},
+ {-26, 50},
+ {-25, 56},
+ {-24, 63},
+ {-23, 71},
+ {-22, 79},
+ {-21, 89},
+ {-20, 100},
+ {-19, 112},
+ {-18, 126},
+ {-17, 141},
+ {-16, 158},
+ {-15, 178},
+ {-14, 200},
+ {-13, 224},
+ {-12, 251},
+ {-11, 282},
+ {-10, 316},
+ {-9, 355},
+ {-8, 398},
+ {-7, 447},
+ {-6, 501},
+ {-5, 562},
+ {-4, 631},
+ {-3, 708},
+ {-2, 794},
+ {-1, 891},
+ {0, 1000},
+ {1, 1122},
+ {2, 1259},
+ {3, 1413},
+ {4, 1585},
+ {5, 1778},
+ {6, 1995},
+ {0xff,0} /* terminator */
+ };
+
+ const ProSLIC_GainScaleLookup fineGainScaleTable[]
+ = /* gain, scale=10^(gain/20) */
+ {
+ {-9, 902},
+ {-8, 912},
+ {-7, 923},
+ {-6, 933},
+ {-5, 944},
+ {-4, 955},
+ {-3, 966},
+ {-2, 977},
+ {-1, 989},
+ {0, 1000},
+ {1, 1012},
+ {2, 1023},
+ {3, 1035},
+ {4, 1047},
+ {5, 1059},
+ {6, 1072},
+ {7, 1084},
+ {8, 1096},
+ {9, 1109},
+ {0xff,0} /* terminator */
+ };
+
+ /*
+ ** 6.0.0 - Modifying where gain/attenuation is placed to minimize clipping.
+ **
+ ** RX Path: -30dB < gain < 0dB - All in RXACGAIN
+ ** 0dB < gain < 6dB - All in RXACEQ
+ **
+ ** TX Path: -30dB < gain < 0dB - All in TXACEQ
+ ** 0dB < gain < 6dB - All in TXACGAIN
+ **
+ ** 6.2.1 - Added option for fine gain adjust. All fine adjustment done
+ ** in RXACGAIN and TXACEQ
+ */
+
+ /* Test against max gain */
+ if (gain > (PROSLIC_GAIN_MAX*10L))
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+ DEBUG_PRINT(pProslic, "%sdbgSetGain: Gain %d dB*10 out of range\n",
+ LOGPRINT_PREFIX, gain);
+ gain = (PROSLIC_GAIN_MAX*10L); /* Clamp to maximum */
+ }
+
+ /* Test against min gain */
+ if (gain < (PROSLIC_GAIN_MIN*10L))
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+ DEBUG_PRINT(pProslic, "%sdbgSetGain: Gain %d dB*10 out of range\n",
+ LOGPRINT_PREFIX, gain);
+ gain = (PROSLIC_GAIN_MIN*10); /* Clamp to minimum */
+ }
+
+ /* Distribute gain */
+ coarseGain = gain/10L;
+ fineGain = gain - (coarseGain*10L);
+
+ /* Distribute coarseGain */
+ if(coarseGain == 0)
+ {
+ gain_pga = 0;
+ gain_eq = 0;
+ }
+ else if(coarseGain > 0)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = coarseGain;
+ gain_eq = 0;
+ }
+ else
+ {
+ gain_pga = 0;
+ gain_eq = coarseGain;
+ }
+ }
+ else
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = 0;
+ gain_eq = coarseGain;
+ }
+ else
+ {
+ gain_pga = coarseGain;
+ gain_eq = 0;
+ }
+ }
+
+ /*
+ ** Lookup PGA Appopriate PGA Gain
+ */
+ i=0;
+ do
+ {
+ if(coarseGainScaleTable[i].gain >= gain_pga)
+ {
+ break;
+ }
+ i++;
+ }
+ while (coarseGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(coarseGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ coarseGainIndex = i; /* Store coarse index */
+
+ /* Find fineGain */
+ i = 0;
+ do
+ {
+ if(fineGainScaleTable[i].gain >= fineGain)
+ {
+ break;
+ }
+ i++;
+ }
+ while (fineGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(fineGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ fineGainIndex = i;
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ Si3217x_audioGain_Presets[0].acgain = ((
+ Si3217x_Impedance_Presets[impedance_preset].txgain/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ }
+ else
+ {
+ Si3217x_audioGain_Presets[1].acgain = ((
+ Si3217x_Impedance_Presets[impedance_preset].rxgain/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale)/1000L *
+ fineGainScaleTable[fineGainIndex].scale;
+ }
+
+ /*
+ ** Lookup EQ Gain
+ */
+ i=0;
+ do
+ {
+ if(coarseGainScaleTable[i].gain >= gain_eq)
+ {
+ break;
+ }
+ i++;
+ }
+ while (coarseGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(coarseGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ coarseGainIndex = i; /* Store coarse index */
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ /*sign extend negative numbers*/
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+ }
+
+ tmp = (((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3217x_audioGain_Presets[0].aceq_c0 = tmp;
+
+ tmp = (((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3217x_audioGain_Presets[0].aceq_c1 = tmp;
+
+ tmp = (((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3217x_audioGain_Presets[0].aceq_c2 = tmp;
+
+ tmp = (((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3217x_audioGain_Presets[0].aceq_c3 = tmp;
+ }
+ else
+ {
+ /*sign extend negative numbers*/
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ {
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+ }
+
+ Si3217x_audioGain_Presets[1].aceq_c0 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0/1000)
+ *coarseGainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[1].aceq_c1 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1/1000)
+ *coarseGainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[1].aceq_c2 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2/1000)
+ *coarseGainScaleTable[i].scale;
+ Si3217x_audioGain_Presets[1].aceq_c3 = ((int32)
+ Si3217x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3/1000)
+ *coarseGainScaleTable[i].scale;
+ }
+
+
+ return errVal;
+}
+#endif /* ENABLE_HIRES_GAIN */
+
+/*
+** Function: PROSLIC_dbgSetTXGain
+**
+** Description:
+** Provision function for setting up
+** TX gain
+*/
+int Si3217x_dbgSetTXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset)
+{
+ SILABS_UNREFERENCED_PARAMETER(audio_gain_preset);
+#ifdef ENABLE_HIRES_GAIN
+ return Si3217x_dbgSetGainHiRes(pProslic,gain,impedance_preset,TXACGAIN_SEL);
+#else
+ return Si3217x_dbgSetGain(pProslic,gain,impedance_preset,TXACGAIN_SEL);
+#endif
+}
+
+/*
+** Function: PROSLIC_dbgSetRXGain
+**
+** Description:
+** Provision function for setting up
+** RX gain
+*/
+int Si3217x_dbgSetRXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset)
+{
+ SILABS_UNREFERENCED_PARAMETER(audio_gain_preset);
+#ifdef ENABLE_HIRES_GAIN
+ return Si3217x_dbgSetGainHiRes(pProslic,gain,impedance_preset,RXACGAIN_SEL);
+#else
+ return Si3217x_dbgSetGain(pProslic,gain,impedance_preset,RXACGAIN_SEL);
+#endif
+}
+
+/*
+** Function: Si3217x_GetRAMScale
+**
+** Description:
+** Read scale factor for passed RAM location
+**
+** Return Value:
+** int32 scale
+*/
+static int32 Si3217x_GetRAMScale(uInt16 addr)
+{
+ int32 scale;
+
+ switch(addr)
+ {
+ case SI3217X_COM_RAM_MADC_ILOOP:
+ case SI3217X_COM_RAM_MADC_ITIP:
+ case SI3217X_COM_RAM_MADC_IRING:
+ case SI3217X_COM_RAM_MADC_ILONG:
+ scale = SCALE_I_MADC;
+ break;
+
+ case SI3217X_COM_RAM_MADC_VTIPC:
+ case SI3217X_COM_RAM_MADC_VRINGC:
+ case SI3217X_COM_RAM_MADC_VBAT:
+ case SI3217X_COM_RAM_MADC_VDC:
+ case SI3217X_COM_RAM_MADC_VDC_OS:
+ case SI3217X_COM_RAM_MADC_VLONG:
+ case SI3217X_COM_RAM_VDIFF_SENSE:
+ case SI3217X_COM_RAM_VDIFF_FILT:
+ case SI3217X_COM_RAM_VDIFF_COARSE:
+ case SI3217X_COM_RAM_VTIP:
+ case SI3217X_COM_RAM_VRING:
+ scale = SCALE_V_MADC;
+ break;
+
+ default:
+ scale = 1;
+ break;
+ }
+
+ return scale;
+}
+
+/*
+** Function: Si3217x_ReadMADCScaled
+**
+** Description:
+** Read MADC (or other sensed voltages/currents) and
+** return scaled value in int32 format.
+**
+** Return Value:
+** int32 voltage in mV or
+** int32 current in uA
+*/
+int32 Si3217x_ReadMADCScaled(proslicChanType_ptr pProslic,uInt16 addr,
+ int32 scale)
+{
+ int32 data;
+
+ /*
+ ** Read 29-bit RAM and sign extend to 32-bits
+ */
+ data = ReadRAM(pProHW,pProslic->channel,addr);
+ if(data & 0x10000000L)
+ {
+ data |= 0xF0000000L;
+ }
+
+ /*
+ ** Scale to provided value, or use defaults if scale = 0
+ */
+ if(scale == 0)
+ {
+ scale = Si3217x_GetRAMScale(addr);
+ }
+
+ data /= scale;
+
+ return data;
+}
+
+/*
+** Function: Si3217x_LineMonitor
+**
+** Description:
+** Monitor line voltages and currents
+*/
+int Si3217x_LineMonitor(proslicChanType *pProslic, proslicMonitorType *monitor)
+{
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ if(pProslic->channelEnable)
+ {
+ monitor->vtr = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VDIFF_FILT);
+ if(monitor->vtr & 0x10000000L)
+ {
+ monitor->vtr |= 0xf0000000L;
+ }
+ monitor->vtr /= SCALE_V_MADC;
+
+ monitor->vtip = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VTIP);
+ if(monitor->vtip & 0x10000000L)
+ {
+ monitor->vtip |= 0xf0000000L;
+ }
+ monitor->vtip /= SCALE_V_MADC;
+
+ monitor->vring = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VRING);
+ if(monitor->vring & 0x10000000L)
+ {
+ monitor->vring |= 0xf0000000L;
+ }
+ monitor->vring /= SCALE_V_MADC;
+
+ monitor->vlong = ReadRAM(pProHW,pProslic->channel,
+ SI3217X_COM_RAM_MADC_VLONG);
+ if(monitor->vlong & 0x10000000L)
+ {
+ monitor->vlong |= 0xf0000000L;
+ }
+ monitor->vlong /= SCALE_V_MADC;
+
+ monitor->vbat = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_MADC_VBAT);
+ if(monitor->vbat & 0x10000000L)
+ {
+ monitor->vbat |= 0xf0000000L;
+ }
+ monitor->vbat /= SCALE_V_MADC;
+
+ monitor->vdc = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_MADC_VDC);
+ if(monitor->vdc & 0x10000000L)
+ {
+ monitor->vdc |= 0xf0000000L;
+ }
+ monitor->vdc *= -1L; /* Invert since sensor inverted */
+ monitor->vdc /= SCALE_V_MADC;
+
+ monitor->itr = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_MADC_ILOOP);
+ if(monitor->itr & 0x10000000L)
+ {
+ monitor->itr |= 0xf0000000L;
+ }
+ monitor->itr /= SCALE_I_MADC;
+
+ monitor->itip = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_MADC_ITIP);
+ if(monitor->itip & 0x10000000L)
+ {
+ monitor->itip |= 0xf0000000L;
+ }
+ monitor->itip /= SCALE_I_MADC;
+
+ monitor->iring = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_MADC_IRING);
+ if(monitor->iring & 0x10000000L)
+ {
+ monitor->iring |= 0xf0000000L;
+ }
+ monitor->iring /= SCALE_I_MADC;
+
+ monitor->ilong = ReadRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_MADC_ILONG);
+ if(monitor->ilong & 0x10000000L)
+ {
+ monitor->ilong |= 0xf0000000L;
+ }
+ monitor->ilong /= SCALE_I_MADC;
+
+ monitor->p_hvic = ReadRAM(pProHW,pProslic->channel,
+ SI3217X_COM_RAM_P_Q1_D); /* P_HVIC_LPF */
+ if(monitor->p_hvic & 0x10000000L)
+ {
+ monitor->p_hvic |= 0xf0000000L;
+ }
+ monitor->p_hvic /= SCALE_P_MADC;
+ }
+
+ return RC_NONE;
+}
+
+/*
+** Function: Si3217x_PSTNCheck
+**
+** Description:
+** Continuous monitoring of longitudinal current.
+** If an average of N samples exceed avgThresh or a
+** single sample exceeds singleThresh, the linefeed
+** is forced into the open state.
+**
+** This protects the port from connecting to a live
+** pstn line (faster than power alarm).
+**
+*/
+int Si3217x_PSTNCheck (proslicChanType *pProslic,
+ proslicPSTNCheckObjType *pPSTNCheck)
+{
+ uInt8 i;
+
+ if( (pProslic->channelType != PROSLIC)
+ || (pPSTNCheck->samples == 0) )
+ {
+ return RC_NONE; /* Ignore DAA channels */
+ }
+
+ /* Adjust buffer index */
+ if(pPSTNCheck->count >= pPSTNCheck->samples)
+ {
+ pPSTNCheck->buffFull = TRUE;
+ pPSTNCheck->count = 0; /* reset buffer ptr */
+ }
+
+ /* Read next sample */
+ pPSTNCheck->ilong[pPSTNCheck->count] = ReadRAM(pProHW,pProslic->channel,
+ SI3217X_COM_RAM_MADC_ILONG);
+ if(pPSTNCheck->ilong[pPSTNCheck->count] & 0x10000000L)
+ {
+ pPSTNCheck->ilong[pPSTNCheck->count] |= 0xf0000000L;
+ }
+ pPSTNCheck->ilong[pPSTNCheck->count] /= SCALE_I_MADC;
+
+ /* Monitor magnitude only */
+ if(pPSTNCheck->ilong[pPSTNCheck->count] < 0)
+ {
+ pPSTNCheck->ilong[pPSTNCheck->count] = -pPSTNCheck->ilong[pPSTNCheck->count];
+ }
+
+ /* Quickly test for single measurement violation */
+ if(pPSTNCheck->ilong[pPSTNCheck->count] > pPSTNCheck->singleThresh)
+ {
+ return RC_PSTN_CHECK_SINGLE_FAIL; /* fail */
+ }
+
+ /* Average once buffer is full */
+ if(pPSTNCheck->buffFull == TRUE)
+ {
+ pPSTNCheck->avgIlong = 0;
+ for(i=0; i<pPSTNCheck->samples; i++)
+ {
+ pPSTNCheck->avgIlong += pPSTNCheck->ilong[i];
+ }
+ pPSTNCheck->avgIlong /= pPSTNCheck->samples;
+
+ if(pPSTNCheck->avgIlong > pPSTNCheck->avgThresh)
+ {
+ /* reinit obj and return fail */
+ pPSTNCheck->count = 0;
+ pPSTNCheck->buffFull = FALSE;
+ return RC_PSTN_CHECK_AVG_FAIL;
+ }
+ else
+ {
+ pPSTNCheck->count++;
+ return RC_NONE;
+ }
+ }
+ else
+ {
+ pPSTNCheck->count++;
+ return RC_NONE;
+ }
+}
+
+
+
+
+#ifdef PSTN_DET_ENABLE
+/*
+** Function: abs_int32
+**
+** Description:
+** abs implementation for int32 type
+*/
+static int32 abs_int32(int32 a)
+{
+ if(a < 0)
+ {
+ return -1*a;
+ }
+ return a;
+}
+
+/*
+** Function: Si3217x_DiffPSTNCheck
+**
+** Description:
+** Monitor for excessive longitudinal current, which
+** would be present if a live pstn line was connected
+** to the port.
+**
+** Returns:
+** RC_NONE - test in progress
+** RC_COMPLETE_NO_ERR - test complete, no alarms or errors
+** RC_POWER_ALARM_HVIC - test interrupted by HVIC power alarm
+** RC_
+**
+*/
+
+int Si3217x_DiffPSTNCheck (proslicChanType *pProslic,
+ proslicDiffPSTNCheckObjType *pPSTNCheck)
+{
+ int32 ramData;
+ uInt8 loop_status;
+ int i;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR; /* Ignore DAA channels */
+ }
+
+
+ switch(pPSTNCheck->pState.stage)
+ {
+ case 0:
+ /* Optional OPEN foreign voltage measurement - only execute if LCS = 0 */
+ /* Disable low power mode */
+ pPSTNCheck->enhanceRegSave = ReadReg(pProHW,pProslic->channel,ENHANCE);
+ WriteReg(pProHW,pProslic->channel, ENHANCE,
+ pPSTNCheck->enhanceRegSave&0x07); /* Disable powersave */
+ pPSTNCheck->vdiff1_avg = 0;
+ pPSTNCheck->vdiff2_avg = 0;
+ pPSTNCheck->iloop1_avg = 0;
+ pPSTNCheck->iloop2_avg = 0;
+ pPSTNCheck->return_status = RC_COMPLETE_NO_ERR;
+ /* Do OPEN state hazardous voltage measurement if enabled and ONHOOK */
+ Si3217x_ReadHookStatus(pProslic,&loop_status);
+ if((loop_status == ONHOOK)&&(pPSTNCheck->femf_enable == 1))
+ {
+ pPSTNCheck->pState.stage++;
+ }
+ else
+ {
+ pPSTNCheck->pState.stage = 10;
+ }
+
+ return RC_NONE;
+
+ case 1:
+ /* Change linefeed to OPEN state for HAZV measurement, setup coarse sensors */
+ pPSTNCheck->lfstate_entry = ReadReg(pProHW,pProslic->channel, LINEFEED);
+ ProSLIC_SetLinefeedStatus(pProslic,LF_OPEN);
+ pPSTNCheck->pState.stage++;
+ return RC_NONE;
+
+ case 2:
+ /* Settle */
+ ProSLIC_PSTN_delay_poll(&(pPSTNCheck->pState), PSTN_DET_OPEN_FEMF_SETTLE);
+ return RC_NONE;
+
+ case 3:
+ /* Measure HAZV */
+ pPSTNCheck->vdiff_open = Si3217x_ReadMADCScaled(pProslic,VDIFF_COARSE,0);
+ /* Stop PSTN check if differential voltage > max_femf_vopen present */
+ DEBUG_PRINT(pProslic, "%sDiff PSTN : Vopen = %d mV\n", LOGPRINT_PREFIX,
+ pPSTNCheck->vdiff_open);
+
+ if(abs_int32(pPSTNCheck->vdiff_open) > pPSTNCheck->max_femf_vopen)
+ {
+ pPSTNCheck->pState.stage = 70;
+ pPSTNCheck->return_status = RC_PSTN_OPEN_FEMF;
+ }
+ else
+ {
+ pPSTNCheck->pState.stage = 10;
+ }
+ return 0;
+
+ case 10:
+ /* Load first DC feed preset */
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->dcfPreset1);
+ ProSLIC_SetLinefeedStatus(pProslic,LF_FWD_ACTIVE);
+ pPSTNCheck->pState.stage++;
+ return RC_NONE;
+
+ case 11:
+ /* Settle */
+ ProSLIC_PSTN_delay_poll(&(pPSTNCheck->pState), PSTN_DET_DIFF_IV1_SETTLE);
+ return RC_NONE;
+
+ case 12:
+ /* Measure VDIFF and ILOOP, switch to 2nd DCFEED setup */
+ pPSTNCheck->vdiff1[pPSTNCheck->pState.sampleIterations] =
+ Si3217x_ReadMADCScaled(pProslic,VDIFF_FILT,0);
+ pPSTNCheck->iloop1[pPSTNCheck->pState.sampleIterations] =
+ Si3217x_ReadMADCScaled(pProslic,MADC_ILOOP,0);
+ DEBUG_PRINT(pProslic, "%sDiff PSTN: Vdiff1[%d] = %d mV\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,
+ pPSTNCheck->vdiff1[pPSTNCheck->pState.sampleIterations]);
+ DEBUG_PRINT(pProslic, "%sDiff PSTN: Iloop1[%d] = %d uA\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,
+ pPSTNCheck->iloop1[pPSTNCheck->pState.sampleIterations]);
+ pPSTNCheck->pState.sampleIterations++;
+ if(pPSTNCheck->pState.sampleIterations >= pPSTNCheck->samples)
+ {
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->dcfPreset2);
+ pPSTNCheck->pState.stage++;
+ pPSTNCheck->pState.sampleIterations = 0;
+ }
+ return RC_NONE;
+
+ case 13:
+ /* Settle feed 500ms */
+ ProSLIC_PSTN_delay_poll(&(pPSTNCheck->pState), PSTN_DET_DIFF_IV2_SETTLE);
+ return RC_NONE;
+
+ case 14:
+ /* Measure VDIFF and ILOOP*/
+ pPSTNCheck->vdiff2[pPSTNCheck->pState.sampleIterations] =
+ Si3217x_ReadMADCScaled(pProslic,VDIFF_FILT,0);
+ pPSTNCheck->iloop2[pPSTNCheck->pState.sampleIterations] =
+ Si3217x_ReadMADCScaled(pProslic,MADC_ILOOP,0);
+ DEBUG_PRINT(pProslic, "%sDiff PSTN: Vdiff2[%d] = %d mV\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,
+ pPSTNCheck->vdiff2[pPSTNCheck->pState.sampleIterations]);
+ DEBUG_PRINT(pProslic, "%sDiff PSTN: Iloop2[%d] = %d uA\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,
+ pPSTNCheck->iloop2[pPSTNCheck->pState.sampleIterations]);
+
+ pPSTNCheck->pState.sampleIterations++;
+ if(pPSTNCheck->pState.sampleIterations >= pPSTNCheck->samples)
+ {
+ /* Compute averages */
+ for (i=0; i<pPSTNCheck->samples; i++)
+ {
+ pPSTNCheck->vdiff1_avg += pPSTNCheck->vdiff1[i];
+ pPSTNCheck->iloop1_avg += pPSTNCheck->iloop1[i];
+ pPSTNCheck->vdiff2_avg += pPSTNCheck->vdiff2[i];
+ pPSTNCheck->iloop2_avg += pPSTNCheck->iloop2[i];
+ }
+ pPSTNCheck->vdiff1_avg /= pPSTNCheck->samples;
+ pPSTNCheck->iloop1_avg /= pPSTNCheck->samples;
+ pPSTNCheck->vdiff2_avg /= pPSTNCheck->samples;
+ pPSTNCheck->iloop2_avg /= pPSTNCheck->samples;
+
+ /* Force small (probably offset) currents to minimum value */
+ if(abs_int32(pPSTNCheck->iloop1_avg) < PSTN_DET_MIN_ILOOP)
+ {
+ pPSTNCheck->iloop1_avg = PSTN_DET_MIN_ILOOP;
+ }
+ if(abs_int32(pPSTNCheck->iloop2_avg) < PSTN_DET_MIN_ILOOP)
+ {
+ pPSTNCheck->iloop2_avg = PSTN_DET_MIN_ILOOP;
+ }
+
+ /* Calculate measured loop impedance */
+ pPSTNCheck->rl1 = abs_int32((
+ pPSTNCheck->vdiff1_avg*1000L)/pPSTNCheck->iloop1_avg);
+ pPSTNCheck->rl2 = abs_int32((
+ pPSTNCheck->vdiff2_avg*1000L)/pPSTNCheck->iloop2_avg);
+
+ /* Force non-zero loop resistance */
+ if(pPSTNCheck->rl1 == 0)
+ {
+ pPSTNCheck->rl1 = 1;
+ }
+ if(pPSTNCheck->rl2 == 0)
+ {
+ pPSTNCheck->rl2 = 1;
+ }
+
+ /* Qualify loop impedances */
+ pPSTNCheck->rl_ratio = (pPSTNCheck->rl1*1000L)/pPSTNCheck->rl2;
+#ifdef ENABLE_DEBUG
+ if (DEBUG_ENABLED(pProslic))
+ {
+ const char fmt_string[] = "%sDiffPSTN: %s = %d %s\n";
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "VDIFF1", pPSTNCheck->vdiff1_avg, "mV");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "ILOOP1",pPSTNCheck->iloop1_avg, "uA");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "VDIFF2",pPSTNCheck->vdiff2_avg, "mV");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "ILOOP2",pPSTNCheck->iloop2_avg, "uA");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "RL1",pPSTNCheck->rl1, "ohm");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "RL2",pPSTNCheck->rl2, "ohm");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "RL_Ratio",pPSTNCheck->rl_ratio, " ");
+ }
+#endif
+
+ /* Restore */
+ pPSTNCheck->pState.sampleIterations = 0;
+ pPSTNCheck->pState.stage = 70;
+ }
+ return RC_NONE;
+
+ case 70: /* Reset test state, restore entry conditions */
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->entryDCFeedPreset);
+ ProSLIC_SetLinefeedStatus(pProslic,pPSTNCheck->lfstate_entry);
+ WriteReg(pProHW,pProslic->channel,ENHANCE, pPSTNCheck->enhanceRegSave);
+ pPSTNCheck->pState.stage = 0;
+ pPSTNCheck->pState.waitIterations = 0;
+ pPSTNCheck->pState.sampleIterations = 0;
+ return pPSTNCheck->return_status;
+
+ }
+ return RC_NONE;
+}
+
+#endif
+
+/*
+** Function: Si3217x_SetDAAEnable
+**
+** Description:
+** Enable or disable adjacent FXO channel (Si32178 Only)
+**
+** Returns:
+** RC_NONE
+*/
+int Si3217x_SetDAAEnable (proslicChanType *pProslic, int enable)
+{
+ uInt8 regData;
+
+ if(pProslic->channelType != PROSLIC) /* Ignore DAA channels */
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ if((pProslic->deviceId->chipType != SI32178)
+ ||(pProslic->deviceId->chipRev != SI3217X_REVB))
+ {
+ return RC_UNSUPPORTED_FEATURE;
+ }
+
+ regData = ReadReg(pProHW,pProslic->channel, 74);
+ if(enable)
+ {
+ WriteReg(pProHW,pProslic->channel,74,regData|0x01);
+ }
+ else
+ {
+ WriteReg(pProHW,pProslic->channel,74,regData&0x7E);
+ }
+
+ return(RC_NONE);
+
+}
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_B_BB_2012DEC10.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_B_BB_2012DEC10.c
new file mode 100644
index 0000000..340a390
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_B_BB_2012DEC10.c
@@ -0,0 +1,1033 @@
+/*
+** Generated from si3217x_patch_B_BB_2012DEC10.dsp_prom
+** on 12-10-2012 at 8:38:55
+*/
+#include "si_voice_datatypes.h"
+#include "si3217x.h"
+
+static const uInt32 patchData [] = {
+141029L,
+532675L,
+141029L,
+540867L,
+141029L,
+614083L,
+141029L,
+630467L,
+141029L,
+634051L,
+141029L,
+936643L,
+141029L,
+975043L,
+141029L,
+995011L,
+558181L,
+503714L,
+524309L,
+142565L,
+539331L,
+172645L,
+524197L,
+524296L,
+523269L,
+523365L,
+522864L,
+524291L,
+246789L,
+246885L,
+141029L,
+773313L,
+550117L,
+568003L,
+558181L,
+502690L,
+505973L,
+142565L,
+568003L,
+524290L,
+143077L,
+557251L,
+505445L,
+524290L,
+504837L,
+29189L,
+431717L,
+508485L,
+432741L,
+506949L,
+392805L,
+507973L,
+518757L,
+506437L,
+507493L,
+518725L,
+509029L,
+431680L,
+432645L,
+509541L,
+392785L,
+505861L,
+141029L,
+579267L,
+560741L,
+504418L,
+503812L,
+142565L,
+563395L,
+505445L,
+503906L,
+504837L,
+29186L,
+504325L,
+141029L,
+579267L,
+504933L,
+262242L,
+142565L,
+566979L,
+524291L,
+504837L,
+29189L,
+141029L,
+579267L,
+558181L,
+501154L,
+524309L,
+694789L,
+558085L,
+694789L,
+505957L,
+524290L,
+142565L,
+579267L,
+506469L,
+518725L,
+508517L,
+431685L,
+506981L,
+432709L,
+508005L,
+392768L,
+505861L,
+694789L,
+560645L,
+694789L,
+571109L,
+598723L,
+558181L,
+503202L,
+513141L,
+142565L,
+597187L,
+514149L,
+262242L,
+524291L,
+144101L,
+585923L,
+514053L,
+666853L,
+590019L,
+431717L,
+511045L,
+136805L,
+512069L,
+510053L,
+235077L,
+513637L,
+262242L,
+524291L,
+144101L,
+593091L,
+513541L,
+666853L,
+598723L,
+431717L,
+510533L,
+136805L,
+511557L,
+141029L,
+598723L,
+514117L,
+512613L,
+513605L,
+76005L,
+604355L,
+17637L,
+606403L,
+257125L,
+262242L,
+143587L,
+604355L,
+257029L,
+141029L,
+608963L,
+776293L,
+261762L,
+141045L,
+608451L,
+776293L,
+119426L,
+517750L,
+257093L,
+776197L,
+541925L,
+612035L,
+518245L,
+792133L,
+141029L,
+934081L,
+518757L,
+792133L,
+141029L,
+934081L,
+520290L,
+520197L,
+521636L,
+141541L,
+617155L,
+524288L,
+524294L,
+524294L,
+524294L,
+524294L,
+660069L,
+520808L,
+519779L,
+521732L,
+144101L,
+622787L,
+521797L,
+5733L,
+521840L,
+24293L,
+625859L,
+35429L,
+385136L,
+524295L,
+2147L,
+393315L,
+188420L,
+144101L,
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+174704L,
+212485L,
+22757L,
+951491L,
+141028L,
+969923L,
+141027L,
+969923L,
+12517L,
+960707L,
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+451237L,
+219752L,
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+211972L,
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+141029L,
+8386L,
+174693L,
+80610L,
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+965315L,
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+242821L,
+377445L,
+212584L,
+174691L,
+80613L,
+969411L,
+141028L,
+969923L,
+524291L,
+671749L,
+558181L,
+502690L,
+437365L,
+143074L,
+974019L,
+141029L,
+6850L,
+141029L,
+8386L,
+82149L,
+980163L,
+514661L,
+118402L,
+142565L,
+981699L,
+771392L,
+514565L,
+141029L,
+981699L,
+524288L,
+524305L,
+514565L,
+191077L,
+549605L,
+985795L,
+4165L,
+191589L,
+4677L,
+141029L,
+145600L,
+391088L,
+660069L,
+234632L,
+524295L,
+660065L,
+191075L,
+191077L,
+17120L,
+990915L,
+524290L,
+4101L,
+191589L,
+19168L,
+993475L,
+524290L,
+4613L,
+141029L,
+145600L,
+736L,
+562880L,
+452200L,
+141029L,
+562368L,
+0L
+};
+
+static const uInt16 patchEntries [] = {
+3557,
+3861,
+3329,
+4108,
+4275,
+4058,
+193,
+1089
+};
+
+static const uInt16 patchSupportAddr [] = {
+1023,
+1021,
+1020,
+1019,
+1018,
+1017,
+1015,
+1013,
+1012,
+1011,
+804,
+1008,
+1005,
+1004,
+1003,
+1002,
+1001,
+1000,
+999,
+998,
+997,
+996,
+995,
+994,
+991,
+988,
+987,
+985,
+983,
+982,
+981,
+980,
+979,
+978,
+0
+};
+
+static const uInt32 patchSupportData [] = {
+0x1FFFFFFL,
+0x500000L,
+0x0L,
+0xA126E9L,
+0x7FFFFFFL,
+0xA18937L,
+0xC49BA5L,
+0x0L,
+0x800000L,
+0x800000L,
+0x4B00L,
+0x320000L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x6150000L,
+0x82C58CL,
+0xC00000L,
+0x0L,
+0x460000L,
+0x0L,
+0x80000L,
+0x100000L,
+0x200000L,
+0x7F00000L,
+0x7E80000L,
+0x7D80000L,
+0x0L
+};
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+const proslicPatch si3217xPatchRevBBkbt = {
+#else
+const proslicPatch RevBPatch = {
+#endif
+ patchData,
+ patchEntries,
+ 0x12102012L,
+ patchSupportAddr,
+ patchSupportData
+};
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_B_FB_2012DEC10.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_B_FB_2012DEC10.c
new file mode 100644
index 0000000..73150fb
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_B_FB_2012DEC10.c
@@ -0,0 +1,1033 @@
+/*
+** Generated from si3217x_patch_B_FB_2012DEC10.dsp_prom
+** on 12-10-2012 at 8:39:4
+*/
+#include "si_voice_datatypes.h"
+#include "si3217x.h"
+
+static const uInt32 patchData [] = {
+141029L,
+532675L,
+141029L,
+540867L,
+141029L,
+614083L,
+141029L,
+630467L,
+141029L,
+634051L,
+141029L,
+936643L,
+141029L,
+975043L,
+141029L,
+995011L,
+558181L,
+503714L,
+524309L,
+142565L,
+539331L,
+172645L,
+524197L,
+524296L,
+523269L,
+523365L,
+522864L,
+524291L,
+246789L,
+246885L,
+141029L,
+773313L,
+550117L,
+568003L,
+558181L,
+502690L,
+505973L,
+142565L,
+568003L,
+524290L,
+143077L,
+557251L,
+505445L,
+524290L,
+504837L,
+29189L,
+431717L,
+508485L,
+432741L,
+506949L,
+392805L,
+507973L,
+518757L,
+506437L,
+507493L,
+518725L,
+509029L,
+431680L,
+432645L,
+509541L,
+392785L,
+505861L,
+141029L,
+579267L,
+560741L,
+504418L,
+503812L,
+142565L,
+563395L,
+505445L,
+503906L,
+504837L,
+29186L,
+504325L,
+141029L,
+579267L,
+504933L,
+262242L,
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+29189L,
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+579267L,
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+571109L,
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+503202L,
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+666853L,
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+6850L,
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+402037L,
+143076L,
+649923L,
+25829L,
+647875L,
+201312L,
+201218L,
+142565L,
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+710850L,
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+142564L,
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+791234L,
+539749L,
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+560641L,
+98437L,
+118422L,
+546838L,
+141029L,
+809666L,
+216165L,
+402018L,
+142564L,
+718019L,
+142564L,
+780483L,
+142564L,
+788163L,
+142564L,
+796355L,
+142560L,
+803523L,
+141029L,
+907971L,
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+450661L,
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+723781L,
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+727877L,
+730949L,
+743237L,
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+725317L,
+724293L,
+738629L,
+739141L,
+726853L,
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+734021L,
+280197L,
+729413L,
+738117L,
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+280706L,
+694806L,
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+118917L,
+549184L,
+549381L,
+377957L,
+194629L,
+377861L,
+565349L,
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+281221L,
+565573L,
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+118914L,
+459894L,
+560645L,
+694789L,
+13381L,
+119429L,
+14144L,
+14341L,
+402021L,
+79074L,
+744131L,
+524288L,
+755200L,
+202245L,
+202757L,
+203269L,
+76517L,
+750275L,
+77029L,
+755395L,
+78053L,
+760515L,
+78565L,
+765635L,
+119429L,
+746817L,
+192837L,
+196613L,
+265349L,
+752448L,
+53477L,
+774339L,
+141029L,
+769731L,
+119429L,
+747329L,
+192837L,
+196613L,
+116869L,
+752453L,
+53477L,
+774339L,
+141029L,
+769731L,
+240773L,
+756033L,
+192837L,
+196613L,
+116869L,
+752453L,
+53477L,
+774339L,
+141029L,
+769731L,
+240773L,
+756545L,
+192837L,
+196613L,
+265349L,
+752448L,
+53477L,
+774339L,
+410213L,
+192069L,
+694789L,
+262277L,
+541504L,
+694801L,
+761861L,
+141029L,
+85699L,
+410725L,
+192069L,
+281733L,
+767301L,
+694789L,
+240773L,
+541509L,
+694789L,
+118917L,
+216389L,
+141029L,
+87747L,
+192101L,
+194146L,
+143588L,
+1005250L,
+192005L,
+141029L,
+87747L,
+410725L,
+192069L,
+694789L,
+240773L,
+541509L,
+694789L,
+141029L,
+85699L,
+119429L,
+694789L,
+549701L,
+694789L,
+192101L,
+194146L,
+143588L,
+1014978L,
+192005L,
+141029L,
+928451L,
+411237L,
+201797L,
+192069L,
+141029L,
+926403L,
+192101L,
+194146L,
+143588L,
+799939L,
+192005L,
+141029L,
+928451L,
+411744L,
+192069L,
+205317L,
+203781L,
+204293L,
+141029L,
+926403L,
+657637L,
+928451L,
+204901L,
+204386L,
+412580L,
+203877L,
+204362L,
+203781L,
+203877L,
+412581L,
+204712L,
+660064L,
+203884L,
+204197L,
+204394L,
+204709L,
+192106L,
+205314L,
+143589L,
+816323L,
+194149L,
+524292L,
+192005L,
+141541L,
+928451L,
+253541L,
+262242L,
+142563L,
+874179L,
+142563L,
+870595L,
+142565L,
+836291L,
+517221L,
+516706L,
+205435L,
+193122L,
+283268L,
+660069L,
+516720L,
+515589L,
+147173L,
+827075L,
+515169L,
+517220L,
+515077L,
+196162L,
+515685L,
+524292L,
+195589L,
+141029L,
+840387L,
+192677L,
+515168L,
+253448L,
+283270L,
+147173L,
+834243L,
+660065L,
+524292L,
+524311L,
+192517L,
+141029L,
+897731L,
+205413L,
+193122L,
+524292L,
+660069L,
+516720L,
+517125L,
+196163L,
+195589L,
+640L,
+253253L,
+192517L,
+196197L,
+195682L,
+192612L,
+144101L,
+846531L,
+196098L,
+253029L,
+524291L,
+192517L,
+195685L,
+282242L,
+79077L,
+849091L,
+129669L,
+253031L,
+195586L,
+138343L,
+252932L,
+144101L,
+853187L,
+141029L,
+841923L,
+192609L,
+524296L,
+79077L,
+861891L,
+517223L,
+192512L,
+253445L,
+516706L,
+96923L,
+147169L,
+859331L,
+524288L,
+192613L,
+283267L,
+192517L,
+141029L,
+834243L,
+192517L,
+114309L,
+253537L,
+517220L,
+143589L,
+830147L,
+516706L,
+516219L,
+192610L,
+145125L,
+868035L,
+524305L,
+524291L,
+192517L,
+515077L,
+141029L,
+881347L,
+205413L,
+193122L,
+282244L,
+516613L,
+192837L,
+141029L,
+881347L,
+205413L,
+193088L,
+192517L,
+79077L,
+881347L,
+281733L,
+752448L,
+202245L,
+202757L,
+203269L,
+410725L,
+118917L,
+141029L,
+882371L,
+201829L,
+118405L,
+192069L,
+216389L,
+253541L,
+262242L,
+192612L,
+253440L,
+755205L,
+283266L,
+524311L,
+192517L,
+192613L,
+283269L,
+77026L,
+893123L,
+76535L,
+894659L,
+78053L,
+896195L,
+756229L,
+141029L,
+928451L,
+747013L,
+141029L,
+928451L,
+746501L,
+141029L,
+928451L,
+755717L,
+141029L,
+928451L,
+77029L,
+903363L,
+76535L,
+904899L,
+78053L,
+906435L,
+232037L,
+524291L,
+756229L,
+141029L,
+907971L,
+747013L,
+141029L,
+907971L,
+746501L,
+141029L,
+907971L,
+231525L,
+524291L,
+755717L,
+756736L,
+752133L,
+727045L,
+727557L,
+730629L,
+729093L,
+723461L,
+726533L,
+737285L,
+738309L,
+738821L,
+216069L,
+766981L,
+761861L,
+742917L,
+724997L,
+723973L,
+733701L,
+257637L,
+450629L,
+560741L,
+284290L,
+694805L,
+560645L,
+228965L,
+546880L,
+541189L,
+548869L,
+549381L,
+194661L,
+377925L,
+195173L,
+565317L,
+694789L,
+141029L,
+87747L,
+216165L,
+402018L,
+524291L,
+216069L,
+127077L,
+413093L,
+202856L,
+414629L,
+203372L,
+415141L,
+414124L,
+202245L,
+202858L,
+413605L,
+203340L,
+202341L,
+202821L,
+204805L,
+141029L,
+87747L,
+393317L,
+522338L,
+524292L,
+660069L,
+263813L,
+115304L,
+660068L,
+141541L,
+941763L,
+115269L,
+524288L,
+115300L,
+660066L,
+524292L,
+141541L,
+945347L,
+115269L,
+17637L,
+952515L,
+136293L,
+263296L,
+219656L,
+660069L,
+174704L,
+212485L,
+22757L,
+951491L,
+141028L,
+969923L,
+141027L,
+969923L,
+12517L,
+960707L,
+190053L,
+451237L,
+219752L,
+524300L,
+524291L,
+219653L,
+660069L,
+212080L,
+211972L,
+142565L,
+959683L,
+758789L,
+141029L,
+8386L,
+174693L,
+80610L,
+964291L,
+143589L,
+8386L,
+141029L,
+965315L,
+142053L,
+8386L,
+242821L,
+377445L,
+212584L,
+174691L,
+80613L,
+969411L,
+141028L,
+969923L,
+524291L,
+671749L,
+558181L,
+502690L,
+437365L,
+143074L,
+974019L,
+141029L,
+6850L,
+141029L,
+8386L,
+82149L,
+980163L,
+514661L,
+118402L,
+142565L,
+981699L,
+771392L,
+514565L,
+141029L,
+981699L,
+524288L,
+524305L,
+514565L,
+191077L,
+549605L,
+985795L,
+4165L,
+191589L,
+4677L,
+141029L,
+145600L,
+391088L,
+660069L,
+234632L,
+524295L,
+660065L,
+191075L,
+191077L,
+17120L,
+990915L,
+524290L,
+4101L,
+191589L,
+19168L,
+993475L,
+524290L,
+4613L,
+141029L,
+145600L,
+736L,
+562880L,
+452200L,
+141029L,
+562368L,
+0L
+};
+
+static const uInt16 patchEntries [] = {
+3557,
+3861,
+3329,
+4108,
+4275,
+4058,
+193,
+1089
+};
+
+static const uInt16 patchSupportAddr [] = {
+1023,
+1021,
+1020,
+1019,
+1018,
+1017,
+1015,
+1013,
+1012,
+1011,
+804,
+1008,
+1005,
+1004,
+1003,
+1002,
+1001,
+1000,
+999,
+998,
+997,
+996,
+995,
+994,
+991,
+988,
+987,
+985,
+983,
+982,
+981,
+980,
+979,
+978,
+0
+};
+
+static const uInt32 patchSupportData [] = {
+0x1FFFFFFL,
+0x500000L,
+0x0L,
+0xA126E9L,
+0x7FFFFFFL,
+0xA18937L,
+0xC49BA5L,
+0x0L,
+0xB00000L,
+0x800000L,
+0x4B00L,
+0x320000L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x0L,
+0x6150000L,
+0x82C58CL,
+0xC00000L,
+0x0L,
+0x460000L,
+0x0L,
+0x80000L,
+0x100000L,
+0x200000L,
+0x7F00000L,
+0x7E80000L,
+0x7D80000L,
+0x0L
+};
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+const proslicPatch si3217xPatchRevBFlbk = {
+#else
+const proslicPatch RevBPatch = {
+#endif
+ patchData,
+ patchEntries,
+ 0x12102012L,
+ patchSupportAddr,
+ patchSupportData
+};
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_C_FB_2013FEB04.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_C_FB_2013FEB04.c
new file mode 100644
index 0000000..3603f8d
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_C_FB_2013FEB04.c
@@ -0,0 +1,227 @@
+/*
+** Patch: si3217x_patch_C_FB_2013FEB04.c
+**
+** Generated from patch.dsp_prom
+** on 02-04-2013 at 12:52:13
+** Patch ID = 0x02042013L
+*/
+#include "si_voice_datatypes.h"
+#include "si3217x.h"
+
+static const uInt32 patchData [] = {
+141029L,
+540867L,
+141029L,
+543427L,
+141029L,
+550595L,
+141029L,
+591043L,
+141029L,
+595651L,
+141029L,
+596163L,
+141029L,
+596675L,
+141029L,
+597187L,
+141029L,
+597699L,
+141029L,
+598211L,
+141029L,
+598723L,
+141029L,
+599235L,
+141029L,
+599747L,
+141029L,
+600259L,
+141029L,
+600771L,
+141029L,
+601283L,
+736L,
+492224L,
+452200L,
+141029L,
+491712L,
+3173L,
+518768L,
+524315L,
+518244L,
+517732L,
+145125L,
+547523L,
+827461L,
+517221L,
+143589L,
+549571L,
+827461L,
+141029L,
+745664L,
+550117L,
+577731L,
+558181L,
+410018L,
+466549L,
+142565L,
+577731L,
+524290L,
+143077L,
+566979L,
+456805L,
+524290L,
+446981L,
+29189L,
+431717L,
+473669L,
+432741L,
+472133L,
+392805L,
+473157L,
+792165L,
+471621L,
+472677L,
+792133L,
+474213L,
+431680L,
+432645L,
+475237L,
+392785L,
+466437L,
+141029L,
+588995L,
+560741L,
+446562L,
+445444L,
+142565L,
+573123L,
+456805L,
+445538L,
+446981L,
+29186L,
+446469L,
+141029L,
+588995L,
+447077L,
+262242L,
+142565L,
+576707L,
+524291L,
+446981L,
+29189L,
+141029L,
+588995L,
+558181L,
+409506L,
+524309L,
+694789L,
+558085L,
+694789L,
+466533L,
+524290L,
+142565L,
+588995L,
+471653L,
+792133L,
+473701L,
+431685L,
+472165L,
+432709L,
+473189L,
+392768L,
+466437L,
+694789L,
+560645L,
+694789L,
+743525L,
+119426L,
+141029L,
+925377L,
+560741L,
+524290L,
+143072L,
+594115L,
+141029L,
+122050L,
+694789L,
+141029L,
+789186L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+0L
+};
+
+static const uInt16 patchEntries [] = {
+951,
+1455,
+3854,
+4333,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0
+};
+
+static const uInt16 patchSupportAddr [] = {
+1013,
+1012,
+1011,
+1010,
+928,
+926,
+923,
+911,
+892,
+872,
+800,
+799,
+0
+};
+
+static const uInt32 patchSupportData [] = {
+0x624DD0L,
+0x124DD0L,
+0x3F00000L,
+0x100000L,
+0x6150000L,
+0x82C58CL,
+0xC00000L,
+0x0L,
+0x460000L,
+0x0L,
+0x200000L,
+0x7D80000L,
+0x0L
+};
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+const proslicPatch si3217xPatchRevCFlbk = {
+#else
+const proslicPatch RevCPatch = {
+#endif
+ patchData,
+ patchEntries,
+ 0x02042013L,
+ patchSupportAddr,
+ patchSupportData
+};
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_C_FB_2014JUN18.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_C_FB_2014JUN18.c
new file mode 100644
index 0000000..f3f4993
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_patch_C_FB_2014JUN18.c
@@ -0,0 +1,257 @@
+/*
+** Patch: si3217x_patch_C_FB_2014JUN18.c
+**
+** Generated from si3217x_patch_C_FB_2014JUN18.dsp_prom
+** on 06-18-2014 at 13:37:24
+** Patch ID = 0x06182014L
+*/
+#include "si_voice_datatypes.h"
+#include "si3217x.h"
+
+static const uInt32 patchData [] = {
+141029L,
+540867L,
+141029L,
+543427L,
+141029L,
+550595L,
+141029L,
+591043L,
+141029L,
+595651L,
+141029L,
+597699L,
+141029L,
+608963L,
+141029L,
+609475L,
+141029L,
+609987L,
+141029L,
+610499L,
+141029L,
+611011L,
+141029L,
+611523L,
+141029L,
+612035L,
+141029L,
+612547L,
+141029L,
+613059L,
+141029L,
+613571L,
+736L,
+492224L,
+452200L,
+141029L,
+491712L,
+3173L,
+518768L,
+524315L,
+518244L,
+517732L,
+145125L,
+547523L,
+827461L,
+517221L,
+143589L,
+549571L,
+827461L,
+141029L,
+745664L,
+550117L,
+577731L,
+558181L,
+410018L,
+466549L,
+142565L,
+577731L,
+524290L,
+143077L,
+566979L,
+456805L,
+524290L,
+446981L,
+29189L,
+431717L,
+473669L,
+432741L,
+472133L,
+392805L,
+473157L,
+792165L,
+471621L,
+472677L,
+792133L,
+474213L,
+431680L,
+432645L,
+475237L,
+392785L,
+466437L,
+141029L,
+588995L,
+560741L,
+446562L,
+445444L,
+142565L,
+573123L,
+456805L,
+445538L,
+446981L,
+29186L,
+446469L,
+141029L,
+588995L,
+447077L,
+262242L,
+142565L,
+576707L,
+524291L,
+446981L,
+29189L,
+141029L,
+588995L,
+558181L,
+409506L,
+524309L,
+694789L,
+558085L,
+694789L,
+466533L,
+524290L,
+142565L,
+588995L,
+471653L,
+792133L,
+473701L,
+431685L,
+472165L,
+432709L,
+473189L,
+392768L,
+466437L,
+694789L,
+560645L,
+694789L,
+743525L,
+119426L,
+141029L,
+925377L,
+560741L,
+524290L,
+143072L,
+594115L,
+141029L,
+122050L,
+694789L,
+141029L,
+789186L,
+408165L,
+408645L,
+141029L,
+950976L,
+524291L,
+144101L,
+599747L,
+199685L,
+666853L,
+602819L,
+431717L,
+197189L,
+136805L,
+198725L,
+408677L,
+262242L,
+524291L,
+144101L,
+605891L,
+408581L,
+666853L,
+873664L,
+136805L,
+407621L,
+141029L,
+873664L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+0L
+};
+
+static const uInt16 patchEntries [] = {
+951,
+1455,
+3854,
+4333,
+1856,
+1695,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0
+};
+
+static const uInt16 patchSupportAddr [] = {
+1013,
+1012,
+1011,
+1010,
+928,
+926,
+923,
+911,
+892,
+872,
+800,
+799,
+798,
+797,
+796,
+0
+};
+
+static const uInt32 patchSupportData [] = {
+0x624DD0L,
+0x124DD0L,
+0x3F00000L,
+0x100000L,
+0x6150000L,
+0x82C58CL,
+0x1500000L,
+0x0L,
+0x460000L,
+0x0L,
+0x200000L,
+0x7D80000L,
+0x123400L,
+0x123400L,
+0x123400L,
+0x0L
+};
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+const proslicPatch si3217xPatchRevCFlbk = {
+#else
+const proslicPatch RevCPatch = {
+#endif
+ patchData,
+ patchEntries,
+ 0x06182014L,
+ patchSupportAddr,
+ patchSupportData
+};
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_revb_intf.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_revb_intf.c
new file mode 100644
index 0000000..211c028
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_revb_intf.c
@@ -0,0 +1,472 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_revb_intf.c 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** SI3217X Rev B ProSLIC interface implementation file
+**
+** Author(s):
+** cdp
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#include "si3217x.h"
+#include "si3217x_revb_intf.h"
+#include "si3217x_common_registers.h"
+#include "si3217x_revb_registers.h"
+#include "proslic_api_config.h"
+
+#define PRAM_ADDR (334 + 0x400)
+#define PRAM_DATA (335 + 0x400)
+
+#define WriteReg pProslic->deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadReg pProslic->deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHW pProslic->deviceId->ctrlInterface->hCtrl
+#define Reset pProslic->deviceId->ctrlInterface->Reset_fptr
+#define Delay pProslic->deviceId->ctrlInterface->Delay_fptr
+#define pProTimer pProslic->deviceId->ctrlInterface->hTimer
+#define WriteRAM pProslic->deviceId->ctrlInterface->WriteRAM_fptr
+#define ReadRAM pProslic->deviceId->ctrlInterface->ReadRAM_fptr
+#define TimeElapsed pProslic->deviceId->ctrlInterface->timeElapsed_fptr
+#define getTime pProslic->deviceId->ctrlInterface->getTime_fptr
+#define SetSemaphore pProslic->deviceId->ctrlInterface->Semaphore_fptr
+
+
+extern Si3217x_General_Cfg Si3217x_General_Configuration;
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+extern const proslicPatch SI3217X_PATCH_B_FLBK;
+extern const proslicPatch SI3217X_PATCH_B_BKBT;
+extern const proslicPatch SI3217X_PATCH_B_PBB;
+extern Si3217x_General_Cfg Si3217x_General_Configuration_MultiBOM[];
+extern int si3217x_genconf_multi_max_preset;
+#else
+extern const proslicPatch SI3217X_PATCH_B_DEFAULT;
+#endif
+
+/* Pulse Metering */
+#ifndef DISABLE_PULSE_SETUP
+extern Si3217x_PulseMeter_Cfg Si3217x_PulseMeter_Presets [];
+#endif
+
+#define SI3217X_COM_RAM_DCDC_DCFF_ENABLE SI3217X_COM_RAM_GENERIC_8
+#define GCONF Si3217x_General_Configuration
+
+#ifdef ENABLE_DEBUG
+static const char LOGPRINT_PREFIX[] = "Si3217x_B: ";
+#endif
+
+/*
+** Patch Support RAM Redefinitions
+*/
+#define PSR_DCDC_OVTHRESH_NEW SI3217X_COM_RAM_UNUSED1012
+
+/*
+** Constants
+*/
+#define CONST_DCDC_VREF_CTRL_REVB 0x00600000L
+#define CONST_DCDC_ANA_GAIN_REVB 0x00300000L
+#define BIT20LSB 1048576L
+#define OITHRESH_OFFS 900L
+#define OITHRESH_SCALE 100L
+#define OVTHRESH_OFFS 70000L
+#define OVTHRESH_SCALE 6000L
+#define UVTHRESH_OFFS 5000L
+#define UVTHRESH_SCALE 335L
+#define UVHYST_OFFS 1000L
+#define UVHYST_SCALE 200L
+
+
+
+/*
+** Function: Si3217x_RevB_GenParamUpdate
+**
+** Update general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+int Si3217x_RevB_GenParamUpdate(proslicChanType_ptr pProslic,initSeqType seq)
+{
+ uInt8 data;
+ ramData ram_data;
+ uInt8 oi_sense_scale;
+
+ switch(seq)
+ {
+ case INIT_SEQ_PRE_CAL:
+ /*
+ ** Force pwrsave off and disable AUTO-tracking - set to user configured state after cal
+ */
+ WriteReg(pProHW, pProslic->channel,SI3217X_COM_REG_ENHANCE,0);
+ WriteReg(pProHW, pProslic->channel,SI3217X_COM_REG_AUTO,0x2F);
+
+ /*
+ ** General Parameter Updates
+ */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_FSW_VTHLO,
+ Si3217x_General_Configuration.dcdc_fsw_vthlo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_FSW_VHYST,
+ Si3217x_General_Configuration.dcdc_fsw_vhyst);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_P_TH_HVIC,
+ Si3217x_General_Configuration.p_th_hvic);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_COEF_P_HVIC,
+ Si3217x_General_Configuration.coef_p_hvic);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_BAT_HYST,
+ Si3217x_General_Configuration.bat_hyst);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT,
+ Si3217x_General_Configuration.vbath_expect);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VBATR_EXPECT,
+ Si3217x_General_Configuration.vbatr_expect);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PWRSAVE_TIMER,
+ Si3217x_General_Configuration.pwrsave_timer);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_OFFHOOK_THRESH,
+ Si3217x_General_Configuration.pwrsave_ofhk_thresh);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VBAT_TRACK_MIN,
+ Si3217x_General_Configuration.vbat_track_min);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VBAT_TRACK_MIN_RNG,
+ Si3217x_General_Configuration.vbat_track_min_rng);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_FSW_NORM,
+ Si3217x_General_Configuration.dcdc_fsw_norm);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_FSW_NORM_LO,
+ Si3217x_General_Configuration.dcdc_fsw_norm_lo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_FSW_RINGING,
+ Si3217x_General_Configuration.dcdc_fsw_ring);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_FSW_RINGING_LO,
+ Si3217x_General_Configuration.dcdc_fsw_ring_lo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_DIN_LIM,
+ Si3217x_General_Configuration.dcdc_din_lim);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_VOUT_LIM,
+ Si3217x_General_Configuration.dcdc_vout_lim);
+
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PD_UVLO,
+ Si3217x_General_Configuration.pd_uvlo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PD_OVLO,
+ Si3217x_General_Configuration.pd_ovlo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PD_OCLO,
+ Si3217x_General_Configuration.pd_oclo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PD_SWDRV,
+ Si3217x_General_Configuration.pd_swdrv);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_UVPOL,
+ Si3217x_General_Configuration.dcdc_uvpol);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_RNGTYPE,
+ Si3217x_General_Configuration.dcdc_rngtype);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_ANA_TOFF,
+ Si3217x_General_Configuration.dcdc_ana_toff);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_ANA_TONMIN,
+ Si3217x_General_Configuration.dcdc_ana_tonmin);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_ANA_TONMAX,
+ Si3217x_General_Configuration.dcdc_ana_tonmax);
+
+
+ /*
+ ** Hardcoded RAM
+ */
+
+ /* OITHRESH */
+ if( Si3217x_General_Configuration.bom_option == BO_DCDC_LCQC_3W)
+ {
+ oi_sense_scale =
+ 2; /* OITHRESH should be twice as large as user input when 0.2 ohm Rsense is used -LG, 07/18/14 */
+ }
+ else
+ {
+ oi_sense_scale = 1;
+ }
+
+ ram_data = (oi_sense_scale*GCONF.i_oithresh > OITHRESH_OFFS)?
+ (oi_sense_scale*GCONF.i_oithresh - OITHRESH_OFFS)/OITHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_OITHRESH,ram_data);
+
+
+ /* OVTHRESH */
+ ram_data = (GCONF.v_ovthresh > OVTHRESH_OFFS)?(GCONF.v_ovthresh -
+ OVTHRESH_OFFS)/OVTHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_OVTHRESH,ram_data);
+
+ /* UVTHRESH */
+ ram_data = (GCONF.v_uvthresh > UVTHRESH_OFFS)?(GCONF.v_uvthresh -
+ UVTHRESH_OFFS)/UVTHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_UVTHRESH,ram_data);
+
+ /* UVHYST */
+ ram_data = (GCONF.v_uvhyst > UVHYST_OFFS)?(GCONF.v_uvhyst -
+ UVHYST_OFFS)/UVHYST_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_UVHYST,ram_data);
+
+ /* PM BOM dependent audio gain scaling */
+ if(Si3217x_General_Configuration.pm_bom == BO_PM_BOM)
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_SCALE_KAUDIO,BOM_KAUDIO_PM);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_AC_ADC_GAIN,
+ BOM_AC_ADC_GAIN_PM);
+ }
+ else
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_SCALE_KAUDIO,
+ BOM_KAUDIO_NO_PM);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_AC_ADC_GAIN,
+ BOM_AC_ADC_GAIN_NO_PM);
+ }
+
+ /* Default GPIO config - coarse sensors */
+ data = ReadReg(pProHW, pProslic->channel,SI3217X_COM_REG_GPIO_CFG1);
+ data &= 0xF9; /* Clear DIR for GPIO 1&2 */
+ data |= 0x60; /* Set ANA mode for GPIO 1&2 */
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_GPIO_CFG1,
+ data); /* coarse sensors analog mode */
+
+
+ /* Misc modifications to default settings */
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_PDN,
+ 0x80); /* madc powered in open state */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_A1_1,
+ 0x71EB851L); /* Fix HPF corner */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ROW0_C2,
+ 0x723F235L); /* improved DTMF det */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ROW1_C2,
+ 0x57A9804L); /* improved DTMF det */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_REF_OSC,
+ 0x200000L); /* PLL freerun workaround */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ILOOPLPF,
+ 0x4EDDB9L); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ILONGLPF,
+ 0x806D6L); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VDIFFLPF,
+ 0x10038DL); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VCMLPF,
+ 0x10059FL); /* 20pps pulse dialing */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_CM_SPEEDUP_TIMER,
+ 0xF0000L); /* 20pps pulse dialing */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VCM_HYST,0x206280L);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VCM_TH,
+ 0x106240L); /* 20pps pulse dialing */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_REVB_RAM_LKG_STBY_OFFSET,
+ 0x4000000L); /* Increase OHT standby leakage */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_VREF_CTRL,
+ CONST_DCDC_VREF_CTRL_REVB);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_ANA_GAIN,
+ CONST_DCDC_ANA_GAIN_REVB);
+
+
+ /*
+ ** Modified PSR Setting for PSR_DCDC_OVTHRESH_NEW based on BOM option -
+ ** this will allow for a single patch for all BOM options
+ ** RAM locations used by patch are locally defined
+ */
+ if(Si3217x_General_Configuration.bom_option == BO_DCDC_BUCK_BOOST)
+ {
+ WriteRAM(pProHW,pProslic->channel,PSR_DCDC_OVTHRESH_NEW,0x400000L);
+ }
+ else if(Si3217x_General_Configuration.bom_option == BO_DCDC_PMOS_BUCK_BOOST)
+ {
+ if(Si3217x_General_Configuration.vdc_range == VDC_9P0_24P0)
+ {
+ WriteRAM(pProHW,pProslic->channel,PSR_DCDC_OVTHRESH_NEW,0x700000L);
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,PSR_DCDC_OVTHRESH_NEW,0x300000L);
+ }
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,PSR_DCDC_OVTHRESH_NEW,0xB00000L);
+ }
+ break;
+
+
+ case INIT_SEQ_POST_CAL:
+ WriteReg(pProHW, pProslic->channel,SI3217X_COM_REG_ENHANCE,
+ Si3217x_General_Configuration.enhance);
+ WriteReg(pProHW, pProslic->channel,SI3217X_REVB_REG_DAA_CNTL,
+ Si3217x_General_Configuration.daa_cntl);
+ WriteReg(pProHW, pProslic->channel,SI3217X_COM_REG_AUTO,
+ Si3217x_General_Configuration.auto_reg);
+ break;
+
+ default:
+ break;
+
+ }
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: Si3217x_RevB_SelectPatch
+**
+** Select patch based on general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+** patch: Pointer to proslicPatch pointer
+**
+** Return:
+** error code
+*/
+int Si3217x_RevB_SelectPatch(proslicChanType_ptr pProslic,
+ const proslicPatch **patch)
+{
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+ if(Si3217x_General_Configuration.bom_option == BO_DCDC_FLYBACK)
+ {
+ *patch = &(SI3217X_PATCH_B_FLBK);
+ }
+ else if(Si3217x_General_Configuration.bom_option == BO_DCDC_BUCK_BOOST)
+ {
+ *patch = &(SI3217X_PATCH_B_BKBT);
+ }
+ else if(Si3217x_General_Configuration.bom_option == BO_DCDC_PMOS_BUCK_BOOST)
+ {
+ *patch = &(SI3217X_PATCH_B_PBB);
+ }
+ else if( Si3217x_General_Configuration.bom_option == BO_DCDC_LCQC_3W)
+ {
+ *patch = &(SI3217X_PATCH_B_LCQCUK);
+ }
+ else
+ {
+ DEBUG_PRINT(pProslic, "%sChannel %d : Invalid Patch\n", LOGPRINT_PREFIX,
+ pProslic->channel);
+ pProslic->channelEnable = 0;
+ pProslic->error = RC_INVALID_PATCH;
+ return RC_INVALID_PATCH;
+ }
+#else
+ *patch = &(SI3217X_PATCH_B_DEFAULT);
+#endif
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: Si3217x_RevB_ConverterSetup
+**
+** Description:
+** Program revision specific settings before powering converter
+**
+** Specifically, from general parameters and knowledge that this
+** is Rev B, setup dcff drive and gate drive polarity.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_RevB_ConverterSetup(proslicChanType_ptr pProslic)
+{
+ ramData inv_on;
+ ramData inv_off;
+
+ /* Option to add a per-channel inversion for maximum flexibility */
+ if(pProslic->dcdc_polarity_invert)
+ {
+ inv_on = 0x0L;
+ inv_off = 0x100000L;
+ }
+ else
+ {
+ inv_on = 0x100000L;
+ inv_off = 0x0L;
+ }
+
+ switch(Si3217x_General_Configuration.bom_option)
+ {
+ case BO_DCDC_FLYBACK:
+ case BO_DCDC_LCQC_3W:
+ /*
+ ** All revB flyback designs have gate driver,
+ ** inverted polarity, and no dcff drive
+ */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_DCFF_ENABLE,0x0L);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_SWFET,0x300000L);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_SWDRV_POL,inv_on);
+ break;
+
+ case BO_DCDC_BUCK_BOOST:
+ /*
+ ** All revB bjt buck boost designs have dcff drive,
+ ** no gate driver, and non-inverted polarity
+ */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_DCFF_ENABLE,
+ 0x10000000L);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_SWFET,0x300000L);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_SWDRV_POL,inv_off);
+ break;
+
+ case BO_DCDC_PMOS_BUCK_BOOST:
+ /*
+ ** RevB pmos buck boost designs have gate driver,
+ ** non-inverted polarity, and dcff drive on low voltage option only
+ */
+
+ if(Si3217x_General_Configuration.vdc_range == VDC_3P0_6P0)
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_DCFF_ENABLE,
+ 0x10000000L);
+ }
+ else
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_DCFF_ENABLE,0x0L);
+ }
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVB_RAM_DCDC_SWFET,0x300000L);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_SWDRV_POL,inv_off);
+ break;
+
+ default:
+ return RC_DCDC_SETUP_ERR;
+ }
+
+ return RC_NONE;
+}
+
+/*
+** Function: Si3217x_RevB_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+#ifndef DISABLE_PULSE_SETUP
+int Si3217x_RevB_PulseMeterSetup (proslicChanType *pProslic, int preset)
+{
+ uInt8 reg;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_PMCON,0x00); /* Disable PM */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PM_AMP_THRESH,
+ Si3217x_PulseMeter_Presets[preset].pm_amp_thresh);
+ reg = (Si3217x_PulseMeter_Presets[preset].pmFreq << 1) |
+ (Si3217x_PulseMeter_Presets[preset].pmRampRate << 4) |
+ (Si3217x_PulseMeter_Presets[preset].pmCalForce << 3) |
+ (Si3217x_PulseMeter_Presets[preset].pmPwrSave << 7) ;
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_PMCON,reg);
+
+ return RC_NONE;
+}
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_revc_intf.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_revc_intf.c
new file mode 100644
index 0000000..305e353
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3217x_revc_intf.c
@@ -0,0 +1,468 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si3217x_revc_intf.c 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** SI3217X_RevC_Intf.c
+** SI3217X RevC ProSLIC interface implementation file
+**
+** Author(s):
+** cdp
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#include "si3217x.h"
+#include "si3217x_revc_intf.h"
+#include "si3217x_common_registers.h"
+#include "si3217x_revc_registers.h"
+#include "proslic_api_config.h"
+
+#define PRAM_ADDR (334 + 0x400)
+#define PRAM_DATA (335 + 0x400)
+
+#define WriteReg pProslic->deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadReg pProslic->deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHW pProslic->deviceId->ctrlInterface->hCtrl
+#define Reset pProslic->deviceId->ctrlInterface->Reset_fptr
+#define Delay pProslic->deviceId->ctrlInterface->Delay_fptr
+#define pProTimer pProslic->deviceId->ctrlInterface->hTimer
+#define WriteRAM pProslic->deviceId->ctrlInterface->WriteRAM_fptr
+#define ReadRAM pProslic->deviceId->ctrlInterface->ReadRAM_fptr
+#define TimeElapsed pProslic->deviceId->ctrlInterface->timeElapsed_fptr
+#define getTime pProslic->deviceId->ctrlInterface->getTime_fptr
+#define SetSemaphore pProslic->deviceId->ctrlInterface->Semaphore_fptr
+
+
+extern Si3217x_General_Cfg Si3217x_General_Configuration;
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+extern const proslicPatch SI3217X_PATCH_C_FLBK;
+extern const proslicPatch SI3217X_PATCH_C_BKBT;
+extern const proslicPatch SI3217X_PATCH_C_PBB;
+extern const proslicPatch SI3217X_PATCH_C_LCQCUK;
+extern Si3217x_General_Cfg Si3217x_General_Configuration_MultiBOM[];
+extern int si3217x_genconf_multi_max_preset;
+#else
+extern const proslicPatch SI3217X_PATCH_C_DEFAULT;
+#endif
+/* Pulse Metering */
+#ifndef DISABLE_PULSE_SETUP
+extern Si3217x_PulseMeter_Cfg Si3217x_PulseMeter_Presets [];
+#endif
+
+#define SI3217X_COM_RAM_DCDC_DCFF_ENABLE SI3217X_COM_RAM_GENERIC_8
+#define GCONF Si3217x_General_Configuration
+
+#ifdef ENABLE_DEBUG
+static const char LOGPRINT_PREFIX[] = "Si3217x_C: ";
+#endif
+
+/*
+** Constants
+*/
+#define BIT20LSB 1048576L
+#define OITHRESH_OFFS 900L
+#define OITHRESH_SCALE 100L
+#define OVTHRESH_OFFS 71000
+#define OVTHRESH_SCALE 3000L
+#define UVTHRESH_OFFS 4057L
+#define UVTHRESH_SCALE 187L
+#define UVHYST_OFFS 548L
+#define UVHYST_SCALE 47L
+
+/*
+** Function: Si3217x_RevC_GenParamUpdate
+**
+** Update general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+int Si3217x_RevC_GenParamUpdate(proslicChanType_ptr pProslic,initSeqType seq)
+{
+ uInt8 data;
+ uInt8 oi_sense_scale;
+ ramData ram_data;
+
+ switch(seq)
+ {
+ case INIT_SEQ_PRE_CAL:
+ /*
+ ** Force pwrsave off and disable AUTO-tracking - set to user configured state after cal
+ */
+ WriteReg(pProHW, pProslic->channel,SI3217X_COM_REG_ENHANCE,0);
+ WriteReg(pProHW, pProslic->channel,SI3217X_COM_REG_AUTO,0x2F);
+
+ /*
+ ** General Parameter Updates
+ */
+
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_P_TH_HVIC,
+ Si3217x_General_Configuration.p_th_hvic);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_COEF_P_HVIC,
+ Si3217x_General_Configuration.coef_p_hvic);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_BAT_HYST,
+ Si3217x_General_Configuration.bat_hyst);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VBATH_EXPECT,
+ Si3217x_General_Configuration.vbath_expect);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VBATR_EXPECT,
+ Si3217x_General_Configuration.vbatr_expect);
+
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PWRSAVE_TIMER,
+ Si3217x_General_Configuration.pwrsave_timer);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_OFFHOOK_THRESH,
+ Si3217x_General_Configuration.pwrsave_ofhk_thresh);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VBAT_TRACK_MIN,
+ Si3217x_General_Configuration.vbat_track_min);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VBAT_TRACK_MIN_RNG,
+ Si3217x_General_Configuration.vbat_track_min_rng);
+
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_THERM_DBI,
+ Si3217x_General_Configuration.therm_dbi);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_VOV_DCDC_SLOPE,
+ Si3217x_General_Configuration.vov_dcdc_slope);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_VOV_DCDC_OS,
+ Si3217x_General_Configuration.vov_dcdc_os);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_VOV_RING_BAT_MAX,
+ Si3217x_General_Configuration.vov_ring_bat_max);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_VERR,
+ Si3217x_General_Configuration.dcdc_verr);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_VERR_HYST,
+ Si3217x_General_Configuration.dcdc_verr_hyst);
+
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PD_UVLO,
+ Si3217x_General_Configuration.pd_uvlo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PD_OVLO,
+ Si3217x_General_Configuration.pd_ovlo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PD_OCLO,
+ Si3217x_General_Configuration.pd_oclo);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PD_SWDRV,
+ Si3217x_General_Configuration.pd_swdrv);
+
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_UVPOL,
+ Si3217x_General_Configuration.dcdc_uvpol);
+
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_RNGTYPE,
+ Si3217x_General_Configuration.dcdc_rngtype);
+
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_ANA_TOFF,
+ Si3217x_General_Configuration.dcdc_ana_toff);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_ANA_TONMIN,
+ Si3217x_General_Configuration.dcdc_ana_tonmin);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_ANA_TONMAX,
+ Si3217x_General_Configuration.dcdc_ana_tonmax);
+
+
+ /*
+ ** Hardcoded RAM
+ */
+
+ if( (Si3217x_General_Configuration.bom_option == BO_DCDC_LCQC_3W)
+ || (Si3217x_General_Configuration.bom_option == BO_DCDC_LCQC_6W) )
+ {
+ oi_sense_scale =
+ 2; /* OITHRESH should be twice as large as user input when 0.2 ohm Rsense is used -LG, 07/18/14 */
+ }
+ else
+ {
+ oi_sense_scale = 1;
+ }
+
+ ram_data = (oi_sense_scale*GCONF.i_oithresh > OITHRESH_OFFS)?
+ (oi_sense_scale*GCONF.i_oithresh - OITHRESH_OFFS)/OITHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_OITHRESH,ram_data);
+
+ ram_data = (oi_sense_scale*GCONF.i_oithresh_lo > OITHRESH_OFFS)?
+ (oi_sense_scale*GCONF.i_oithresh_lo - OITHRESH_OFFS)/OITHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_OITHRESH_LO,ram_data);
+
+ ram_data = (oi_sense_scale*GCONF.i_oithresh_hi > OITHRESH_OFFS)?
+ (oi_sense_scale*GCONF.i_oithresh_hi - OITHRESH_OFFS)/OITHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_OITHRESH_HI,ram_data);
+
+ ram_data = (GCONF.v_ovthresh > OVTHRESH_OFFS)?(GCONF.v_ovthresh -
+ OVTHRESH_OFFS)/OVTHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_OVTHRESH,ram_data);
+
+ ram_data = (GCONF.v_uvthresh > UVTHRESH_OFFS)?(GCONF.v_uvthresh -
+ UVTHRESH_OFFS)/UVTHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_UVTHRESH,ram_data);
+
+ ram_data = (GCONF.v_uvhyst > UVHYST_OFFS)?(GCONF.v_uvhyst -
+ UVHYST_OFFS)/UVHYST_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_UVHYST,ram_data);
+
+ /* Set default audio gain based on PM bom */
+ if(Si3217x_General_Configuration.pm_bom == BO_PM_BOM)
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_SCALE_KAUDIO,BOM_KAUDIO_PM);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_AC_ADC_GAIN,
+ BOM_AC_ADC_GAIN_PM);
+ }
+ else
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_SCALE_KAUDIO,
+ BOM_KAUDIO_NO_PM);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_AC_ADC_GAIN,
+ BOM_AC_ADC_GAIN_NO_PM);
+ }
+
+ /*
+ ** Hardcoded changes to default settings
+ */
+ data = ReadReg(pProHW, pProslic->channel,SI3217X_COM_REG_GPIO_CFG1);
+ data &= 0xF9; /* Clear DIR for GPIO 1&2 */
+ data |= 0x60; /* Set ANA mode for GPIO 1&2 */
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_GPIO_CFG1,
+ data); /* coarse sensors analog mode */
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_PDN,
+ 0x80); /* madc powered in open state */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_TXACHPF_A1_1,
+ 0x71EB851L); /* Fix HPF corner */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PD_REF_OSC,
+ 0x200000L); /* PLL freerun workaround */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ILOOPLPF,
+ 0x4EDDB9L); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_ILONGLPF,
+ 0x806D6L); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_VDIFFLPF,
+ 0x10038DL); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_VREF_CTRL,0x0L);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VCM_TH,0x106240L);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VCMLPF,0x10059FL);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_CM_SPEEDUP_TIMER,0x0F0000);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_VCM_HYST,0x206280L);
+
+ /* Prevent Ref Osc from powering down in PLL Freerun mode (pd_ref_osc) */
+ ram_data = ReadRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PWRSAVE_CTRL_LO);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_PWRSAVE_CTRL_LO,
+ ram_data&0x07FFFFFFL); /* clear b27 */
+ break;
+
+
+ case INIT_SEQ_POST_CAL:
+ WriteReg(pProHW, pProslic->channel,SI3217X_COM_REG_ENHANCE,
+ Si3217x_General_Configuration.enhance&0x1F);
+ WriteReg(pProHW, pProslic->channel,SI3217X_COM_REG_AUTO,
+ Si3217x_General_Configuration.auto_reg);
+ if(Si3217x_General_Configuration.zcal_en)
+ {
+ WriteReg(pProHW,pProslic->channel, SI3217X_COM_REG_ZCAL_EN, 0x04);
+ }
+ break;
+
+ default:
+ break;
+ }
+ return RC_NONE;
+}
+
+
+/*
+** Function: Si3217x_RevC_SelectPatch
+**
+** Select patch based on general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+** patch: Pointer to proslicPatch pointer
+**
+** Return:
+** error code
+*/
+int Si3217x_RevC_SelectPatch(proslicChanType_ptr pProslic,
+ const proslicPatch **patch)
+{
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+ if(Si3217x_General_Configuration.bom_option == BO_DCDC_FLYBACK)
+ {
+ *patch = &(SI3217X_PATCH_C_FLBK);
+ }
+ else if(Si3217x_General_Configuration.bom_option == BO_DCDC_BUCK_BOOST)
+ {
+ *patch = &(SI3217X_PATCH_C_BKBT);
+ }
+ else if(Si3217x_General_Configuration.bom_option == BO_DCDC_PMOS_BUCK_BOOST)
+ {
+ *patch = &(SI3217X_PATCH_C_PBB);
+ }
+ else if( (Si3217x_General_Configuration.bom_option == BO_DCDC_LCQC_3W)
+ || (Si3217x_General_Configuration.bom_option == BO_DCDC_LCQC_6W) )
+ {
+ *patch = &(SI3217X_PATCH_C_LCQCUK);
+ }
+ else
+ {
+ DEBUG_PRINT(pProslic, "%sChannel %d : Invalid Patch\n", LOGPRINT_PREFIX,
+ pProslic->channel);
+ pProslic->channelEnable = 0;
+ pProslic->error = RC_INVALID_PATCH;
+ return RC_INVALID_PATCH;
+ }
+#else
+ *patch = &(SI3217X_PATCH_C_DEFAULT);
+#endif
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: Si3217x_RevC_ConverterSetup
+**
+** Description:
+** Program revision specific settings before powering converter
+**
+** Specifically, from general parameters and knowledge that this
+** is Rev C, setup dcff drive, gate drive polarity, and charge pump.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3217x_RevC_ConverterSetup(proslicChanType_ptr pProslic)
+{
+ ramData inv_on;
+ ramData inv_off;
+
+ /* Option to add a per-channel inversion for maximum flexibility */
+ if(pProslic->dcdc_polarity_invert)
+ {
+ inv_on = 0x0L;
+ inv_off = 0x100000L;
+ }
+ else
+ {
+ inv_on = 0x100000L;
+ inv_off = 0x0L;
+ }
+
+ switch(Si3217x_General_Configuration.bom_option)
+ {
+ case BO_DCDC_FLYBACK:
+ case BO_DCDC_LCQC_3W:
+ case BO_DCDC_LCQC_6W:
+ /*
+ ** RevC designs may or may not use gate driver, depending on the hardware
+ */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_LIFT_EN,
+ 0x0L); /* dcff disabled */
+ if(Si3217x_General_Configuration.gdrv_option == BO_GDRV_INSTALLED)
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_SWDRV_POL,
+ inv_on); /* inverted */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_CPUMP,
+ 0x0L); /* Charge pump off */
+ }
+ else
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_SWDRV_POL,
+ inv_off); /* non-inverted */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_CPUMP,
+ 0x100000L); /* Charge pump on */
+ Delay(pProTimer,20); /* Cpump settle */
+ }
+ break;
+
+ case BO_DCDC_BUCK_BOOST:
+ /*
+ ** RevC buck-boost designs are identical to RevB - no gate drive,
+ ** dcff enabled, non-inverting (charge pump off)
+ */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_CPUMP,0x0L);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_SWDRV_POL,inv_off);
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_LIFT_EN,
+ 0x100000L); /* dcff enabled */
+ break;
+
+ case BO_DCDC_PMOS_BUCK_BOOST:
+ /*
+ ** RevC design options
+ ** * No gate driver + no dcff drive (default revC hardware)
+ ** * Gate driver + no dcff drive (VDC_9P0_24P0 w/ revB hardware)
+ ** * Gate driver + dcff drive (VDC_3P0_6P0 w/ revB hardware) - deprecated
+ */
+ if(Si3217x_General_Configuration.gdrv_option == BO_GDRV_INSTALLED)
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_SWDRV_POL,
+ inv_off); /* non-inverted */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_CPUMP,
+ 0x0L); /* Charge pump off */
+ if(Si3217x_General_Configuration.vdc_range == VDC_3P0_6P0)
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_DCFF_ENABLE,
+ 0x10000000L); /* dcff enabled */
+ }
+ else
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_LIFT_EN,
+ 0x0L); /* dcff disabled */
+ }
+ }
+ else
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3217X_COM_RAM_DCDC_SWDRV_POL,
+ inv_on); /* inverted */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_CPUMP,
+ 0x100000L); /* Charge pump on */
+ WriteRAM(pProHW, pProslic->channel,SI3217X_REVC_RAM_DCDC_LIFT_EN,
+ 0x0L); /* dcff disabled */
+ }
+ Delay(pProTimer,20); /* Cpump settle */
+
+ break;
+
+ default:
+ return RC_DCDC_SETUP_ERR;
+ }
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: Si3217x_RevC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+#ifndef DISABLE_PULSE_SETUP
+int Si3217x_RevC_PulseMeterSetup (proslicChanType *pProslic, int preset)
+{
+ uInt8 reg;
+ WriteRAM(pProHW,pProslic->channel,SI3217X_COM_RAM_PM_AMP_THRESH,
+ Si3217x_PulseMeter_Presets[preset].pm_amp_thresh);
+ reg = (Si3217x_PulseMeter_Presets[preset].pmFreq<<1)|
+ (Si3217x_PulseMeter_Presets[preset].pmAuto<<3);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_REVC_RAM_PM_ACTIVE,
+ Si3217x_PulseMeter_Presets[preset].pmActive);
+ WriteRAM(pProHW,pProslic->channel,SI3217X_REVC_RAM_PM_INACTIVE,
+ Si3217x_PulseMeter_Presets[preset].pmInactive);
+ WriteReg(pProHW,pProslic->channel,SI3217X_COM_REG_PMCON,reg);
+ return RC_NONE;
+}
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_MULTI_BOM_constants.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_MULTI_BOM_constants.c
new file mode 100644
index 0000000..ac13054
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_MULTI_BOM_constants.c
@@ -0,0 +1,788 @@
+/*
+** Copyright (c) 2016 Silicon Laboratories, Inc.
+** 2016-12-20 21:56:57
+**
+** Si3218x ProSLIC API Configuration Tool Version 4.0.7
+** Last Updated in API Release: 8.2.0
+** source XML file: si3218x_LCCB_constants.xml
+**
+** Auto generated file from configuration tool.
+*/
+
+
+#include "proslic.h"
+#include "si3218x.h"
+
+Si3218x_General_Cfg Si3218x_General_Configuration = {
+0x72, /* DEVICE_KEY */
+BO_DCDC_LCCB, /* BOM_OPT */
+VDC_4P5_16P0, /* VDC_RANGE_OPT */
+AUTO_ZCAL_ENABLED, /* ZCAL_ENABLE */
+BO_STD_BOM, /* PM_BOM */
+0x00000000L, /* DCDC_OITHRESH_LO */
+0x01A00000L, /* DCDC_OITHRESH_HI */
+0x00A00000L, /* DCDC_OVTHRESH */
+5000L, /* DCDC_UVTHRESH */
+1000L, /* DCDC_UVHYST */
+0x00000000L, /* DCDC_FSW_VTHLO */
+0x00000000L, /* DCDC_FSW_VHYST */
+0x0048D15BL, /* P_TH_HVIC */
+0x07FEB800L, /* COEF_P_HVIC */
+0x00083120L, /* BAT_HYST */
+0x03D70A20L, /* VBATH_EXPECT (60.00V) */
+0x06666635L, /* VBATR_EXPECT (100.00V) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00800000L, /* THERM_DBI */
+0x00FFFFFFL, /* VOV_DCDC_SLOPE */
+0x00A18937L, /* VOV_DCDC_OS */
+0x00A18937L, /* VOV_RING_BAT_DCDC */
+0x00E49BA5L, /* VOV_RING_BAT_MAX */
+0x01018900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00000000L, /* DCDC_UVPOL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x00180000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x012FC000L, /* DCDC_ANA_TONMAX */
+0x40, /* IRQEN1 *///org->0x50 mod->0x00
+0x12, /* IRQEN *///org->0x13 mod->0x00
+0x00, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x30, /* ENHANCE */
+0x3E, /* AUTO */
+};
+
+
+/* Start of MULTI BOM section */
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+
+#include "si32xxx_multibom_constants.h"
+int si3218x_genconf_multi_max_preset = SI3218X_GEN_PARAM_LAST;
+
+Si3218x_General_Cfg Si3218x_General_Configuration_MultiBOM[SI3218X_GEN_PARAM_LAST] = {
+{ /* SI3218X_LCCB */
+0x72, /* DEVICE_KEY */
+BO_DCDC_LCCB, /* BOM_OPT */
+VDC_4P5_16P0, /* VDC_RANGE_OPT */
+AUTO_ZCAL_ENABLED, /* ZCAL_ENABLE */
+BO_STD_BOM, /* PM_BOM */
+0x00000000L, /* DCDC_OITHRESH_LO */
+0x01A00000L, /* DCDC_OITHRESH_HI */
+0x00A00000L, /* DCDC_OVTHRESH */
+5000L, /* DCDC_UVTHRESH */
+1000L, /* DCDC_UVHYST */
+0x00000000L, /* DCDC_FSW_VTHLO */
+0x00000000L, /* DCDC_FSW_VHYST */
+0x0048D15BL, /* P_TH_HVIC */
+0x07FEB800L, /* COEF_P_HVIC */
+0x00083120L, /* BAT_HYST */
+0x03D70A20L, /* VBATH_EXPECT (60.00V) */
+0x06666635L, /* VBATR_EXPECT (100.00V) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00800000L, /* THERM_DBI */
+0x00FFFFFFL, /* VOV_DCDC_SLOPE */
+0x00A18937L, /* VOV_DCDC_OS */
+0x00A18937L, /* VOV_RING_BAT_DCDC */
+0x00E49BA5L, /* VOV_RING_BAT_MAX */
+0x01018900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00000000L, /* DCDC_UVPOL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x00180000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x012FC000L, /* DCDC_ANA_TONMAX */
+0x40, /* IRQEN1 */ //org->0x50 mod->0x00
+0x12, /* IRQEN */ //org->0x13 mod->0x00
+0x00, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x30, /* ENHANCE */
+0x3E, /* AUTO */
+}
+};
+#endif
+
+/* End of MULTI BOM section */
+
+Si3218x_audioGain_Cfg Si3218x_audioGain_Presets [] = {
+{0x1377080L,0, 0x0L, 0x0L, 0x0L, 0x0L},
+{0x80C3180L,0, 0x0L, 0x0L, 0x0L, 0x0L}
+};
+
+Si3218x_Ring_Cfg Si3218x_Ring_Presets[] ={
+{
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 3, Rcpe = 600 ohms
+ Rprot = 54 ohms, Type = LPR, Waveform = SINE
+*/
+0x00050000L, /* RTPER */
+0x07EFE000L, /* RINGFR (20.000 Hz) */
+0x00209380L, /* RINGAMP (55.000 vrms) */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x006C94D6L, /* IRING_LIM (70.000 mA) */
+0x00522220L, /* RTACTH (45.357 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00006000L, /* RTACDB (75.000 ms) */
+0x00006000L, /* RTDCDB (75.000 ms) */
+0x0051EB82L, /* VOV_RING_BAT (5.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x05B835EFL, /* VBATR_EXPECT (89.368 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00051EB8L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* VBAT_TRACK_MIN_RNG */
+0x98, /* RINGCON */
+0x00, /* USERSTAT */
+0x02DC1AF7L, /* VCM_RING (43.434 v) */
+0x02DC1AF7L, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* DEFAULT_RINGING */
+{
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 5, Rcpe = 600 ohms
+ Rprot = 54 ohms, Type = LPR, Waveform = SINE
+*/
+0x00050000L, /* RTPER */
+0x07EFE000L, /* RINGFR (20.000 Hz) */
+0x001C0AFCL, /* RINGAMP (45.000 vrms) */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x006C94D6L, /* IRING_LIM (70.000 mA) */
+0x0068A9B9L, /* RTACTH (57.798 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00006000L, /* RTACDB (75.000 ms) */
+0x00006000L, /* RTDCDB (75.000 ms) */
+0x0051EB82L, /* VOV_RING_BAT (5.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x04F7DA57L, /* VBATR_EXPECT (77.628 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00051EB8L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* VBAT_TRACK_MIN_RNG */
+0x98, /* RINGCON */
+0x00, /* USERSTAT */
+0x027BED2BL, /* VCM_RING (37.564 v) */
+0x027BED2BL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+} , /* RING_F20_45VRMS_0VDC_LPR */
+{
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 5, Rcpe = 600 ohms
+ Rprot = 54 ohms, Type = LPR, Waveform = SINE
+*/
+0x00050000L, /* RTPER */
+0x07EFE000L, /* RINGFR (20.000 Hz) */
+0x001C0AFCL, /* RINGAMP (45.000 vrms) */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x006C94D6L, /* IRING_LIM (70.000 mA) */
+0x0068A9B9L, /* RTACTH (57.798 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00006000L, /* RTACDB (75.000 ms) */
+0x00006000L, /* RTDCDB (75.000 ms) */
+0x0051EB82L, /* VOV_RING_BAT (5.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x04F7DA57L, /* VBATR_EXPECT (77.628 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00051EB8L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* VBAT_TRACK_MIN_RNG */
+0x98, /* RINGCON */
+0x00, /* USERSTAT */
+0x027BED2BL, /* VCM_RING (37.564 v) */
+0x027BED2BL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F20_45VRMS_0VDC_LPR */
+{
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 5, Rcpe = 600 ohms
+ Rprot = 54 ohms, Type = LPR, Waveform = SINE
+*/
+0x00050000L, /* RTPER */
+0x07EFE000L, /* RINGFR (20.000 Hz) */
+0x001C0AFCL, /* RINGAMP (45.000 vrms) */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x006C94D6L, /* IRING_LIM (70.000 mA) */
+0x0068A9B9L, /* RTACTH (57.798 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00006000L, /* RTACDB (75.000 ms) */
+0x00006000L, /* RTDCDB (75.000 ms) */
+0x0051EB82L, /* VOV_RING_BAT (5.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x04F7DA57L, /* VBATR_EXPECT (77.628 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0xC0, /* RINGTILO (3.000 s) */
+0x5D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00051EB8L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* VBAT_TRACK_MIN_RNG */
+0x98, /* RINGCON */
+0x00, /* USERSTAT */
+0x027BED2BL, /* VCM_RING (37.564 v) */
+0x027BED2BL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F20_45VRMS_0VDC_LPR_SHORTTIME */
+};
+
+Si3218x_DCfeed_Cfg Si3218x_DCfeed_Presets[] = {
+{
+0x1C8A024CL, /* SLOPE_VLIM */
+0x1F909679L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1D5B21A9L, /* SLOPE_DELTA1 */
+0x1DD87A3EL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x00B4F3C3L, /* CONST_RFEED (15.000 mA) */
+0x005D0FA6L, /* CONST_ILIM (20.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_48V_20MA */
+{
+0x1C8A024CL, /* SLOPE_VLIM */
+0x1EE08C11L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1C940D71L, /* SLOPE_DELTA1 */
+0x1DD87A3EL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x01241BC9L, /* CONST_RFEED (15.000 mA) */
+0x0074538FL, /* CONST_ILIM (25.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_48V_25MA */
+{
+0x1E655196L, /* SLOPE_VLIM */
+0x001904EFL, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1B4CAD9EL, /* SLOPE_DELTA1 */
+0x1BB0F47CL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x043AA4A6L, /* V_RFEED (36.000 v) */
+0x025977EAL, /* V_ILIM (20.000 v) */
+0x0068B19AL, /* CONST_RFEED (18.000 mA) */
+0x005D0FA6L, /* CONST_ILIM (20.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_PSTN_DET_1 */
+{
+0x1A10433FL, /* SLOPE_VLIM */
+0x1C206275L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1C1F426FL, /* SLOPE_DELTA1 */
+0x1EB51625L, /* SLOPE_DELTA2 */
+0x041C91DBL, /* V_VLIM (35.000 v) */
+0x03E06C43L, /* V_RFEED (33.000 v) */
+0x038633E0L, /* V_ILIM (30.000 v) */
+0x022E5DE5L, /* CONST_RFEED (10.000 mA) */
+0x005D0FA6L, /* CONST_ILIM (20.000 mA) */
+0x0021373DL, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+} /* DCFEED_PSTN_DET_2 */
+};
+
+Si3218x_Impedance_Cfg Si3218x_Impedance_Presets[] ={
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=600_0_0 rprot=30 rfuse=24 emi_cap=10*/
+{
+{0x07F3A400L, 0x000FF180L, 0x00009380L, 0x1FFDA800L, /* TXACEQ */
+ 0x07EF1600L, 0x0014B500L, 0x1FFD6580L, 0x1FFCA400L}, /* RXACEQ */
+{0x0008EF00L, 0x00099780L, 0x017DF600L, 0x0096B900L, /* ECFIR/ECIIR */
+ 0x02549000L, 0x1E4B7D00L, 0x018EEE00L, 0x1EEE0600L,
+ 0x008A8080L, 0x1F713080L, 0x0489BA00L, 0x03592500L},
+{0x0086CE00L, 0x1EF46980L, 0x0084CB00L, 0x0FE34F00L, /* ZSYNTH */
+ 0x181CA780L, 0x5D},
+ 0x08EB8E00L, /* TXACGAIN */
+ 0x01532100L, /* RXACGAIN */
+ 0x07AA7180L, 0x18558F00L, 0x0754E300L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_600_0_0_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=270_750_150 rprot=30 rfuse=24 emi_cap=10*/
+{
+{0x0750E500L, 0x1FC70280L, 0x000BA980L, 0x1FFD2880L, /* TXACEQ */
+ 0x0A8E2380L, 0x1B905280L, 0x00847700L, 0x1FDAFA00L}, /* RXACEQ */
+{0x002C8880L, 0x1F630D80L, 0x027F7980L, 0x1F3AD200L, /* ECFIR/ECIIR */
+ 0x040B8680L, 0x1F414D00L, 0x01427B00L, 0x00208200L,
+ 0x0026AE00L, 0x1FD71680L, 0x0C8EDB00L, 0x1B688A00L},
+{0x1F657980L, 0x0096FE00L, 0x00035500L, 0x0D7FE800L, /* ZSYNTH */
+ 0x1A7F1A80L, 0xB4},
+ 0x08000000L, /* TXACGAIN */
+ 0x01106B80L, /* RXACGAIN */
+ 0x07BC8400L, 0x18437C80L, 0x07790880L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_270_750_150_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=370_620_310 rprot=30 rfuse=24 emi_cap=10*/
+{
+{0x08363C80L, 0x1FB03200L, 0x1FFBD200L, 0x1FFC7A00L, /* TXACEQ */
+ 0x0A0D0800L, 0x1BEB0880L, 0x1F9DF080L, 0x1FE07F00L}, /* RXACEQ */
+{0x00236380L, 0x1F947D00L, 0x020DE380L, 0x1FBEED00L, /* ECFIR/ECIIR */
+ 0x03050300L, 0x1F7D1D00L, 0x010A9F80L, 0x00329D80L,
+ 0x003E4100L, 0x1FC0DF00L, 0x0DAADE80L, 0x1A4F2600L},
+{0x00226100L, 0x1F8EEE80L, 0x004E9D00L, 0x0F0B9B00L, /* ZSYNTH */
+ 0x18F3E580L, 0x99},
+ 0x0808D100L, /* TXACGAIN */
+ 0x0131BE80L, /* RXACGAIN */
+ 0x07B5C100L, 0x184A3F80L, 0x076B8200L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_370_620_310_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=220_820_120 rprot=30 rfuse=24 emi_cap=10*/
+{
+{0x07194B80L, 0x1FC63800L, 0x0008D280L, 0x1FFC0600L, /* TXACEQ */
+ 0x0A849680L, 0x1BB04480L, 0x00A4AA00L, 0x1FD3E680L}, /* RXACEQ */
+{0x001B8C00L, 0x1FC65400L, 0x016A5F00L, 0x01323C80L, /* ECFIR/ECIIR */
+ 0x01DB4980L, 0x01484700L, 0x00258000L, 0x007E9C80L,
+ 0x0016FF00L, 0x1FE69100L, 0x0CE9A400L, 0x1B0EA980L},
+{0x00B3D800L, 0x1D2F8280L, 0x021C8B00L, 0x0A157F00L, /* ZSYNTH */
+ 0x1DE99E80L, 0xAD},
+ 0x08000000L, /* TXACGAIN */
+ 0x01084680L, /* RXACGAIN */
+ 0x07BBFA80L, 0x18440600L, 0x0777F580L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_220_820_120_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=600_0_0 rprot=30 rfuse=24 emi_cap=10*/
+{
+{0x07F3A400L, 0x000FF180L, 0x00009380L, 0x1FFDA800L, /* TXACEQ */
+ 0x07EF1600L, 0x0014B500L, 0x1FFD6580L, 0x1FFCA400L}, /* RXACEQ */
+{0x0008EF00L, 0x00099780L, 0x017DF600L, 0x0096B900L, /* ECFIR/ECIIR */
+ 0x02549000L, 0x1E4B7D00L, 0x018EEE00L, 0x1EEE0600L,
+ 0x008A8080L, 0x1F713080L, 0x0489BA00L, 0x03592500L},
+{0x0086CE00L, 0x1EF46980L, 0x0084CB00L, 0x0FE34F00L, /* ZSYNTH */
+ 0x181CA780L, 0x5D},
+ 0x08EB8E00L, /* TXACGAIN */
+ 0x01532100L, /* RXACGAIN */
+ 0x07AA7180L, 0x18558F00L, 0x0754E300L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_600_0_1000_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=200_680_100 rprot=30 rfuse=24 emi_cap=10*/
+{
+{0x0778B980L, 0x1FB97E00L, 0x00030780L, 0x1FFC2580L, /* TXACEQ */
+ 0x09CC0780L, 0x1D104400L, 0x0076CB80L, 0x1FDE3D80L}, /* RXACEQ */
+{0x1FF64C00L, 0x00456280L, 0x00BEC500L, 0x014D3E80L, /* ECFIR/ECIIR */
+ 0x02EB2B00L, 0x1E983B80L, 0x029EE280L, 0x1E7B7400L,
+ 0x00D19A80L, 0x1F293D80L, 0x06116D00L, 0x01D55C00L},
+{0x01241700L, 0x1CB53A80L, 0x02269400L, 0x0A14BA00L, /* ZSYNTH */
+ 0x1DE9D080L, 0x99},
+ 0x08000000L, /* TXACGAIN */
+ 0x01152480L, /* RXACGAIN */
+ 0x07B96C00L, 0x18469480L, 0x0772D800L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_200_680_100_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=220_820_115 rprot=30 rfuse=24 emi_cap=10*/
+{
+{0x070AC700L, 0x1FCC7280L, 0x00098700L, 0x1FFCE080L, /* TXACEQ */
+ 0x0A6A6400L, 0x1BE48B80L, 0x009F3B80L, 0x1FD56000L}, /* RXACEQ */
+{0x00314700L, 0x1F6C1D80L, 0x02347480L, 0x00158B80L, /* ECFIR/ECIIR */
+ 0x03173D00L, 0x0058E580L, 0x00A6DA80L, 0x004B0780L,
+ 0x001B1300L, 0x1FE2DE80L, 0x0C313180L, 0x1BB7FE00L},
+{0x1FD95980L, 0x1ECDE680L, 0x0156F600L, 0x0A0C9600L, /* ZSYNTH */
+ 0x1DEBF080L, 0xB4},
+ 0x08000000L, /* TXACGAIN */
+ 0x01069C80L, /* RXACGAIN */
+ 0x07BECB80L, 0x18413500L, 0x077D9700L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ }, /* ZSYN_220_820_115_30_0 */
+/* Source: Database file: cwdb.db */
+/* Database information: */
+/* parameters: zref=600_0_0 rprot=30 rfuse=24 emi_cap=0*/
+{
+{0x081A5300L, 0x1FE00A00L, 0x00071580L, 0x1FFE2600L, /* TXACEQ */
+ 0x07F9A800L, 0x1FFA7D80L, 0x1FF59E80L, 0x1FFF1400L}, /* RXACEQ */
+{0x0052DC80L, 0x1F455780L, 0x0297A080L, 0x0006D980L, /* ECFIR/ECIIR */
+ 0x0195DC00L, 0x000E1E80L, 0x1FC53680L, 0x00050800L,
+ 0x00233400L, 0x1FE6DC00L, 0x1FCD1E00L, 0x1FD2FE00L},
+{0x007B9C00L, 0x1F296C80L, 0x005BCD00L, 0x09F07F00L, /* ZSYNTH */
+ 0x1DF35080L, 0x6F},
+ 0x08C2DA80L, /* TXACGAIN */
+ 0x01495A80L, /* RXACGAIN */
+ 0x07BECC80L, 0x18413400L, 0x077D9900L, /* RXACHPF */
+#ifdef ENABLE_HIRES_GAIN
+ 0, 0 /* TXGAIN*10, RXGAIN*10 (hi_res) */
+#else
+ 0, 0 /* TXGAIN, RXGAIN */
+#endif
+ } /* WB_ZSYN_600_0_0_20_0 */
+};
+
+Si3218x_FSK_Cfg Si3218x_FSK_Presets[] ={
+{
+{
+0x02232000L, /* FSK01 */
+0x077C2000L /* FSK10 */
+},
+{
+0x0015C000L, /* FSKAMP0 (0.080 vrms )*/
+0x000BA000L /* FSKAMP1 (0.080 vrms) */
+},
+{
+0x06B60000L, /* FSKFREQ0 (2200.0 Hz space) */
+0x079C0000L /* FSKFREQ1 (1200.0 Hz mark) */
+},
+0x00, /* FSK8 */
+0x00, /* FSKDEPTH (1 deep fifo) */
+}, /* DEFAULT_FSK */
+{
+{
+0x026E4000L, /* FSK01 */
+0x0694C000L /* FSK10 */
+},
+{
+0x0014C000L, /* FSKAMP0 (0.080 vrms )*/
+0x000CA000L /* FSKAMP1 (0.080 vrms) */
+},
+{
+0x06D20000L, /* FSKFREQ0 (2100.0 Hz space) */
+0x078B0000L /* FSKFREQ1 (1300.0 Hz mark) */
+},
+0x00, /* FSK8 */
+0x00, /* FSKDEPTH (1 deep fifo) */
+} /* ETSI_FSK */
+};
+
+Si3218x_PulseMeter_Cfg Si3218x_PulseMeter_Presets[] ={
+{
+0x007A2B6AL, /* PM_AMP_THRESH (1.000) */
+0, /* Freq (12kHz) */
+0, /* PM_AUTO (off)*/
+0x07D00000L, /* PM_active (2000 ms) */
+0x07D00000L /* PM_inactive (2000 ms) */
+ } /* DEFAULT_PULSE_METERING */
+};
+
+Si3218x_Tone_Cfg Si3218x_Tone_Presets[] = {
+{
+ {
+ 0x07B30000L, /* OSC1FREQ (350.000 Hz) */
+ 0x000C6000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x00, /* O1TALO (0 ms) */
+ 0x00, /* O1TAHI */
+ 0x00, /* O1TILO (0 ms) */
+ 0x00 /* O1TIHI */
+ },
+ {
+ 0x07870000L, /* OSC2FREQ (440.000 Hz) */
+ 0x000FA000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x00, /* O2TALO (0 ms) */
+ 0x00, /* O2TAHI */
+ 0x00, /* O2TILO (0 ms) */
+ 0x00 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_DIAL */
+{
+ {
+ 0x07700000L, /* OSC1FREQ (480.000 Hz) */
+ 0x00112000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0xA0, /* O1TALO (500 ms) */
+ 0x0F, /* O1TAHI */
+ 0xA0, /* O1TILO (500 ms) */
+ 0x0F /* O1TIHI */
+ },
+ {
+ 0x07120000L, /* OSC2FREQ (620.000 Hz) */
+ 0x00164000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0xA0, /* O2TALO (500 ms) */
+ 0x0F, /* O2TAHI */
+ 0xA0, /* O2TILO (500 ms) */
+ 0x0F /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_BUSY */
+{
+ {
+ 0x07700000L, /* OSC1FREQ (480.000 Hz) */
+ 0x00112000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x80, /* O1TALO (2000 ms) */
+ 0x3E, /* O1TAHI */
+ 0x00, /* O1TILO (4000 ms) */
+ 0x7D /* O1TIHI */
+ },
+ {
+ 0x07870000L, /* OSC2FREQ (440.000 Hz) */
+ 0x000FA000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x80, /* O2TALO (2000 ms) */
+ 0x3E, /* O2TAHI */
+ 0x00, /* O2TILO (4000 ms) */
+ 0x7D /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_RINGBACK */
+#if 0
+{
+ {
+ 0x07700000L, /* OSC1FREQ (480.000 Hz) */
+ 0x00112000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x60, /* O1TALO (300 ms) */
+ 0x09, /* O1TAHI */
+ 0x60, /* O1TILO (300 ms) */
+ 0x09 /* O1TIHI */
+ },
+ {
+ 0x07120000L, /* OSC2FREQ (620.000 Hz) */
+ 0x00164000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x60, /* O2TALO (300 ms) */
+ 0x09, /* O2TAHI */
+ 0x40, /* O2TILO (200 ms) */
+ 0x06 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_REORDER */
+#endif
+{
+ {
+ 0x07700000L, /* OSC1FREQ (480.000 Hz) */
+ 0x00112000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x40, /* O1TALO (200 ms) */
+ 0x06, /* O1TAHI */
+ 0x40, /* O1TILO (200 ms) */
+ 0x06 /* O1TIHI */
+ },
+ {
+ 0x07120000L, /* OSC2FREQ (620.000 Hz) */
+ 0x00164000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x40, /* O2TALO (200 ms) */
+ 0x06, /* O2TAHI */
+ 0x40, /* O2TILO (200 ms) */
+ 0x06 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_FCC_CONGESTION */
+{
+ {
+ 0x07870000L, /* OSC1FREQ (440.000 Hz) */
+ 0x000FA000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x20, /* O1TALO (100 ms) */
+ 0x03, /* O1TAHI */
+ 0x60, /* O1TILO (3500 ms) */
+ 0x6D /* O1TIHI */
+ },
+ {
+ 0x07870000L, /* OSC2FREQ (440.000 Hz) */
+ 0x000FA000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x20, /* O2TALO (100 ms) */
+ 0x03, /* O2TAHI */
+ 0x60, /* O2TILO (3500 ms) */
+ 0x6D /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* CALL_WAITING_TONE */
+{
+ {
+ 0x078F0000L, /* OSC1FREQ (425.000 Hz) */
+ 0x000F2000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x40, /* O1TALO (200 ms) */
+ 0x06, /* O1TAHI */
+ 0x40, /* O1TILO (200 ms) */
+ 0x06 /* O1TIHI */
+ },
+ {
+ 0x078F0000L, /* OSC2FREQ (425.000 Hz) */
+ 0x000F2000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x40, /* O2TALO (200 ms) */
+ 0x06, /* O2TAHI */
+ 0x40, /* O2TILO (200 ms) */
+ 0x06 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+} /* HOWLER_TONE */
+
+};
+
+Si3218x_PCM_Cfg Si3218x_PCM_Presets[] ={
+ {
+ 0x01, /* PCM_FMT - u-Law */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT NONE */
+ }, /* PCM_8ULAW */
+ {
+ 0x00, /* PCM_FMT - A-Law */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT NONE */
+ }, /* PCM_8ALAW */
+ {
+ 0x03, /* PCM_FMT - 16-bit Linear */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT NONE */
+ }, /* PCM_16LIN */
+ {
+ 0x03, /* PCM_FMT - 16-bit Linear */
+ 0x01, /* WIDEBAND - ENABLED (7kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT NONE */
+ } /* PCM_16LIN_WB */
+};
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_intf.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_intf.c
new file mode 100644
index 0000000..6c465fc
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_intf.c
@@ -0,0 +1,3525 @@
+/*
+** Copyright (c) 2015-2016 by Silicon Laboratories
+**
+** $Id: si3218x_intf.c 6117 2016-11-15 22:22:45Z nizajerk $
+**
+** SI3218X ProSLIC interface implementation file
+**
+** Author(s):
+** cdp
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#include "si3218x.h"
+#include "si3218x_intf.h"
+#include "si3218x_registers.h"
+#include "proslic_api_config.h"
+
+#define PRAM_ADDR (334 + 0x400)
+#define PRAM_DATA (335 + 0x400)
+#define SI3218X_IRING_LIM_MAX 0x6C94D7L /* 70 mA */
+#define SI3218X_REVA 2
+
+#define WriteReg pProslic->deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadReg pProslic->deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHW pProslic->deviceId->ctrlInterface->hCtrl
+#define Reset pProslic->deviceId->ctrlInterface->Reset_fptr
+#define Delay pProslic->deviceId->ctrlInterface->Delay_fptr
+#define pProTimer pProslic->deviceId->ctrlInterface->hTimer
+#define WriteRAM pProslic->deviceId->ctrlInterface->WriteRAM_fptr
+#define ReadRAM pProslic->deviceId->ctrlInterface->ReadRAM_fptr
+#define TimeElapsed pProslic->deviceId->ctrlInterface->timeElapsed_fptr
+#define getTime pProslic->deviceId->ctrlInterface->getTime_fptr
+#define SetSemaphore pProslic->deviceId->ctrlInterface->Semaphore_fptr
+
+#define WriteRegX deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadRegX deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHWX deviceId->ctrlInterface->hCtrl
+#define DelayX deviceId->ctrlInterface->Delay_fptr
+#define pProTimerX deviceId->ctrlInterface->hTimer
+#define ReadRAMX deviceId->ctrlInterface->ReadRAM_fptr
+#define WriteRAMX deviceId->ctrlInterface->WriteRAM_fptr
+
+#define BROADCAST 0xff
+#define DEVICE_KEY_MIN 0x6E
+#define DEVICE_KEY_MAX 0x77
+
+/*
+** Define patch parameters that can be modified by API
+*/
+#define SI3218X_PRAM_VBATH_NEON 928
+#define SI3218X_PRAM_LCRMASK_MWI 892
+#define SI3218X_PRAM_VBATH_EXPECT_SAVE 924
+
+#ifdef ENABLE_DEBUG
+static const char LOGPRINT_PREFIX[] = "Si3218x: ";
+#endif
+
+/*
+** Externs
+*/
+
+/* General Configuration */
+extern Si3218x_General_Cfg Si3218x_General_Configuration;
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+extern const proslicPatch SI3218X_PATCH_A;
+extern Si3218x_General_Cfg Si3218x_General_Configuration_MultiBOM[];
+extern int si3218x_genconf_multi_max_preset;
+#else
+extern const proslicPatch SI3218X_PATCH_A_DEFAULT;
+#endif
+
+/* Ringing */
+#ifndef DISABLE_RING_SETUP
+extern Si3218x_Ring_Cfg Si3218x_Ring_Presets[];
+#endif
+
+/* Zsynth */
+#ifndef DISABLE_ZSYNTH_SETUP
+extern Si3218x_Impedance_Cfg Si3218x_Impedance_Presets [];
+#endif
+
+/* Audio Gain Scratch */
+extern Si3218x_audioGain_Cfg Si3218x_audioGain_Presets[];
+
+/* Pulse Metering */
+#ifndef DISABLE_PULSE_SETUP
+extern Si3218x_PulseMeter_Cfg Si3218x_PulseMeter_Presets [];
+#endif
+
+/* PCM */
+#ifndef DISABLE_PCM_SETUP
+extern Si3218x_PCM_Cfg Si3218x_PCM_Presets [];
+#endif
+
+#define SI3218X_RAM_DCDC_DCFF_ENABLE SI3218X_RAM_GENERIC_8
+#define GCONF Si3218x_General_Configuration
+
+/*
+** Constants
+*/
+#define BIT20LSB 1048576L
+#define OITHRESH_OFFS 900L
+#define OITHRESH_SCALE 100L
+#define OVTHRESH_OFFS 71000
+#define OVTHRESH_SCALE 3000L
+#define UVTHRESH_OFFS 4057L
+#define UVTHRESH_SCALE 187L
+#define UVHYST_OFFS 548L
+#define UVHYST_SCALE 47L
+
+/*
+** Local functions are defined first
+*/
+
+/*
+** Function: getChipType
+**
+** Description:
+** Decode ID register to identify chip type
+**
+** Input Parameters:
+** ID register value
+**
+** Return:
+** partNumberType
+*/
+static partNumberType getChipType(uInt8 data)
+{
+ /* For the parts that have a HV variant, we map to the lower voltage version,
+ the actual differences are handled in the constants file
+ */
+
+ const uInt8 partNums[8] =
+ {
+ UNSUPPORTED_PART_NUM, UNSUPPORTED_PART_NUM, UNSUPPORTED_PART_NUM, UNSUPPORTED_PART_NUM,
+ SI32184, SI32182, SI32185, SI32183
+ };
+
+ uInt8 partNum = (data & 0x38) >> 3; /* PART_NUM[2:0] = ID[5:3] */
+
+ return partNums[ partNum ];
+}
+
+int Si3218x_GetChipInfo(proslicChanType_ptr pProslic)
+{
+ uInt8 id;
+ id = ReadReg(pProHW, pProslic->channel, PROSLIC_REG_ID);
+
+ pProslic->deviceId->chipRev = id & 0x7;
+ pProslic->deviceId->chipType = getChipType(id);
+
+ if(pProslic->deviceId->chipType == UNSUPPORTED_PART_NUM)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%sregister 0 read = 0x%02X\n", LOGPRINT_PREFIX, id);
+#endif
+ return RC_SPI_FAIL;
+ }
+ else
+ {
+ return RC_NONE;
+ }
+}
+
+/*
+** Function: Si3218x_ConverterSetup
+**
+** Description:
+** Program revision specific settings before powering converter
+**
+** Specifically, from general parameters and knowledge that this
+** is Si32188x, setup dcff drive, gate drive polarity, and charge pump.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3218x_ConverterSetup(proslicChanType_ptr pProslic)
+{
+ ramData inv_off;
+
+ /* Option to add a per-channel inversion for maximum flexibility */
+ if(pProslic->dcdc_polarity_invert)
+ {
+ inv_off = 0x100000L;
+ }
+ else
+ {
+ inv_off = 0x0L;
+ }
+
+ switch(Si3218x_General_Configuration.bom_option)
+ {
+ case BO_DCDC_LCQC_5W:
+ case BO_DCDC_LCCB:
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_LIFT_EN,
+ 0x0L); /* dcff disabled */
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_SWDRV_POL,
+ inv_off); /* non-inverted */
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_CPUMP,
+ 0x100000L); /* Charge pump on */
+ Delay(pProTimer,20); /* Cpump settle */
+ break;
+
+ case BO_DCDC_BUCK_BOOST:
+ /*
+ ** RevC buck-boost designs are identical to RevB - no gate drive,
+ ** dcff enabled, non-inverting (charge pump off)
+ */
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_CPUMP,0x0L);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_SWDRV_POL,inv_off);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_LIFT_EN,
+ 0x100000L); /* dcff enabled */
+ break;
+
+ default:
+ return RC_DCDC_SETUP_ERR;
+ }
+
+ return RC_NONE;
+}
+
+/*
+** Function: Si3218x_PowerUpConverter
+**
+** Description:
+** Powers all DC/DC converters sequentially with delay to minimize
+** peak power draw on VDC.
+**
+** Returns:
+** int (error)
+**
+*/
+
+int Si3218x_PowerUpConverter(proslicChanType_ptr pProslic)
+{
+ errorCodeType error = RC_DCDC_SETUP_ERR;
+ int32 vbath,vbat;
+ uInt8 reg = 0;
+ int timer = 0;
+
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /*
+ ** - powerup digital dc/dc w/ OV clamping and shutdown
+ ** - delay
+ ** - verify no short circuits by looking for vbath/2
+ ** - clear dcdc status
+ ** - switch to analog converter with OV clamping only (no shutdown)
+ ** - select analog dcdc and disable pwrsave
+ ** - delay
+ */
+
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_LINEFEED,
+ LF_FWD_OHT); /* Force out of pwrsave mode if called in error */
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_LINEFEED,
+ LF_OPEN); /* Ensure open line before powering up converter */
+ reg = ReadReg(pProHW,pProslic->channel,SI3218X_REG_ENHANCE);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_ENHANCE,
+ reg&0x07); /* Disable powersave mode */
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PD_DCDC,
+ 0x700000L); /* In case OV or UV previously occurred */
+
+ /*
+ ** Setup converter drive polarity and charge pump enable
+ ** based on bom
+ */
+
+ error = Si3218x_ConverterSetup(pProslic);
+
+ if(error != RC_NONE)
+ {
+ DEBUG_PRINT (pProslic, "%sChannel %d : DCDC initialization failed\n",
+ LOGPRINT_PREFIX, pProslic->channel);
+ return error;
+ }
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PD_DCDC,0x600000L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PD_BIAS,0x200000L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PD_HVIC,0x200000L);
+ Delay(pProTimer,50);
+
+ vbath = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT);
+ vbat = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_MADC_VBAT);
+ if(vbat & 0x10000000L)
+ {
+ vbat |= 0xF0000000L;
+ }
+ if(vbat < (vbath / 2))
+ {
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PD_DCDC,
+ 0x300000L); /* shutdown converter */
+ DEBUG_PRINT (pProslic,
+ "%sChannel %d : DCDC Short Circuit Failure - disabling channel\n%sVBAT = %d.%d\n",
+ LOGPRINT_PREFIX, pProslic->channel, LOGPRINT_PREFIX,
+ (int)((vbat/SCALE_V_MADC)/1000),
+ (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ return error;
+ }
+ else /* Enable analog converter */
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_DCDC_STATUS,0L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PD_DCDC,0x400000L);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_ENHANCE,
+ reg); /* Restore ENHANCE */
+ Delay(pProTimer,50);
+ }
+
+ /*
+ ** - monitor vbat vs expected level (VBATH_EXPECT)
+ */
+ vbath = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT);
+ do
+ {
+ vbat = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_MADC_VBAT);
+ if(vbat & 0x10000000L)
+ {
+ vbat |= 0xF0000000L;
+ }
+ Delay(pProTimer,10);
+ }
+ while((vbat < (vbath - COMP_5V))
+ &&(timer++ < SI3218X_TIMEOUT_DCDC_UP)); /* 2 sec timeout */
+
+ DEBUG_PRINT (pProslic, "%sChannel %d : VBAT Up = %d.%d v\n",
+ LOGPRINT_PREFIX,
+ pProslic->channel,(int)((vbat/SCALE_V_MADC)/1000),
+ (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ if(timer > SI3218X_TIMEOUT_DCDC_UP)
+ {
+ /* Error handling - shutdown converter, disable channel, set error tag */
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PD_DCDC,
+ 0x900000L); /* shutdown converter */
+ DEBUG_PRINT (pProslic, "%sChannel %d : DCDC Power up timeout : Status=0x%08X\n",
+ LOGPRINT_PREFIX, pProslic->channel, ReadRAM(pProHW,pProslic->channel,
+ SI3218X_RAM_DCDC_STATUS));
+ }
+
+ return error;
+}
+int SiVoice_IdentifyChannels(SiVoiceChanType_ptr *pProslic, int size,
+ int *slicCount, int *daaCount)
+{
+ int i;
+ int rc = RC_NONE;
+ SiVoiceChanType_ptr currentChannel;
+
+ TRACEPRINT( *pProslic, "size = %d\n", size);
+
+ if(slicCount)
+ {
+ *slicCount = 0;
+ }
+ if(daaCount)
+ {
+ *daaCount = 0;
+ }
+
+ for(i = 0; i < size; i++)
+ {
+ currentChannel = pProslic[i];
+ /* SiVoice_SWInitChan() fills in the chipType initially with something the user provided, fill it
+ * in with the correct info.. The GetChipInfo may probe registers to compare them with their
+ * initial values, so this function MUST only be called after a chipset reset.
+ */
+#ifdef SI3217X
+ if (currentChannel->deviceId->chipType >= SI32171
+ && currentChannel->deviceId->chipType <= SI32179)
+ {
+ rc = Si3217x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3218X
+ if (currentChannel->deviceId->chipType >= SI32180
+ && currentChannel->deviceId->chipType <= SI32189)
+ {
+ rc = Si3218x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3226X
+ if (currentChannel->deviceId->chipType >= SI32260
+ && currentChannel->deviceId->chipType <= SI32269)
+ {
+ rc = Si3226x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3228X
+ if (currentChannel->deviceId->chipType >= SI32280
+ && currentChannel->deviceId->chipType <= SI32289)
+ {
+ rc = Si3228x_GetChipInfo(currentChannel);
+ }
+#endif
+ if(rc != RC_NONE)
+ {
+ return rc;
+ }
+
+ currentChannel->channelType = ProSLIC_identifyChannelType(currentChannel);
+ if(currentChannel->channelType == PROSLIC)
+ {
+ if(slicCount)
+ {
+ (*slicCount)++;
+ }
+ }
+ else if(currentChannel->channelType == DAA)
+ {
+ if(daaCount)
+ {
+ (*daaCount)++;
+ }
+ }
+#ifdef ENABLE_DEBUG
+ {
+ const char *dev_type = "UNKNOWN";
+ if(currentChannel->channelType == PROSLIC)
+ {
+ dev_type = "PROSLIC";
+ }
+ else if(currentChannel->channelType == DAA)
+ {
+ dev_type = "DAA";
+ }
+ LOGPRINT("%sChannel %d: Type = %s Rev = %d\n",
+ LOGPRINT_PREFIX, currentChannel->channel, dev_type,
+ currentChannel->deviceId->chipRev);
+
+ }
+#endif /* ENABLE_DEBUG */
+ }
+ return RC_NONE;
+}
+
+
+
+/*
+**
+** PROSLIC INITIALIZATION FUNCTIONS
+**
+*/
+
+/*
+** Function: Si3218x_Init_MultiBOM
+**
+** Description:
+** - probe SPI to establish daisy chain length
+** - load patch
+** - initialize general parameters
+** - calibrate madc
+** - bring up DC/DC converters
+** - calibrate everything except madc & lb
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+int Si3218x_Init_MultiBOM (proslicChanType_ptr *pProslic, int size, int preset)
+{
+ printk("Si3218x_Init_MultiBOM preset =%d\n",preset);
+ if(preset < si3218x_genconf_multi_max_preset)
+ {
+ /* Copy selected General Configuration parameters to Std structure */
+ Si3218x_General_Configuration = Si3218x_General_Configuration_MultiBOM[preset];
+ }
+ else
+ {
+ return RC_INVALID_PRESET;
+ }
+ return Si3218x_Init_with_Options(pProslic,size, INIT_NO_OPT);
+}
+#endif
+
+
+/*
+** Function: Si3218x_SelectPatch
+**
+** Select patch based on general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+** patch: Pointer to proslicPatch pointer
+**
+** Return:
+** error code
+*/
+int Si3218x_SelectPatch(proslicChanType_ptr pProslic,
+ const proslicPatch **patch)
+{
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+ if(Si3218x_General_Configuration.bom_option == BO_DCDC_LCQC_5W
+ || Si3218x_General_Configuration.bom_option == BO_DCDC_LCCB
+ || Si3218x_General_Configuration.bom_option == BO_DCDC_BUCK_BOOST)
+ {
+ *patch = &(SI3218X_PATCH_A);
+ }
+ else
+ {
+ DEBUG_PRINT(pProslic, "%sChannel %d : Invalid Patch\n", LOGPRINT_PREFIX,
+ pProslic->channel);
+ pProslic->channelEnable = 0;
+ pProslic->error = RC_INVALID_PATCH;
+ return RC_INVALID_PATCH;
+ }
+#else
+ SILABS_UNREFERENCED_PARAMETER(pProslic);
+ *patch = &(SI3218X_PATCH_A_DEFAULT);
+#endif
+
+ return RC_NONE;
+}
+
+/*
+** Function: Si3218x_GenParamUpdate
+**
+** Update general parameters
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+
+int Si3218x_GenParamUpdate(proslicChanType_ptr pProslic,initSeqType seq)
+{
+ ramData ram_data;
+ uInt8 data;
+
+ switch(seq)
+ {
+ case INIT_SEQ_PRE_CAL:
+ /*
+ ** Force pwrsave off and disable AUTO-tracking - set to user configured state after cal
+ */
+ WriteReg(pProHW, pProslic->channel,SI3218X_REG_ENHANCE,0);
+ WriteReg(pProHW, pProslic->channel,SI3218X_REG_AUTO,0x2F);
+
+ /*
+ ** General Parameter Updates
+ */
+
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_P_TH_HVIC,
+ Si3218x_General_Configuration.p_th_hvic);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_COEF_P_HVIC,
+ Si3218x_General_Configuration.coef_p_hvic);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_BAT_HYST,
+ Si3218x_General_Configuration.bat_hyst);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VBATH_EXPECT,
+ Si3218x_General_Configuration.vbath_expect);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VBATR_EXPECT,
+ Si3218x_General_Configuration.vbatr_expect);
+
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_PWRSAVE_TIMER,
+ Si3218x_General_Configuration.pwrsave_timer);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_OFFHOOK_THRESH,
+ Si3218x_General_Configuration.pwrsave_ofhk_thresh);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VBAT_TRACK_MIN,
+ Si3218x_General_Configuration.vbat_track_min);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VBAT_TRACK_MIN_RNG,
+ Si3218x_General_Configuration.vbat_track_min_rng);
+
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_THERM_DBI,
+ Si3218x_General_Configuration.therm_dbi);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VOV_DCDC_SLOPE,
+ Si3218x_General_Configuration.vov_dcdc_slope);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VOV_DCDC_OS,
+ Si3218x_General_Configuration.vov_dcdc_os);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VOV_RING_BAT_MAX,
+ Si3218x_General_Configuration.vov_ring_bat_max);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_VERR,
+ Si3218x_General_Configuration.dcdc_verr);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_VERR_HYST,
+ Si3218x_General_Configuration.dcdc_verr_hyst);
+
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_PD_UVLO,
+ Si3218x_General_Configuration.pd_uvlo);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_PD_OVLO,
+ Si3218x_General_Configuration.pd_ovlo);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_PD_OCLO,
+ Si3218x_General_Configuration.pd_oclo);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_PD_SWDRV,
+ Si3218x_General_Configuration.pd_swdrv);
+
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_UVPOL,
+ Si3218x_General_Configuration.dcdc_uvpol);
+
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_RNGTYPE,
+ Si3218x_General_Configuration.dcdc_rngtype);
+
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_ANA_TOFF,
+ Si3218x_General_Configuration.dcdc_ana_toff);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_ANA_TONMIN,
+ Si3218x_General_Configuration.dcdc_ana_tonmin);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_ANA_TONMAX,
+ Si3218x_General_Configuration.dcdc_ana_tonmax);
+
+
+ /*
+ ** Hardcoded RAM
+ */
+
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_OITHRESH_LO,
+ GCONF.i_oithresh_lo);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_OITHRESH_HI,
+ GCONF.i_oithresh_hi);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_OVTHRESH,GCONF.v_ovthresh);
+
+ ram_data = (GCONF.v_uvthresh > UVTHRESH_OFFS)?(GCONF.v_uvthresh -
+ UVTHRESH_OFFS)/UVTHRESH_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_UVTHRESH,ram_data);
+
+ ram_data = (GCONF.v_uvhyst > UVHYST_OFFS)?(GCONF.v_uvhyst -
+ UVHYST_OFFS)/UVHYST_SCALE:0L;
+ ram_data *= BIT20LSB;
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_UVHYST,ram_data);
+
+ /* Set default audio gain based on PM bom */
+ if(Si3218x_General_Configuration.pm_bom == BO_PM_BOM)
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_SCALE_KAUDIO,BOM_KAUDIO_PM);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_AC_ADC_GAIN,BOM_AC_ADC_GAIN_PM);
+ }
+ else
+ {
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_SCALE_KAUDIO,BOM_KAUDIO_NO_PM);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_AC_ADC_GAIN,
+ BOM_AC_ADC_GAIN_NO_PM);
+ }
+
+ /*
+ ** Hardcoded changes to default settings
+ */
+ data = ReadReg(pProHW, pProslic->channel,SI3218X_REG_GPIO_CFG1);
+ data &= 0xF9; /* Clear DIR for GPIO 1&2 */
+ data |= 0x60; /* Set ANA mode for GPIO 1&2 */
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_GPIO_CFG1,
+ data); /* coarse sensors analog mode */
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_PDN,
+ 0x80); /* madc powered in open state */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_A1_1,
+ 0x71EB851L); /* Fix HPF corner */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PD_REF_OSC,
+ 0x200000L); /* PLL freerun workaround */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ILOOPLPF,
+ 0x4EDDB9L); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ILONGLPF,
+ 0x806D6L); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VDIFFLPF,
+ 0x10038DL); /* 20pps pulse dialing enhancement */
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_DCDC_VREF_CTRL,0x0L);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VCM_TH,0x106240L);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VCMLPF,0x10059FL);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_CM_SPEEDUP_TIMER,0x0F0000);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_VCM_HYST,0x206280L);
+
+ /* Prevent Ref Osc from powering down in PLL Freerun mode (pd_ref_osc) */
+ ram_data = ReadRAM(pProHW, pProslic->channel,SI3218X_RAM_PWRSAVE_CTRL_LO);
+ WriteRAM(pProHW, pProslic->channel,SI3218X_RAM_PWRSAVE_CTRL_LO,
+ ram_data&0x07FFFFFFL); /* clear b27 */
+ break;
+
+
+ case INIT_SEQ_POST_CAL:
+ WriteReg(pProHW, pProslic->channel,SI3218X_REG_ENHANCE,
+ Si3218x_General_Configuration.enhance&0x1F);
+ WriteReg(pProHW, pProslic->channel,SI3218X_REG_AUTO,
+ Si3218x_General_Configuration.auto_reg);
+ if(Si3218x_General_Configuration.zcal_en)
+ {
+ WriteReg(pProHW,pProslic->channel, SI3218X_REG_ZCAL_EN, 0x04);
+ }
+ break;
+
+ default:
+ break;
+ }
+ return RC_NONE;
+}
+
+/*
+** Function: Si3218x_Init_with_Options
+**
+** Description:
+** - probe SPI to establish daisy chain length
+** - load patch
+** - initialize general parameters
+** - calibrate madc
+** - bring up DC/DC converters
+** - calibrate everything except madc & lb
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+
+int Si3218x_Init_with_Options (proslicChanType_ptr *pProslic, int size,
+ initOptionsType init_opt)
+{
+ /*
+ ** This function will initialize the chipRev and chipType members in pProslic
+ ** as well as load the initialization structures.
+ */
+
+ uInt8 data;
+ uInt8 calSetup[] = {0x00, 0x00, 0x01, 0x80}; /* CALR0-CALR3 */
+ int k, device_count;
+ const proslicPatch *patch;
+ uInt8 status;
+
+ LOGPRINT("%s(%d) size = %d init_opt = %d\n", __FUNCTION__, __LINE__, size,
+ init_opt);
+ /*
+ **
+ ** First qualify general parameters by identifying valid device key. This
+ ** will prevent inadvertent use of other device's preset files, which could
+ ** lead to improper initialization and high current states.
+ */
+
+ data = Si3218x_General_Configuration.device_key;
+
+ if((data < DEVICE_KEY_MIN)||(data > DEVICE_KEY_MAX))
+ {
+ pProslic[0]->error = RC_INVALID_GEN_PARAM;
+ return pProslic[0]->error;
+ }
+
+
+ if( (init_opt == INIT_REINIT) || (init_opt == INIT_SOFTRESET) )
+ {
+ ProSLIC_ReInit_helper(pProslic, size, init_opt, SI3218X_CHAN_PER_DEVICE);
+ }
+
+ if( init_opt != INIT_REINIT )
+ {
+ if( (SiVoice_IdentifyChannels(pProslic, size, &device_count, NULL) != RC_NONE)
+ ||(device_count == 0) )
+ {
+ DEBUG_PRINT(*pProslic, "%s: failed to detect any ProSLICs\n", LOGPRINT_PREFIX);
+ return RC_SPI_FAIL;
+ }
+
+ /*
+ ** Probe each channel and enable all channels that respond
+ */
+ for (k=0; k<size; k++)
+ {
+ if ((pProslic[k]->channelEnable)
+ &&(pProslic[k]->channelType == PROSLIC))
+ {
+ if ( (ProSLIC_VerifyMasterStat(pProslic[k]) != RC_NONE)
+ || (ProSLIC_VerifyControlInterface(pProslic[k]) != RC_NONE) )
+ {
+ pProslic[k]->channelEnable = 0;
+ pProslic[k]->error = RC_SPI_FAIL;
+ DEBUG_PRINT(*pProslic, "%s: SPI communications or PCLK/FS failure\n", LOGPRINT_PREFIX);
+ return pProslic[k]->error; /* Halt init if SPI fail */
+ }
+ }
+ }
+ } /* init_opt */
+
+
+ if( (init_opt != INIT_NO_PATCH_LOAD) && (init_opt != INIT_SOFTRESET) )
+ {
+ /*
+ ** Load patch (load on every channel since single channel device)
+ */
+ for (k=0; k<size; k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+
+ /* Select Patch*/
+ if (pProslic[k]->deviceId->chipRev == SI3218X_REVA )
+ {
+ status = (uInt8) Si3218x_SelectPatch(pProslic[k],&patch);
+ }
+ else
+ {
+ DEBUG_PRINT(pProslic[k], "%sChannel %d : Unsupported Device Revision (%d)\n",
+ LOGPRINT_PREFIX, pProslic[k]->channel,pProslic[k]->deviceId->chipRev );
+ pProslic[k]->channelEnable = 0;
+ pProslic[k]->error = RC_UNSUPPORTED_DEVICE_REV;
+ return RC_UNSUPPORTED_DEVICE_REV;
+ }
+
+ data = 1; /* Use this as a flag to see if we need to load the patch */
+ /* Check if the patch is different than we expect */
+ if(init_opt == INIT_SOFTRESET)
+ {
+ uInt32 patchData;
+ patchData = pProslic[k]->ReadRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,
+ SI3218X_RAM_PATCHID);
+
+ if( patchData == patch->patchSerial)
+ {
+ data = 0;
+ }
+ }
+
+ /* Load Patch */
+ if(status == RC_NONE)
+ {
+ if(data == 1)
+ {
+ Si3218x_LoadPatch(pProslic[k],patch);
+ }
+ }
+ else
+ {
+ return status;
+ }
+
+ /* Optional Patch Verification */
+#ifndef DISABLE_VERIFY_PATCH
+ if(data == 1)
+ {
+ data = (uInt8)Si3218x_VerifyPatch(pProslic[k],patch);
+ if (data)
+ {
+ DEBUG_PRINT(pProslic[k], "%sChannel %d : Patch verification failed (%d)\n",
+ LOGPRINT_PREFIX, k, data);
+ pProslic[k]->channelEnable=0;
+ pProslic[k]->error = RC_PATCH_ERR;
+ }
+ }
+#endif
+ } /* channel == PROSLIC */
+ } /* for all channles */
+ }/* init_opt - need to reload patch */
+
+ /*
+ ** Load general parameters - includes all BOM dependencies
+ */
+ for (k=0; k<size; k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ Si3218x_GenParamUpdate(pProslic[k],INIT_SEQ_PRE_CAL);
+ }
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX,pProslic[k]->channel,
+ SI3218X_RAM_IRING_LIM,SI3218X_IRING_LIM_MAX);
+ }
+
+
+ if((init_opt != INIT_NO_CAL)
+ && (init_opt != INIT_SOFTRESET)) /* Must recal on single channel devices */
+ {
+ /*
+ ** Calibrate (madc offset)
+ */
+ ProSLIC_Calibrate(pProslic,size,calSetup,TIMEOUT_MADC_CAL);
+ }/* init_opt */
+
+ /*
+ ** Bring up DC/DC converters sequentially to minimize
+ ** peak power demand on VDC
+ */
+ for (k=0; k<size; k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ pProslic[k]->error = Si3218x_PowerUpConverter(pProslic[k]);
+ }
+ }
+
+ if((init_opt != INIT_NO_CAL) && (init_opt != INIT_SOFTRESET))
+ {
+ /*
+ ** Calibrate remaining cals (except madc, lb)
+ */
+ calSetup[1] = SI3218X_CAL_STD_CALR1;
+ calSetup[2] = SI3218X_CAL_STD_CALR2;
+
+ ProSLIC_Calibrate(pProslic,size,calSetup,TIMEOUT_GEN_CAL);
+ }
+
+ /*
+ ** Apply post calibration general parameters
+ */
+ for (k=0; k<size; k++)
+ {
+
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ Si3218x_GenParamUpdate(pProslic[k],INIT_SEQ_POST_CAL);
+ }
+
+ /* Restore linefeed state after initialization for REINIT or SOFTRESET */
+ if((init_opt == INIT_REINIT) || (init_opt == INIT_SOFTRESET))
+ {
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX,pProslic[k]->channel,
+ SI3218X_REG_LINEFEED,pProslic[k]->scratch);
+ }
+ }
+
+ /*
+ ** If any channel incurred a non-fatal error, return
+ ** RC_NON_FATAL_INIT_ERR to trigger user to read each channel's
+ ** error status
+ */
+ for (k=0; k<size; k++)
+ {
+ if(pProslic[k]->error != RC_NONE)
+ {
+ return RC_NON_FATAL_INIT_ERR;
+ }
+ }
+
+ return RC_NONE;
+}
+
+/*
+** Function: Si3218x_EnableInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+**
+** Returns:
+** 0
+*/
+
+int Si3218x_EnableInterrupts (proslicChanType_ptr pProslic)
+{
+ uInt8 i;
+#ifdef GCI_MODE
+ uInt8 data;
+#endif
+ /* Clear pending interrupts first */
+ for(i = SI3218X_REG_IRQ1; i < SI3218X_REG_IRQ4; i++)
+ {
+#ifdef GCI_MODE
+ data = ReadReg(pProHW,pProslic->channel, i);
+ WriteReg(pProHW,pProslic->channel,i,data); /*clear interrupts (gci only)*/
+#else
+ (void)ReadReg(pProHW,pProslic->channel, i);
+ printk("enter Si3218x_EnableInterrupts no GCI_MODE i =0x%x\n",i);
+#endif
+
+ }
+
+ WriteReg (pProHW,pProslic->channel,SI3218X_REG_IRQEN1,
+ Si3218x_General_Configuration.irqen1);
+ WriteReg (pProHW,pProslic->channel,SI3218X_REG_IRQEN2,
+ Si3218x_General_Configuration.irqen2);
+ WriteReg (pProHW,pProslic->channel,SI3218X_REG_IRQEN3,
+ Si3218x_General_Configuration.irqen3);
+ WriteReg (pProHW,pProslic->channel,SI3218X_REG_IRQEN4,
+ Si3218x_General_Configuration.irqen4);
+
+ return RC_NONE;
+}
+
+/*
+**
+** PROSLIC CONFIGURATION FUNCTIONS
+**
+*/
+
+/*
+** Function: Si3218x_RingSetup
+**
+** Description:
+** configure ringing
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** preset: ring preset
+**
+** Returns:
+** 0
+*/
+
+#ifndef DISABLE_RING_SETUP
+int Si3218x_RingSetup (proslicChanType *pProslic, int preset)
+{
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RTPER,
+ Si3218x_Ring_Presets[preset].rtper);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RINGFR,
+ Si3218x_Ring_Presets[preset].freq);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RINGAMP,
+ Si3218x_Ring_Presets[preset].amp);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RINGPHAS,
+ Si3218x_Ring_Presets[preset].phas);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RINGOF,
+ Si3218x_Ring_Presets[preset].offset);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_RING,
+ Si3218x_Ring_Presets[preset].slope_ring);
+
+ if(Si3218x_Ring_Presets[preset].iring_lim > SI3218X_IRING_LIM_MAX)
+ {
+ Si3218x_Ring_Presets[preset].iring_lim = SI3218X_IRING_LIM_MAX;
+ }
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_IRING_LIM,
+ Si3218x_Ring_Presets[preset].iring_lim);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RTACTH,
+ Si3218x_Ring_Presets[preset].rtacth);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RTDCTH,
+ Si3218x_Ring_Presets[preset].rtdcth);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RTACDB,
+ Si3218x_Ring_Presets[preset].rtacdb);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RTDCDB,
+ Si3218x_Ring_Presets[preset].rtdcdb);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VOV_RING_BAT,
+ Si3218x_Ring_Presets[preset].vov_ring_bat);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VOV_RING_GND,
+ Si3218x_Ring_Presets[preset].vov_ring_gnd);
+
+#ifndef NOCLAMP_VBATR
+ /* Always limit VBATR_EXPECT to the general configuration maximum */
+ if(Si3218x_Ring_Presets[preset].vbatr_expect >
+ Si3218x_General_Configuration.vbatr_expect)
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATR_EXPECT,
+ Si3218x_General_Configuration.vbatr_expect);
+ DEBUG_PRINT(pProslic,
+ "%sRingSetup : VBATR_EXPECT : Clamped to Gen Conf Limit\n",LOGPRINT_PREFIX);
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATR_EXPECT,
+ Si3218x_Ring_Presets[preset].vbatr_expect);
+ }
+
+#else
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATR_EXPECT,
+ Si3218x_Ring_Presets[preset].vbatr_expect);
+#endif
+
+
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_RINGTALO,
+ Si3218x_Ring_Presets[preset].talo);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_RINGTAHI,
+ Si3218x_Ring_Presets[preset].tahi);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_RINGTILO,
+ Si3218x_Ring_Presets[preset].tilo);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_RINGTIHI,
+ Si3218x_Ring_Presets[preset].tihi);
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBAT_TRACK_MIN_RNG,
+ Si3218x_Ring_Presets[preset].dcdc_vref_min_rng);
+
+ /*
+ ** LPR Handler
+ **
+ ** If USERSTAT == 0x01, adjust RINGCON and clear USERSTAT
+ */
+ if (Si3218x_Ring_Presets[preset].userstat == 0x01)
+ {
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_RINGCON,
+ (0x80|Si3218x_Ring_Presets[preset].ringcon) & ~(0x40));
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT,0x00);
+ }
+ else
+ {
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_RINGCON,
+ Si3218x_Ring_Presets[preset].ringcon);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT,
+ Si3218x_Ring_Presets[preset].userstat);
+ }
+
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VCM_RING,
+ Si3218x_Ring_Presets[preset].vcm_ring);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VCM_RING_FIXED,
+ Si3218x_Ring_Presets[preset].vcm_ring_fixed);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_DELTA_VCM,
+ Si3218x_Ring_Presets[preset].delta_vcm);
+
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_DCDC_RNGTYPE,
+ Si3218x_Ring_Presets[preset].dcdc_rngtype);
+
+
+ /*
+ ** If multi bom supported **AND** a buck boost converter
+ ** is being used, force dcdc_rngtype to be fixed.
+ */
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+#define DCDC_RNGTYPE_BKBT 0L
+ /* Automatically adjust DCDC_RNGTYPE */
+ if(Si3218x_General_Configuration.bom_option == BO_DCDC_BUCK_BOOST)
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_DCDC_RNGTYPE,DCDC_RNGTYPE_BKBT);
+ }
+#endif
+
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_ZsynthSetup
+**
+** Description:
+** configure impedance synthesis
+*/
+
+#ifndef DISABLE_ZSYNTH_SETUP
+int Si3218x_ZsynthSetup (proslicChanType *pProslic, int preset)
+{
+ uInt8 lf;
+ uInt8 cal_en = 0;
+ uInt16 timer = 500;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ lf = ReadReg(pProHW,pProslic->channel,SI3218X_REG_LINEFEED);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_LINEFEED,0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C0,
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C1,
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C2,
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C3,
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c3);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C0,
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C1,
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C2,
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C3,
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c3);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECFIR_C2,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECFIR_C3,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_c3);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECFIR_C4,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_c4);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECFIR_C5,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_c5);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECFIR_C6,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_c6);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECFIR_C7,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_c7);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECFIR_C8,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_c8);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECFIR_C9,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_c9);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECIIR_B0,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_b0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECIIR_B1,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_b1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECIIR_A1,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_a1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ECIIR_A2,
+ Si3218x_Impedance_Presets[preset].hybrid.ecfir_a2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ZSYNTH_A1,
+ Si3218x_Impedance_Presets[preset].zsynth.zsynth_a1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ZSYNTH_A2,
+ Si3218x_Impedance_Presets[preset].zsynth.zsynth_a2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ZSYNTH_B1,
+ Si3218x_Impedance_Presets[preset].zsynth.zsynth_b1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ZSYNTH_B0,
+ Si3218x_Impedance_Presets[preset].zsynth.zsynth_b0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_ZSYNTH_B2,
+ Si3218x_Impedance_Presets[preset].zsynth.zsynth_b2);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_RA,
+ Si3218x_Impedance_Presets[preset].zsynth.ra);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACGAIN,
+ Si3218x_Impedance_Presets[preset].txgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACGAIN_SAVE,
+ Si3218x_Impedance_Presets[preset].rxgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACGAIN,
+ Si3218x_Impedance_Presets[preset].rxgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_B0_1,
+ Si3218x_Impedance_Presets[preset].rxachpf_b0_1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_B1_1,
+ Si3218x_Impedance_Presets[preset].rxachpf_b1_1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_A1_1,
+ Si3218x_Impedance_Presets[preset].rxachpf_a1_1);
+
+ /*
+ ** Scale based on desired gain plan
+ */
+ Si3218x_dbgSetTXGain(pProslic,Si3218x_Impedance_Presets[preset].txgain_db,
+ preset,TXACGAIN_SEL);
+ Si3218x_dbgSetRXGain(pProslic,Si3218x_Impedance_Presets[preset].rxgain_db,
+ preset,RXACGAIN_SEL);
+ Si3218x_TXAudioGainSetup(pProslic,TXACGAIN_SEL);
+ Si3218x_RXAudioGainSetup(pProslic,RXACGAIN_SEL);
+
+ /*
+ ** Perform Zcal in case OHT used (eg. no offhook event to trigger auto Zcal)
+ */
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_CALR0,0x00);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_CALR1,0x40);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_CALR2,0x00);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_CALR3,0x80); /* start cal */
+
+ /* Wait for zcal to finish */
+ do
+ {
+ cal_en = ReadReg(pProHW,pProslic->channel,SI3218X_REG_CALR3);
+ Delay(pProTimer,1);
+ timer--;
+ }
+ while((cal_en&0x80)&&(timer>0));
+
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_LINEFEED,lf);
+
+ if(timer > 0)
+ {
+ return RC_NONE;
+ }
+ else
+ {
+ return RC_CAL_TIMEOUT;
+ }
+}
+#endif
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+*/
+int Si3218x_TXAudioGainSetup (proslicChanType *pProslic, int preset)
+{
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACGAIN,
+ Si3218x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C0,
+ Si3218x_audioGain_Presets[preset].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C1,
+ Si3218x_audioGain_Presets[preset].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C2,
+ Si3218x_audioGain_Presets[preset].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C3,
+ Si3218x_audioGain_Presets[preset].aceq_c3);
+
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+*/
+
+int Si3218x_RXAudioGainSetup (proslicChanType *pProslic, int preset)
+{
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACGAIN_SAVE,
+ Si3218x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACGAIN,
+ Si3218x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C0,
+ Si3218x_audioGain_Presets[preset].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C1,
+ Si3218x_audioGain_Presets[preset].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C2,
+ Si3218x_audioGain_Presets[preset].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C3,
+ Si3218x_audioGain_Presets[preset].aceq_c3);
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: PROSLIC_AudioGainScale
+**
+** Description:
+** Multiply path gain by passed value for PGA and EQ scale (no reference to dB,
+** multiply by a scale factor)
+*/
+int Si3218x_AudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale,int rx_tx_sel)
+{
+
+ if(rx_tx_sel == TXACGAIN_SEL)
+ {
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].acgain =
+ (Si3218x_Impedance_Presets[preset].txgain/1000)*pga_scale;
+ if (Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c0 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c1 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c2 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c3 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+ }
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].aceq_c0 = ((int32)
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c0/1000)*eq_scale;
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].aceq_c1 = ((int32)
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c1/1000)*eq_scale;
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].aceq_c2 = ((int32)
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c2/1000)*eq_scale;
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].aceq_c3 = ((int32)
+ Si3218x_Impedance_Presets[preset].audioEQ.txaceq_c3/1000)*eq_scale;
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACGAIN,
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C0,
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C1,
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C2,
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACEQ_C3,
+ Si3218x_audioGain_Presets[TXACGAIN_SEL].aceq_c3);
+ }
+ else
+ {
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].acgain =
+ (Si3218x_Impedance_Presets[preset].rxgain/1000)*pga_scale;
+ if (Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+ }
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].aceq_c0 = ((int32)
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c0/1000)*eq_scale;
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].aceq_c1 = ((int32)
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c1/1000)*eq_scale;
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].aceq_c2 = ((int32)
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c2/1000)*eq_scale;
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].aceq_c3 = ((int32)
+ Si3218x_Impedance_Presets[preset].audioEQ.rxaceq_c3/1000)*eq_scale;
+
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACGAIN_SAVE,
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACGAIN,
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C0,
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C1,
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C2,
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACEQ_C3,
+ Si3218x_audioGain_Presets[RXACGAIN_SEL].aceq_c3);
+ }
+ return 0;
+}
+int Si3218x_TXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale)
+{
+ return Si3218x_AudioGainScale(pProslic,preset,pga_scale,eq_scale,TXACGAIN_SEL);
+}
+int Si3218x_RXAudioGainScale (proslicChanType *pProslic, int preset,
+ uInt32 pga_scale, uInt32 eq_scale)
+{
+ return Si3218x_AudioGainScale(pProslic,preset,pga_scale,eq_scale,RXACGAIN_SEL);
+}
+
+
+/*
+** Function: PROSLIC_DCFeedSetup
+**
+** Description:
+** configure dc feed
+*/
+
+#ifndef DISABLE_DCFEED_SETUP
+int Si3218x_DCFeedSetupCfg (proslicChanType *pProslic, Si3218x_DCfeed_Cfg *cfg,
+ int preset)
+{
+ uInt8 lf;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ lf = ReadReg(pProHW,pProslic->channel,SI3218X_REG_LINEFEED);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_LINEFEED,0);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_VLIM,
+ cfg[preset].slope_vlim);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_RFEED,
+ cfg[preset].slope_rfeed);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_ILIM,
+ cfg[preset].slope_ilim);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_DELTA1,cfg[preset].delta1);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_DELTA2,cfg[preset].delta2);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_V_VLIM,cfg[preset].v_vlim);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_V_RFEED,cfg[preset].v_rfeed);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_V_ILIM,cfg[preset].v_ilim);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_CONST_RFEED,
+ cfg[preset].const_rfeed);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_CONST_ILIM,
+ cfg[preset].const_ilim);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_I_VLIM,cfg[preset].i_vlim);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LCRONHK,cfg[preset].lcronhk);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LCROFFHK,cfg[preset].lcroffhk);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LCRDBI,cfg[preset].lcrdbi);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LONGHITH,cfg[preset].longhith);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LONGLOTH,cfg[preset].longloth);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LONGDBI,cfg[preset].longdbi);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LCRMASK,cfg[preset].lcrmask);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LCRMASK_POLREV,
+ cfg[preset].lcrmask_polrev);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LCRMASK_STATE,
+ cfg[preset].lcrmask_state);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_LCRMASK_LINECAP,
+ cfg[preset].lcrmask_linecap);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VCM_OH,cfg[preset].vcm_oh);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VOV_BAT,cfg[preset].vov_bat);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VOV_GND,cfg[preset].vov_gnd);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_LINEFEED,lf);
+
+ return RC_NONE;
+}
+
+#endif
+
+/*
+** Function: PROSLIC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+
+#ifndef DISABLE_PULSE_SETUP
+int Si3218x_PulseMeterSetup (proslicChanType *pProslic, int preset)
+{
+ uInt8 reg;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PM_AMP_THRESH,
+ Si3218x_PulseMeter_Presets[preset].pm_amp_thresh);
+ reg = (Si3218x_PulseMeter_Presets[preset].pmFreq<<1)|
+ (Si3218x_PulseMeter_Presets[preset].pmAuto<<3);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PM_ACTIVE,
+ Si3218x_PulseMeter_Presets[preset].pmActive);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_PM_INACTIVE,
+ Si3218x_PulseMeter_Presets[preset].pmInactive);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_PMCON,reg);
+ return RC_NONE;
+ }
+
+}
+#endif
+
+/*
+** Function: PROSLIC_PCMSetup
+**
+** Description:
+** configure pcm
+*/
+
+#ifndef DISABLE_PCM_SETUP
+int Si3218x_PCMSetup(proslicChanType *pProslic, int preset)
+{
+ uInt8 regTemp;
+ uInt8 pmEn;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ pmEn = ReadReg(pProHW,pProslic->channel,
+ SI3218X_REG_PMCON) & 0x01; /* PM/wideband lockout */
+ if (Si3218x_PCM_Presets[preset].widebandEn && pmEn)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT ("%s Wideband Mode is not supported while Pulse Metering is enabled.\n",
+ LOGPRINT_PREFIX);
+#endif
+ }
+ else if (Si3218x_PCM_Presets[preset].widebandEn && !pmEn)
+ {
+ /* TXIIR settings */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B0_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B1_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A2_3,0x19D5F700L);
+ /* RXIIR settings */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B0_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B1_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A2_3,0x19D5F700L);
+ /*
+ ** RXHPF
+ ** Note: Calling ProSLIC_ZsynthSetup() will overwrite some
+ ** of these values. ProSLIC_PCMSetup() should always
+ ** be called after loading coefficients when using
+ ** wideband mode
+ */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_B0_1,0x7CFF900L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_B1_1,0x18300700L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_A1_1,0x79FF201L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_B0_2,0x7CEDA1DL);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_B1_2,0x106320D4L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_B2_2,0x7CEDA1DL);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_A1_2,0xF9A910FL);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_A2_2,0x185FFDA8L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACHPF_GAIN,0x08000000L);
+ /* TXHPF */
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_B0_1,0x0C7FF4CEL);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_B1_1,0x13800B32L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_A1_1,0x079FF201L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_B0_2,0x030FDD10L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_B1_2,0x19E0996CL);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_B2_2,0x030FDD10L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_A1_2,0x0F9A910FL);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_A2_2,0x185FFDA8L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACHPF_GAIN,0x0CD30000L);
+
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3218X_REG_DIGCON);
+#ifndef DISABLE_HPF_WIDEBAND
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIGCON,
+ regTemp&~(0xC)); /* Enable HPF */
+#else
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIGCON,
+ regTemp|(0xC)); /* Disable HPF */
+#endif
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3218X_REG_ENHANCE);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_ENHANCE,regTemp|1);
+ }
+ else
+ {
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3218X_REG_DIGCON);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIGCON,regTemp&~(0xC));
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B0_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B1_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_TXACIIR_A2_3,0x19D5F700L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B0_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B1_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_RXACIIR_A2_3,0x19D5F700L);
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3218X_REG_ENHANCE);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_ENHANCE,regTemp&~(1));
+ }
+ regTemp = Si3218x_PCM_Presets[preset].pcmFormat;
+ regTemp |= Si3218x_PCM_Presets[preset].pcm_tri << 5;
+ regTemp |= Si3218x_PCM_Presets[preset].alaw_inv << 2;
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_PCMMODE,regTemp);
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3218X_REG_PCMTXHI);
+ regTemp &= 3;
+ regTemp |= Si3218x_PCM_Presets[preset].tx_edge<<4;
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_PCMTXHI,regTemp);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+**
+** PROSLIC CONTROL FUNCTIONS
+**
+*/
+
+/*
+** Function: PROSLIC_SetLinefeedStatus
+**
+** Description:
+** Sets linefeed state
+*/
+
+int Si3218x_SetLinefeedStatus (proslicChanType *pProslic,uInt8 newLinefeed)
+{
+ uInt8 regTemp;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteReg (pProHW, pProslic->channel, SI3218X_REG_LINEFEED,newLinefeed);
+ if ((newLinefeed&0xf) == LF_RINGING)
+ {
+ /*disable vbat interrupt during ringing*/
+ regTemp = ReadReg(pProHW,pProslic->channel,SI3218X_REG_IRQEN1);
+ WriteReg (pProHW,pProslic->channel,SI3218X_REG_IRQEN1,regTemp&(~0x80));
+ }
+ else
+ {
+ WriteReg (pProHW,pProslic->channel,SI3218X_REG_IRQEN1,
+ Si3218x_General_Configuration.irqen1);
+ }
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_MWISetup
+**
+** Description:
+** Modify default vpk or lcrmask_mwi. Passing 0 will result in the parameter
+** not being modified.
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3218x_MWISetup (proslicChanType *pProslic,uInt16 vpk_mag,
+ uInt16 lcrmask_mwi)
+{
+ uInt32 ram_val;
+
+ /* Verify MWI not enabled - cannot make changes while enabled */
+ if(ReadReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ return RC_MWI_IN_USE;
+ }
+
+ /* Voltage mod */
+ if(vpk_mag > 0) /* Skip if 0 passed */
+ {
+ /* Clamp supplied value to allowable range */
+ if(vpk_mag > SIL_MWI_VPK_MAX)
+ {
+ vpk_mag = SIL_MWI_VPK_MAX;
+ }
+ if(vpk_mag < SIL_MWI_VPK_MIN)
+ {
+ vpk_mag = SIL_MWI_VPK_MIN;
+ }
+ ram_val = vpk_mag * SCALE_V_MADC * 1000L;
+ WriteRAM(pProHW,pProslic->channel,SI3218X_PRAM_VBATH_NEON,ram_val);
+ }
+
+ /* LCRMASK mod */
+ if(lcrmask_mwi > 0) /* Skip if 0 passed */
+ {
+ /* Clamp supplied value to allowable range */
+ if(lcrmask_mwi > SIL_MWI_LCRMASK_MAX)
+ {
+ lcrmask_mwi = SIL_MWI_LCRMASK_MAX;
+ }
+ if(lcrmask_mwi < SIL_MWI_LCRMASK_MIN)
+ {
+ lcrmask_mwi = SIL_MWI_LCRMASK_MIN;
+ }
+ ram_val = lcrmask_mwi * SIL_MWI_LCRMASK_SCALE;
+ WriteRAM(pProHW,pProslic->channel,SI3218X_PRAM_LCRMASK_MWI,ram_val);
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWIEnable
+**
+** Description:
+** Enables MWI feature
+**
+** Note: This feature is implemented in patch
+*/
+
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3218x_MWIEnable (proslicChanType *pProslic)
+{
+ uInt8 val;
+
+ /*
+ ** Check for conditions that would prevent enabling MWI
+ */
+ ProSLIC_ReadHookStatus(pProslic,&val);
+ if(val != PROSLIC_ONHOOK)
+ {
+ return RC_MWI_ENABLE_FAIL;
+ }
+ else
+ {
+ /* Clear DIAG1 and set USERSTAT enable bit */
+ ProSLIC_SetPowersaveMode(pProslic,PWRSAVE_DISABLE);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIAG1,SIL_MWI_TOGGLE_LOW);
+ val = ReadReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT,val|SIL_MWI_USTAT_SET);
+ }
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWIDisable
+**
+** Description:
+** Disables MWI feature
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3218x_MWIDisable (proslicChanType *pProslic)
+{
+ uInt8 val;
+
+ /* Clear DIAG1 and USERSTAT enable bit */
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIAG1,SIL_MWI_TOGGLE_LOW);
+ val = ReadReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT,val&SIL_MWI_USTAT_CLEAR);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_SetMWIState
+**
+** Description:
+** Set MWI State. Must be enabled via ProSLIC_MWIEnable prior
+** to calling this function
+**
+** Note: This feature is implemented in patch
+*/
+
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3218x_SetMWIState(proslicChanType *pProslic,uInt8 flash_on)
+{
+
+ /* Only continue if MWI is enabled */
+ if(ReadReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ if(flash_on)
+ {
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIAG1,SIL_MWI_TOGGLE_HIGH);
+ }
+ else
+ {
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIAG1,SIL_MWI_TOGGLE_LOW);
+ }
+ }
+ else
+ {
+ return RC_MWI_NOT_ENABLED;
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_SetMWIState_ramp
+**
+** Description:
+** Set MWI State with option for number of ramp steps. Must be enabled via ProSLIC_MWIEnable prior
+** to calling this function
+**
+** Note: This feature is implemented in patch
+*/
+
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3218x_SetMWIState_ramp(proslicChanType *pProslic,uInt8 flash_on,
+ uInt8 step_delay,uInt8 step_num)
+{
+ uInt32 vbath;
+ uInt32 vbath_low;
+ uInt32 vpk_mag;
+ int i=0;
+
+ /* Only continue if MWI is enabled */
+ if(ReadReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ vpk_mag = ReadRAM(pProHW,pProslic->channel,SI3218X_PRAM_VBATH_NEON);
+ vbath_low = ReadRAM(pProHW,pProslic->channel,SI3218X_PRAM_VBATH_EXPECT_SAVE);
+
+ if(flash_on)
+ {
+ vbath = ReadRAM(pProHW,pProslic->channel,SI3218X_PRAM_VBATH_EXPECT_SAVE);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT,vbath);
+
+ for(i=0; i<step_num; i++)
+ {
+ Delay(pProTimer,step_delay);
+ vbath += (vpk_mag - vbath_low)/step_num;
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT,vbath);
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIAG1,SIL_MWI_TOGGLE_HIGH);
+
+ }
+ }
+ else
+ {
+ vbath = vpk_mag;
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT,vbath);
+
+ for(i=0; i<step_num; i++)
+ {
+ Delay(pProTimer,step_delay);
+ vbath -= (vpk_mag - vbath_low)/step_num;
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT,vbath);
+ }
+ WriteReg(pProHW,pProslic->channel,SI3218X_REG_DIAG1,SIL_MWI_TOGGLE_LOW);
+ }
+ }
+ else
+ {
+ return RC_MWI_NOT_ENABLED;
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_GetMWIState
+**
+** Description:
+** Read MWI State. Must be enabled via ProSLIC_MWIEnable prior
+** to calling this function
+**
+** Note: This feature is implemented in patch
+*/
+
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3218x_GetMWIState(proslicChanType *pProslic)
+{
+
+ /* Only continue if MWI is enabled */
+ if(ReadReg(pProHW,pProslic->channel,SI3218X_REG_USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ if(ReadReg(pProHW,pProslic->channel,SI3218X_REG_DIAG1) & SIL_MWI_TOGGLE_HIGH)
+ {
+ return SIL_MWI_FLASH_ON;
+ }
+ else
+ {
+ return SIL_MWI_FLASH_OFF;
+ }
+ }
+ else
+ {
+ return RC_MWI_NOT_ENABLED;
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWI
+**
+** Description:
+** implements message waiting indicator
+**
+** Message waiting (neon flashing) requires modifications to vbath_expect
+** and slope_vlim. The old values are restored to turn off the lamp. We
+** assume all channels set up the same. During off-hook event lamp must
+** be disabled manually.
+**
+** Deprecated. Use Si3218x_SetMWIState()
+*/
+
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3218x_MWI (proslicChanType *pProslic,uInt8 lampOn)
+{
+ static int32 vbath_save = 0;
+ static int32 slope_vlim_save = 0;
+ uInt8 hkStat;
+ int32 slope_vlim_tmp;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ slope_vlim_tmp = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_VLIM);
+ Si3218x_ReadHookStatus(pProslic,&hkStat);
+
+ if (lampOn && (hkStat == PROSLIC_OFFHOOK) ) /*cant neon flash during offhook*/
+ {
+ DEBUG_PRINT (pProslic, "%sSi3218x MWI cannot operate offhook\n",
+ LOGPRINT_PREFIX);
+ return RC_LINE_IN_USE;
+ }
+
+ if (lampOn)
+ {
+ if (slope_vlim_tmp != 0x8000000L) /*check we're not already on*/
+ {
+ vbath_save = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT);
+ slope_vlim_save = slope_vlim_tmp;
+ }
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT,0x7AE147AL);/*120V*/
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_VLIM,0x8000000L);
+ }
+ else
+ {
+ if (vbath_save != 0) /*check we saved some valid value first*/
+ {
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_VBATH_EXPECT,vbath_save);
+ WriteRAM(pProHW,pProslic->channel,SI3218X_RAM_SLOPE_VLIM,slope_vlim_save);
+ }
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_dbgSetDCFeed
+**
+** Description:
+** provisionally function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+
+int Si3218x_dbgSetDCFeed (proslicChanType *pProslic, uInt32 v_vlim_val,
+ uInt32 i_ilim_val, int32 preset)
+{
+ /* Note: * needs more descriptive return codes in the event of an out of range argument */
+ uInt16 vslope = 160;
+ uInt16 rslope = 720;
+ uInt32 vscale1 = 1386;
+ uInt32 vscale2 =
+ 1422; /* 1386x1422 = 1970892 broken down to minimize trunc err */
+ uInt32 iscale1 = 913;
+ uInt32 iscale2 = 334; /* 913x334 = 304942 */
+ uInt32 i_rfeed_val, v_rfeed_val, const_rfeed_val, i_vlim_val, const_ilim_val,
+ v_ilim_val;
+ int32 signedVal;
+ /* Set Linefeed to open state before modifying DC Feed */
+
+ /* Assumptions must be made to minimize computations. This limits the
+ ** range of available settings, but should be more than adequate for
+ ** short loop applications.
+ **
+ ** Assumtions:
+ **
+ ** SLOPE_VLIM => 160ohms
+ ** SLOPE_RFEED => 720ohms
+ ** I_RFEED => 3*I_ILIM/4
+ **
+ ** With these assumptions, the DC Feed parameters now become
+ **
+ ** Inputs: V_VLIM, I_ILIM
+ ** Constants: SLOPE_VLIM, SLOPE_ILIM, SLOPE_RFEED, SLOPE_DELTA1, SLOPE_DELTA2
+ ** Outputs: V_RFEED, V_ILIM, I_VLIM, CONST_RFEED, CONST_ILIM
+ **
+ */
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /* Validate arguments */
+ if((i_ilim_val < 15)||(i_ilim_val > 45))
+ {
+ return 1; /* need error code */
+ }
+ if((v_vlim_val < 30)||(v_vlim_val > 52))
+ {
+ return 1; /* need error code */
+ }
+
+ /* Calculate voltages in mV and currents in uA */
+ v_vlim_val *= 1000;
+ i_ilim_val *= 1000;
+
+ /* I_RFEED */
+ i_rfeed_val = (3*i_ilim_val)/4;
+
+ /* V_RFEED */
+ v_rfeed_val = v_vlim_val - (i_rfeed_val*vslope)/1000;
+
+ /* V_ILIM */
+ v_ilim_val = v_rfeed_val - (rslope*(i_ilim_val - i_rfeed_val))/1000;
+
+ /* I_VLIM */
+ i_vlim_val = (v_vlim_val*1000)/4903;
+
+ /* CONST_RFEED */
+ signedVal = v_rfeed_val * (i_ilim_val - i_rfeed_val);
+ signedVal /= (v_rfeed_val - v_ilim_val);
+ signedVal = i_rfeed_val + signedVal;
+
+ /* signedVal in uA here */
+ signedVal *= iscale1;
+ signedVal /= 100;
+ signedVal *= iscale2;
+ signedVal /= 10;
+
+ if(signedVal < 0)
+ {
+ const_rfeed_val = (signedVal)+ (1L<<29);
+ }
+ else
+ {
+ const_rfeed_val = signedVal & 0x1FFFFFFF;
+ }
+
+ /* CONST_ILIM */
+ const_ilim_val = i_ilim_val;
+
+ /* compute RAM values */
+ v_vlim_val *= vscale1;
+ v_vlim_val /= 100;
+ v_vlim_val *= vscale2;
+ v_vlim_val /= 10;
+
+ v_rfeed_val *= vscale1;
+ v_rfeed_val /= 100;
+ v_rfeed_val *= vscale2;
+ v_rfeed_val /= 10;
+
+ v_ilim_val *= vscale1;
+ v_ilim_val /= 100;
+ v_ilim_val *= vscale2;
+ v_ilim_val /= 10;
+
+ const_ilim_val *= iscale1;
+ const_ilim_val /= 100;
+ const_ilim_val *= iscale2;
+ const_ilim_val /= 10;
+
+ i_vlim_val *= iscale1;
+ i_vlim_val /= 100;
+ i_vlim_val *= iscale2;
+ i_vlim_val /= 10;
+
+ Si3218x_DCfeed_Presets[preset].slope_vlim = 0x18842BD7L;
+ Si3218x_DCfeed_Presets[preset].slope_rfeed = 0x1E8886DEL;
+ Si3218x_DCfeed_Presets[preset].slope_ilim = 0x40A0E0L;
+ Si3218x_DCfeed_Presets[preset].delta1 = 0x1EABA1BFL;
+ Si3218x_DCfeed_Presets[preset].delta2 = 0x1EF744EAL;
+ Si3218x_DCfeed_Presets[preset].v_vlim = v_vlim_val;
+ Si3218x_DCfeed_Presets[preset].v_rfeed = v_rfeed_val;
+ Si3218x_DCfeed_Presets[preset].v_ilim = v_ilim_val;
+ Si3218x_DCfeed_Presets[preset].const_rfeed = const_rfeed_val;
+ Si3218x_DCfeed_Presets[preset].const_ilim = const_ilim_val;
+ Si3218x_DCfeed_Presets[preset].i_vlim = i_vlim_val;
+
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_dbgSetDCFeedVopen
+**
+** Description:
+** provisionally function for setting up
+** dcfeed given desired open circuit voltage.
+** Entry I_ILIM value will be used.
+*/
+int Si3218x_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val,
+ int32 preset)
+{
+ uInt32 i_ilim_val;
+ uInt32 iscale1 = 913;
+ uInt32 iscale2 = 334; /* 913x334 = 304942 */
+
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /* Read present CONST_ILIM value */
+ i_ilim_val = Si3218x_DCfeed_Presets[preset].const_ilim;
+
+
+ i_ilim_val /= iscale2;
+ i_ilim_val /= iscale1;
+
+ return Si3218x_dbgSetDCFeed(pProslic,v_vlim_val,i_ilim_val,preset);
+}
+
+/*
+** Function: PROSLIC_dbgSetDCFeedIloop
+**
+** Description:
+** provisionally function for setting up
+** dcfeed given desired loop current.
+** Entry V_VLIM value will be used.
+*/
+int Si3218x_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val,
+ int32 preset)
+{
+ uInt32 v_vlim_val;
+ uInt32 vscale1 = 1386;
+ uInt32 vscale2 =
+ 1422; /* 1386x1422 = 1970892 broken down to minimize trunc err */
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /* Read present V_VLIM value */
+ v_vlim_val = Si3218x_DCfeed_Presets[preset].v_vlim;
+
+ v_vlim_val /= vscale2;
+ v_vlim_val /= vscale1;
+
+ return Si3218x_dbgSetDCFeed(pProslic,v_vlim_val,i_ilim_val, preset);
+}
+
+typedef struct
+{
+ uInt8 freq;
+ ramData ringfr; /* trise scale for trap */
+ uInt32 ampScale;
+} ProSLIC_SineRingFreqLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ ramData rtacth;
+ ramData rtper;
+ ramData rtdb;
+} ProSLIC_SineRingtripLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ uInt16 cfVal[6];
+} ProSLIC_TrapRingFreqLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ ramData rtper;
+ ramData rtdb;
+ uInt32 rtacth[6];
+} ProSLIC_TrapRingtripLookup;
+
+static const ProSLIC_SineRingFreqLookup sineRingFreqTable[] =
+ /* Freq RINGFR, vScale */
+ {
+ {15, 0x7F6E930L, 18968L},
+ {16, 0x7F5A8E0L, 20234L},
+ {20, 0x7EFD9D5L, 25301L},
+ {22, 0x7EC770AL, 27843L},
+ {23, 0x7EAA6E2L, 29113L},
+ {25, 0x7E6C925L, 31649L},
+ {30, 0x7DBB96BL, 38014L},
+ {34, 0x7D34155L, 42270L}, /* Actually 33.33Hz */
+ {35, 0x7CEAD72L, 44397L},
+ {40, 0x7BFA887L, 50802L},
+ {45, 0x7AEAE74L, 57233L},
+ {50, 0x79BC384L, 63693L},
+ {0,0,0}
+ }; /* terminator */
+
+static const ProSLIC_SineRingtripLookup sineRingtripTable[] =
+ /* Freq rtacth */
+ {
+ {15, 11440000L, 0x6A000L, 0x4000L },
+ {16, 10810000L, 0x64000L, 0x4000L },
+ {20, 8690000L, 0x50000L, 0x8000L },
+ {22, 7835000L, 0x48000L, 0x8000L },
+ {23, 7622000L, 0x46000L, 0x8000L },
+ {25, 6980000L, 0x40000L, 0xA000L },
+ {30, 5900000L, 0x36000L, 0xA000L },
+ {34, 10490000L, 0x60000L, 0x6000L }, /* Actually 33.33 */
+ {35, 10060000L, 0x5C000L, 0x6000L },
+ {40, 8750000L, 0x50000L, 0x8000L },
+ {45, 7880000L, 0x48000L, 0x8000L },
+ {50, 7010000L, 0x40000L, 0xA000L },
+ {0,0L, 0L, 0L}
+ }; /* terminator */
+
+static const ProSLIC_TrapRingFreqLookup trapRingFreqTable[] =
+ /* Freq multCF11 multCF12 multCF13 multCF14 multCF15 multCF16*/
+ {
+ {15, {69,122, 163, 196, 222,244}},
+ {16, {65,115, 153, 184, 208,229}},
+ {20, {52,92, 122, 147, 167,183}},
+ {22, {47,83, 111, 134, 152,166}},
+ {23, {45,80, 107, 128, 145,159}},
+ {25, {42,73, 98, 118, 133,146}},
+ {30, {35,61, 82, 98, 111,122}},
+ {34, {31,55, 73, 88, 100,110}},
+ {35, {30,52, 70, 84, 95,104}},
+ {40, {26,46, 61, 73, 83,91}},
+ {45, {23,41, 54, 65, 74,81}},
+ {50, {21,37, 49, 59, 67,73}},
+ {0,{0L,0L,0L,0L}} /* terminator */
+ };
+
+
+static const ProSLIC_TrapRingtripLookup trapRingtripTable[] =
+ /* Freq rtper rtdb rtacthCR11 rtacthCR12 rtacthCR13 rtacthCR14 rtacthCR15 rtacthCR16*/
+ {
+ {15, 0x6A000L, 0x4000L, {16214894L, 14369375L, 12933127L, 11793508L, 10874121L, 10121671L}},
+ {16, 0x64000L, 0x4000L, {15201463L, 13471289L, 12124806L, 11056414L, 10194489L, 9489067L}},
+ {20, 0x50000L, 0x6000L, {12161171L, 10777031L, 9699845L, 8845131L, 8155591L, 7591253L}},
+ {22, 0x48000L, 0x6000L, {11055610L, 9797301L, 8818041L, 8041028L, 7414174L, 6901139L}},
+ {23, 0x46000L, 0x6000L, {10574931L, 9371331L, 8434648L, 7691418L, 7091818L, 6601090L}},
+ {25, 0x40000L, 0x8000L, {9728937L, 8621625L, 7759876L, 7076105L, 6524473L, 6073003L}},
+ {30, 0x36000L, 0x8000L, {8107447L, 7184687L, 6466563L, 5896754L, 5437061L, 5060836L}},
+ {34, 0x60000L, 0x6000L, {7297432L, 6466865L, 5820489L, 5307609L, 4893844L, 4555208L}},
+ {35, 0x5C000L, 0x6000L, {6949240L, 6158303L, 5542769L, 5054361L, 4660338L, 4337859L}},
+ {40, 0x50000L, 0x6000L, {6080585L, 5388516L, 4849923L, 4422565L, 4077796L, 3795627L}},
+ {45, 0x48000L, 0x6000L, {5404965L, 4789792L, 4311042L, 3931169L, 3624707L, 3373890L}},
+ {50, 0x40000L, 0x8000L, {4864468L, 4310812L, 3879938L, 3538052L, 3262236L, 3036501L}},
+ {0,0x0L, 0x0L, {0L,0L,0L,0L}} /* terminator */
+ };
+
+/*
+** Function: PROSLIC_dbgRingingSetup
+**
+** Description:
+** Provision function for setting up
+** Ring type, frequency, amplitude and dc offset.
+** Main use will be by peek/poke applications.
+*/
+int Si3218x_dbgSetRinging (proslicChanType *pProslic,
+ ProSLIC_dbgRingCfg *ringCfg, int preset)
+{
+ int errVal,i=0;
+ uInt32 vScale = 1608872L; /* (2^28/170.25)*((100+4903)/4903) */
+ ramData dcdcVminTmp;
+
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ errVal = RC_NONE;
+
+ switch(ringCfg->ringtype)
+ {
+ case ProSLIC_RING_SINE:
+ i=0;
+ do
+ {
+ if(sineRingFreqTable[i].freq >= ringCfg->freq)
+ {
+ break;
+ }
+ i++;
+ }
+ while (sineRingFreqTable[i].freq);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(sineRingFreqTable[i].freq == 0)
+ {
+ i--;
+ errVal = RC_RING_V_LIMITED;
+ }
+
+ /* Update RINGFR RINGAMP, RINGOFFSET, and RINGCON */
+ Si3218x_Ring_Presets[preset].freq = sineRingFreqTable[i].ringfr;
+ Si3218x_Ring_Presets[preset].amp = ringCfg->amp * sineRingFreqTable[i].ampScale;
+ Si3218x_Ring_Presets[preset].offset = ringCfg->offset * vScale;
+ Si3218x_Ring_Presets[preset].phas = 0L;
+
+ /* Don't alter anything in RINGCON other than clearing the TRAP bit */
+ Si3218x_Ring_Presets[preset].ringcon &= 0xFE;
+
+ Si3218x_Ring_Presets[preset].rtper = sineRingtripTable[i].rtper;
+ Si3218x_Ring_Presets[preset].rtacdb = sineRingtripTable[i].rtdb;
+ Si3218x_Ring_Presets[preset].rtdcdb = sineRingtripTable[i].rtdb;
+ Si3218x_Ring_Presets[preset].rtdcth = 0xFFFFFFFL;
+ Si3218x_Ring_Presets[preset].rtacth = sineRingtripTable[i].rtacth;
+ break;
+
+ case ProSLIC_RING_TRAP_CF11:
+ case ProSLIC_RING_TRAP_CF12:
+ case ProSLIC_RING_TRAP_CF13:
+ case ProSLIC_RING_TRAP_CF14:
+ case ProSLIC_RING_TRAP_CF15:
+ case ProSLIC_RING_TRAP_CF16:
+ i=0;
+ do
+ {
+ if(trapRingFreqTable[i].freq >= ringCfg->freq)
+ {
+ break;
+ }
+ i++;
+ }
+ while (trapRingFreqTable[i].freq);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(trapRingFreqTable[i].freq == 0)
+ {
+ i--;
+ errVal = RC_RING_V_LIMITED;
+ }
+
+ /* Update RINGFR RINGAMP, RINGOFFSET, and RINGCON */
+ Si3218x_Ring_Presets[preset].amp = ringCfg->amp * vScale;
+ Si3218x_Ring_Presets[preset].freq =
+ Si3218x_Ring_Presets[preset].amp/trapRingFreqTable[i].cfVal[ringCfg->ringtype];
+ Si3218x_Ring_Presets[preset].offset = ringCfg->offset * vScale;
+ Si3218x_Ring_Presets[preset].phas = 262144000L/trapRingFreqTable[i].freq;
+
+ /* Don't alter anything in RINGCON other than setting the TRAP bit */
+ Si3218x_Ring_Presets[preset].ringcon |= 0x01;
+
+ /* RTPER and debouce timers */
+ Si3218x_Ring_Presets[preset].rtper = trapRingtripTable[i].rtper;
+ Si3218x_Ring_Presets[preset].rtacdb = trapRingtripTable[i].rtdb;
+ Si3218x_Ring_Presets[preset].rtdcdb = trapRingtripTable[i].rtdb;
+
+
+ Si3218x_Ring_Presets[preset].rtdcth = 0xFFFFFFFL;
+ Si3218x_Ring_Presets[preset].rtacth =
+ trapRingtripTable[i].rtacth[ringCfg->ringtype];
+
+
+ break;
+ }
+
+ /*
+ ** DCDC tracking sluggish under light load at higher ring freq.
+ ** Reduce tracking depth above 40Hz. This should have no effect
+ ** if using the Buck-Boost architecture.
+ */
+ if((sineRingFreqTable[i].freq >= 40)
+ ||(Si3218x_General_Configuration.bom_option == BO_DCDC_BUCK_BOOST))
+ {
+ dcdcVminTmp = ringCfg->amp + ringCfg->offset;
+ dcdcVminTmp *= 1000;
+ dcdcVminTmp *= SCALE_V_MADC;
+ Si3218x_Ring_Presets[preset].dcdc_vref_min_rng = dcdcVminTmp;
+ }
+ else
+ {
+ Si3218x_Ring_Presets[preset].dcdc_vref_min_rng = 0x1800000L;
+ }
+
+ return errVal;
+}
+
+
+typedef struct
+{
+ int32 gain;
+ uInt32 scale;
+} ProSLIC_GainScaleLookup;
+
+#ifndef ENABLE_HIRES_GAIN
+static int Si3218x_dbgSetGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int tx_rx_sel)
+{
+ int errVal = 0;
+ int32 i;
+ int32 gain_pga, gain_eq;
+ const ProSLIC_GainScaleLookup gainScaleTable[]
+ = /* gain, scale=10^(gain/20) */
+ {
+ {-30, 32},
+ {-29, 35},
+ {-28, 40},
+ {-27, 45},
+ {-26, 50},
+ {-25, 56},
+ {-24, 63},
+ {-23, 71},
+ {-22, 79},
+ {-21, 89},
+ {-20, 100},
+ {-19, 112},
+ {-18, 126},
+ {-17, 141},
+ {-16, 158},
+ {-15, 178},
+ {-14, 200},
+ {-13, 224},
+ {-12, 251},
+ {-11, 282},
+ {-10, 316},
+ {-9, 355},
+ {-8, 398},
+ {-7, 447},
+ {-6, 501},
+ {-5, 562},
+ {-4, 631},
+ {-3, 708},
+ {-2, 794},
+ {-1, 891},
+ {0, 1000},
+ {1, 1122},
+ {2, 1259},
+ {3, 1413},
+ {4, 1585},
+ {5, 1778},
+ {6, 1995},
+ {0xff,0} /* terminator */
+ };
+
+ /* Test against max gain */
+ if (gain > PROSLIC_EXTENDED_GAIN_MAX)
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+ DEBUG_PRINT(pProslic, "%sdbgSetGain: Gain %d out of range\n", LOGPRINT_PREFIX,
+ (int)gain);
+ gain = PROSLIC_EXTENDED_GAIN_MAX; /* Clamp to maximum */
+ }
+
+ /* Test against min gain */
+ if (gain < PROSLIC_GAIN_MIN)
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+ DEBUG_PRINT(pProslic, "%sdbgSetGain: Gain %d out of range\n", LOGPRINT_PREFIX,
+ (int)gain);
+ gain = PROSLIC_GAIN_MIN; /* Clamp to minimum */
+ }
+
+ /* Distribute gain */
+ if(gain == 0)
+ {
+ gain_pga = 0;
+ gain_eq = 0;
+ }
+ else if(gain > PROSLIC_GAIN_MAX)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = PROSLIC_GAIN_MAX;
+ gain_eq = gain - PROSLIC_GAIN_MAX;
+ }
+ else
+ {
+ gain_pga = gain - PROSLIC_GAIN_MAX;
+ gain_eq = PROSLIC_GAIN_MAX;
+ }
+ }
+ else if(gain > 0)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = gain;
+ gain_eq = 0;
+ }
+ else
+ {
+ gain_pga = 0;
+ gain_eq = gain;
+ }
+ }
+ else
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = 0;
+ gain_eq = gain;
+ }
+ else
+ {
+ gain_pga = gain;
+ gain_eq = 0;
+ }
+
+ }
+
+
+ /*
+ ** Lookup PGA Appropriate PGA Gain
+ */
+ i=0;
+ do
+ {
+ if(gainScaleTable[i].gain >= gain_pga) /* was gain_1 */
+ {
+ break;
+ }
+ i++;
+ }
+ while (gainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(gainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ Si3218x_audioGain_Presets[0].acgain =
+ (Si3218x_Impedance_Presets[impedance_preset].txgain/1000)
+ *gainScaleTable[i].scale;
+ }
+ else
+ {
+ Si3218x_audioGain_Presets[1].acgain =
+ (Si3218x_Impedance_Presets[impedance_preset].rxgain/1000)
+ *gainScaleTable[i].scale;
+ }
+
+
+ /*
+ ** Lookup EQ Gain
+ */
+ i=0;
+ do
+ {
+ if(gainScaleTable[i].gain >= gain_eq) /* was gain_2 */
+ {
+ break;
+ }
+ i++;
+ }
+ while (gainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(gainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ /*sign extend negative numbers*/
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+ }
+
+ Si3218x_audioGain_Presets[0].aceq_c0 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0/1000)
+ *gainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[0].aceq_c1 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1/1000)
+ *gainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[0].aceq_c2 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2/1000)
+ *gainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[0].aceq_c3 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3/1000)
+ *gainScaleTable[i].scale;
+ }
+ else
+ {
+ /*sign extend negative numbers*/
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+ }
+
+ Si3218x_audioGain_Presets[1].aceq_c0 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0/1000)
+ *gainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[1].aceq_c1 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1/1000)
+ *gainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[1].aceq_c2 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2/1000)
+ *gainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[1].aceq_c3 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3/1000)
+ *gainScaleTable[i].scale;
+ }
+
+
+ return errVal;
+}
+#else /* ENABLE_HIRES_GAIN */
+/*
+** Function: Si3218x_dbgSetGainHiRes()
+**
+** Description:
+** Provision function for setting up
+** TX and RX gain with 0.1dB resolution instead
+** of 1.0dB resolution
+*/
+static int Si3218x_dbgSetGainHiRes (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int tx_rx_sel)
+{
+ int errVal = 0;
+ int32 i;
+ int32 coarseGainIndex, fineGainIndex;
+ int32 gain_pga, gain_eq;
+ int32 coarseGain, fineGain;
+ int32 tmp;
+ const ProSLIC_GainScaleLookup coarseGainScaleTable[]
+ = /* gain, scale=10^(gain/20) */
+ {
+ {-30, 32},
+ {-29, 35},
+ {-28, 40},
+ {-27, 45},
+ {-26, 50},
+ {-25, 56},
+ {-24, 63},
+ {-23, 71},
+ {-22, 79},
+ {-21, 89},
+ {-20, 100},
+ {-19, 112},
+ {-18, 126},
+ {-17, 141},
+ {-16, 158},
+ {-15, 178},
+ {-14, 200},
+ {-13, 224},
+ {-12, 251},
+ {-11, 282},
+ {-10, 316},
+ {-9, 355},
+ {-8, 398},
+ {-7, 447},
+ {-6, 501},
+ {-5, 562},
+ {-4, 631},
+ {-3, 708},
+ {-2, 794},
+ {-1, 891},
+ {0, 1000},
+ {1, 1122},
+ {2, 1259},
+ {3, 1413},
+ {4, 1585},
+ {5, 1778},
+ {6, 1995},
+ {0xff,0} /* terminator */
+ };
+
+ const ProSLIC_GainScaleLookup fineGainScaleTable[]
+ = /* gain, scale=10^(gain/20) */
+ {
+ {-9, 902},
+ {-8, 912},
+ {-7, 923},
+ {-6, 933},
+ {-5, 944},
+ {-4, 955},
+ {-3, 966},
+ {-2, 977},
+ {-1, 989},
+ {0, 1000},
+ {1, 1012},
+ {2, 1023},
+ {3, 1035},
+ {4, 1047},
+ {5, 1059},
+ {6, 1072},
+ {7, 1084},
+ {8, 1096},
+ {9, 1109},
+ {0xff,0} /* terminator */
+ };
+
+ /* Test against max gain */
+ if (gain > (PROSLIC_GAIN_MAX*10L))
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+ DEBUG_PRINT(pProslic, "%sdbgSetGain: Gain %d dB*10 out of range\n",
+ LOGPRINT_PREFIX, gain);
+ gain = (PROSLIC_GAIN_MAX*10L); /* Clamp to maximum */
+ }
+
+ /* Test against min gain */
+ if (gain < (PROSLIC_GAIN_MIN*10L))
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+ DEBUG_PRINT(pProslic, "%sdbgSetGain: Gain %d dB*10 out of range\n",
+ LOGPRINT_PREFIX, gain);
+ gain = (PROSLIC_GAIN_MIN*10); /* Clamp to minimum */
+ }
+
+ /* Distribute gain */
+ coarseGain = gain/10L;
+ fineGain = gain - (coarseGain*10L);
+
+ /* Distribute coarseGain */
+ if(coarseGain == 0)
+ {
+ gain_pga = 0;
+ gain_eq = 0;
+ }
+ else if(coarseGain > 0)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = coarseGain;
+ gain_eq = 0;
+ }
+ else
+ {
+ gain_pga = 0;
+ gain_eq = coarseGain;
+ }
+ }
+ else
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = 0;
+ gain_eq = coarseGain;
+ }
+ else
+ {
+ gain_pga = coarseGain;
+ gain_eq = 0;
+ }
+ }
+
+ /*
+ ** Lookup PGA Appopriate PGA Gain
+ */
+ i=0;
+ do
+ {
+ if(coarseGainScaleTable[i].gain >= gain_pga)
+ {
+ break;
+ }
+ i++;
+ }
+ while (coarseGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(coarseGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ coarseGainIndex = i; /* Store coarse index */
+
+ /* Find fineGain */
+ i = 0;
+ do
+ {
+ if(fineGainScaleTable[i].gain >= fineGain)
+ {
+ break;
+ }
+ i++;
+ }
+ while (fineGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(fineGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ fineGainIndex = i;
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ Si3218x_audioGain_Presets[0].acgain = ((
+ Si3218x_Impedance_Presets[impedance_preset].txgain/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ }
+ else
+ {
+ Si3218x_audioGain_Presets[1].acgain = ((
+ Si3218x_Impedance_Presets[impedance_preset].rxgain/1000L)
+ * coarseGainScaleTable[coarseGainIndex].scale)/1000L
+ * fineGainScaleTable[fineGainIndex].scale;
+ }
+
+ /*
+ ** Lookup EQ Gain
+ */
+ i=0;
+ do
+ {
+ if(coarseGainScaleTable[i].gain >= gain_eq)
+ {
+ break;
+ }
+ i++;
+ }
+ while (coarseGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(coarseGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ coarseGainIndex = i; /* Store coarse index */
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ /*sign extend negative numbers*/
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+ }
+
+ tmp = (((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3218x_audioGain_Presets[0].aceq_c0 = tmp;
+
+ tmp = (((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3218x_audioGain_Presets[0].aceq_c1 = tmp;
+
+ tmp = (((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3218x_audioGain_Presets[0].aceq_c2 = tmp;
+
+ tmp = (((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3/1000L)
+ *coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3218x_audioGain_Presets[0].aceq_c3 = tmp;
+ }
+ else
+ {
+ /*sign extend negative numbers*/
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ }
+ if (Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ {
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+ }
+
+ Si3218x_audioGain_Presets[1].aceq_c0 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0/1000)
+ *coarseGainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[1].aceq_c1 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1/1000)
+ * coarseGainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[1].aceq_c2 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2/1000)
+ * coarseGainScaleTable[i].scale;
+ Si3218x_audioGain_Presets[1].aceq_c3 = ((int32)
+ Si3218x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3/1000)
+ * coarseGainScaleTable[i].scale;
+ }
+
+ return errVal;
+}
+#endif /* ENABLE_HIRES_GAIN */
+
+/*
+** Function: PROSLIC_dbgSetTXGain
+**
+** Description:
+** Provision function for setting up
+** TX gain
+*/
+
+int Si3218x_dbgSetTXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset)
+{
+ SILABS_UNREFERENCED_PARAMETER(audio_gain_preset);
+#ifdef ENABLE_HIRES_GAIN
+ return Si3218x_dbgSetGainHiRes(pProslic,gain,impedance_preset,TXACGAIN_SEL);
+#else
+ return Si3218x_dbgSetGain(pProslic,gain,impedance_preset,TXACGAIN_SEL);
+#endif
+}
+
+/*
+** Function: PROSLIC_dbgSetRXGain
+**
+** Description:
+** Provision function for setting up
+** RX gain
+*/
+int Si3218x_dbgSetRXGain (proslicChanType *pProslic, int32 gain,
+ int impedance_preset, int audio_gain_preset)
+{
+ SILABS_UNREFERENCED_PARAMETER(audio_gain_preset);
+#ifdef ENABLE_HIRES_GAIN
+ return Si3218x_dbgSetGainHiRes(pProslic,gain,impedance_preset,RXACGAIN_SEL);
+#else
+ return Si3218x_dbgSetGain(pProslic,gain,impedance_preset,RXACGAIN_SEL);
+#endif
+}
+
+/*
+** Function: Si3218x_GetRAMScale
+**
+** Description:
+** Read scale factor for passed RAM location
+**
+** Return Value:
+** int32 scale
+*/
+static int32 Si3218x_GetRAMScale(uInt16 addr)
+{
+ int32 scale;
+
+ switch(addr)
+ {
+ case SI3218X_RAM_MADC_ILOOP:
+ case SI3218X_RAM_MADC_ITIP:
+ case SI3218X_RAM_MADC_IRING:
+ case SI3218X_RAM_MADC_ILONG:
+ scale = SCALE_I_MADC;
+ break;
+
+ case SI3218X_RAM_MADC_VTIPC:
+ case SI3218X_RAM_MADC_VRINGC:
+ case SI3218X_RAM_MADC_VBAT:
+ case SI3218X_RAM_MADC_VDC:
+ case SI3218X_RAM_MADC_VDC_OS:
+ case SI3218X_RAM_MADC_VLONG:
+ case SI3218X_RAM_VDIFF_SENSE:
+ case SI3218X_RAM_VDIFF_FILT:
+ case SI3218X_RAM_VDIFF_COARSE:
+ case SI3218X_RAM_VTIP:
+ case SI3218X_RAM_VRING:
+ scale = SCALE_V_MADC;
+ break;
+
+ default:
+ scale = 1;
+ break;
+ }
+
+ return scale;
+}
+
+/*
+** Function: Si3218x_ReadMADCScaled
+**
+** Description:
+** Read MADC (or other sensed voltages/currents) and
+** return scaled value in int32 format.
+**
+** Return Value:
+** int32 voltage in mV or
+** int32 current in uA
+*/
+int32 Si3218x_ReadMADCScaled(proslicChanType_ptr pProslic,uInt16 addr,
+ int32 scale)
+{
+ int32 data;
+
+ /*
+ ** Read 29-bit RAM and sign extend to 32-bits
+ */
+ data = ReadRAM(pProHW,pProslic->channel,addr);
+ if(data & 0x10000000L)
+ {
+ data |= 0xF0000000L;
+ }
+
+ /*
+ ** Scale to provided value, or use defaults if scale = 0
+ */
+ if(scale == 0)
+ {
+ scale = Si3218x_GetRAMScale(addr);
+ }
+
+ data /= scale;
+
+ return data;
+}
+
+/*
+** Function: Si3218x_LineMonitor
+**
+** Description:
+** Monitor line voltages and currents
+*/
+int Si3218x_LineMonitor(proslicChanType *pProslic, proslicMonitorType *monitor)
+{
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ if(pProslic->channelEnable)
+ {
+ monitor->vtr = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_VDIFF_FILT);
+ if(monitor->vtr & 0x10000000L)
+ {
+ monitor->vtr |= 0xf0000000L;
+ }
+ monitor->vtr /= SCALE_V_MADC;
+
+ monitor->vtip = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_VTIP);
+ if(monitor->vtip & 0x10000000L)
+ {
+ monitor->vtip |= 0xf0000000L;
+ }
+ monitor->vtip /= SCALE_V_MADC;
+
+ monitor->vring = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_VRING);
+ if(monitor->vring & 0x10000000L)
+ {
+ monitor->vring |= 0xf0000000L;
+ }
+ monitor->vring /= SCALE_V_MADC;
+
+ monitor->vlong = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_MADC_VLONG);
+ if(monitor->vlong & 0x10000000L)
+ {
+ monitor->vlong |= 0xf0000000L;
+ }
+ monitor->vlong /= SCALE_V_MADC;
+
+ monitor->vbat = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_MADC_VBAT);
+ if(monitor->vbat & 0x10000000L)
+ {
+ monitor->vbat |= 0xf0000000L;
+ }
+ monitor->vbat /= SCALE_V_MADC;
+
+ monitor->vdc = 0; /* Si3218x has no SVDC */
+
+ monitor->itr = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_MADC_ILOOP);
+ if(monitor->itr & 0x10000000L)
+ {
+ monitor->itr |= 0xf0000000L;
+ }
+ monitor->itr /= SCALE_I_MADC;
+
+ monitor->itip = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_MADC_ITIP);
+ if(monitor->itip & 0x10000000L)
+ {
+ monitor->itip |= 0xf0000000L;
+ }
+ monitor->itip /= SCALE_I_MADC;
+
+ monitor->iring = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_MADC_IRING);
+ if(monitor->iring & 0x10000000L)
+ {
+ monitor->iring |= 0xf0000000L;
+ }
+ monitor->iring /= SCALE_I_MADC;
+
+ monitor->ilong = ReadRAM(pProHW,pProslic->channel,SI3218X_RAM_MADC_ILONG);
+ if(monitor->ilong & 0x10000000L)
+ {
+ monitor->ilong |= 0xf0000000L;
+ }
+ monitor->ilong /= SCALE_I_MADC;
+
+ monitor->p_hvic = ReadRAM(pProHW,pProslic->channel,
+ SI3218X_RAM_P_Q1_D); /* P_HVIC_LPF */
+ if(monitor->p_hvic & 0x10000000L)
+ {
+ monitor->p_hvic |= 0xf0000000L;
+ }
+ monitor->p_hvic /= SCALE_P_MADC;
+ }
+
+ return RC_NONE;
+}
+
+/*
+** Function: Si3218x_PSTNCheck
+**
+** Description:
+** Continuous monitoring of longitudinal current.
+** If an average of N samples exceed avgThresh or a
+** single sample exceeds singleThresh, the linefeed
+** is forced into the open state.
+**
+** This protects the port from connecting to a live
+** pstn line (faster than power alarm).
+**
+*/
+int Si3218x_PSTNCheck (proslicChanType *pProslic,
+ proslicPSTNCheckObjType *pPSTNCheck)
+{
+ uInt8 i;
+
+ if( (pProslic->channelType != PROSLIC)
+ || (pPSTNCheck->samples == 0) )
+ {
+ return RC_NONE; /* Ignore DAA channels */
+ }
+
+ /* Adjust buffer index */
+ if(pPSTNCheck->count >= pPSTNCheck->samples)
+ {
+ pPSTNCheck->buffFull = TRUE;
+ pPSTNCheck->count = 0; /* reset buffer ptr */
+ }
+
+ /* Read next sample */
+ pPSTNCheck->ilong[pPSTNCheck->count] = ReadRAM(pProHW,pProslic->channel,
+ SI3218X_RAM_MADC_ILONG);
+ if(pPSTNCheck->ilong[pPSTNCheck->count] & 0x10000000L)
+ {
+ pPSTNCheck->ilong[pPSTNCheck->count] |= 0xf0000000L;
+ }
+ pPSTNCheck->ilong[pPSTNCheck->count] /= SCALE_I_MADC;
+
+ /* Monitor magnitude only */
+ if(pPSTNCheck->ilong[pPSTNCheck->count] < 0)
+ {
+ pPSTNCheck->ilong[pPSTNCheck->count] = -pPSTNCheck->ilong[pPSTNCheck->count];
+ }
+
+ /* Quickly test for single measurement violation */
+ if(pPSTNCheck->ilong[pPSTNCheck->count] > pPSTNCheck->singleThresh)
+ {
+ return RC_PSTN_CHECK_SINGLE_FAIL; /* fail */
+ }
+
+ /* Average once buffer is full */
+ if(pPSTNCheck->buffFull == TRUE)
+ {
+ pPSTNCheck->avgIlong = 0;
+ for(i=0; i<pPSTNCheck->samples; i++)
+ {
+ pPSTNCheck->avgIlong += pPSTNCheck->ilong[i];
+ }
+ pPSTNCheck->avgIlong /= pPSTNCheck->samples;
+
+ if(pPSTNCheck->avgIlong > pPSTNCheck->avgThresh)
+ {
+ /* reinit obj and return fail */
+ pPSTNCheck->count = 0;
+ pPSTNCheck->buffFull = FALSE;
+ return RC_PSTN_CHECK_AVG_FAIL;
+ }
+ else
+ {
+ pPSTNCheck->count++;
+ return RC_NONE;
+ }
+ }
+ else
+ {
+ pPSTNCheck->count++;
+ return RC_NONE;
+ }
+}
+
+#ifdef PSTN_DET_ENABLE
+/*
+** Function: abs_int32
+**
+** Description:
+** abs implementation for int32 type
+*/
+static int32 abs_int32(int32 a)
+{
+ if(a < 0)
+ {
+ return -1*a;
+ }
+ return a;
+}
+
+/*
+** Function: Si3218x_DiffPSTNCheck
+**
+** Description:
+** Monitor for excessive longitudinal current, which
+** would be present if a live pstn line was connected
+** to the port.
+**
+** Returns:
+** RC_NONE - test in progress
+** RC_COMPLETE_NO_ERR - test complete, no alarms or errors
+** RC_POWER_ALARM_HVIC - test interrupted by HVIC power alarm
+** RC_
+**
+*/
+
+int Si3218x_DiffPSTNCheck (proslicChanType *pProslic,
+ proslicDiffPSTNCheckObjType *pPSTNCheck)
+{
+ int32 ramData;
+ uInt8 loop_status;
+ int i;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR; /* Ignore DAA channels */
+ }
+
+
+ switch(pPSTNCheck->pState.stage)
+ {
+ case 0:
+ /* Optional OPEN foreign voltage measurement - only execute if LCS = 0 */
+ /* Disable low power mode */
+ pPSTNCheck->enhanceRegSave = ReadReg(pProHW,pProslic->channel,ENHANCE);
+ WriteReg(pProHW,pProslic->channel, ENHANCE,
+ pPSTNCheck->enhanceRegSave&0x07); /* Disable powersave */
+ pPSTNCheck->vdiff1_avg = 0;
+ pPSTNCheck->vdiff2_avg = 0;
+ pPSTNCheck->iloop1_avg = 0;
+ pPSTNCheck->iloop2_avg = 0;
+ pPSTNCheck->return_status = RC_COMPLETE_NO_ERR;
+ /* Do OPEN state hazardous voltage measurement if enabled and ONHOOK */
+ Si3218x_ReadHookStatus(pProslic,&loop_status);
+ if((loop_status == ONHOOK)&&(pPSTNCheck->femf_enable == 1))
+ {
+ pPSTNCheck->pState.stage++;
+ }
+ else
+ {
+ pPSTNCheck->pState.stage = 10;
+ }
+
+ return RC_NONE;
+
+ case 1:
+ /* Change linefeed to OPEN state for HAZV measurement, setup coarse sensors */
+ pPSTNCheck->lfstate_entry = ReadReg(pProHW,pProslic->channel, LINEFEED);
+ ProSLIC_SetLinefeedStatus(pProslic,LF_OPEN);
+ pPSTNCheck->pState.stage++;
+ return RC_NONE;
+
+ case 2:
+ /* Settle */
+ ProSLIC_PSTN_delay_poll(&(pPSTNCheck->pState), PSTN_DET_OPEN_FEMF_SETTLE);
+ return RC_NONE;
+
+ case 3:
+ /* Measure HAZV */
+ pPSTNCheck->vdiff_open = Si3218x_ReadMADCScaled(pProslic,VDIFF_COARSE,0);
+ DEBUG_PRINT(pProslic, "%sDiff PSTN : Vopen = %d mV\n", LOGPRINT_PREFIX,
+ pPSTNCheck->vdiff_open);
+
+ /* Stop PSTN check if differential voltage > max_femf_vopen present */
+ if(abs_int32(pPSTNCheck->vdiff_open) > pPSTNCheck->max_femf_vopen)
+ {
+ pPSTNCheck->pState.stage = 70;
+ pPSTNCheck->return_status = RC_PSTN_OPEN_FEMF;
+ }
+ else
+ {
+ pPSTNCheck->pState.stage = 10;
+ }
+ return 0;
+
+ case 10:
+ /* Load first DC feed preset */
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->dcfPreset1);
+ ProSLIC_SetLinefeedStatus(pProslic,LF_FWD_ACTIVE);
+ pPSTNCheck->pState.stage++;
+ return RC_NONE;
+
+ case 11:
+ /* Settle */
+ ProSLIC_PSTN_delay_poll(&(pPSTNCheck->pState), PSTN_DET_DIFF_IV1_SETTLE);
+ return RC_NONE;
+
+ case 12:
+ /* Measure VDIFF and ILOOP, switch to 2nd DCFEED setup */
+ pPSTNCheck->vdiff1[pPSTNCheck->pState.sampleIterations] =
+ Si3218x_ReadMADCScaled(pProslic,VDIFF_FILT,0);
+ pPSTNCheck->iloop1[pPSTNCheck->pState.sampleIterations] =
+ Si3218x_ReadMADCScaled(pProslic,MADC_ILOOP,0);
+#ifdef ENABLE_DEBUG
+ if ( DEBUG_ENABLED(pProslic) )
+ {
+ LOGPRINT("%sDiff PSTN: Vdiff1[%d] = %d mV\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,
+ pPSTNCheck->vdiff1[pPSTNCheck->pState.sampleIterations]);
+ LOGPRINT("%sDiff PSTN: Iloop1[%d] = %d uA\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,
+ pPSTNCheck->iloop1[pPSTNCheck->pState.sampleIterations]);
+ }
+#endif
+ pPSTNCheck->pState.sampleIterations++;
+ if(pPSTNCheck->pState.sampleIterations >= pPSTNCheck->samples)
+ {
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->dcfPreset2);
+ pPSTNCheck->pState.stage++;
+ pPSTNCheck->pState.sampleIterations = 0;
+ }
+ return RC_NONE;
+
+ case 13:
+ /* Settle feed 500ms */
+ ProSLIC_PSTN_delay_poll(&(pPSTNCheck->pState), PSTN_DET_DIFF_IV2_SETTLE);
+ return RC_NONE;
+
+ case 14:
+ /* Measure VDIFF and ILOOP*/
+ pPSTNCheck->vdiff2[pPSTNCheck->pState.sampleIterations] =
+ Si3218x_ReadMADCScaled(pProslic,VDIFF_FILT,0);
+ pPSTNCheck->iloop2[pPSTNCheck->pState.sampleIterations] =
+ Si3218x_ReadMADCScaled(pProslic,MADC_ILOOP,0);
+#ifdef ENABLE_DEBUG
+ if ( DEBUG_ENABLED(pProslic) )
+ {
+ LOGPRINT("%sDiff PSTN: Vdiff2[%d] = %d mV\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,
+ pPSTNCheck->vdiff2[pPSTNCheck->pState.sampleIterations]);
+ LOGPRINT("%sDiff PSTN: Iloop2[%d] = %d uA\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,
+ pPSTNCheck->iloop2[pPSTNCheck->pState.sampleIterations]);
+ }
+#endif
+ pPSTNCheck->pState.sampleIterations++;
+ if(pPSTNCheck->pState.sampleIterations >= pPSTNCheck->samples)
+ {
+ /* Compute averages */
+ for (i=0; i<pPSTNCheck->samples; i++)
+ {
+ pPSTNCheck->vdiff1_avg += pPSTNCheck->vdiff1[i];
+ pPSTNCheck->iloop1_avg += pPSTNCheck->iloop1[i];
+ pPSTNCheck->vdiff2_avg += pPSTNCheck->vdiff2[i];
+ pPSTNCheck->iloop2_avg += pPSTNCheck->iloop2[i];
+ }
+
+ pPSTNCheck->vdiff1_avg /= pPSTNCheck->samples;
+ pPSTNCheck->iloop1_avg /= pPSTNCheck->samples;
+ pPSTNCheck->vdiff2_avg /= pPSTNCheck->samples;
+ pPSTNCheck->iloop2_avg /= pPSTNCheck->samples;
+
+ /* Force small (probably offset) currents to minimum value */
+ if(abs_int32(pPSTNCheck->iloop1_avg) < PSTN_DET_MIN_ILOOP)
+ {
+ pPSTNCheck->iloop1_avg = PSTN_DET_MIN_ILOOP;
+ }
+ if(abs_int32(pPSTNCheck->iloop2_avg) < PSTN_DET_MIN_ILOOP)
+ {
+ pPSTNCheck->iloop2_avg = PSTN_DET_MIN_ILOOP;
+ }
+
+ /* Calculate measured loop impedance */
+ pPSTNCheck->rl1 = abs_int32((
+ pPSTNCheck->vdiff1_avg*1000L)/pPSTNCheck->iloop1_avg);
+ pPSTNCheck->rl2 = abs_int32((
+ pPSTNCheck->vdiff2_avg*1000L)/pPSTNCheck->iloop2_avg);
+
+ /* Force non-zero loop resistance */
+ if(pPSTNCheck->rl1 == 0)
+ {
+ pPSTNCheck->rl1 = 1;
+ }
+ if(pPSTNCheck->rl2 == 0)
+ {
+ pPSTNCheck->rl2 = 1;
+ }
+
+ /* Qualify loop impedances */
+ pPSTNCheck->rl_ratio = (pPSTNCheck->rl1*1000L)/pPSTNCheck->rl2;
+#ifdef ENABLE_DEBUG
+ if ( DEBUG_ENABLED(pProslic) )
+ {
+ const char fmt_string[] = "%sDiffPSTN: %s = %d %s\n";
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "VDIFF1", pPSTNCheck->vdiff1_avg, "mV");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "ILOOP1",pPSTNCheck->iloop1_avg, "uA");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "VDIFF2",pPSTNCheck->vdiff2_avg, "mV");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "ILOOP2",pPSTNCheck->iloop2_avg, "uA");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "RL1",pPSTNCheck->rl1, "ohm");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "RL2",pPSTNCheck->rl2, "ohm");
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, "RL_Ratio",pPSTNCheck->rl_ratio, " ");
+ }
+#endif
+
+ /* Restore */
+ pPSTNCheck->pState.sampleIterations = 0;
+ pPSTNCheck->pState.stage = 70;
+ }
+ return RC_NONE;
+
+ case 70: /* Reset test state, restore entry conditions */
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->entryDCFeedPreset);
+ ProSLIC_SetLinefeedStatus(pProslic,pPSTNCheck->lfstate_entry);
+ WriteReg(pProHW,pProslic->channel,ENHANCE, pPSTNCheck->enhanceRegSave);
+ pPSTNCheck->pState.stage = 0;
+ pPSTNCheck->pState.waitIterations = 0;
+ pPSTNCheck->pState.sampleIterations = 0;
+ return pPSTNCheck->return_status;
+
+ }
+ return RC_NONE;
+}
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_patch_A_2016DEC06.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_patch_A_2016DEC06.c
new file mode 100644
index 0000000..1f3d486
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3218x_patch_A_2016DEC06.c
@@ -0,0 +1,298 @@
+/*
+** Patch: patch.c
+**
+** Generated from patch.dsp_prom
+** on 12-06-2016 at 16:18:32
+** Patch ID = 0x12062016L
+*/
+#include "si_voice_datatypes.h"
+#include "si3218x.h"
+
+static const uInt32 patchData [] = {
+141029L,
+540867L,
+141029L,
+543427L,
+141029L,
+548547L,
+141029L,
+588995L,
+141029L,
+593603L,
+141029L,
+595651L,
+141029L,
+606915L,
+141029L,
+613571L,
+141029L,
+619203L,
+141029L,
+630467L,
+141029L,
+630979L,
+141029L,
+631491L,
+141029L,
+632003L,
+141029L,
+632515L,
+141029L,
+633027L,
+141029L,
+633539L,
+736L,
+492224L,
+452200L,
+141029L,
+491712L,
+492645L,
+252002L,
+524295L,
+517220L,
+144101L,
+547011L,
+517733L,
+827461L,
+141029L,
+745664L,
+550117L,
+575683L,
+558181L,
+410018L,
+466549L,
+142565L,
+575683L,
+524290L,
+143077L,
+564931L,
+456805L,
+524290L,
+446981L,
+29189L,
+431717L,
+473669L,
+432741L,
+472133L,
+392805L,
+473157L,
+792165L,
+471621L,
+472677L,
+792133L,
+474213L,
+431680L,
+432645L,
+475237L,
+392785L,
+466437L,
+141029L,
+586947L,
+560741L,
+446562L,
+445444L,
+142565L,
+571075L,
+456805L,
+445538L,
+446981L,
+29186L,
+446469L,
+141029L,
+586947L,
+447077L,
+262242L,
+142565L,
+574659L,
+524291L,
+446981L,
+29189L,
+141029L,
+586947L,
+558181L,
+409506L,
+524309L,
+694789L,
+558085L,
+694789L,
+466533L,
+524290L,
+142565L,
+586947L,
+471653L,
+792133L,
+473701L,
+431685L,
+472165L,
+432709L,
+473189L,
+392768L,
+466437L,
+694789L,
+560645L,
+694789L,
+743525L,
+119426L,
+141029L,
+925377L,
+560741L,
+524290L,
+143072L,
+592067L,
+141029L,
+122050L,
+694789L,
+141029L,
+789186L,
+408165L,
+408645L,
+141029L,
+950976L,
+524291L,
+144101L,
+597699L,
+199685L,
+666853L,
+600771L,
+431717L,
+197189L,
+136805L,
+198725L,
+408677L,
+262242L,
+524291L,
+144101L,
+603843L,
+408581L,
+666853L,
+873664L,
+136805L,
+407621L,
+141029L,
+873664L,
+694789L,
+828517L,
+119426L,
+267414L,
+829441L,
+828933L,
+694789L,
+118405L,
+788805L,
+725829L,
+119424L,
+141029L,
+230594L,
+9733L,
+136805L,
+116130L,
+524304L,
+660069L,
+440424L,
+9827L,
+660066L,
+524315L,
+141029L,
+674496L,
+615141L,
+626883L,
+387589L,
+558181L,
+388514L,
+387701L,
+142565L,
+626883L,
+144096L,
+625859L,
+524292L,
+141029L,
+626371L,
+524304L,
+671746L,
+558181L,
+410018L,
+437365L,
+143074L,
+22722L,
+141029L,
+21186L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+0L
+};
+
+static const uInt16 patchEntries [] = {
+951,
+1455,
+3854,
+4333,
+1856,
+1695,
+4545,
+1316,
+4136,
+0,
+0,
+0,
+0,
+0,
+0,
+0
+};
+
+static const uInt16 patchSupportAddr [] = {
+1011,
+1010,
+928,
+926,
+923,
+911,
+892,
+872,
+800,
+799,
+798,
+797,
+796,
+758,
+757,
+226,
+0
+};
+
+static const uInt32 patchSupportData [] = {
+0x3F00000L,
+0x100000L,
+0x6150000L,
+0x82C58CL,
+0x1500000L,
+0x0L,
+0x460000L,
+0x0L,
+0x200000L,
+0x7D80000L,
+0x123400L,
+0x123400L,
+0x123400L,
+0x400000L,
+0x0L,
+0x35D540L,
+0x0L
+};
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+const proslicPatch si3218xPatchRevALCQC = {
+#else
+const proslicPatch RevAPatch = {
+#endif
+ patchData,
+ patchEntries,
+ 0x12062016L,
+ patchSupportAddr,
+ patchSupportData
+};
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_MULTI_BOM_constants.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_MULTI_BOM_constants.c
new file mode 100644
index 0000000..f2000bd
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_MULTI_BOM_constants.c
@@ -0,0 +1,1272 @@
+/*
+** Copyright (c) 2012 Silicon Laboratories, Inc.
+** 2013-01-09 11:25:33
+**
+** Si3226x ProSLIC API Configuration Tool Version 2.12.0
+*/
+
+
+#include "proslic.h"
+#include "si3226x.h"
+
+#include "si3217x.h" /* added by wanghaolei to reduce the parameters */
+
+Si3226x_General_Cfg Si3226x_General_Configuration = {
+0x65, /* DEVICE_KEY */
+BO_DCDC_BUCK_BOOST, /* BOM_OPT BJT PNP Buck boost */
+BO_DCDC_TRACKING, /* BAT_RAIL_TYPE */
+0x000AD000L, /* bat_hyst */
+0x070A3D3AL, /* VBATR_EXPECT (110.00) */
+0x03D70A20L, /* VBATH_EXPECT (60.00) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00014000L, /* PWRSAVE_DBI */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00312700L, /* VOV_BAT_PWRSAVE_MIN */
+0x00395800L, /* VOV_BAT_PWRSAVE_MIN_RNG */
+0x00800000L, /* THERM_DBI */
+0x00004000L, /* CPUMP_DBI */
+0x00F18900L, /* DCDC_VERR */
+0x00809D80L, /* DCDC_VERR_HYST */
+0x00000000L, /* DCDC_OITHRESH_LO */
+0x00D00000L, /* DCDC_OITHRESH_HI */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00500000L, /* DCDC_UVHYST */
+0x00000000L, /* DCDC_UVTHRESH */
+0x00D00000L, /* DCDC_OVTHRESH */
+0x00800000L, /* DCDC_OITHRESH */
+0x00000000L, /* DCDC_SWDRV_POL */
+0x00000000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_VREF_MAN */
+0x00000000L, /* DCDC_VREF_CTRL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x05B00000L, /* DCDC_ANA_VREF */
+0x00300000L, /* DCDC_ANA_GAIN */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00F00000L, /* DCDC_ANA_DSHIFT */
+0x0FDA4000L, /* DCDC_ANA_LPOLY */
+0x00000000L, /* DCDC_AUX_INVERT */
+0x00400000L, /* DCDC_CPUMP_LP */
+0x00000000L, /* DCDC_CPUMP_PULLDOWN */
+0x00000000L, /* DCDC_LIFT_EN */
+0x07FEB800L, /* COEF_P_HVIC */
+0x005B05B2L, /* P_TH_HVIC */
+VDC_9P0_16P0, /* VDC_RANGE_OPT */
+0x3F, /* AUTO */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN2 */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x10, /* ENHANCE */
+0x03A2E8BAL, /* SCALE_KAUDIO */
+0x04, /* ZCAL_EN */
+0x03000000L, /* LKG_OFHK_OFFSET */
+0x05000000L, /* LKG_LB_OFFSET */
+0x01000000L, /* VBATH_DELTA */
+0x03700000L, /* UVTHRESH_MAX */
+0x04B80200L, /* UVTHRESH_SCALE */
+0x00823000L /* UVTHRESH_BIAS */
+};
+
+
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+
+int si3226x_genconf_multi_max_preset = 7;
+
+Si3226x_General_Cfg Si3226x_General_Configuration_MultiBOM[] = {
+{ /* SI3226X_GEN_PARAM_BJT_BUCK_BOOST_VDC_9P0_16P0 */
+0x65, /* DEVICE_KEY */
+BO_DCDC_BUCK_BOOST, /* BOM_OPT BJT PNP Buck boost */
+BO_DCDC_TRACKING, /* BAT_RAIL_TYPE */
+0x000AD000L, /* bat_hyst */
+0x070A3D3AL, /* VBATR_EXPECT (110.00) */
+0x03D70A20L, /* VBATH_EXPECT (60.00) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00014000L, /* PWRSAVE_DBI */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00312700L, /* VOV_BAT_PWRSAVE_MIN */
+0x00395800L, /* VOV_BAT_PWRSAVE_MIN_RNG */
+0x00800000L, /* THERM_DBI */
+0x00004000L, /* CPUMP_DBI */
+0x00F18900L, /* DCDC_VERR */
+0x00809D80L, /* DCDC_VERR_HYST */
+0x00000000L, /* DCDC_OITHRESH_LO */
+0x00D00000L, /* DCDC_OITHRESH_HI */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00500000L, /* DCDC_UVHYST */
+0x00000000L, /* DCDC_UVTHRESH */
+0x00D00000L, /* DCDC_OVTHRESH */
+0x00800000L, /* DCDC_OITHRESH */
+0x00000000L, /* DCDC_SWDRV_POL */
+0x00000000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_VREF_MAN */
+0x00600000L, /* DCDC_VREF_CTRL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x05B00000L, /* DCDC_ANA_VREF */
+0x00300000L, /* DCDC_ANA_GAIN */
+0x00600000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00F00000L, /* DCDC_ANA_DSHIFT */
+0x0FDA4000L, /* DCDC_ANA_LPOLY */
+0x00000000L, /* DCDC_AUX_INVERT */
+0x00400000L, /* DCDC_CPUMP_LP */
+0x00000000L, /* DCDC_CPUMP_PULLDOWN */
+0x00100000L, /* DCDC_LIFT_EN */
+0x07FEB800L, /* COEF_P_HVIC */
+0x005B05B2L, /* P_TH_HVIC */
+VDC_9P0_16P0, /* VDC_RANGE_OPT */
+0x3F, /* AUTO */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN2 */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x10, /* ENHANCE */
+0x03A2E8BAL, /* SCALE_KAUDIO */
+0x04, /* ZCAL_EN */
+0x03000000L, /* LKG_OFHK_OFFSET */
+0x05000000L, /* LKG_LB_OFFSET */
+0x01000000L, /* VBATH_DELTA */
+0x03700000L, /* UVTHRESH_MAX */
+0x04B80200L, /* UVTHRESH_SCALE */
+0x00823000L /* UVTHRESH_BIAS */
+},
+{ /* SI3226X_GEN_PARAM_TSS */
+0x64, /* DEVICE_KEY */
+BO_DCDC_FLYBACK, /* BOM_OPT */
+BO_DCDC_TSS, /* BAT_RAIL_TYPE */
+0x0050C480L, /* bat_hyst */
+0x06666635L, /* VBATR_EXPECT (100.00) */
+0x03D70A20L, /* VBATH_EXPECT (60.00) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x00F5C28FL, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x02000000L, /* VBAT_TRACK_MIN_RNG */
+0x00014000L, /* PWRSAVE_DBI */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00312700L, /* VOV_BAT_PWRSAVE_MIN */
+0x00395800L, /* VOV_BAT_PWRSAVE_MIN_RNG */
+0x00800000L, /* THERM_DBI */
+0x00004000L, /* CPUMP_DBI */
+0x00F18900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00800000L, /* DCDC_OITHRESH_LO */
+0x01F00000L, /* DCDC_OITHRESH_HI */
+0x00200000L, /* PD_UVLO */
+0x00300000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00300000L, /* DCDC_UVHYST */
+0x02100000L, /* DCDC_UVTHRESH */
+0x00400000L, /* DCDC_OVTHRESH */
+0x00800000L, /* DCDC_OITHRESH */
+0x00000000L, /* DCDC_SWDRV_POL */
+0x07700000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_VREF_MAN */
+0x00000000L, /* DCDC_VREF_CTRL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x05B00000L, /* DCDC_ANA_VREF */
+0x00300000L, /* DCDC_ANA_GAIN */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00F00000L, /* DCDC_ANA_DSHIFT */
+0x0FDA4000L, /* DCDC_ANA_LPOLY */
+0x00000000L, /* DCDC_AUX_INVERT */
+0x00400000L, /* DCDC_CPUMP_LP */
+0x00000000L, /* DCDC_CPUMP_PULLDOWN */
+0x00000000L, /* DCDC_LIFT_EN */
+0x07FEB800L, /* COEF_P_HVIC */
+0x005B05B2L, /* P_TH_HVIC */
+VDC_10P8_20P0, /* VDC_RANGE_OPT */
+0x2F, /* AUTO */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN2 */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x10, /* ENHANCE */
+0x03A2E8BAL, /* SCALE_KAUDIO */
+0x04, /* ZCAL_EN */
+0x03000000L, /* LKG_OFHK_OFFSET */
+0x05000000L, /* LKG_LB_OFFSET */
+0x02200000L, /* VBATH_DELTA */
+0x03700000L, /* UVTHRESH_MAX */
+0x04F80200L, /* UVTHRESH_SCALE */
+0x00A23000L /* UVTHRESH_BIAS */
+},
+{ /* SI3226X_GEN_PARAM_TSS_ISO */
+0x64, /* DEVICE_KEY */
+BO_DCDC_FLYBACK, /* BOM_OPT */
+BO_DCDC_TSS_ISO, /* BAT_RAIL_TYPE */
+0x0050C480L, /* bat_hyst */
+0x06666635L, /* VBATR_EXPECT (100.00) */
+0x03D70A20L, /* VBATH_EXPECT (60.00) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x00F5C28FL, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x03200000L, /* VBAT_TRACK_MIN_RNG */
+0x00014000L, /* PWRSAVE_DBI */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00312700L, /* VOV_BAT_PWRSAVE_MIN */
+0x00395800L, /* VOV_BAT_PWRSAVE_MIN_RNG */
+0x00800000L, /* THERM_DBI */
+0x00004000L, /* CPUMP_DBI */
+0x00F18900L, /* DCDC_VERR */
+0x0080C480L, /* DCDC_VERR_HYST */
+0x00800000L, /* DCDC_OITHRESH_LO */
+0x01F00000L, /* DCDC_OITHRESH_HI */
+0x00200000L, /* PD_UVLO */
+0x00300000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00100000L, /* DCDC_UVHYST */
+0x02100000L, /* DCDC_UVTHRESH */
+0x00400000L, /* DCDC_OVTHRESH */
+0x00800000L, /* DCDC_OITHRESH */
+0x00000000L, /* DCDC_SWDRV_POL */
+0x06F00000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_VREF_MAN */
+0x00000000L, /* DCDC_VREF_CTRL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x05B00000L, /* DCDC_ANA_VREF */
+0x00300000L, /* DCDC_ANA_GAIN */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00F00000L, /* DCDC_ANA_DSHIFT */
+0x0FDA4000L, /* DCDC_ANA_LPOLY */
+0x00000000L, /* DCDC_AUX_INVERT */
+0x00400000L, /* DCDC_CPUMP_LP */
+0x00000000L, /* DCDC_CPUMP_PULLDOWN */
+0x00000000L, /* DCDC_LIFT_EN */
+0x07FEB800L, /* COEF_P_HVIC */
+0x005B05B2L, /* P_TH_HVIC */
+VDC_10P8_20P0, /* VDC_RANGE_OPT */
+0x2F, /* AUTO */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN2 */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x10, /* ENHANCE */
+0x03A2E8BAL, /* SCALE_KAUDIO */
+0x04, /* ZCAL_EN */
+0x03000000L, /* LKG_OFHK_OFFSET */
+0x05000000L, /* LKG_LB_OFFSET */
+0x01B00000L, /* VBATH_DELTA */
+0x03700000L, /* UVTHRESH_MAX */
+0x04F80200L, /* UVTHRESH_SCALE */
+0x00A23000L /* UVTHRESH_BIAS */
+},
+{ /* SI3226X_GEN_PARAM_QCUK */
+0x65, /* DEVICE_KEY */
+BO_DCDC_QCUK, /* BOM_OPT */
+BO_DCDC_TRACKING, /* BAT_RAIL_TYPE */
+0x000AD000L, /* bat_hyst */
+0x08A3D6C8L, /* VBATR_EXPECT (135.00) */
+0x03D70A20L, /* VBATH_EXPECT (60.00) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00014000L, /* PWRSAVE_DBI */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00312700L, /* VOV_BAT_PWRSAVE_MIN */
+0x00395800L, /* VOV_BAT_PWRSAVE_MIN_RNG */
+0x00800000L, /* THERM_DBI */
+0x00004000L, /* CPUMP_DBI */
+0x00F18900L, /* DCDC_VERR */
+0x00809D80L, /* DCDC_VERR_HYST */
+0x00800000L, /* DCDC_OITHRESH_LO */
+0x01F00000L, /* DCDC_OITHRESH_HI */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00500000L, /* DCDC_UVHYST */
+0x00000000L, /* DCDC_UVTHRESH */
+0x01700000L, /* DCDC_OVTHRESH */
+0x00800000L, /* DCDC_OITHRESH */
+0x00000000L, /* DCDC_SWDRV_POL */
+0x00000000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_VREF_MAN */
+0x00000000L, /* DCDC_VREF_CTRL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x05B00000L, /* DCDC_ANA_VREF */
+0x00300000L, /* DCDC_ANA_GAIN */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00F00000L, /* DCDC_ANA_DSHIFT */
+0x0FDA4000L, /* DCDC_ANA_LPOLY */
+0x00000000L, /* DCDC_AUX_INVERT */
+0x00400000L, /* DCDC_CPUMP_LP */
+0x00000000L, /* DCDC_CPUMP_PULLDOWN */
+0x00000000L, /* DCDC_LIFT_EN */
+0x07FEB800L, /* COEF_P_HVIC */
+0x005B05B2L, /* P_TH_HVIC */
+VDC_4P5_16P0, /* VDC_RANGE_OPT */
+0x3F, /* AUTO */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN2 */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x10, /* ENHANCE */
+0x03A2E8BAL, /* SCALE_KAUDIO */
+0x04, /* ZCAL_EN */
+0x03000000L, /* LKG_OFHK_OFFSET */
+0x05000000L, /* LKG_LB_OFFSET */
+0x01000000L, /* VBATH_DELTA */
+0x03700000L, /* UVTHRESH_MAX */
+0x04B80200L, /* UVTHRESH_SCALE */
+0x00823000L /* UVTHRESH_BIAS */
+},
+{ /* SI3226X_GEN_PARAM_LCQCUK */
+0x65, /* DEVICE_KEY */
+BO_DCDC_LCQCUK, /* BOM_OPT */
+BO_DCDC_TRACKING, /* BAT_RAIL_TYPE */
+0x000AD000L, /* bat_hyst */
+0x051EB82AL, /* VBATR_EXPECT (80.00) */
+0x03D70A20L, /* VBATH_EXPECT (60.00) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00014000L, /* PWRSAVE_DBI */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00312700L, /* VOV_BAT_PWRSAVE_MIN */
+0x00395800L, /* VOV_BAT_PWRSAVE_MIN_RNG */
+0x00800000L, /* THERM_DBI */
+0x00004000L, /* CPUMP_DBI */
+0x00F18900L, /* DCDC_VERR */
+0x00809D80L, /* DCDC_VERR_HYST */
+0x00000000L, /* DCDC_OITHRESH_LO */
+0x01C00000L, /* DCDC_OITHRESH_HI */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00500000L, /* DCDC_UVHYST */
+0x00000000L, /* DCDC_UVTHRESH */
+0x00500000L, /* DCDC_OVTHRESH */
+0x00800000L, /* DCDC_OITHRESH */
+0x00000000L, /* DCDC_SWDRV_POL */
+0x00000000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_VREF_MAN */
+0x00000000L, /* DCDC_VREF_CTRL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x05B00000L, /* DCDC_ANA_VREF */
+0x00300000L, /* DCDC_ANA_GAIN */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00F00000L, /* DCDC_ANA_DSHIFT */
+0x0FDA4000L, /* DCDC_ANA_LPOLY */
+0x00000000L, /* DCDC_AUX_INVERT */
+0x00400000L, /* DCDC_CPUMP_LP */
+0x00000000L, /* DCDC_CPUMP_PULLDOWN */
+0x00000000L, /* DCDC_LIFT_EN */
+0x07FEB800L, /* COEF_P_HVIC */
+0x005B05B2L, /* P_TH_HVIC */
+VDC_4P5_16P0, /* VDC_RANGE_OPT */
+0x3F, /* AUTO */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN2 */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x10, /* ENHANCE */
+0x03A2E8BAL, /* SCALE_KAUDIO */
+0x04, /* ZCAL_EN */
+0x03000000L, /* LKG_OFHK_OFFSET */
+0x05000000L, /* LKG_LB_OFFSET */
+0x01000000L, /* VBATH_DELTA */
+0x03700000L, /* UVTHRESH_MAX */
+0x04B80200L, /* UVTHRESH_SCALE */
+0x00823000L /* UVTHRESH_BIAS */
+},
+{ /* SI3226X_GEN_PARAM_CUK */
+0x65, /* DEVICE_KEY */
+BO_DCDC_CUK, /* BOM_OPT */
+BO_DCDC_TRACKING, /* BAT_RAIL_TYPE */
+0x000AD000L, /* bat_hyst */
+0x0851EB45L, /* VBATR_EXPECT (130.00) */
+0x03D70A20L, /* VBATH_EXPECT (60.00) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00014000L, /* PWRSAVE_DBI */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00312700L, /* VOV_BAT_PWRSAVE_MIN */
+0x00395800L, /* VOV_BAT_PWRSAVE_MIN_RNG */
+0x00800000L, /* THERM_DBI */
+0x00004000L, /* CPUMP_DBI */
+0x00F18900L, /* DCDC_VERR */
+0x00809D80L, /* DCDC_VERR_HYST */
+0x01200000L, /* DCDC_OITHRESH_LO */
+0x02100000L, /* DCDC_OITHRESH_HI */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00500000L, /* DCDC_UVHYST */
+0x00000000L, /* DCDC_UVTHRESH */
+0x01400000L, /* DCDC_OVTHRESH */
+0x00800000L, /* DCDC_OITHRESH */
+0x00000000L, /* DCDC_SWDRV_POL */
+0x00000000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_VREF_MAN */
+0x00000000L, /* DCDC_VREF_CTRL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x05B00000L, /* DCDC_ANA_VREF */
+0x00300000L, /* DCDC_ANA_GAIN */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x00FFC000L, /* DCDC_ANA_TONMAX */
+0x00F00000L, /* DCDC_ANA_DSHIFT */
+0x0FDA4000L, /* DCDC_ANA_LPOLY */
+0x00000000L, /* DCDC_AUX_INVERT */
+0x00400000L, /* DCDC_CPUMP_LP */
+0x00000000L, /* DCDC_CPUMP_PULLDOWN */
+0x00000000L, /* DCDC_LIFT_EN */
+0x07FEB800L, /* COEF_P_HVIC */
+0x005B05B2L, /* P_TH_HVIC */
+VDC_27P0_42P0, /* VDC_RANGE_OPT */
+0x3F, /* AUTO */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN2 */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x10, /* ENHANCE */
+0x03A2E8BAL, /* SCALE_KAUDIO */
+0x04, /* ZCAL_EN */
+0x03000000L, /* LKG_OFHK_OFFSET */
+0x05000000L, /* LKG_LB_OFFSET */
+0x01000000L, /* VBATH_DELTA */
+0x03700000L, /* UVTHRESH_MAX */
+0x04B80200L, /* UVTHRESH_SCALE */
+0x00823000L /* UVTHRESH_BIAS */
+},
+{ /* SI3226X_GEN_PARAM_PMOS_BUCK_BOOST_VDC_4P5_16P0 */
+0x65, /* DEVICE_KEY */
+BO_DCDC_PMOS_BUCK_BOOST, /* BOM_OPT */
+BO_DCDC_TRACKING, /* BAT_RAIL_TYPE */
+0x000AD000L, /* bat_hyst */
+0x070A3D3AL, /* VBATR_EXPECT (110.00) */
+0x03D70A20L, /* VBATH_EXPECT (60.00) */
+0x0FFF0000L, /* PWRSAVE_TIMER */
+0x01999A00L, /* OFFHOOK_THRESH */
+0x00F00000L, /* VBAT_TRACK_MIN */
+0x00F00000L, /* VBAT_TRACK_MIN_RNG */
+0x00014000L, /* PWRSAVE_DBI */
+0x0ADD5500L, /* DCDC_ANA_SCALE */
+0x00312700L, /* VOV_BAT_PWRSAVE_MIN */
+0x00395800L, /* VOV_BAT_PWRSAVE_MIN_RNG */
+0x00800000L, /* THERM_DBI */
+0x00004000L, /* CPUMP_DBI */
+0x00F18900L, /* DCDC_VERR */
+0x00809D80L, /* DCDC_VERR_HYST */
+0x00000000L, /* DCDC_OITHRESH_LO */
+0x00D00000L, /* DCDC_OITHRESH_HI */
+0x00400000L, /* PD_UVLO */
+0x00400000L, /* PD_OVLO */
+0x00200000L, /* PD_OCLO */
+0x00400000L, /* PD_SWDRV */
+0x00500000L, /* DCDC_UVHYST */
+0x00000000L, /* DCDC_UVTHRESH */
+0x00D00000L, /* DCDC_OVTHRESH */
+0x00800000L, /* DCDC_OITHRESH */
+0x00000000L, /* DCDC_SWDRV_POL */
+0x00000000L, /* DCDC_UVPOL */
+0x00000000L, /* DCDC_VREF_MAN */
+0x00000000L, /* DCDC_VREF_CTRL */
+0x00200000L, /* DCDC_RNGTYPE */
+0x05B00000L, /* DCDC_ANA_VREF */
+0x00300000L, /* DCDC_ANA_GAIN */
+0x00300000L, /* DCDC_ANA_TOFF */
+0x00100000L, /* DCDC_ANA_TONMIN */
+0x01F00000L, /* DCDC_ANA_TONMAX */
+0x00F00000L, /* DCDC_ANA_DSHIFT */
+0x0FDA4000L, /* DCDC_ANA_LPOLY */
+0x00000000L, /* DCDC_AUX_INVERT */
+0x00400000L, /* DCDC_CPUMP_LP */
+0x00000000L, /* DCDC_CPUMP_PULLDOWN */
+0x00000000L, /* DCDC_LIFT_EN */
+0x07FEB800L, /* COEF_P_HVIC */
+0x005B05B2L, /* P_TH_HVIC */
+VDC_4P5_16P0, /* VDC_RANGE_OPT */
+0x3F, /* AUTO */
+0x00, /* IRQEN1 */
+0x00, /* IRQEN2 */
+0x03, /* IRQEN3 */
+0x00, /* IRQEN4 */
+0x20, /* ENHANCE */
+0x03A2E8BAL, /* SCALE_KAUDIO */
+0x04, /* ZCAL_EN */
+0x03000000L, /* LKG_OFHK_OFFSET */
+0x05000000L, /* LKG_LB_OFFSET */
+0x01000000L, /* VBATH_DELTA */
+0x03700000L, /* UVTHRESH_MAX */
+0x04B80200L, /* UVTHRESH_SCALE */
+0x00823000L /* UVTHRESH_BIAS */
+}
+};
+#endif
+
+Si3226x_GPIO_Cfg Si3226x_GPIO_Configuration = {
+0x00, /* GPIO_OE */
+0x06, /* GPIO_ANA */
+0x00, /* GPIO_DIR */
+0x00, /* GPIO_MAN */
+0x00, /* GPIO_POL */
+0x00, /* GPIO_OD */
+0x00 /* BATSELMAP */
+};
+
+Si3226x_CI_Cfg Si3226x_CI_Presets [] = {
+{0}
+};
+
+Si3226x_audioGain_Cfg Si3226x_audioGain_Presets [] = {
+{0x1377080L,0, 0x0L, 0x0L, 0x0L, 0x0L},
+{0x80C3180L,0, 0x0L, 0x0L, 0x0L, 0x0L}
+};
+
+#if defined (SILAB_SUPPORT_BUCKBOOST)
+Si3226x_Ring_Cfg Si3226x_Ring_Presets[] ={
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 5, Rcpe = 600 ohms
+ Rprot = 30 ohms, Type = BALANCED, Waveform = SINE
+*/
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x001BD000L, /* RINGAMP (40.000 vrms) 57Vpk */ /* 0x001AE2A4L,RINGAMP (35.000 vrms)test 38.5vrms */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x0097397BL, /* IRING_LIM (65.000 mA) */
+0x005E0000L, /* RTACTH (45.210 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x045494D2L, /* VBATR_EXPECT (67.662 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x022A4A69L, /* VCM_RING (30.831 v) */
+0x022A4A69L, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_40VRMS_0VDC_BAL */
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x001F2000L, /* RINGAMP (45.000 vrms) 64Vpk */ /* 0x002198F8L,RINGAMP (45.000 vrms)test 48.5vrms */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x0097397BL, /* IRING_LIM (65.000 mA) */
+0x006E0000L, /* RTACTH (56.498 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x053843FDL, /* VBATR_EXPECT (81.559 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x029C21FEL, /* VCM_RING (37.780 v) */
+0x029C21FEL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_45VRMS_0VDC_BAL */
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x00229000L, /* RINGAMP (50.000 vrms) 71Vpk */ /* 0x0022911CL,RINGAMP (45.000 vrms)test 50vrms */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x0097397BL, /* IRING_LIM (65.000 mA) */
+0x007E0000L, /* RTACTH (58.128 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x0559252AL, /* VBATR_EXPECT (83.566 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x02AC9295L, /* VCM_RING (38.783 v) */
+0x02AC9295L, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_50VRMS_0VDC_BAL */
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x00261000L, /* RINGAMP (55.000 vrms) 78Vpk */ /*0x00266858L, RINGAMP (50.000 vrms)test 55vrms */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x00A2DB71L, /* IRING_LIM (70.000 mA) */
+0x007E0000L, /* RTACTH (64.586 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x05DB6D55L, /* VBATR_EXPECT (91.518 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x02EDB6AAL, /* VCM_RING (42.759 v) */
+0x02EDB6AAL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_55VRMS_0VDC_BAL */
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x00298000L, /* RINGAMP (60.000 vrms) 85Vpk */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x00A2DB71L, /* IRING_LIM (70.000 mA) */
+0x007F0000L, /* RTACTH (64.586 mA) */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00C49BA0L, /* VOV_RING_BAT (12.000 v) */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x06147AB2L, /* VBATR_EXPECT (95 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x02EDB6AAL, /* VCM_RING (42.759 v) */
+0x02EDB6AAL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_60VRMS_0VDC_BAL */
+};
+#elif defined (SILAB_SUPPORT_LCQC)
+Si3226x_Ring_Cfg Si3226x_Ring_Presets[] ={
+/*
+ Loop = 500.0 ft @ 0.044 ohms/ft, REN = 5, Rcpe = 600 ohms
+ Rprot = 30 ohms, Type = BALANCED, Waveform = SINE
+*/
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x001BD000L, /* RINGAMP (40.000 vrms) 57Vpk */ /* 0x001AE2A4L,RINGAMP (35.000 vrms)test 38.5vrms */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x0072B158L, /* 0x0097397BL IRING_LIM (65.000 mA) to 0x0072B158L 49.3mA */
+0x004470B0L, /* 0x005E0000L RTACTH (45.210 mA) to 0x004470B0L 47.2 */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00000000L, /* 0x00C49BA0L VOV_RING_BAT (12.000 v) to 0v */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x045494D2L, /* VBATR_EXPECT (67.662 v) */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x022A4A69L, /* VCM_RING (30.831 v) */
+0x022A4A69L, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_40VRMS_0VDC_BAL */
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x001F2000L, /* RINGAMP (45.000 vrms) 64Vpk */ /* 0x002198F8L,RINGAMP (45.000 vrms)test 48.5vrms */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x0072B158L, /* 0x0097397BL IRING_LIM (65.000 mA) to 0x0072B158L 49.3mA */
+0x004470B0L, /* 0x006E0000L RTACTH (56.498 mA) to 0x004470B0L 47.2 */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00000000L, /* 0x00C49BA0L VOV_RING_BAT (12.000 v) to 0x00000000L 0v */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x0494F990L, /* 0x053843FDL VBATR_EXPECT (81.559 v) to 0x0494F990L 71.5v */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x029C21FEL, /* VCM_RING (37.780 v) */
+0x029C21FEL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_45VRMS_0VDC_BAL */
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x00229000L, /* RINGAMP (50.000 vrms) 71Vpk */ /* 0x0022911CL,RINGAMP (45.000 vrms)test 50vrms */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x007F6FB7L, /* 0x0097397BL IRING_LIM (65.000 mA) to 0x007F6FB7L 54.8mA */
+0x004C0B6EL, /* 0x007E0000L RTACTH (58.128 mA) to 0x004C0B6EL 52.5mA */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00000000L, /* 0x00C49BA0L VOV_RING_BAT (12.000 v) to 0x00000000L 0v */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x0508D3C1L, /* 0x0559252AL VBATR_EXPECT (83.566 v) to 0x0508D3C1L 78.6v */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x02AC9295L, /* VCM_RING (38.783 v) */
+0x02AC9295L, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_50VRMS_0VDC_BAL */
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x00261000L, /* RINGAMP (55.000 vrms) 78Vpk */ /*0x00266858L, RINGAMP (50.000 vrms)test 55vrms */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x00726B40L, /* 0x00A2DB71L IRING_LIM (70.000 mA) to 0x00726B40L 49.2mA */
+0x004446DCL, /* 0x007E0000L RTACTH (64.586 mA) to 0x004446DCL 47.2mA */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00000000L, /* 0x00C49BA0L VOV_RING_BAT (12.000 v) to 0x00000000L 0v */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x057A6023L, /* 0x05DB6D55L VBATR_EXPECT (91.518 v) to 0x057A6023L 85.6v */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x02EDB6AAL, /* VCM_RING (42.759 v) */
+0x02EDB6AAL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_55VRMS_0VDC_BAL */
+{
+0x00040000L, /* RTPER */
+0x07E6C000L, /* RINGFR (25.000 Hz) */
+0x00298000L, /* RINGAMP (60.000 vrms) 85Vpk */
+0x00000000L, /* RINGPHAS */
+0x00000000L, /* RINGOF (0.000 vdc) */
+0x15E5200EL, /* SLOPE_RING (100.000 ohms) */
+0x007CD217L, /* 0x00A2DB71L IRING_LIM (70.000 mA) to 0x007CD217L 53.7mA */
+0x004A7BD9L, /* 0x007F0000L RTACTH (64.586 mA) to 0x004A7BD9L 51.4mA */
+0x0FFFFFFFL, /* RTDCTH (450.000 mA) */
+0x00004000L, /* RTACDB (40.000 ms) */
+0x00008000L, /* RTDCDB (75.000 ms) */
+0x00000000L, /* 0x00C49BA0L VOV_RING_BAT (12.000 v) to 0x00000000L 0v */
+0x00000000L, /* VOV_RING_GND (0.000 v) */
+0x05F08825L, /* 0x06147AB2L VBATR_EXPECT (95 v) to 0x05F08825L 93v */
+0x80, /* RINGTALO (2.000 s) */
+0x3E, /* RINGTAHI */
+0x00, /* RINGTILO (4.000 s) */
+0x7D, /* RINGTIHI */
+0x00000000L, /* ADAP_RING_MIN_I */
+0x00003000L, /* COUNTER_IRING_VAL */
+0x00066666L, /* COUNTER_VTR_VAL */
+0x00000000L, /* CONST_028 */
+0x00000000L, /* CONST_032 */
+0x00000000L, /* CONST_038 */
+0x00000000L, /* CONST_046 */
+0x00000000L, /* RRD_DELAY */
+0x00000000L, /* RRD_DELAY2 */
+0x01893740L, /* DCDC_VREF_MIN_RNG */
+0x40, /* RINGCON */
+0x00, /* USERSTAT */
+0x02EDB6AAL, /* VCM_RING (42.759 v) */
+0x02EDB6AAL, /* VCM_RING_FIXED */
+0x003126E8L, /* DELTA_VCM */
+0x00200000L, /* DCDC_RNGTYPE */
+}, /* RING_F25_60VRMS_0VDC_BAL */
+};
+#endif
+
+Si3226x_DCfeed_Cfg Si3226x_DCfeed_Presets[] = {
+{
+0x1C8A024CL, /* SLOPE_VLIM */
+0x1F909679L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1D5B21A9L, /* SLOPE_DELTA1 */
+0x1DD87A3EL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x00B4F3C3L, /* CONST_RFEED (15.000 mA) */
+0x005D0FA6L, /* CONST_ILIM (20.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_48V_20MA */
+{
+0x1C8A024CL, /* SLOPE_VLIM */
+0x1F03C159L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1CC4B75DL, /* SLOPE_DELTA1 */
+0x1DD87A3EL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x010DE095L, /* CONST_RFEED (15.000 mA) */
+0x006FAC61L, /* CONST_ILIM (24.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_48V_24MA */
+{
+0x1C8A024CL, /* SLOPE_VLIM */
+0x1E76EC3AL, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1BD85977L, /* SLOPE_DELTA1 */
+0x1DD87A3EL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x0166CD67L, /* CONST_RFEED (15.000 mA) */
+0x0082491BL, /* CONST_ILIM (28.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_48V_28MA */
+{
+0x1C8A024CL, /* SLOPE_VLIM */
+0x1DEA171BL, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1A2EE3A7L, /* SLOPE_DELTA1 */
+0x1DD87A3EL, /* SLOPE_DELTA2 */
+0x05A38633L, /* V_VLIM (48.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x01BFBA39L, /* CONST_RFEED (15.000 mA) */
+0x0094E5D6L, /* CONST_ILIM (32.000 mA) */
+0x002D8D96L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_48V_32MA */
+{
+0x1E3081AAL, /* SLOPE_VLIM */
+0x1F909679L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1A2EE3A7L, /* SLOPE_DELTA1 */
+0x1C1F426FL, /* SLOPE_DELTA2 */
+0x061BD162L, /* V_VLIM (52.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x00B4F3C3L, /* CONST_RFEED (15.000 mA) */
+0x005D0FA6L, /* CONST_ILIM (20.000 mA) */
+0x00315962L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_52V_20MA */
+{
+0x1E3081AAL, /* SLOPE_VLIM */
+0x1F03C159L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0xF64E2617L, /* SLOPE_DELTA1 */
+0x1C1F426FL, /* SLOPE_DELTA2 */
+0x061BD162L, /* V_VLIM (52.000 v) */
+0x050D2839L, /* V_RFEED (43.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x010DE095L, /* CONST_RFEED (15.000 mA) */
+0x006FAC61L, /* CONST_ILIM (24.000 mA) */
+0x00315962L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_52V_24MA */
+{
+0x1D28720FL, /* SLOPE_VLIM */
+0x1EE95963L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1B7011ECL, /* SLOPE_DELTA1 */
+0x1D6A2C4AL, /* SLOPE_DELTA2 */
+0x061BD162L, /* V_VLIM (52.000 v) */
+0x0567609CL, /* V_RFEED (46.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x012DAC54L, /* CONST_RFEED (15.000 mA) */
+0x0082491BL, /* CONST_ILIM (28.000 mA) */
+0x00315962L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_52V_28MA */
+{
+0x1B9C5AA7L, /* SLOPE_VLIM */
+0x1EBFDA98L, /* SLOPE_RFEED */
+0x0040A0E0L, /* SLOPE_ILIM */
+0x1D737E98L, /* SLOPE_DELTA1 */
+0x1E46C831L, /* SLOPE_DELTA2 */
+0x061BD162L, /* V_VLIM (52.000 v) */
+0x05A38633L, /* V_RFEED (48.000 v) */
+0x03FE7F0FL, /* V_ILIM (34.000 v) */
+0x015500A8L, /* CONST_RFEED (15.000 mA) */
+0x0094E5D6L, /* CONST_ILIM (32.000 mA) */
+0x00315962L, /* I_VLIM (0.000 mA) */
+0x005B0AFBL, /* LCRONHK (10.000 mA) */
+0x006D4060L, /* LCROFFHK (12.000 mA) */
+0x00008000L, /* LCRDBI (5.000 ms) */
+0x0048D595L, /* LONGHITH (8.000 mA) */
+0x003FBAE2L, /* LONGLOTH (7.000 mA) */
+0x00008000L, /* LONGDBI (5.000 ms) */
+0x000F0000L, /* LCRMASK (150.000 ms) */
+0x00080000L, /* LCRMASK_POLREV (80.000 ms) */
+0x00140000L, /* LCRMASK_STATE (200.000 ms) */
+0x00140000L, /* LCRMASK_LINECAP (200.000 ms) */
+0x01BA5E35L, /* VCM_OH (27.000 v) */
+0x0051EB85L, /* VOV_BAT (5.000 v) */
+0x00418937L, /* VOV_GND (4.000 v) */
+}, /* DCFEED_52V_32MA */
+};
+
+Si3226x_Impedance_Cfg Si3226x_Impedance_Presets[] ={
+/* parameters: zref=200_680_100 rprot=20 rfuse=0 emi_cap=10*/
+{
+{0x0721FD00L, 0x1FD2AA80L, 0x00027E80L, 0x1FFD4300L, /* TXACEQ */
+ 0x09B7CF80L, 0x1D33A080L, 0x006DD680L, 0x1FE08A00L}, /* RXACEQ */
+{0x1FF93B80L, 0x00365F80L, 0x00DDBA00L, 0x0129A800L, /* ECFIR/ECIIR */
+ 0x0311AA80L, 0x1E718200L, 0x02D3AB80L, 0x1E303E80L,
+ 0x01181C00L, 0x1EE22300L, 0x051CA700L, 0x02C7AE00L},
+{0x01484900L, 0x1C91C280L, 0x0225C700L, 0x0A131400L, /* ZSYNTH */
+ 0x1DEA8F80L, 0x8B},
+ 0x08000000L, /* TXACGAIN */
+ 0x010ABA80L, /* RXACGAIN */
+ 0x07BA3000L, 0x1845D080L, 0x07745F80L, /* RXACHPF */
+ 0, 0 /* TXGAIN, RXGAIN */
+ }, /*ZSYN_200_680_NOPTC*/
+/* parameters: zref=200_680_100 rprot=30 rfuse=100 emi_cap=10 */
+{
+{0x085D0E80L, 0x1F748400L, 0x0004AD80L, 0x1FF9AA80L, /* TXACEQ */
+ 0x09FCA680L, 0x1CB9A780L, 0x008BB680L, 0x1FD9FD00L}, /* RXACEQ */
+{0x00056600L, 0x1FF5FB00L, 0x01879280L, 0x000A7200L, /* ECFIR/ECIIR */
+ 0x0420E200L, 0x1DEC9600L, 0x02994D80L, 0x1EEF9600L,
+ 0x006D8E00L, 0x1F8EF300L, 0x07F34E80L, 0x1FF84B80L},
+{0x00A95300L, 0x1D43E580L, 0x0212AD00L, 0x0A159100L, /* ZSYNTH */
+ 0x1DE99980L, 0xC0},
+ 0x08012B00L, /* TXACGAIN */
+ 0x01307B80L, /* RXACGAIN */
+ 0x07B9A700L, 0x18465980L, 0x07734E80L, /* RXACHPF */
+ 0, 0 /* TXGAIN, RXGAIN */
+}, /* ZSYN_200_680_HAVEPTC */
+/* parameters: zref=600_0_0 rprot=20 rfuse=0 emi_cap=10*/
+{
+{0x07F97D80L, 0x0006CC00L, 0x1FFC1480L, 0x1FFC7B80L, /* TXACEQ */
+ 0x07F36B80L, 0x000A8E00L, 0x1FF90F00L, 0x1FFAE500L}, /* RXACEQ */
+{0x001AF400L, 0x1FC86A80L, 0x01E9AE00L, 0x00652F00L, /* ECFIR/ECIIR */
+ 0x01F4AF00L, 0x1F57E000L, 0x00485E00L, 0x1FF3A680L,
+ 0x1FF83700L, 0x00011D00L, 0x01706980L, 0x066A8480L},
+{0x00920F00L, 0x1EE31980L, 0x008ADF00L, 0x0F92E500L, /* ZSYNTH */
+ 0x186CE880L, 0x53},
+ 0x085C6880L, /* TXACGAIN */
+ 0x013E3100L, /* RXACGAIN */
+ 0x07AF6F80L, 0x18509100L, 0x075EDF00L, /* RXACHPF */
+ 0, 0 /* TXGAIN, RXGAIN */
+ }, /* ZSYN_600_NOPTC */
+/* parameters: zref=600_0_0 rprot=30 rfuse=100 emi_cap=10*/
+{
+{0x07F53C00L, 0x000DD800L, 0x00010900L, 0x1FFDB880L, /* TXACEQ */
+ 0x07EE0C80L, 0x0012CD80L, 0x1FFE5E80L, 0x1FFCBF00L}, /* RXACEQ */
+{0x001E4E80L, 0x1FB8F500L, 0x01F8E080L, 0x0024BB80L, /* ECFIR/ECIIR */
+ 0x021DEF00L, 0x1F249180L, 0x006C7580L, 0x1FD9A500L,
+ 0x0008B200L, 0x1FF2A680L, 0x02577380L, 0x0558D480L},
+{0x007F8C00L, 0x1F01CE80L, 0x007EA600L, 0x0FF66D00L, /* ZSYNTH */
+ 0x18099280L, 0x75},
+ 0x0A5DB400L, /* TXACGAIN */
+ 0x018AC480L, /* RXACGAIN */
+ 0x07B49980L, 0x184B6700L, 0x07693380L, /* RXACHPF */
+ 0, 0 /* TXGAIN, RXGAIN */
+ } /* ZSYN_600_HAVEPTC */
+};
+
+Si3226x_FSK_Cfg Si3226x_FSK_Presets[] ={
+{
+0x02232000L, /* FSK01 */
+0x077C2000L, /* FSK10 */
+0x003C0000L, /* FSKAMP0 (0.220 vrms )*/
+0x00200000L, /* FSKAMP1 (0.220 vrms) */
+0x06B60000L, /* FSKFREQ0 (2200.0 Hz space) */
+0x079C0000L, /* FSKFREQ1 (1200.0 Hz mark) */
+0x00, /* FSK8 */
+0x00, /* FSKDEPTH (1 deep fifo) */
+} /* DEFAULT_FSK */
+};
+
+Si3226x_PulseMeter_Cfg Si3226x_PulseMeter_Presets[] ={
+{
+0x007A2B6AL, /* PM_AMP_THRESH (1.000) */
+0, /* Freq (12kHz) */
+0, /* PM_AUTO (off)*/
+0x07D00000L, /* PM_active (2000 ms) */
+0x07D00000L /* PM_inactive (2000 ms) */
+} /* DEFAULT_PULSE_METERING */
+};
+
+Si3226x_Tone_Cfg Si3226x_Tone_Presets[] = {
+{
+{
+ 0x07810000L, /* OSC1FREQ (450.000 Hz) */
+ 0x00100000L, /* OSC1AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC1PHAS (0.000 rad) */
+ 0x00, /* O1TALO (0 ms) */
+ 0x00, /* O1TAHI */
+ 0x00, /* O1TILO (0 ms) */
+ 0x00 /* O1TIHI */
+ },
+ {
+ 0x07B30000L, /* OSC2FREQ (350.000 Hz) */
+ 0x000C6000L, /* OSC2AMP (-18.000 dBm) */
+ 0x00000000L, /* OSC2PHAS (0.000 rad) */
+ 0x00, /* O2TALO (0 ms) */
+ 0x00, /* O2TAHI */
+ 0x00, /* O2TILO (0 ms) */
+ 0x00 /* O2TIHI */
+ },
+ 0x66 /* OMODE */
+}, /* TONEGEN_450_N18DB_350_N18DB */
+};
+
+Si3226x_PCM_Cfg Si3226x_PCM_Presets[] ={
+ {
+ 0x01, /* PCM_FMT - u-Law */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT EVEN */
+ }, /* PCM_8ULAW */
+ {
+ 0x00, /* PCM_FMT - A-Law */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x01 /* A-LAW - INVERT EVEN */
+ }, /* PCM_8ALAW */
+ {
+ 0x03, /* PCM_FMT - 16-bit Linear */
+ 0x00, /* WIDEBAND - DISABLED (3.4kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT EVEN */
+ }, /* PCM_16LIN */
+ {
+ 0x03, /* PCM_FMT - 16-bit Linear */
+ 0x01, /* WIDEBAND - ENABLED (7kHz BW) */
+ 0x00, /* PCM_TRI - PCLK RISING EDGE */
+ 0x00, /* TX_EDGE - PCLK RISING EDGE */
+ 0x00 /* A-LAW - INVERT EVEN */
+ } /* PCM_16LIN_WB */
+};
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_intf.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_intf.c
new file mode 100644
index 0000000..2ce636c
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_intf.c
@@ -0,0 +1,5261 @@
+/*
+** Copyright (c) 2007-2012 by Silicon Laboratories
+**
+** $Id: si3226x_intf.c 4461 2014-07-16 15:39:20Z nizajerk $
+**
+** SI3226X_Intf.c
+** SI3226X ProSLIC interface implementation file
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the implementation file for the main ProSLIC API and is used
+** in the ProSLIC demonstration code.
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#include "si3226x_intf.h"
+#include "si3226x.h"
+#include "si3226x_registers.h"
+#include "proslic_api_config.h"
+
+#define PRAM_ADDR (334 + 0x400)
+#define PRAM_DATA (335 + 0x400)
+
+#define WriteReg pProslic->deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadReg pProslic->deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHW pProslic->deviceId->ctrlInterface->hCtrl
+#define Reset pProslic->deviceId->ctrlInterface->Reset_fptr
+#define Delay pProslic->deviceId->ctrlInterface->Delay_fptr
+#define pProTimer pProslic->deviceId->ctrlInterface->hTimer
+#define WriteRAM pProslic->deviceId->ctrlInterface->WriteRAM_fptr
+#define ReadRAM pProslic->deviceId->ctrlInterface->ReadRAM_fptr
+#define TimeElapsed pProslic->deviceId->ctrlInterface->timeElapsed_fptr
+#define getTime pProslic->deviceId->ctrlInterface->getTime_fptr
+#define SetSemaphore pProslic->deviceId->ctrlInterface->Semaphore_fptr
+
+#define WriteRegX deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadRegX deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHWX deviceId->ctrlInterface->hCtrl
+#define DelayX deviceId->ctrlInterface->Delay_fptr
+#define pProTimerX deviceId->ctrlInterface->hTimer
+#define WriteRAMX deviceId->ctrlInterface->WriteRAM_fptr
+#define ReadRAMX deviceId->ctrlInterface->ReadRAM_fptr
+#define getTimeX deviceId->ctrlInterface->getTime_fptr
+#define TimeElapsedX deviceId->ctrlInterface->timeElapsed_fptr
+
+#define BROADCAST 0xff
+
+#ifdef ENABLE_DEBUG
+static const char LOGPRINT_PREFIX[] = "Si3226x: ";
+#endif
+
+/*
+** Define patch parameters that can be modified by API
+*/
+#define SI3226X_PRAM_VBATH_NEON 799
+#define SI3226X_PRAM_LCRMASK_MWI 786
+
+
+/*
+** Parameter Limits
+*/
+#define QSS_IRING_LIM_MAX 0x8B9786L /* 60mA */
+/*
+** Externs
+*/
+
+/* General Configuration */
+extern Si3226x_General_Cfg Si3226x_General_Configuration;
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+extern const proslicPatch SI3226X_PATCH_C_FLBK;
+extern const proslicPatch SI3226X_PATCH_C_QCUK;
+extern const proslicPatch SI3226X_PATCH_C_LCQCUK;
+extern const proslicPatch SI3226X_PATCH_C_CUK;
+extern const proslicPatch SI3226X_PATCH_C_TSS;
+extern const proslicPatch SI3226X_PATCH_C_TSS_ISO;
+extern const proslicPatch SI3226X_PATCH_C_PBB;
+extern const proslicPatch SI3226X_PATCH_C_QSS;
+extern const proslicPatch SI3226X_PATCH_C_BB;
+extern Si3226x_General_Cfg Si3226x_General_Configuration_MultiBOM[];
+extern int si3226x_genconf_multi_max_preset;
+#else
+extern const proslicPatch SI3226X_PATCH_C_DEFAULT;
+#endif
+
+/* Ringing */
+#ifndef DISABLE_RING_SETUP
+extern Si3226x_Ring_Cfg Si3226x_Ring_Presets[];
+#endif
+
+/* Tone Generation */
+#ifndef DISABLE_TONE_SETUP
+extern Si3226x_Tone_Cfg Si3226x_Tone_Presets[];
+#endif
+
+/* FSK */
+#ifndef DISABLE_FSK_SETUP
+extern Si3226x_FSK_Cfg Si3226x_FSK_Presets[];
+#endif
+
+/* DTMF */
+#ifndef DISABLE_DTMF_SETUP
+extern Si3226x_DTMFDec_Cfg Si3226x_DTMFDec_Presets[];
+#endif
+
+/* Zsynth */
+#ifndef DISABLE_ZSYNTH_SETUP
+extern Si3226x_Impedance_Cfg Si3226x_Impedance_Presets [];
+#endif
+
+/* CI/GCI */
+#ifndef DISABLE_CI_SETUP
+extern Si3226x_CI_Cfg Si3226x_CI_Presets [];
+#endif
+
+/* Audio Gain Scratch */
+extern Si3226x_audioGain_Cfg Si3226x_audioGain_Presets[];
+
+/* DC Feed */
+#ifndef DISABLE_DCFEED_SETUP
+extern Si3226x_DCfeed_Cfg Si3226x_DCfeed_Presets[];
+#endif
+
+/* GPIO */
+#ifndef DISABLE_GPIO_SETUP
+extern Si3226x_GPIO_Cfg Si3226x_GPIO_Configuration ;
+#endif
+
+/* Pulse Metering */
+#ifndef DISABLE_PULSE_SETUP
+extern Si3226x_PulseMeter_Cfg Si3226x_PulseMeter_Presets [];
+#endif
+
+/* PCM */
+#ifndef DISABLE_PCM_SETUP
+extern Si3226x_PCM_Cfg Si3226x_PCM_Presets [];
+#endif
+
+
+
+/*
+** Local functions are defined first
+*/
+
+/*
+** Function: getChipType
+**
+** Description:
+** Decode ID register to identify chip type
+**
+** Input Parameters:
+** ID register value
+**
+** Return:
+** partNumberType
+*/
+static partNumberType getChipType(uInt8 lsbs, uInt8 msb){
+ uInt8 part_num;
+ lsbs &= 0x38; /* PART_NUM[2:0] = ID[5:3] */
+ lsbs >>= 3;
+ msb &= 0x80; /* PART_NUM[3] = ENHANCE[7] */
+ msb >>= 4;
+ part_num = msb | lsbs;
+
+ /* Need to identify specific, supported part numbers */
+ if(part_num == 0x00) return(SI32260);
+ if(part_num == 0x04) return(SI32360);
+ if(part_num == 0x08) return(SI32266);
+ if(part_num == 0x0A) return(SI32268);
+
+ return (UNSUPPORTED_PART_NUM);
+}
+
+/*
+** Function: setUserMode
+**
+** Description:
+** Puts ProSLIC into user mode or out of user mode
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** on: specifies whether user mode should be turned on (TRUE) or off (FALSE)
+**
+** Return:
+** none
+*/
+static int setUserMode (proslicChanType *pProslic,BOOLEAN on){
+ uInt8 data;
+
+ /* Workaround for non-mutexed applications */
+ if(on == FALSE)
+ return 0;
+ /* End workaround */
+
+ if (SetSemaphore != NULL){
+ while (!(SetSemaphore (pProHW,1)));
+ if (on == TRUE){
+ if (pProslic->deviceId->usermodeStatus<2)
+ pProslic->deviceId->usermodeStatus++;
+ } else {
+ if (pProslic->deviceId->usermodeStatus>0)
+ pProslic->deviceId->usermodeStatus--;
+ if (pProslic->deviceId->usermodeStatus != 0)
+ return -1;
+ }
+ }
+ data = ReadReg(pProHW,pProslic->channel,USERMODE_ENABLE);
+ if (((data&1) != 0) == on)
+ return 0;
+ WriteReg(pProHW,pProslic->channel,USERMODE_ENABLE,2);
+ WriteReg(pProHW,pProslic->channel,USERMODE_ENABLE,8);
+ WriteReg(pProHW,pProslic->channel,USERMODE_ENABLE,0xe);
+ WriteReg(pProHW,pProslic->channel,USERMODE_ENABLE,0);
+ if (SetSemaphore != NULL)
+ SetSemaphore(pProHW,0);
+ return 0;
+}
+
+
+/*
+** Function: setUserModeBroadcast
+**
+** Description:
+** Puts ProSLIC into user mode or out of user mode
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object
+** on: specifies whether user mode should be turned on (TRUE) or off (FALSE)
+**
+** Return:
+** none
+*/
+static int setUserModeBroadcast (proslicChanType *pProslic,BOOLEAN on){
+ uInt8 data;
+ if (SetSemaphore != NULL){
+ while (!(SetSemaphore (pProHW,1)));
+ if (on == TRUE){
+ if (pProslic->deviceId->usermodeStatus<2)
+ pProslic->deviceId->usermodeStatus++;
+ } else {
+ if (pProslic->deviceId->usermodeStatus>0)
+ pProslic->deviceId->usermodeStatus--;
+ if (pProslic->deviceId->usermodeStatus != 0)
+ return -1;
+ }
+ }
+ data = ReadReg(pProHW,pProslic->channel,USERMODE_ENABLE);/*we check first channel. we assume all channels same user mode state*/
+ if (((data&1) != 0) == on)
+ return 0;
+ WriteReg(pProHW,BROADCAST,USERMODE_ENABLE,2);
+ WriteReg(pProHW,BROADCAST,USERMODE_ENABLE,8);
+ WriteReg(pProHW,BROADCAST,USERMODE_ENABLE,0xe);
+ WriteReg(pProHW,BROADCAST,USERMODE_ENABLE,0);
+ if (SetSemaphore != NULL)
+ SetSemaphore(pProHW,0);
+ return 0;
+}
+
+
+/*
+** Function: isVerifiedProslic
+**
+** Description:
+** Determine if DAA or ProSLIC present
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+**
+** Return:
+** channelType
+*/
+static int identifyChannelType(proslicChanType *pProslic){
+uInt8 data;
+ /*
+ ** Register 13 (DAA) always has bits 0:1 set to 0 and bit 6 set to 1
+ ** Register 13 (PROSLIC) can have bits 0:1, and 4 set, while all others are undefined
+ ** Write 0x13 to Reg 13. The following return values are expected -
+ **
+ ** 0x00 or 0xFF : No device present
+ ** 0x4X : DAA
+ ** 0x13 : PROSLIC
+ */
+
+ WriteReg(pProHW,pProslic->channel,PCMTXHI,0x13);
+ data = ReadReg(pProHW,pProslic->channel,PCMTXHI); /* Active delay */
+ data = ReadReg(pProHW,pProslic->channel,PCMTXHI); /* Read again */
+ if( data == 0x13)
+ return PROSLIC;
+ else if (data == 0x40)
+ return DAA;
+ else
+ return UNKNOWN;
+}
+
+
+
+
+
+
+
+/*
+** Function: Si3226x_EnablePatch
+**
+** Description:
+** Enables patch
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+**
+** Returns:
+** 0
+*/
+static int Si3226x_EnablePatch (proslicChanType *pProslic){
+ setUserMode (pProslic,TRUE);
+ WriteReg (pProHW, pProslic->channel, JMPEN,1);
+ setUserMode (pProslic,FALSE);
+ return 0;
+}
+
+/*
+** Function: isReinitRequired
+**
+** Description:
+** Checks for improper ring exit
+**
+** Returns:
+** RC_NONE - Reinit not required
+** RC_REINIT_REQUIRED - Corrupted state machine - reinit required
+**
+*/
+static int isReinitRequired(proslicChanType *pProslic)
+{
+ uInt8 lf;
+ ramData rkdc_sum;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_IGNORE;
+ }
+
+ /* Check for improper ring exit which may cause dcfeed corruption */
+
+ lf = ReadReg(pProHW,pProslic->channel,LINEFEED);
+ setUserMode(pProslic,TRUE);
+ rkdc_sum = ReadRAM(pProHW,pProslic->channel,RDC_SUM);
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT("%sisReinitRequired : Linefeed = %d\n", LOGPRINT_PREFIX, (int)lf);
+ LOGPRINT("%sisReinitRequired : RDC_SUM = %d\n", LOGPRINT_PREFIX, (int)rkdc_sum);
+ }
+#endif
+ if((rkdc_sum & 0x400000)&&(!(lf & 0x44)))
+ {
+ return RC_REINIT_REQUIRED;
+ }
+ else
+ {
+ return RC_NONE;
+ }
+}
+
+
+
+/*
+** Function: Si3226x_PowerUpConverter
+**
+** Description:
+** Powers all DC/DC converters sequentially with delay to minimize
+** peak power draw on VDC.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3226x_PowerUpConverter(proslicChanType_ptr pProslic)
+{
+ errorCodeType error = RC_NONE;
+ int32 vbath,vbat;
+ uInt8 reg;
+ ramData data;
+ int timer = 0;
+
+ setUserMode(pProslic,TRUE);
+
+ /*
+ ** Check to see if already powered, return if so
+ */
+ data = ReadRAM(pProHW,pProslic->channel,PD_DCDC);
+ if(!(data & 0x100000))
+ {
+ setUserMode(pProslic,FALSE);
+ return error; /* Return if already powered up */
+ }
+
+ /*
+ ** Power up sequence
+ */
+ if(Si3226x_General_Configuration.batType == BO_DCDC_TRACKING)
+ {
+ /*
+ ** TRACKING CONVERTER SEQUENCE
+ **
+ ** - clear previous ov/uv lockout
+ ** - powerup charge pump
+ ** - delay
+ ** - powerup digital dc/dc w/ OV clamping and shutdown
+ ** - delay
+ ** - verify no short circuits by looking for vbath/2
+ ** - clear dcdc status
+ ** - switch to analog converter with OV clamping only (no shutdown)
+ ** - select analog dcdc and disable pwrsave
+ ** - delay
+ */
+
+ WriteRAM(pProHW,pProslic->channel,DCDC_OITHRESH,Si3226x_General_Configuration.dcdc_oithresh_lo);
+ WriteReg(pProHW,pProslic->channel,LINEFEED,LF_OPEN); /* Ensure open before powering converter */
+ reg = ReadReg(pProHW,pProslic->channel,ENHANCE); /* Read ENHANCE entry settings */
+ WriteReg(pProHW,pProslic->channel,ENHANCE,reg&0x07); /* Disable powersave during bringup */
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC,0x700000L); /* In case OV or UV previously occurred */
+ /* Interim support for higher voltage PBB that uses gate drive circuit */
+ if( Si3226x_General_Configuration.bomOpt == BO_DCDC_BUCK_BOOST )
+ {
+ //WriteRAM(pProHW,pProslic->channel,DCDC_CPUMP,0x0L);/* Turn off charge pump */
+ /*
+ ** RevC buck-boost designs are identical to RevB - no gate drive,
+ ** dcff enabled, non-inverting (charge pump off)
+ */
+ WriteRAM(pProHW, pProslic->channel,DCDC_DCFF_ENABLE,0x10000000L);
+ /*
+ Mnemonic DCDC_DCFF_ENABLE
+ RAM Address 1522 Reset Value 0x00000000 [Bit 28]=0
+ Type Memory-mapped register (R/W)
+ Bits 28
+ LSB N/A
+ Range N/A
+ Function DCFF Pin Enable.
+ Enables the DCFF pin when using the buck-boost dcdc converter configuration.
+ [Bit 28]=0 = disabled (flyback configuration)
+ [Bit 28]=1 = enabled (buck_boost configuration)
+ */
+ WriteRAM(pProHW, pProslic->channel,DCDC_CPUMP,0x0L);
+ /* RAM 1555 Reset Value 0x00000000 [Bit 20] = 0 (BJT) */
+ WriteRAM(pProHW, pProslic->channel,DCDC_SWDRV_POL,0x00000000);
+ /* RAM 1553 need to be set 0x00000000 Reset Value 0x00000000 [Bit 20]=0 (not inverted)*/
+ WriteRAM(pProHW, pProslic->channel,DCDC_LIFT_EN, 0x00100000L);
+ /* RAM 1635 = 00100000 [Bit 20]=1 Reset Value 0x00000000 [Bit 20]=0 # dcdc_lift_en 2013.11.25 Henry Huang */
+ }
+ else if((pProslic->dcdc_polarity_invert)&&(Si3226x_General_Configuration.bomOpt == BO_DCDC_PMOS_BUCK_BOOST))
+ {
+ WriteRAM(pProHW,pProslic->channel,DCDC_CPUMP,0x0L);/* Turn off charge pump */
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,DCDC_CPUMP,0x100000L);/* Turn on charge pump */
+ }
+ Delay(pProTimer,10);
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC,0x600000L);
+ Delay(pProTimer,50);
+ vbath = ReadRAM(pProHW,pProslic->channel,VBATH_EXPECT);
+ vbat = ReadRAM(pProHW,pProslic->channel,MADC_VBAT);
+ if(vbat & 0x10000000L)
+ vbat |= 0xF0000000L;
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sVBAT @ 50ms = %d.%d v\n",
+ LOGPRINT_PREFIX,
+ (int)((vbat/SCALE_V_MADC)/1000), (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ }
+#endif
+ if(vbat < (vbath / 2)) {
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC, 0x300000L); /* shutdown converter */
+ #ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sDCDC Short Circuit Failure %d - disabling channel\n",
+ LOGPRINT_PREFIX,
+ pProslic->channel);
+ }
+ #endif
+ setUserMode(pProslic,FALSE);
+ return error;
+ }
+ else { /* Enable analog converter */
+ WriteRAM(pProHW,pProslic->channel,DCDC_STATUS,0L);
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC,0x400000L);
+ WriteReg(pProHW,pProslic->channel,ENHANCE,reg); /* restore ENHANCE setting */
+ Delay(pProTimer,50);
+ }
+
+ /*
+ ** - monitor vbat vs expected level (VBATH_EXPECT)
+ */
+ vbath = ReadRAM(pProHW,pProslic->channel,VBATH_EXPECT);
+ do
+ {
+ vbat = ReadRAM(pProHW,pProslic->channel,MADC_VBAT);
+ if(vbat & 0x10000000L)
+ vbat |= 0xF0000000L;
+ Delay(pProTimer,10);
+ }while((vbat < (vbath - COMP_5V))&&(timer++ < 200)); /* 2 sec timeout */
+
+ #ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sVBAT Up = %d.%d v\n",
+ LOGPRINT_PREFIX,
+ (int)((vbat/SCALE_V_MADC)/1000), (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ }
+ #endif
+ if(timer > 200)
+ {
+ /* Error handling - shutdown converter, disable channel, set error tag */
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC, 0x300000L); /* shutdown converter */
+ #ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sDCDC Power up timeout channel %d - disabling channel\n",
+ LOGPRINT_PREFIX,
+ pProslic->channel);
+ }
+ #endif
+ }
+ setUserMode(pProslic,FALSE);
+ return error;
+ }
+ else if((Si3226x_General_Configuration.batType == BO_DCDC_TSS)||
+ (Si3226x_General_Configuration.batType == BO_DCDC_TSS_ISO)||
+ Si3226x_General_Configuration.batType == BO_DCDC_QSS)
+ {
+ /*
+ ** FIXED RAIL CONVERTER SEQUENCE
+ **
+ ** - return if even channel
+ ** - clear previous ov/uv lockout
+ ** - powerup charge pump
+ ** - delay
+ ** - powerup converter
+ ** - delay
+ ** - verify no short circuits by looking for vbath/2
+ ** - clear dcdc status
+ ** - delay
+ */
+
+ if( pProslic->channel %2 == 0) /* is even */
+ {
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT("%sDCDC Powerup Channel %d Ignored\n", LOGPRINT_PREFIX,
+ pProslic->channel);
+ }
+#endif
+ setUserMode(pProslic,FALSE);
+ return RC_IGNORE;
+ }
+
+ WriteReg(pProHW,pProslic->channel,LINEFEED,LF_OPEN); /* Ensure open before powering converter */
+ reg = ReadReg(pProHW,pProslic->channel,ENHANCE); /* Read ENHANCE entry settings */
+ WriteReg(pProHW,pProslic->channel,ENHANCE,reg&0x07); /* Disable powersave during bringup */
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC,0x700000L); /* In case OV or UV previously occurred */
+ WriteRAM(pProHW,pProslic->channel,DCDC_CPUMP,0x100000L);/* Turn on charge pump */
+ Delay(pProTimer,10);
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC,0x600000L); /* Start Converter */
+ Delay(pProTimer,500);
+
+ /* If isolated design, turn off charge pump and powerdown OCLO */
+ if(Si3226x_General_Configuration.batType == BO_DCDC_TSS_ISO)
+ {
+ WriteRAM(pProHW,pProslic->channel,DCDC_CPUMP,0x0L);
+ Delay(pProTimer,10);
+ WriteRAM(pProHW,pProslic->channel,PD_OCLO,0x300000L);
+ Delay(pProTimer,30);
+ }
+ vbath = ReadRAM(pProHW,pProslic->channel,VBATH_EXPECT);
+ vbat = ReadRAM(pProHW,pProslic->channel,MADC_VBAT);
+ if(vbat & 0x10000000L)
+ vbat |= 0xF0000000L;
+ if(vbath & 0x10000000L)
+ vbath |= 0xF0000000L;
+
+ if(vbat < (vbath / 2)) {
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC, 0x300000L); /* shutdown converter */
+ Delay(pProTimer,30);
+ WriteRAM(pProHW,pProslic->channel,DCDC_CPUMP,0x0L); /* shut off charge pump */
+ #ifdef ENABLE_DEBUG
+
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sDCDC Short Circuit Failure %d - disabling channel\n", LOGPRINT_PREFIX,
+ pProslic->channel);
+ }
+ #endif
+ setUserMode(pProslic,FALSE);
+ return error;
+ }
+ else {
+ WriteRAM(pProHW,pProslic->channel,DCDC_STATUS,0L);
+ Delay(pProTimer,50);
+ }
+
+ /*
+ ** - monitor vbat vs expected level (VBATH_EXPECT)
+ */
+ vbath = ReadRAM(pProHW,pProslic->channel,VBATH_EXPECT);
+ do
+ {
+ vbat = ReadRAM(pProHW,pProslic->channel,MADC_VBAT);
+ if(vbat & 0x10000000L)
+ vbat |= 0xF0000000L;
+ Delay(pProTimer,10);
+ }while((vbat < (vbath - COMP_5V))&&(timer++ < 200)); /* 2 sec timeout */
+
+ #ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sFixed VBAT Up = %d.%d v\n",
+ LOGPRINT_PREFIX,
+ (int)((vbat/SCALE_V_MADC)/1000), (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ }
+ #endif
+ if(timer > 200)
+ {
+ /* Error handling - shutdown converter, disable channel, set error tag */
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC, 0x300000L); /* shutdown converter */
+ #ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sDCDC Fixed Rail Power up timeout channel %d - disabling channel\n",
+ LOGPRINT_PREFIX,
+ pProslic->channel);
+ }
+ #endif
+ }
+
+ /* Restore ENHANCE reg */
+ WriteReg(pProHW,pProslic->channel,ENHANCE,reg);
+ setUserMode(pProslic,FALSE);
+ return error;
+ }
+ else /* external battery - just verify presence */
+ {
+ /*
+ ** - monitor vbat vs expected level (VBATH_EXPECT)
+ */
+ vbath = ReadRAM(pProHW,pProslic->channel,VBATH_EXPECT);
+ do
+ {
+ vbat = ReadRAM(pProHW,pProslic->channel,MADC_VBAT);
+ if(vbat & 0x10000000L)
+ vbat |= 0xF0000000L;
+ Delay(pProTimer,10);
+ }while((vbat < (vbath - COMP_5V))&&(timer++ < 200)); /* 2 sec timeout */
+
+ #ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sExt VBAT Up = %d.%d v\n",
+ LOGPRINT_PREFIX,
+ (int)((vbat/SCALE_V_MADC)/1000), (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ }
+ #endif
+ if(timer > 200)
+ {
+ /* Error handling - shutdown converter, disable channel, set error tag */
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_UP_TIMEOUT;
+ #ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sExternal VBAT timeout channel %d - disabling channel\n",
+ LOGPRINT_PREFIX,
+ pProslic->channel);
+ }
+ #endif
+ }
+
+
+ }
+
+ setUserMode(pProslic,FALSE);
+ return error;
+}
+
+/*
+** Function: Si3226x_PowerDownConverter
+**
+** Description:
+** Safely powerdown dcdc converter after ensuring linefeed
+** is in the open state. Test powerdown by setting error
+** flag if detected voltage does no fall below 5v.
+**
+** Returns:
+** int (error)
+**
+*/
+int Si3226x_PowerDownConverter(proslicChanType_ptr pProslic)
+{
+ errorCodeType error = RC_NONE;
+ int32 vbat;
+ int timer = 0;
+ ramData data;
+
+ setUserMode(pProslic,TRUE);
+ /*
+ ** Check to see if already powered down, return if so
+ */
+ data = ReadRAM(pProHW,pProslic->channel,PD_DCDC);
+ if((data & 0x100000))
+ {
+ setUserMode(pProslic,FALSE);
+ return error; /* Return if already powered down */
+ }
+
+ /*
+ ** Power down sequence */
+ WriteReg(pProHW,pProslic->channel,LINEFEED,LF_FWD_OHT); /* Force out of powersave mode */
+ WriteReg(pProHW,pProslic->channel,LINEFEED, LF_OPEN);
+ Delay(pProTimer,50);
+ WriteRAM(pProHW,pProslic->channel,PD_DCDC,0x900000L);
+ Delay(pProTimer,50);
+
+ /*
+ ** Verify VBAT falls below 5v
+ */
+ do
+ {
+ vbat = ReadRAM(pProHW,pProslic->channel,MADC_VBAT);
+ if(vbat & 0x10000000L)
+ vbat |= 0xF0000000L;
+ Delay(pProTimer,10);
+ }while((vbat > COMP_5V)&&(timer++ < SI3226X_TIMEOUT_DCDC_DOWN)); /* 200 msec timeout */
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%s VBAT Down = %d.%d v\n",
+ LOGPRINT_PREFIX,
+ (int)((vbat/SCALE_V_MADC)/1000), (int)(((vbat/SCALE_V_MADC) - (vbat/SCALE_V_MADC)/1000*1000)));
+ }
+#endif
+ if(timer > SI3226X_TIMEOUT_DCDC_DOWN)
+ {
+ /* Error handling - shutdown converter, disable channel, set error tag */
+ pProslic->channelEnable = 0;
+ error = RC_VBAT_DOWN_TIMEOUT;
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT ("%sDCDC Power Down timeout channel %d\n", LOGPRINT_PREFIX, pProslic->channel);
+ }
+#endif
+ }
+
+ setUserMode(pProslic,FALSE);
+ return error;
+}
+
+
+/* Old cal left in for now until we clear up forward decs */
+int Si3226x_Cal(proslicChanType_ptr *pProslic, int maxChan)
+{
+ SILABS_UNREFERENCED_PARAMETER(maxChan);
+ SILABS_UNREFERENCED_PARAMETER(pProslic);
+ return 0;
+}
+
+/*
+** Function: Si3226x_Calibrate
+**
+** Description:
+** Performs calibration based on passed ptr to array of
+** desired CALRn settings.
+**
+** Starts calibration on all channels sequentially (not broadcast)
+** and continuously polls for completion. Return error code if
+** CAL_EN does not clear for each enabled channel within the passed
+** timeout period.
+*/
+int Si3226x_Calibrate(proslicChanType_ptr *pProslic, int maxChan, uInt8 *calr, int maxTime)
+{
+ int i;
+ int cal_en = 0;
+ int cal_en_chan = 0;
+ int timer = 0;
+
+ /*
+ ** Launch cals sequentially (not serially)
+ */
+ for(i=0;i<maxChan;i++)
+ {
+ if((pProslic[i]->channelEnable)&&(pProslic[i]->channelType == PROSLIC))
+ {
+ pProslic[i]->WriteRegX(pProslic[i]->pProHWX,pProslic[i]->channel,CALR0,calr[0]);
+ pProslic[i]->WriteRegX(pProslic[i]->pProHWX,pProslic[i]->channel,CALR1,calr[1]);
+ pProslic[i]->WriteRegX(pProslic[i]->pProHWX,pProslic[i]->channel,CALR2,calr[2]);
+ pProslic[i]->WriteRegX(pProslic[i]->pProHWX,pProslic[i]->channel,CALR3,calr[3]);
+ }
+ }
+
+ /*
+ ** Wait for completion or timeout
+ */
+ do
+ {
+ cal_en = 0;
+ pProslic[0]->DelayX(pProslic[0]->pProTimerX,10);
+ for(i=0;i<maxChan;i++)
+ {
+ if(pProslic[i]->channelEnable)
+ {
+ cal_en_chan = pProslic[i]->ReadRegX(pProslic[i]->pProHWX,pProslic[i]->channel,CALR3);
+ if((cal_en_chan&0x80)&&(timer == maxTime))
+ {
+#ifdef ENABLE_DEBUG
+ if(pProslic[i]->debugMode)
+ {
+ LOGPRINT("%sCalibration timed out channel %d\n", LOGPRINT_PREFIX, i);
+ }
+#endif
+ pProslic[i]->channelEnable = 0;
+ pProslic[i]->error = RC_CAL_TIMEOUT;
+ }
+ cal_en |= cal_en_chan;
+ }
+ }
+ }while((timer++ <= maxTime)&&(cal_en&0x80));
+ return cal_en;
+}
+
+
+
+/*
+** Function: LoadRegTables
+**
+** Description:
+** Generic function to load register/RAM with predefined addr/value
+*/
+static int LoadRegTables (proslicChanType *pProslic, ProslicRAMInit *pRamTable, ProslicRegInit *pRegTable, int broadcast){
+ uInt16 i;
+ uInt8 channel;
+ if (broadcast){
+ channel = BROADCAST;
+ setUserModeBroadcast(pProslic,TRUE);
+ }
+ else {
+ channel = pProslic->channel;
+ setUserMode(pProslic,TRUE);
+ }
+
+ i=0;
+ if (pRamTable != 0){
+ while (pRamTable[i].address != 0xffff){
+ WriteRAM(pProHW,channel,pRamTable[i].address,pRamTable[i].initValue);
+ i++;
+ }
+ }
+ i=0;
+ if (pRegTable != 0){
+ while (pRegTable[i].address != 0xff){
+ WriteReg(pProHW,channel,pRegTable[i].address,pRegTable[i].initValue);
+ i++;
+ }
+ }
+ if (broadcast)
+ setUserModeBroadcast(pProslic,FALSE);
+ else
+ setUserMode(pProslic,FALSE);
+
+ return 0;
+}
+
+
+
+/*
+** Function: LoadSi3226xPatch
+**
+** Description:
+** Load patch from external file defined as 'RevBPatch'
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+** broadcast: broadcast flag
+**
+** Return:
+** 0
+*/
+static int LoadSi3226xPatch (proslicChanType *pProslic, const proslicPatch *pPatch,int broadcast){
+ int32 loop;
+ uInt8 jmp_table_low = PATCH_JMPTBL_LOW_ADDR;
+ uInt16 jmp_table_high = PATCH_JMPTBL_HIGH_ADDR;
+ uInt8 channel;
+ ramData data;
+
+ if (pPatch == NULL)
+ return 0;
+ if (broadcast){
+ setUserModeBroadcast(pProslic,TRUE);
+ channel = BROADCAST;
+ }
+ else{
+ setUserMode (pProslic,TRUE); /*make sure we are in user mode to load patch*/
+ channel = pProslic->channel;
+ }
+
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sloading patch: %08lx\n", LOGPRINT_PREFIX, (unsigned long)pPatch->patchSerial);
+#endif
+
+ /* Disable patch */
+ WriteReg (pProHW, pProslic->channel, JMPEN,0);
+
+ /**
+ * Zero out jump table(s) in case previous values are still loaded
+ */
+ for (loop=0;loop<PATCH_NUM_LOW_ENTRIES;loop++){
+ /*zero out the jump table*/
+ WriteReg (pProHW, channel, jmp_table_low,0);
+ WriteReg (pProHW, channel, jmp_table_low+1,0);
+ jmp_table_low+=2;
+ }
+
+ for (loop=0;loop<PATCH_NUM_HIGH_ENTRIES;loop++){
+ /*zero out the jump table*/
+ WriteRAM (pProHW, channel, jmp_table_high,0L);
+ jmp_table_high++;
+ }
+
+
+ /**
+ * Load patch RAM data
+ */
+ WriteRAM(pProHW, channel,PRAM_ADDR, 0); /*write patch ram address register
+ If the data is all 0, you have hit the end of the programmed values and can stop loading.*/
+ for (loop=0; loop<PATCH_MAX_SIZE; loop++){
+ if (pPatch->patchData[loop] != 0){
+ if ((pProslic->deviceId->chipRev < 3) && broadcast)
+ WriteRAM(pProHW, channel,PRAM_ADDR, loop<<19); /*write patch ram address register (only necessary for broadcast rev c and earlier)*/
+ WriteRAM(pProHW, channel,PRAM_DATA,pPatch->patchData[loop]<<9); /*loading patch, note. data is shifted*/
+ }
+ else
+ loop = 1024;
+ }
+
+ /* Delay 1 mSec to ensure last RAM write completed - this should be quicker than doing a SPI access
+ to confirm the status register.
+ */
+ Delay(pProTimer, 1);
+
+ /*zero out RAM_ADDR_HI*/
+ WriteReg (pProHW, channel, RAM_ADDR_HI,0);
+
+ /**
+ * Lower 8 Jump Table Entries - register space
+ */
+ jmp_table_low=PATCH_JMPTBL_LOW_ADDR;
+ for (loop=0;loop<PATCH_NUM_LOW_ENTRIES;loop++){
+ /* Load the jump table with the new values.*/
+ if (pPatch->patchEntries[loop] != 0){
+ WriteReg (pProHW, channel, jmp_table_low,(pPatch->patchEntries[loop])&0xff);
+ WriteReg (pProHW, channel, jmp_table_low+1,pPatch->patchEntries[loop]>>8);
+ }
+ jmp_table_low+=2;
+ }
+
+ /**
+ * Upper 8 Jump Table Entries - Memory Mapped register space
+ */
+ jmp_table_high=PATCH_JMPTBL_HIGH_ADDR;
+ for (loop=0;loop<PATCH_NUM_HIGH_ENTRIES;loop++){
+ if (pPatch->patchEntries[loop] != 0)
+ {
+ data = ((uInt32) (pPatch->patchEntries[loop+PATCH_NUM_LOW_ENTRIES])) & 0x00001fffL ;
+ WriteRAM (pProHW, channel, jmp_table_high, data );
+ }
+ jmp_table_high++;
+ }
+
+ WriteRAM(pProHW,channel,PATCH_ID,pPatch->patchSerial); /*write patch identifier*/
+
+ /**
+ * Write patch support RAM locations (if any)
+ */
+ for (loop=0; loop<PATCH_MAX_SUPPORT_RAM; loop++){
+ if(pPatch->psRamAddr[loop] != 0) {
+ WriteRAM(pProHW,channel,pPatch->psRamAddr[loop],pPatch->psRamData[loop]);
+ }
+ else {
+ loop = PATCH_MAX_SUPPORT_RAM;
+ }
+ }
+
+ if (broadcast){
+ setUserModeBroadcast(pProslic,FALSE);
+ }
+ else {
+ setUserMode(pProslic,FALSE); /*turn off user mode*/
+ }
+ return 0;
+}
+
+
+
+
+
+/*
+** Functions below are defined in header file and can be called by external files
+*/
+
+/*
+**
+** PROSLIC INITIALIZATION FUNCTIONS
+**
+*/
+
+/*
+** Function: Si3226x_ShutdownChannel
+**
+** Description:
+** Safely shutdown channel w/o interruptions to
+** other active channels
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+**
+** Return:
+** 0
+
+*/
+int Si3226x_ShutdownChannel (proslicChanType_ptr pProslic){
+uInt8 reg;
+int error = 0;
+ /*
+ ** set linefeed to open state, powerdown dcdc converter
+ */
+ reg = ReadReg(pProHW,pProslic->channel,LINEFEED);
+ if(reg != 0)
+ Si3226x_SetLinefeedStatus(pProslic,LF_FWD_OHT); /* force low power mode exit */
+ Si3226x_SetLinefeedStatus(pProslic,LF_OPEN);
+ Delay(pProTimer,10);
+
+ /*
+ ** Shutdown converter if not using external supply.
+ */
+ if(Si3226x_General_Configuration.batType != BO_DCDC_EXTERNAL)
+ error = Si3226x_PowerDownConverter(pProslic);
+
+ return error;
+}
+
+/*
+** Function: Si3226x_VerifyControlInterface
+**
+** Description:
+** Check control interface readback cababilities
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+**
+** Return:
+** 0
+*/
+int Si3226x_VerifyControlInterface (proslicChanType_ptr pProslic)
+{
+ if (identifyChannelType(pProslic) != PROSLIC)
+ return RC_CHANNEL_TYPE_ERR;
+
+ WriteReg (pProHW,pProslic->channel,PCMRXLO,0x5A);
+ if (ReadReg(pProHW,pProslic->channel,PCMRXLO) != 0x5A){
+ pProslic->error = RC_SPI_FAIL;
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sProslic %d registers not communicating.\n", LOGPRINT_PREFIX, pProslic->channel);
+#endif
+ return RC_SPI_FAIL;
+ }
+
+ /* Verify RAM rd/wr with innocuous RAM location */
+ WriteRAM(pProHW,pProslic->channel,UNUSED449,0x12345678L);
+ if (ReadRAM(pProHW,pProslic->channel, UNUSED449) != 0x12345678L){
+ pProslic->error = RC_SPI_FAIL;
+
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sProslic %d RAM not communicating. RAM access fail.\n", LOGPRINT_PREFIX, pProslic->channel);
+#endif
+ return RC_SPI_FAIL;
+ }
+ return RC_NONE;
+}
+
+
+/*
+** Function: Si3226x_Init_MultiBOM
+**
+** Description:
+** - probe SPI to establish daisy chain length
+** - load patch
+** - initialize general parameters
+** - calibrate madc
+** - bring up DC/DC converters
+** - calibrate remaining items except madc & lb
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+
+int Si3226x_Init_MultiBOM(proslicChanType_ptr *pProslic,int size, int preset) {
+
+ if(preset < si3226x_genconf_multi_max_preset)
+ {
+ /* Copy selected General COnfiguration parameters to std structure */
+ Si3226x_General_Configuration = Si3226x_General_Configuration_MultiBOM[preset];
+ LOGPRINT("batType:%d, bomOpt:%d\n", Si3226x_General_Configuration.batType, Si3226x_General_Configuration.bomOpt);
+ }
+ else
+ {
+ return RC_INVALID_PRESET;
+ }
+ return Si3226x_Init(pProslic,size);
+}
+#endif
+
+
+/*
+** Function: Si3226x_Init_with_Options
+**
+** Description:
+** - probe SPI to establish daisy chain length
+** - load patch
+** - initialize general parameters
+** - calibrate madc
+** - bring up DC/DC converters
+** - calibrate remaining items except madc & lb
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+
+static int Si3226x_Init_with_Options (proslicChanType_ptr *pProslic, int size, initOptionsType init_opt){
+ /*
+ ** This function will initialize the chipRev and chipType members in pProslic
+ ** as well as load the initialization structures.
+ */
+ uInt8 data,id,enhance;
+ uInt8 calSetup[] = {0x00, 0x00, 0x01, 0x80}; /* CALR0-CALR3 */
+ int k;
+ const proslicPatch *patch = NULL;
+ ramData swdrv_pol;
+ ramData pdn_tmp;
+
+ /* Skip part identification and patch load steps if reinitializing */
+ if(init_opt != INIT_REINIT)
+ {
+ /*
+ ** Clear the daisy chain map
+ */
+
+ /*
+ ** Identify channel type (ProSLIC or DAA) before initialization.
+ ** Channels identified as DAA channels will not be modified during
+ ** the ProSLIC initialization
+ */
+ for (k=0;k<size;k++)
+ {
+ pProslic[k]->channelType = identifyChannelType(pProslic[k]);
+ #ifdef ENABLE_DEBUG
+ if(pProslic[k]->debugMode)
+ {
+ const char fmt_string[] = "%sChannel %d : Type = %s\n";
+ if(pProslic[k]->channelType == PROSLIC)
+ {
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, pProslic[k]->channel, "PROSLIC");
+ }
+ else if(pProslic[k]->channelType == DAA)
+ {
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, pProslic[k]->channel, "DAA");
+ }
+ else
+ {
+ LOGPRINT(fmt_string, LOGPRINT_PREFIX, pProslic[k]->channel, "UNKNOWN");
+ }
+ }
+ #endif
+ }
+
+ /*
+ ** Read channel id to establish chipRev and chipType
+ */
+ for (k=0;k<size;k++)
+ {
+ if(pProslic[k]->channelType == PROSLIC)
+ {
+ id = pProslic[k]->ReadRegX(pProslic[k]->pProHWX,pProslic[k]->channel,ID);
+ enhance = pProslic[k]->ReadRegX(pProslic[k]->pProHWX,pProslic[k]->channel,ENHANCE);
+ pProslic[k]->deviceId->chipRev = id&0x7;
+ pProslic[k]->deviceId->chipType = getChipType(id,enhance);
+
+ #ifdef ENABLE_DEBUG
+ if(pProslic[k]->debugMode)
+ {
+ LOGPRINT("%sChannel %d : Chip Type %d\n", LOGPRINT_PREFIX, pProslic[k]->channel,pProslic[k]->deviceId->chipType);
+ LOGPRINT("%sChannel %d : Chip Rev %d\n", LOGPRINT_PREFIX, pProslic[k]->channel,pProslic[k]->deviceId->chipRev);
+ }
+ #endif
+ }
+ }
+
+ /*
+ ** Probe each channel and enable all channels that respond
+ */
+ for (k=0;k<size;k++){
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC)){
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX,pProslic[k]->channel,PCMRXLO,0x5a);
+ if (pProslic[k]->ReadRegX(pProslic[k]->pProHWX,pProslic[k]->channel,PCMRXLO) != 0x5A){
+ pProslic[k]->channelEnable = 0;
+ pProslic[k]->error = RC_SPI_FAIL;
+ return pProslic[k]->error; /* Halt init if SPI fail */
+ }
+ }
+ }
+ } /* init_opt */
+
+
+ if((init_opt != INIT_REINIT)&&(init_opt != INIT_NO_PATCH_LOAD))
+ {
+ /**
+ * Load patch (do not enable until patch loaded on all channels)
+ */
+ for (k=0;k<size;k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ if (pProslic[k]->deviceId->chipRev == SI3226X_REVC )
+ {
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+ if(Si3226x_General_Configuration.batType == BO_DCDC_TRACKING)
+ {
+ if(Si3226x_General_Configuration.bomOpt == BO_DCDC_FLYBACK)
+ {
+ patch = &(SI3226X_PATCH_C_FLBK);
+ }
+ else if(Si3226x_General_Configuration.bomOpt == BO_DCDC_QCUK)
+ {
+ patch = &(SI3226X_PATCH_C_QCUK);
+ }
+ else if(Si3226x_General_Configuration.bomOpt == BO_DCDC_LCQCUK)
+ {
+ patch = &(SI3226X_PATCH_C_LCQCUK);
+ }
+ else if(Si3226x_General_Configuration.bomOpt == BO_DCDC_CUK)
+ {
+ patch = &(SI3226X_PATCH_C_CUK);
+ }
+ else if((Si3226x_General_Configuration.bomOpt == BO_DCDC_P_BUCK_BOOST_5V)
+ ||(Si3226x_General_Configuration.bomOpt == BO_DCDC_P_BUCK_BOOST_12V)
+ ||(Si3226x_General_Configuration.bomOpt == BO_DCDC_P_BUCK_BOOST_12V_HV)
+ ||(Si3226x_General_Configuration.bomOpt == BO_DCDC_PMOS_BUCK_BOOST))
+ {
+ patch = &(SI3226X_PATCH_C_PBB);
+ }
+ else if(Si3226x_General_Configuration.bomOpt == BO_DCDC_BUCK_BOOST)
+ {
+ patch = &(SI3226X_PATCH_C_BB);
+ }
+ }
+ else if((Si3226x_General_Configuration.batType == BO_DCDC_TSS)&&(Si3226x_General_Configuration.bomOpt == BO_DCDC_FLYBACK))
+ {
+ patch = &(SI3226X_PATCH_C_TSS);
+ }
+ else if((Si3226x_General_Configuration.batType == BO_DCDC_TSS_ISO)&&(Si3226x_General_Configuration.bomOpt == BO_DCDC_FLYBACK))
+ {
+ patch = &(SI3226X_PATCH_C_TSS_ISO);
+ }
+ else if((Si3226x_General_Configuration.batType == BO_DCDC_QSS)&&(Si3226x_General_Configuration.bomOpt == BO_DCDC_QCUK))
+ {
+ patch = &(SI3226X_PATCH_C_QSS);
+ }
+ else
+ {
+ #ifdef ENABLE_DEBUG
+ if(pProslic[k]->debugMode)
+ {
+ LOGPRINT("%sChannel %d : Invalid Patch\n",LOGPRINT_PREFIX, pProslic[k]->channel);
+ }
+ #endif
+ pProslic[k]->channelEnable = 0;
+ pProslic[k]->error = RC_INVALID_PATCH;
+ return RC_INVALID_PATCH;
+ }
+#else
+ patch = &(SI3226X_PATCH_C_DEFAULT);
+#endif
+ }
+ else
+ {
+ #ifdef ENABLE_DEBUG
+ if (pProslic[k]->debugMode)
+ {
+ LOGPRINT("%sChannel %d : Unsupported Device Revision (%d)\n",
+ LOGPRINT_PREFIX,
+ pProslic[k]->channel,pProslic[k]->deviceId->chipRev );
+ }
+ #endif
+ pProslic[k]->channelEnable = 0;
+ pProslic[k]->error = RC_UNSUPPORTED_DEVICE_REV;
+ return RC_UNSUPPORTED_DEVICE_REV;
+ }
+ Si3226x_LoadPatch(pProslic[k],patch);
+ }
+ }
+
+ /**
+ * Verify and Enable Patch
+ */
+ for (k=0;k<size;k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ #ifdef DISABLE_VERIFY_PATCH
+ Si3226x_EnablePatch(pProslic[k]);
+ #else
+ data = (uInt8)Si3226x_VerifyPatch(pProslic[k],patch);
+ if (data)
+ {
+ pProslic[k]->channelEnable=0;
+ pProslic[k]->error = data;
+ return data; /* Stop Init if patch load failure occurs */
+ }
+ else
+ {
+ Si3226x_EnablePatch(pProslic[k]);
+ }
+ #endif
+
+ }
+ }
+
+ } /* init_opt */
+
+ /*
+ ** Load general parameters - includes all BOM dependencies
+ **
+ ** First qualify general parameters by identifying valid device key. This
+ ** will prevent inadvertent use of other device's preset files, which could
+ ** lead to improper initialization and high current states.
+ */
+
+ data = Si3226x_General_Configuration.device_key;
+
+ if((data < DEVICE_KEY_MIN)||(data > DEVICE_KEY_MAX))
+ {
+ pProslic[0]->error = RC_INVALID_GEN_PARAM;
+ return pProslic[0]->error;
+ }
+
+ for (k=0;k<size;k++){
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC)){
+ setUserMode(pProslic[k],TRUE);
+ /* Force pwrsave off and disable AUTO-tracking - set to user configured state after cal */
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,ENHANCE,0);
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,AUTO,0x2F);
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,BAT_HYST,Si3226x_General_Configuration.bat_hyst);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBATR_EXPECT,Si3226x_General_Configuration.vbatr_expect);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBATH_EXPECT,Si3226x_General_Configuration.vbath_expect);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PWRSAVE_TIMER,Si3226x_General_Configuration.pwrsave_timer);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,OFFHOOK_THRESH,Si3226x_General_Configuration.offhook_thresh);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBAT_TRACK_MIN,Si3226x_General_Configuration.vbat_track_min);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBAT_TRACK_MIN_RNG,Si3226x_General_Configuration.vbat_track_min_rng);
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,THERM_DBI,Si3226x_General_Configuration.therm_dbi);
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_VERR,Si3226x_General_Configuration.dcdc_verr);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_VERR_HYST,Si3226x_General_Configuration.dcdc_verr_hyst);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OITHRESH_LO,Si3226x_General_Configuration.dcdc_oithresh_lo);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OITHRESH_HI,Si3226x_General_Configuration.dcdc_oithresh_hi);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PD_UVLO,Si3226x_General_Configuration.pd_uvlo);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PD_OVLO,Si3226x_General_Configuration.pd_ovlo);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PD_OCLO,Si3226x_General_Configuration.pd_oclo);
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_UVHYST,Si3226x_General_Configuration.dcdc_uvhyst);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_UVTHRESH,Si3226x_General_Configuration.dcdc_uvthresh);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OVTHRESH,Si3226x_General_Configuration.dcdc_ovthresh);
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_UVPOL,Si3226x_General_Configuration.dcdc_uvpol);
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_VREF_CTRL,Si3226x_General_Configuration.dcdc_vref_ctrl);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_RNGTYPE,Si3226x_General_Configuration.dcdc_rngtype);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_ANA_GAIN,Si3226x_General_Configuration.dcdc_ana_gain);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_ANA_TOFF,Si3226x_General_Configuration.dcdc_ana_toff);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_ANA_TONMIN,Si3226x_General_Configuration.dcdc_ana_tonmin);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_ANA_TONMAX,Si3226x_General_Configuration.dcdc_ana_tonmax);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_ANA_DSHIFT,Si3226x_General_Configuration.dcdc_ana_dshift);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_ANA_LPOLY,Si3226x_General_Configuration.dcdc_ana_lpoly);
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,COEF_P_HVIC,Si3226x_General_Configuration.coef_p_hvic);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,P_TH_HVIC,Si3226x_General_Configuration.p_th_hvic);
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,SCALE_KAUDIO,Si3226x_General_Configuration.scale_kaudio);
+
+ /* GC RAM locations that moved from RevB to RevC */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LKG_OFHK_OFFSET,Si3226x_General_Configuration.lkg_ofhk_offset);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LKG_LB_OFFSET,Si3226x_General_Configuration.lkg_lb_offset);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBATH_DELTA,Si3226x_General_Configuration.vbath_delta);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,UVTHRESH_MAX,Si3226x_General_Configuration.uvthresh_max);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,UVTHRESH_SCALE,Si3226x_General_Configuration.uvthresh_scale);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,UVTHRESH_BIAS,Si3226x_General_Configuration.uvthresh_bias);
+
+ /* Hardcoded mods to default settings */
+ data = pProslic[k]->ReadRegX(pProslic[k]->pProHWX, pProslic[k]->channel,GPIO_CFG1);
+ data &= 0xF9; /* Clear DIR for GPIO 1&2 */
+ data |= 0x60; /* Set ANA mode for GPIO 1&2 */
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,GPIO_CFG1,data); /* coarse sensors analog mode */
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,PDN,0x80); /* madc powered in open state */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,TXACHPF_A1_1,0x71EB851L); /* Fix HPF corner */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,ROW0_C2, 0x723F235L); /* improved DTMF det */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,ROW1_C2, 0x57A9804L); /* improved DTMF det */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,XTALK_TIMER,0x36000L); /* xtalk fix */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_CPUMP_LP_MASK,0x1100000L); /* Charge pump mask */
+ /* Smart VOV Default Settings - set here in case no ring preset is loaded */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VOV_DCDC_SLOPE,0xFFFFFFL); /* dcdc overhead scale */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VOV_DCDC_OS,0xA18937L); /* smart vov overhead offset*/
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VOV_RING_BAT_MAX,0xE49BA5L); /* smart vov max vov */
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VDIFFLPF,0x10038DL); /* vloop lpf 10hz */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,ILOOPLPF,0x4EDDB9L); /* iloop lpf*/
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,ILONGLPF,0x806D6L); /* ilong lpf */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VCMLPF,0x10059FL); /* 20pps pulse dialing */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,CM_SPEEDUP_TIMER,0xF0000L); /* 20pps pulse dialing */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VCM_TH,0x106240L); /* 20pps pulse dialing */
+
+ /* Prevent Ref Osc from powering down in PLL Freerun mode (pd_ref_osc) */
+ pdn_tmp = pProslic[k]->ReadRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PWRSAVE_CTRL_LO);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PWRSAVE_CTRL_LO,pdn_tmp&0x0BFFFFFFL);/* clear b26 */
+
+ /* Hardcoded mods for Tracking supplies */
+ if(Si3226x_General_Configuration.batType == BO_DCDC_TRACKING)
+ {
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_UV_DEBOUNCE, 0x200000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OV_DEBOUNCE, 0x0L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OIMASK, 0xC00000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VCM_HYST,0x706280L); /* 7v */
+ if(Si3226x_General_Configuration.bomOpt == BO_DCDC_BUCK_BOOST)
+ {
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_DCFF_ENABLE,0x10000000L);/* enable dcff drive */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_SCALE,0x2A00000L);/* scale for LPR amplitude */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_CM_OS,0x61EB80L); /* LPR cm offset */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBAT_IRQ_TH,0x51EB80L); /* thresh to 5v */
+ }
+ else
+ {
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_DCFF_ENABLE,0x0L);/* disable dcff drive */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_SCALE,0x1F00000L);/* scale for LPR amplitude */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_CM_OS,0x51EB80L); /* LPR cm offset */
+ }
+ }
+ else if(Si3226x_General_Configuration.batType == BO_DCDC_QSS)
+ {
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VCM_HYST,0x306280L); /* 3v */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_SCALE,0x2A00000L);/* scale for LPR amplitude */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_CM_OS,0x61EB80L); /* LPR cm offset */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OIMASK, 0xA00000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_UV_DEBOUNCE, 0x0L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OV_DEBOUNCE, 0xD00000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,MADC_VDC_SCALE, 0xAE924B9L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBATL_EXPECT, 0xF00000L); /* force vbatl 13v to keep cm recalc */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PD_OFFLD_DAC,0x200000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PD_OFFLD_GM,0x200000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_PD_ANA, 0x300000);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,P_TH_OFFLOAD, 0x480CBFL); /* Large - not used in QSS */
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,OFFLOAD,0x3); /* Enable offload and vbat_l */
+
+ }
+ else /* TSS, TSS_ISO, or EXTERNAL */
+ {
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_UV_DEBOUNCE, 0x0L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OV_DEBOUNCE, 0xD00000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OIMASK, 0xA00000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VCM_HYST,0x306280L); /* 3v */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_SCALE,0x2A00000L);/* scale for LPR amplitude */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_CM_OS,0x61EB80L); /* LPR cm offset */
+
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBATL_EXPECT, 0xF00000L); /* force vbatl 13v to keep cm recalc */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,MADC_VDC_SCALE, 0xAE924B9L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_PD_ANA, 0x300000);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,P_TH_OFFLOAD, 0x280CBFL); /* 1.1W @ 60C */
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PD_OFFLD_DAC,0x200000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,PD_OFFLD_GM,0x200000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_CPUMP_LP_MASK,0x100000L); /* Charge pump mask */
+
+ /* Setup power offloading for tracking switched supplies */
+ if((Si3226x_General_Configuration.batType == BO_DCDC_TSS)||(Si3226x_General_Configuration.batType == BO_DCDC_TSS_ISO))
+ {
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,OFFLOAD,0x3); /* Enable offload and vbat_l */
+ }
+ else
+ {
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,OFFLOAD,0x13); /* Enable offload and vbat_l, disable fixed rail battery management. */
+ }
+ }
+
+
+ /* DCDC Drive Polarity */
+ if(pProslic[k]->dcdc_polarity_invert)
+ {
+ if(Si3226x_General_Configuration.dcdc_swdrv_pol == 0)
+ {
+ swdrv_pol = 0x100000L;
+ }
+ else
+ {
+ swdrv_pol = 0x0L;
+ }
+ /*
+ ** Interim support for higher voltage PBB using same
+ ** general parameters as standard PBB
+ */
+ if(Si3226x_General_Configuration.bomOpt == BO_DCDC_PMOS_BUCK_BOOST)
+ {
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,VBAT_TRACK_MIN_RNG,0x3300000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_OITHRESH_HI,0xF00000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_ANA_GAIN,0x400000L);
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,LPR_SCALE,0x2900000L);
+
+ }
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_SWDRV_POL,swdrv_pol);
+ }
+ else
+ {
+ pProslic[k]->WriteRAMX(pProslic[k]->pProHWX, pProslic[k]->channel,DCDC_SWDRV_POL,Si3226x_General_Configuration.dcdc_swdrv_pol);
+ }
+
+
+
+ setUserMode(pProslic[k],FALSE);
+ }
+ }
+
+ if((init_opt != INIT_NO_CAL)&&(init_opt != INIT_REINIT))
+ {
+ /*
+ ** Calibrate (madc offset)
+ */
+ Si3226x_Calibrate(pProslic,size,calSetup,TIMEOUT_MADC_CAL);
+ }
+
+ /*
+ ** Bring up DC/DC converters sequentially to minimize
+ ** peak power demand on VDC
+ */
+ for (k=0;k<size;k++)
+ {
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC))
+ {
+ setUserMode(pProslic[k],TRUE);
+ pProslic[k]->error = Si3226x_PowerUpConverter(pProslic[k]);
+ setUserMode(pProslic[k],FALSE);
+ }
+ }
+
+
+ if((init_opt != INIT_NO_CAL)&&(init_opt != INIT_REINIT))
+ {
+ /*
+ ** Calibrate remaining cals (except madc, lb)
+ */
+ calSetup[1] = SI3226X_CAL_STD_CALR1;
+ calSetup[2] = SI3226X_CAL_STD_CALR2;
+ Si3226x_Calibrate(pProslic,size,calSetup,TIMEOUT_GEN_CAL);
+ }
+
+ /*
+ ** Apply user configured ENHANCE and AUTO
+ */
+ for (k=0;k<size;k++){
+ if ((pProslic[k]->channelEnable)&&(pProslic[k]->channelType == PROSLIC)){
+ setUserMode(pProslic[k],TRUE);
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,ENHANCE,Si3226x_General_Configuration.enhance);
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,AUTO,Si3226x_General_Configuration.autoRegister);
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX, pProslic[k]->channel,ZCAL_EN,Si3226x_General_Configuration.zcal_en);
+ setUserMode(pProslic[k],FALSE);
+ }
+ }
+
+
+ return 0;
+}
+
+
+/*
+** Function: Si3226x_Init
+**
+** Description:
+** - probe SPI to establish daisy chain length
+** - load patch
+** - initialize general parameters
+** - calibrate madc
+** - bring up DC/DC converters
+** - calibrate remaining items except madc & lb
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+
+int Si3226x_Init (proslicChanType_ptr *pProslic, int size){
+
+ return Si3226x_Init_with_Options(pProslic,size,INIT_NO_OPT);
+}
+
+
+/*
+** Function: Si3226x_Reinit
+**
+** Description:
+** Performs soft reset then calls Si3226x_Init
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC object array
+** fault: error code
+**
+** Return:
+** error code
+*/
+int Si3226x_Reinit (proslicChanType_ptr pProslic, int size){
+ uInt8 lf;
+ int retVal;
+ int num_reinit_chan = 1;
+
+ SILABS_UNREFERENCED_PARAMETER(size);
+
+ lf = ReadReg(pProHW,pProslic->channel,LINEFEED);
+ Si3226x_PowerDownConverter(pProslic);
+ Delay(pProTimer,10);
+ /* Determine which soft reset to assert (dual device) */
+ if((pProslic->channel % 2) == 0) /* Even */
+ {
+ WriteReg(pProHW,pProslic->channel,RESET,0x01); /* device ch 0 */
+ }
+ else
+ {
+ WriteReg(pProHW,pProslic->channel,RESET,0x02); /* device ch 1 */
+ }
+ Delay(pProTimer,100);
+
+ retVal = Si3226x_Init_with_Options(&pProslic,num_reinit_chan,INIT_REINIT);
+ /*
+ ** Restore entry linefeed state - if alarm occured, this
+ ** is likely to be the OPEN state, but this function should
+ ** be useful for all usage cases.
+ */
+ WriteReg(pProHW,pProslic->channel,LINEFEED,lf);
+ return (retVal);
+}
+
+
+/*
+** Function: Si3226x_PrintDebugReg
+**
+** Description:
+** Register dump utility
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+**
+** Return:
+** 0
+*/
+int Si3226x_PrintDebugReg (proslicChanType *pProslic){
+#ifdef ENABLE_DEBUG
+ uInt8 i;
+ for (i=0;i<99;i++)
+ {
+ LOGPRINT ("%s Register %d = %X\n",LOGPRINT_PREFIX, i,ReadReg(pProHW,pProslic->channel,i));
+ }
+#endif
+ return 0;
+}
+
+/*
+** Function: Si3226x_PrintDebugRAM
+**
+** Description:
+** Register dump utility
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+**
+** Return:
+** 0
+*/
+int Si3226x_PrintDebugRAM (proslicChanType *pProslic){
+#ifdef ENABLE_DEBUG
+ uInt16 i;
+ for (i=0;i<1024;i++)
+ {
+ LOGPRINT ("%s RAM %d = %X\n",LOGPRINT_PREFIX, i,(unsigned int)(ReadRAM(pProHW,pProslic->channel,i)));
+ }
+#endif
+ return 0;
+}
+
+
+/*
+** Function: Si3226x_PrintDebugData
+**
+** Description:
+** Register and RAM dump utility
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+** broadcast: broadcast flag
+**
+** Return:
+** 0
+*/
+int Si3226x_PrintDebugData (proslicChanType *pProslic){
+ Si3226x_PrintDebugReg (pProslic);
+ Si3226x_PrintDebugRAM (pProslic);
+ return 0;
+}
+/*
+** Function: Si3226x_LBCal
+**
+** Description:
+** Run canned longitudinal balance calibration. Each channel
+** may be calibrated in parallel since there are no shared
+** resources between si3226x devices.
+**
+** Input Parameters:
+** pProslic: pointer to array of PROSLIC channel objects
+** size: number of PROSLIC channel objects
+**
+** Return:
+** 0
+*/
+int Si3226x_LBCal(proslicChanType_ptr *pProslic, int size)
+{
+ int k;
+ int i;
+ uInt8 data;
+ int timeout = 0;
+
+#ifdef DISABLE_MALLOC
+ uInt8 lf[64];
+ uInt8 enhance[64];
+
+ if (size > 64) {
+ LOGPRINT("%sToo many channels - wanted %d, max of %d\n",
+ LOGPRINT_PREFIX,
+ size, 64);
+ return RC_NO_MEM;
+ }
+#else
+ uInt8 *lf;
+ uInt8 *enhance;
+
+ lf = kmalloc(size * sizeof(uInt8), GFP_KERNEL);
+ if (lf == 0) {
+ return RC_NO_MEM;
+ }
+
+ enhance = kmalloc(size * sizeof(uInt8), GFP_KERNEL);
+ if (enhance == 0) {
+ return RC_NO_MEM;
+ }
+#endif
+
+
+ /* Start Cal on each channel first */
+ for (k=0;k<size;k++)
+ {
+ if (pProslic[k]->channelEnable)
+ {
+#ifdef ENABLE_DEBUG
+ if(pProslic[k]->debugMode)
+ {
+ LOGPRINT("%sStarting LB Cal on channel %d\n",
+ LOGPRINT_PREFIX,
+ pProslic[k]->channel);
+ }
+#endif
+ enhance[k] = pProslic[k]->ReadRegX(pProslic[k]->pProHWX,pProslic[k]->channel,ENHANCE);
+ lf[k] = pProslic[k]->ReadRegX(pProslic[k]->pProHWX,pProslic[k]->channel,LINEFEED);
+
+ /* Disable powersave mode and set linefeed to fwd active */
+ Si3226x_SetPowersaveMode(pProslic[k],PWRSAVE_DISABLE);
+ Si3226x_SetLinefeedStatus(pProslic[k],LF_FWD_ACTIVE);
+
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX,pProslic[k]->channel,CALR0,CAL_LB_ALL); /* enable LB cal */
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX,pProslic[k]->channel,CALR3,0x80); /* start cal */
+
+ i=0;
+ do {
+ data = pProslic[k]->ReadRegX(pProslic[k]->pProHWX,pProslic[k]->channel,CALR3);
+ pProslic[k]->DelayX(pProslic[k]->pProTimerX, 10);
+ } while (data&0x80 && ++i<=TIMEOUT_LB_CAL);
+
+ if (i >= TIMEOUT_LB_CAL)
+ {
+#ifdef ENABLE_DEBUG
+ if (pProslic[k]->debugMode)
+ LOGPRINT("%sCalibration timeout channel %d\n",LOGPRINT_PREFIX,pProslic[k]->channel);
+#endif
+ pProslic[k]->error = RC_CAL_TIMEOUT;
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX,pProslic[k]->channel,LINEFEED,LF_OPEN);
+ timeout = 1;
+ }
+ else
+ {
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX,pProslic[k]->channel,LINEFEED,lf[k]);
+ }
+ pProslic[k]->WriteRegX(pProslic[k]->pProHWX,pProslic[k]->channel,ENHANCE,enhance[k]);
+ }
+ }
+
+#ifndef DISABLE_MALLOC
+ kfree(lf);
+ kfree(enhance);
+#endif
+ if (timeout != 0) {
+ return RC_CAL_TIMEOUT;
+ } else {
+ return RC_NONE;
+ }
+}
+
+
+
+/*
+** Function: Si3226x_GetLBCalResult
+**
+** Description:
+** Read applicable calibration coefficients
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+** resultx: pointer to 4 RAM results
+**
+** Return:
+** 0
+*/
+int Si3226x_GetLBCalResult (proslicChanType *pProslic,int32 *result1,int32 *result2,int32 *result3,int32 *result4){
+ setUserMode(pProslic,TRUE);
+ *result1 = ReadRAM(pProHW,pProslic->channel,CMDAC_FWD);
+ *result2 = ReadRAM(pProHW,pProslic->channel,CMDAC_REV);
+ *result3 = ReadRAM(pProHW,pProslic->channel,CAL_TRNRD_DACT);
+ *result4 = ReadRAM(pProHW,pProslic->channel,CAL_TRNRD_DACR);
+ setUserMode(pProslic,FALSE);
+ return 0;
+}
+
+/*
+** Function: Si3226x_GetLBCalResultPacked
+**
+** Description:
+** Read applicable calibration coefficients
+** and pack into single 32bit word
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+** result: pointer to packed result
+**
+** Return:
+** 0
+**
+** Packed Result Format
+**
+** Bits 31:24 CMDAC_FWD[
+*/
+int Si3226x_GetLBCalResultPacked (proslicChanType *pProslic,int32 *result){
+ int32 tmpResult;
+ setUserMode(pProslic,TRUE);
+ tmpResult = ReadRAM(pProHW,pProslic->channel,CMDAC_FWD);
+ *result = (tmpResult<<6)&0xff000000L;
+ tmpResult = ReadRAM(pProHW,pProslic->channel,CMDAC_REV);
+ *result |= (tmpResult>>1)&0x00ff0000L;
+ tmpResult = ReadRAM(pProHW,pProslic->channel,CAL_TRNRD_DACT);
+ *result |= (tmpResult>>5)&0x0000ff00L;
+ tmpResult = ReadRAM(pProHW,pProslic->channel,CAL_TRNRD_DACR);
+ *result |= (tmpResult>>13)&0x000000ffL;
+ setUserMode(pProslic,FALSE);
+ return 0;
+}
+/*
+** Function: Si3226x_LoadPreviousLBCal
+**
+** Description:
+** Load applicable calibration coefficients
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+** resultx: pointer to 4 RAM results
+**
+** Return:
+** 0
+*/
+int Si3226x_LoadPreviousLBCal (proslicChanType *pProslic,int32 result1,int32 result2,int32 result3,int32 result4){
+ setUserMode(pProslic,TRUE);
+ WriteRAM(pProHW,pProslic->channel,CMDAC_FWD,result1);
+ WriteRAM(pProHW,pProslic->channel,CMDAC_REV,result2);
+ WriteRAM(pProHW,pProslic->channel,CAL_TRNRD_DACT,result3);
+ WriteRAM(pProHW,pProslic->channel,CAL_TRNRD_DACR,result4);
+ setUserMode(pProslic,FALSE);
+ return 0;
+}
+
+
+/*
+** Function: Si3226x_LoadPreviousLBCalPacked
+**
+** Description:
+** Load applicable calibration coefficients
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+** result: pointer to packed cal results
+**
+** Return:
+** 0
+*/
+int Si3226x_LoadPreviousLBCalPacked (proslicChanType *pProslic,int32 *result){
+ int32 ramVal;
+ setUserMode(pProslic,TRUE);
+ ramVal = (*result&0xff000000L)>>6;
+ WriteRAM(pProHW,pProslic->channel,CMDAC_FWD,ramVal);
+ ramVal = (*result&0x00ff0000L)<<1;
+ WriteRAM(pProHW,pProslic->channel,CMDAC_REV,ramVal);
+ ramVal = (*result&0x0000ff00L)<<5;
+ WriteRAM(pProHW,pProslic->channel,CAL_TRNRD_DACT,ramVal);
+ ramVal = (*result&0x000000ffL)<<13;
+ WriteRAM(pProHW,pProslic->channel,CAL_TRNRD_DACR,ramVal);
+#ifdef API_TEST
+ ramVal = ReadRAM(pProHW,pProslic->channel,CMDAC_FWD);
+ LOGPRINT ("%s UNPACKED CMDAC_FWD = %08x\n", LOGPRINT_PREFIX, ramVal);
+ ramVal = ReadRAM(pProHW,pProslic->channel,CMDAC_REV);
+ LOGPRINT ("%s UNPACKED CMDAC_REF = %08x\n", LOGPRINT_PREFIX, ramVal);
+ ramVal = ReadRAM(pProHW,pProslic->channel,CAL_TRNRD_DACT);
+ LOGPRINT ("%s UNPACKED CAL_TRNRD_DACT = %08x\n", LOGPRINT_PREFIX, ramVal);
+ ramVal = ReadRAM(pProHW,pProslic->channel,CAL_TRNRD_DACR);
+ LOGPRINT ("%s UNPACKED CAL_TRNRD_DACR = %08x\n", LOGPRINT_PREFIX, ramVal);
+#endif
+ setUserMode(pProslic,FALSE);
+ return 0;
+}
+
+/*
+** Function: Si3226x_LoadRegTables
+**
+** Description:
+** Generic register and ram table loader
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel object
+** pRamTable: pointer to PROSLIC ram table
+** pRegTable: pointer to PROSLIC reg table
+** size: number of channels
+**
+** Return:
+** 0
+*/
+int Si3226x_LoadRegTables (proslicChanType_ptr *pProslic, ProslicRAMInit *pRamTable, ProslicRegInit *pRegTable, int size){
+ uInt16 i;
+ for (i=0;i<size;i++){
+ if (pProslic[i]->channelEnable)
+ LoadRegTables(pProslic[i],pRamTable,pRegTable,0);
+ }
+ return 0;
+}
+
+
+/*
+** Function: Si3226x_LoadPatch
+**
+** Description:
+** Calls patch loading function
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** pPatch: pointer to PROSLIC patch obj
+**
+** Returns:
+** 0
+*/
+int Si3226x_LoadPatch (proslicChanType *pProslic, const proslicPatch *pPatch){
+ LoadSi3226xPatch(pProslic,pPatch,0);
+ return 0;
+}
+
+
+/*
+** Function: Si3226x_VerifyPatch
+**
+** Description:
+** Veriy patch load
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** pPatch: pointer to PROSLIC patch obj
+**
+** Returns:
+** 0
+*/
+int Si3226x_VerifyPatch (proslicChanType *pProslic, const proslicPatch *pPatch){
+int loop;
+uInt8 jmp_table_low;
+uInt16 jmp_table_high;
+uInt8 data;
+uInt32 ramdata;
+int err_low = 0;
+int err_high = 0;
+int err_ram = 0;
+
+ if (pPatch == NULL)
+ return RC_NONE;
+
+ setUserMode (pProslic,TRUE); /*make sure we are in user mode to read patch*/
+
+ WriteReg (pProHW, pProslic->channel, JMPEN,0); /*disable the patch*/
+
+ WriteRAM(pProHW, pProslic->channel,PRAM_ADDR, 0); /*write patch ram address register*/
+
+ /* If the data is all 0, you have hit the end of the programmed values and can stop loading.*/
+ for (loop=0; loop<PATCH_MAX_SIZE; loop++){
+ if (pPatch->patchData[loop] != 0){
+ ramdata = ReadRAM(pProHW, pProslic->channel,PRAM_DATA); /*note. data is shifted*/
+ if (pPatch->patchData[loop]<<9 != ramdata){
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT("%sERROR: Addr: %d Expected: %d Actual: %d\n",
+ LOGPRINT_PREFIX,
+ loop, (int)(pPatch->patchData[loop]<<9), (int)(ramdata));
+ }
+#endif
+ loop = PATCH_MAX_SIZE;
+ err_ram = 1;
+ }
+ }
+ else
+ loop = PATCH_MAX_SIZE;
+ }
+
+ if (err_ram){
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sERROR: patch verify RAM : channel %d\n", LOGPRINT_PREFIX, pProslic->channel);
+#endif
+ }
+
+ /*zero out RAM_ADDR_HI*/
+ WriteReg (pProHW, pProslic->channel, RAM_ADDR_HI,0);
+
+ /**
+ * Verify jump table low entries
+ */
+ jmp_table_low=PATCH_JMPTBL_LOW_ADDR;
+ for (loop=0;loop<PATCH_NUM_LOW_ENTRIES;loop++){
+ /* check the jump table with the new values.*/
+ if (pPatch->patchEntries[loop] != 0){
+ data = ReadReg (pProHW, pProslic->channel, jmp_table_low);
+ if (data != ((pPatch->patchEntries[loop])&0xff))
+ err_low = 1;
+ data = ReadReg (pProHW, pProslic->channel, jmp_table_low+1);
+ if (data != (pPatch->patchEntries[loop]>>8))
+ err_low = 1;
+ }
+ jmp_table_low+=2;
+ }
+ if (err_low){
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sERROR: patch verify table low : channel %d\n", LOGPRINT_PREFIX, pProslic->channel);
+#endif
+ }
+
+ /**
+ * Verify jump table high entries
+ */
+ jmp_table_high=PATCH_JMPTBL_HIGH_ADDR;
+ for (loop=0;loop<PATCH_NUM_HIGH_ENTRIES;loop++)
+ {
+ if (pPatch->patchEntries[loop+PATCH_NUM_LOW_ENTRIES] != 0)
+ {
+ ramdata = ReadRAM (pProHW, pProslic->channel, jmp_table_high);
+ if (ramdata != (((uInt32)(pPatch->patchEntries[loop+PATCH_NUM_LOW_ENTRIES]))&(0x00001fffL)))
+ err_high = 1;
+ }
+ jmp_table_high++;
+ }
+ if (err_high){
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sERROR: patch verify table high : channel %d\n", LOGPRINT_PREFIX, pProslic->channel);
+#endif
+ }
+
+
+ /**
+ * If no errors, re-enable the patch
+ */
+
+ if(!(err_ram | err_low | err_high))
+ WriteReg (pProHW, pProslic->channel, JMPEN,1); /*enable the patch*/
+
+ setUserMode(pProslic,FALSE); /*turn off user mode*/
+
+ if(err_ram)
+ return RC_PATCH_RAM_VERIFY_FAIL;
+ else if(err_low | err_high)
+ return RC_PATCH_ENTRY_VERIFY_FAIL;
+ else
+ return RC_NONE;
+}
+
+
+/*
+** Function: Si3226x_SetLoopbackMode
+**
+** Description:
+** Program desired loopback test mode
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** newMode: desired loopback mode tag
+**
+** Returns:
+** 0
+*/
+int Si3226x_SetLoopbackMode (proslicChanType_ptr pProslic, ProslicLoopbackModes newMode){
+ uInt8 regTemp;
+ regTemp = ReadReg (pProHW,pProslic->channel,LOOPBACK);
+ switch (newMode){
+ case PROSLIC_LOOPBACK_NONE:
+ WriteReg (pProHW,pProslic->channel,LOOPBACK,regTemp&~(0x11));
+ break;
+ case PROSLIC_LOOPBACK_DIG:
+ WriteReg (pProHW,pProslic->channel,LOOPBACK,regTemp|(0x1));
+ break;
+ case PROSLIC_LOOPBACK_ANA:
+ WriteReg (pProHW,pProslic->channel,LOOPBACK,regTemp|(0x10));
+ break;
+ }
+ return 0;
+}
+
+/*
+** Function: Si3226x_SetMuteStatus
+**
+** Description:
+** configure RX and TX path mutes
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** muteEn: mute configuration tag
+**
+** Returns:
+** 0
+*/
+int Si3226x_SetMuteStatus (proslicChanType_ptr pProslic, ProslicMuteModes muteEn){
+ uInt8 regTemp;
+ uInt8 newRegValue;
+
+ regTemp = ReadReg (pProHW,pProslic->channel,DIGCON);
+ newRegValue = regTemp &~(0x3);
+
+ WriteReg (pProHW,pProslic->channel,DIGCON,regTemp&~(0x3));
+
+ if (muteEn & PROSLIC_MUTE_RX){
+ newRegValue |= 1;
+ }
+ if (muteEn & PROSLIC_MUTE_TX){
+ newRegValue |= 2;
+ }
+
+ if(newRegValue != regTemp)
+ {
+ WriteReg (pProHW,pProslic->channel,DIGCON,newRegValue);
+ }
+ return 0;
+}
+
+/*
+** Function: Si3226x_EnableInterrupts
+**
+** Description:
+** Enables interrupts
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+**
+** Returns:
+** 0
+*/
+int Si3226x_EnableInterrupts (proslicChanType_ptr pProslic){
+ WriteReg (pProHW,pProslic->channel,IRQEN1,Si3226x_General_Configuration.irqen1);
+ WriteReg (pProHW,pProslic->channel,IRQEN2,Si3226x_General_Configuration.irqen2);
+ WriteReg (pProHW,pProslic->channel,IRQEN3,Si3226x_General_Configuration.irqen3);
+ WriteReg (pProHW,pProslic->channel,IRQEN4,Si3226x_General_Configuration.irqen4);
+ return 0;
+}
+
+/*
+** Function: Si3226x_DisableInterrupts
+**
+** Description:
+** Disables/clears interrupts
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+**
+** Returns:
+** 0
+*/
+int Si3226x_DisableInterrupts (proslicChanType_ptr pProslic){
+ uInt8 i;
+#ifdef GCI_MODE
+ uInt8 data[4];
+#else
+ uInt8 scratch;
+#endif
+ for(i = 0; i < 4; i++)
+ {
+ WriteReg (pProHW,pProslic->channel,IRQEN1+i,0);
+ }
+
+#ifdef GCI_MODE
+ data[0] = ReadReg(pProHW,pProslic->channel,IRQ1);
+ data[1] = ReadReg(pProHW,pProslic->channel,IRQ2);
+ data[2] = ReadReg(pProHW,pProslic->channel,IRQ3);
+ data[3] = ReadReg(pProHW,pProslic->channel,IRQ4);
+
+ WriteReg(pProHW,pProslic->channel,IRQ1,data[0]); /*clear interrupts (gci only)*/
+ WriteReg(pProHW,pProslic->channel,IRQ2,data[1]);
+ WriteReg(pProHW,pProslic->channel,IRQ3,data[2]);
+ WriteReg(pProHW,pProslic->channel,IRQ4,data[3]);
+#else
+ for(i = 0; i < 4; i++)
+ {
+ scratch = ReadReg(pProHW,pProslic->channel,IRQ1+i);
+ }
+
+ if(scratch)
+ {
+ }
+#endif
+ return RC_NONE;
+}
+
+/*
+** Function: Si3226x_CheckCIDBuffer
+**
+** Description:
+** configure fsk
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** fskBufAvail: fsk buffer available flag
+**
+** Returns:
+** 0
+*/
+int Si3226x_CheckCIDBuffer (proslicChanType *pProslic, uInt8 *fskBufAvail){
+ uInt8 data;
+ data = ReadReg(pProHW,pProslic->channel,IRQ1);
+ WriteReg(pProHW,pProslic->channel,IRQ1,data); /*clear (for GCI)*/
+ *fskBufAvail = (data&0x40) ? 1 : 0;
+ return 0;
+}
+
+
+/*
+**
+** PROSLIC CONFIGURATION FUNCTIONS
+**
+*/
+
+/*
+** Function: Si3226x_RingSetup
+**
+** Description:
+** configure ringing
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** preset: ring preset
+**
+** Returns:
+** 0
+*/
+#ifndef DISABLE_RING_SETUP
+int Si3226x_RingSetup (proslicChanType *pProslic, int preset){
+
+ WriteRAM(pProHW,pProslic->channel,RTPER,Si3226x_Ring_Presets[preset].rtper);
+ WriteRAM(pProHW,pProslic->channel,RINGFR,Si3226x_Ring_Presets[preset].freq);
+ WriteRAM(pProHW,pProslic->channel,RINGAMP,Si3226x_Ring_Presets[preset].amp);
+ WriteRAM(pProHW,pProslic->channel,RINGPHAS,Si3226x_Ring_Presets[preset].phas);
+ WriteRAM(pProHW,pProslic->channel,RINGOF,Si3226x_Ring_Presets[preset].offset);
+ WriteRAM(pProHW,pProslic->channel,SLOPE_RING,Si3226x_Ring_Presets[preset].slope_ring);
+ WriteRAM(pProHW,pProslic->channel,IRING_LIM,Si3226x_Ring_Presets[preset].iring_lim);
+#ifdef SILAB_SUPPORT_LCQC
+ WriteRAM(pProHW,pProslic->channel,UNUSED226,((Si3226x_Ring_Presets[preset].iring_lim)/100)*391); //add by Henry H for Low Peak Current 2014.05.15
+#endif
+ WriteRAM(pProHW,pProslic->channel,RTACTH,Si3226x_Ring_Presets[preset].rtacth);
+ WriteRAM(pProHW,pProslic->channel,RTDCTH,Si3226x_Ring_Presets[preset].rtdcth);
+ WriteRAM(pProHW,pProslic->channel,RTACDB,Si3226x_Ring_Presets[preset].rtacdb);
+ WriteRAM(pProHW,pProslic->channel,RTDCDB,Si3226x_Ring_Presets[preset].rtdcdb);
+ WriteRAM(pProHW,pProslic->channel,VOV_RING_BAT,Si3226x_Ring_Presets[preset].vov_ring_bat);
+ WriteRAM(pProHW,pProslic->channel,VOV_RING_GND,Si3226x_Ring_Presets[preset].vov_ring_gnd);
+
+ /* Always limit VBATR_EXPECT to the general configuration maximum */
+#ifndef NOCLAMP_VBATR
+ if(Si3226x_Ring_Presets[preset].vbatr_expect > Si3226x_General_Configuration.vbatr_expect)
+ {
+ WriteRAM(pProHW,pProslic->channel,VBATR_EXPECT,Si3226x_General_Configuration.vbatr_expect);
+ #ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT("%sVBATR_EXPECT : Clamped to Gen Conf Limit\n", LOGPRINT_PREFIX);
+ }
+ #endif
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,VBATR_EXPECT,Si3226x_Ring_Presets[preset].vbatr_expect);
+ }
+#else
+ WriteRAM(pProHW,pProslic->channel,VBATR_EXPECT,Si3226x_Ring_Presets[preset].vbatr_expect);
+#endif
+
+ WriteReg(pProHW,pProslic->channel,RINGTALO,Si3226x_Ring_Presets[preset].talo);
+ WriteReg(pProHW,pProslic->channel,RINGTAHI,Si3226x_Ring_Presets[preset].tahi);
+ WriteReg(pProHW,pProslic->channel,RINGTILO,Si3226x_Ring_Presets[preset].tilo);
+ WriteReg(pProHW,pProslic->channel,RINGTIHI,Si3226x_Ring_Presets[preset].tihi);
+
+ WriteRAM(pProHW,pProslic->channel,DCDC_VREF_MIN_RNG,Si3226x_Ring_Presets[preset].vbat_track_min_rng);
+ WriteReg(pProHW,pProslic->channel,RINGCON,Si3226x_Ring_Presets[preset].ringcon);
+ WriteReg(pProHW,pProslic->channel,USERSTAT,Si3226x_Ring_Presets[preset].userstat);
+ WriteRAM(pProHW,pProslic->channel,VCM_RING,Si3226x_Ring_Presets[preset].vcm_ring);
+ WriteRAM(pProHW,pProslic->channel,VCM_RING_FIXED,Si3226x_Ring_Presets[preset].vcm_ring_fixed);
+ WriteRAM(pProHW,pProslic->channel,DELTA_VCM,Si3226x_Ring_Presets[preset].delta_vcm);
+
+ /* Smart VOV Parameters - set during ProSLIC_Init(). */
+ /* Compile option left to use ring preset values */
+#ifdef ENABLE_RING_PRESET_SMART_VOV
+#if 0 /* by wanghaolei to reduce the parameters */
+ WriteRAM(pProHW,pProslic->channel,VOV_DCDC_SLOPE,Si3226x_Ring_Presets[preset].vov_dcdc_slope);
+ WriteRAM(pProHW,pProslic->channel,VOV_DCDC_OS,Si3226x_Ring_Presets[preset].vov_dcdc_os);
+ WriteRAM(pProHW,pProslic->channel,VOV_RING_BAT_MAX,Si3226x_Ring_Presets[preset].vov_ring_bat_max);
+#else
+ WriteRAM(pProHW,pProslic->channel,VOV_DCDC_SLOPE,0x00FFFFFFL);
+ WriteRAM(pProHW,pProslic->channel,VOV_DCDC_OS,0x00A18937L);
+ WriteRAM(pProHW,pProslic->channel,VOV_RING_BAT_MAX,0x00E49BA5L);
+#endif
+#endif
+
+ /* Clamp IRING_LIM to 60mA max if QSS */
+ if(Si3226x_General_Configuration.batType == BO_DCDC_QSS)
+ {
+ WriteRAM(pProHW,pProslic->channel,IRING_LIM,QSS_IRING_LIM_MAX);
+ }
+ setUserMode(pProslic,TRUE);
+ WriteRAM(pProHW,pProslic->channel,DCDC_RNGTYPE,Si3226x_Ring_Presets[preset].dcdc_rngtype);
+ setUserMode(pProslic,FALSE);
+
+ return 0;
+}
+#endif
+/*
+** Function: Si3226x_ToneGenSetup
+**
+** Description:
+** configure tone generators
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** preset: tone generator preset
+**
+** Returns:
+** 0
+*/
+#ifndef DISABLE_TONE_SETUP
+int Si3226x_ToneGenSetup (proslicChanType *pProslic, int preset, uInt8 bOscillator2En){
+ uInt8 omode = 0;
+
+ WriteRAM(pProHW,pProslic->channel,OSC1FREQ,Si3226x_Tone_Presets[preset].osc1.freq);
+ WriteRAM(pProHW,pProslic->channel,OSC1AMP,Si3226x_Tone_Presets[preset].osc1.amp);
+ WriteRAM(pProHW,pProslic->channel,OSC1PHAS,Si3226x_Tone_Presets[preset].osc1.phas);
+ WriteReg(pProHW,pProslic->channel,O1TAHI,(Si3226x_Tone_Presets[preset].osc1.tahi));
+ WriteReg(pProHW,pProslic->channel,O1TALO,(Si3226x_Tone_Presets[preset].osc1.talo));
+ WriteReg(pProHW,pProslic->channel,O1TIHI,(Si3226x_Tone_Presets[preset].osc1.tihi));
+ WriteReg(pProHW,pProslic->channel,O1TILO,(Si3226x_Tone_Presets[preset].osc1.tilo));
+ WriteRAM(pProHW,pProslic->channel,OSC2FREQ,Si3226x_Tone_Presets[preset].osc2.freq);
+ WriteRAM(pProHW,pProslic->channel,OSC2AMP,Si3226x_Tone_Presets[preset].osc2.amp);
+ WriteRAM(pProHW,pProslic->channel,OSC2PHAS,Si3226x_Tone_Presets[preset].osc2.phas);
+ WriteReg(pProHW,pProslic->channel,O2TAHI,(Si3226x_Tone_Presets[preset].osc2.tahi));
+ WriteReg(pProHW,pProslic->channel,O2TALO,(Si3226x_Tone_Presets[preset].osc2.talo));
+ WriteReg(pProHW,pProslic->channel,O2TIHI,(Si3226x_Tone_Presets[preset].osc2.tihi));
+ WriteReg(pProHW,pProslic->channel,O2TILO,(Si3226x_Tone_Presets[preset].osc2.tilo));
+ omode = Si3226x_Tone_Presets[preset].omode;
+ omode &= (bOscillator2En ? 0xFF:0xCF);
+ WriteReg(pProHW,pProslic->channel,OMODE,omode);
+ return 0;
+}
+#endif
+/*
+** Function: Si3226x_FSKSetup
+**
+** Description:
+** configure fsk
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** preset: fsk preset
+**
+** Returns:
+** 0
+*/
+#ifndef DISABLE_FSK_SETUP
+int Si3226x_FSKSetup (proslicChanType *pProslic, int preset){
+ uInt8 data;
+
+ WriteReg(pProHW,pProslic->channel,FSKDEPTH,0x08);/* Clear Buffer */
+ WriteReg(pProHW,pProslic->channel,O1TAHI,0);
+ WriteReg(pProHW,pProslic->channel,O1TIHI,0);
+ WriteReg(pProHW,pProslic->channel,O1TILO,0);
+ WriteReg(pProHW,pProslic->channel,O1TALO,0x13);
+
+ data = ReadReg(pProHW,pProslic->channel,OMODE);
+ if (Si3226x_FSK_Presets[preset].eightBit)
+ data |= 0x80;
+ else
+ data &= ~(0x80);
+ WriteReg(pProHW,pProslic->channel,FSKDEPTH,Si3226x_FSK_Presets[preset].fskdepth);
+ WriteReg(pProHW,pProslic->channel,OMODE,data);
+ WriteRAM(pProHW,pProslic->channel,FSK01,Si3226x_FSK_Presets[preset].fsk01);
+ WriteRAM(pProHW,pProslic->channel,FSK10,Si3226x_FSK_Presets[preset].fsk10);
+ WriteRAM(pProHW,pProslic->channel,FSKAMP0,Si3226x_FSK_Presets[preset].fskamp0);
+ WriteRAM(pProHW,pProslic->channel,FSKAMP1,Si3226x_FSK_Presets[preset].fskamp1);
+ WriteRAM(pProHW,pProslic->channel,FSKFREQ0,Si3226x_FSK_Presets[preset].fskfreq0);
+ WriteRAM(pProHW,pProslic->channel,FSKFREQ1,Si3226x_FSK_Presets[preset].fskfreq1);
+ return 0;
+}
+#endif
+
+/*
+ * Function: Si3226x_ModifyStartBits
+ *
+ * Description: To change the FSK start/stop bits field.
+ * Returns RC_NONE if OK.
+ */
+int Si3226x_ModifyCIDStartBits(proslicChanType_ptr pProslic, uInt8 enable_startStop)
+{
+ uInt8 data;
+
+ if(pProslic->channelType != PROSLIC)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ data = ReadReg(pProHW,pProslic->channel,OMODE);
+
+ if(enable_startStop == FALSE)
+ {
+ data &= ~0x80;
+ }
+ else
+ {
+ data |= 0x80;
+ }
+
+ WriteReg(pProHW,pProslic->channel,OMODE,data);
+
+ return RC_NONE;
+}
+
+/*
+** Function: Si3226x_DTMFDecodeSetup
+**
+** Description:
+** configure dtmf decode
+**
+** Input Parameters:
+** pProslic: pointer to PROSLIC channel obj
+** preset: dtmf preset
+**
+** Returns:
+** 0
+*/
+#ifndef DISABLE_DTMF_SETUP
+int Si3226x_DTMFDecodeSetup (proslicChanType *pProslic, int preset){
+
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B0_1,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b0_1);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B1_1,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b1_1);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B2_1,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b2_1);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_A1_1,Si3226x_DTMFDec_Presets[preset].dtmfdtf_a1_1);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_A2_1,Si3226x_DTMFDec_Presets[preset].dtmfdtf_a2_1);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B0_2,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b0_2);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B1_2,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b1_2);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B2_2,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b2_2);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_A1_2,Si3226x_DTMFDec_Presets[preset].dtmfdtf_a1_2);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_A2_2,Si3226x_DTMFDec_Presets[preset].dtmfdtf_a2_2);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B0_3,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b0_3);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B1_3,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b1_3);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_B2_3,Si3226x_DTMFDec_Presets[preset].dtmfdtf_b2_3);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_A1_3,Si3226x_DTMFDec_Presets[preset].dtmfdtf_a1_3);
+ WriteRAM(pProHW,pProslic->channel,DTMFDTF_A2_3,Si3226x_DTMFDec_Presets[preset].dtmfdtf_a2_3);
+ return 0;
+}
+#endif
+
+
+/*
+** Function: PROSLIC_SetProfile
+**
+** Description:
+** set country profile of the proslic
+*/
+int Si3226x_SetProfile (proslicChanType *pProslic, int preset){
+ /*TO DO
+ Will be filled in at a later date*/
+ SILABS_UNREFERENCED_PARAMETER(preset);
+ SILABS_UNREFERENCED_PARAMETER(pProslic);
+ return 0;
+}
+
+/*
+** Function: PROSLIC_ZsynthSetup
+**
+** Description:
+** configure impedence synthesis
+*/
+#ifndef DISABLE_ZSYNTH_SETUP
+int Si3226x_ZsynthSetup (proslicChanType *pProslic, int preset){
+ uInt8 lf;
+ uInt8 cal_en = 0;
+ uInt16 timer = 500;
+
+ lf = ReadReg(pProHW,pProslic->channel,LINEFEED);
+ WriteReg(pProHW,pProslic->channel,LINEFEED,0);
+ /*
+ ** Load provided coefficients - these are presumed to be 0dB/0dB
+ */
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C0,Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c0);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C1,Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c1);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C2,Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c2);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C3,Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c3);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C0,Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c0);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C1,Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c1);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C2,Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c2);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C3,Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c3);
+ WriteRAM(pProHW,pProslic->channel,ECFIR_C2,Si3226x_Impedance_Presets[preset].hybrid.ecfir_c2);
+ WriteRAM(pProHW,pProslic->channel,ECFIR_C3,Si3226x_Impedance_Presets[preset].hybrid.ecfir_c3);
+ WriteRAM(pProHW,pProslic->channel,ECFIR_C4,Si3226x_Impedance_Presets[preset].hybrid.ecfir_c4);
+ WriteRAM(pProHW,pProslic->channel,ECFIR_C5,Si3226x_Impedance_Presets[preset].hybrid.ecfir_c5);
+ WriteRAM(pProHW,pProslic->channel,ECFIR_C6,Si3226x_Impedance_Presets[preset].hybrid.ecfir_c6);
+ WriteRAM(pProHW,pProslic->channel,ECFIR_C7,Si3226x_Impedance_Presets[preset].hybrid.ecfir_c7);
+ WriteRAM(pProHW,pProslic->channel,ECFIR_C8,Si3226x_Impedance_Presets[preset].hybrid.ecfir_c8);
+ WriteRAM(pProHW,pProslic->channel,ECFIR_C9,Si3226x_Impedance_Presets[preset].hybrid.ecfir_c9);
+ WriteRAM(pProHW,pProslic->channel,ECIIR_B0,Si3226x_Impedance_Presets[preset].hybrid.ecfir_b0);
+ WriteRAM(pProHW,pProslic->channel,ECIIR_B1,Si3226x_Impedance_Presets[preset].hybrid.ecfir_b1);
+ WriteRAM(pProHW,pProslic->channel,ECIIR_A1,Si3226x_Impedance_Presets[preset].hybrid.ecfir_a1);
+ WriteRAM(pProHW,pProslic->channel,ECIIR_A2,Si3226x_Impedance_Presets[preset].hybrid.ecfir_a2);
+ WriteRAM(pProHW,pProslic->channel,ZSYNTH_A1,Si3226x_Impedance_Presets[preset].zsynth.zsynth_a1);
+ WriteRAM(pProHW,pProslic->channel,ZSYNTH_A2,Si3226x_Impedance_Presets[preset].zsynth.zsynth_a2);
+ WriteRAM(pProHW,pProslic->channel,ZSYNTH_B1,Si3226x_Impedance_Presets[preset].zsynth.zsynth_b1);
+ WriteRAM(pProHW,pProslic->channel,ZSYNTH_B0,Si3226x_Impedance_Presets[preset].zsynth.zsynth_b0);
+ WriteRAM(pProHW,pProslic->channel,ZSYNTH_B2,Si3226x_Impedance_Presets[preset].zsynth.zsynth_b2);
+ WriteReg(pProHW,pProslic->channel,RA,Si3226x_Impedance_Presets[preset].zsynth.ra);
+ WriteRAM(pProHW,pProslic->channel,TXACGAIN,Si3226x_Impedance_Presets[preset].txgain);
+ WriteRAM(pProHW,pProslic->channel,RXACGAIN_SAVE,Si3226x_Impedance_Presets[preset].rxgain);
+ WriteRAM(pProHW,pProslic->channel,RXACGAIN,Si3226x_Impedance_Presets[preset].rxgain);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_B0_1,Si3226x_Impedance_Presets[preset].rxachpf_b0_1);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_B1_1,Si3226x_Impedance_Presets[preset].rxachpf_b1_1);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_A1_1,Si3226x_Impedance_Presets[preset].rxachpf_a1_1);
+
+ /*
+ ** Scale based on desired gain plan
+ */
+ Si3226x_dbgSetTXGain(pProslic,Si3226x_Impedance_Presets[preset].txgain_db,preset,TXACGAIN_SEL);
+ Si3226x_dbgSetRXGain(pProslic,Si3226x_Impedance_Presets[preset].rxgain_db,preset,RXACGAIN_SEL);
+ Si3226x_TXAudioGainSetup(pProslic,TXACGAIN_SEL);
+ Si3226x_RXAudioGainSetup(pProslic,RXACGAIN_SEL);
+
+ /*
+ ** Perform Zcal in case OHT used (eg. no offhook event to trigger auto Zcal)
+ */
+ WriteReg(pProHW,pProslic->channel,CALR0,0x00);
+ WriteReg(pProHW,pProslic->channel,CALR1,0x40);
+ WriteReg(pProHW,pProslic->channel,CALR2,0x00);
+ WriteReg(pProHW,pProslic->channel,CALR3,0x80); /* start cal */
+
+ /* Wait for zcal to finish */
+ do {
+ cal_en = ReadReg(pProHW,pProslic->channel,CALR3);
+ Delay(pProTimer,1);
+ timer--;
+ }while((cal_en&0x80)&&(timer>0));
+
+ WriteReg(pProHW,pProslic->channel,LINEFEED,lf);
+
+ if(timer > 0) return 0;
+ else return RC_CAL_TIMEOUT;
+}
+#endif
+
+/*
+** Function: PROSLIC_GciCISetup
+**
+** Description:
+** configure CI bits (GCI mode)
+*/
+#ifndef DISABLE_CI_SETUP
+int Si3226x_GciCISetup (proslicChanType *pProslic, int preset){
+ WriteReg(pProHW,pProslic->channel,GCI_CI,Si3226x_CI_Presets[preset].gci_ci);
+ return 0;
+}
+#endif
+/*
+** Function: PROSLIC_ModemDetSetup
+**
+** Description:
+** configure modem detector
+*/
+int Si3226x_ModemDetSetup (proslicChanType *pProslic, int preset){
+ /*TO DO
+ Will be filled in at a later date*/
+ SILABS_UNREFERENCED_PARAMETER(pProslic);
+ SILABS_UNREFERENCED_PARAMETER(preset);
+ return 0;
+}
+
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+*/
+int Si3226x_TXAudioGainSetup (proslicChanType *pProslic, int preset){
+ WriteRAM(pProHW,pProslic->channel,TXACGAIN,Si3226x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C0,Si3226x_audioGain_Presets[preset].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C1,Si3226x_audioGain_Presets[preset].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C2,Si3226x_audioGain_Presets[preset].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C3,Si3226x_audioGain_Presets[preset].aceq_c3);
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_AudioGainScale
+**
+** Description:
+** Multiply path gain by passed value for PGA and EQ scale (no reference to dB,
+** multiply by a scale factor)
+*/
+int Si3226x_AudioGainScale (proslicChanType *pProslic, int preset, uInt32 pga_scale, uInt32 eq_scale,int rx_tx_sel){
+
+ if(rx_tx_sel == TXACGAIN_SEL)
+ {
+ Si3226x_audioGain_Presets[TXACGAIN_SEL].acgain = (Si3226x_Impedance_Presets[preset].txgain/1000)*pga_scale;
+ if (Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c0 & 0x10000000L)
+ Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c1 & 0x10000000L)
+ Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c2 & 0x10000000L)
+ Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c3 & 0x10000000L)
+ Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+ Si3226x_audioGain_Presets[TXACGAIN_SEL].aceq_c0 = ((int32)Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c0/1000)*eq_scale;
+ Si3226x_audioGain_Presets[TXACGAIN_SEL].aceq_c1 = ((int32)Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c1/1000)*eq_scale;
+ Si3226x_audioGain_Presets[TXACGAIN_SEL].aceq_c2 = ((int32)Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c2/1000)*eq_scale;
+ Si3226x_audioGain_Presets[TXACGAIN_SEL].aceq_c3 = ((int32)Si3226x_Impedance_Presets[preset].audioEQ.txaceq_c3/1000)*eq_scale;
+
+ WriteRAM(pProHW,pProslic->channel,TXACGAIN,Si3226x_audioGain_Presets[TXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C0,Si3226x_audioGain_Presets[TXACGAIN_SEL].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C1,Si3226x_audioGain_Presets[TXACGAIN_SEL].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C2,Si3226x_audioGain_Presets[TXACGAIN_SEL].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,TXACEQ_C3,Si3226x_audioGain_Presets[TXACGAIN_SEL].aceq_c3);
+ }
+ else
+ {
+ Si3226x_audioGain_Presets[RXACGAIN_SEL].acgain = (Si3226x_Impedance_Presets[preset].rxgain/1000)*pga_scale;
+ if (Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+ Si3226x_audioGain_Presets[RXACGAIN_SEL].aceq_c0 = ((int32)Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c0/1000)*eq_scale;
+ Si3226x_audioGain_Presets[RXACGAIN_SEL].aceq_c1 = ((int32)Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c1/1000)*eq_scale;
+ Si3226x_audioGain_Presets[RXACGAIN_SEL].aceq_c2 = ((int32)Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c2/1000)*eq_scale;
+ Si3226x_audioGain_Presets[RXACGAIN_SEL].aceq_c3 = ((int32)Si3226x_Impedance_Presets[preset].audioEQ.rxaceq_c3/1000)*eq_scale;
+
+ WriteRAM(pProHW,pProslic->channel,RXACGAIN_SAVE,Si3226x_audioGain_Presets[RXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,RXACGAIN,Si3226x_audioGain_Presets[RXACGAIN_SEL].acgain);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C0,Si3226x_audioGain_Presets[RXACGAIN_SEL].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C1,Si3226x_audioGain_Presets[RXACGAIN_SEL].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C2,Si3226x_audioGain_Presets[RXACGAIN_SEL].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C3,Si3226x_audioGain_Presets[RXACGAIN_SEL].aceq_c3);
+ }
+ return 0;
+}
+int Si3226x_TXAudioGainScale (proslicChanType *pProslic, int preset,uInt32 pga_scale, uInt32 eq_scale)
+{
+ return Si3226x_AudioGainScale(pProslic,preset,pga_scale,eq_scale,TXACGAIN_SEL);
+}
+int Si3226x_RXAudioGainScale (proslicChanType *pProslic, int preset,uInt32 pga_scale, uInt32 eq_scale)
+{
+ return Si3226x_AudioGainScale(pProslic,preset,pga_scale,eq_scale,RXACGAIN_SEL);
+}
+/*
+** Function: PROSLIC_AudioGainSetup
+**
+** Description:
+** configure audio gains
+*/
+int Si3226x_RXAudioGainSetup (proslicChanType *pProslic, int preset){
+ WriteRAM(pProHW,pProslic->channel,RXACGAIN_SAVE,Si3226x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,RXACGAIN,Si3226x_audioGain_Presets[preset].acgain);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C0,Si3226x_audioGain_Presets[preset].aceq_c0);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C1,Si3226x_audioGain_Presets[preset].aceq_c1);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C2,Si3226x_audioGain_Presets[preset].aceq_c2);
+ WriteRAM(pProHW,pProslic->channel,RXACEQ_C3,Si3226x_audioGain_Presets[preset].aceq_c3);
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_DCFeedSetupCfg
+**
+** Description:
+** configure dc feed
+*/
+#ifndef DISABLE_DCFEED_SETUP
+int Si3226x_DCFeedSetupCfg (proslicChanType *pProslic, Si3226x_DCfeed_Cfg *cfg, int preset){
+ uInt8 lf;
+
+ if(pProslic->channelType != PROSLIC) {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ lf = ReadReg(pProHW,pProslic->channel,LINEFEED);
+ WriteReg(pProHW,pProslic->channel,LINEFEED,0);
+ WriteRAM(pProHW,pProslic->channel,SLOPE_VLIM,cfg[preset].slope_vlim);
+ WriteRAM(pProHW,pProslic->channel,SLOPE_RFEED,cfg[preset].slope_rfeed);
+ WriteRAM(pProHW,pProslic->channel,SLOPE_ILIM,cfg[preset].slope_ilim);
+ WriteRAM(pProHW,pProslic->channel,SLOPE_DELTA1,cfg[preset].delta1);
+ WriteRAM(pProHW,pProslic->channel,SLOPE_DELTA2,cfg[preset].delta2);
+ WriteRAM(pProHW,pProslic->channel,V_VLIM,cfg[preset].v_vlim);
+ WriteRAM(pProHW,pProslic->channel,V_RFEED,cfg[preset].v_rfeed);
+ WriteRAM(pProHW,pProslic->channel,V_ILIM,cfg[preset].v_ilim);
+ WriteRAM(pProHW,pProslic->channel,CONST_RFEED,cfg[preset].const_rfeed);
+ WriteRAM(pProHW,pProslic->channel,CONST_ILIM,cfg[preset].const_ilim);
+ WriteRAM(pProHW,pProslic->channel,I_VLIM,cfg[preset].i_vlim);
+ WriteRAM(pProHW,pProslic->channel,LCRONHK,cfg[preset].lcronhk);
+ WriteRAM(pProHW,pProslic->channel,LCROFFHK,cfg[preset].lcroffhk);
+ WriteRAM(pProHW,pProslic->channel,LCRDBI,cfg[preset].lcrdbi);
+ WriteRAM(pProHW,pProslic->channel,LONGHITH,cfg[preset].longhith);
+ WriteRAM(pProHW,pProslic->channel,LONGLOTH,cfg[preset].longloth);
+ WriteRAM(pProHW,pProslic->channel,LONGDBI,cfg[preset].longdbi);
+ WriteRAM(pProHW,pProslic->channel,LCRMASK,cfg[preset].lcrmask);
+ WriteRAM(pProHW,pProslic->channel,LCRMASK_POLREV,cfg[preset].lcrmask_polrev);
+ WriteRAM(pProHW,pProslic->channel,LCRMASK_STATE,cfg[preset].lcrmask_state);
+ WriteRAM(pProHW,pProslic->channel,LCRMASK_LINECAP,cfg[preset].lcrmask_linecap);
+ WriteRAM(pProHW,pProslic->channel,VCM_OH,cfg[preset].vcm_oh);
+ WriteRAM(pProHW,pProslic->channel,VOV_BAT,cfg[preset].vov_bat);
+ WriteRAM(pProHW,pProslic->channel,VOV_GND,cfg[preset].vov_gnd);
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+#define VOV_BAT_6V 0x624DD2L /* 6v */
+ if(Si3226x_General_Configuration.bomOpt == BO_DCDC_FIXED_RAIL)
+ {
+ WriteRAM(pProHW,pProslic->channel,VOV_BAT,VOV_BAT_6V);
+ }
+#endif
+ WriteReg(pProHW,pProslic->channel,LINEFEED,lf);
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_DCFeedSetup
+**
+** Description:
+** configure dc feed
+*/
+int Si3226x_DCFeedSetup (proslicChanType *pProslic, int preset){
+ Si3226x_DCFeedSetupCfg(pProslic,Si3226x_DCfeed_Presets,preset);
+ return RC_NONE;
+}
+#endif
+
+
+/*
+** Function: PROSLIC_GPIOSetup
+**
+** Description:
+** configure gpio
+*/
+#ifndef DISABLE_GPIO_SETUP
+int Si3226x_GPIOSetup (proslicChanType *pProslic){
+ uInt8 data;
+ data = ReadReg(pProHW,pProslic->channel,GPIO);
+ data |= Si3226x_GPIO_Configuration.outputEn << 4;
+ WriteReg(pProHW,pProslic->channel,GPIO,data);
+ data = Si3226x_GPIO_Configuration.analog << 4;
+ data |= Si3226x_GPIO_Configuration.direction;
+ WriteReg(pProHW,pProslic->channel,GPIO_CFG1,data);
+ data = Si3226x_GPIO_Configuration.manual << 4;
+ data |= Si3226x_GPIO_Configuration.polarity;
+ WriteReg(pProHW,pProslic->channel,GPIO_CFG2,data);
+ data |= Si3226x_GPIO_Configuration.openDrain;
+ WriteReg(pProHW,pProslic->channel,GPIO_CFG3,data);
+ return 0;
+}
+#endif
+
+/*
+** Function: PROSLIC_PulseMeterSetup
+**
+** Description:
+** configure pulse metering
+*/
+#ifndef DISABLE_PULSE_SETUP
+int Si3226x_PulseMeterSetup (proslicChanType *pProslic, int preset){
+ uInt8 reg;
+ WriteRAM(pProHW,pProslic->channel,PM_AMP_THRESH,Si3226x_PulseMeter_Presets[preset].pm_amp_thresh);
+ reg = (Si3226x_PulseMeter_Presets[preset].pm_freq<<1)|(Si3226x_PulseMeter_Presets[preset].pm_auto<<3);
+ setUserMode(pProslic,1);
+ WriteRAM(pProHW,pProslic->channel,PM_ACTIVE,Si3226x_PulseMeter_Presets[preset].pm_active);
+ WriteRAM(pProHW,pProslic->channel,PM_INACTIVE,Si3226x_PulseMeter_Presets[preset].pm_inactive);
+ WriteReg(pProHW,pProslic->channel,PMCON,reg);
+ setUserMode(pProslic,0);
+ return 0;
+}
+#endif
+/*
+** Function: PROSLIC_PCMSetup
+**
+** Description:
+** configure pcm
+*/
+#ifndef DISABLE_PCM_SETUP
+int Si3226x_PCMSetup (proslicChanType *pProslic, int preset){
+ uInt8 regTemp;
+
+ if (Si3226x_PCM_Presets[preset].widebandEn){
+ /* TXIIR settings */
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B0_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B1_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A2_3,0x19D5F700L);
+ /* RXIIR settings */
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B0_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B1_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A2_3,0x19D5F700L);
+ /*
+ ** RXHPF
+ ** Note: Calling ProSLIC_ZsynthSetup() will overwrite some
+ ** of these values. ProSLIC_PCMSetup() should always
+ ** be called after loading coefficients when using
+ ** wideband mode
+ */
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_B0_1,0x7CFF900L);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_B1_1,0x18300700L);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_A1_1,0x79FF201L);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_B0_2,0x7CEDA1DL);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_B1_2,0x106320D4L);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_B2_2,0x7CEDA1DL);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_A1_2,0xF9A910FL);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_A2_2,0x185FFDA8L);
+ WriteRAM(pProHW,pProslic->channel,RXACHPF_GAIN,0x08000000L);
+ /* TXHPF */
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_B0_1,0x0C7FF4CEL);
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_B1_1,0x13800B32L);
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_A1_1,0x079FF201L);
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_B0_2,0x030FDD10L);
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_B1_2,0x19E0996CL);
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_B2_2,0x030FDD10L);
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_A1_2,0x0F9A910FL);
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_A2_2,0x185FFDA8L);
+ WriteRAM(pProHW,pProslic->channel,TXACHPF_GAIN,0x0CD30000L);
+
+ regTemp = ReadReg(pProHW,pProslic->channel,DIGCON);
+#ifndef DISABLE_HPF_WIDEBAND
+ WriteReg(pProHW,pProslic->channel,DIGCON,regTemp&~(0xC)); /* Enable HPF */
+#else
+ WriteReg(pProHW,pProslic->channel,DIGCON,regTemp|(0xC)); /* Disable HPF */
+#endif
+ regTemp = ReadReg(pProHW,pProslic->channel,ENHANCE);
+ WriteReg(pProHW,pProslic->channel,ENHANCE,regTemp|1);
+ } else {
+ regTemp = ReadReg(pProHW,pProslic->channel,DIGCON);
+ WriteReg(pProHW,pProslic->channel,DIGCON,regTemp&~(0xC));
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B0_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B1_1,0x3538E80L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,TXACIIR_A2_3,0x19D5F700L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B0_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B1_1,0x6A71D00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A1_1,0x1AA9100L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B0_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B1_2,0x2505400L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B2_2,0x216D100L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A1_2,0x2CB8100L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A2_2,0x1D7FA500L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B0_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B1_3,0x1276D00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_B2_3,0x2CD9B00L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A1_3,0x2335300L);
+ WriteRAM(pProHW,pProslic->channel,RXACIIR_A2_3,0x19D5F700L);
+ regTemp = ReadReg(pProHW,pProslic->channel,ENHANCE);
+ WriteReg(pProHW,pProslic->channel,ENHANCE,regTemp&~(1));
+ }
+ regTemp = Si3226x_PCM_Presets[preset].pcmFormat;
+ regTemp |= Si3226x_PCM_Presets[preset].pcm_tri << 5;
+ regTemp |= Si3226x_PCM_Presets[preset].alaw_inv << 2;
+ WriteReg(pProHW,pProslic->channel,PCMMODE,regTemp);
+ regTemp = ReadReg(pProHW,pProslic->channel,PCMTXHI);
+ regTemp &= 3;
+ regTemp |= Si3226x_PCM_Presets[preset].tx_edge<<4;
+ WriteReg(pProHW,pProslic->channel,PCMTXHI,regTemp);
+
+ return 0;
+}
+#endif
+/*
+** Function: PROSLIC_PCMTimeSlotSetup
+**
+** Description:
+** configure pcm
+*/
+int Si3226x_PCMTimeSlotSetup (proslicChanType *pProslic, uInt16 rxcount, uInt16 txcount){
+ uInt8 data;
+ data = txcount & 0xff;
+ WriteReg(pProHW,pProslic->channel,PCMTXLO,data);
+ data = txcount >> 8 ;
+ WriteReg(pProHW,pProslic->channel,PCMTXHI,data);
+ data = rxcount & 0xff;
+ WriteReg(pProHW,pProslic->channel,PCMRXLO,data);
+ data = rxcount >> 8 ;
+ WriteReg(pProHW,pProslic->channel,PCMRXHI,data);
+
+ return 0;
+}
+
+/*
+**
+** PROSLIC CONTROL FUNCTIONS
+**
+*/
+
+
+
+/*
+** Function: PROSLIC_GetInterrupts
+**
+** Description:
+** Reads interrupt registers status (IRQ1-4)
+**
+** Returns:
+** array of pending interrupts of type proslicIntType*
+**
+*/
+int Si3226x_GetInterrupts (proslicChanType *pProslic,proslicIntType *pIntData){
+ /*Reading the interrupt registers and will clear any bits which are set (SPI mode only)
+ Multiple interrupts may occur at once so bear that in mind when
+ writing an interrupt handling routine*/
+ uInt8 data[4];
+ int i,j,k;
+ int safetyInt = 0;
+ pIntData->number = 0;
+
+
+ if(pProslic->channelType != PROSLIC) {
+ return RC_IGNORE;
+ }
+
+ data[0] = ReadReg(pProHW,pProslic->channel,IRQ1);
+ data[1] = ReadReg(pProHW,pProslic->channel,IRQ2);
+ data[2] = ReadReg(pProHW,pProslic->channel,IRQ3);
+ data[3] = ReadReg(pProHW,pProslic->channel,IRQ4);
+#ifdef GCI_MODE
+ WriteReg(pProHW,pProslic->channel,IRQ1,data[0]); /*clear interrupts (gci only)*/
+ WriteReg(pProHW,pProslic->channel,IRQ2,data[1]);
+ WriteReg(pProHW,pProslic->channel,IRQ3,data[2]);
+ WriteReg(pProHW,pProslic->channel,IRQ4,data[3]);
+#endif
+ for (i=0;i<4;i++){
+ for (j=0;j<8;j++){
+ if (data[i]&(1<<j)){
+ switch (j + (i*8)){
+ /* IRQ 1 */
+ case IRQ_OSC1_T1_SI3226X: /* IRQ1.0 */
+ k=IRQ_OSC1_T1;
+ break;
+ case IRQ_OSC1_T2_SI3226X: /* IRQ1.1 */
+ k=IRQ_OSC1_T2;
+ break;
+ case IRQ_OSC2_T1_SI3226X: /* IRQ1.2 */
+ k=IRQ_OSC2_T1;
+ break;
+ case IRQ_OSC2_T2_SI3226X: /* IRQ1.3 */
+ k=IRQ_OSC2_T2;
+ break;
+ case IRQ_RING_T1_SI3226X: /* IRQ1.4 */
+ k=IRQ_RING_T1;
+ break;
+ case IRQ_RING_T2_SI3226X: /* IRQ1.5 */
+ k=IRQ_RING_T2;
+ break;
+ case IRQ_FSKBUF_AVAIL_SI3226X:/* IRQ1.6 */
+ k=IRQ_FSKBUF_AVAIL;
+ break;
+ case IRQ_VBAT_SI3226X: /* IRQ1.7 */
+ k=IRQ_VBAT;
+ break;
+ /* IRQ2 */
+ case IRQ_RING_TRIP_SI3226X: /* IRQ2.0 */
+ k=IRQ_RING_TRIP;
+ break;
+ case IRQ_LOOP_STAT_SI3226X: /* IRQ2.1 */
+ k=IRQ_LOOP_STATUS;
+ break;
+ case IRQ_LONG_STAT_SI3226X: /* IRQ2.2 */
+ k=IRQ_LONG_STAT;
+ break;
+ case IRQ_VOC_TRACK_SI3226X: /* IRQ2.3 */
+ k=IRQ_VOC_TRACK;
+ break;
+ case IRQ_DTMF_SI3226X: /* IRQ2.4 */
+ k=IRQ_DTMF;
+ break;
+ case IRQ_INDIRECT_SI3226X: /* IRQ2.5 */
+ k=IRQ_INDIRECT;
+ break;
+ case IRQ_TXMDM_SI3226X: /* IRQ2.6 */
+ k = IRQ_TXMDM;
+ break;
+ case IRQ_RXMDM_SI3226X: /* IRQ2.7 */
+ k=IRQ_RXMDM;
+ break;
+ /* IRQ3 */
+ case IRQ_P_HVIC_SI3226X: /* IRQ3.0 */
+ k=IRQ_P_HVIC;
+ safetyInt = 1;
+ break;
+ case IRQ_P_THERM_SI3226X: /* IRQ3.1 */
+ k=IRQ_P_THERM;
+ safetyInt = 1;
+ break;
+ case IRQ_PQ3_SI3226X: /* IRQ3.2 */
+ k=IRQ_PQ3;
+ break;
+ case IRQ_PQ4_SI3226X: /* IRQ3.3 */
+ k=IRQ_PQ4;
+ break;
+ case IRQ_PQ5_SI3226X: /* IRQ3.4 */
+ k=IRQ_PQ5;
+ break;
+ case IRQ_PQ6_SI3226X: /* IRQ3.5 */
+ k=IRQ_PQ6;
+ break;
+ case IRQ_DSP_SI3226X: /* IRQ3.6 */
+ k=IRQ_DSP;
+ break;
+ case IRQ_MADC_FS_SI3226X: /* IRQ3.7 */
+ k=IRQ_MADC_FS;
+ break;
+ /* IRQ4 */
+ case IRQ_USER_0_SI3226X: /* IRQ4.0 */
+ k=IRQ_USER_0;
+ break;
+ case IRQ_USER_1_SI3226X: /* IRQ4.1 */
+ k=IRQ_USER_1;
+ break;
+ case IRQ_USER_2_SI3226X: /* IRQ4.2 */
+ k=IRQ_USER_2;
+ break;
+ case IRQ_USER_3_SI3226X: /* IRQ4.3 */
+ k=IRQ_USER_3;
+ break;
+ case IRQ_USER_4_SI3226X: /* IRQ4.4 */
+ k=IRQ_USER_4;
+ break;
+ case IRQ_USER_5_SI3226X: /* IRQ4.5 */
+ k=IRQ_USER_5;
+ break;
+ case IRQ_USER_6_SI3226X: /* IRQ4.6 */
+ k=IRQ_USER_6;
+ break;
+ case IRQ_USER_7_SI3226X: /* IRQ4.7 */
+ k=IRQ_USER_7;
+ break;
+ default:
+ k=0xff;
+ }/* switch */
+ pIntData->irqs[pIntData->number] = k;
+ pIntData->number++;
+
+ }/* if */
+ }/* for */
+
+ }
+
+ /* Check for improper Ring Exit if safety interrupt */
+ if(safetyInt)
+ {
+ if(isReinitRequired(pProslic))
+ {
+ return RC_REINIT_REQUIRED;
+ }
+ }
+ return pIntData->number;
+}
+
+
+/*
+** Function: PROSLIC_ReadHookStatus
+**
+** Description:
+** Determine hook status
+*/
+int Si3226x_ReadHookStatus (proslicChanType *pProslic,uInt8 *pHookStat){
+ if (ReadReg(pProHW,pProslic->channel,LCRRTP) & 2)
+ *pHookStat=PROSLIC_OFFHOOK;
+ else
+ *pHookStat=PROSLIC_ONHOOK;
+ return 0;
+}
+
+/*
+** Function: PROSLIC_SetLinefeedStatus
+**
+** Description:
+** Sets linefeed state
+*/
+int Si3226x_SetLinefeedStatus (proslicChanType *pProslic,uInt8 newLinefeed){
+ uInt8 regTemp;
+ WriteReg (pProHW, pProslic->channel, LINEFEED,newLinefeed);
+ if ((newLinefeed&0xf) == LF_RINGING) {
+ /*disable vbat interrupt during ringing*/
+ regTemp = ReadReg(pProHW,pProslic->channel,IRQEN1);
+ WriteReg (pProHW,pProslic->channel,IRQEN1,regTemp&(~0x80));
+ }
+ else{
+ if (pProslic->deviceId->chipRev != 0) {
+ regTemp = ReadReg(pProHW,pProslic->channel,IRQEN1);
+ if (regTemp != 0)
+ WriteReg (pProHW,pProslic->channel,IRQEN1,0x80 | regTemp);
+ }
+ }
+ return 0;
+}
+
+/*
+** Function: Si324x_SetLinefeedStatusBroadcast
+**
+** Description:
+** Sets linefeed state
+*/
+int Si3226x_SetLinefeedStatusBroadcast (proslicChanType *pProslic, uInt8 newLinefeed){
+
+ WriteReg (pProHW, BROADCAST, LINEFEED,newLinefeed);
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_PolRev
+**
+** Description:
+** Sets polarity reversal state
+*/
+int Si3226x_PolRev (proslicChanType *pProslic,uInt8 abrupt, uInt8 newPolRevState){
+ uInt8 data=0;
+
+ if(pProslic->channelType != PROSLIC) {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ /* Cannont polrev/wink while low power mode is active */
+ Si3226x_SetPowersaveMode(pProslic,PWRSAVE_DISABLE);
+
+ if (abrupt)
+ data = 1;
+
+ switch (newPolRevState)
+ {
+ case POLREV_STOP:
+ data |= 0;
+ break;
+ case POLREV_START:
+ data |= 2;
+ break;
+ case WINK_START:
+ data = 6; /* No OR - abrupt wink not allowed */
+ break;
+ case WINK_STOP:
+ data = 4;
+ break;
+ }
+
+ WriteReg(pProHW,pProslic->channel,POLREV,data);
+
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_GPIOControl
+**
+** Description:
+** Sets gpio of the proslic
+*/
+int Si3226x_GPIOControl (proslicChanType *pProslic,uInt8 *pGpioData, uInt8 read){
+ if (read)
+ *pGpioData = 0xf & ReadReg(pProHW,pProslic->channel,GPIO);
+ else{
+ WriteReg(pProHW,pProslic->channel,GPIO,(*pGpioData)|(ReadReg(pProHW,pProslic->channel,GPIO)&0xf0));
+ }
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_MWISetup
+**
+** Description:
+** Modify default vpk or lcrmask_mwi. Passing 0 will result in the parameter
+** not being modified.
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3226x_MWISetup (proslicChanType *pProslic,uInt16 vpk_mag,uInt16 lcrmask_mwi)
+{
+uInt32 ram_val;
+
+ /* Verify MWI not enabled - cannot make changes while enabled */
+ if(ReadReg(pProHW,pProslic->channel,USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ return RC_MWI_IN_USE;
+ }
+
+ /* Voltage mod */
+ if(vpk_mag > 0) /* Skip if 0 passed */
+ {
+ /* Clamp supplied value to allowable range */
+ if(vpk_mag > SIL_MWI_VPK_MAX) vpk_mag = SIL_MWI_VPK_MAX;
+ if(vpk_mag < SIL_MWI_VPK_MIN) vpk_mag = SIL_MWI_VPK_MIN;
+ ram_val = vpk_mag * SCALE_V_MADC * 1000L;
+ WriteRAM(pProHW,pProslic->channel,SI3226X_PRAM_VBATH_NEON,ram_val);
+ }
+
+ /* LCRMASK mod */
+ if(lcrmask_mwi > 0) /* Skip if 0 passed */
+ {
+ /* Clamp supplied value to allowable range */
+ if(lcrmask_mwi > SIL_MWI_LCRMASK_MAX) lcrmask_mwi = SIL_MWI_LCRMASK_MAX;
+ if(lcrmask_mwi < SIL_MWI_LCRMASK_MIN) lcrmask_mwi = SIL_MWI_LCRMASK_MIN;
+ ram_val = lcrmask_mwi * SIL_MWI_LCRMASK_SCALE;
+ WriteRAM(pProHW,pProslic->channel,SI3226X_PRAM_LCRMASK_MWI,ram_val);
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWIEnable
+**
+** Description:
+** Enables MWI feature
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3226x_MWIEnable (proslicChanType *pProslic)
+{
+uInt8 val;
+
+ /*
+ ** Check for conditions that would prevent enabling MWI
+ */
+ ProSLIC_ReadHookStatus(pProslic,&val);
+ if(val != PROSLIC_ONHOOK)
+ {
+ return RC_MWI_ENABLE_FAIL;
+ }
+ else
+ { /* Clear DIAG1 and set USERSTAT enable bit */
+ ProSLIC_SetPowersaveMode(pProslic,PWRSAVE_DISABLE);
+ WriteReg(pProHW,pProslic->channel,DIAG1,SIL_MWI_TOGGLE_LOW);
+ val = ReadReg(pProHW,pProslic->channel,USERSTAT);
+ WriteReg(pProHW,pProslic->channel,USERSTAT,val|SIL_MWI_USTAT_SET);
+ }
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWIDisable
+**
+** Description:
+** Disables MWI feature
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3226x_MWIDisable (proslicChanType *pProslic)
+{
+uInt8 val;
+
+ /* Clear DIAG1 and USERSTAT enable bit */
+ WriteReg(pProHW,pProslic->channel,DIAG1,SIL_MWI_TOGGLE_LOW);
+ val = ReadReg(pProHW,pProslic->channel,USERSTAT);
+ WriteReg(pProHW,pProslic->channel,USERSTAT,val&SIL_MWI_USTAT_CLEAR);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_SetMWIState
+**
+** Description:
+** Set MWI State. Must be enabled via ProSLIC_MWIEnable prior
+** to calling this function
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3226x_SetMWIState(proslicChanType *pProslic,uInt8 flash_on)
+{
+
+ /* Only continue if MWI is enabled */
+ if(ReadReg(pProHW,pProslic->channel,USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ if(flash_on)
+ {
+ WriteReg(pProHW,pProslic->channel,DIAG1,SIL_MWI_TOGGLE_HIGH);
+ }
+ else
+ {
+ WriteReg(pProHW,pProslic->channel,DIAG1,SIL_MWI_TOGGLE_LOW);
+ }
+ }
+ else
+ {
+ return RC_MWI_NOT_ENABLED;
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_GetMWIState
+**
+** Description:
+** Read MWI State. Must be enabled via ProSLIC_MWIEnable prior
+** to calling this function
+**
+** Note: This feature is implemented in patch
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3226x_GetMWIState(proslicChanType *pProslic)
+{
+
+ /* Only continue if MWI is enabled */
+ if(ReadReg(pProHW,pProslic->channel,USERSTAT) & SIL_MWI_USTAT_SET)
+ {
+ if(ReadReg(pProHW,pProslic->channel,DIAG1) & SIL_MWI_TOGGLE_HIGH)
+ return SIL_MWI_FLASH_ON;
+ else
+ return SIL_MWI_FLASH_OFF;
+ }
+ else
+ {
+ return RC_MWI_NOT_ENABLED;
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_MWI
+**
+** Description:
+** Implements message waiting indicator
+**
+** Note: Deprecated. Use Si3226x_SetMWState().
+**
+*/
+#ifdef SIVOICE_NEON_MWI_SUPPORT
+int Si3226x_MWI (proslicChanType *pProslic,uInt8 lampOn){
+ /*message waiting (neon flashing) requires modifications to vbath_expect and slope_vlim.
+ The old values are restored to turn off the lamp. We assume all channels set up the same.
+ During off-hook event lamp must be disabled manually. */
+ static int32 vbath_save = 0;
+ static int32 slope_vlim_save = 0;
+ uInt8 hkStat; int32 slope_vlim_tmp;
+ slope_vlim_tmp = ReadRAM(pProHW,pProslic->channel,SLOPE_VLIM);
+ Si3226x_ReadHookStatus(pProslic,&hkStat);
+
+ if (lampOn && (hkStat == PROSLIC_OFFHOOK) ) {/*cant neon flash during offhook*/
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT ("%s MWI cannot operate offhook\n", LOGPRINT_PREFIX);
+#endif
+ return RC_LINE_IN_USE;
+ }
+
+ if (lampOn) {
+ if (slope_vlim_tmp != 0x8000000L) { /*check we're not already on*/
+ vbath_save = ReadRAM(pProHW,pProslic->channel,VBATH_EXPECT);
+ slope_vlim_save = slope_vlim_tmp;
+ }
+ WriteRAM(pProHW,pProslic->channel,VBATH_EXPECT,0x7AE147AL);/*120V*/
+ WriteRAM(pProHW,pProslic->channel,SLOPE_VLIM,0x8000000L);
+ } else {
+ if (vbath_save != 0) { /*check we saved some valid value first*/
+ WriteRAM(pProHW,pProslic->channel,VBATH_EXPECT,vbath_save);
+ WriteRAM(pProHW,pProslic->channel,SLOPE_VLIM,slope_vlim_save);
+ }
+ }
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: PROSLIC_StartGenericTone
+**
+** Description:
+** start tone generators
+*/
+int Si3226x_ToneGenStart (proslicChanType *pProslic,uInt8 timerEn){
+ uInt8 data;
+ data = ReadReg(pProHW,pProslic->channel,OCON);
+ data |= 0x11 + (timerEn ? 0x66 : 0);
+ WriteReg(pProHW,pProslic->channel,OCON,data);
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_StopTone
+**
+** Description:
+** Stops tone generators
+**
+** Input Parameters:
+** pProslic: pointer to Proslic object
+**
+** Return:
+** none
+*/
+int Si3226x_ToneGenStop (proslicChanType *pProslic){
+ uInt8 data;
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sToneGenStop\n", LOGPRINT_PREFIX);
+#endif
+ data = ReadReg(pProHW,pProslic->channel,OCON);
+ data &= ~(0x77);
+ WriteReg(pProHW,pProslic->channel,OCON,data);
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_StartRing
+**
+** Description:
+** start ring generator
+*/
+int Si3226x_RingStart (proslicChanType *pProslic){
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sRingStart\n", LOGPRINT_PREFIX);
+#endif
+ Si3226x_SetLinefeedStatus(pProslic,LF_RINGING);
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_StopRing
+**
+** Description:
+** Stops ring generator
+*/
+int Si3226x_RingStop (proslicChanType *pProslic){
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sRingStop\n", LOGPRINT_PREFIX);
+#endif
+ Si3226x_SetLinefeedStatus(pProslic,LF_FWD_ACTIVE);
+ return 0;
+}
+
+/*
+** Function: PROSLIC_EnableCID
+**
+** Description:
+** enable fsk
+*/
+int Si3226x_EnableCID (proslicChanType *pProslic){
+ uInt8 data;
+//#ifdef ENABLE_DEBUG
+// if (pProslic->debugMode)
+// LOGPRINT("%sEnableCID\n", LOGPRINT_PREFIX);
+//#endif
+ //add by HenryHuang 2013.5.29 start
+ data = ReadReg(pProHW,pProslic->channel,IRQEN1);
+ WriteReg (pProHW,pProslic->channel,IRQEN1,0x40 | data);
+ WriteReg(pProHW,pProslic->channel,FSKDEPTH,3);
+ //add by HenryHuang 2013.5.29 end
+ WriteReg(pProHW,pProslic->channel,OCON,0);
+
+ data = ReadReg(pProHW,pProslic->channel,OMODE);
+ data |= 0xA;
+ WriteReg(pProHW,pProslic->channel,OMODE,data);
+
+ WriteReg(pProHW,pProslic->channel,OCON,0x5);
+ return 0;
+}
+
+/*
+** Function: PROSLIC_DisableCID
+**
+** Description:
+** disable fsk
+*/
+int Si3226x_DisableCID (proslicChanType *pProslic){
+ uInt8 data;
+//#ifdef ENABLE_DEBUG
+// if (pProslic->debugMode)
+// LOGPRINT("%sDisableCID\n", LOGPRINT_PREFIX);
+//#endif
+ //add by HenryHuang 2013.5.29 start
+ data = ReadReg(pProHW,pProslic->channel,IRQEN1);
+ WriteReg (pProHW,pProslic->channel,IRQEN1,0xBF | data);
+ data = ReadReg(pProHW,pProslic->channel,IRQ1);
+ WriteReg(pProHW,pProslic->channel,IRQ1,data); /*clear (for GCI)*/
+ //add by HenryHuang 2013.5.29 end
+ WriteReg(pProHW,pProslic->channel,OCON,0);
+ data = ReadReg(pProHW,pProslic->channel,OMODE);
+ data &= ~(0x8);
+ WriteReg(pProHW,pProslic->channel,OMODE,data);
+ return 0;
+}
+
+/*
+** Function: PROSLIC_SendCID
+**
+** Description:
+** send fsk data
+*/
+int Si3226x_SendCID (proslicChanType *pProslic, uInt8 *buffer, uInt8 numBytes){
+//#ifdef ENABLE_DEBUG
+// if (pProslic->debugMode)
+// LOGPRINT("%sSendCID\n", LOGPRINT_PREFIX);
+//#endif
+ while (numBytes-- > 0){
+ WriteReg(pProHW,pProslic->channel,FSKDAT,*(buffer++));
+ }
+ return 0;
+}
+
+/*
+** Function: PROSLIC_StartPCM
+**
+** Description:
+** Starts PCM
+*/
+int Si3226x_PCMStart (proslicChanType *pProslic){
+ uInt8 data;
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sPCMStart\n", LOGPRINT_PREFIX);
+#endif
+ data = ReadReg(pProHW,pProslic->channel,PCMMODE);
+ data |= 0x10;
+ WriteReg(pProHW,pProslic->channel,PCMMODE,data);
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_StopPCM
+**
+** Description:
+** Disables PCM
+*/
+int Si3226x_PCMStop (proslicChanType *pProslic){
+ uInt8 data;
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sPCMStop\n", LOGPRINT_PREFIX);
+#endif
+ data = ReadReg(pProHW,pProslic->channel,PCMMODE);
+ data &= ~(0x10);
+ WriteReg(pProHW,pProslic->channel,PCMMODE,data);
+ return 0;
+}
+
+
+
+/*
+** Function: PROSLIC_ReadDTMFDigit
+**
+** Description:
+** Read DTMF digit (would be called after DTMF interrupt to collect digit)
+*/
+int Si3226x_DTMFReadDigit (proslicChanType *pProslic,uInt8 *pDigit){
+
+ *pDigit = ReadReg(pProHW,pProslic->channel,TONDTMF) & 0xf;
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ LOGPRINT("%sDTMFReadDigit %d\n", LOGPRINT_PREFIX, *pDigit);
+#endif
+
+ return 0;
+}
+
+/*
+** Function: PROSLIC_PLLFreeRunStart
+**
+** Description:
+** initiates pll free run mode
+*/
+int Si3226x_PLLFreeRunStart (proslicChanType *pProslic){
+ uInt8 tmp;
+ WriteReg(pProHW,pProslic->channel,ZCAL_EN,0x0);
+ tmp = ReadReg(pProHW,pProslic->channel,ENHANCE);
+ WriteReg(pProHW,pProslic->channel,ENHANCE,tmp|0x4);
+ return 0;
+}
+
+/*
+** Function: PROSLIC_PLLFreeRunStop
+**
+** Description:
+** exit pll free run mode
+*/
+int Si3226x_PLLFreeRunStop (proslicChanType *pProslic){
+ uInt8 tmp;
+ tmp = ReadReg(pProHW,pProslic->channel,ENHANCE);
+ WriteReg(pProHW,pProslic->channel,ENHANCE,tmp&~(0x4));
+ WriteReg(pProHW,pProslic->channel,ZCAL_EN,0x04);
+ return 0;
+}
+
+
+/*
+** Function: PROSLIC_GetPLLFreeRunStatus
+**
+** Description:
+** Read PLL Freerun status
+*/
+int Si3226x_GetPLLFreeRunStatus (proslicChanType *pProslic){
+ uInt8 tmp;
+ tmp = ReadReg(pProHW,pProslic->channel,ENHANCE);
+ if(tmp & 0x02)
+ {
+ return RC_PLL_FREERUN_ACTIVE;
+ }
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_PulseMeterEnable
+**
+** Description:
+** enable pulse meter generation
+*/
+int Si3226x_PulseMeterEnable (proslicChanType *pProslic){
+
+ if(pProslic->channelType != PROSLIC) {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ WriteReg(pProHW,pProslic->channel,PMCON,ReadReg(pProHW,pProslic->channel,PMCON) | (0x01));
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: PROSLIC_PulseMeterDisable
+**
+** Description:
+** disable pulse meter generation
+*/
+int Si3226x_PulseMeterDisable (proslicChanType *pProslic){
+
+ if(pProslic->channelType != PROSLIC) {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ WriteReg(pProHW,pProslic->channel,PMCON,ReadReg(pProHW,pProslic->channel,PMCON) & ~(0x05));
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: PROSLIC_PulseMeterStart
+**
+** Description:
+** start pulse meter tone
+*/
+int Si3226x_PulseMeterStart (proslicChanType *pProslic){
+
+ WriteReg(pProHW,pProslic->channel,PMCON,ReadReg(pProHW,pProslic->channel,PMCON) | (0x5));
+ return 0;
+}
+
+/*
+** Function: PROSLIC_PulseMeterStop
+**
+** Description:
+** stop pulse meter tone
+*/
+int Si3226x_PulseMeterStop (proslicChanType *pProslic){
+
+ WriteReg(pProHW,pProslic->channel,PMCON,ReadReg(pProHW,pProslic->channel,PMCON) & ~(0x5));
+ return 0;
+}
+
+/*
+** Function: PROSLIC_dbgSetDCFeed
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired open circuit voltage
+** and loop current.
+*/
+int Si3226x_dbgSetDCFeed (proslicChanType *pProslic, uInt32 v_vlim_val, uInt32 i_ilim_val, int32 preset){
+/* Note: * needs more descriptive return codes in the event of an out of range arguement */
+ uInt16 vslope = 160;
+ uInt16 rslope = 720;
+ uInt32 vscale1 = 1386;
+ uInt32 vscale2 = 1422; /* 1386x1422 = 1970892 broken down to minimize trunc err */
+ uInt32 iscale1 = 913;
+ uInt32 iscale2 = 334; /* 913x334 = 304942 */
+ uInt32 i_rfeed_val, v_rfeed_val, const_rfeed_val, i_vlim_val, const_ilim_val, v_ilim_val;
+ int32 signedVal;
+ SILABS_UNREFERENCED_PARAMETER(pProslic);
+ /* Set Linefeed to open state before modifying DC Feed */
+
+ /* Assumptions must be made to minimize computations. This limits the
+ ** range of available settings, but should be more than adequate for
+ ** short loop applications.
+ **
+ ** Assumtions:
+ **
+ ** SLOPE_VLIM => 160ohms
+ ** SLOPE_RFEED => 720ohms
+ ** I_RFEED => 3*I_ILIM/4
+ **
+ ** With these assumptions, the DC Feed parameters now become
+ **
+ ** Inputs: V_VLIM, I_ILIM
+ ** Constants: SLOPE_VLIM, SLOPE_ILIM, SLOPE_RFEED, SLOPE_DELTA1, SLOPE_DELTA2
+ ** Outputs: V_RFEED, V_ILIM, I_VLIM, CONST_RFEED, CONST_ILIM
+ **
+ */
+
+ /* Validate arguements */
+ if((i_ilim_val < 15)||(i_ilim_val > 45)) return 1; /* need error code */
+ if((v_vlim_val < 30)||(v_vlim_val > 52)) return 1; /* need error code */
+
+ /* Calculate voltages in mV and currents in uA */
+ v_vlim_val *= 1000;
+ i_ilim_val *= 1000;
+
+ /* I_RFEED */
+ i_rfeed_val = (3*i_ilim_val)/4;
+
+ /* V_RFEED */
+ v_rfeed_val = v_vlim_val - (i_rfeed_val*vslope)/1000;
+
+ /* V_ILIM */
+ v_ilim_val = v_rfeed_val - (rslope*(i_ilim_val - i_rfeed_val))/1000;
+
+ /* I_VLIM */
+ i_vlim_val = (v_vlim_val*1000)/4903;
+
+ /* CONST_RFEED */
+ signedVal = v_rfeed_val * (i_ilim_val - i_rfeed_val);
+ signedVal /= (v_rfeed_val - v_ilim_val);
+ signedVal = i_rfeed_val + signedVal;
+
+ /* signedVal in uA here */
+ signedVal *= iscale1;
+ signedVal /= 100;
+ signedVal *= iscale2;
+ signedVal /= 10;
+
+ if(signedVal < 0)
+ {
+ const_rfeed_val = (signedVal)+ (1L<<29);
+ }
+ else
+ {
+ const_rfeed_val = signedVal & 0x1FFFFFFF;
+ }
+
+ /* CONST_ILIM */
+ const_ilim_val = i_ilim_val;
+
+ /* compute RAM values */
+ v_vlim_val *= vscale1;
+ v_vlim_val /= 100;
+ v_vlim_val *= vscale2;
+ v_vlim_val /= 10;
+
+ v_rfeed_val *= vscale1;
+ v_rfeed_val /= 100;
+ v_rfeed_val *= vscale2;
+ v_rfeed_val /= 10;
+
+ v_ilim_val *= vscale1;
+ v_ilim_val /= 100;
+ v_ilim_val *= vscale2;
+ v_ilim_val /= 10;
+
+ const_ilim_val *= iscale1;
+ const_ilim_val /= 100;
+ const_ilim_val *= iscale2;
+ const_ilim_val /= 10;
+
+ i_vlim_val *= iscale1;
+ i_vlim_val /= 100;
+ i_vlim_val *= iscale2;
+ i_vlim_val /= 10;
+
+ Si3226x_DCfeed_Presets[preset].slope_vlim = 0x18842BD7L;
+ Si3226x_DCfeed_Presets[preset].slope_rfeed = 0x1E8886DEL;
+ Si3226x_DCfeed_Presets[preset].slope_ilim = 0x40A0E0L;
+ Si3226x_DCfeed_Presets[preset].delta1 = 0x1EABA1BFL;
+ Si3226x_DCfeed_Presets[preset].delta2 = 0x1EF744EAL;
+ Si3226x_DCfeed_Presets[preset].v_vlim = v_vlim_val;
+ Si3226x_DCfeed_Presets[preset].v_rfeed = v_rfeed_val;
+ Si3226x_DCfeed_Presets[preset].v_ilim = v_ilim_val;
+ Si3226x_DCfeed_Presets[preset].const_rfeed = const_rfeed_val;
+ Si3226x_DCfeed_Presets[preset].const_ilim = const_ilim_val;
+ Si3226x_DCfeed_Presets[preset].i_vlim = i_vlim_val;
+
+ return RC_NONE;
+}
+
+/*
+** Function: PROSLIC_dbgSetDCFeedVopen
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired open circuit voltage.
+** Entry I_ILIM value will be used.
+*/
+int Si3226x_dbgSetDCFeedVopen (proslicChanType *pProslic, uInt32 v_vlim_val, int32 preset)
+{
+ uInt32 i_ilim_val;
+ uInt32 iscale1 = 913;
+ uInt32 iscale2 = 334; /* 913x334 = 304942 */
+
+ /* Read present CONST_ILIM value */
+ i_ilim_val = Si3226x_DCfeed_Presets[preset].const_ilim;
+
+
+ i_ilim_val /= iscale2;
+ i_ilim_val /= iscale1;
+
+ return Si3226x_dbgSetDCFeed(pProslic,v_vlim_val,i_ilim_val,preset);
+}
+
+/*
+** Function: PROSLIC_dbgSetDCFeedIloop
+**
+** Description:
+** provisionary function for setting up
+** dcfeed given desired loop current.
+** Entry V_VLIM value will be used.
+*/
+int Si3226x_dbgSetDCFeedIloop (proslicChanType *pProslic, uInt32 i_ilim_val, int32 preset)
+{
+ uInt32 v_vlim_val;
+ uInt32 vscale1 = 1386;
+ uInt32 vscale2 = 1422; /* 1386x1422 = 1970892 broken down to minimize trunc err */
+
+ /* Read present V_VLIM value */
+ v_vlim_val = Si3226x_DCfeed_Presets[preset].v_vlim;
+
+ v_vlim_val /= vscale2;
+ v_vlim_val /= vscale1;
+
+ return Si3226x_dbgSetDCFeed(pProslic,v_vlim_val,i_ilim_val, preset);
+}
+
+
+
+
+typedef struct
+{
+ uInt8 freq;
+ ramData ringfr; /* trise scale for trap */
+ uInt32 ampScale;
+} ProSLIC_SineRingFreqLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ ramData rtacth;
+ ramData rtper;
+ ramData rtdb;
+} ProSLIC_SineRingtripLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ uInt16 cfVal[6];
+} ProSLIC_TrapRingFreqLookup;
+
+typedef struct
+{
+ uInt8 freq;
+ ramData rtper;
+ ramData rtdb;
+ uInt32 rtacth[6];
+} ProSLIC_TrapRingtripLookup;
+
+
+
+
+/*
+** Function: PROSLIC_dbgRingingSetup
+**
+** Description:
+** Provisionary function for setting up
+** Ring type, frequency, amplitude and dc offset.
+** Main use will be by peek/poke applications.
+*/
+int Si3226x_dbgSetRinging (proslicChanType *pProslic, ProSLIC_dbgRingCfg *ringCfg, int preset){
+ int errVal,i=0;
+ uInt32 vScale = 1608872L; /* (2^28/170.25)*((100+4903)/4903) */
+ ramData dcdcVminTmp;
+
+ const ProSLIC_SineRingFreqLookup sineRingFreqTable[] =
+/* Freq RINGFR, vScale */
+ {{15, 0x7F6E930L, 18968L},
+ {16, 0x7F5A8E0L, 20234L},
+ {20, 0x7EFD9D5L, 25301L},
+ {22, 0x7EC770AL, 27843L},
+ {23, 0x7EAA6E2L, 29113L},
+ {25, 0x7E6C925L, 31649L},
+ {30, 0x7DBB96BL, 38014L},
+ {34, 0x7D34155L, 42270L}, /* Actually 33.33Hz */
+ {35, 0x7CEAD72L, 44397L},
+ {40, 0x7BFA887L, 50802L},
+ {45, 0x7AEAE74L, 57233L},
+ {50, 0x79BC384L, 63693L},
+ {0,0,0}}; /* terminator */
+
+ const ProSLIC_SineRingtripLookup sineRingtripTable[] =
+/* Freq rtacth */
+ { {15, 11440000L, 0x6A000L, 0x4000L },
+ {16, 10810000L, 0x64000L, 0x4000L },
+ {20, 8690000L, 0x50000L, 0x8000L },
+ {22, 7835000L, 0x48000L, 0x8000L },
+ {23, 7622000L, 0x46000L, 0x8000L },
+ {25, 6980000L, 0x40000L, 0xA000L },
+ {30, 5900000L, 0x36000L, 0xA000L },
+ {34, 10490000L, 0x60000L, 0x6000L }, /* Actually 33.33 */
+ {35, 10060000L, 0x5C000L, 0x6000L },
+ {40, 8750000L, 0x50000L, 0x8000L },
+ {45, 7880000L, 0x48000L, 0x8000L },
+ {50, 7010000L, 0x40000L, 0xA000L },
+ {0,0L}}; /* terminator */
+
+ const ProSLIC_TrapRingFreqLookup trapRingFreqTable[] =
+/* Freq multCF11 multCF12 multCF13 multCF14 multCF15 multCF16*/
+ {
+ {15, {69,122, 163, 196, 222,244}},
+ {16, {65,115, 153, 184, 208,229}},
+ {20, {52,92, 122, 147, 167,183}},
+ {22, {47,83, 111, 134, 152,166}},
+ {23, {45,80, 107, 128, 145,159}},
+ {25, {42,73, 98, 118, 133,146}},
+ {30, {35,61, 82, 98, 111,122}},
+ {34, {31,55, 73, 88, 100,110}},
+ {35, {30,52, 70, 84, 95,104}},
+ {40, {26,46, 61, 73, 83,91}},
+ {45, {23,41, 54, 65, 74,81}},
+ {50, {21,37, 49, 59, 67,73}},
+ {0,{0L,0L,0L,0L}} /* terminator */
+ };
+
+
+ const ProSLIC_TrapRingtripLookup trapRingtripTable[] =
+/* Freq rtper rtdb rtacthCR11 rtacthCR12 rtacthCR13 rtacthCR14 rtacthCR15 rtacthCR16*/
+ {
+ {15, 0x6A000L, 0x4000L, {16214894L, 14369375L, 12933127L, 11793508L, 10874121L, 10121671L}},
+ {16, 0x64000L, 0x4000L, {15201463L, 13471289L, 12124806L, 11056414L, 10194489L, 9489067L}},
+ {20, 0x50000L, 0x6000L, {12161171L, 10777031L, 9699845L, 8845131L, 8155591L, 7591253L}},
+ {22, 0x48000L, 0x6000L, {11055610L, 9797301L, 8818041L, 8041028L, 7414174L, 6901139L}},
+ {23, 0x46000L, 0x6000L, {10574931L, 9371331L, 8434648L, 7691418L, 7091818L, 6601090L}},
+ {25, 0x40000L, 0x8000L, {9728937L, 8621625L, 7759876L, 7076105L, 6524473L, 6073003L}},
+ {30, 0x36000L, 0x8000L, {8107447L, 7184687L, 6466563L, 5896754L, 5437061L, 5060836L}},
+ {34, 0x60000L, 0x6000L, {7297432L, 6466865L, 5820489L, 5307609L, 4893844L, 4555208L}},
+ {35, 0x5C000L, 0x6000L, {6949240L, 6158303L, 5542769L, 5054361L, 4660338L, 4337859L}},
+ {40, 0x50000L, 0x6000L, {6080585L, 5388516L, 4849923L, 4422565L, 4077796L, 3795627L}},
+ {45, 0x48000L, 0x6000L, {5404965L, 4789792L, 4311042L, 3931169L, 3624707L, 3373890L}},
+ {50, 0x40000L, 0x8000L, {4864468L, 4310812L, 3879938L, 3538052L, 3262236L, 3036501L}},
+ {0,0x0L, 0x0L, {0L,0L,0L,0L}} /* terminator */
+ };
+ SILABS_UNREFERENCED_PARAMETER(pProslic);
+ errVal = 0;
+
+ switch(ringCfg->ringtype)
+ {
+ case ProSLIC_RING_SINE:
+ i=0;
+ do
+ {
+ if(sineRingFreqTable[i].freq >= ringCfg->freq)
+ {
+ break;
+ }
+ i++;
+ } while (sineRingFreqTable[i].freq);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(sineRingFreqTable[i].freq == 0)
+ {
+ i--;
+ errVal = 1;
+ }
+
+ /* Update RINGFR RINGAMP, RINGOFFSET, and RINGCON */
+ Si3226x_Ring_Presets[preset].freq = sineRingFreqTable[i].ringfr;
+ Si3226x_Ring_Presets[preset].amp = ringCfg->amp * sineRingFreqTable[i].ampScale;
+ Si3226x_Ring_Presets[preset].offset = ringCfg->offset * vScale;
+ Si3226x_Ring_Presets[preset].phas = 0L;
+
+ /* Don't alter anything in RINGCON other than clearing the TRAP bit */
+ Si3226x_Ring_Presets[preset].ringcon &= 0xFE;
+
+ Si3226x_Ring_Presets[preset].rtper = sineRingtripTable[i].rtper;
+ Si3226x_Ring_Presets[preset].rtacdb = sineRingtripTable[i].rtdb;
+ Si3226x_Ring_Presets[preset].rtdcdb = sineRingtripTable[i].rtdb;
+ Si3226x_Ring_Presets[preset].rtdcth = 0xFFFFFFFL;
+ Si3226x_Ring_Presets[preset].rtacth = sineRingtripTable[i].rtacth;
+ break;
+
+ case ProSLIC_RING_TRAP_CF11:
+ case ProSLIC_RING_TRAP_CF12:
+ case ProSLIC_RING_TRAP_CF13:
+ case ProSLIC_RING_TRAP_CF14:
+ case ProSLIC_RING_TRAP_CF15:
+ case ProSLIC_RING_TRAP_CF16:
+ i=0;
+ do
+ {
+ if(trapRingFreqTable[i].freq >= ringCfg->freq)
+ {
+ break;
+ }
+ i++;
+ } while (trapRingFreqTable[i].freq);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(trapRingFreqTable[i].freq == 0)
+ {
+ i--;
+ errVal = 1;
+ }
+
+ /* Update RINGFR RINGAMP, RINGOFFSET, and RINGCON */
+ Si3226x_Ring_Presets[preset].amp = ringCfg->amp * vScale;
+ Si3226x_Ring_Presets[preset].freq = Si3226x_Ring_Presets[preset].amp/trapRingFreqTable[i].cfVal[ringCfg->ringtype];
+ Si3226x_Ring_Presets[preset].offset = ringCfg->offset * vScale;
+ Si3226x_Ring_Presets[preset].phas = 262144000L/trapRingFreqTable[i].freq;
+
+ /* Don't alter anything in RINGCON other than setting the TRAP bit */
+ Si3226x_Ring_Presets[preset].ringcon |= 0x01;
+
+ /* RTPER and debouce timers */
+ Si3226x_Ring_Presets[preset].rtper = trapRingtripTable[i].rtper;
+ Si3226x_Ring_Presets[preset].rtacdb = trapRingtripTable[i].rtdb;
+ Si3226x_Ring_Presets[preset].rtdcdb = trapRingtripTable[i].rtdb;
+
+
+ Si3226x_Ring_Presets[preset].rtdcth = 0xFFFFFFFL;
+ Si3226x_Ring_Presets[preset].rtacth = trapRingtripTable[i].rtacth[ringCfg->ringtype];
+
+
+ break;
+ }
+
+ /*
+ ** DCDC tracking sluggish under light load at higher ring freq.
+ ** Reduce tracking depth above 40Hz. This should have no effect
+ ** if using the Buck-Boost architecture.
+ */
+ if((sineRingFreqTable[i].freq >= 40)||(Si3226x_General_Configuration.bomOpt == BO_DCDC_BUCK_BOOST))
+ {
+ dcdcVminTmp = ringCfg->amp + ringCfg->offset;
+ dcdcVminTmp *= 1000;
+ dcdcVminTmp *= SCALE_V_MADC;
+ Si3226x_Ring_Presets[preset].vbat_track_min_rng = dcdcVminTmp;
+ }
+ else
+ {
+ Si3226x_Ring_Presets[preset].vbat_track_min_rng = 0x1800000L;
+ }
+
+ return errVal;
+}
+
+
+typedef struct
+{
+ int32 gain;
+ uInt32 scale;
+} ProSLIC_GainScaleLookup;
+
+#define EXTENDED_GAIN_MAX 9
+#define GAIN_MAX 6
+#define GAIN_MIN -30
+#ifndef ENABLE_HIRES_GAIN
+static int Si3226x_dbgSetGain (proslicChanType *pProslic, int32 gain, int impedance_preset, int tx_rx_sel){
+ int errVal = 0;
+ int32 i;
+ int32 gain_pga, gain_eq;
+ const ProSLIC_GainScaleLookup gainScaleTable[] = /* gain, scale=10^(gain/20) */
+ {
+ {-30, 32},
+ {-29, 35},
+ {-28, 40},
+ {-27, 45},
+ {-26, 50},
+ {-25, 56},
+ {-24, 63},
+ {-23, 71},
+ {-22, 79},
+ {-21, 89},
+ {-20, 100},
+ {-19, 112},
+ {-18, 126},
+ {-17, 141},
+ {-16, 158},
+ {-15, 178},
+ {-14, 200},
+ {-13, 224},
+ {-12, 251},
+ {-11, 282},
+ {-10, 316},
+ {-9, 355},
+ {-8, 398},
+ {-7, 447},
+ {-6, 501},
+ {-5, 562},
+ {-4, 631},
+ {-3, 708},
+ {-2, 794},
+ {-1, 891},
+ {0, 1000},
+ {1, 1122},
+ {2, 1259},
+ {3, 1413},
+ {4, 1585},
+ {5, 1778},
+ {6, 1995},
+ {0xff,0} /* terminator */
+ };
+
+/*
+** 5.4.0 - Removed relative gain scaling. to support automatic adjustment based on
+** gain plan provided in txgain_db and rxgain_db. It is presumed that all
+** coefficients were generated for 0dB/0dB gain and the txgain_db and rxgain_db
+** parameters will be used to scale the gain using the existing gain provisioning
+** infrastructure when the zsynth preset is loaded. This function will ignore
+** the txgain_db and rxgain_db parameters and scale absolute gain presuming a
+** 0dB/0dB coefficient set.
+*/
+/*
+** 6.0.0 - Modifying where gain/attenuation is placed to minimize clipping.
+**
+** RX Path: -30dB < gain < 0dB - All in RXACGAIN
+** 0dB < gain < 6dB - All in RXACEQ
+**
+** TX Path: -30dB < gain < 0dB - All in TXACEQ
+** 0dB < gain < 6dB - All in TXACGAIN
+*/
+ /* Test against max gain */
+ if (gain > EXTENDED_GAIN_MAX)
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT("%sdbgSetGain : Gain %d out of range\n", LOGPRINT_PREFIX, (int)gain);
+ }
+#endif
+ gain = EXTENDED_GAIN_MAX; /* Clamp to maximum */
+ }
+
+ /* Test against min gain */
+ if (gain < GAIN_MIN)
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT("%sdbgSetGain : Gain %d out of range\n", LOGPRINT_PREFIX, (int)gain);
+ }
+#endif
+ gain = GAIN_MIN; /* Clamp to minimum */
+ }
+
+ /* Distribute gain */
+ if(gain == 0)
+ {
+ gain_pga = 0;
+ gain_eq = 0;
+ }
+ else if(gain > GAIN_MAX)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = GAIN_MAX;
+ gain_eq = gain - GAIN_MAX;
+ }
+ else
+ {
+ gain_pga = gain - GAIN_MAX;
+ gain_eq = GAIN_MAX;
+ }
+ }
+ else if(gain > 0)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = gain;
+ gain_eq = 0;
+ }
+ else
+ {
+ gain_pga = 0;
+ gain_eq = gain;
+ }
+ }
+ else
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = 0;
+ gain_eq = gain;
+ }
+ else
+ {
+ gain_pga = gain;
+ gain_eq = 0;
+ }
+
+ }
+
+ /*
+ ** Lookup PGA Appopriate PGA Gain
+ */
+ i=0;
+ do
+ {
+ if(gainScaleTable[i].gain >= gain_pga)
+ {
+ break;
+ }
+ i++;
+ } while (gainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(gainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ Si3226x_audioGain_Presets[0].acgain = (Si3226x_Impedance_Presets[impedance_preset].txgain/1000)*gainScaleTable[i].scale;
+ }
+ else
+ {
+ Si3226x_audioGain_Presets[1].acgain = (Si3226x_Impedance_Presets[impedance_preset].rxgain/1000)*gainScaleTable[i].scale;
+ }
+
+ /*
+ ** Lookup EQ Gain
+ */
+ i=0;
+ do
+ {
+ if(gainScaleTable[i].gain >= gain_eq)
+ {
+ break;
+ }
+ i++;
+ } while (gainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(gainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ /*sign extend negative numbers*/
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+
+ Si3226x_audioGain_Presets[0].aceq_c0 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0/1000)*gainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[0].aceq_c1 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1/1000)*gainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[0].aceq_c2 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2/1000)*gainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[0].aceq_c3 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3/1000)*gainScaleTable[i].scale;
+ }
+ else
+ {
+ /*sign extend negative numbers*/
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+
+ Si3226x_audioGain_Presets[1].aceq_c0 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0/1000)*gainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[1].aceq_c1 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1/1000)*gainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[1].aceq_c2 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2/1000)*gainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[1].aceq_c3 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3/1000)*gainScaleTable[i].scale;
+ }
+
+
+ return errVal;
+}
+
+#else /* ENABLE_HIRES_GAIN */
+/* Same as Si3226x_dbgSetGain() except gain is expressed in dB*10 to achieve 0.1dB resolution */
+static int Si3226x_dbgSetGainHiRes (proslicChanType *pProslic, int32 gain, int impedance_preset, int tx_rx_sel){
+ int errVal = 0;
+ int32 i;
+ int32 coarseGainIndex, fineGainIndex;
+ int32 gain_pga, gain_eq;
+ int32 coarseGain, fineGain;
+ int32 tmp;
+ const ProSLIC_GainScaleLookup coarseGainScaleTable[] = /* gain, scale=10^(gain/20) */
+ {
+ {-30, 32},
+ {-29, 35},
+ {-28, 40},
+ {-27, 45},
+ {-26, 50},
+ {-25, 56},
+ {-24, 63},
+ {-23, 71},
+ {-22, 79},
+ {-21, 89},
+ {-20, 100},
+ {-19, 112},
+ {-18, 126},
+ {-17, 141},
+ {-16, 158},
+ {-15, 178},
+ {-14, 200},
+ {-13, 224},
+ {-12, 251},
+ {-11, 282},
+ {-10, 316},
+ {-9, 355},
+ {-8, 398},
+ {-7, 447},
+ {-6, 501},
+ {-5, 562},
+ {-4, 631},
+ {-3, 708},
+ {-2, 794},
+ {-1, 891},
+ {0, 1000},
+ {1, 1122},
+ {2, 1259},
+ {3, 1413},
+ {4, 1585},
+ {5, 1778},
+ {6, 1995},
+ {0xff,0} /* terminator */
+ };
+
+ const ProSLIC_GainScaleLookup fineGainScaleTable[] = /* gain, scale=10^(gain/20) */
+ {
+ {-9, 902},
+ {-8, 912},
+ {-7, 923},
+ {-6, 933},
+ {-5, 944},
+ {-4, 955},
+ {-3, 966},
+ {-2, 977},
+ {-1, 989},
+ {0, 1000},
+ {1, 1012},
+ {2, 1023},
+ {3, 1035},
+ {4, 1047},
+ {5, 1059},
+ {6, 1072},
+ {7, 1084},
+ {8, 1096},
+ {9, 1109},
+ {0xff,0} /* terminator */
+ };
+
+/*
+** 6.0.0 - Modifying where gain/attenuation is placed to minimize clipping.
+**
+** RX Path: -30dB < gain < 0dB - All in RXACGAIN
+** 0dB < gain < 6dB - All in RXACEQ
+**
+** TX Path: -30dB < gain < 0dB - All in TXACEQ
+** 0dB < gain < 6dB - All in TXACGAIN
+**
+** 6.2.1 - Added option for fine gain adjust. All fine adjustment done
+** in RXACGAIN and TXACEQ
+*/
+
+ /* Test against max gain */
+ if (gain > (GAIN_MAX*10L))
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT("%s dbgSetGain : Gain %d dB*10 out of range\n", LOGPRINT_PREFIX, gain);
+ }
+#endif
+ gain = (GAIN_MAX*10L); /* Clamp to maximum */
+ }
+
+ /* Test against min gain */
+ if (gain < (GAIN_MIN*10L))
+ {
+ errVal = RC_GAIN_OUT_OF_RANGE;
+#ifdef ENABLE_DEBUG
+ if(pProslic->debugMode)
+ {
+ LOGPRINT("%sdbgSetGain : Gain %d dB*10 out of range\n", LOGPRINT_PREFIX, gain);
+ }
+#endif
+ gain = (GAIN_MIN*10); /* Clamp to minimum */
+ }
+
+ /* Distribute gain */
+ coarseGain = gain/10L;
+ fineGain = gain - (coarseGain*10L);
+
+ /* Distribute coarseGain */
+ if(coarseGain == 0)
+ {
+ gain_pga = 0;
+ gain_eq = 0;
+ }
+ else if(coarseGain > 0)
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = coarseGain;
+ gain_eq = 0;
+ }
+ else
+ {
+ gain_pga = 0;
+ gain_eq = coarseGain;
+ }
+ }
+ else
+ {
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ gain_pga = 0;
+ gain_eq = coarseGain;
+ }
+ else
+ {
+ gain_pga = coarseGain;
+ gain_eq = 0;
+ }
+ }
+
+ /*
+ ** Lookup PGA Appopriate PGA Gain
+ */
+ i=0;
+ do
+ {
+ if(coarseGainScaleTable[i].gain >= gain_pga)
+ {
+ break;
+ }
+ i++;
+ } while (coarseGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(coarseGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ coarseGainIndex = i; /* Store coarse index */
+
+ /* Find fineGain */
+ i = 0;
+ do
+ {
+ if(fineGainScaleTable[i].gain >= fineGain)
+ {
+ break;
+ }
+ i++;
+ } while (fineGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(fineGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ fineGainIndex = i;
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ Si3226x_audioGain_Presets[0].acgain = ((Si3226x_Impedance_Presets[impedance_preset].txgain/1000L)*coarseGainScaleTable[coarseGainIndex].scale); /* /1000L * fineGainScaleTable[fineGainIndex].scale; */
+ }
+ else
+ {
+ Si3226x_audioGain_Presets[1].acgain = ((Si3226x_Impedance_Presets[impedance_preset].rxgain/1000L)*coarseGainScaleTable[coarseGainIndex].scale)/1000L * fineGainScaleTable[fineGainIndex].scale;
+ }
+
+ /*
+ ** Lookup EQ Gain
+ */
+ i=0;
+ do
+ {
+ if(coarseGainScaleTable[i].gain >= gain_eq)
+ {
+ break;
+ }
+ i++;
+ } while (coarseGainScaleTable[i].gain!=0xff);
+
+ /* Set to maximum value if exceeding maximum value from table */
+ if(coarseGainScaleTable[i].gain == 0xff)
+ {
+ i--;
+ errVal = RC_GAIN_DELTA_TOO_LARGE;
+ }
+
+ coarseGainIndex = i; /* Store coarse index */
+
+ if(tx_rx_sel == TXACGAIN_SEL)
+ {
+ /*sign extend negative numbers*/
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3 |= 0xf0000000L;
+
+ tmp = (((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c0/1000L)*coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3226x_audioGain_Presets[0].aceq_c0 = tmp;
+
+ tmp = (((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c1/1000L)*coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3226x_audioGain_Presets[0].aceq_c1 = tmp;
+
+ tmp = (((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c2/1000L)*coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3226x_audioGain_Presets[0].aceq_c2 = tmp;
+
+ tmp = (((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.txaceq_c3/1000L)*coarseGainScaleTable[coarseGainIndex].scale);
+ tmp = tmp / (int32)1000L;
+ tmp = tmp * (int32)fineGainScaleTable[fineGainIndex].scale;
+ Si3226x_audioGain_Presets[0].aceq_c3 = tmp;
+ }
+ else
+ {
+ /*sign extend negative numbers*/
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2 |= 0xf0000000L;
+ if (Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 & 0x10000000L)
+ Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3 |= 0xf0000000L;
+
+ Si3226x_audioGain_Presets[1].aceq_c0 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c0/1000)*coarseGainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[1].aceq_c1 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c1/1000)*coarseGainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[1].aceq_c2 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c2/1000)*coarseGainScaleTable[i].scale;
+ Si3226x_audioGain_Presets[1].aceq_c3 = ((int32)Si3226x_Impedance_Presets[impedance_preset].audioEQ.rxaceq_c3/1000)*coarseGainScaleTable[i].scale;
+ }
+
+
+ return errVal;
+}
+#endif
+/*
+** Function: PROSLIC_dbgSetTXGain
+**
+** Description:
+** Provisionary function for setting up
+** TX gain
+*/
+int Si3226x_dbgSetTXGain (proslicChanType *pProslic, int32 gain, int impedance_preset, int audio_gain_preset){
+#ifdef ENABLE_HIRES_GAIN
+ return Si3226x_dbgSetGainHiRes(pProslic,gain,impedance_preset,audio_gain_preset);
+#else
+ return Si3226x_dbgSetGain(pProslic,gain,impedance_preset,audio_gain_preset);
+#endif
+}
+
+/*
+** Function: PROSLIC_dbgSetRXGain
+**
+** Description:
+** Provisionary function for setting up
+** RX gain
+*/
+int Si3226x_dbgSetRXGain (proslicChanType *pProslic, int32 gain, int impedance_preset, int audio_gain_preset){
+#ifdef ENABLE_HIRES_GAIN
+ return Si3226x_dbgSetGainHiRes(pProslic,gain,impedance_preset,audio_gain_preset);
+#else
+ return Si3226x_dbgSetGain(pProslic,gain,impedance_preset,audio_gain_preset);
+#endif
+}
+
+
+/*
+** Function: Si3226x_LineMonitor
+**
+** Description:
+** Monitor line voltages and currents
+*/
+int Si3226x_LineMonitor(proslicChanType *pProslic, proslicMonitorType *monitor)
+{
+ if(pProslic->channelEnable)
+ {
+ monitor->vtr = ReadRAM(pProHW,pProslic->channel,VDIFF_FILT);
+ if(monitor->vtr & 0x10000000L)
+ monitor->vtr |= 0xf0000000L;
+ monitor->vtr /= SCALE_V_MADC;
+
+ monitor->vtip = ReadRAM(pProHW,pProslic->channel,VTIP);
+ if(monitor->vtip & 0x10000000L)
+ monitor->vtip |= 0xf0000000L;
+ monitor->vtip /= SCALE_V_MADC;
+
+ monitor->vring = ReadRAM(pProHW,pProslic->channel,VRING);
+ if(monitor->vring & 0x10000000L)
+ monitor->vring |= 0xf0000000L;
+ monitor->vring /= SCALE_V_MADC;
+
+ monitor->vlong = ReadRAM(pProHW,pProslic->channel,MADC_VLONG);
+ if(monitor->vlong & 0x10000000L)
+ monitor->vlong |= 0xf0000000L;
+ monitor->vlong /= SCALE_V_MADC;
+
+ monitor->vbat = ReadRAM(pProHW,pProslic->channel,MADC_VBAT);
+ if(monitor->vbat & 0x10000000L)
+ monitor->vbat |= 0xf0000000L;
+ monitor->vbat /= SCALE_V_MADC;
+
+ monitor->vdc = ReadRAM(pProHW,pProslic->channel,MADC_VDC);
+ if(monitor->vdc & 0x10000000L)
+ monitor->vdc |= 0xf0000000L;
+ monitor->vdc *= -1L; /* Invert since sensor inverted */
+ monitor->vdc /= SCALE_V_MADC;
+
+ monitor->itr = ReadRAM(pProHW,pProslic->channel,MADC_ILOOP);
+ if(monitor->itr & 0x10000000L)
+ monitor->itr |= 0xf0000000L;
+ monitor->itr /= SCALE_I_MADC;
+
+ monitor->itip = ReadRAM(pProHW,pProslic->channel,MADC_ITIP);
+ if(monitor->itip & 0x10000000L)
+ monitor->itip |= 0xf0000000L;
+ monitor->itip /= SCALE_I_MADC;
+
+ monitor->iring = ReadRAM(pProHW,pProslic->channel,MADC_IRING);
+ if(monitor->iring & 0x10000000L)
+ monitor->iring |= 0xf0000000L;
+ monitor->iring /= SCALE_I_MADC;
+
+ monitor->ilong = ReadRAM(pProHW,pProslic->channel,MADC_ILONG);
+ if(monitor->ilong & 0x10000000L)
+ monitor->ilong |= 0xf0000000L;
+ monitor->ilong /= SCALE_I_MADC;
+
+ monitor->p_hvic = ReadRAM(pProHW,pProslic->channel,P_Q1_D); /* P_HVIC_LPF */
+ if(monitor->p_hvic & 0x10000000L)
+ monitor->p_hvic |= 0xf0000000L;
+ monitor->p_hvic /= SCALE_P_MADC;
+
+ }
+
+ return 0;
+}
+
+/*
+** Function: Si3226x_PSTNCheck
+**
+** Description:
+** Continuous monitoring of longitudinal current.
+** If an average of N samples exceed avgThresh or a
+** single sample exceeds singleThresh, the linefeed
+** is forced into the open state.
+**
+** This protects the port from connecting to a live
+** pstn line (faster than power alarm).
+**
+** TODO: need error handling
+*/
+int Si3226x_PSTNCheck (proslicChanType *pProslic,proslicPSTNCheckObjType *pPSTNCheck)
+{
+ uInt8 i;
+ /* Adjust buffer index */
+ if(pPSTNCheck->count >= pPSTNCheck->samples)
+ {
+ pPSTNCheck->buffFull = TRUE;
+ pPSTNCheck->count = 0; /* reset buffer ptr */
+ }
+
+ /* Read next sample */
+ pPSTNCheck->ilong[pPSTNCheck->count] = ReadRAM(pProHW,pProslic->channel,MADC_ILONG);
+ if(pPSTNCheck->ilong[pPSTNCheck->count] & 0x10000000L)
+ pPSTNCheck->ilong[pPSTNCheck->count] |= 0xf0000000L;
+ pPSTNCheck->ilong[pPSTNCheck->count] /= SCALE_I_MADC;
+
+ /* Monitor magnitude only */
+ if(pPSTNCheck->ilong[pPSTNCheck->count] < 0)
+ pPSTNCheck->ilong[pPSTNCheck->count] = -pPSTNCheck->ilong[pPSTNCheck->count];
+
+ /* Quickly test for single measurement violation */
+ if(pPSTNCheck->ilong[pPSTNCheck->count] > pPSTNCheck->singleThresh)
+ return 1; /* fail */
+
+ /* Average once buffer is full */
+ if(pPSTNCheck->buffFull == TRUE)
+ {
+ pPSTNCheck->avgIlong = 0;
+ for(i=0;i<pPSTNCheck->samples; i++)
+ {
+ pPSTNCheck->avgIlong += pPSTNCheck->ilong[i];
+ }
+ pPSTNCheck->avgIlong /= pPSTNCheck->samples;
+
+ if(pPSTNCheck->avgIlong > pPSTNCheck->avgThresh)
+ {
+ /* reinit obj and return fail */
+ pPSTNCheck->count = 0;
+ pPSTNCheck->buffFull = FALSE;
+ return 1;
+ }
+ else
+ {
+ pPSTNCheck->count++;
+ return 0;
+ }
+ }
+ else
+ {
+ pPSTNCheck->count++;
+ return 0;
+ }
+}
+
+/*
+** Function: Si3226x_SetPwrsaveMode
+**
+** Description:
+** Enable or disable powersave mode
+**
+** Returns:
+** RC_NONE
+*/
+int Si3226x_SetPowersaveMode (proslicChanType *pProslic, int pwrsave)
+{
+uInt8 regData;
+
+ if(pProslic->channelType != PROSLIC) {
+ return RC_NONE; /* Ignore DAA channels */
+ }
+
+ regData = ReadReg(pProHW,pProslic->channel, ENHANCE);
+
+ if(pwrsave == PWRSAVE_DISABLE)
+ {
+ regData &= 0x07;
+ }
+ else
+ {
+ regData |= 0x10;
+ }
+
+ WriteReg(pProHW,pProslic->channel, ENHANCE, regData);
+
+ return RC_NONE;
+}
+
+
+
+/*
+** Function: delay_poll
+**
+** Description:
+** Delay function called within PSTN detection functions
+**
+** Return Value:
+** none
+*/
+#ifdef PSTN_DET_ENABLE
+static void Si3226x_polled_delay(proslicTestStateType *pState, unsigned short delay)
+{
+unsigned short delayCount;
+
+ if((delay/PSTN_DET_POLL_RATE) < 2)
+ delayCount = 0;
+ else
+ delayCount = (delay/PSTN_DET_POLL_RATE) - 2;
+
+ pState->waitIterations++;
+ if((pState->waitIterations == delayCount) || (delayCount == 0))
+ {
+ pState->waitIterations = 0;
+ pState->stage++;
+ }
+}
+#endif
+
+
+/*
+** Function: Si3226x_GetRAMScale
+**
+** Description:
+** Read scale factor for passed RAM location
+**
+** Return Value:
+** int32 scale
+*/
+static int32 Si3226x_GetRAMScale(uInt16 addr)
+{
+int32 scale;
+
+ switch(addr)
+ {
+ case MADC_ILOOP:
+ case MADC_ITIP:
+ case MADC_IRING:
+ case MADC_ILONG:
+ scale = SCALE_I_MADC;
+ break;
+
+ case MADC_VTIPC:
+ case MADC_VRINGC:
+ case MADC_VBAT:
+ case MADC_VLONG:
+ case MADC_VDC:
+ case MADC_VDC_OS:
+ case VDIFF_SENSE:
+ case VDIFF_FILT:
+ case VDIFF_COARSE:
+ case VTIP:
+ case VRING:
+ case SI3226X_PRAM_VBATH_NEON:
+ scale = SCALE_V_MADC;
+ break;
+
+ case P_HVIC:
+ case P_Q1_D: /* P_HVIC_LPF */
+ scale = SCALE_P_MADC;
+ break;
+ default:
+ scale = 1;
+ break;
+ }
+
+ return scale;
+}
+
+/*
+** Function: Si3226x_ReadMADCScaled
+**
+** Description:
+** Read MADC (or other sensed voltages/currents) and
+** return scaled value in int32 format.
+**
+** Return Value:
+** int32 voltage in mV or
+** int32 current in uA
+*/
+int32 Si3226x_ReadMADCScaled(proslicChanType_ptr pProslic,uInt16 addr, int32 scale)
+{
+int32 data;
+
+ /*
+ ** Read 29-bit RAM and sign extend to 32-bits
+ */
+ data = ReadRAM(pProHW,pProslic->channel,addr);
+ if(data & 0x10000000L)
+ data |= 0xF0000000L;
+
+ /*
+ ** Scale to provided value, or use defaults if scale = 0
+ */
+ if(scale == 0)
+ scale = Si3226x_GetRAMScale(addr);
+
+ data /= scale;
+
+ return data;
+}
+
+#ifdef PSTN_DET_ENABLE
+/*
+** Function: abs_int32
+**
+** Description:
+** abs implementation for int32 type
+*/
+static int32 abs_int32(int32 a)
+{
+ if(a < 0)
+ return -1*a;
+ return a;
+}
+
+/*
+** Function: Si3226x_DiffPSTNCheck
+**
+** Description:
+** Monitor for excessive longitudinal current, which
+** would be present if a live pstn line was connected
+** to the port.
+**
+** Returns:
+** RC_NONE - test in progress
+** RC_COMPLETE_NO_ERR - test complete, no alarms or errors
+** RC_PSTN_OPEN_FEMF - test detected foreign voltage
+**
+*/
+
+int Si3226x_DiffPSTNCheck (proslicChanType *pProslic, proslicDiffPSTNCheckObjType *pPSTNCheck){
+ uInt8 loop_status;
+ int i;
+
+ if(pProslic->channelType != PROSLIC) {
+ return RC_CHANNEL_TYPE_ERR; /* Ignore DAA channels */
+ }
+
+
+ switch(pPSTNCheck->pState.stage)
+ {
+ case 0:
+ /* Optional OPEN foreign voltage measurement - only execute if LCS = 0 */
+ /* Disable low power mode */
+ pPSTNCheck->enhanceRegSave = ReadReg(pProHW,pProslic->channel,ENHANCE);
+ if(pProslic->deviceId->chipRev != 0) { /* must stay in pwrsave mode on rev A */
+ WriteReg(pProHW,pProslic->channel, ENHANCE, pPSTNCheck->enhanceRegSave&0x07); /* Disable powersave */
+ }
+ pPSTNCheck->vdiff1_avg = 0;
+ pPSTNCheck->vdiff2_avg = 0;
+ pPSTNCheck->iloop1_avg = 0;
+ pPSTNCheck->iloop2_avg = 0;
+ pPSTNCheck->return_status = RC_COMPLETE_NO_ERR;
+ /* Do OPEN state hazardous voltage measurement if enabled and ONHOOK */
+ Si3226x_ReadHookStatus(pProslic,&loop_status);
+ if((loop_status == ONHOOK)&&(pPSTNCheck->femf_enable == 1))
+ pPSTNCheck->pState.stage++;
+ else
+ pPSTNCheck->pState.stage = 10;
+ return RC_NONE;
+
+ case 1:
+ /* Change linefeed to OPEN state for HAZV measurement, setup coarse sensors */
+ pPSTNCheck->lfstate_entry = ReadReg(pProHW,pProslic->channel, LINEFEED);
+ ProSLIC_SetLinefeedStatus(pProslic,LF_OPEN);
+ pPSTNCheck->pState.stage++;
+ return RC_NONE;
+
+ case 2:
+ /* Settle */
+ Si3226x_polled_delay(&(pPSTNCheck->pState), PSTN_DET_OPEN_FEMF_SETTLE);
+ return RC_NONE;
+
+ case 3:
+ /* Measure HAZV */
+ pPSTNCheck->vdiff_open = Si3226x_ReadMADCScaled(pProslic,VDIFF_COARSE,0);
+ /* Stop PSTN check if differential voltage > max_femf_vopen present */
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ {
+ LOGPRINT("%sDiff PSTN : Vopen = %d mV\n", LOGPRINT_PREFIX, pPSTNCheck->vdiff_open);
+ }
+#endif
+ if(abs_int32(pPSTNCheck->vdiff_open) > pPSTNCheck->max_femf_vopen)
+ {
+ pPSTNCheck->pState.stage = 70;
+ pPSTNCheck->return_status = RC_PSTN_OPEN_FEMF;
+ }
+ else
+ {
+ pPSTNCheck->pState.stage = 10;
+ }
+ return 0;
+
+ case 10:
+ /* Load first DC feed preset */
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->dcfPreset1);
+ ProSLIC_SetLinefeedStatus(pProslic,LF_FWD_ACTIVE);
+ pPSTNCheck->pState.stage++;
+ return RC_NONE;
+
+ case 11:
+ /* Settle */
+ Si3226x_polled_delay(&(pPSTNCheck->pState), PSTN_DET_DIFF_IV1_SETTLE);
+ return RC_NONE;
+
+ case 12:
+ /* Measure VDIFF and ILOOP, switch to 2nd DCFEED setup */
+ pPSTNCheck->vdiff1[pPSTNCheck->pState.sampleIterations] = Si3226x_ReadMADCScaled(pProslic,VDIFF_FILT,0);
+ pPSTNCheck->iloop1[pPSTNCheck->pState.sampleIterations] = Si3226x_ReadMADCScaled(pProslic,MADC_ILOOP,0);
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ {
+ LOGPRINT("%sDiff PSTN : Vdiff1[%d] = %d mV\n",
+ LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,pPSTNCheck->vdiff1[pPSTNCheck->pState.sampleIterations]);
+ LOGPRINT("%sDiff PSTN : Iloop1[%d] = %d uA\n",
+ LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,pPSTNCheck->iloop1[pPSTNCheck->pState.sampleIterations]);
+ }
+#endif
+ pPSTNCheck->pState.sampleIterations++;
+ if(pPSTNCheck->pState.sampleIterations >= pPSTNCheck->samples)
+ {
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->dcfPreset2);
+ pPSTNCheck->pState.stage++;
+ pPSTNCheck->pState.sampleIterations = 0;
+ }
+ return RC_NONE;
+
+ case 13:
+ /* Settle feed 500ms */
+ Si3226x_polled_delay(&(pPSTNCheck->pState), PSTN_DET_DIFF_IV2_SETTLE);
+ return RC_NONE;
+
+ case 14:
+ /* Measure VDIFF and ILOOP*/
+ pPSTNCheck->vdiff2[pPSTNCheck->pState.sampleIterations] = Si3226x_ReadMADCScaled(pProslic,VDIFF_FILT,0);
+ pPSTNCheck->iloop2[pPSTNCheck->pState.sampleIterations] = Si3226x_ReadMADCScaled(pProslic,MADC_ILOOP,0);
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ {
+ LOGPRINT("%sDiff PSTN : Vdiff2[%d] = %d mV\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,pPSTNCheck->vdiff2[pPSTNCheck->pState.sampleIterations]);
+ LOGPRINT("%sDiff PSTN : Iloop2[%d] = %d uA\n", LOGPRINT_PREFIX,
+ pPSTNCheck->pState.sampleIterations,pPSTNCheck->iloop2[pPSTNCheck->pState.sampleIterations]);
+ }
+#endif
+ pPSTNCheck->pState.sampleIterations++;
+ if(pPSTNCheck->pState.sampleIterations >= pPSTNCheck->samples)
+ {
+ /* Compute averages */
+ for (i=0; i<pPSTNCheck->samples; i++)
+ {
+ pPSTNCheck->vdiff1_avg += pPSTNCheck->vdiff1[i];
+ pPSTNCheck->iloop1_avg += pPSTNCheck->iloop1[i];
+ pPSTNCheck->vdiff2_avg += pPSTNCheck->vdiff2[i];
+ pPSTNCheck->iloop2_avg += pPSTNCheck->iloop2[i];
+ }
+ pPSTNCheck->vdiff1_avg /= pPSTNCheck->samples;
+ pPSTNCheck->iloop1_avg /= pPSTNCheck->samples;
+ pPSTNCheck->vdiff2_avg /= pPSTNCheck->samples;
+ pPSTNCheck->iloop2_avg /= pPSTNCheck->samples;
+
+ /* Force small (probably offset) currents to minimum value */
+ if(abs_int32(pPSTNCheck->iloop1_avg) < PSTN_DET_MIN_ILOOP) pPSTNCheck->iloop1_avg = PSTN_DET_MIN_ILOOP;
+ if(abs_int32(pPSTNCheck->iloop2_avg) < PSTN_DET_MIN_ILOOP) pPSTNCheck->iloop2_avg = PSTN_DET_MIN_ILOOP;
+
+
+ /* Calculate measured loop impedance */
+ pPSTNCheck->rl1 = abs_int32((pPSTNCheck->vdiff1_avg*1000L)/pPSTNCheck->iloop1_avg);
+ pPSTNCheck->rl2 = abs_int32((pPSTNCheck->vdiff2_avg*1000L)/pPSTNCheck->iloop2_avg);
+
+ /* Force non-zero loop resistance */
+ if(pPSTNCheck->rl1 == 0) pPSTNCheck->rl1 = 1;
+ if(pPSTNCheck->rl2 == 0) pPSTNCheck->rl2 = 1;
+
+ /* Qualify loop impedances */
+ pPSTNCheck->rl_ratio = (pPSTNCheck->rl1*1000L)/pPSTNCheck->rl2;
+#ifdef ENABLE_DEBUG
+ if (pProslic->debugMode)
+ {
+ const char func_string[] = "DiffPSTN: ";
+ LOGPRINT("%s%sVDIFF1 = %d mV\n", LOGPRINT_PREFIX_STRING, func_string, pPSTNCheck->vdiff1_avg);
+ LOGPRINT("%s%sILOOP1 = %d uA\n", LOGPRINT_PREFIX_STRING, func_string, pPSTNCheck->iloop1_avg);
+ LOGPRINT("%s%sVDIFF2 = %d mV\n", LOGPRINT_PREFIX_STRING, func_string,pPSTNCheck->vdiff2_avg);
+ LOGPRINT("%s%sILOOP2 = %d uA\n", LOGPRINT_PREFIX_STRING, func_string,pPSTNCheck->iloop2_avg);
+ LOGPRINT("%s%sRL1 = %d ohm\n", LOGPRINT_PREFIX_STRING, func_string,pPSTNCheck->rl1);
+ LOGPRINT("%s%sRL2 = %d ohm\n", LOGPRINT_PREFIX_STRING, func_string,pPSTNCheck->rl2);
+ LOGPRINT("%s%sRL_Ratio = %d \n", LOGPRINT_PREFIX_STRING, func_string,pPSTNCheck->rl_ratio);
+ }
+#endif
+
+ /* Restore */
+ pPSTNCheck->pState.sampleIterations = 0;
+ pPSTNCheck->pState.stage = 70;
+ }
+ return RC_NONE;
+
+ case 70: /* Reset test state, restore entry conditions */
+ ProSLIC_DCFeedSetup(pProslic,pPSTNCheck->entryDCFeedPreset);
+ ProSLIC_SetLinefeedStatus(pProslic,pPSTNCheck->lfstate_entry);
+ if(pProslic->deviceId->chipRev != 0) {
+ WriteReg(pProHW,pProslic->channel,ENHANCE, pPSTNCheck->enhanceRegSave);
+ }
+ pPSTNCheck->pState.stage = 0;
+ pPSTNCheck->pState.waitIterations = 0;
+ pPSTNCheck->pState.sampleIterations = 0;
+ return pPSTNCheck->return_status;
+
+ }
+return RC_NONE;
+}
+
+#endif
+
+/*
+** Function: Si3226x_ReadReg
+**
+** Description:
+** Allows direct SPI access at ProSLIC layer
+** Channel embeded in channel obj, so it is not passed into this func
+**
+** Returns:
+** uInt8 - register contents
+*/
+uInt8 Si3226x_ReadReg (proslicChanType *pProslic, uInt8 addr)
+{
+ return (ReadReg(pProHW,pProslic->channel, addr));
+}
+
+/*
+** Function: Si3226x_WriteReg
+**
+** Description:
+** Allows direct SPI access at ProSLIC layer
+** Channel embeded in channel obj, so it is not passed into this func
+**
+** Returns:
+** RC_NONE
+*/
+int Si3226x_WriteReg (proslicChanType *pProslic, uInt8 addr, uInt8 data)
+{
+ WriteReg(pProHW,pProslic->channel,addr,data);
+ return RC_NONE;
+}
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_patch_C_FB_2012DEC06.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_patch_C_FB_2012DEC06.c
new file mode 100644
index 0000000..1310e7d
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_patch_C_FB_2012DEC06.c
@@ -0,0 +1,311 @@
+/*
+** Generated from si3226x_patch_C_FB_2012DEC06.dsp_prom
+** on 12-06-2012 at 7:57:16
+** Patch ID = 0x12062012L
+*/
+#include "si_voice_datatypes.h"
+#include "si3226x.h"
+
+static const uInt32 patchData [] = {
+141541L,
+540867L,
+141541L,
+543427L,
+141541L,
+553155L,
+141541L,
+577731L,
+141541L,
+579779L,
+141541L,
+581315L,
+141541L,
+592579L,
+141541L,
+633027L,
+141541L,
+637635L,
+141541L,
+638147L,
+141541L,
+638659L,
+141541L,
+639171L,
+141541L,
+639683L,
+141541L,
+640195L,
+141541L,
+640707L,
+141541L,
+641219L,
+736L,
+491712L,
+452200L,
+141541L,
+491200L,
+5733L,
+524290L,
+142565L,
+550083L,
+3685L,
+519266L,
+5220L,
+144098L,
+550083L,
+3685L,
+524291L,
+141541L,
+551619L,
+5221L,
+3682L,
+524292L,
+5L,
+141541L,
+135362L,
+98021L,
+727745L,
+474213L,
+17637L,
+557251L,
+101093L,
+557251L,
+473701L,
+515653L,
+843365L,
+188002L,
+843355L,
+145125L,
+560835L,
+524290L,
+660069L,
+518053L,
+517224L,
+518244L,
+142565L,
+564419L,
+524288L,
+521733L,
+843365L,
+188002L,
+524315L,
+145125L,
+568003L,
+843365L,
+522850L,
+523387L,
+147685L,
+573123L,
+522363L,
+145125L,
+575171L,
+521826L,
+141541L,
+575683L,
+518757L,
+521826L,
+141541L,
+575683L,
+521824L,
+522245L,
+522338L,
+141541L,
+716481L,
+173669L,
+523845L,
+141541L,
+730304L,
+523877L,
+141541L,
+690368L,
+614117L,
+588995L,
+457221L,
+558181L,
+457122L,
+457333L,
+143077L,
+588995L,
+144608L,
+587971L,
+524292L,
+141541L,
+588483L,
+524304L,
+671746L,
+558181L,
+410018L,
+437365L,
+143586L,
+100034L,
+141541L,
+98498L,
+550117L,
+619715L,
+558181L,
+410018L,
+403061L,
+143077L,
+619715L,
+524290L,
+143589L,
+608963L,
+402533L,
+524290L,
+400901L,
+29189L,
+431717L,
+408133L,
+432741L,
+406085L,
+392805L,
+407621L,
+792165L,
+405573L,
+406629L,
+792133L,
+408677L,
+431680L,
+432645L,
+409189L,
+392785L,
+402949L,
+141541L,
+630979L,
+560741L,
+400482L,
+398852L,
+143077L,
+615107L,
+402533L,
+398946L,
+400901L,
+29186L,
+400389L,
+141541L,
+630979L,
+400997L,
+262242L,
+143077L,
+618691L,
+524291L,
+400901L,
+29189L,
+141541L,
+630979L,
+558181L,
+407458L,
+524309L,
+694789L,
+558085L,
+694789L,
+403045L,
+524290L,
+143077L,
+630979L,
+405605L,
+792133L,
+408165L,
+431685L,
+406117L,
+432709L,
+407653L,
+392768L,
+402949L,
+694789L,
+560645L,
+694789L,
+743525L,
+119426L,
+141541L,
+1003201L,
+560741L,
+524290L,
+143584L,
+636099L,
+141541L,
+191682L,
+694789L,
+141541L,
+859842L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+0L
+};
+
+static const uInt16 patchEntries [] = {
+950,
+4347,
+3431,
+1425,
+1347,
+4287,
+4006,
+4469,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0
+};
+
+static const uInt16 patchSupportAddr [] = {
+800,
+795,
+799,
+798,
+794,
+787,
+786,
+782,
+892,
+893,
+925,
+926,
+1014,
+1020,
+1021,
+1022,
+0
+};
+
+static const uInt32 patchSupportData [] = {
+0x200000L,
+0x7D80000L,
+0x69580EAL,
+0x82C58CL,
+0x600000L,
+0x0L,
+0x320000L,
+0x0L,
+0x400000L,
+0x0L,
+0xA00000L,
+0x1F00000L,
+0x2D8000L,
+0x0L,
+0x1A9FBDAL,
+0x1C28F4EL,
+0x0L
+};
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+const proslicPatch si3226xPatchRevCFlbk = {
+#else
+const proslicPatch RevCPatch = {
+#endif
+ patchData,
+ patchEntries,
+ 0x12062012L,
+ patchSupportAddr,
+ patchSupportData
+};
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_patch_C_FB_2014APR23.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_patch_C_FB_2014APR23.c
new file mode 100644
index 0000000..381f915
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si3226x_patch_C_FB_2014APR23.c
@@ -0,0 +1,360 @@
+/*
+** Generated from si3226x_patch_C_FB_2014APR23.dsp_prom
+** on 04-23-2014 at 16:48:21
+** Patch ID = 0x04232014L
+*/
+#include "si_voice_datatypes.h"
+#include "si3226x.h"
+
+static const uInt32 patchData [] = {
+141541L,
+540867L,
+141541L,
+543427L,
+141541L,
+553155L,
+141541L,
+577731L,
+141541L,
+579779L,
+141541L,
+581315L,
+141541L,
+592579L,
+141541L,
+633027L,
+141541L,
+637635L,
+141541L,
+639683L,
+141541L,
+650947L,
+141541L,
+659139L,
+141541L,
+659651L,
+141541L,
+660163L,
+141541L,
+660675L,
+141541L,
+661187L,
+736L,
+491712L,
+452200L,
+141541L,
+491200L,
+5733L,
+524290L,
+142565L,
+550083L,
+3685L,
+519266L,
+5220L,
+144098L,
+550083L,
+3685L,
+524291L,
+141541L,
+551619L,
+5221L,
+3682L,
+524292L,
+5L,
+141541L,
+135362L,
+98021L,
+727745L,
+474213L,
+17637L,
+557251L,
+101093L,
+557251L,
+473701L,
+515653L,
+843365L,
+188002L,
+843355L,
+145125L,
+560835L,
+524290L,
+660069L,
+518053L,
+517224L,
+518244L,
+142565L,
+564419L,
+524288L,
+521733L,
+843365L,
+188002L,
+524315L,
+145125L,
+568003L,
+843365L,
+522850L,
+523387L,
+147685L,
+573123L,
+522363L,
+145125L,
+575171L,
+521826L,
+141541L,
+575683L,
+518757L,
+521826L,
+141541L,
+575683L,
+521824L,
+522245L,
+522338L,
+141541L,
+716481L,
+173669L,
+523845L,
+141541L,
+730304L,
+523877L,
+141541L,
+690368L,
+614117L,
+588995L,
+457221L,
+558181L,
+457122L,
+457333L,
+143077L,
+588995L,
+144608L,
+587971L,
+524292L,
+141541L,
+588483L,
+524304L,
+671746L,
+558181L,
+410018L,
+437365L,
+143586L,
+100034L,
+141541L,
+98498L,
+550117L,
+619715L,
+558181L,
+410018L,
+403061L,
+143077L,
+619715L,
+524290L,
+143589L,
+608963L,
+402533L,
+524290L,
+400901L,
+29189L,
+431717L,
+408133L,
+432741L,
+406085L,
+392805L,
+407621L,
+792165L,
+405573L,
+406629L,
+792133L,
+408677L,
+431680L,
+432645L,
+409189L,
+392785L,
+402949L,
+141541L,
+630979L,
+560741L,
+400482L,
+398852L,
+143077L,
+615107L,
+402533L,
+398946L,
+400901L,
+29186L,
+400389L,
+141541L,
+630979L,
+400997L,
+262242L,
+143077L,
+618691L,
+524291L,
+400901L,
+29189L,
+141541L,
+630979L,
+558181L,
+407458L,
+524309L,
+694789L,
+558085L,
+694789L,
+403045L,
+524290L,
+143077L,
+630979L,
+405605L,
+792133L,
+408165L,
+431685L,
+406117L,
+432709L,
+407653L,
+392768L,
+402949L,
+694789L,
+560645L,
+694789L,
+743525L,
+119426L,
+141541L,
+1003201L,
+560741L,
+524290L,
+143584L,
+636099L,
+141541L,
+191682L,
+694789L,
+141541L,
+859842L,
+171109L,
+170565L,
+141541L,
+963776L,
+524291L,
+144613L,
+641731L,
+199685L,
+667365L,
+644803L,
+431717L,
+197189L,
+136805L,
+198725L,
+170597L,
+262242L,
+524291L,
+144613L,
+647875L,
+170501L,
+667365L,
+886464L,
+136805L,
+180293L,
+141541L,
+886464L,
+668900L,
+652995L,
+524290L,
+524305L,
+179717L,
+5221L,
+524290L,
+115824L,
+644L,
+179813L,
+144608L,
+657603L,
+9893L,
+524298L,
+141541L,
+683712L,
+524293L,
+524293L,
+524293L,
+524293L,
+524293L,
+0L
+};
+
+static const uInt16 patchEntries [] = {
+950,
+4347,
+3431,
+1425,
+1347,
+4287,
+4006,
+4469,
+1881,
+1720,
+1319,
+0,
+0,
+0,
+0,
+0
+};
+
+static const uInt16 patchSupportAddr [] = {
+800,
+795,
+799,
+798,
+794,
+787,
+786,
+782,
+892,
+893,
+925,
+926,
+1014,
+1020,
+1021,
+1022,
+333,
+334,
+352,
+226,
+19,
+0
+};
+
+static const uInt32 patchSupportData [] = {
+0x200000L,
+0x7D80000L,
+0x69580EAL,
+0x82C58CL,
+0x600000L,
+0x0L,
+0x320000L,
+0x0L,
+0x400000L,
+0x0L,
+0xA00000L,
+0x1F00000L,
+0x2D8000L,
+0x0L,
+0x1A9FBDAL,
+0x1C28F4EL,
+0x0L,
+0x0L,
+0x0L,
+0xFFFFFFFL,
+0x54AAAAAL,
+0x0L
+};
+
+#ifdef SIVOICE_MULTI_BOM_SUPPORT
+const proslicPatch si3226xPatchRevCFlbk = {
+#else
+const proslicPatch RevCPatch = {
+#endif
+ patchData,
+ patchEntries,
+ 0x04232014L,
+ patchSupportAddr,
+ patchSupportData
+};
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si_voice.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si_voice.c
new file mode 100644
index 0000000..61fb567
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si_voice.c
@@ -0,0 +1,519 @@
+/*
+** Copyright (c) 2007-2016 by Silicon Laboratories
+**
+** $Id: si_voice.c 5419 2016-01-13 00:40:56Z nizajerk $
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the header file for the ProSLIC driver.
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice.h"
+#include "proslic_api_config.h"
+
+#ifdef ENABLE_DEBUG
+#define LOGPRINT_PREFIX "SiVoice: "
+#endif
+
+#define pCtrl(X) (X)->deviceId->ctrlInterface
+#define pProHW(X) pCtrl((X))->hCtrl
+#define ReadReg(PCHAN, CHANNEL, REGADDR) (PCHAN)->deviceId->ctrlInterface->ReadRegister_fptr(pProHW(PCHAN), (CHANNEL), (REGADDR))
+#define WriteReg(PCHAN, CHANNEL, REGADDR, REGDATA) (PCHAN)->deviceId->ctrlInterface->WriteRegister_fptr(pProHW(PCHAN), (CHANNEL), (REGADDR), (REGDATA))
+
+/*
+** Control object constructor/destructor
+*/
+int SiVoice_createControlInterfaces (SiVoiceControlInterfaceType **pCtrlIntf,
+ uInt32 interface_count)
+{
+ TRACEPRINT_NOCHAN("count = %lu\n", (unsigned long)interface_count);
+#ifndef DISABLE_MALLOC
+ *pCtrlIntf = SIVOICE_CALLOC(sizeof(SiVoiceControlInterfaceType),
+ interface_count);
+ if(*pCtrlIntf == NULL)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%s%s: failed to allocate memory", LOGPRINT_PREFIX, __FUNCTION__);
+#endif
+ return RC_NO_MEM;
+ }
+
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+
+int SiVoice_destroyControlInterfaces (SiVoiceControlInterfaceType **pCtrlIntf)
+{
+
+ TRACEPRINT_NOCHAN("\n",NULL);
+#ifndef DISABLE_MALLOC
+ if( pCtrlIntf && *pCtrlIntf)
+ {
+ SIVOICE_FREE ((SiVoiceControlInterfaceType *)*pCtrlIntf);
+ *pCtrlIntf = NULL;
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+
+/*
+** Device object constructor/destructor
+*/
+int SiVoice_createDevices (SiVoiceDeviceType **pDevice, uInt32 device_count)
+{
+
+ TRACEPRINT_NOCHAN("\n",NULL);
+#ifndef DISABLE_MALLOC
+ *pDevice = SIVOICE_CALLOC (sizeof(SiVoiceDeviceType), device_count);
+
+ if(*pDevice == NULL)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%s%s: failed to allocate memory", LOGPRINT_PREFIX, __FUNCTION__);
+#endif
+ return RC_NO_MEM;
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+
+int SiVoice_destroyDevices (SiVoiceDeviceType **pDevice)
+{
+
+ TRACEPRINT_NOCHAN("\n", NULL);
+#ifndef DISABLE_MALLOC
+ if(pDevice && *pDevice)
+ {
+ SIVOICE_FREE ((SiVoiceDeviceType *)*pDevice);
+ *pDevice = NULL;
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+
+/*
+** Channel object constructor/destructor
+*/
+int SiVoice_createChannels (SiVoiceChanType_ptr *pChan, uInt32 channel_count)
+{
+
+ TRACEPRINT_NOCHAN("count = %lu\n", (unsigned long) channel_count);
+#ifndef DISABLE_MALLOC
+ *pChan = SIVOICE_CALLOC(sizeof(SiVoiceChanType),channel_count);
+ if(*pChan == NULL)
+ {
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%s%s: failed to allocate memory", LOGPRINT_PREFIX, __FUNCTION__);
+#endif
+ return RC_NO_MEM;
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+
+int SiVoice_destroyChannels (SiVoiceChanType_ptr *hProslic)
+{
+
+ TRACEPRINT_NOCHAN("\n",NULL);
+#ifndef DISABLE_MALLOC
+ if(hProslic && *hProslic)
+ {
+ SIVOICE_FREE ((SiVoiceChanType_ptr)*hProslic);
+ *hProslic = NULL;
+ }
+ return RC_NONE;
+#else
+ return RC_UNSUPPORTED_FEATURE;
+#endif
+}
+
+/*
+** Host control linkage
+*/
+int SiVoice_setControlInterfaceCtrlObj (SiVoiceControlInterfaceType *pCtrlIntf,
+ void *hCtrl)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->hCtrl = hCtrl;
+ return RC_NONE;
+}
+
+/*
+** Host reset linkage
+*/
+int SiVoice_setControlInterfaceReset (SiVoiceControlInterfaceType *pCtrlIntf,
+ ctrl_Reset_fptr Reset_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->Reset_fptr = Reset_fptr;
+ return RC_NONE;
+}
+
+/*
+** Host register/RAM read/write linkage
+*/
+int SiVoice_setControlInterfaceWriteRegister (SiVoiceControlInterfaceType
+ *pCtrlIntf, ctrl_WriteRegister_fptr WriteRegister_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->WriteRegister_fptr = WriteRegister_fptr;
+ return RC_NONE;
+}
+
+int SiVoice_setControlInterfaceReadRegister (SiVoiceControlInterfaceType
+ *pCtrlIntf, ctrl_ReadRegister_fptr ReadRegister_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->ReadRegister_fptr = ReadRegister_fptr;
+ return RC_NONE;
+}
+
+int SiVoice_setControlInterfaceWriteRAM (SiVoiceControlInterfaceType *pCtrlIntf,
+ ctrl_WriteRAM_fptr WriteRAM_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->WriteRAM_fptr = WriteRAM_fptr;
+ return RC_NONE;
+}
+
+int SiVoice_setControlInterfaceReadRAM (SiVoiceControlInterfaceType *pCtrlIntf,
+ ctrl_ReadRAM_fptr ReadRAM_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->ReadRAM_fptr = ReadRAM_fptr;
+ return RC_NONE;
+}
+
+/*
+** Host timer linkage
+*/
+int SiVoice_setControlInterfaceTimerObj (SiVoiceControlInterfaceType *pCtrlIntf,
+ void *hTimer)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->hTimer = hTimer;
+ return RC_NONE;
+}
+
+int SiVoice_setControlInterfaceDelay (SiVoiceControlInterfaceType *pCtrlIntf,
+ system_delay_fptr Delay_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->Delay_fptr = Delay_fptr;
+ return RC_NONE;
+}
+
+int SiVoice_setControlInterfaceSemaphore (SiVoiceControlInterfaceType
+ *pCtrlIntf, ctrl_Semaphore_fptr semaphore_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->Semaphore_fptr = semaphore_fptr;
+ return RC_NONE;
+}
+
+int SiVoice_setControlInterfaceTimeElapsed (SiVoiceControlInterfaceType
+ *pCtrlIntf, system_timeElapsed_fptr timeElapsed_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->timeElapsed_fptr = timeElapsed_fptr;
+ return RC_NONE;
+}
+
+int SiVoice_setControlInterfaceGetTime (SiVoiceControlInterfaceType *pCtrlIntf,
+ system_getTime_fptr getTime_fptr)
+{
+ TRACEPRINT_NOCHAN("\n",NULL);
+ pCtrlIntf->getTime_fptr = getTime_fptr;
+ return RC_NONE;
+}
+
+/*
+** Channel object initialization
+*/
+int SiVoice_SWInitChan (SiVoiceChanType_ptr pChan,int channel,int chipType,
+ SiVoiceDeviceType *pDeviceObj, SiVoiceControlInterfaceType *pCtrlIntf)
+{
+ TRACEPRINT_NOCHAN( "channel = %d chipType = %d\n", channel, chipType);
+ pChan->channel = (uInt8)channel;
+ pChan->deviceId = pDeviceObj;
+ pChan->deviceId->ctrlInterface = pCtrlIntf;
+ pChan->channelEnable=1;
+ pChan->error = RC_NONE;
+ pChan->debugMode = 0;
+ pChan->dcdc_polarity_invert = 0;
+#ifdef PROSLIC_BOM_DEFAULT
+ pChan->bomOption = PROSLIC_BOM_DEFAULT;
+#else
+ pChan->bomOption = 0;
+#endif
+
+ switch (chipType)
+ {
+ case SI3217X_TYPE:
+ pChan->deviceId->chipType = SI32171;
+ break;
+ case SI3218X_TYPE:
+ pChan->deviceId->chipType = SI32180;
+ break;
+ case SI3226X_TYPE:
+ pChan->deviceId->chipType = SI32260;
+ break;
+ case SI3228X_TYPE:
+ pChan->deviceId->chipType = SI32280;
+ break;
+ case SI3050_TYPE:
+ pChan->deviceId->chipType = SI3050;
+ break;
+
+ default:
+ return RC_UNSUPPORTED_FEATURE;
+ }
+ return RC_NONE;
+}
+
+/*
+** Reset control
+*/
+int SiVoice_Reset (SiVoiceChanType_ptr pChan)
+{
+ TRACEPRINT_NOCHAN( "\n", NULL);
+ /*
+ ** assert reset, wait 250ms, release reset, wait 250ms
+ */
+ pChan->deviceId->ctrlInterface->Reset_fptr(
+ pChan->deviceId->ctrlInterface->hCtrl,1);
+ pChan->deviceId->ctrlInterface->Delay_fptr(
+ pChan->deviceId->ctrlInterface->hTimer,250);
+ pChan->deviceId->ctrlInterface->Reset_fptr(
+ pChan->deviceId->ctrlInterface->hCtrl,0);
+ pChan->deviceId->ctrlInterface->Delay_fptr(
+ pChan->deviceId->ctrlInterface->hTimer,250);
+
+ /* Special case for 321x: need to enable daisy chain... */
+ return RC_NONE;
+}
+
+/*
+** Debug Mode Control
+*/
+int SiVoice_setSWDebugMode (SiVoiceChanType_ptr pChan, int debugEn)
+{
+#ifdef ENABLE_DEBUG
+ TRACEPRINT_NOCHAN( "debugEn %d\n", debugEn);
+ pChan->debugMode = (0xFE & pChan->debugMode) | (debugEn != 0);
+#endif
+ return RC_NONE;
+}
+
+/*
+** Trace Mode Control
+*/
+int SiVoice_setTraceMode (SiVoiceChanType_ptr pChan, int traceEn)
+{
+#ifdef ENABLE_TRACES
+ TRACEPRINT_NOCHAN( "debugEn %d\n", traceEn);
+ pChan->debugMode = (0xFD & pChan->debugMode) | ((traceEn != 0)<<1);
+#endif
+ return RC_NONE;
+}
+
+/*
+** Error status
+*/
+int SiVoice_getErrorFlag (SiVoiceChanType_ptr pChan, int *error)
+{
+ TRACEPRINT( pChan, "\n", NULL);
+ *error = pChan->error;
+ return RC_NONE;
+}
+
+int SiVoice_clearErrorFlag (SiVoiceChanType_ptr pChan)
+{
+ TRACEPRINT( pChan, "\n", NULL);
+ pChan->error = RC_NONE;
+ return RC_NONE;
+}
+
+/*
+** Channel status
+*/
+int SiVoice_setChannelEnable (SiVoiceChanType_ptr pChan, int chanEn)
+{
+ TRACEPRINT( pChan, "enable = %d\n", chanEn);
+ pChan->channelEnable = chanEn;
+ return RC_NONE;
+}
+
+int SiVoice_getChannelEnable (SiVoiceChanType_ptr pChan, int *chanEn)
+{
+ TRACEPRINT( pChan, "\n", NULL);
+ *chanEn = pChan->channelEnable;
+ return RC_NONE;
+}
+
+uInt8 SiVoice_ReadReg(SiVoiceChanType_ptr hProslic,uInt8 addr)
+{
+ TRACEPRINT( hProslic, "addr = %u\n", (unsigned int)addr);
+ return ReadReg(hProslic, hProslic->channel, addr);
+}
+
+int SiVoice_WriteReg(SiVoiceChanType_ptr hProslic,uInt8 addr,uInt8 data)
+{
+ TRACEPRINT( hProslic, "addr = %u data = 0x%02X\n", (unsigned int)addr,
+ (unsigned int) data);
+ return WriteReg(hProslic, hProslic->channel, addr, data);
+}
+
+/*****************************************************************************************************/
+#if defined(SI3217X) || defined(SI3218X) || defined(SI3226X) || defined(SI3228X)
+#include "proslic.h"
+#ifdef SI32217X
+#include "si3217x_intf.h"
+#endif
+#ifdef SI3218X
+#include "si3218x_intf.h"
+#endif
+#ifdef SI3226X
+#include "si3226x_intf.h"
+#endif
+#ifdef SI3228X
+#include "si3228x_intf.h"
+#endif
+/* Iterate through the number of channels to determine if it's a SLIC, DAA, or unknown. Rev ID and chiptype is
+ * also filled in.
+ */
+#if 0
+int SiVoice_IdentifyChannels(SiVoiceChanType_ptr *pProslic, int size,
+ int *slicCount, int *daaCount)
+{
+ int i;
+ int rc = RC_NONE;
+ SiVoiceChanType_ptr currentChannel;
+
+ TRACEPRINT( *pProslic, "size = %d\n", size);
+
+ if(slicCount)
+ {
+ *slicCount = 0;
+ }
+ if(daaCount)
+ {
+ *daaCount = 0;
+ }
+
+ for(i = 0; i < size; i++)
+ {
+ currentChannel = pProslic[i];
+ /* SiVoice_SWInitChan() fills in the chipType initially with something the user provided, fill it
+ * in with the correct info.. The GetChipInfo may probe registers to compare them with their
+ * initial values, so this function MUST only be called after a chipset reset.
+ */
+#ifdef SI3217X
+ if (currentChannel->deviceId->chipType >= SI32171
+ && currentChannel->deviceId->chipType <= SI32179)
+ {
+ rc = Si3217x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3218X
+ if (currentChannel->deviceId->chipType >= SI32180
+ && currentChannel->deviceId->chipType <= SI32189)
+ {
+ rc = Si3218x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3226X
+ if (currentChannel->deviceId->chipType >= SI32260
+ && currentChannel->deviceId->chipType <= SI32269)
+ {
+ rc = Si3226x_GetChipInfo(currentChannel);
+ }
+#endif
+#ifdef SI3228X
+ if (currentChannel->deviceId->chipType >= SI32280
+ && currentChannel->deviceId->chipType <= SI32289)
+ {
+ rc = Si3228x_GetChipInfo(currentChannel);
+ }
+#endif
+ if(rc != RC_NONE)
+ {
+ return rc;
+ }
+
+ currentChannel->channelType = ProSLIC_identifyChannelType(currentChannel);
+ if(currentChannel->channelType == PROSLIC)
+ {
+ if(slicCount)
+ {
+ (*slicCount)++;
+ }
+ }
+ else if(currentChannel->channelType == DAA)
+ {
+ if(daaCount)
+ {
+ (*daaCount)++;
+ }
+ }
+#ifdef ENABLE_DEBUG
+ {
+ const char *dev_type = "UNKNOWN";
+ if(currentChannel->channelType == PROSLIC)
+ {
+ dev_type = "PROSLIC";
+ }
+ else if(currentChannel->channelType == DAA)
+ {
+ dev_type = "DAA";
+ }
+ LOGPRINT("%sChannel %d: Type = %s Rev = %d\n",
+ LOGPRINT_PREFIX, currentChannel->channel, dev_type,
+ currentChannel->deviceId->chipRev);
+
+ }
+#endif /* ENABLE_DEBUG */
+ }
+ return RC_NONE;
+}
+#endif
+#endif
+
+/*
+** Function: ProSLIC_Version
+**
+** Description:
+** Return API version
+**
+** Returns:
+** string of the API release.
+*/
+
+extern const char *SiVoiceAPIVersion;
+char *SiVoice_Version()
+{
+ return (char *)SiVoiceAPIVersion;
+}
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si_voice_version.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si_voice_version.c
new file mode 100644
index 0000000..3c8331c
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/si_voice_version.c
@@ -0,0 +1,22 @@
+/*
+** Copyright (c) 2016 by Silicon Laboratories
+**
+** file: si_voice_version.c
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** THIS FILE IS AUTOGENERATED - DO NOT MODIFY
+**
+*/
+
+
+
+char *SiVoiceAPIVersion = "8.0.0";
+
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/spi_adt.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/spi_adt.c
new file mode 100644
index 0000000..a40af34
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/spi_adt.c
@@ -0,0 +1,384 @@
+/*
+** $Id: dummy_spi.c 109 2008-10-22 19:45:09Z lajordan@SILABS.COM $
+**
+** spi.h
+** SPI driver implementation file
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** File Description:
+** This is the implementation file for the SPI driver used
+** in the ProSLIC demonstration code.
+**
+** Dependancies:
+**
+**
+*/
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/mutex.h>
+#include <linux/spi/spi.h>
+
+#include "silicon_spi.h"
+#include "si_voice_datatypes.h"
+#include "si3217x_registers.h"
+#define DELAY_CNT 10
+
+#define MAX_SPI_READ_TIMS 200
+#undef DEBUG_SLIC_ON
+uInt8 Si_shit[] = {0,16,8,24,4,20,12};
+//#define USE_GPIO_SPI 1
+
+static DEFINE_MUTEX(spi_lock);
+
+extern unsigned char spi_gpio_read_single8(void);
+extern void spi_gpio_write_single8(unsigned char data);
+extern void spi_gpio_mode_start(void);
+extern void spi_gpio_mode_stop(void);
+extern struct spi_device *pslicSpi;
+void SPI_BUS_LOCK(void)
+{
+ mutex_lock(&spi_lock);
+}
+void SPI_BUS_UNLOCK(void)
+{
+ mutex_unlock(&spi_lock);
+}
+int spi_chipid_get(unsigned char port, unsigned char *cs, unsigned char *ch)
+{
+ return 0;
+}
+int spi_readb(unsigned char chip_select, unsigned char *pdata)
+{
+ unsigned char read_byte;
+ read_byte = spi_gpio_read_single8();
+ memcpy(pdata, &read_byte, 1);
+ return 0;
+}
+int spi_writeb(unsigned char chip_select, unsigned char data)
+{
+ spi_gpio_write_single8(data);
+ return 0;
+}
+
+
+/*
+** Function: SPI_Init
+**
+** Description:
+** Initializes the SPI interface
+**
+** Input Parameters:
+** none
+**
+** Return:
+** none
+*/
+void SPI_Init (void){
+
+#ifdef USE_GPIO_SPI_SLIC
+
+ spi_gpio_mode_start();
+#endif
+ return;
+}
+
+void SPI_Exit (void){
+#ifdef USE_GPIO_SPI_SLIC
+ spi_gpio_mode_stop();
+#endif
+ return;
+}
+
+/*
+** Function: SlicHardReset
+**
+** Description:
+** Input Parameters:
+** none
+**
+** Return:
+** none
+*/
+void SlicHardReset(void)
+{
+
+ return;
+}
+
+
+/*
+** Function: spiGci_ResetWrapper
+**
+** Description:
+** Sets the reset pin of the ProSLIC
+*/
+int ctrl_ResetWrapper (void * hSpiGci, int status)
+{
+ ctrl_WriteRegisterWrapper(hSpiGci,0,1,status); /* bit1 */
+
+ return 0;
+}
+
+ void ctrl_ReadRegister(uInt8 cs, uInt8 channel, uInt8 regAddr, uInt8 *prdata)
+{
+ uInt8 rctrl = 0;
+ uInt8 rctrlbuf[2];
+ int ret = 0;
+ rctrl = (((Si_shit[channel%CHIP_NUM_IN_DAISY]) & SPI_CID_MASK )| SPI_REG_BIT) | (SPI_READ_BIT);
+
+#ifdef USE_GPIO_SPI_SLIC
+
+ spi_writeb(cs, rctrl);
+ udelay(DELAY_CNT);
+ spi_writeb(cs, regAddr);
+ udelay(DELAY_CNT);
+ spi_readb(cs, prdata);
+#elif defined USE_STD_SPI_SLIC
+
+ rctrlbuf[0] = rctrl;
+ rctrlbuf[1] = regAddr;
+ ret += spi_write(pslicSpi, rctrlbuf, 1);
+ udelay(10);
+ ret += spi_write(pslicSpi, &rctrlbuf[1], 1);
+ udelay(10);
+ ret += spi_read(pslicSpi, prdata, 1);
+ //printk("ctrl_ReadRegister fail rctrl: =%x,regAddr=%x\n",rctrl,regAddr);
+
+ if(ret != 0)
+ {
+ printk("ctrl_ReadRegister fail ret =%d\n",ret);
+ }
+#endif
+ return;
+}
+
+ void ctrl_WriteRegister(uInt8 cs, uInt8 channel, uInt8 regAddr, uInt8 wdata)
+{
+ uInt8 wctrl = 0;
+ int ret =0;
+ uInt8 wctrlbuf[3];
+ wctrl = (((Si_shit[channel%CHIP_NUM_IN_DAISY]) & SPI_CID_MASK) | SPI_REG_BIT) & ~SPI_READ_BIT;
+#ifdef USE_GPIO_SPI_SLIC
+
+
+ spi_writeb(cs, wctrl);
+ udelay(DELAY_CNT);
+ spi_writeb(cs, regAddr);
+ udelay(DELAY_CNT);
+ spi_writeb(cs, wdata);
+
+#elif defined USE_STD_SPI_SLIC
+
+ wctrlbuf[0] = wctrl;
+ wctrlbuf[1] = regAddr;
+ wctrlbuf[2] = wdata;
+
+ ret += spi_write(pslicSpi, wctrlbuf, 1);
+ udelay(10);
+ ret += spi_write(pslicSpi, &wctrlbuf[1], 1);
+ udelay(10);
+ ret += spi_write(pslicSpi, &wctrlbuf[2], 1);
+
+ if(ret != 0)
+ {
+ printk("ctrl_WriteRegister fail ret =%d\n",ret);
+ }
+#endif
+ return;
+}
+
+/*
+** SPI/GCI register read
+**
+** Description:
+** Reads a single ProSLIC register
+**
+** Input Parameters:
+** channel: ProSLIC channel to read from
+** num: number of reads to perform
+** regAddr: Address of register to read
+** addr_inc: whether to increment address after each read
+** data: data to read from register
+**
+** Return:
+** none
+*/
+
+uInt8 ctrl_ReadRegisterWrapper (void * hSpiGci, uInt8 channel,uInt8 regAddr)
+{
+ uInt8 rdata = 0;
+
+ SPI_BUS_LOCK();
+ ctrl_ReadRegister(((ctrl_S *)hSpiGci)->port, channel, regAddr, &rdata);
+ SPI_BUS_UNLOCK();
+
+ return rdata;
+}
+
+
+/*
+** Function: spiGci_WriteRegisterWrapper
+**
+** Description:
+** Writes a single ProSLIC register
+**
+** Input Parameters:
+** channel: ProSLIC channel to write to
+** address: Address of register to write
+** data: data to write to register
+**
+** Return:
+** none
+*/
+int ctrl_WriteRegisterWrapper (void * hSpiGci, uInt8 channel, uInt8 regAddr, uInt8 data)
+{
+ SPI_BUS_LOCK();
+ ctrl_WriteRegister(((ctrl_S *)hSpiGci)->port, channel, regAddr, data);
+ SPI_BUS_UNLOCK();
+
+ return 0;
+}
+
+
+/*
+** Function: SPI_ReadRAMWrapper
+**
+** Description:
+** Reads a single ProSLIC RAM location
+**
+** Input Parameters:
+** channel: ProSLIC channel to read from
+** address: Address of RAM location to read
+** pData: data to read from RAM location
+**
+** Return:
+** none
+*/
+uInt32 ctrl_ReadRAMWrapper (void * hSpiGci, uInt8 channel, uInt16 ramAddr)
+{
+ uInt8 TimCnt = 0;
+ uInt8 wdata = 0;
+ uInt8 rdata = 0;
+ uInt32 rx = 0;
+ ctrl_S *pSpi = (ctrl_S *)hSpiGci;
+
+ SPI_BUS_LOCK();
+ /*1. Write REG5 (RAM_ADR_HI) to set up bits [10:8] of the desired RAM address. */
+ wdata = ((ramAddr>>3) & 0xe0);
+ ctrl_WriteRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_ADDR_HI, wdata);
+
+ /* 2. Write REG10 (RAM_ADR_LO). This action initiates the READ transaction causing the RAM_STAT bit to set. */
+ wdata = (uInt8)ramAddr;
+ ctrl_WriteRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_ADDR_LO, wdata);
+
+ /* 3. Wait for the RAM_STAT bit to clear.*/
+ while(1)
+ {
+ ctrl_ReadRegister(pSpi->port, channel, SI3217X_COM_REG_RAMSTAT, &rdata);
+
+ if( (rdata&1) == 0 ) break;
+
+ TimCnt++;
+ if( TimCnt > MAX_SPI_READ_TIMS )
+ {
+ /* The chip didn't ack, maybe broken. */
+ printk("\nSLIC Read RAM error at channel %d, at ramAddr 0x%x!\n", channel, ramAddr);
+ SPI_BUS_UNLOCK();
+ return 0;
+ }
+ }
+
+ /* 4. Read the 29-bit data from REG 6 through REG 9 (RAM_DATA_B0 through RAM_DATA_B3). */
+ ctrl_ReadRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_DATA_B0, &rdata);
+ rx = rdata>>3;
+ ctrl_ReadRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_DATA_B1, &rdata);
+ rx |= rdata<<5;
+ ctrl_ReadRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_DATA_B2, &rdata);
+ rx |= rdata<<13;
+ ctrl_ReadRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_DATA_B3, &rdata);
+ rx |= rdata<<21;
+ SPI_BUS_UNLOCK();
+
+ return rx;
+}
+
+
+/*
+** Function: SPI_WriteRAMWrapper
+**
+** Description:
+** Writes a single ProSLIC RAM location
+**
+** Input Parameters:
+** channel: ProSLIC channel to write to
+** address: Address of RAM location to write
+** data: data to write to RAM location
+**
+** Return:
+** none
+*/
+int ctrl_WriteRAMWrapper (void * hSpiGci, uInt8 channel, uInt16 ramAddr, ramData data)
+{
+ uInt8 TimCnt = 0;
+ uInt8 wdata = 0;
+ uInt8 rdata = 0;
+ ctrl_S *pSpi = (ctrl_S *)hSpiGci;
+
+ SPI_BUS_LOCK();
+ /*1. Write REG5 (RAM_ADR_HI) to set up bits [10:8] of the desired RAM address.*/
+ wdata = ((ramAddr>>3) & 0xe0);
+ ctrl_WriteRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_ADDR_HI, wdata);
+
+ /*2. Write REG6 through REG9 (RAM_DATA_B0 through RAM_DATA_B3) with the desired 29-bit data to be written.*/
+ wdata = (uInt8) (data<<3);
+ ctrl_WriteRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_DATA_B0, wdata);
+
+ wdata = (uInt8) (data>>5);
+ ctrl_WriteRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_DATA_B1, wdata);
+
+ wdata = (uInt8) (data>>13);
+ ctrl_WriteRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_DATA_B2, wdata);
+
+ wdata = (uInt8) (data>>21);
+ ctrl_WriteRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_DATA_B3, wdata);
+
+ /*3. Write REG10 (RAM_ADR_LO). This action initiates the WRITE transaction causing the RAM_STAT bit in REG5
+ (RAMSTAT) to set.*/
+ wdata = (uInt8)ramAddr;
+ ctrl_WriteRegister(pSpi->port, channel, SI3217X_COM_REG_RAM_ADDR_LO, wdata);
+
+ /*4. The WRITE transaction is complete when the RAM_STAT bit clears. */
+ while(1)
+ {
+ ctrl_ReadRegister(pSpi->port, channel, SI3217X_COM_REG_RAMSTAT, &rdata);
+
+ if( (rdata&1) == 0 ) break;
+
+ TimCnt++;
+ if( TimCnt > MAX_SPI_READ_TIMS )
+ {
+ /* The chip didn't ack, maybe broken. */
+ printk("\nSLIC Write RAM error at channel %d, at ramAddr 0x%x!\n", channel, ramAddr);
+ SPI_BUS_UNLOCK();
+ return 0;
+ }
+ }
+ SPI_BUS_UNLOCK();
+
+ return 0;
+}
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/timer_adt.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/timer_adt.c
new file mode 100644
index 0000000..ceff118
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/timer_adt.c
@@ -0,0 +1,75 @@
+/*
+** $Id: dummy_timer.c 109 2008-10-22 19:45:09Z lajordan@SILABS.COM $
+**
+** system.c
+** System specific functions implementation file
+**
+** Author(s):
+** laj
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** File Description:
+** This is the implementation file for the system specific functions like timer functions.
+**
+** Dependancies:
+** datatypes.h
+**
+*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/timer.h>
+#include <linux/fs.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/init.h>
+#include <linux/fcntl.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/signal.h>
+//#include <linux/smp_lock.h>
+#include <asm/uaccess.h>
+#include <linux/delay.h>
+
+#include "timer_adt.h"
+
+
+/*
+** Function: SYSTEM_TimerInit
+*/
+void TimerInit (systemTimer_S *pTimerObj){
+
+}
+
+
+/*
+** Function: SYSTEM_Delay
+*/
+int time_DelayWrapper (void *hTimer, int timeInMs){
+
+ msleep(timeInMs);
+ return 0;
+}
+
+
+/*
+** Function: SYSTEM_TimeElapsed
+*/
+int time_TimeElapsedWrapper (void *hTimer, void *startTime, int *timeInMs){
+
+ /**timeInMs = 1000;*/
+ return 0;
+}
+
+/*
+** Function: SYSTEM_GetTime
+*/
+int time_GetTimeWrapper (void *hTimer, void *time){
+/* time->timestamp=0;*/
+ return 0;
+}
+
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/vdaa.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/vdaa.c
new file mode 100644
index 0000000..6aafe93
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/vdaa.c
@@ -0,0 +1,1340 @@
+/*
+** Copyright (c) 2009-2016 by Silicon Laboratories
+**
+** $Id: vdaa.c 5490 2016-01-20 01:06:40Z nizajerk $
+**
+** Vdaa VoiceDAA interface implementation file
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** File Description:
+** This is the implementation file for the main VoiceDAA API.
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "vdaa.h"
+#include "vdaa_registers.h"
+#include "vdaa_api_config.h"
+
+#define WriteReg pVdaa->deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadReg pVdaa->deviceId->ctrlInterface->ReadRegister_fptr
+#define pVdaaHW pVdaa->deviceId->ctrlInterface->hCtrl
+
+#define WriteRegX deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadRegX deviceId->ctrlInterface->ReadRegister_fptr
+#define pVdaaHWX deviceId->ctrlInterface->hCtrl
+#define LOGPRINT_PREFIX "VDAA: "
+
+/*
+** Static VDAA driver functions
+*/
+
+/*
+** Function: isVerifiedDAA
+**
+** Description:
+** Verifies addressed channel is DAA
+**
+** Input Parameters:
+** pVdaa: pointer to SiVoiceChanType or vdaaChanType
+**
+** Return:
+** Verified DAA
+** Not DAA RC_CHANNEL_TYPE_ERR
+**
+*/
+
+static int isVerifiedDAA(vdaaChanType *pVdaa)
+{
+ uInt8 data = ReadReg(pVdaaHW,pVdaa->channel,LSIDE_REV);
+ if ( (data & 0x40) == 0 ) /*This bit is always 1 for DAA*/
+ {
+ LOGPRINT("%sDAA device not detected\n",LOGPRINT_PREFIX);
+ return RC_CHANNEL_TYPE_ERR;
+ }
+ else
+ {
+ /* Read Device ID and store it */
+ /* NOTE: in earlier releases we also read the line side info here. This is now done
+ Vdaa_duringPowerUpLineside since the information we read was always 0.
+ */
+ data = pVdaa->ReadRegX(pVdaa->pVdaaHWX,pVdaa->channel,SYS_LINE_DEV_REV);
+ pVdaa->deviceId->chipRev= data&0xF;
+#ifdef ENABLE_DEBUG
+ LOGPRINT("%sChipRev = 0x%x\n", LOGPRINT_PREFIX, pVdaa->deviceId->chipRev);
+#endif
+ }
+
+ return RC_NONE;
+}
+
+/*
+** Function: probeDaisyChain
+**
+** Description:
+** Identify how many VDAA devices are in daisychain
+** Only called if channel 0 has be previously qualified
+** as a VDAA.
+**
+** Input Parameters:
+** pVdaa: pointer to SiVoiceChanType or vdaaChanType
+**
+** Return:
+** number of channels in daisy chain
+**
+*/
+
+static int probeDaisyChain (vdaaChanType *pVdaa)
+{
+ int i=0;
+ WriteReg(pVdaaHW,BROADCAST,PCMRX_CNT_LO,0x23); /* Broadcast */
+ while ((ReadReg(pVdaaHW,(uInt8)i++,PCMRX_CNT_LO) == 0x23)
+ &&(i<=16)); /* Count number of channels */
+ return i-1; /* Return number of channels */
+}
+
+/*
+**
+** ------ VDAA CONFIGURATION FUNCTIONS -----
+**
+*/
+
+/*
+** Function: Vdaa_RingDetectSetup
+**
+** Description:
+** configure ring detect setup
+**
+** Returns:
+**
+*/
+
+#ifndef DISABLE_VDAA_RING_DETECT_SETUP
+extern vdaa_Ring_Detect_Cfg Vdaa_Ring_Detect_Presets[];
+int Vdaa_RingDetectSetup (vdaaChanType *pVdaa,int32 preset)
+{
+
+ uInt8 regTemp = 0;
+ TRACEPRINT( pVdaa, "preset = %d\n", (unsigned int) preset);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,CTRL2) & 0xfB;
+ regTemp |= Vdaa_Ring_Detect_Presets[preset].rdi<<2;
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL2,regTemp);
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,INTL_CTRL1) & 0xfe;
+ regTemp |= Vdaa_Ring_Detect_Presets[preset].rt&1;
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL1,regTemp);
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,INTL_CTRL2) & 0xef;
+ regTemp |= ((Vdaa_Ring_Detect_Presets[preset].rt>>1)<<4);
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL2,regTemp);
+
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL3,
+ Vdaa_Ring_Detect_Presets[preset].rfwe<<1);
+
+ regTemp = (Vdaa_Ring_Detect_Presets[preset].rdly&0x3) << 6;
+ regTemp |= Vdaa_Ring_Detect_Presets[preset].rmx ;
+ WriteReg(pVdaaHW,pVdaa->channel,RNG_VLD_CTRL1,regTemp);
+
+ regTemp = (Vdaa_Ring_Detect_Presets[preset].rdly>>2) << 7;
+ regTemp |= Vdaa_Ring_Detect_Presets[preset].rto << 3 ;
+ regTemp |= Vdaa_Ring_Detect_Presets[preset].rcc ;
+ WriteReg(pVdaaHW,pVdaa->channel,RNG_VLD_CTRL2,regTemp);
+
+ regTemp = Vdaa_Ring_Detect_Presets[preset].rngv << 7;
+ regTemp |= Vdaa_Ring_Detect_Presets[preset].ras ;
+ WriteReg(pVdaaHW,pVdaa->channel,RNG_VLD_CTRL3,regTemp);
+
+ regTemp = Vdaa_Ring_Detect_Presets[preset].rpol<<1;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL4,regTemp);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: Vdaa_TXAudioGainSetup
+**
+** Description:
+** configure tx audio gain
+**
+** Returns:
+**
+**
+*/
+#ifndef DISABLE_VDAA_AUDIO_GAIN_SETUP
+extern vdaa_audioGain_Cfg Vdaa_audioGain_Presets[];
+
+int Vdaa_TXAudioGainSetup (vdaaChanType *pVdaa,int32 preset)
+{
+ uInt8 regTemp = 0;
+ TRACEPRINT( pVdaa, "preset = %d\n", (unsigned int) preset);
+
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ if(Vdaa_audioGain_Presets[preset].xga2 == XGA_ATTEN)
+ {
+ regTemp = 0x10;
+ }
+
+ regTemp |= Vdaa_audioGain_Presets[preset].acgain2 ;
+ WriteReg(pVdaaHW,pVdaa->channel,TX_GN_CTRL2,regTemp);
+
+ regTemp = 0;
+ if(Vdaa_audioGain_Presets[preset].xga3 == XGA_ATTEN)
+ {
+ regTemp = 0x10 ;
+ }
+
+ regTemp |= Vdaa_audioGain_Presets[preset].acgain3 ;
+ WriteReg(pVdaaHW,pVdaa->channel,TX_GN_CTRL3,regTemp);
+
+ if(Vdaa_audioGain_Presets[preset].cpEn)
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,TXCALL_PROG_ATTEN,
+ Vdaa_audioGain_Presets[preset].callProgress);
+ }
+
+ return RC_NONE;
+}
+# endif
+
+
+/*
+** Function: Vdaa_RXAudioGainSetup
+**
+** Description:
+** configure rx audio gain
+**
+** Returns:
+**
+**
+*/
+#ifndef DISABLE_VDAA_AUDIO_GAIN_SETUP
+extern vdaa_audioGain_Cfg Vdaa_audioGain_Presets[];
+
+int Vdaa_RXAudioGainSetup (vdaaChanType *pVdaa,int32 preset)
+{
+ uInt8 regTemp = 0;
+
+ TRACEPRINT( pVdaa, "preset = %d\n", (unsigned int) preset);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ if(Vdaa_audioGain_Presets[preset].xga2 == XGA_ATTEN)
+ {
+ regTemp = 0x10;
+ }
+ regTemp |= Vdaa_audioGain_Presets[preset].acgain2 ;
+ WriteReg(pVdaaHW,pVdaa->channel,RX_GN_CTRL2,regTemp);
+
+ regTemp = 0;
+ if(Vdaa_audioGain_Presets[preset].xga3 == XGA_ATTEN)
+ {
+ regTemp = 0x10;
+ }
+ regTemp |= Vdaa_audioGain_Presets[preset].acgain3 ;
+ WriteReg(pVdaaHW,pVdaa->channel,RX_GN_CTRL3,regTemp);
+
+ if(Vdaa_audioGain_Presets[preset].cpEn)
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,RXCALL_PROG_ATTEN,
+ Vdaa_audioGain_Presets[preset].callProgress);
+ }
+
+ return RC_NONE;
+}
+#endif
+
+
+/*
+** Function: Vdaa_PCMSetup
+**
+** Description:
+** configure pcm format, clocking and edge placement
+**
+** Returns:
+**
+**
+*/
+#ifndef DISABLE_VDAA_PCM_SETUP
+extern vdaa_PCM_Cfg Vdaa_PCM_Presets [];
+
+int Vdaa_PCMSetup (vdaaChanType *pVdaa,int32 preset)
+{
+ uInt8 regTemp = 0;
+
+ TRACEPRINT( pVdaa, "preset = %d\n", (unsigned int) preset);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL)&0xe0;
+ regTemp |= Vdaa_PCM_Presets[preset].pcm_tri;
+ regTemp |= Vdaa_PCM_Presets[preset].pcmHwy << 1;
+ regTemp |= Vdaa_PCM_Presets[preset].pcmFormat << 3;
+ WriteReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL,regTemp);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: Vdaa_PCMTimeSlotSetup
+**
+** Description:
+** configure pcm timeslot
+**
+** Returns:
+**
+*/
+int Vdaa_PCMTimeSlotSetup (vdaaChanType *pVdaa, uInt16 rxcount, uInt16 txcount)
+{
+ uInt8 data = 0;
+ uInt8 pcmStatus;
+
+ TRACEPRINT( pVdaa, "rxcount = %u txcount = %u\n", (unsigned int)rxcount,
+ (unsigned int)txcount);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ /* Disable PCM if enabled - restore after updating timeslots */
+ pcmStatus = ReadReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL);
+ if (pcmStatus&0x20)
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL,pcmStatus&~(0x20));
+ }
+
+ /*Storing 10 bit value of Transmit PCM sample in REG 34 and REG 35[0:1]*/
+ data = (uInt8)(txcount & 0xff);
+ WriteReg(pVdaaHW,pVdaa->channel,PCMTX_CNT_LO,data);
+ data = (uInt8)(txcount >> 8) ;
+ WriteReg(pVdaaHW,pVdaa->channel,PCMTX_CNT_HI,data);
+
+ /*Storing 10 bit value of Receive PCM sample in REG 34 and REG 35[0:1]*/
+ data = (uInt8)(rxcount & 0xff);
+ WriteReg(pVdaaHW,pVdaa->channel,PCMRX_CNT_LO,data);
+ data = (uInt8)(rxcount >> 8);
+ WriteReg(pVdaaHW,pVdaa->channel,PCMRX_CNT_HI,data);
+
+ /* Enable back the PCM after storing the values*/
+ WriteReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL,pcmStatus);
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_CountrySetup
+**
+** Description:
+** configure country specific settings
+**
+** Returns:
+**
+**
+*/
+
+#ifndef DISABLE_VDAA_COUNTRY_SETUP
+extern vdaa_Country_Cfg Vdaa_Country_Presets [];
+
+int Vdaa_CountrySetup (vdaaChanType *pVdaa,int32 preset)
+{
+ uInt8 regTemp = 0;
+
+ TRACEPRINT( pVdaa, "preset = %d\n", (unsigned int) preset);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,CTRL2) & 0xFD;
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL2,regTemp); /* disable hybrid */
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,INTL_CTRL1) & 0xFD;
+ regTemp |= Vdaa_Country_Presets[preset].rz << 1 ;
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL1,regTemp);
+
+ regTemp = Vdaa_Country_Presets[preset].dcr;
+ regTemp |= Vdaa_Country_Presets[preset].ilim<<1;
+ regTemp |= Vdaa_Country_Presets[preset].mini<<4;
+ regTemp |= Vdaa_Country_Presets[preset].dcv<<6;
+ WriteReg(pVdaaHW,pVdaa->channel,DC_TERM_CTRL,regTemp);
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,AC_TERM_CTRL) & 0xF0;
+ regTemp |= Vdaa_Country_Presets[preset].acim;
+ WriteReg(pVdaaHW,pVdaa->channel,AC_TERM_CTRL,regTemp);
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,SPRK_QNCH_CTRL) & 0xAF;
+ regTemp |= ((Vdaa_Country_Presets[preset].ohs_sq >> 2)&1)<<4 ;
+ regTemp |= ((Vdaa_Country_Presets[preset].ohs_sq >> 3)&1)<<6 ;
+ WriteReg(pVdaaHW,pVdaa->channel,SPRK_QNCH_CTRL,regTemp);
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,INTL_CTRL1) & 0xBF;
+ regTemp |= ((Vdaa_Country_Presets[preset].ohs_sq >> 1)&1)<<6 ;
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL1,regTemp);
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL5) & 0xE7;
+ regTemp |= (Vdaa_Country_Presets[preset].ohs_sq&1)<<3 ;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL5,regTemp);
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,CTRL2) & 0xFD;
+ regTemp |= (Vdaa_Country_Presets[preset].hbe)<<1 ;
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL2,regTemp);
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: Vdaa_HybridSetup
+**
+** Description:
+** configure hybrid
+**
+*/
+
+#ifndef DISABLE_VDAA_HYBRID_SETUP
+extern vdaa_Hybrid_Cfg Vdaa_Hybrid_Presets [];
+
+int Vdaa_HybridSetup (vdaaChanType *pVdaa,int32 preset)
+{
+ uInt8 regSave = 0;
+
+ TRACEPRINT( pVdaa, "preset = %d\n", (unsigned int) preset);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ regSave = ReadReg(pVdaaHW,pVdaa->channel,CTRL2);
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL2,regSave&0xFD); /* disable hybrid */
+
+ WriteReg(pVdaaHW,pVdaa->channel,HYB1,Vdaa_Hybrid_Presets[preset].hyb1);
+ WriteReg(pVdaaHW,pVdaa->channel,HYB2,Vdaa_Hybrid_Presets[preset].hyb2);
+ WriteReg(pVdaaHW,pVdaa->channel,HYB3,Vdaa_Hybrid_Presets[preset].hyb3);
+ WriteReg(pVdaaHW,pVdaa->channel,HYB4,Vdaa_Hybrid_Presets[preset].hyb4);
+ WriteReg(pVdaaHW,pVdaa->channel,HYB5,Vdaa_Hybrid_Presets[preset].hyb5);
+ WriteReg(pVdaaHW,pVdaa->channel,HYB6,Vdaa_Hybrid_Presets[preset].hyb6);
+ WriteReg(pVdaaHW,pVdaa->channel,HYB7,Vdaa_Hybrid_Presets[preset].hyb7);
+ WriteReg(pVdaaHW,pVdaa->channel,HYB8,Vdaa_Hybrid_Presets[preset].hyb8);
+
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL2,
+ regSave); /* Restore hybrid enable state at entry */
+
+ return RC_NONE;
+}
+#endif
+
+/*
+** Function: Vdaa_SetAudioMute
+**
+** Description:
+** Control RX and TX mute
+**
+*/
+
+int Vdaa_SetAudioMute(vdaaChanType *pVdaa, tMUTE mute)
+{
+ uInt8 regData;
+
+ TRACEPRINT( pVdaa, "mode = %u\n", (unsigned int) mute);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ regData = ReadReg(pVdaaHW,pVdaa->channel,TXRX_GN_CTRL);
+
+ switch(mute)
+ {
+ case MUTE_DISABLE_ALL:
+ regData = 0;
+ break;
+
+ case MUTE_DISABLE_RX:
+ regData &= 0x80;
+ break;
+
+ case MUTE_DISABLE_TX:
+ regData &= 0x08;
+ break;
+
+ case MUTE_ENABLE_RX:
+ regData |= 0x08;
+ break;
+
+ case MUTE_ENABLE_TX:
+ regData |= 0x80;
+ break;
+
+ case MUTE_ENABLE_ALL:
+ regData = 0x88;
+ break;
+ }
+
+ WriteReg(pVdaaHW,pVdaa->channel,TXRX_GN_CTRL,regData);
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_PCMStart
+**
+** Description:
+** Enables PCM bus
+**
+*/
+
+int Vdaa_PCMStart (vdaaChanType *pVdaa)
+{
+ uInt8 data = 0;
+
+ TRACEPRINT( pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ /*Enable PCM transfers by setting REG 33[5]=1 */
+ data = ReadReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL);
+ data |= 0x20;
+ WriteReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL,data);
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_PCMStop
+**
+** Description:
+** Disables PCM bus
+**
+*/
+
+int Vdaa_PCMStop (vdaaChanType *pVdaa)
+{
+ uInt8 data = 0;
+
+ TRACEPRINT( pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ /*disable PCM transfers by setting REG 33[5]=0 */
+ data = ReadReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL);
+ data &= ~(0x20);
+ WriteReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL,data);
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_SetInterruptMask
+**
+** Description:
+** Enables interrupts based on passed 9-bit bitmask. Bit
+** values defined by vdaaIntMask enum.
+**
+*/
+
+int Vdaa_SetInterruptMask(vdaaChanType *pVdaa, vdaaIntMask bitmask)
+{
+ uInt8 intMaskReg = 0;
+ uInt8 cviReg = 0;
+
+ TRACEPRINT( pVdaa, "mask = 0x%03x\n", (unsigned int)bitmask);
+ /* Channel validation */
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_CHANNEL_TYPE_ERR;
+ }
+
+ intMaskReg = (uInt8)(bitmask & 0x00ff);
+ cviReg = ReadReg(pVdaaHW,pVdaa->channel,LN_VI_THRESH_INTE_CTRL);
+ cviReg |= (uInt8) ((bitmask >> 7) & 0x0002);
+
+ WriteReg (pVdaaHW,pVdaa->channel,INTE_MSK,intMaskReg);
+ WriteReg(pVdaaHW,pVdaa->channel,LN_VI_THRESH_INTE_CTRL,cviReg);
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_ReadRingDetectStatus
+**
+** Description:
+** Reads ring detect/hook status
+**
+** Returns:
+**
+**
+*/
+
+int Vdaa_ReadRingDetectStatus (vdaaChanType *pVdaa,
+ vdaaRingDetectStatusType *pStatus)
+{
+ uInt8 reg;
+
+ TRACEPRINT( pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ reg = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL1);
+ pStatus->offhook = reg & 0x01;
+ pStatus->ringDetected = (reg & 0x4)>>2;
+ pStatus->onhookLineMonitor = (reg & 0x8)>>3;
+ pStatus->ringDetectedPos = (reg & 0x20)>>5;
+ pStatus->ringDetectedNeg = (reg & 0x40)>>6;
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_Init
+**
+** Description:
+** Initialize VDAA, load general config parameters
+**
+*/
+
+extern vdaa_General_Cfg Vdaa_General_Configuration;
+
+int Vdaa_Init (vdaaChanType_ptr *pVdaa,int size)
+{
+ uInt8 data;
+ int k;
+ int num_devices = 0;
+
+ TRACEPRINT( *pVdaa, "size = %d\n", size);
+
+ for (k=0; k<size; k++)
+ {
+
+ if(pVdaa[k]->channelType == PROSLIC)
+ {
+ continue; /* Skip if we know this is a ProSLIC, else check the device out */
+ }
+
+ if (isVerifiedDAA(pVdaa[k]) == RC_CHANNEL_TYPE_ERR)
+ {
+ pVdaa[k]->channelEnable = FALSE;
+ pVdaa[k]->error = RC_CHANNEL_TYPE_ERR;
+ pVdaa[k]->channelType = UNKNOWN;
+ DEBUG_PRINT(pVdaa[k], "%sVDAA not supported on this device\n",LOGPRINT_PREFIX);
+ continue;
+ }
+ else
+ {
+ pVdaa[k]->channelType = DAA;
+ }
+
+ if (pVdaa[k]->channelEnable)
+ {
+ /*Try to write innocuous register to test SPI is working*/
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,PCMRX_CNT_LO,0x5A);
+ data = pVdaa[k]->ReadRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,PCMRX_CNT_LO);
+ if (data != 0x5A)
+ {
+ pVdaa[k]->error = RC_SPI_FAIL;
+ pVdaa[k]->channelEnable = FALSE;
+ DEBUG_PRINT(pVdaa[k], "%sVDAA %d not communicating\n",LOGPRINT_PREFIX,
+ pVdaa[k]->channel);
+ }
+ else
+ {
+ num_devices++;
+ }
+ }
+ }
+
+ if(num_devices == 0)
+ {
+ DEBUG_PRINT(pVdaa[k], "%sNo DAA devices detected\n", LOGPRINT_PREFIX);
+ return RC_SPI_FAIL;
+ }
+
+ for (k=0; k<size; k++)
+ {
+ if(pVdaa[k]->channelType != DAA)
+ {
+ continue; /* Skip PROSLIC or UNDEFINED ports */
+ }
+ if (pVdaa[k]->channelEnable)
+ {
+
+ /* Apply General Configuration parameters */
+
+ /* No need to read-modify-write here since registers are in their reset state */
+ data = (Vdaa_General_Configuration.pwmm << 4) |
+ (Vdaa_General_Configuration.pwmEnable << 3);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,CTRL1, data);
+
+ data = (Vdaa_General_Configuration.inte << 7) | (Vdaa_General_Configuration.intp
+ << 6) | 0x03;
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,CTRL2, data);
+
+ data = (Vdaa_General_Configuration.hssm << 3);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,SMPL_CTRL, data);
+
+ data = (Vdaa_General_Configuration.iire << 4);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,INTL_CTRL1, data);
+
+ data = (Vdaa_General_Configuration.rcald << 4);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,RES_CALIB, data);
+
+ data = (Vdaa_General_Configuration.full2 << 4);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,AC_TERM_CTRL, data);
+
+ data = (Vdaa_General_Configuration.lvfd) | (Vdaa_General_Configuration.filt <<
+ 1) |
+ (Vdaa_General_Configuration.foh << 5) | (Vdaa_General_Configuration.full << 7);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,DAA_CTRL5, data);
+
+ data = (Vdaa_General_Configuration.spim << 6);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,PCM_SPI_CTRL, data);
+
+ data = (Vdaa_General_Configuration.cvp) | (Vdaa_General_Configuration.cvs << 2);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,LN_VI_THRESH_INTE_CTRL,
+ data);
+
+ data = (Vdaa_General_Configuration.gce << 1) | (Vdaa_General_Configuration.rg1
+ << 2);
+ pVdaa[k]->WriteRegX(pVdaa[k]->pVdaaHWX,pVdaa[k]->channel,SPRK_QNCH_CTRL, data);
+
+ /* Enable Lineside Device */
+ Vdaa_PowerupLineside(pVdaa[k]);
+ }
+ }
+ DEBUG_PRINT(*pVdaa,"%sDAA initialization completed\n",LOGPRINT_PREFIX);
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_ReadLinefeedStatus
+**
+** Description:
+** Read Status of Line Feed
+**
+** Returns:
+** RC_VDAA_ILOOP_OVLD if LCS >= 0x1F
+** - no overload
+**
+*/
+
+int Vdaa_ReadLinefeedStatus (vdaaChanType *pVdaa,int8 *vloop, int16 *iloop)
+{
+ int16 regTemp = 0x1F;
+ uInt8 iloop_reg; /* REG 12[4:0] = Loop current*/
+
+ TRACEPRINT( pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+ regTemp &= ReadReg(pVdaaHW,pVdaa->channel,LSIDE_STAT);
+ iloop_reg = (uInt8)regTemp;
+ *iloop = (regTemp*LCS_SCALE_NUM) /
+ LCS_SCALE_DEN; /* Multiply the read result by 3.3mA/bit*/
+
+ *vloop = (int8) ReadReg(pVdaaHW,pVdaa->channel,LINE_VOLT_STAT);
+ if(*vloop & 0x80)
+ {
+ *vloop = ~(*vloop - 1)*(-1);
+ }
+
+ if (iloop_reg == 0x1F)
+ {
+ return RC_VDAA_ILOOP_OVLD;
+ }
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_GetInterrupts
+**
+** Description:
+** Get Interrupts
+**
+** Returns:
+** number of interrupts
+**
+*/
+
+int Vdaa_GetInterrupts (vdaaChanType *pVdaa,vdaaIntType *pIntData)
+{
+ uInt8 data = 0;
+ int j;
+ TRACEPRINT( pVdaa, "\n", NULL);
+ pIntData->number = 0;
+
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ data = ReadReg(pVdaaHW,pVdaa->channel,INTE_SRC); /*Snapshot Interrupts*/
+ WriteReg(pVdaaHW,pVdaa->channel,INTE_SRC,~(data)); /*Clear interrupts*/
+
+ for (j=0; j<8; j++)
+ {
+ if (data &(1<<j))
+ {
+
+ pIntData->irqs[pIntData->number] = j;
+ pIntData->number++;
+
+ }
+ }
+ data = ReadReg(pVdaaHW,pVdaa->channel,LN_VI_THRESH_INTE_CTRL);
+
+ if (data &(0x08)) /*to determine if CVI Interrupt is set*/
+ {
+ pIntData->irqs[pIntData->number] = CVI;
+ pIntData->number++;
+ data &= ~(0x08);
+ WriteReg(pVdaaHW,pVdaa->channel,LN_VI_THRESH_INTE_CTRL,data);
+
+ }
+
+ return pIntData->number;
+}
+
+/*
+** Function: Vdaa_ClearInterrupts
+**
+** Description:
+** Clear Interrupts
+**
+** Returns:
+**
+**
+*/
+
+int Vdaa_ClearInterrupts (vdaaChanType *pVdaa)
+{
+ uInt8 data = 0;
+
+ TRACEPRINT( pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ WriteReg(pVdaaHW,pVdaa->channel,INTE_SRC,
+ 0x00); /* Clear interrupts in REG 4 by writing 0's*/
+
+ /*Clear CVI interrupt by writing 0 at REG 44[3]*/
+ data = ReadReg(pVdaaHW,pVdaa->channel,LN_VI_THRESH_INTE_CTRL);
+ WriteReg(pVdaaHW,pVdaa->channel,LN_VI_THRESH_INTE_CTRL,data&0xF7);
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_GetHookStatus
+**
+** Description:
+** Read VDAA Hook Status
+**
+** Return Values -
+** VDAA_ONHOOK
+** VDAA_OFFHOOK
+** VDAA_ONHOOK_MONITOR
+** RC_INVALID_HOOK_STATUS
+*/
+
+uInt8 Vdaa_GetHookStatus (vdaaChanType *pVdaa)
+{
+ uInt8 data;
+
+ TRACEPRINT( pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL1);
+ data &= 0x09; /* Look at only ONHM and OH */
+
+ if((data & 0x80)&&(data & 0x01))
+ {
+ return VDAA_ONHOOK_MONITOR;
+ }
+ else if (data & 0x01)
+ {
+ return VDAA_OFFHOOK;
+ }
+ else
+ {
+ return VDAA_ONHOOK;
+ }
+}
+
+/*
+** Function: Vdaa_SetHookStatus
+**
+** Description:
+** Set VDAA Hook switch to ONHOOK, OFFHOOK,
+** or ONHOOK_MONITOR
+**
+*/
+
+int Vdaa_SetHookStatus (vdaaChanType *pVdaa,uInt8 newHookStatus)
+{
+ uInt8 data= 0 ;
+
+ TRACEPRINT( pVdaa, "hookstate = %u\n", (unsigned int) newHookStatus);
+
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ switch (newHookStatus)
+ {
+ case VDAA_DIG_LOOPBACK:
+ /*Setting REG6[4]=1,REG5[0]=0,REG5[3]=0*/
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL2);
+ data |= 0x10;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL2,data);
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL1);
+ data &= ~(0x09);
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL1,data);
+ break;
+
+ case VDAA_ONHOOK:
+ /*Setting REG6[4]=0,REG5[0]=0,REG5[3]=0*/
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL1);
+ data &= 0xF6;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL1,data);
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL2);
+ data &= 0xEF;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL2,data);
+ break;
+
+ case VDAA_OFFHOOK:
+ /*Setting REG6[4]=0,REG5[0]=1,REG5[3]=0*/
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL1);
+ data &= 0xF7;
+ data |= 0x01;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL1,data);
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL2);
+ data &= 0xEF;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL2,data);
+ break;
+
+ case VDAA_ONHOOK_MONITOR:
+ /*Setting REG6[4]=0,REG5[0]=0,REG5[3]=1*/
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL1);
+ data &= 0xFE;
+ data |= 0x08;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL1,data);
+ data = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL2);
+ data &= 0xEF;
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL2,data);
+ break;
+
+ default:
+ return RC_UNSUPPORTED_OPTION;
+ }
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_SetLoopbackMode
+**
+** Description:
+** Loopback mode control
+**
+*/
+
+int Vdaa_SetLoopbackMode(vdaaChanType_ptr pVdaa, tLpbkMode lpbk_mode,
+ tLpbkStatus lpbk_status)
+{
+ uInt8 regData;
+
+ TRACEPRINT(pVdaa, "lpbk_mode = %u lpbk_status = %d\n", (unsigned int) lpbk_mode,
+ (unsigned int) lpbk_status);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ switch(lpbk_mode)
+ {
+ case LPBK_NONE:
+ /* Disable all loopback types, regardless of lpbk_status */
+ regData = ReadReg(pVdaaHW,pVdaa->channel,CTRL1);
+ if(regData & 0x02)
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL1, regData & ~(0x02));
+ }
+
+ regData = ReadReg(pVdaaHW,pVdaa->channel,DAA_CTRL3);
+ if(regData & 0x01)
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL3,0);
+ }
+
+ regData = ReadReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL);
+ if(regData & 0x80)
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL, regData & ~(0x80));
+ }
+ break;
+
+ case LPBK_IDL:
+ if(lpbk_status)
+ {
+ regData = ReadReg(pVdaaHW,pVdaa->channel,CTRL1);
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL1, regData | 0x02);
+ }
+ else
+ {
+ regData = ReadReg(pVdaaHW,pVdaa->channel,CTRL1);
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL1, regData & ~(0x02));
+ }
+ break;
+
+ case LPBK_DDL:
+ if(lpbk_status)
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL3, 0x01);
+ }
+ else
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL3, 0);
+ }
+ break;
+
+ case LPBK_PCML:
+ if(lpbk_status)
+ {
+ regData = ReadReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL);
+ WriteReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL, regData | 0x80);
+ }
+ else
+ {
+ regData = ReadReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL);
+ WriteReg(pVdaaHW,pVdaa->channel,PCM_SPI_CTRL, regData & ~(0x80));
+ }
+ break;
+
+ default:
+ return RC_UNSUPPORTED_OPTION;
+ }
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_ADCCal
+**
+** Description:
+** This function calibrates the VDAA ADC manually
+**
+*/
+
+int Vdaa_ADCCal (vdaaChanType_ptr pVdaa, int32 size)
+{
+ uInt8 regTemp = 0;
+ TRACEPRINT(pVdaa, "size = %d\n", (int) size);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ /* Clear the previous ADC Calibration data by toggling CALZ*/
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,INTL_CTRL2);
+ regTemp |= 0x80;
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL2,regTemp);
+ regTemp &= ~0x80;
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL2,regTemp);
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,INTL_CTRL2); /*disable auto cal*/
+ regTemp |= 0x20;
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL2,regTemp);
+
+ regTemp |= 0x40; /*initiate manual cal*/
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL2,regTemp);
+ regTemp &= ~0x40;
+ WriteReg(pVdaaHW,pVdaa->channel,INTL_CTRL2,regTemp);
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_EnableWatchdog
+**
+** Description:
+** Enables watchdog timer
+**
+*/
+
+int Vdaa_EnableWatchdog(vdaaChanType_ptr pVdaa)
+{
+ uInt8 regTemp;
+
+ TRACEPRINT(pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,CTRL2);
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL2,regTemp | 0x10);
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_SetHybridEnable
+**
+** Description:
+** Enables watchdog timer
+**
+*/
+
+int Vdaa_SetHybridEnable(vdaaChanType_ptr pVdaa, int enable)
+{
+ uInt8 regTemp;
+ TRACEPRINT(pVdaa, "enable = %d\n", enable);
+
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ regTemp = ReadReg(pVdaaHW,pVdaa->channel,CTRL2);
+ if(enable)
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL2,regTemp | 0x02);
+ }
+ else
+ {
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL2,regTemp & ~(0x02));
+ }
+
+ return RC_NONE;
+}
+
+
+/*
+** Function: Vdaa_SoftReset
+**
+** Description:
+** Execute soft reset
+**
+*/
+
+int Vdaa_SoftReset(vdaaChanType_ptr pVdaa)
+{
+ TRACEPRINT(pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ WriteReg(pVdaaHW,pVdaa->channel,CTRL1,0x80);
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_ReadFDTStatus
+**
+** Description:
+** Read FDT bit
+**
+** Returns:
+** 0 - Frame Not Detected
+** 1 - Frame Detected
+**
+*/
+
+int Vdaa_ReadFDTStatus(vdaaChanType_ptr pVdaa)
+{
+ TRACEPRINT(pVdaa, "\n", NULL);
+ return (ReadReg(pVdaaHW,pVdaa->channel,LSIDE_REV) & 0x40);
+}
+
+/*
+** Function: Vdaa_PowerupLineside
+**
+** Description:
+** Power up lineside device
+**
+*/
+
+int Vdaa_PowerupLineside(vdaaChanType_ptr pVdaa)
+{
+ uInt8 data;
+
+ TRACEPRINT(pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL2,0); /* Powerup lineside device */
+ /* We do a double read to give the front end time to power up and sync up with the system side.. */
+ data = ReadReg(pVdaaHW,pVdaa->channel,LSIDE_REV);
+ data = 0;
+ data = ReadReg(pVdaaHW,pVdaa->channel,LSIDE_REV);
+ pVdaa->deviceId->lsRev= ((data&0x3C)>>2);
+ data = pVdaa->ReadRegX(pVdaa->pVdaaHWX,pVdaa->channel,SYS_LINE_DEV_REV);
+ pVdaa->deviceId->lsType= ((data&~(0xF))>>4);
+
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_PowerdownLineside
+**
+** Description:
+** Power down lineside device
+**
+*/
+
+int Vdaa_PowerdownLineside(vdaaChanType_ptr pVdaa)
+{
+ TRACEPRINT(pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ WriteReg(pVdaaHW,pVdaa->channel,DAA_CTRL2,0x10);
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_PrintDebugData
+**
+** Description:
+** Dump of VDAA register space
+**
+** Input Parameters:
+** pVdaa: pointer to SiVoiceChanType or vdaaChanType
+**
+*/
+
+int Vdaa_PrintDebugData (vdaaChanType *pVdaa)
+{
+#ifdef ENABLE_DEBUG
+ int i;
+ for (i=0; i<60; i++)
+ {
+ LOGPRINT ("%sRegister %d = %X\n",LOGPRINT_PREFIX,i,ReadReg(pVdaaHW,
+ pVdaa->channel,i));
+ }
+#endif
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_InitLineInUseCheck
+**
+** Description:
+** Set line in use test limits
+**
+** Input Parameters:
+** liuCfg: pointer to vdaa_LIU_Config
+** minOnV: minimum acceptable onhook voltage (below indicates parallel handset)
+** minOffV: minimum acceptable offhook voltage (below indicates parallel handset)
+** minOffI: minimum acceptable offhook loop current (below indicates parallel handset)
+**
+*/
+
+int Vdaa_InitLineInUseCheck(vdaa_LIU_Config *liuCfg, int8 minOnV, int8 minOffV,
+ int16 minOffI)
+{
+ TRACEPRINT_NOCHAN("min0nV = %d minoffV = %d minOffI = %d\n", minOnV, minOffV,
+ minOffI);
+ liuCfg->status = PAR_HANDSET_NOT_DETECTED;
+ liuCfg->min_onhook_vloop = minOnV;
+ liuCfg->min_offhook_vloop = minOffV;
+ liuCfg->min_offhook_iloop = minOffI;
+ return RC_NONE;
+}
+
+/*
+** Function: Vdaa_CheckForLineInUse
+**
+** Description:
+** Monitor LVCS to detect intrusion or parallel handset
+**
+** Input Parameters:
+** pVdaa: pointer to SiVoiceChanType or vdaaChanType
+** liuCfg: pointer to vdaa_LIU_Config
+**
+** Output Parameters:
+**
+** Return:
+** VDAA_ONHOOK - line is onhook
+** VDAA_OFFHOOK - line is offhook (in use)
+**
+*/
+
+uInt8 Vdaa_CheckForLineInUse(vdaaChanType *pVdaa, vdaa_LIU_Config *liuCfg)
+{
+ int8 vloop;
+ int16 iloop;
+
+ TRACEPRINT(pVdaa, "\n", NULL);
+ if(pVdaa->channelType != DAA)
+ {
+ return RC_IGNORE;
+ }
+
+ /* Check voltage and current */
+ Vdaa_ReadLinefeedStatus(pVdaa, &vloop,&iloop);
+ if(vloop < 0)
+ {
+ vloop *= -1;
+ }
+ liuCfg->measured_iloop = iloop;
+ liuCfg->measured_vloop = vloop;
+ liuCfg->status = PAR_HANDSET_NOT_DETECTED;
+
+ /* Read hookswitch status */
+ if(Vdaa_GetHookStatus(pVdaa) == VDAA_OFFHOOK)
+ {
+ if((vloop < liuCfg->min_offhook_vloop)||(iloop < liuCfg->min_offhook_iloop))
+ {
+ liuCfg->status = PAR_HANDSET_DETECTED;
+ }
+
+ return VDAA_OFFHOOK;
+ }
+ else
+ {
+ if(vloop < liuCfg->min_onhook_vloop)
+ {
+ liuCfg->status = PAR_HANDSET_DETECTED;
+ }
+
+ return VDAA_ONHOOK;
+ }
+}
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/vdaa_constants.c b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/vdaa_constants.c
new file mode 100644
index 0000000..596ed7c
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/si_lib/source/vdaa_constants.c
@@ -0,0 +1,203 @@
+/*
+** Copyright (c) 2016 Silicon Laboratories, Inc.
+** 2016-01-14 23:55:02
+**
+** Si3217x ProSLIC API Configuration Tool Version 4.0.3
+** Last Updated in API Release: 8.0.0
+** Auto generated file from configuration tool
+*/
+
+
+
+#include "vdaa.h"
+
+vdaa_General_Cfg Vdaa_General_Configuration = {
+ INTE_DISABLED,
+ INTE_ACTIVE_LOW,
+ RES_CAL_ENABLED,
+ FS_8KHZ,
+ FOH_128,
+ LVS_FORCE_ENABLED,
+ CVS_CURRENT,
+ CVP_ABOVE,
+ GCE_DISABLED,
+ IIR_DISABLED,
+ FULL2_ENABLED,
+ FULL_DISABLED,
+ FILT_HPF_200HZ,
+ RG1_DISABLED,
+ PWM_DELTA_SIGMA,
+ PWM_DISABLED,
+ SPIM_TRI_CS
+};
+
+vdaa_Country_Cfg Vdaa_Country_Presets[] ={
+ {
+ RZ_MAX,
+ DC_50,
+ AC_600,
+ DCV3_5,
+ MINI_10MA,
+ ILIM_DISABLED,
+ OHS_LESS_THAN_0_5MS,
+ HYBRID_ENABLED
+ }, /* COU_USA */
+ {
+ RZ_MAX,
+ DC_50,
+ AC_270__750_150,
+ DCV3_5,
+ MINI_10MA,
+ ILIM_ENABLED,
+ OHS_3MS,
+ HYBRID_ENABLED
+ }, /* COU_GERMANY */
+ {
+ RZ_MAX,
+ DC_50,
+ AC_200__680_100,
+ DCV3_5,
+ MINI_10MA,
+ ILIM_DISABLED,
+ OHS_LESS_THAN_0_5MS,
+ HYBRID_ENABLED
+ }, /* COU_CHINA */
+ {
+ RZ_MAX,
+ DC_50,
+ AC_220__820_120,
+ DCV3_2,
+ MINI_12MA,
+ ILIM_DISABLED,
+ OHS_26MS,
+ HYBRID_ENABLED
+ } /* COU_AUSTRALIA */
+};
+
+vdaa_audioGain_Cfg Vdaa_audioGain_Presets[] ={
+ {
+ 0, /* mute */
+ XGA_GAIN, /* xXGA2 */
+ 0, /* xXG2 */
+ XGA_GAIN, /* xXGA3 */
+ 0, /* xXG3 */
+ 64, /* AxM */
+ 0 /* cpEn */
+ }, /* AUDIO_GAIN_0DB */
+ {
+ 0, /* mute */
+ XGA_ATTEN, /* xXGA2 */
+ 4, /* xXG2 */
+ XGA_GAIN, /* xXGA3 */
+ 0, /* xXG3 */
+ 64, /* AxM */
+ 0 /* cpEn */
+ }, /* AUDIO_ATTEN_4DB */
+ {
+ 0, /* mute */
+ XGA_ATTEN, /* xXGA2 */
+ 6, /* xXG2 */
+ XGA_GAIN, /* xXGA3 */
+ 0, /* xXG3 */
+ 64, /* AxM */
+ 0 /* cpEn */
+ }, /* AUDIO_ATTEN_6DB */
+ {
+ 0, /* mute */
+ XGA_ATTEN, /* xXGA2 */
+ 11, /* xXG2 */
+ XGA_GAIN, /* xXGA3 */
+ 0, /* xXG3 */
+ 64, /* AxM */
+ 0 /* cpEn */
+ } /* AUDIO_ATTEN_11DB */
+};
+
+vdaa_Ring_Detect_Cfg Vdaa_Ring_Detect_Presets[] ={
+ {
+ RDLY_512MS,
+ RT__13_5VRMS_16_5VRMS,
+ 12, /* RMX */
+ RTO_1408MS,
+ RCC_640MS,
+ RNGV_DISABLED,
+ 17, /* RAS */
+ RFWE_HALF_WAVE,
+ RDI_BEG_END_BURST,
+ RGDT_ACTIVE_LOW
+ }, /* RING_DET_NOVAL_LOWV */
+ {
+ RDLY_512MS,
+ RT__40_5VRMS_49_5VRMS,
+ 12, /* RMX */
+ RTO_1408MS,
+ RCC_640MS,
+ RNGV_ENABLED,
+ 17, /* RAS */
+ RFWE_RNGV_RING_ENV,
+ RDI_BEG_END_BURST,
+ RGDT_ACTIVE_LOW
+ } /* RING_DET_VAL_HIGHV */
+};
+
+vdaa_PCM_Cfg Vdaa_PCM_Presets[] ={
+ {
+ U_LAW,
+ PCLK_1_PER_BIT,
+ TRI_POS_EDGE
+ }, /* VDAA_PCM_8ULAW */
+ {
+ A_LAW,
+ PCLK_1_PER_BIT,
+ TRI_POS_EDGE
+ }, /* VDAA_PCM_8ALAW */
+ {
+ LINEAR_16_BIT,
+ PCLK_1_PER_BIT,
+ TRI_POS_EDGE
+ } /* VDAA_PCM_16LIN */
+};
+
+vdaa_Hybrid_Cfg Vdaa_Hybrid_Presets[] ={
+ {
+ 0, /* HYB1 */
+ 254, /* HYB2 */
+ 0, /* HYB3 */
+ 1, /* HYB4 */
+ 255, /* HYB5 */
+ 1, /* HYB6 */
+ 0, /* HYB7 */
+ 0 /* HYB8 */
+ }, /* HYB_600_0_0_500FT_24AWG */
+ {
+ 4, /* HYB1 */
+ 246, /* HYB2 */
+ 242, /* HYB3 */
+ 4, /* HYB4 */
+ 254, /* HYB5 */
+ 255, /* HYB6 */
+ 1, /* HYB7 */
+ 255 /* HYB8 */
+ }, /* HYB_270_750_150_500FT_24AWG */
+ {
+ 4, /* HYB1 */
+ 245, /* HYB2 */
+ 243, /* HYB3 */
+ 7, /* HYB4 */
+ 253, /* HYB5 */
+ 0, /* HYB6 */
+ 1, /* HYB7 */
+ 255 /* HYB8 */
+ }, /* HYB_200_680_100_500FT_24AWG */
+ {
+ 4, /* HYB1 */
+ 244, /* HYB2 */
+ 241, /* HYB3 */
+ 6, /* HYB4 */
+ 253, /* HYB5 */
+ 255, /* HYB6 */
+ 2, /* HYB7 */
+ 255 /* HYB8 */
+ } /* HYB_220_820_120_500FT_24AWG */
+};
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt17x_b_regs.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt17x_b_regs.h
new file mode 100644
index 0000000..e84c70f
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt17x_b_regs.h
@@ -0,0 +1,232 @@
+/*
+** Copyright (c) 2013 by Silicon Laboratories
+**
+** $Id: mlt17x_b_regs.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file mlt17x_b_regs.h
+**
+** \brief Register/RAM map abstracted for MLT
+**
+** \author Silicon Laboratories, Inc.
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission
+** from Silicon Laboratories, Inc.
+**
+** This file is auto generated. Do no modify.
+**
+*/
+#ifndef MLT17X_B_REGS_H
+#define MLT17X_B_REGS_H
+
+
+/*
+** MLT17X_B Unique SPI Registers
+*/
+enum MLT17X_B_REG {
+MLT17X_B_REG_DAA_CNTL = 74,
+};
+
+/*
+** MLT17X_B_RAM
+*/
+enum MLT17X_B_RAM {
+MLT17X_B_RAM_P_Q2_D = 15,
+MLT17X_B_RAM_P_Q3_D = 16,
+MLT17X_B_RAM_P_Q4_D = 17,
+MLT17X_B_RAM_P_Q5_D = 18,
+MLT17X_B_RAM_P_Q6_D = 19,
+MLT17X_B_RAM_METER_LPF_OUT_1 = 328,
+MLT17X_B_RAM_PMDIFF_D1 = 333,
+MLT17X_B_RAM_PMDIFF_D2 = 334,
+MLT17X_B_RAM_CAL_LKG_DWN_C0 = 385,
+MLT17X_B_RAM_CAL_LKG_DWN_V0 = 386,
+MLT17X_B_RAM_CAL_LKG_DWN_CN = 387,
+MLT17X_B_RAM_CAL_LKG_DWN_VN = 388,
+MLT17X_B_RAM_CAL_LKG_DWN_VLSB = 389,
+MLT17X_B_RAM_CAL_LKG_DWN_ILSB = 390,
+MLT17X_B_RAM_CAL_LKG_DWN_DACCODE = 391,
+MLT17X_B_RAM_CAL_LKG_DWN_ICALC = 392,
+MLT17X_B_RAM_MADC_VBAT_LAST = 416,
+MLT17X_B_RAM_UNUSED440 = 440,
+MLT17X_B_RAM_CALTMP_ILOOPX1 = 443,
+MLT17X_B_RAM_DIAG_V_TAR = 459,
+MLT17X_B_RAM_MADC_ISNS_DIAG_STBY_OS = 487,
+MLT17X_B_RAM_MADC_ISNS_DIAG_OS = 488,
+MLT17X_B_RAM_DCDC_FSW_VTHLO = 489,
+MLT17X_B_RAM_DCDC_FSW_VHYST = 490,
+MLT17X_B_RAM_DCDC_FSW_STATE = 491,
+MLT17X_B_RAM_UNUSED501 = 501,
+MLT17X_B_RAM_UNUSED502 = 502,
+MLT17X_B_RAM_CAL_TEMP11 = 503,
+MLT17X_B_RAM_UNUSED504 = 504,
+MLT17X_B_RAM_UNUSED505 = 505,
+MLT17X_B_RAM_UNUSED506 = 506,
+MLT17X_B_RAM_UNUSED507 = 507,
+MLT17X_B_RAM_UNUSED508 = 508,
+MLT17X_B_RAM_UNUSED509 = 509,
+MLT17X_B_RAM_UNUSED510 = 510,
+MLT17X_B_RAM_P_TH_Q1256 = 757,
+MLT17X_B_RAM_P_TH_Q34 = 758,
+MLT17X_B_RAM_COEF_Q1256 = 760,
+MLT17X_B_RAM_COEF_Q34 = 761,
+MLT17X_B_RAM_R_OFFLOAD = 762,
+MLT17X_B_RAM_R_63 = 763,
+MLT17X_B_RAM_MADC_ISNS_STDBY_OS = 778,
+MLT17X_B_RAM_MADC_ISNS_OS = 779,
+MLT17X_B_RAM_CAL_LKG_TSETTLE = 792,
+MLT17X_B_RAM_CAL_LKG_IREF100 = 793,
+MLT17X_B_RAM_CAL_LKG_LIM100UA = 794,
+MLT17X_B_RAM_CAL_LKG_VREF25 = 795,
+MLT17X_B_RAM_CAL_LKG_VLSB_0_INV = 796,
+MLT17X_B_RAM_CAL_LKG_RDCSNS_EFF = 797,
+MLT17X_B_RAM_CAL_LKG_RDCOFF_EFF = 798,
+MLT17X_B_RAM_CAL_LKG_CODE_OS = 799,
+MLT17X_B_RAM_CAL_LKG_VMAX_THR = 800,
+MLT17X_B_RAM_MADC_VBAT_HYST = 870,
+MLT17X_B_RAM_STDBY_THRLO = 872,
+MLT17X_B_RAM_STDBY_THRHI = 873,
+MLT17X_B_RAM_UNUSED876 = 876,
+MLT17X_B_RAM_UNUSED878 = 878,
+MLT17X_B_RAM_MADC_VBAT_SCALE0 = 885,
+MLT17X_B_RAM_MADC_VBAT_SCALE1 = 886,
+MLT17X_B_RAM_MADC_ITR_SCALE = 892,
+MLT17X_B_RAM_DIAG_GAIN_DC = 897,
+MLT17X_B_RAM_CAL_LKG_CODE_OS_COMP = 911,
+MLT17X_B_RAM_UNUSED918 = 918,
+MLT17X_B_RAM_DCDC_VREF_MIN = 919,
+MLT17X_B_RAM_DCDC_VREF_MIN_RNG = 920,
+MLT17X_B_RAM_DCDC_FSW_NORM = 921,
+MLT17X_B_RAM_DCDC_FSW_NORM_LO = 922,
+MLT17X_B_RAM_DCDC_FSW_RINGING = 923,
+MLT17X_B_RAM_DCDC_FSW_RINGING_LO = 924,
+MLT17X_B_RAM_DCDC_DIN_LIM = 925,
+MLT17X_B_RAM_DCDC_VOUT_LIM = 926,
+MLT17X_B_RAM_DAA_DTMF_IN_SCALE = 928,
+MLT17X_B_RAM_PM_GAIN = 961,
+MLT17X_B_RAM_UNUSED968 = 968,
+MLT17X_B_RAM_UNUSED969 = 969,
+MLT17X_B_RAM_UNUSED970 = 970,
+MLT17X_B_RAM_UNUSED971 = 971,
+MLT17X_B_RAM_UNUSED972 = 972,
+MLT17X_B_RAM_UNUSED973 = 973,
+MLT17X_B_RAM_UNUSED974 = 974,
+MLT17X_B_RAM_UNUSED975 = 975,
+MLT17X_B_RAM_UNUSED976 = 976,
+MLT17X_B_RAM_UNUSED977 = 977,
+MLT17X_B_RAM_UNUSED978 = 978,
+MLT17X_B_RAM_UNUSED979 = 979,
+MLT17X_B_RAM_UNUSED980 = 980,
+MLT17X_B_RAM_UNUSED981 = 981,
+MLT17X_B_RAM_UNUSED982 = 982,
+MLT17X_B_RAM_UNUSED983 = 983,
+MLT17X_B_RAM_UNUSED984 = 984,
+MLT17X_B_RAM_UNUSED985 = 985,
+MLT17X_B_RAM_UNUSED986 = 986,
+MLT17X_B_RAM_UNUSED987 = 987,
+MLT17X_B_RAM_UNUSED988 = 988,
+MLT17X_B_RAM_UNUSED989 = 989,
+MLT17X_B_RAM_UNUSED990 = 990,
+MLT17X_B_RAM_UNUSED991 = 991,
+MLT17X_B_RAM_UNUSED992 = 992,
+MLT17X_B_RAM_UNUSED993 = 993,
+MLT17X_B_RAM_UNUSED994 = 994,
+MLT17X_B_RAM_UNUSED995 = 995,
+MLT17X_B_RAM_UNUSED996 = 996,
+MLT17X_B_RAM_UNUSED997 = 997,
+MLT17X_B_RAM_UNUSED998 = 998,
+MLT17X_B_RAM_UNUSED999 = 999,
+MLT17X_B_RAM_UNUSED1000 = 1000,
+MLT17X_B_RAM_UNUSED1001 = 1001,
+MLT17X_B_RAM_UNUSED1002 = 1002,
+MLT17X_B_RAM_UNUSED1003 = 1003,
+MLT17X_B_RAM_UNUSED1004 = 1004,
+MLT17X_B_RAM_UNUSED1005 = 1005,
+MLT17X_B_RAM_UNUSED1006 = 1006,
+MLT17X_B_RAM_UNUSED1007 = 1007,
+MLT17X_B_RAM_UNUSED1008 = 1008,
+MLT17X_B_RAM_UNUSED1009 = 1009,
+MLT17X_B_RAM_UNUSED1010 = 1010,
+MLT17X_B_RAM_UNUSED1011 = 1011,
+MLT17X_B_RAM_UNUSED1012 = 1012,
+MLT17X_B_RAM_UNUSED1013 = 1013,
+MLT17X_B_RAM_UNUSED1014 = 1014,
+MLT17X_B_RAM_UNUSED1015 = 1015,
+MLT17X_B_RAM_UNUSED1016 = 1016,
+MLT17X_B_RAM_UNUSED1017 = 1017,
+MLT17X_B_RAM_UNUSED1018 = 1018,
+MLT17X_B_RAM_UNUSED1019 = 1019,
+MLT17X_B_RAM_UNUSED1020 = 1020,
+MLT17X_B_RAM_UNUSED1021 = 1021,
+MLT17X_B_RAM_DAC_OFFSET = 1280,
+MLT17X_B_RAM_DAA_ADC_OUT = 1304,
+MLT17X_B_RAM_ADC_CAL = 1306,
+MLT17X_B_RAM_VOC_DAC = 1311,
+MLT17X_B_RAM_CHAN_ZERO = 1316,
+MLT17X_B_RAM_CHAN_TOG = 1317,
+MLT17X_B_RAM_CHAN_POP = 1318,
+MLT17X_B_RAM_BIAS = 1321,
+MLT17X_B_RAM_SLIC_DIAG_CLR = 1353,
+MLT17X_B_RAM_METER_LPF_OUT = 1366,
+MLT17X_B_RAM_METER_PK = 1367,
+MLT17X_B_RAM_METER_FREQ = 1368,
+MLT17X_B_RAM_GPI0 = 1380,
+MLT17X_B_RAM_GPO0 = 1384,
+MLT17X_B_RAM_GPO0_OE = 1388,
+MLT17X_B_RAM_MADC_ITIP_RAW = 1404,
+MLT17X_B_RAM_MADC_IRING_RAW = 1405,
+MLT17X_B_RAM_MADC_BATSCALE_SCHED = 1408,
+MLT17X_B_RAM_CAL_HVIC_CNTL = 1409,
+MLT17X_B_RAM_PD_PM_RAMP = 1425,
+MLT17X_B_RAM_PD_PM_SINE = 1426,
+MLT17X_B_RAM_PD_DISCROPA = 1429,
+MLT17X_B_RAM_PM_DAC_CHEN_B = 1431,
+MLT17X_B_RAM_PM_CHEN_B = 1435,
+MLT17X_B_RAM_PM_GAIN_EN_B = 1440,
+MLT17X_B_RAM_MADC_LOOP_MAN = 1445,
+MLT17X_B_RAM_HVIC_CNTL_MAN = 1451,
+MLT17X_B_RAM_CAL_DCADC_CNTL = 1455,
+MLT17X_B_RAM_LKG_UPT_STBY = 1464,
+MLT17X_B_RAM_LKG_UPR_STBY = 1465,
+MLT17X_B_RAM_LKG_DNT_STBY = 1466,
+MLT17X_B_RAM_LKG_DNR_STBY = 1467,
+MLT17X_B_RAM_CAL_GPIO0_CTRL = 1470,
+MLT17X_B_RAM_VBAT_DAC = 1484,
+MLT17X_B_RAM_UNUSED_REG461 = 1485,
+MLT17X_B_RAM_STDBY_SET = 1494,
+MLT17X_B_RAM_STDBY_CLR = 1495,
+MLT17X_B_RAM_CAL_HVIC_TR = 1498,
+MLT17X_B_RAM_PM_SINE_MAN = 1500,
+MLT17X_B_RAM_PM_SINE_VAL = 1501,
+MLT17X_B_RAM_PM_RAMP_MAN = 1502,
+MLT17X_B_RAM_PM_RAMP_VAL = 1503,
+MLT17X_B_RAM_PM_GAIN_MAN = 1504,
+MLT17X_B_RAM_PM_GAIN_VAL = 1505,
+MLT17X_B_RAM_UNUSED_REG488 = 1512,
+MLT17X_B_RAM_UNUSED_REG489 = 1513,
+MLT17X_B_RAM_BATSEL_MAN = 1519,
+MLT17X_B_RAM_HVIC_MAN = 1520,
+MLT17X_B_RAM_PD_ISNS = 1521,
+MLT17X_B_RAM_DISCR_FORCE = 1526,
+MLT17X_B_RAM_CAP_LB_ON = 1529,
+MLT17X_B_RAM_LKG_STBY_OFFSET = 1537,
+MLT17X_B_RAM_PD_CCMDET = 1544,
+MLT17X_B_RAM_DCDC_SWTHRESH = 1549,
+MLT17X_B_RAM_DCDC_CCMTHRESH = 1550,
+MLT17X_B_RAM_DCDC_FSW = 1552,
+MLT17X_B_RAM_DCDC_SWFET = 1555,
+MLT17X_B_RAM_DCDC_VREF = 1556,
+MLT17X_B_RAM_DCDC_TESTMODE = 1559,
+MLT17X_B_RAM_DCDC_CCMDET_FILT = 1562,
+MLT17X_B_RAM_DCDC_DIN_MAN = 1566,
+MLT17X_B_RAM_DCDC_DIN_VAL = 1567,
+MLT17X_B_RAM_PD_BJTDRV = 1572,
+MLT17X_B_RAM_DAA_PROM_MISR = 1581,
+MLT17X_B_RAM_DAA_CROM_MISR = 1582,
+MLT17X_B_RAM_PD_DCDC_DIG = 1593,
+MLT17X_B_RAM_PD_OCLO_IDAC = 1594,
+};
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt17x_c_regs.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt17x_c_regs.h
new file mode 100644
index 0000000..67155b2
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt17x_c_regs.h
@@ -0,0 +1,269 @@
+/*
+** Copyright (c) 2013 by Silicon Laboratories
+**
+** $Id: mlt17x_c_regs.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file mlt17x_c_regs.h
+**
+** \brief Register/RAM map abstracted for MLT
+**
+** \author Silicon Laboratories, Inc.
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission
+** from Silicon Laboratories, Inc.
+**
+** This file is auto generated. Do no modify.
+**
+*/
+#ifndef MLT17X_C_REGS_H
+#define MLT17X_C_REGS_H
+
+
+/*
+** MLT17X_C Unique SPI Registers
+*/
+enum MLT17X_C_REG {
+MLT17X_C_REG_DIAG3 = 74,
+MLT17X_C_REG_PCLK_FAULT_CNTL = 76,
+};
+
+/*
+** MLT17X_C_RAM
+*/
+enum MLT17X_C_RAM {
+MLT17X_C_RAM_INIT_GUESS = 15,
+MLT17X_C_RAM_Y1 = 16,
+MLT17X_C_RAM_Y2 = 17,
+MLT17X_C_RAM_Y3 = 18,
+MLT17X_C_RAM_UNUSED19 = 19,
+MLT17X_C_RAM_METER_LPF_OUT = 328,
+MLT17X_C_RAM_UNUSED333 = 333,
+MLT17X_C_RAM_UNUSED334 = 334,
+MLT17X_C_RAM_I_SOURCE1 = 385,
+MLT17X_C_RAM_I_SOURCE2 = 386,
+MLT17X_C_RAM_VTR1 = 387,
+MLT17X_C_RAM_VTR2 = 388,
+MLT17X_C_RAM_STOP_TIMER1 = 389,
+MLT17X_C_RAM_STOP_TIMER2 = 390,
+MLT17X_C_RAM_UNUSED391 = 391,
+MLT17X_C_RAM_UNUSED392 = 392,
+MLT17X_C_RAM_UNUSED416 = 416,
+MLT17X_C_RAM_UNUSED440 = 440,
+MLT17X_C_RAM_UNUSED443 = 443,
+MLT17X_C_RAM_UNUSED459 = 459,
+MLT17X_C_RAM_UNUSED487 = 487,
+MLT17X_C_RAM_UNUSED488 = 488,
+MLT17X_C_RAM_UNUSED489 = 489,
+MLT17X_C_RAM_UNUSED490 = 490,
+MLT17X_C_RAM_UNUSED491 = 491,
+MLT17X_C_RAM_CAL_TEMP11 = 501,
+MLT17X_C_RAM_METER_RAMP = 502,
+MLT17X_C_RAM_METER_RAMP_DIR = 503,
+MLT17X_C_RAM_METER_ON_T = 504,
+MLT17X_C_RAM_METER_PK_DET = 505,
+MLT17X_C_RAM_METER_PK_DET_T = 506,
+MLT17X_C_RAM_THERM_CNT = 507,
+MLT17X_C_RAM_VDIFF_SENSE_DELAY = 508,
+MLT17X_C_RAM_RING_INTERP_DIFF_SYNC = 509,
+MLT17X_C_RAM_CPUMP_DEB_CNT = 510,
+MLT17X_C_RAM_UNUSED757 = 757,
+MLT17X_C_RAM_UNUSED758 = 758,
+MLT17X_C_RAM_UNUSED760 = 760,
+MLT17X_C_RAM_UNUSED761 = 761,
+MLT17X_C_RAM_UNUSED762 = 762,
+MLT17X_C_RAM_UNUSED763 = 763,
+MLT17X_C_RAM_UNUSED778 = 778,
+MLT17X_C_RAM_UNUSED779 = 779,
+MLT17X_C_RAM_UNUSED792 = 792,
+MLT17X_C_RAM_UNUSED793 = 793,
+MLT17X_C_RAM_UNUSED794 = 794,
+MLT17X_C_RAM_UNUSED795 = 795,
+MLT17X_C_RAM_UNUSED796 = 796,
+MLT17X_C_RAM_UNUSED797 = 797,
+MLT17X_C_RAM_UNUSED798 = 798,
+MLT17X_C_RAM_UNUSED799 = 799,
+MLT17X_C_RAM_UNUSED800 = 800,
+MLT17X_C_RAM_UNUSED870 = 870,
+MLT17X_C_RAM_UNUSED872 = 872,
+MLT17X_C_RAM_UNUSED873 = 873,
+MLT17X_C_RAM_UNUSED876 = 876,
+MLT17X_C_RAM_UNUSED878 = 878,
+MLT17X_C_RAM_UNUSED885 = 885,
+MLT17X_C_RAM_MADC_VBAT_SCALE = 886,
+MLT17X_C_RAM_UNUSED892 = 892,
+MLT17X_C_RAM_DIAG_GAIN_DC = 897,
+MLT17X_C_RAM_UNUSED911 = 911,
+MLT17X_C_RAM_UNUSED918 = 918,
+MLT17X_C_RAM_VBAT_TRACK_MIN = 919,
+MLT17X_C_RAM_VBAT_TRACK_MIN_RNG = 920,
+MLT17X_C_RAM_UNUSED921 = 921,
+MLT17X_C_RAM_UNUSED922 = 922,
+MLT17X_C_RAM_UNUSED923 = 923,
+MLT17X_C_RAM_UNUSED924 = 924,
+MLT17X_C_RAM_UNUSED925 = 925,
+MLT17X_C_RAM_UNUSED926 = 926,
+MLT17X_C_RAM_UNUSED928 = 928,
+MLT17X_C_RAM_METER_GAIN = 961,
+MLT17X_C_RAM_METER_GAIN_TEMP = 968,
+MLT17X_C_RAM_METER_RAMP_STEP = 969,
+MLT17X_C_RAM_THERM_DBI = 970,
+MLT17X_C_RAM_LPR_SCALE = 971,
+MLT17X_C_RAM_LPR_CM_OS = 972,
+MLT17X_C_RAM_VOV_DCDC_SLOPE = 973,
+MLT17X_C_RAM_VOV_DCDC_OS = 974,
+MLT17X_C_RAM_VOV_RING_BAT_MAX = 975,
+MLT17X_C_RAM_SLOPE_VLIM1 = 976,
+MLT17X_C_RAM_SLOPE_RFEED1 = 977,
+MLT17X_C_RAM_SLOPE_ILIM1 = 978,
+MLT17X_C_RAM_V_VLIM1 = 979,
+MLT17X_C_RAM_V_RFEED1 = 980,
+MLT17X_C_RAM_V_ILIM1 = 981,
+MLT17X_C_RAM_CONST_RFEED1 = 982,
+MLT17X_C_RAM_CONST_ILIM1 = 983,
+MLT17X_C_RAM_I_VLIM1 = 984,
+MLT17X_C_RAM_SLOPE_VLIM2 = 985,
+MLT17X_C_RAM_SLOPE_RFEED2 = 986,
+MLT17X_C_RAM_SLOPE_ILIM2 = 987,
+MLT17X_C_RAM_V_VLIM2 = 988,
+MLT17X_C_RAM_V_RFEED2 = 989,
+MLT17X_C_RAM_V_ILIM2 = 990,
+MLT17X_C_RAM_CONST_RFEED2 = 991,
+MLT17X_C_RAM_CONST_ILIM2 = 992,
+MLT17X_C_RAM_I_VLIM2 = 993,
+MLT17X_C_RAM_DIAG_V_TAR = 994,
+MLT17X_C_RAM_DIAG_V_TAR2 = 995,
+MLT17X_C_RAM_STOP_TIMER1_VAL = 996,
+MLT17X_C_RAM_STOP_TIMER2_VAL = 997,
+MLT17X_C_RAM_DIAG_VCM1_TAR = 998,
+MLT17X_C_RAM_DIAG_VCM_STEP = 999,
+MLT17X_C_RAM_LKG_DNT_HIRES = 1000,
+MLT17X_C_RAM_LKG_DNR_HIRES = 1001,
+MLT17X_C_RAM_LINEAR_OS = 1002,
+MLT17X_C_RAM_CPUMP_DEB = 1003,
+MLT17X_C_RAM_DCDC_VERR = 1004,
+MLT17X_C_RAM_DCDC_VERR_HYST = 1005,
+MLT17X_C_RAM_DCDC_OITHRESH_LO = 1006,
+MLT17X_C_RAM_DCDC_OITHRESH_HI = 1007,
+MLT17X_C_RAM_HV_BIAS_ONHK = 1008,
+MLT17X_C_RAM_HV_BIAS_OFFHK = 1009,
+MLT17X_C_RAM_UNUSED1010 = 1010,
+MLT17X_C_RAM_UNUSED1011 = 1011,
+MLT17X_C_RAM_UNUSED1012 = 1012,
+MLT17X_C_RAM_UNUSED1013 = 1013,
+MLT17X_C_RAM_ILONG_RT_THRESH = 1014,
+MLT17X_C_RAM_VOV_RING_BAT_DCDC = 1015,
+MLT17X_C_RAM_UNUSED1016 = 1016,
+MLT17X_C_RAM_LKG_LB_OFFSET = 1017,
+MLT17X_C_RAM_LKG_OFHK_OFFSET = 1018,
+MLT17X_C_RAM_SWEEP_FREQ_TH = 1019,
+MLT17X_C_RAM_AMP_MOD_G = 1020,
+MLT17X_C_RAM_AMP_MOD_OS = 1021,
+MLT17X_C_RAM_UNUSED_REG256 = 1280,
+MLT17X_C_RAM_DAA_ADC_OUT = 1304,
+MLT17X_C_RAM_UNUSED_REG282 = 1306,
+MLT17X_C_RAM_UNUSED_REG287 = 1311,
+MLT17X_C_RAM_UNUSED_REG292 = 1316,
+MLT17X_C_RAM_UNUSED_REG293 = 1317,
+MLT17X_C_RAM_UNUSED_REG294 = 1318,
+MLT17X_C_RAM_UNUSED_REG297 = 1321,
+MLT17X_C_RAM_UNUSED_REG329 = 1353,
+MLT17X_C_RAM_UNUSED_REG342 = 1366,
+MLT17X_C_RAM_UNUSED_REG343 = 1367,
+MLT17X_C_RAM_UNUSED_REG344 = 1368,
+MLT17X_C_RAM_GPI0 = 1380,
+MLT17X_C_RAM_GPO0 = 1384,
+MLT17X_C_RAM_GPO0_OE = 1388,
+MLT17X_C_RAM_UNUSED_REG380 = 1404,
+MLT17X_C_RAM_UNUSED_REG381 = 1405,
+MLT17X_C_RAM_UNUSED_REG384 = 1408,
+MLT17X_C_RAM_UNUSED_REG385 = 1409,
+MLT17X_C_RAM_UNUSED_REG401 = 1425,
+MLT17X_C_RAM_UNUSED_REG402 = 1426,
+MLT17X_C_RAM_UNUSED_REG405 = 1429,
+MLT17X_C_RAM_UNUSED_REG407 = 1431,
+MLT17X_C_RAM_UNUSED_REG411 = 1435,
+MLT17X_C_RAM_UNUSED_REG416 = 1440,
+MLT17X_C_RAM_UNUSED_REG421 = 1445,
+MLT17X_C_RAM_UNUSED_REG427 = 1451,
+MLT17X_C_RAM_UNUSED_REG431 = 1455,
+MLT17X_C_RAM_LKG_UPT_OHT = 1464,
+MLT17X_C_RAM_LKG_UPR_OHT = 1465,
+MLT17X_C_RAM_LKG_DNT_OHT = 1466,
+MLT17X_C_RAM_LKG_DNR_OHT = 1467,
+MLT17X_C_RAM_UNUSED_REG446 = 1470,
+MLT17X_C_RAM_UNUSED_REG460 = 1484,
+MLT17X_C_RAM_UNUSED_REG461 = 1485,
+MLT17X_C_RAM_UNUSED_REG470 = 1494,
+MLT17X_C_RAM_UNUSED_REG471 = 1495,
+MLT17X_C_RAM_UNUSED_REG474 = 1498,
+MLT17X_C_RAM_UNUSED_REG476 = 1500,
+MLT17X_C_RAM_UNUSED_REG477 = 1501,
+MLT17X_C_RAM_UNUSED_REG478 = 1502,
+MLT17X_C_RAM_UNUSED_REG479 = 1503,
+MLT17X_C_RAM_UNUSED_REG480 = 1504,
+MLT17X_C_RAM_UNUSED_REG481 = 1505,
+MLT17X_C_RAM_UNUSED_REG488 = 1512,
+MLT17X_C_RAM_UNUSED_REG489 = 1513,
+MLT17X_C_RAM_UNUSED_REG495 = 1519,
+MLT17X_C_RAM_UNUSED_REG496 = 1520,
+MLT17X_C_RAM_UNUSED_REG497 = 1521,
+MLT17X_C_RAM_UNUSED_REG502 = 1526,
+MLT17X_C_RAM_UNUSED_REG505 = 1529,
+MLT17X_C_RAM_UNUSED_REG513 = 1537,
+MLT17X_C_RAM_UNUSED_REG520 = 1544,
+MLT17X_C_RAM_UNUSED_REG525 = 1549,
+MLT17X_C_RAM_UNUSED_REG526 = 1550,
+MLT17X_C_RAM_UNUSED_REG528 = 1552,
+MLT17X_C_RAM_DCDC_CPUMP = 1555,
+MLT17X_C_RAM_UNUSED_REG532 = 1556,
+MLT17X_C_RAM_UNUSED_REG535 = 1559,
+MLT17X_C_RAM_UNUSED_REG538 = 1562,
+MLT17X_C_RAM_UNUSED_REG542 = 1566,
+MLT17X_C_RAM_UNUSED_REG543 = 1567,
+MLT17X_C_RAM_UNUSED_REG548 = 1572,
+MLT17X_C_RAM_DAA_PROM_MISR = 1581,
+MLT17X_C_RAM_DAA_CROM_MISR = 1582,
+MLT17X_C_RAM_UNUSED_REG569 = 1593,
+MLT17X_C_RAM_UNUSED_REG570 = 1594,
+MLT17X_C_RAM_JMP8 = 1597,
+MLT17X_C_RAM_JMP9 = 1598,
+MLT17X_C_RAM_JMP10 = 1599,
+MLT17X_C_RAM_JMP11 = 1600,
+MLT17X_C_RAM_JMP12 = 1601,
+MLT17X_C_RAM_JMP13 = 1602,
+MLT17X_C_RAM_JMP14 = 1603,
+MLT17X_C_RAM_JMP15 = 1604,
+MLT17X_C_RAM_METER_TRIG = 1605,
+MLT17X_C_RAM_PM_ACTIVE = 1606,
+MLT17X_C_RAM_PM_INACTIVE = 1607,
+MLT17X_C_RAM_HVIC_VERSION = 1608,
+MLT17X_C_RAM_THERM_OFF = 1609,
+MLT17X_C_RAM_THERM_HI = 1610,
+MLT17X_C_RAM_TEST_LOAD = 1611,
+MLT17X_C_RAM_DC_HOLD_MAN = 1612,
+MLT17X_C_RAM_DC_HOLD_DAC_MAN = 1613,
+MLT17X_C_RAM_UNUSED_REG590 = 1614,
+MLT17X_C_RAM_DCDC_CPUMP_LP = 1615,
+MLT17X_C_RAM_DCDC_CPUMP_LP_MASK = 1616,
+MLT17X_C_RAM_DCDC_CPUMP_PULLDOWN = 1617,
+MLT17X_C_RAM_BOND_STATUS = 1618,
+MLT17X_C_RAM_BOND_MAN = 1619,
+MLT17X_C_RAM_BOND_VAL = 1620,
+MLT17X_C_RAM_REF_DEBOUNCE_PCLK = 1633,
+MLT17X_C_RAM_REF_DEBOUNCE_FSYNC = 1634,
+MLT17X_C_RAM_DCDC_LIFT_EN = 1635,
+MLT17X_C_RAM_DCDC_CPUMP_PGOOD = 1636,
+MLT17X_C_RAM_DCDC_CPUMP_PGOOD_WKEN = 1637,
+MLT17X_C_RAM_DCDC_CPUMP_PGOOD_FRC = 1638,
+MLT17X_C_RAM_DCDC_CPUMP_LP_MASK_SH = 1639,
+MLT17X_C_RAM_DCDC_UV_MAN = 1640,
+MLT17X_C_RAM_DCDC_UV_DEBOUNCE = 1641,
+MLT17X_C_RAM_DCDC_OV_MAN = 1642,
+MLT17X_C_RAM_DCDC_OV_DEBOUNCE = 1643,
+MLT17X_C_RAM_ANALOG3_TEST_MUX = 1644,
+};
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt18x_a_regs.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt18x_a_regs.h
new file mode 100644
index 0000000..1e60fae
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt18x_a_regs.h
@@ -0,0 +1,269 @@
+/*
+** Copyright (c) 2013 by Silicon Laboratories
+**
+** $Id: mlt18x_a_regs.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file mlt18x_a_regs.h
+**
+** \brief Register/RAM map abstracted for MLT
+**
+** \author Silicon Laboratories, Inc.
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission
+** from Silicon Laboratories, Inc.
+**
+** This file is auto generated. Do no modify.
+**
+*/
+#ifndef MLT18X_A_REGS_H
+#define MLT18X_A_REGS_H
+
+
+/*
+** MLT18X_A Unique SPI Registers
+*/
+enum MLT18X_A_REG {
+MLT18X_A_REG_DIAG3 = 74,
+MLT18X_A_REG_PCLK_FAULT_CNTL = 76,
+};
+
+/*
+** MLT18X_A_RAM
+*/
+enum MLT18X_A_RAM {
+MLT18X_A_RAM_INIT_GUESS = 15,
+MLT18X_A_RAM_Y1 = 16,
+MLT18X_A_RAM_Y2 = 17,
+MLT18X_A_RAM_Y3 = 18,
+MLT18X_A_RAM_UNUSED19 = 19,
+MLT18X_A_RAM_METER_LPF_OUT = 328,
+MLT18X_A_RAM_UNUSED333 = 333,
+MLT18X_A_RAM_UNUSED334 = 334,
+MLT18X_A_RAM_I_SOURCE1 = 385,
+MLT18X_A_RAM_I_SOURCE2 = 386,
+MLT18X_A_RAM_VTR1 = 387,
+MLT18X_A_RAM_VTR2 = 388,
+MLT18X_A_RAM_STOP_TIMER1 = 389,
+MLT18X_A_RAM_STOP_TIMER2 = 390,
+MLT18X_A_RAM_UNUSED391 = 391,
+MLT18X_A_RAM_UNUSED392 = 392,
+MLT18X_A_RAM_UNUSED416 = 416,
+MLT18X_A_RAM_UNUSED440 = 440,
+MLT18X_A_RAM_UNUSED443 = 443,
+MLT18X_A_RAM_UNUSED459 = 459,
+MLT18X_A_RAM_UNUSED487 = 487,
+MLT18X_A_RAM_UNUSED488 = 488,
+MLT18X_A_RAM_UNUSED489 = 489,
+MLT18X_A_RAM_UNUSED490 = 490,
+MLT18X_A_RAM_UNUSED491 = 491,
+MLT18X_A_RAM_CAL_TEMP11 = 501,
+MLT18X_A_RAM_METER_RAMP = 502,
+MLT18X_A_RAM_METER_RAMP_DIR = 503,
+MLT18X_A_RAM_METER_ON_T = 504,
+MLT18X_A_RAM_METER_PK_DET = 505,
+MLT18X_A_RAM_METER_PK_DET_T = 506,
+MLT18X_A_RAM_THERM_CNT = 507,
+MLT18X_A_RAM_VDIFF_SENSE_DELAY = 508,
+MLT18X_A_RAM_RING_INTERP_DIFF_SYNC = 509,
+MLT18X_A_RAM_CPUMP_DEB_CNT = 510,
+MLT18X_A_RAM_UNUSED757 = 757,
+MLT18X_A_RAM_UNUSED758 = 758,
+MLT18X_A_RAM_UNUSED760 = 760,
+MLT18X_A_RAM_UNUSED761 = 761,
+MLT18X_A_RAM_UNUSED762 = 762,
+MLT18X_A_RAM_UNUSED763 = 763,
+MLT18X_A_RAM_UNUSED778 = 778,
+MLT18X_A_RAM_UNUSED779 = 779,
+MLT18X_A_RAM_UNUSED792 = 792,
+MLT18X_A_RAM_UNUSED793 = 793,
+MLT18X_A_RAM_UNUSED794 = 794,
+MLT18X_A_RAM_UNUSED795 = 795,
+MLT18X_A_RAM_UNUSED796 = 796,
+MLT18X_A_RAM_UNUSED797 = 797,
+MLT18X_A_RAM_UNUSED798 = 798,
+MLT18X_A_RAM_UNUSED799 = 799,
+MLT18X_A_RAM_UNUSED800 = 800,
+MLT18X_A_RAM_UNUSED870 = 870,
+MLT18X_A_RAM_UNUSED872 = 872,
+MLT18X_A_RAM_UNUSED873 = 873,
+MLT18X_A_RAM_UNUSED876 = 876,
+MLT18X_A_RAM_UNUSED878 = 878,
+MLT18X_A_RAM_UNUSED885 = 885,
+MLT18X_A_RAM_MADC_VBAT_SCALE = 886,
+MLT18X_A_RAM_UNUSED892 = 892,
+MLT18X_A_RAM_DIAG_GAIN_DC = 897,
+MLT18X_A_RAM_UNUSED911 = 911,
+MLT18X_A_RAM_UNUSED918 = 918,
+MLT18X_A_RAM_VBAT_TRACK_MIN = 919,
+MLT18X_A_RAM_VBAT_TRACK_MIN_RNG = 920,
+MLT18X_A_RAM_UNUSED921 = 921,
+MLT18X_A_RAM_UNUSED922 = 922,
+MLT18X_A_RAM_UNUSED923 = 923,
+MLT18X_A_RAM_UNUSED924 = 924,
+MLT18X_A_RAM_UNUSED925 = 925,
+MLT18X_A_RAM_UNUSED926 = 926,
+MLT18X_A_RAM_UNUSED928 = 928,
+MLT18X_A_RAM_METER_GAIN = 961,
+MLT18X_A_RAM_METER_GAIN_TEMP = 968,
+MLT18X_A_RAM_METER_RAMP_STEP = 969,
+MLT18X_A_RAM_THERM_DBI = 970,
+MLT18X_A_RAM_LPR_SCALE = 971,
+MLT18X_A_RAM_LPR_CM_OS = 972,
+MLT18X_A_RAM_VOV_DCDC_SLOPE = 973,
+MLT18X_A_RAM_VOV_DCDC_OS = 974,
+MLT18X_A_RAM_VOV_RING_BAT_MAX = 975,
+MLT18X_A_RAM_SLOPE_VLIM1 = 976,
+MLT18X_A_RAM_SLOPE_RFEED1 = 977,
+MLT18X_A_RAM_SLOPE_ILIM1 = 978,
+MLT18X_A_RAM_V_VLIM1 = 979,
+MLT18X_A_RAM_V_RFEED1 = 980,
+MLT18X_A_RAM_V_ILIM1 = 981,
+MLT18X_A_RAM_CONST_RFEED1 = 982,
+MLT18X_A_RAM_CONST_ILIM1 = 983,
+MLT18X_A_RAM_I_VLIM1 = 984,
+MLT18X_A_RAM_SLOPE_VLIM2 = 985,
+MLT18X_A_RAM_SLOPE_RFEED2 = 986,
+MLT18X_A_RAM_SLOPE_ILIM2 = 987,
+MLT18X_A_RAM_V_VLIM2 = 988,
+MLT18X_A_RAM_V_RFEED2 = 989,
+MLT18X_A_RAM_V_ILIM2 = 990,
+MLT18X_A_RAM_CONST_RFEED2 = 991,
+MLT18X_A_RAM_CONST_ILIM2 = 992,
+MLT18X_A_RAM_I_VLIM2 = 993,
+MLT18X_A_RAM_DIAG_V_TAR = 994,
+MLT18X_A_RAM_DIAG_V_TAR2 = 995,
+MLT18X_A_RAM_STOP_TIMER1_VAL = 996,
+MLT18X_A_RAM_STOP_TIMER2_VAL = 997,
+MLT18X_A_RAM_DIAG_VCM1_TAR = 998,
+MLT18X_A_RAM_DIAG_VCM_STEP = 999,
+MLT18X_A_RAM_LKG_DNT_HIRES = 1000,
+MLT18X_A_RAM_LKG_DNR_HIRES = 1001,
+MLT18X_A_RAM_LINEAR_OS = 1002,
+MLT18X_A_RAM_CPUMP_DEB = 1003,
+MLT18X_A_RAM_DCDC_VERR = 1004,
+MLT18X_A_RAM_DCDC_VERR_HYST = 1005,
+MLT18X_A_RAM_DCDC_OITHRESH_LO = 1006,
+MLT18X_A_RAM_DCDC_OITHRESH_HI = 1007,
+MLT18X_A_RAM_HV_BIAS_ONHK = 1008,
+MLT18X_A_RAM_HV_BIAS_OFFHK = 1009,
+MLT18X_A_RAM_UNUSED1010 = 1010,
+MLT18X_A_RAM_UNUSED1011 = 1011,
+MLT18X_A_RAM_UNUSED1012 = 1012,
+MLT18X_A_RAM_UNUSED1013 = 1013,
+MLT18X_A_RAM_ILONG_RT_THRESH = 1014,
+MLT18X_A_RAM_VOV_RING_BAT_DCDC = 1015,
+MLT18X_A_RAM_UNUSED1016 = 1016,
+MLT18X_A_RAM_LKG_LB_OFFSET = 1017,
+MLT18X_A_RAM_LKG_OFHK_OFFSET = 1018,
+MLT18X_A_RAM_SWEEP_FREQ_TH = 1019,
+MLT18X_A_RAM_AMP_MOD_G = 1020,
+MLT18X_A_RAM_AMP_MOD_OS = 1021,
+MLT18X_A_RAM_UNUSED_REG256 = 1280,
+MLT18X_A_RAM_DAA_ADC_OUT = 1304,
+MLT18X_A_RAM_UNUSED_REG282 = 1306,
+MLT18X_A_RAM_UNUSED_REG287 = 1311,
+MLT18X_A_RAM_UNUSED_REG292 = 1316,
+MLT18X_A_RAM_UNUSED_REG293 = 1317,
+MLT18X_A_RAM_UNUSED_REG294 = 1318,
+MLT18X_A_RAM_UNUSED_REG297 = 1321,
+MLT18X_A_RAM_UNUSED_REG329 = 1353,
+MLT18X_A_RAM_UNUSED_REG342 = 1366,
+MLT18X_A_RAM_UNUSED_REG343 = 1367,
+MLT18X_A_RAM_UNUSED_REG344 = 1368,
+MLT18X_A_RAM_GPI0 = 1380,
+MLT18X_A_RAM_GPO0 = 1384,
+MLT18X_A_RAM_GPO0_OE = 1388,
+MLT18X_A_RAM_UNUSED_REG380 = 1404,
+MLT18X_A_RAM_UNUSED_REG381 = 1405,
+MLT18X_A_RAM_UNUSED_REG384 = 1408,
+MLT18X_A_RAM_UNUSED_REG385 = 1409,
+MLT18X_A_RAM_UNUSED_REG401 = 1425,
+MLT18X_A_RAM_UNUSED_REG402 = 1426,
+MLT18X_A_RAM_UNUSED_REG405 = 1429,
+MLT18X_A_RAM_UNUSED_REG407 = 1431,
+MLT18X_A_RAM_UNUSED_REG411 = 1435,
+MLT18X_A_RAM_UNUSED_REG416 = 1440,
+MLT18X_A_RAM_UNUSED_REG421 = 1445,
+MLT18X_A_RAM_UNUSED_REG427 = 1451,
+MLT18X_A_RAM_UNUSED_REG431 = 1455,
+MLT18X_A_RAM_LKG_UPT_OHT = 1464,
+MLT18X_A_RAM_LKG_UPR_OHT = 1465,
+MLT18X_A_RAM_LKG_DNT_OHT = 1466,
+MLT18X_A_RAM_LKG_DNR_OHT = 1467,
+MLT18X_A_RAM_UNUSED_REG446 = 1470,
+MLT18X_A_RAM_UNUSED_REG460 = 1484,
+MLT18X_A_RAM_UNUSED_REG461 = 1485,
+MLT18X_A_RAM_UNUSED_REG470 = 1494,
+MLT18X_A_RAM_UNUSED_REG471 = 1495,
+MLT18X_A_RAM_UNUSED_REG474 = 1498,
+MLT18X_A_RAM_UNUSED_REG476 = 1500,
+MLT18X_A_RAM_UNUSED_REG477 = 1501,
+MLT18X_A_RAM_UNUSED_REG478 = 1502,
+MLT18X_A_RAM_UNUSED_REG479 = 1503,
+MLT18X_A_RAM_UNUSED_REG480 = 1504,
+MLT18X_A_RAM_UNUSED_REG481 = 1505,
+MLT18X_A_RAM_UNUSED_REG488 = 1512,
+MLT18X_A_RAM_UNUSED_REG489 = 1513,
+MLT18X_A_RAM_UNUSED_REG495 = 1519,
+MLT18X_A_RAM_UNUSED_REG496 = 1520,
+MLT18X_A_RAM_UNUSED_REG497 = 1521,
+MLT18X_A_RAM_UNUSED_REG502 = 1526,
+MLT18X_A_RAM_UNUSED_REG505 = 1529,
+MLT18X_A_RAM_UNUSED_REG513 = 1537,
+MLT18X_A_RAM_UNUSED_REG520 = 1544,
+MLT18X_A_RAM_UNUSED_REG525 = 1549,
+MLT18X_A_RAM_UNUSED_REG526 = 1550,
+MLT18X_A_RAM_UNUSED_REG528 = 1552,
+MLT18X_A_RAM_DCDC_CPUMP = 1555,
+MLT18X_A_RAM_UNUSED_REG532 = 1556,
+MLT18X_A_RAM_UNUSED_REG535 = 1559,
+MLT18X_A_RAM_UNUSED_REG538 = 1562,
+MLT18X_A_RAM_UNUSED_REG542 = 1566,
+MLT18X_A_RAM_UNUSED_REG543 = 1567,
+MLT18X_A_RAM_UNUSED_REG548 = 1572,
+MLT18X_A_RAM_DAA_PROM_MISR = 1581,
+MLT18X_A_RAM_DAA_CROM_MISR = 1582,
+MLT18X_A_RAM_UNUSED_REG569 = 1593,
+MLT18X_A_RAM_UNUSED_REG570 = 1594,
+MLT18X_A_RAM_JMP8 = 1597,
+MLT18X_A_RAM_JMP9 = 1598,
+MLT18X_A_RAM_JMP10 = 1599,
+MLT18X_A_RAM_JMP11 = 1600,
+MLT18X_A_RAM_JMP12 = 1601,
+MLT18X_A_RAM_JMP13 = 1602,
+MLT18X_A_RAM_JMP14 = 1603,
+MLT18X_A_RAM_JMP15 = 1604,
+MLT18X_A_RAM_METER_TRIG = 1605,
+MLT18X_A_RAM_PM_ACTIVE = 1606,
+MLT18X_A_RAM_PM_INACTIVE = 1607,
+MLT18X_A_RAM_HVIC_VERSION = 1608,
+MLT18X_A_RAM_THERM_OFF = 1609,
+MLT18X_A_RAM_THERM_HI = 1610,
+MLT18X_A_RAM_TEST_LOAD = 1611,
+MLT18X_A_RAM_DC_HOLD_MAN = 1612,
+MLT18X_A_RAM_DC_HOLD_DAC_MAN = 1613,
+MLT18X_A_RAM_UNUSED_REG590 = 1614,
+MLT18X_A_RAM_DCDC_CPUMP_LP = 1615,
+MLT18X_A_RAM_DCDC_CPUMP_LP_MASK = 1616,
+MLT18X_A_RAM_DCDC_CPUMP_PULLDOWN = 1617,
+MLT18X_A_RAM_BOND_STATUS = 1618,
+MLT18X_A_RAM_BOND_MAN = 1619,
+MLT18X_A_RAM_BOND_VAL = 1620,
+MLT18X_A_RAM_REF_DEBOUNCE_PCLK = 1633,
+MLT18X_A_RAM_REF_DEBOUNCE_FSYNC = 1634,
+MLT18X_A_RAM_DCDC_LIFT_EN = 1635,
+MLT18X_A_RAM_DCDC_CPUMP_PGOOD = 1636,
+MLT18X_A_RAM_DCDC_CPUMP_PGOOD_WKEN = 1637,
+MLT18X_A_RAM_DCDC_CPUMP_PGOOD_FRC = 1638,
+MLT18X_A_RAM_DCDC_CPUMP_LP_MASK_SH = 1639,
+MLT18X_A_RAM_DCDC_UV_MAN = 1640,
+MLT18X_A_RAM_DCDC_UV_DEBOUNCE = 1641,
+MLT18X_A_RAM_DCDC_OV_MAN = 1642,
+MLT18X_A_RAM_DCDC_OV_DEBOUNCE = 1643,
+MLT18X_A_RAM_ANALOG3_TEST_MUX = 1644,
+};
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt26x_c_regs.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt26x_c_regs.h
new file mode 100644
index 0000000..d31ecf9
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt26x_c_regs.h
@@ -0,0 +1,284 @@
+/*
+** Copyright (c) 2013 by Silicon Laboratories
+**
+** $Id: mlt26x_c_regs.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file mlt26x_c_regs.h
+**
+** \brief Register/RAM map abstracted for MLT
+**
+** \author Silicon Laboratories, Inc.
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission
+** from Silicon Laboratories, Inc.
+**
+** This file is auto generated. Do no modify.
+**
+*/
+#ifndef MLT26X_C_REGS_H
+#define MLT26X_C_REGS_H
+
+
+/*
+** MLT26X_C Unique SPI Registers
+*/
+enum MLT26X_C_REG {
+MLT26X_C_REG_DIAG3 = 74,
+MLT26X_C_REG_PCLK_FAULT_CNTL = 76,
+};
+
+/*
+** MLT26X_C_RAM
+*/
+enum MLT26X_C_RAM {
+MLT26X_C_RAM_UNUSED15 = 15,
+MLT26X_C_RAM_P_Q3_D = 16,
+MLT26X_C_RAM_UNUSED17 = 17,
+MLT26X_C_RAM_UNUSED18 = 18,
+MLT26X_C_RAM_UNUSED19 = 19,
+MLT26X_C_RAM_METER_LPF_OUT = 328,
+MLT26X_C_RAM_UNUSED333 = 333,
+MLT26X_C_RAM_UNUSED334 = 334,
+MLT26X_C_RAM_I_SOURCE1 = 385,
+MLT26X_C_RAM_I_SOURCE2 = 386,
+MLT26X_C_RAM_VTR1 = 387,
+MLT26X_C_RAM_VTR2 = 388,
+MLT26X_C_RAM_STOP_TIMER1 = 389,
+MLT26X_C_RAM_STOP_TIMER2 = 390,
+MLT26X_C_RAM_UNUSED391 = 391,
+MLT26X_C_RAM_UNUSED392 = 392,
+MLT26X_C_RAM_UNUSED416 = 416,
+MLT26X_C_RAM_P_OFFLOAD = 440,
+MLT26X_C_RAM_UNUSED443 = 443,
+MLT26X_C_RAM_UNUSED459 = 459,
+MLT26X_C_RAM_INIT_GUESS = 487,
+MLT26X_C_RAM_Y1 = 488,
+MLT26X_C_RAM_Y2 = 489,
+MLT26X_C_RAM_Y3 = 490,
+MLT26X_C_RAM_UNUSED491 = 491,
+MLT26X_C_RAM_CAL_TEMP11 = 501,
+MLT26X_C_RAM_METER_RAMP = 502,
+MLT26X_C_RAM_METER_RAMP_DIR = 503,
+MLT26X_C_RAM_METER_ON_T = 504,
+MLT26X_C_RAM_METER_PK_DET = 505,
+MLT26X_C_RAM_METER_PK_DET_T = 506,
+MLT26X_C_RAM_THERM_CNT = 507,
+MLT26X_C_RAM_VDIFF_SENSE_DELAY = 508,
+MLT26X_C_RAM_UNUSED509 = 509,
+MLT26X_C_RAM_CPUMP_DEB_CNT = 510,
+MLT26X_C_RAM_UNUSED757 = 757,
+MLT26X_C_RAM_UNUSED758 = 758,
+MLT26X_C_RAM_COEF_Q1256 = 760,
+MLT26X_C_RAM_UNUSED761 = 761,
+MLT26X_C_RAM_UNUSED762 = 762,
+MLT26X_C_RAM_UNUSED763 = 763,
+MLT26X_C_RAM_UNUSED778 = 778,
+MLT26X_C_RAM_UNUSED779 = 779,
+MLT26X_C_RAM_UNUSED792 = 792,
+MLT26X_C_RAM_UNUSED793 = 793,
+MLT26X_C_RAM_UNUSED794 = 794,
+MLT26X_C_RAM_UNUSED795 = 795,
+MLT26X_C_RAM_UNUSED796 = 796,
+MLT26X_C_RAM_UNUSED797 = 797,
+MLT26X_C_RAM_UNUSED798 = 798,
+MLT26X_C_RAM_UNUSED799 = 799,
+MLT26X_C_RAM_UNUSED800 = 800,
+MLT26X_C_RAM_UNUSED870 = 870,
+MLT26X_C_RAM_UNUSED872 = 872,
+MLT26X_C_RAM_UNUSED873 = 873,
+MLT26X_C_RAM_OFFLD_DAC_SCALE = 876,
+MLT26X_C_RAM_OFFLD_DAC_OS = 878,
+MLT26X_C_RAM_UNUSED885 = 885,
+MLT26X_C_RAM_MADC_VBAT_SCALE = 886,
+MLT26X_C_RAM_UNUSED892 = 892,
+MLT26X_C_RAM_P_TH_OFFLOAD = 897,
+MLT26X_C_RAM_UNUSED911 = 911,
+MLT26X_C_RAM_XTALK_TIMER = 918,
+MLT26X_C_RAM_VBAT_TRACK_MIN = 919,
+MLT26X_C_RAM_VBAT_TRACK_MIN_RNG = 920,
+MLT26X_C_RAM_UNUSED921 = 921,
+MLT26X_C_RAM_UNUSED922 = 922,
+MLT26X_C_RAM_UNUSED923 = 923,
+MLT26X_C_RAM_UNUSED924 = 924,
+MLT26X_C_RAM_UNUSED925 = 925,
+MLT26X_C_RAM_UNUSED926 = 926,
+MLT26X_C_RAM_DIAG_GAIN_DC = 928,
+MLT26X_C_RAM_METER_GAIN = 961,
+MLT26X_C_RAM_METER_GAIN_TEMP = 968,
+MLT26X_C_RAM_METER_RAMP_STEP = 969,
+MLT26X_C_RAM_THERM_DBI = 970,
+MLT26X_C_RAM_LPR_SCALE = 971,
+MLT26X_C_RAM_LPR_CM_OS = 972,
+MLT26X_C_RAM_VOV_DCDC_SLOPE = 973,
+MLT26X_C_RAM_VOV_DCDC_OS = 974,
+MLT26X_C_RAM_VOV_RING_BAT_MAX = 975,
+MLT26X_C_RAM_SLOPE_VLIM1 = 976,
+MLT26X_C_RAM_SLOPE_RFEED1 = 977,
+MLT26X_C_RAM_SLOPE_ILIM1 = 978,
+MLT26X_C_RAM_V_VLIM1 = 979,
+MLT26X_C_RAM_V_RFEED1 = 980,
+MLT26X_C_RAM_V_ILIM1 = 981,
+MLT26X_C_RAM_CONST_RFEED1 = 982,
+MLT26X_C_RAM_CONST_ILIM1 = 983,
+MLT26X_C_RAM_I_VLIM1 = 984,
+MLT26X_C_RAM_SLOPE_VLIM2 = 985,
+MLT26X_C_RAM_SLOPE_RFEED2 = 986,
+MLT26X_C_RAM_SLOPE_ILIM2 = 987,
+MLT26X_C_RAM_V_VLIM2 = 988,
+MLT26X_C_RAM_V_RFEED2 = 989,
+MLT26X_C_RAM_V_ILIM2 = 990,
+MLT26X_C_RAM_CONST_RFEED2 = 991,
+MLT26X_C_RAM_CONST_ILIM2 = 992,
+MLT26X_C_RAM_I_VLIM2 = 993,
+MLT26X_C_RAM_DIAG_V_TAR = 994,
+MLT26X_C_RAM_DIAG_V_TAR2 = 995,
+MLT26X_C_RAM_STOP_TIMER1_VAL = 996,
+MLT26X_C_RAM_STOP_TIMER2_VAL = 997,
+MLT26X_C_RAM_DIAG_VCM1_TAR = 998,
+MLT26X_C_RAM_DIAG_VCM_STEP = 999,
+MLT26X_C_RAM_LKG_DNT_HIRES = 1000,
+MLT26X_C_RAM_LKG_DNR_HIRES = 1001,
+MLT26X_C_RAM_LINEAR_OS = 1002,
+MLT26X_C_RAM_CPUMP_DEB = 1003,
+MLT26X_C_RAM_DCDC_VERR = 1004,
+MLT26X_C_RAM_DCDC_VERR_HYST = 1005,
+MLT26X_C_RAM_DCDC_OITHRESH_LO = 1006,
+MLT26X_C_RAM_DCDC_OITHRESH_HI = 1007,
+MLT26X_C_RAM_HV_BIAS_ONHK = 1008,
+MLT26X_C_RAM_HV_BIAS_OFFHK = 1009,
+MLT26X_C_RAM_UVTHRESH_BIAS = 1010,
+MLT26X_C_RAM_UVTHRESH_SCALE = 1011,
+MLT26X_C_RAM_UVTHRESH_MAX = 1012,
+MLT26X_C_RAM_VBATH_DELTA = 1013,
+MLT26X_C_RAM_UNUSED1014 = 1014,
+MLT26X_C_RAM_VOV_RING_BAT_DCDC = 1015,
+MLT26X_C_RAM_P_OFFLOAD_VBAT_HYST = 1016,
+MLT26X_C_RAM_LKG_LB_OFFSET = 1017,
+MLT26X_C_RAM_LKG_OFHK_OFFSET = 1018,
+MLT26X_C_RAM_UNUSED1019 = 1019,
+MLT26X_C_RAM_UNUSED1020 = 1020,
+MLT26X_C_RAM_UNUSED1021 = 1021,
+MLT26X_C_RAM_DAC_OFFSET = 1280,
+MLT26X_C_RAM_UNUSED_REG280 = 1304,
+MLT26X_C_RAM_ADC_CAL = 1306,
+MLT26X_C_RAM_VOC_DAC = 1311,
+MLT26X_C_RAM_CHAN_ZERO = 1316,
+MLT26X_C_RAM_CHAN_TOG = 1317,
+MLT26X_C_RAM_CHAN_POP = 1318,
+MLT26X_C_RAM_BIAS = 1321,
+MLT26X_C_RAM_SLIC_DIAG_CLR = 1353,
+MLT26X_C_RAM_UNUSED_REG342 = 1366,
+MLT26X_C_RAM_UNUSED_REG343 = 1367,
+MLT26X_C_RAM_UNUSED_REG344 = 1368,
+MLT26X_C_RAM_UNUSED_REG356 = 1380,
+MLT26X_C_RAM_UNUSED_REG360 = 1384,
+MLT26X_C_RAM_UNUSED_REG364 = 1388,
+MLT26X_C_RAM_UNUSED_REG380 = 1404,
+MLT26X_C_RAM_UNUSED_REG381 = 1405,
+MLT26X_C_RAM_UNUSED_REG384 = 1408,
+MLT26X_C_RAM_CAL_HVIC_CNTL = 1409,
+MLT26X_C_RAM_UNUSED_REG401 = 1425,
+MLT26X_C_RAM_UNUSED_REG402 = 1426,
+MLT26X_C_RAM_UNUSED_REG405 = 1429,
+MLT26X_C_RAM_UNUSED_REG407 = 1431,
+MLT26X_C_RAM_UNUSED_REG411 = 1435,
+MLT26X_C_RAM_UNUSED_REG416 = 1440,
+MLT26X_C_RAM_UNUSED_REG421 = 1445,
+MLT26X_C_RAM_UNUSED_REG427 = 1451,
+MLT26X_C_RAM_CAL_DCADC_CNTL = 1455,
+MLT26X_C_RAM_LKG_UPT_OHT = 1464,
+MLT26X_C_RAM_LKG_UPR_OHT = 1465,
+MLT26X_C_RAM_LKG_DNT_OHT = 1466,
+MLT26X_C_RAM_LKG_DNR_OHT = 1467,
+MLT26X_C_RAM_CAL_GPIO0_CTRL = 1470,
+MLT26X_C_RAM_UNUSED_REG460 = 1484,
+MLT26X_C_RAM_OFFLD_DAC = 1485,
+MLT26X_C_RAM_UNUSED_REG470 = 1494,
+MLT26X_C_RAM_UNUSED_REG471 = 1495,
+MLT26X_C_RAM_UNUSED_REG474 = 1498,
+MLT26X_C_RAM_UNUSED_REG476 = 1500,
+MLT26X_C_RAM_UNUSED_REG477 = 1501,
+MLT26X_C_RAM_UNUSED_REG478 = 1502,
+MLT26X_C_RAM_UNUSED_REG479 = 1503,
+MLT26X_C_RAM_UNUSED_REG480 = 1504,
+MLT26X_C_RAM_UNUSED_REG481 = 1505,
+MLT26X_C_RAM_PD_OFFLD_DAC = 1512,
+MLT26X_C_RAM_PD_OFFLD_GM = 1513,
+MLT26X_C_RAM_BATSEL_MAN = 1519,
+MLT26X_C_RAM_HVIC_MAN = 1520,
+MLT26X_C_RAM_UNUSED_REG497 = 1521,
+MLT26X_C_RAM_UNUSED_REG502 = 1526,
+MLT26X_C_RAM_UNUSED_REG505 = 1529,
+MLT26X_C_RAM_UNUSED_REG513 = 1537,
+MLT26X_C_RAM_UNUSED_REG520 = 1544,
+MLT26X_C_RAM_UNUSED_REG525 = 1549,
+MLT26X_C_RAM_UNUSED_REG526 = 1550,
+MLT26X_C_RAM_UNUSED_REG528 = 1552,
+MLT26X_C_RAM_DCDC_CPUMP = 1555,
+MLT26X_C_RAM_UNUSED_REG532 = 1556,
+MLT26X_C_RAM_UNUSED_REG535 = 1559,
+MLT26X_C_RAM_UNUSED_REG538 = 1562,
+MLT26X_C_RAM_UNUSED_REG542 = 1566,
+MLT26X_C_RAM_UNUSED_REG543 = 1567,
+MLT26X_C_RAM_UNUSED_REG548 = 1572,
+MLT26X_C_RAM_UNUSED_REG557 = 1581,
+MLT26X_C_RAM_UNUSED_REG558 = 1582,
+MLT26X_C_RAM_UNUSED_REG569 = 1593,
+MLT26X_C_RAM_UNUSED_REG570 = 1594,
+MLT26X_C_RAM_JMP8 = 1597,
+MLT26X_C_RAM_JMP9 = 1598,
+MLT26X_C_RAM_JMP10 = 1599,
+MLT26X_C_RAM_JMP11 = 1600,
+MLT26X_C_RAM_JMP12 = 1601,
+MLT26X_C_RAM_JMP13 = 1602,
+MLT26X_C_RAM_JMP14 = 1603,
+MLT26X_C_RAM_JMP15 = 1604,
+MLT26X_C_RAM_METER_TRIG = 1605,
+MLT26X_C_RAM_PM_ACTIVE = 1606,
+MLT26X_C_RAM_PM_INACTIVE = 1607,
+MLT26X_C_RAM_HVIC_VERSION = 1608,
+MLT26X_C_RAM_THERM_OFF = 1609,
+MLT26X_C_RAM_THERM_HI = 1610,
+MLT26X_C_RAM_TEST_LOAD = 1611,
+MLT26X_C_RAM_DC_HOLD_MAN = 1612,
+MLT26X_C_RAM_DC_HOLD_DAC_MAN = 1613,
+MLT26X_C_RAM_DCDC_AUXB_INVERT = 1614,
+MLT26X_C_RAM_DCDC_CPUMP_LP = 1615,
+MLT26X_C_RAM_DCDC_CPUMP_LP_MASK = 1616,
+MLT26X_C_RAM_DCDC_CPUMP_PULLDOWN = 1617,
+MLT26X_C_RAM_BOND_STATUS = 1618,
+MLT26X_C_RAM_BOND_MAN = 1619,
+MLT26X_C_RAM_BOND_VAL = 1620,
+MLT26X_C_RAM_CB_MODE_TX = 1621,
+MLT26X_C_RAM_CB_MODE_RX = 1622,
+MLT26X_C_RAM_CB_PD_RX_OPA = 1623,
+MLT26X_C_RAM_CB_PD_HYB_OPA = 1624,
+MLT26X_C_RAM_CB_PD_HYB = 1625,
+MLT26X_C_RAM_CB_GAIN_RX = 1626,
+MLT26X_C_RAM_CB_PREBAL = 1627,
+MLT26X_C_RAM_CB_CB = 1628,
+MLT26X_C_RAM_CB_PD_HYB_CM_BUF = 1629,
+MLT26X_C_RAM_CB_HYB_CHEN_B = 1630,
+MLT26X_C_RAM_CB_VRX_CHEN_B = 1631,
+MLT26X_C_RAM_PLL2_MARGIN = 1632,
+MLT26X_C_RAM_REF_DEBOUNCE_PCLK = 1633,
+MLT26X_C_RAM_REF_DEBOUNCE_FSYNC = 1634,
+MLT26X_C_RAM_DCDC_LIFT_EN = 1635,
+MLT26X_C_RAM_DCDC_CPUMP_PGOOD = 1636,
+MLT26X_C_RAM_DCDC_CPUMP_PGOOD_WKEN = 1637,
+MLT26X_C_RAM_DCDC_CPUMP_PGOOD_FRC = 1638,
+MLT26X_C_RAM_DCDC_CPUMP_LP_MASK_SH = 1639,
+MLT26X_C_RAM_DCDC_UV_MAN = 1640,
+MLT26X_C_RAM_DCDC_UV_DEBOUNCE = 1641,
+MLT26X_C_RAM_DCDC_OV_MAN = 1642,
+MLT26X_C_RAM_DCDC_OV_DEBOUNCE = 1643,
+MLT26X_C_RAM_ANALOG5_TEST_MUX = 1644,
+MLT26X_C_RAM_OFFLD_DAC_MAN = 1645,
+MLT26X_C_RAM_MAILBOX0 = 1646,
+MLT26X_C_RAM_MAILBOX1 = 1647,
+};
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt_comm_regs.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt_comm_regs.h
new file mode 100644
index 0000000..8357eeb
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/mlt_comm_regs.h
@@ -0,0 +1,1297 @@
+/*
+** Copyright (c) 2013 by Silicon Laboratories
+**
+** $Id: mlt_comm_regs.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file mlt_comm_regs.h
+**
+** \brief Register/RAM map abstracted for MLT
+**
+** \author Silicon Laboratories, Inc.
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission
+** from Silicon Laboratories, Inc.
+**
+** This file is auto generated. Do no modify.
+**
+*/
+#ifndef MLT_COMM_REGS_H
+#define MLT_COMM_REGS_H
+
+
+/*
+** MLT_COMM Unique SPI Registers
+*/
+enum MLT_COMM_REG {
+MLT_COMM_REG_ID = 0,
+MLT_COMM_REG_RESET = 1,
+MLT_COMM_REG_MSTREN = 2,
+MLT_COMM_REG_MSTRSTAT = 3,
+MLT_COMM_REG_RAMSTAT = 4,
+MLT_COMM_REG_RAM_ADDR_HI = 5,
+MLT_COMM_REG_RAM_DATA_B0 = 6,
+MLT_COMM_REG_RAM_DATA_B1 = 7,
+MLT_COMM_REG_RAM_DATA_B2 = 8,
+MLT_COMM_REG_RAM_DATA_B3 = 9,
+MLT_COMM_REG_RAM_ADDR_LO = 10,
+MLT_COMM_REG_PCMMODE = 11,
+MLT_COMM_REG_PCMTXLO = 12,
+MLT_COMM_REG_PCMTXHI = 13,
+MLT_COMM_REG_PCMRXLO = 14,
+MLT_COMM_REG_PCMRXHI = 15,
+MLT_COMM_REG_IRQ = 16,
+MLT_COMM_REG_IRQ0 = 17,
+MLT_COMM_REG_IRQ1 = 18,
+MLT_COMM_REG_IRQ2 = 19,
+MLT_COMM_REG_IRQ3 = 20,
+MLT_COMM_REG_IRQ4 = 21,
+MLT_COMM_REG_IRQEN1 = 22,
+MLT_COMM_REG_IRQEN2 = 23,
+MLT_COMM_REG_IRQEN3 = 24,
+MLT_COMM_REG_IRQEN4 = 25,
+MLT_COMM_REG_CALR0 = 26,
+MLT_COMM_REG_CALR1 = 27,
+MLT_COMM_REG_CALR2 = 28,
+MLT_COMM_REG_CALR3 = 29,
+MLT_COMM_REG_LINEFEED = 30,
+MLT_COMM_REG_POLREV = 31,
+MLT_COMM_REG_SPEEDUP_DIS = 32,
+MLT_COMM_REG_SPEEDUP = 33,
+MLT_COMM_REG_LCRRTP = 34,
+MLT_COMM_REG_OFFLOAD = 35,
+MLT_COMM_REG_BATSELMAP = 36,
+MLT_COMM_REG_BATSEL = 37,
+MLT_COMM_REG_RINGCON = 38,
+MLT_COMM_REG_RINGTALO = 39,
+MLT_COMM_REG_RINGTAHI = 40,
+MLT_COMM_REG_RINGTILO = 41,
+MLT_COMM_REG_RINGTIHI = 42,
+MLT_COMM_REG_LOOPBACK = 43,
+MLT_COMM_REG_DIGCON = 44,
+MLT_COMM_REG_RA = 45,
+MLT_COMM_REG_ZCAL_EN = 46,
+MLT_COMM_REG_ENHANCE = 47,
+MLT_COMM_REG_OMODE = 48,
+MLT_COMM_REG_OCON = 49,
+MLT_COMM_REG_O1TALO = 50,
+MLT_COMM_REG_O1TAHI = 51,
+MLT_COMM_REG_O1TILO = 52,
+MLT_COMM_REG_O1TIHI = 53,
+MLT_COMM_REG_O2TALO = 54,
+MLT_COMM_REG_O2TAHI = 55,
+MLT_COMM_REG_O2TILO = 56,
+MLT_COMM_REG_O2TIHI = 57,
+MLT_COMM_REG_FSKDAT = 58,
+MLT_COMM_REG_FSKDEPTH = 59,
+MLT_COMM_REG_TONDTMF = 60,
+MLT_COMM_REG_TONDET = 61,
+MLT_COMM_REG_TONEN = 62,
+MLT_COMM_REG_GCI_CI = 63,
+MLT_COMM_REG_GLOBSTAT1 = 64,
+MLT_COMM_REG_GLOBSTAT2 = 65,
+MLT_COMM_REG_USERSTAT = 66,
+MLT_COMM_REG_GPIO = 67,
+MLT_COMM_REG_GPIO_CFG1 = 68,
+MLT_COMM_REG_GPIO_CFG2 = 69,
+MLT_COMM_REG_GPIO_CFG3 = 70,
+MLT_COMM_REG_DIAG1 = 71,
+MLT_COMM_REG_DIAG2 = 72,
+MLT_COMM_REG_CM_CLAMP = 73,
+MLT_COMM_REG_PMCON = 75,
+MLT_COMM_REG_AUTO = 80,
+MLT_COMM_REG_JMPEN = 81,
+MLT_COMM_REG_JMP0LO = 82,
+MLT_COMM_REG_JMP0HI = 83,
+MLT_COMM_REG_JMP1LO = 84,
+MLT_COMM_REG_JMP1HI = 85,
+MLT_COMM_REG_JMP2LO = 86,
+MLT_COMM_REG_JMP2HI = 87,
+MLT_COMM_REG_JMP3LO = 88,
+MLT_COMM_REG_JMP3HI = 89,
+MLT_COMM_REG_JMP4LO = 90,
+MLT_COMM_REG_JMP4HI = 91,
+MLT_COMM_REG_JMP5LO = 92,
+MLT_COMM_REG_JMP5HI = 93,
+MLT_COMM_REG_JMP6LO = 94,
+MLT_COMM_REG_JMP6HI = 95,
+MLT_COMM_REG_JMP7LO = 96,
+MLT_COMM_REG_JMP7HI = 97,
+MLT_COMM_REG_PDN = 98,
+MLT_COMM_REG_PDN_STAT = 99,
+MLT_COMM_REG_PDN2 = 100,
+MLT_COMM_REG_PDN2_STAT = 101,
+MLT_COMM_REG_M1_OSC_LO = 112,
+MLT_COMM_REG_M1_OSC_HI = 113,
+MLT_COMM_REG_BITCNT_LO = 114,
+MLT_COMM_REG_BITCNT_HI = 115,
+MLT_COMM_REG_PCLK_MULT = 116,
+MLT_COMM_REG_RAM_DATA_16 = 117,
+MLT_COMM_REG_BYPASS_ADDR_LO = 118,
+MLT_COMM_REG_BYPASS_ADDR_HI = 119,
+MLT_COMM_REG_PC_LO = 120,
+MLT_COMM_REG_PC_HI = 121,
+MLT_COMM_REG_PC_SHAD_LO = 122,
+MLT_COMM_REG_PC_SHAD_HI = 123,
+MLT_COMM_REG_PASS_LO = 124,
+MLT_COMM_REG_PASS_HI = 125,
+MLT_COMM_REG_TEST_CNTL = 126,
+MLT_COMM_REG_TEST_MODE = 127,
+};
+
+/*
+** MLT_COMM_RAM
+*/
+enum MLT_COMM_RAM {
+MLT_COMM_RAM_IRNGNG_SENSE = 0,
+MLT_COMM_RAM_MADC_VTIPC = 1,
+MLT_COMM_RAM_MADC_VRINGC = 2,
+MLT_COMM_RAM_MADC_VBAT = 3,
+MLT_COMM_RAM_MADC_VLONG = 4,
+MLT_COMM_RAM_UNUSED5 = 5,
+MLT_COMM_RAM_MADC_VDC = 6,
+MLT_COMM_RAM_MADC_ILONG = 7,
+MLT_COMM_RAM_MADC_ITIP = 8,
+MLT_COMM_RAM_MADC_IRING = 9,
+MLT_COMM_RAM_MADC_ILOOP = 10,
+MLT_COMM_RAM_VDIFF_SENSE = 11,
+MLT_COMM_RAM_VTIP = 12,
+MLT_COMM_RAM_VRING = 13,
+MLT_COMM_RAM_P_Q1_D = 14,
+MLT_COMM_RAM_P_Q1 = 20,
+MLT_COMM_RAM_DIAG_EX1 = 21,
+MLT_COMM_RAM_DIAG_EX2 = 22,
+MLT_COMM_RAM_DIAG_LPF_MADC = 23,
+MLT_COMM_RAM_DIAG_DMM_I = 24,
+MLT_COMM_RAM_DIAG_DMM_V = 25,
+MLT_COMM_RAM_OSC1FREQ = 26,
+MLT_COMM_RAM_OSC1AMP = 27,
+MLT_COMM_RAM_OSC1PHAS = 28,
+MLT_COMM_RAM_OSC2FREQ = 29,
+MLT_COMM_RAM_OSC2AMP = 30,
+MLT_COMM_RAM_OSC2PHAS = 31,
+MLT_COMM_RAM_TESTB0_1 = 32,
+MLT_COMM_RAM_TESTB1_1 = 33,
+MLT_COMM_RAM_TESTB2_1 = 34,
+MLT_COMM_RAM_TESTA1_1 = 35,
+MLT_COMM_RAM_TESTA2_1 = 36,
+MLT_COMM_RAM_TESTB0_2 = 37,
+MLT_COMM_RAM_TESTB1_2 = 38,
+MLT_COMM_RAM_TESTB2_2 = 39,
+MLT_COMM_RAM_TESTA1_2 = 40,
+MLT_COMM_RAM_TESTA2_2 = 41,
+MLT_COMM_RAM_TESTB0_3 = 42,
+MLT_COMM_RAM_TESTB1_3 = 43,
+MLT_COMM_RAM_TESTB2_3 = 44,
+MLT_COMM_RAM_TESTA1_3 = 45,
+MLT_COMM_RAM_TESTA2_3 = 46,
+MLT_COMM_RAM_TESTPKO = 47,
+MLT_COMM_RAM_TESTABO = 48,
+MLT_COMM_RAM_TESTWLN = 49,
+MLT_COMM_RAM_TESTAVBW = 50,
+MLT_COMM_RAM_TESTPKFL = 51,
+MLT_COMM_RAM_TESTAVFL = 52,
+MLT_COMM_RAM_TESTPKTH = 53,
+MLT_COMM_RAM_TESTAVTH = 54,
+MLT_COMM_RAM_DAC_IN_SYNC1 = 55,
+MLT_COMM_RAM_BYPASS_REG = 56,
+MLT_COMM_RAM_LCRMASK_CNT = 57,
+MLT_COMM_RAM_DAC_IN_SYNC = 58,
+MLT_COMM_RAM_TEMP = 59,
+MLT_COMM_RAM_TEMP_ISR = 60,
+MLT_COMM_RAM_P_Q2 = 61,
+MLT_COMM_RAM_P_Q3 = 62,
+MLT_COMM_RAM_P_Q4 = 63,
+MLT_COMM_RAM_P_Q5 = 64,
+MLT_COMM_RAM_P_Q6 = 65,
+MLT_COMM_RAM_ILOOP_FILT = 66,
+MLT_COMM_RAM_ILONG_FILT = 67,
+MLT_COMM_RAM_VBAT_FILT = 68,
+MLT_COMM_RAM_VDIFF_FILT = 69,
+MLT_COMM_RAM_VCM_FILT = 70,
+MLT_COMM_RAM_VBAT_CNT = 71,
+MLT_COMM_RAM_V_VLIM_SCALED = 72,
+MLT_COMM_RAM_V_VLIM_TRACK = 73,
+MLT_COMM_RAM_V_VLIM_MODFEED = 74,
+MLT_COMM_RAM_DIAG_P_OUT = 75,
+MLT_COMM_RAM_DIAG_COUNT = 76,
+MLT_COMM_RAM_ROW0_MAG = 77,
+MLT_COMM_RAM_ROW1_MAG = 78,
+MLT_COMM_RAM_ROW2_MAG = 79,
+MLT_COMM_RAM_ROW3_MAG = 80,
+MLT_COMM_RAM_COL0_MAG = 81,
+MLT_COMM_RAM_COL1_MAG = 82,
+MLT_COMM_RAM_COL2_MAG = 83,
+MLT_COMM_RAM_COL3_MAG = 84,
+MLT_COMM_RAM_ROW0_2ND_Y1 = 85,
+MLT_COMM_RAM_ROW1_2ND_Y1 = 86,
+MLT_COMM_RAM_ROW2_2ND_Y1 = 87,
+MLT_COMM_RAM_ROW3_2ND_Y1 = 88,
+MLT_COMM_RAM_COL0_2ND_Y1 = 89,
+MLT_COMM_RAM_COL1_2ND_Y1 = 90,
+MLT_COMM_RAM_COL2_2ND_Y1 = 91,
+MLT_COMM_RAM_COL3_2ND_Y1 = 92,
+MLT_COMM_RAM_ROW0_2ND_Y2 = 93,
+MLT_COMM_RAM_ROW1_2ND_Y2 = 94,
+MLT_COMM_RAM_ROW2_2ND_Y2 = 95,
+MLT_COMM_RAM_ROW3_2ND_Y2 = 96,
+MLT_COMM_RAM_COL0_2ND_Y2 = 97,
+MLT_COMM_RAM_COL1_2ND_Y2 = 98,
+MLT_COMM_RAM_COL2_2ND_Y2 = 99,
+MLT_COMM_RAM_COL3_2ND_Y2 = 100,
+MLT_COMM_RAM_DTMF_IN = 101,
+MLT_COMM_RAM_DTMFDTF_D2_1 = 102,
+MLT_COMM_RAM_DTMFDTF_D1_1 = 103,
+MLT_COMM_RAM_DTMFDTF_OUT_1 = 104,
+MLT_COMM_RAM_DTMFDTF_D2_2 = 105,
+MLT_COMM_RAM_DTMFDTF_D1_2 = 106,
+MLT_COMM_RAM_DTMFDTF_OUT_2 = 107,
+MLT_COMM_RAM_DTMFDTF_D2_3 = 108,
+MLT_COMM_RAM_DTMFDTF_D1_3 = 109,
+MLT_COMM_RAM_DTMFDTF_OUT_3 = 110,
+MLT_COMM_RAM_DTMFDTF_OUT = 111,
+MLT_COMM_RAM_DTMFLPF_D2_1 = 112,
+MLT_COMM_RAM_DTMFLPF_D1_1 = 113,
+MLT_COMM_RAM_DTMFLPF_OUT_1 = 114,
+MLT_COMM_RAM_DTMFLPF_D2_2 = 115,
+MLT_COMM_RAM_DTMFLPF_D1_2 = 116,
+MLT_COMM_RAM_DTMFLPF_OUT_2 = 117,
+MLT_COMM_RAM_DTMF_ROW = 118,
+MLT_COMM_RAM_DTMFHPF_D2_1 = 119,
+MLT_COMM_RAM_DTMFHPF_D1_1 = 120,
+MLT_COMM_RAM_DTMFHPF_OUT_1 = 121,
+MLT_COMM_RAM_DTMFHPF_D2_2 = 122,
+MLT_COMM_RAM_DTMFHPF_D1_2 = 123,
+MLT_COMM_RAM_DTMFHPF_OUT_2 = 124,
+MLT_COMM_RAM_DTMF_COL = 125,
+MLT_COMM_RAM_ROW_POWER = 126,
+MLT_COMM_RAM_COL_POWER = 127,
+MLT_COMM_RAM_GP_TIMER = 128,
+MLT_COMM_RAM_SPR_INTERP_DIF = 129,
+MLT_COMM_RAM_SPR_INTERP_DIF_OUT = 130,
+MLT_COMM_RAM_SPR_INTERP_INT = 131,
+MLT_COMM_RAM_SPR_CNT = 132,
+MLT_COMM_RAM_ROW0_Y1 = 133,
+MLT_COMM_RAM_ROW0_Y2 = 134,
+MLT_COMM_RAM_ROW1_Y1 = 135,
+MLT_COMM_RAM_ROW1_Y2 = 136,
+MLT_COMM_RAM_ROW2_Y1 = 137,
+MLT_COMM_RAM_ROW2_Y2 = 138,
+MLT_COMM_RAM_ROW3_Y1 = 139,
+MLT_COMM_RAM_ROW3_Y2 = 140,
+MLT_COMM_RAM_COL0_Y1 = 141,
+MLT_COMM_RAM_COL0_Y2 = 142,
+MLT_COMM_RAM_COL1_Y1 = 143,
+MLT_COMM_RAM_COL1_Y2 = 144,
+MLT_COMM_RAM_COL2_Y1 = 145,
+MLT_COMM_RAM_COL2_Y2 = 146,
+MLT_COMM_RAM_COL3_Y1 = 147,
+MLT_COMM_RAM_COL3_Y2 = 148,
+MLT_COMM_RAM_ROWMAX_MAG = 149,
+MLT_COMM_RAM_COLMAX_MAG = 150,
+MLT_COMM_RAM_ROW0_2ND_MAG = 151,
+MLT_COMM_RAM_COL0_2ND_MAG = 152,
+MLT_COMM_RAM_ROW_THR = 153,
+MLT_COMM_RAM_COL_THR = 154,
+MLT_COMM_RAM_OSC1_Y = 155,
+MLT_COMM_RAM_OSC2_Y = 156,
+MLT_COMM_RAM_OSC1_X = 157,
+MLT_COMM_RAM_OSC1_COEFF = 158,
+MLT_COMM_RAM_OSC2_X = 159,
+MLT_COMM_RAM_OSC2_COEFF = 160,
+MLT_COMM_RAM_RXACIIR_D2_1 = 161,
+MLT_COMM_RAM_RXACIIR_OUT_1 = 162,
+MLT_COMM_RAM_RXACIIR_D2_2 = 163,
+MLT_COMM_RAM_RXACIIR_D1_2 = 164,
+MLT_COMM_RAM_RXACIIR_OUT_2 = 165,
+MLT_COMM_RAM_RXACIIR_D2_3 = 166,
+MLT_COMM_RAM_RXACIIR_D1_3 = 167,
+MLT_COMM_RAM_RXACIIR_OUT = 168,
+MLT_COMM_RAM_RXACIIR_OUT_3 = 169,
+MLT_COMM_RAM_TXACCOMB_D1 = 170,
+MLT_COMM_RAM_TXACCOMB_D2 = 171,
+MLT_COMM_RAM_TXACCOMB_D3 = 172,
+MLT_COMM_RAM_TXACSINC_OUT = 173,
+MLT_COMM_RAM_TXACHPF_D1_2 = 174,
+MLT_COMM_RAM_TXACHPF_D2_1 = 175,
+MLT_COMM_RAM_TXACHPF_D2_2 = 176,
+MLT_COMM_RAM_TXACHPF_OUT = 177,
+MLT_COMM_RAM_TXACHPF_OUT_1 = 178,
+MLT_COMM_RAM_TXACHPF_OUT_2 = 179,
+MLT_COMM_RAM_TXACIIR_D2_1 = 180,
+MLT_COMM_RAM_TXACIIR_OUT_1 = 181,
+MLT_COMM_RAM_TXACIIR_D2_2 = 182,
+MLT_COMM_RAM_TXACIIR_D1_2 = 183,
+MLT_COMM_RAM_TXACIIR_OUT_2 = 184,
+MLT_COMM_RAM_TXACIIR_D2_3 = 185,
+MLT_COMM_RAM_TXACIIR_D1_3 = 186,
+MLT_COMM_RAM_TXACIIR_OUT_3 = 187,
+MLT_COMM_RAM_TXACIIR_OUT = 188,
+MLT_COMM_RAM_ECIIR_D1 = 189,
+MLT_COMM_RAM_ECIIR_D2 = 190,
+MLT_COMM_RAM_EC_DELAY1 = 191,
+MLT_COMM_RAM_EC_DELAY2 = 192,
+MLT_COMM_RAM_EC_DELAY3 = 193,
+MLT_COMM_RAM_EC_DELAY4 = 194,
+MLT_COMM_RAM_EC_DELAY5 = 195,
+MLT_COMM_RAM_EC_DELAY6 = 196,
+MLT_COMM_RAM_EC_DELAY7 = 197,
+MLT_COMM_RAM_EC_DELAY8 = 198,
+MLT_COMM_RAM_EC_DELAY9 = 199,
+MLT_COMM_RAM_EC_DELAY10 = 200,
+MLT_COMM_RAM_EC_DELAY11 = 201,
+MLT_COMM_RAM_ECHO_EST = 202,
+MLT_COMM_RAM_EC_OUT = 203,
+MLT_COMM_RAM_TESTFILT_OUT_1 = 204,
+MLT_COMM_RAM_TESTFILT_D1_1 = 205,
+MLT_COMM_RAM_TESTFILT_D2_1 = 206,
+MLT_COMM_RAM_TESTFILT_OUT_2 = 207,
+MLT_COMM_RAM_TESTFILT_D1_2 = 208,
+MLT_COMM_RAM_TESTFILT_D2_2 = 209,
+MLT_COMM_RAM_TESTFILT_OUT_3 = 210,
+MLT_COMM_RAM_TESTFILT_D1_3 = 211,
+MLT_COMM_RAM_TESTFILT_D2_3 = 212,
+MLT_COMM_RAM_TESTFILT_PEAK = 213,
+MLT_COMM_RAM_TESTFILT_ABS = 214,
+MLT_COMM_RAM_TESTFILT_MEANACC = 215,
+MLT_COMM_RAM_TESTFILT_COUNT = 216,
+MLT_COMM_RAM_TESTFILT_NO_OFFSET = 217,
+MLT_COMM_RAM_RING_X = 218,
+MLT_COMM_RAM_RING_Y = 219,
+MLT_COMM_RAM_RING_INT = 220,
+MLT_COMM_RAM_RING_Y_D1 = 221,
+MLT_COMM_RAM_RING_DIFF = 222,
+MLT_COMM_RAM_RING_DELTA = 223,
+MLT_COMM_RAM_WTCHDOG_CNT = 224,
+MLT_COMM_RAM_RING_WAVE = 225,
+MLT_COMM_RAM_UNUSED226 = 226,
+MLT_COMM_RAM_ONEKHZ_COUNT = 227,
+MLT_COMM_RAM_TX2100_Y1 = 228,
+MLT_COMM_RAM_TX2100_Y2 = 229,
+MLT_COMM_RAM_TX2100_MAG = 230,
+MLT_COMM_RAM_RX2100_Y1 = 231,
+MLT_COMM_RAM_RX2100_Y2 = 232,
+MLT_COMM_RAM_RX2100_MAG = 233,
+MLT_COMM_RAM_TX2100_POWER = 234,
+MLT_COMM_RAM_RX2100_POWER = 235,
+MLT_COMM_RAM_TX2100_IN = 236,
+MLT_COMM_RAM_RX2100_IN = 237,
+MLT_COMM_RAM_RINGTRIP_COUNT = 238,
+MLT_COMM_RAM_RINGTRIP_DC1 = 239,
+MLT_COMM_RAM_RINGTRIP_DC2 = 240,
+MLT_COMM_RAM_RINGTRIP_AC1 = 241,
+MLT_COMM_RAM_RINGTRIP_AC2 = 242,
+MLT_COMM_RAM_RINGTRIP_AC_COUNT = 243,
+MLT_COMM_RAM_RINGTRIP_DC_COUNT = 244,
+MLT_COMM_RAM_RINGTRIP_AC_RESULT = 245,
+MLT_COMM_RAM_RINGTRIP_DC_RESULT = 246,
+MLT_COMM_RAM_RINGTRIP_ABS = 247,
+MLT_COMM_RAM_TXACEQ_OUT = 248,
+MLT_COMM_RAM_LCR_DBI_CNT = 249,
+MLT_COMM_RAM_BAT_DBI_CNT = 250,
+MLT_COMM_RAM_LONG_DBI_CNT = 251,
+MLT_COMM_RAM_TXACEQ_DELAY3 = 252,
+MLT_COMM_RAM_TXACEQ_DELAY2 = 253,
+MLT_COMM_RAM_TXACEQ_DELAY1 = 254,
+MLT_COMM_RAM_RXACEQ_DELAY3 = 255,
+MLT_COMM_RAM_RXACEQ_DELAY2 = 256,
+MLT_COMM_RAM_RXACEQ_DELAY1 = 257,
+MLT_COMM_RAM_RXACEQ_IN = 258,
+MLT_COMM_RAM_TXDCCOMB_D1 = 259,
+MLT_COMM_RAM_TXDCCOMB_D2 = 260,
+MLT_COMM_RAM_TXDCSINC_OUT = 261,
+MLT_COMM_RAM_RXACDIFF_D1 = 262,
+MLT_COMM_RAM_DC_NOTCH_1 = 263,
+MLT_COMM_RAM_DC_NOTCH_2 = 264,
+MLT_COMM_RAM_DC_NOTCH_OUT = 265,
+MLT_COMM_RAM_DC_NOTCH_SCALED = 266,
+MLT_COMM_RAM_V_FEED_IN = 267,
+MLT_COMM_RAM_I_TAR = 268,
+MLT_COMM_RAM_CONST_VLIM = 269,
+MLT_COMM_RAM_UNITY = 270,
+MLT_COMM_RAM_TXACNOTCH_1 = 271,
+MLT_COMM_RAM_TXACNOTCH_2 = 272,
+MLT_COMM_RAM_TXACNOTCH_OUT = 273,
+MLT_COMM_RAM_ZSYNTH_1 = 274,
+MLT_COMM_RAM_ZSYNTH_2 = 275,
+MLT_COMM_RAM_ZSYNTH_OUT_1 = 276,
+MLT_COMM_RAM_TXACD2_1_0 = 277,
+MLT_COMM_RAM_TXACD2_1_1 = 278,
+MLT_COMM_RAM_TXACD2_1_2 = 279,
+MLT_COMM_RAM_TXACD2_1_3 = 280,
+MLT_COMM_RAM_TXACD2_1_4 = 281,
+MLT_COMM_RAM_TXACD2_1_5 = 282,
+MLT_COMM_RAM_TXACD2_1_OUT = 283,
+MLT_COMM_RAM_TXACD2_2_0 = 284,
+MLT_COMM_RAM_TXACD2_2_1 = 285,
+MLT_COMM_RAM_TXACD2_2_2 = 286,
+MLT_COMM_RAM_TXACD2_2_3 = 287,
+MLT_COMM_RAM_TXACD2_2_4 = 288,
+MLT_COMM_RAM_TXACD2_2_5 = 289,
+MLT_COMM_RAM_TXACD2_2_OUT = 290,
+MLT_COMM_RAM_TXACD2_3_0 = 291,
+MLT_COMM_RAM_TXACD2_3_1 = 292,
+MLT_COMM_RAM_TXACD2_3_2 = 293,
+MLT_COMM_RAM_TXACD2_3_3 = 294,
+MLT_COMM_RAM_TXACD2_3_4 = 295,
+MLT_COMM_RAM_TXACD2_3_5 = 296,
+MLT_COMM_RAM_TXACD2_3_OUT = 297,
+MLT_COMM_RAM_RXACI2_1_1 = 298,
+MLT_COMM_RAM_RXACI2_1_2 = 299,
+MLT_COMM_RAM_RXACI2_1_3 = 300,
+MLT_COMM_RAM_RXACI2_1_4 = 301,
+MLT_COMM_RAM_RXACI2_1_OUT = 302,
+MLT_COMM_RAM_RXACI2_2_1 = 303,
+MLT_COMM_RAM_RXACI2_2_2 = 304,
+MLT_COMM_RAM_RXACI2_2_3 = 305,
+MLT_COMM_RAM_RXACI2_2_4 = 306,
+MLT_COMM_RAM_RXACI2_2_OUT = 307,
+MLT_COMM_RAM_RXACI2_3_1 = 308,
+MLT_COMM_RAM_RXACI2_3_2 = 309,
+MLT_COMM_RAM_RXACI2_3_3 = 310,
+MLT_COMM_RAM_RXACI2_3_4 = 311,
+MLT_COMM_RAM_RXACI2_3_OUT = 312,
+MLT_COMM_RAM_TXACCOMP1 = 313,
+MLT_COMM_RAM_TXACCOMP_OUT = 314,
+MLT_COMM_RAM_RXACCOMP1 = 315,
+MLT_COMM_RAM_RXACCOMP_OUT = 316,
+MLT_COMM_RAM_RXACHPF_D1_2 = 317,
+MLT_COMM_RAM_RXACHPF_D2_1 = 318,
+MLT_COMM_RAM_RXACHPF_D2_2 = 319,
+MLT_COMM_RAM_RXACHPF_OUT = 320,
+MLT_COMM_RAM_RXACHPF_OUT_1 = 321,
+MLT_COMM_RAM_RXACHPF_OUT_2 = 322,
+MLT_COMM_RAM_RXACEQ_OUT = 323,
+MLT_COMM_RAM_METER_I_1 = 324,
+MLT_COMM_RAM_METER_I_OUT = 325,
+MLT_COMM_RAM_METER_LPF_1 = 326,
+MLT_COMM_RAM_METER_LPF_2 = 327,
+MLT_COMM_RAM_METER_BP_1 = 329,
+MLT_COMM_RAM_METER_BP_2 = 330,
+MLT_COMM_RAM_METER_BP_OUT = 331,
+MLT_COMM_RAM_METER_SRC_OUT = 332,
+MLT_COMM_RAM_RING_LPF_1 = 335,
+MLT_COMM_RAM_RING_LPF_2 = 336,
+MLT_COMM_RAM_RING_LPF_OUT = 337,
+MLT_COMM_RAM_RING_INTERP_DIFF = 338,
+MLT_COMM_RAM_RING_INTERP_DIFF_OUT = 339,
+MLT_COMM_RAM_RING_INTERP_INT = 340,
+MLT_COMM_RAM_RING_INTERP_INT_OUT = 341,
+MLT_COMM_RAM_V_ILIM_TRACK = 342,
+MLT_COMM_RAM_V_RFEED_TRACK = 343,
+MLT_COMM_RAM_LF_SPEEDUP_CNT = 344,
+MLT_COMM_RAM_DC_SPEEDUP_CNT = 345,
+MLT_COMM_RAM_AC_SPEEDUP_CNT = 346,
+MLT_COMM_RAM_LCR_SPEEDUP_CNT = 347,
+MLT_COMM_RAM_CM_SPEEDUP_CNT = 348,
+MLT_COMM_RAM_DC_SPEEDUP_MASK = 349,
+MLT_COMM_RAM_ZSYNTH_IN = 350,
+MLT_COMM_RAM_I_TAR_SAVE = 351,
+MLT_COMM_RAM_UNUSED352 = 352,
+MLT_COMM_RAM_UNUSED353 = 353,
+MLT_COMM_RAM_COUNTER_VTR = 354,
+MLT_COMM_RAM_I_RING_AVG = 355,
+MLT_COMM_RAM_COUNTER_IRING = 356,
+MLT_COMM_RAM_COMP_RATIO = 357,
+MLT_COMM_RAM_MADC_VBAT_DIV2 = 358,
+MLT_COMM_RAM_VDIFF_PK_T = 359,
+MLT_COMM_RAM_PEAK_CNT = 360,
+MLT_COMM_RAM_CM_DBI_CNT = 361,
+MLT_COMM_RAM_VCM_LAST = 362,
+MLT_COMM_RAM_VBATL_SENSE = 363,
+MLT_COMM_RAM_VBATH_SENSE = 364,
+MLT_COMM_RAM_VBATR_SENSE = 365,
+MLT_COMM_RAM_BAT_SETTLE_CNT = 366,
+MLT_COMM_RAM_VBAT_TGT = 367,
+MLT_COMM_RAM_VBAT_REQ = 368,
+MLT_COMM_RAM_VCM_HIRES = 369,
+MLT_COMM_RAM_VCM_LORES = 370,
+MLT_COMM_RAM_ILOOP1 = 371,
+MLT_COMM_RAM_ILONG2 = 372,
+MLT_COMM_RAM_ITIP1 = 373,
+MLT_COMM_RAM_IRING1 = 374,
+MLT_COMM_RAM_CAL_TEMP1 = 375,
+MLT_COMM_RAM_CAL_TEMP2 = 376,
+MLT_COMM_RAM_CAL_TEMP3 = 377,
+MLT_COMM_RAM_CAL_TEMP4 = 378,
+MLT_COMM_RAM_CAL_TEMP5 = 379,
+MLT_COMM_RAM_CAL_TEMP6 = 380,
+MLT_COMM_RAM_CAL_TEMP7 = 381,
+MLT_COMM_RAM_CMRR_DIVISOR = 382,
+MLT_COMM_RAM_CMRR_REMAINDER = 383,
+MLT_COMM_RAM_CMRR_Q_PTR = 384,
+MLT_COMM_RAM_CAL_ONHK_Z = 393,
+MLT_COMM_RAM_CAL_LB_SETTLE = 394,
+MLT_COMM_RAM_CAL_DECLPF_V0 = 395,
+MLT_COMM_RAM_CAL_DECLPF_V1 = 396,
+MLT_COMM_RAM_CAL_DECLPF_V2 = 397,
+MLT_COMM_RAM_CAL_GOERTZEL_V0 = 398,
+MLT_COMM_RAM_CAL_GOERTZEL_V1 = 399,
+MLT_COMM_RAM_CAL_DECLPF_Y = 400,
+MLT_COMM_RAM_CAL_GOERTZEL_Y = 401,
+MLT_COMM_RAM_P_HVIC = 402,
+MLT_COMM_RAM_VBATL_MIRROR = 403,
+MLT_COMM_RAM_VBATH_MIRROR = 404,
+MLT_COMM_RAM_VBATR_MIRROR = 405,
+MLT_COMM_RAM_DIAG_EX1_OUT = 406,
+MLT_COMM_RAM_DIAG_EX2_OUT = 407,
+MLT_COMM_RAM_DIAG_DMM_V_OUT = 408,
+MLT_COMM_RAM_DIAG_DMM_I_OUT = 409,
+MLT_COMM_RAM_DIAG_P = 410,
+MLT_COMM_RAM_DIAG_LPF_V = 411,
+MLT_COMM_RAM_DIAG_LPF_I = 412,
+MLT_COMM_RAM_DIAG_TONE_FLAG = 413,
+MLT_COMM_RAM_ILOOP1_LAST = 414,
+MLT_COMM_RAM_RING_ENTRY_VOC = 415,
+MLT_COMM_RAM_OSC1_X_SAVE = 417,
+MLT_COMM_RAM_EZSYNTH_1 = 418,
+MLT_COMM_RAM_EZSYNTH_2 = 419,
+MLT_COMM_RAM_ZSYNTH_OUT = 420,
+MLT_COMM_RAM_UNUSED421 = 421,
+MLT_COMM_RAM_CAL_SUBSTATE = 422,
+MLT_COMM_RAM_DIAG_EX1_DC_OUT = 423,
+MLT_COMM_RAM_DIAG_EX1_DC = 424,
+MLT_COMM_RAM_EZSYNTH_B1 = 425,
+MLT_COMM_RAM_EZSYNTH_B2 = 426,
+MLT_COMM_RAM_EZSYNTH_A1 = 427,
+MLT_COMM_RAM_EZSYNTH_A2 = 428,
+MLT_COMM_RAM_ILOOP1_FILT = 429,
+MLT_COMM_RAM_AC_PU_DELTA1_CNT = 430,
+MLT_COMM_RAM_AC_PU_DELTA2_CNT = 431,
+MLT_COMM_RAM_UNUSED432 = 432,
+MLT_COMM_RAM_UNUSED433 = 433,
+MLT_COMM_RAM_UNUSED434 = 434,
+MLT_COMM_RAM_AC_DAC_GAIN_SAVE = 435,
+MLT_COMM_RAM_RING_FLUSH_CNT = 436,
+MLT_COMM_RAM_UNUSED437 = 437,
+MLT_COMM_RAM_DIAG_VAR_OUT = 438,
+MLT_COMM_RAM_I_VBAT = 439,
+MLT_COMM_RAM_CALTMP_LOOPCNT = 441,
+MLT_COMM_RAM_CALTMP_LOOPINC = 442,
+MLT_COMM_RAM_CALTMP_CODEINC = 444,
+MLT_COMM_RAM_CALTMP_TAUINC = 445,
+MLT_COMM_RAM_CALTMP_TAU = 446,
+MLT_COMM_RAM_CAL_TEMP8 = 447,
+MLT_COMM_RAM_PATCHID = 448,
+MLT_COMM_RAM_UNUSED449 = 449,
+MLT_COMM_RAM_UNUSED450 = 450,
+MLT_COMM_RAM_UNUSED451 = 451,
+MLT_COMM_RAM_CAL_LB_OFFSET_FWD = 452,
+MLT_COMM_RAM_CAL_LB_OFFSET_RVS = 453,
+MLT_COMM_RAM_COUNT_SPEEDUP = 454,
+MLT_COMM_RAM_SWEEP_COUNT = 455,
+MLT_COMM_RAM_AMP_RAMP = 456,
+MLT_COMM_RAM_DIAG_LPF_MADC_D = 457,
+MLT_COMM_RAM_DIAG_HPF_MADC = 458,
+MLT_COMM_RAM_TXDEC_OUT = 460,
+MLT_COMM_RAM_TXDEC_D1 = 461,
+MLT_COMM_RAM_TXDEC_D2 = 462,
+MLT_COMM_RAM_RXDEC_D1 = 463,
+MLT_COMM_RAM_RXDEC_D2 = 464,
+MLT_COMM_RAM_OSCINT1_D2_1 = 465,
+MLT_COMM_RAM_OSCINT1_D1_1 = 466,
+MLT_COMM_RAM_OSCINT1_OUT_1 = 467,
+MLT_COMM_RAM_OSCINT1_D2_2 = 468,
+MLT_COMM_RAM_OSCINT1_D1_2 = 469,
+MLT_COMM_RAM_OSCINT1_OUT = 470,
+MLT_COMM_RAM_OSCINT2_D2_1 = 471,
+MLT_COMM_RAM_OSCINT2_D1_1 = 472,
+MLT_COMM_RAM_OSCINT2_OUT_1 = 473,
+MLT_COMM_RAM_OSCINT2_D2_2 = 474,
+MLT_COMM_RAM_OSCINT2_D1_2 = 475,
+MLT_COMM_RAM_OSCINT2_OUT = 476,
+MLT_COMM_RAM_OSC1_Y_SAVE = 477,
+MLT_COMM_RAM_OSC2_Y_SAVE = 478,
+MLT_COMM_RAM_PWRSAVE_CNT = 479,
+MLT_COMM_RAM_VBATR_PK = 480,
+MLT_COMM_RAM_SPEEDUP_MASK_CNT = 481,
+MLT_COMM_RAM_VCM_RING_FIXED = 482,
+MLT_COMM_RAM_DELTA_VCM = 483,
+MLT_COMM_RAM_MADC_VTIPC_DIAG_OS = 484,
+MLT_COMM_RAM_MADC_VRINGC_DIAG_OS = 485,
+MLT_COMM_RAM_MADC_VLONG_DIAG_OS = 486,
+MLT_COMM_RAM_PWRSAVE_DBI_CNT = 492,
+MLT_COMM_RAM_COMP_RATIO_SAVE = 493,
+MLT_COMM_RAM_CAL_TEMP9 = 494,
+MLT_COMM_RAM_CAL_TEMP10 = 495,
+MLT_COMM_RAM_DAC_OFFSET_TEMP = 496,
+MLT_COMM_RAM_CAL_DAC_CODE = 497,
+MLT_COMM_RAM_DCDAC_OFFSET = 498,
+MLT_COMM_RAM_VDIFF_COARSE = 499,
+MLT_COMM_RAM_RXACIIR_OUT_4 = 500,
+MLT_COMM_RAM_UNUSED511 = 511,
+MLT_COMM_RAM_MINUS_ONE = 512,
+MLT_COMM_RAM_ILOOPLPF = 513,
+MLT_COMM_RAM_ILONGLPF = 514,
+MLT_COMM_RAM_BATLPF = 515,
+MLT_COMM_RAM_VDIFFLPF = 516,
+MLT_COMM_RAM_VCMLPF = 517,
+MLT_COMM_RAM_TXACIIR_B0_1 = 518,
+MLT_COMM_RAM_TXACIIR_B1_1 = 519,
+MLT_COMM_RAM_TXACIIR_A1_1 = 520,
+MLT_COMM_RAM_TXACIIR_B0_2 = 521,
+MLT_COMM_RAM_TXACIIR_B1_2 = 522,
+MLT_COMM_RAM_TXACIIR_B2_2 = 523,
+MLT_COMM_RAM_TXACIIR_A1_2 = 524,
+MLT_COMM_RAM_TXACIIR_A2_2 = 525,
+MLT_COMM_RAM_TXACIIR_B0_3 = 526,
+MLT_COMM_RAM_TXACIIR_B1_3 = 527,
+MLT_COMM_RAM_TXACIIR_B2_3 = 528,
+MLT_COMM_RAM_TXACIIR_A1_3 = 529,
+MLT_COMM_RAM_TXACIIR_A2_3 = 530,
+MLT_COMM_RAM_TXACHPF_B0_1 = 531,
+MLT_COMM_RAM_TXACHPF_B1_1 = 532,
+MLT_COMM_RAM_TXACHPF_A1_1 = 533,
+MLT_COMM_RAM_TXACHPF_B0_2 = 534,
+MLT_COMM_RAM_TXACHPF_B1_2 = 535,
+MLT_COMM_RAM_TXACHPF_B2_2 = 536,
+MLT_COMM_RAM_TXACHPF_A1_2 = 537,
+MLT_COMM_RAM_TXACHPF_A2_2 = 538,
+MLT_COMM_RAM_TXACHPF_GAIN = 539,
+MLT_COMM_RAM_TXACEQ_C0 = 540,
+MLT_COMM_RAM_TXACEQ_C1 = 541,
+MLT_COMM_RAM_TXACEQ_C2 = 542,
+MLT_COMM_RAM_TXACEQ_C3 = 543,
+MLT_COMM_RAM_TXACGAIN = 544,
+MLT_COMM_RAM_RXACGAIN = 545,
+MLT_COMM_RAM_RXACEQ_C0 = 546,
+MLT_COMM_RAM_RXACEQ_C1 = 547,
+MLT_COMM_RAM_RXACEQ_C2 = 548,
+MLT_COMM_RAM_RXACEQ_C3 = 549,
+MLT_COMM_RAM_RXACIIR_B0_1 = 550,
+MLT_COMM_RAM_RXACIIR_B1_1 = 551,
+MLT_COMM_RAM_RXACIIR_A1_1 = 552,
+MLT_COMM_RAM_RXACIIR_B0_2 = 553,
+MLT_COMM_RAM_RXACIIR_B1_2 = 554,
+MLT_COMM_RAM_RXACIIR_B2_2 = 555,
+MLT_COMM_RAM_RXACIIR_A1_2 = 556,
+MLT_COMM_RAM_RXACIIR_A2_2 = 557,
+MLT_COMM_RAM_RXACIIR_B0_3 = 558,
+MLT_COMM_RAM_RXACIIR_B1_3 = 559,
+MLT_COMM_RAM_RXACIIR_B2_3 = 560,
+MLT_COMM_RAM_RXACIIR_A1_3 = 561,
+MLT_COMM_RAM_RXACIIR_A2_3 = 562,
+MLT_COMM_RAM_ECFIR_C2 = 563,
+MLT_COMM_RAM_ECFIR_C3 = 564,
+MLT_COMM_RAM_ECFIR_C4 = 565,
+MLT_COMM_RAM_ECFIR_C5 = 566,
+MLT_COMM_RAM_ECFIR_C6 = 567,
+MLT_COMM_RAM_ECFIR_C7 = 568,
+MLT_COMM_RAM_ECFIR_C8 = 569,
+MLT_COMM_RAM_ECFIR_C9 = 570,
+MLT_COMM_RAM_ECIIR_B0 = 571,
+MLT_COMM_RAM_ECIIR_B1 = 572,
+MLT_COMM_RAM_ECIIR_A1 = 573,
+MLT_COMM_RAM_ECIIR_A2 = 574,
+MLT_COMM_RAM_DTMFDTF_B0_1 = 575,
+MLT_COMM_RAM_DTMFDTF_B1_1 = 576,
+MLT_COMM_RAM_DTMFDTF_B2_1 = 577,
+MLT_COMM_RAM_DTMFDTF_A1_1 = 578,
+MLT_COMM_RAM_DTMFDTF_A2_1 = 579,
+MLT_COMM_RAM_DTMFDTF_B0_2 = 580,
+MLT_COMM_RAM_DTMFDTF_B1_2 = 581,
+MLT_COMM_RAM_DTMFDTF_B2_2 = 582,
+MLT_COMM_RAM_DTMFDTF_A1_2 = 583,
+MLT_COMM_RAM_DTMFDTF_A2_2 = 584,
+MLT_COMM_RAM_DTMFDTF_B0_3 = 585,
+MLT_COMM_RAM_DTMFDTF_B1_3 = 586,
+MLT_COMM_RAM_DTMFDTF_B2_3 = 587,
+MLT_COMM_RAM_DTMFDTF_A1_3 = 588,
+MLT_COMM_RAM_DTMFDTF_A2_3 = 589,
+MLT_COMM_RAM_DTMFDTF_GAIN = 590,
+MLT_COMM_RAM_DTMFLPF_B0_1 = 591,
+MLT_COMM_RAM_DTMFLPF_B1_1 = 592,
+MLT_COMM_RAM_DTMFLPF_B2_1 = 593,
+MLT_COMM_RAM_DTMFLPF_A1_1 = 594,
+MLT_COMM_RAM_DTMFLPF_A2_1 = 595,
+MLT_COMM_RAM_DTMFLPF_B0_2 = 596,
+MLT_COMM_RAM_DTMFLPF_B1_2 = 597,
+MLT_COMM_RAM_DTMFLPF_B2_2 = 598,
+MLT_COMM_RAM_DTMFLPF_A1_2 = 599,
+MLT_COMM_RAM_DTMFLPF_A2_2 = 600,
+MLT_COMM_RAM_DTMFLPF_GAIN = 601,
+MLT_COMM_RAM_DTMFHPF_B0_1 = 602,
+MLT_COMM_RAM_DTMFHPF_B1_1 = 603,
+MLT_COMM_RAM_DTMFHPF_B2_1 = 604,
+MLT_COMM_RAM_DTMFHPF_A1_1 = 605,
+MLT_COMM_RAM_DTMFHPF_A2_1 = 606,
+MLT_COMM_RAM_DTMFHPF_B0_2 = 607,
+MLT_COMM_RAM_DTMFHPF_B1_2 = 608,
+MLT_COMM_RAM_DTMFHPF_B2_2 = 609,
+MLT_COMM_RAM_DTMFHPF_A1_2 = 610,
+MLT_COMM_RAM_DTMFHPF_A2_2 = 611,
+MLT_COMM_RAM_DTMFHPF_GAIN = 612,
+MLT_COMM_RAM_POWER_GAIN = 613,
+MLT_COMM_RAM_GOERTZEL_GAIN = 614,
+MLT_COMM_RAM_MODEM_GAIN = 615,
+MLT_COMM_RAM_HOTBIT1 = 616,
+MLT_COMM_RAM_HOTBIT0 = 617,
+MLT_COMM_RAM_ROW0_C1 = 618,
+MLT_COMM_RAM_ROW1_C1 = 619,
+MLT_COMM_RAM_ROW2_C1 = 620,
+MLT_COMM_RAM_ROW3_C1 = 621,
+MLT_COMM_RAM_COL0_C1 = 622,
+MLT_COMM_RAM_COL1_C1 = 623,
+MLT_COMM_RAM_COL2_C1 = 624,
+MLT_COMM_RAM_COL3_C1 = 625,
+MLT_COMM_RAM_ROW0_C2 = 626,
+MLT_COMM_RAM_ROW1_C2 = 627,
+MLT_COMM_RAM_ROW2_C2 = 628,
+MLT_COMM_RAM_ROW3_C2 = 629,
+MLT_COMM_RAM_COL0_C2 = 630,
+MLT_COMM_RAM_COL1_C2 = 631,
+MLT_COMM_RAM_COL2_C2 = 632,
+MLT_COMM_RAM_COL3_C2 = 633,
+MLT_COMM_RAM_SLOPE_VLIM = 634,
+MLT_COMM_RAM_SLOPE_RFEED = 635,
+MLT_COMM_RAM_SLOPE_ILIM = 636,
+MLT_COMM_RAM_SLOPE_RING = 637,
+MLT_COMM_RAM_SLOPE_DELTA1 = 638,
+MLT_COMM_RAM_SLOPE_DELTA2 = 639,
+MLT_COMM_RAM_V_VLIM = 640,
+MLT_COMM_RAM_V_RFEED = 641,
+MLT_COMM_RAM_V_ILIM = 642,
+MLT_COMM_RAM_CONST_RFEED = 643,
+MLT_COMM_RAM_CONST_ILIM = 644,
+MLT_COMM_RAM_I_VLIM = 645,
+MLT_COMM_RAM_DC_DAC_GAIN = 646,
+MLT_COMM_RAM_VDIFF_TH = 647,
+MLT_COMM_RAM_TXDEC_B0 = 648,
+MLT_COMM_RAM_TXDEC_B1 = 649,
+MLT_COMM_RAM_TXDEC_B2 = 650,
+MLT_COMM_RAM_TXDEC_A1 = 651,
+MLT_COMM_RAM_TXDEC_A2 = 652,
+MLT_COMM_RAM_ZSYNTH_B0 = 653,
+MLT_COMM_RAM_ZSYNTH_B1 = 654,
+MLT_COMM_RAM_ZSYNTH_B2 = 655,
+MLT_COMM_RAM_ZSYNTH_A1 = 656,
+MLT_COMM_RAM_ZSYNTH_A2 = 657,
+MLT_COMM_RAM_RXACHPF_B0_1 = 658,
+MLT_COMM_RAM_RXACHPF_B1_1 = 659,
+MLT_COMM_RAM_RXACHPF_A1_1 = 660,
+MLT_COMM_RAM_RXACHPF_B0_2 = 661,
+MLT_COMM_RAM_RXACHPF_B1_2 = 662,
+MLT_COMM_RAM_RXACHPF_B2_2 = 663,
+MLT_COMM_RAM_RXACHPF_A1_2 = 664,
+MLT_COMM_RAM_RXACHPF_A2_2 = 665,
+MLT_COMM_RAM_RXACHPF_GAIN = 666,
+MLT_COMM_RAM_MASK7LSB = 667,
+MLT_COMM_RAM_RXDEC_B0 = 668,
+MLT_COMM_RAM_RXDEC_B1 = 669,
+MLT_COMM_RAM_RXDEC_B2 = 670,
+MLT_COMM_RAM_RXDEC_A1 = 671,
+MLT_COMM_RAM_RXDEC_A2 = 672,
+MLT_COMM_RAM_OSCINT1_B0_1 = 673,
+MLT_COMM_RAM_OSCINT1_B1_1 = 674,
+MLT_COMM_RAM_OSCINT1_B2_1 = 675,
+MLT_COMM_RAM_OSCINT1_A1_1 = 676,
+MLT_COMM_RAM_OSCINT1_A2_1 = 677,
+MLT_COMM_RAM_OSCINT1_B0_2 = 678,
+MLT_COMM_RAM_OSCINT1_B1_2 = 679,
+MLT_COMM_RAM_OSCINT1_B2_2 = 680,
+MLT_COMM_RAM_OSCINT1_A1_2 = 681,
+MLT_COMM_RAM_OSCINT1_A2_2 = 682,
+MLT_COMM_RAM_OSCINT2_B0_1 = 683,
+MLT_COMM_RAM_OSCINT2_B1_1 = 684,
+MLT_COMM_RAM_OSCINT2_B2_1 = 685,
+MLT_COMM_RAM_OSCINT2_A1_1 = 686,
+MLT_COMM_RAM_OSCINT2_A2_1 = 687,
+MLT_COMM_RAM_OSCINT2_B0_2 = 688,
+MLT_COMM_RAM_OSCINT2_B1_2 = 689,
+MLT_COMM_RAM_OSCINT2_B2_2 = 690,
+MLT_COMM_RAM_OSCINT2_A1_2 = 691,
+MLT_COMM_RAM_OSCINT2_A2_2 = 692,
+MLT_COMM_RAM_UNUSED693 = 693,
+MLT_COMM_RAM_UNUSED694 = 694,
+MLT_COMM_RAM_UNUSED695 = 695,
+MLT_COMM_RAM_RING_LPF_B0 = 696,
+MLT_COMM_RAM_RING_LPF_B1 = 697,
+MLT_COMM_RAM_RING_LPF_B2 = 698,
+MLT_COMM_RAM_RING_LPF_A1 = 699,
+MLT_COMM_RAM_RING_LPF_A2 = 700,
+MLT_COMM_RAM_LCRDBI = 701,
+MLT_COMM_RAM_LONGDBI = 702,
+MLT_COMM_RAM_VBAT_TIMER = 703,
+MLT_COMM_RAM_LF_SPEEDUP_TIMER = 704,
+MLT_COMM_RAM_DC_SPEEDUP_TIMER = 705,
+MLT_COMM_RAM_AC_SPEEDUP_TIMER = 706,
+MLT_COMM_RAM_LCR_SPEEDUP_TIMER = 707,
+MLT_COMM_RAM_CM_SPEEDUP_TIMER = 708,
+MLT_COMM_RAM_VCM_TH = 709,
+MLT_COMM_RAM_AC_SPEEDUP_TH = 710,
+MLT_COMM_RAM_SPR_SIG_0 = 711,
+MLT_COMM_RAM_SPR_SIG_1 = 712,
+MLT_COMM_RAM_SPR_SIG_2 = 713,
+MLT_COMM_RAM_SPR_SIG_3 = 714,
+MLT_COMM_RAM_SPR_SIG_4 = 715,
+MLT_COMM_RAM_SPR_SIG_5 = 716,
+MLT_COMM_RAM_SPR_SIG_6 = 717,
+MLT_COMM_RAM_SPR_SIG_7 = 718,
+MLT_COMM_RAM_SPR_SIG_8 = 719,
+MLT_COMM_RAM_SPR_SIG_9 = 720,
+MLT_COMM_RAM_SPR_SIG_10 = 721,
+MLT_COMM_RAM_SPR_SIG_11 = 722,
+MLT_COMM_RAM_SPR_SIG_12 = 723,
+MLT_COMM_RAM_SPR_SIG_13 = 724,
+MLT_COMM_RAM_SPR_SIG_14 = 725,
+MLT_COMM_RAM_SPR_SIG_15 = 726,
+MLT_COMM_RAM_SPR_SIG_16 = 727,
+MLT_COMM_RAM_SPR_SIG_17 = 728,
+MLT_COMM_RAM_SPR_SIG_18 = 729,
+MLT_COMM_RAM_COUNTER_VTR_VAL = 730,
+MLT_COMM_RAM_CONST_028 = 731,
+MLT_COMM_RAM_CONST_032 = 732,
+MLT_COMM_RAM_CONST_038 = 733,
+MLT_COMM_RAM_CONST_046 = 734,
+MLT_COMM_RAM_COUNTER_IRING_VAL = 735,
+MLT_COMM_RAM_GAIN_RING = 736,
+MLT_COMM_RAM_RING_HYST = 737,
+MLT_COMM_RAM_COMP_Z = 738,
+MLT_COMM_RAM_CONST_115 = 739,
+MLT_COMM_RAM_CONST_110 = 740,
+MLT_COMM_RAM_CONST_105 = 741,
+MLT_COMM_RAM_CONST_100 = 742,
+MLT_COMM_RAM_CONST_095 = 743,
+MLT_COMM_RAM_CONST_090 = 744,
+MLT_COMM_RAM_CONST_085 = 745,
+MLT_COMM_RAM_V_RASUM_IDEAL = 746,
+MLT_COMM_RAM_CONST_ONE = 747,
+MLT_COMM_RAM_VCM_OH = 748,
+MLT_COMM_RAM_VCM_RING = 749,
+MLT_COMM_RAM_VCM_HYST = 750,
+MLT_COMM_RAM_VOV_GND = 751,
+MLT_COMM_RAM_VOV_BAT = 752,
+MLT_COMM_RAM_VOV_RING_BAT = 753,
+MLT_COMM_RAM_CM_DBI = 754,
+MLT_COMM_RAM_RTPER = 755,
+MLT_COMM_RAM_P_TH_HVIC = 756,
+MLT_COMM_RAM_COEF_P_HVIC = 759,
+MLT_COMM_RAM_BAT_HYST = 764,
+MLT_COMM_RAM_BAT_DBI = 765,
+MLT_COMM_RAM_VBATL_EXPECT = 766,
+MLT_COMM_RAM_VBATH_EXPECT = 767,
+MLT_COMM_RAM_VBATR_EXPECT = 768,
+MLT_COMM_RAM_BAT_SETTLE = 769,
+MLT_COMM_RAM_VBAT_IRQ_TH = 770,
+MLT_COMM_RAM_MADC_VTIPC_OS = 771,
+MLT_COMM_RAM_MADC_VRINGC_OS = 772,
+MLT_COMM_RAM_MADC_VBAT_OS = 773,
+MLT_COMM_RAM_MADC_VLONG_OS = 774,
+MLT_COMM_RAM_UNUSED775 = 775,
+MLT_COMM_RAM_MADC_VDC_OS = 776,
+MLT_COMM_RAM_MADC_ILONG_OS = 777,
+MLT_COMM_RAM_MADC_ILOOP_OS = 780,
+MLT_COMM_RAM_MADC_ILOOP_SCALE = 781,
+MLT_COMM_RAM_UNUSED782 = 782,
+MLT_COMM_RAM_UNUSED783 = 783,
+MLT_COMM_RAM_DC_ADC_OS = 784,
+MLT_COMM_RAM_CAL_UNITY = 785,
+MLT_COMM_RAM_UNUSED786 = 786,
+MLT_COMM_RAM_UNUSED787 = 787,
+MLT_COMM_RAM_ACADC_OFFSET = 788,
+MLT_COMM_RAM_ACDAC_OFFSET = 789,
+MLT_COMM_RAM_CAL_DCDAC_CODE = 790,
+MLT_COMM_RAM_CAL_DCDAC_15MA = 791,
+MLT_COMM_RAM_CAL_LB_TSQUELCH = 801,
+MLT_COMM_RAM_CAL_LB_TCHARGE = 802,
+MLT_COMM_RAM_CAL_LB_TSETTLE0 = 803,
+MLT_COMM_RAM_CAL_GOERTZEL_DLY = 804,
+MLT_COMM_RAM_CAL_GOERTZEL_ALPHA = 805,
+MLT_COMM_RAM_CAL_DECLPF_K = 806,
+MLT_COMM_RAM_CAL_DECLPF_B1 = 807,
+MLT_COMM_RAM_CAL_DECLPF_B2 = 808,
+MLT_COMM_RAM_CAL_DECLPF_A1 = 809,
+MLT_COMM_RAM_CAL_DECLPF_A2 = 810,
+MLT_COMM_RAM_CAL_ACADC_THRL = 811,
+MLT_COMM_RAM_CAL_ACADC_THRH = 812,
+MLT_COMM_RAM_CAL_ACADC_TSETTLE = 813,
+MLT_COMM_RAM_DTROW0TH = 814,
+MLT_COMM_RAM_DTROW1TH = 815,
+MLT_COMM_RAM_DTROW2TH = 816,
+MLT_COMM_RAM_DTROW3TH = 817,
+MLT_COMM_RAM_DTCOL0TH = 818,
+MLT_COMM_RAM_DTCOL1TH = 819,
+MLT_COMM_RAM_DTCOL2TH = 820,
+MLT_COMM_RAM_DTCOL3TH = 821,
+MLT_COMM_RAM_DTFTWTH = 822,
+MLT_COMM_RAM_DTRTWTH = 823,
+MLT_COMM_RAM_DTROWRTH = 824,
+MLT_COMM_RAM_DTCOLRTH = 825,
+MLT_COMM_RAM_DTROW2HTH = 826,
+MLT_COMM_RAM_DTCOL2HTH = 827,
+MLT_COMM_RAM_DTMINPTH = 828,
+MLT_COMM_RAM_DTHOTTH = 829,
+MLT_COMM_RAM_RXPWR = 830,
+MLT_COMM_RAM_TXPWR = 831,
+MLT_COMM_RAM_RXMODPWR = 832,
+MLT_COMM_RAM_TXMODPWR = 833,
+MLT_COMM_RAM_FSKFREQ0 = 834,
+MLT_COMM_RAM_FSKFREQ1 = 835,
+MLT_COMM_RAM_FSKAMP0 = 836,
+MLT_COMM_RAM_FSKAMP1 = 837,
+MLT_COMM_RAM_FSK01 = 838,
+MLT_COMM_RAM_FSK10 = 839,
+MLT_COMM_RAM_VOCDELTA = 840,
+MLT_COMM_RAM_VOCLTH = 841,
+MLT_COMM_RAM_VOCHTH = 842,
+MLT_COMM_RAM_RINGOF = 843,
+MLT_COMM_RAM_RINGFR = 844,
+MLT_COMM_RAM_RINGAMP = 845,
+MLT_COMM_RAM_RINGPHAS = 846,
+MLT_COMM_RAM_RTDCTH = 847,
+MLT_COMM_RAM_RTACTH = 848,
+MLT_COMM_RAM_RTDCDB = 849,
+MLT_COMM_RAM_RTACDB = 850,
+MLT_COMM_RAM_RTCOUNT = 851,
+MLT_COMM_RAM_LCROFFHK = 852,
+MLT_COMM_RAM_LCRONHK = 853,
+MLT_COMM_RAM_LCRMASK = 854,
+MLT_COMM_RAM_LCRMASK_POLREV = 855,
+MLT_COMM_RAM_LCRMASK_STATE = 856,
+MLT_COMM_RAM_LCRMASK_LINECAP = 857,
+MLT_COMM_RAM_LONGHITH = 858,
+MLT_COMM_RAM_LONGLOTH = 859,
+MLT_COMM_RAM_IRING_LIM = 860,
+MLT_COMM_RAM_AC_PU_DELTA1 = 861,
+MLT_COMM_RAM_AC_PU_DELTA2 = 862,
+MLT_COMM_RAM_DIAG_LPF_8K = 863,
+MLT_COMM_RAM_DIAG_LPF_128K = 864,
+MLT_COMM_RAM_DIAG_INV_N = 865,
+MLT_COMM_RAM_DIAG_GAIN = 866,
+MLT_COMM_RAM_DIAG_G_CAL = 867,
+MLT_COMM_RAM_DIAG_OS_CAL = 868,
+MLT_COMM_RAM_SPR_GAIN_TRIM = 869,
+MLT_COMM_RAM_AC_DAC_GAIN = 871,
+MLT_COMM_RAM_AC_DAC_GAIN0 = 874,
+MLT_COMM_RAM_EZSYNTH_B0 = 875,
+MLT_COMM_RAM_UNUSED877 = 877,
+MLT_COMM_RAM_UNUSED879 = 879,
+MLT_COMM_RAM_AC_ADC_GAIN = 880,
+MLT_COMM_RAM_ILOOP1LPF = 881,
+MLT_COMM_RAM_RING_FLUSH_TIMER = 882,
+MLT_COMM_RAM_ALAW_BIAS = 883,
+MLT_COMM_RAM_MADC_VTRC_SCALE = 884,
+MLT_COMM_RAM_MADC_VLONG_SCALE = 887,
+MLT_COMM_RAM_MADC_VLONG_SCALE_RING = 888,
+MLT_COMM_RAM_UNUSED889 = 889,
+MLT_COMM_RAM_MADC_VDC_SCALE = 890,
+MLT_COMM_RAM_MADC_ILONG_SCALE = 891,
+MLT_COMM_RAM_UNUSED893 = 893,
+MLT_COMM_RAM_VDIFF_SENSE_SCALE = 894,
+MLT_COMM_RAM_VDIFF_SENSE_SCALE_RING = 895,
+MLT_COMM_RAM_VOV_RING_GND = 896,
+MLT_COMM_RAM_CAL_LB_OSC1_FREQ = 898,
+MLT_COMM_RAM_CAL_DCDAC_9TAU = 899,
+MLT_COMM_RAM_CAL_MADC_9TAU = 900,
+MLT_COMM_RAM_ADAP_RING_MIN_I = 901,
+MLT_COMM_RAM_SWEEP_STEP = 902,
+MLT_COMM_RAM_SWEEP_STEP_SAVE = 903,
+MLT_COMM_RAM_SWEEP_REF = 904,
+MLT_COMM_RAM_AMP_STEP = 905,
+MLT_COMM_RAM_RXACGAIN_SAVE = 906,
+MLT_COMM_RAM_AMP_RAMP_INIT = 907,
+MLT_COMM_RAM_DIAG_HPF_GAIN = 908,
+MLT_COMM_RAM_DIAG_HPF_8K = 909,
+MLT_COMM_RAM_DIAG_ADJ_STEP = 910,
+MLT_COMM_RAM_UNUSED912 = 912,
+MLT_COMM_RAM_MADC_SCALE_INV = 913,
+MLT_COMM_RAM_UNUSED914 = 914,
+MLT_COMM_RAM_PWRSAVE_TIMER = 915,
+MLT_COMM_RAM_OFFHOOK_THRESH = 916,
+MLT_COMM_RAM_SPEEDUP_MASK_TIMER = 917,
+MLT_COMM_RAM_DC_HOLD_DAC_OS = 927,
+MLT_COMM_RAM_NOTCH_B0 = 929,
+MLT_COMM_RAM_NOTCH_B1 = 930,
+MLT_COMM_RAM_NOTCH_B2 = 931,
+MLT_COMM_RAM_NOTCH_A1 = 932,
+MLT_COMM_RAM_NOTCH_A2 = 933,
+MLT_COMM_RAM_METER_LPF_B0 = 934,
+MLT_COMM_RAM_METER_LPF_B1 = 935,
+MLT_COMM_RAM_METER_LPF_B2 = 936,
+MLT_COMM_RAM_METER_LPF_A1 = 937,
+MLT_COMM_RAM_METER_LPF_A2 = 938,
+MLT_COMM_RAM_METER_SIG_0 = 939,
+MLT_COMM_RAM_METER_SIG_1 = 940,
+MLT_COMM_RAM_METER_SIG_2 = 941,
+MLT_COMM_RAM_METER_SIG_3 = 942,
+MLT_COMM_RAM_METER_SIG_4 = 943,
+MLT_COMM_RAM_METER_SIG_5 = 944,
+MLT_COMM_RAM_METER_SIG_6 = 945,
+MLT_COMM_RAM_METER_SIG_7 = 946,
+MLT_COMM_RAM_METER_SIG_8 = 947,
+MLT_COMM_RAM_METER_SIG_9 = 948,
+MLT_COMM_RAM_METER_SIG_10 = 949,
+MLT_COMM_RAM_METER_SIG_11 = 950,
+MLT_COMM_RAM_METER_SIG_12 = 951,
+MLT_COMM_RAM_METER_SIG_13 = 952,
+MLT_COMM_RAM_METER_SIG_14 = 953,
+MLT_COMM_RAM_METER_SIG_15 = 954,
+MLT_COMM_RAM_METER_BP_B0 = 955,
+MLT_COMM_RAM_METER_BP_B1 = 956,
+MLT_COMM_RAM_METER_BP_B2 = 957,
+MLT_COMM_RAM_METER_BP_A1 = 958,
+MLT_COMM_RAM_METER_BP_A2 = 959,
+MLT_COMM_RAM_PM_AMP_THRESH = 960,
+MLT_COMM_RAM_PWRSAVE_DBI = 962,
+MLT_COMM_RAM_DCDC_ANA_SCALE = 963,
+MLT_COMM_RAM_VOV_BAT_PWRSAVE_LO = 964,
+MLT_COMM_RAM_VOV_BAT_PWRSAVE_HI = 965,
+MLT_COMM_RAM_AC_ADC_GAIN0 = 966,
+MLT_COMM_RAM_SCALE_KAUDIO = 967,
+MLT_COMM_RAM_UNUSED1022 = 1022,
+MLT_COMM_RAM_UNUSED1023 = 1023,
+MLT_COMM_RAM_DAC_IN = 1281,
+MLT_COMM_RAM_ADC_OUT = 1282,
+MLT_COMM_RAM_PASS1 = 1283,
+MLT_COMM_RAM_TX_AC_INT = 1284,
+MLT_COMM_RAM_RX_AC_DIFF = 1285,
+MLT_COMM_RAM_INDIRECT_WR = 1286,
+MLT_COMM_RAM_INDIRECT_RD = 1287,
+MLT_COMM_RAM_BYPASS_OUT = 1288,
+MLT_COMM_RAM_ACC = 1289,
+MLT_COMM_RAM_INDIRECT_RAM_A = 1290,
+MLT_COMM_RAM_INDIRECT_RAM_B = 1291,
+MLT_COMM_RAM_HOT_BIT1 = 1292,
+MLT_COMM_RAM_HOT_BIT0 = 1293,
+MLT_COMM_RAM_PASS0_ROW_PWR = 1294,
+MLT_COMM_RAM_PASS0_COL_PWR = 1295,
+MLT_COMM_RAM_PASS0_ROW = 1296,
+MLT_COMM_RAM_PASS0_COL = 1297,
+MLT_COMM_RAM_PASS0_ROW_REL = 1298,
+MLT_COMM_RAM_PASS0_COL_REL = 1299,
+MLT_COMM_RAM_PASS0_ROW_2ND = 1300,
+MLT_COMM_RAM_PASS0_COL_2ND = 1301,
+MLT_COMM_RAM_PASS0_REV_TW = 1302,
+MLT_COMM_RAM_PASS0_FWD_TW = 1303,
+MLT_COMM_RAM_CAL_CM_BAL_TEST = 1305,
+MLT_COMM_RAM_TONE1 = 1307,
+MLT_COMM_RAM_TONE2 = 1308,
+MLT_COMM_RAM_RING_TRIG = 1309,
+MLT_COMM_RAM_VCM_DAC = 1310,
+MLT_COMM_RAM_RING_DAC = 1312,
+MLT_COMM_RAM_VRING_CROSSING = 1313,
+MLT_COMM_RAM_UNUSED_REG290 = 1314,
+MLT_COMM_RAM_LINEFEED_SHADOW = 1315,
+MLT_COMM_RAM_ROW_DIGIT = 1319,
+MLT_COMM_RAM_COL_DIGIT = 1320,
+MLT_COMM_RAM_PQ1_IRQ = 1322,
+MLT_COMM_RAM_PQ2_IRQ = 1323,
+MLT_COMM_RAM_PQ3_IRQ = 1324,
+MLT_COMM_RAM_PQ4_IRQ = 1325,
+MLT_COMM_RAM_PQ5_IRQ = 1326,
+MLT_COMM_RAM_PQ6_IRQ = 1327,
+MLT_COMM_RAM_LCR_SET = 1328,
+MLT_COMM_RAM_LCR_CLR = 1329,
+MLT_COMM_RAM_RTP_SET = 1330,
+MLT_COMM_RAM_LONG_SET = 1331,
+MLT_COMM_RAM_LONG_CLR = 1332,
+MLT_COMM_RAM_VDIFF_IRQ = 1333,
+MLT_COMM_RAM_MODFEED_SET = 1334,
+MLT_COMM_RAM_MODFEED_CLR = 1335,
+MLT_COMM_RAM_LF_SPEEDUP_SET = 1336,
+MLT_COMM_RAM_LF_SPEEDUP_CLR = 1337,
+MLT_COMM_RAM_DC_SPEEDUP_SET = 1338,
+MLT_COMM_RAM_DC_SPEEDUP_CLR = 1339,
+MLT_COMM_RAM_AC_SPEEDUP_SET = 1340,
+MLT_COMM_RAM_AC_SPEEDUP_CLR = 1341,
+MLT_COMM_RAM_LCR_SPEEDUP_SET = 1342,
+MLT_COMM_RAM_LCR_SPEEDUP_CLR = 1343,
+MLT_COMM_RAM_CM_SPEEDUP_SET = 1344,
+MLT_COMM_RAM_CM_SPEEDUP_CLR = 1345,
+MLT_COMM_RAM_MODEMPASS0 = 1346,
+MLT_COMM_RAM_RX2100_PASS1_PWR = 1347,
+MLT_COMM_RAM_RX2100_PASS1_THR = 1348,
+MLT_COMM_RAM_TX2100_PASS1_PWR = 1349,
+MLT_COMM_RAM_TX2100_PASS1_THR = 1350,
+MLT_COMM_RAM_TXMDM_TRIG = 1351,
+MLT_COMM_RAM_RXMDM_TRIG = 1352,
+MLT_COMM_RAM_TX_FILT_CLR = 1354,
+MLT_COMM_RAM_TX_DC_INT = 1355,
+MLT_COMM_RAM_RX_DC_MOD_IN = 1356,
+MLT_COMM_RAM_DSP_ACCESS = 1357,
+MLT_COMM_RAM_PRAM_ADDR = 1358,
+MLT_COMM_RAM_PRAM_DATA = 1359,
+MLT_COMM_RAM_IND_RAM_A_BASE = 1360,
+MLT_COMM_RAM_IND_RAM_A_ADDR = 1361,
+MLT_COMM_RAM_IND_RAM_A_MOD = 1362,
+MLT_COMM_RAM_IND_RAM_B_BASE = 1363,
+MLT_COMM_RAM_IND_RAM_B_ADDR = 1364,
+MLT_COMM_RAM_IND_RAM_B_MOD = 1365,
+MLT_COMM_RAM_USER_B0 = 1369,
+MLT_COMM_RAM_USER_B1 = 1370,
+MLT_COMM_RAM_USER_B2 = 1371,
+MLT_COMM_RAM_USER_B3 = 1372,
+MLT_COMM_RAM_USER_B4 = 1373,
+MLT_COMM_RAM_USER_B5 = 1374,
+MLT_COMM_RAM_USER_B6 = 1375,
+MLT_COMM_RAM_USER_B7 = 1376,
+MLT_COMM_RAM_FLUSH_AUDIO_CLR = 1377,
+MLT_COMM_RAM_FLUSH_DC_CLR = 1378,
+MLT_COMM_RAM_SPR_CLR = 1379,
+MLT_COMM_RAM_GPI1 = 1381,
+MLT_COMM_RAM_GPI2 = 1382,
+MLT_COMM_RAM_GPI3 = 1383,
+MLT_COMM_RAM_GPO1 = 1385,
+MLT_COMM_RAM_GPO2 = 1386,
+MLT_COMM_RAM_GPO3 = 1387,
+MLT_COMM_RAM_GPO1_OE = 1389,
+MLT_COMM_RAM_GPO2_OE = 1390,
+MLT_COMM_RAM_GPO3_OE = 1391,
+MLT_COMM_RAM_BATSEL_L_SET = 1392,
+MLT_COMM_RAM_BATSEL_H_SET = 1393,
+MLT_COMM_RAM_BATSEL_R_SET = 1394,
+MLT_COMM_RAM_BATSEL_CLR = 1395,
+MLT_COMM_RAM_VBAT_IRQ = 1396,
+MLT_COMM_RAM_MADC_VTIPC_RAW = 1397,
+MLT_COMM_RAM_MADC_VRINGC_RAW = 1398,
+MLT_COMM_RAM_MADC_VBAT_RAW = 1399,
+MLT_COMM_RAM_MADC_VLONG_RAW = 1400,
+MLT_COMM_RAM_UNUSED_REG377 = 1401,
+MLT_COMM_RAM_MADC_VDC_RAW = 1402,
+MLT_COMM_RAM_MADC_ILONG_RAW = 1403,
+MLT_COMM_RAM_MADC_ILOOP_RAW = 1406,
+MLT_COMM_RAM_MADC_DIAG_RAW = 1407,
+MLT_COMM_RAM_CALR3_DSP = 1410,
+MLT_COMM_RAM_PD_MADC = 1411,
+MLT_COMM_RAM_UNUSED_REG388 = 1412,
+MLT_COMM_RAM_PD_BIAS = 1413,
+MLT_COMM_RAM_PD_DC_ADC = 1414,
+MLT_COMM_RAM_PD_DC_DAC = 1415,
+MLT_COMM_RAM_PD_DC_SNS = 1416,
+MLT_COMM_RAM_PD_DC_COARSE_SNS = 1417,
+MLT_COMM_RAM_PD_VBAT_SNS = 1418,
+MLT_COMM_RAM_PD_DC_BUF = 1419,
+MLT_COMM_RAM_PD_AC_ADC = 1420,
+MLT_COMM_RAM_PD_AC_DAC = 1421,
+MLT_COMM_RAM_PD_AC_SNS = 1422,
+MLT_COMM_RAM_PD_CM_SNS = 1423,
+MLT_COMM_RAM_PD_CM = 1424,
+MLT_COMM_RAM_PD_SUM = 1427,
+MLT_COMM_RAM_PD_LKGDAC = 1428,
+MLT_COMM_RAM_PD_HVIC = 1430,
+MLT_COMM_RAM_CMDAC_CHEN_B = 1432,
+MLT_COMM_RAM_SUM_CHEN_B = 1433,
+MLT_COMM_RAM_TRNRD_CHEN_B = 1434,
+MLT_COMM_RAM_DC_BUF_CHEN_B = 1436,
+MLT_COMM_RAM_AC_SNS_CHEN_B = 1437,
+MLT_COMM_RAM_DC_SNS_CHEN_B = 1438,
+MLT_COMM_RAM_LB_MUX_CHEN_B = 1439,
+MLT_COMM_RAM_CMDAC_EN_B = 1441,
+MLT_COMM_RAM_RA_EN_B = 1442,
+MLT_COMM_RAM_RD_EN_B = 1443,
+MLT_COMM_RAM_VCTL = 1444,
+MLT_COMM_RAM_UNUSED_REG422 = 1446,
+MLT_COMM_RAM_HVIC_STATE = 1447,
+MLT_COMM_RAM_HVIC_STATE_OBSERVE = 1448,
+MLT_COMM_RAM_HVIC_STATE_MAN = 1449,
+MLT_COMM_RAM_HVIC_STATE_READ = 1450,
+MLT_COMM_RAM_VCMDAC_SCALE_MAN = 1452,
+MLT_COMM_RAM_CAL_ACADC_CNTL = 1453,
+MLT_COMM_RAM_CAL_ACDAC_CNTL = 1454,
+MLT_COMM_RAM_CAL_DCDAC_CNTL = 1456,
+MLT_COMM_RAM_CAL_TRNRD_CNTL = 1457,
+MLT_COMM_RAM_CAL_TRNRD_DACT = 1458,
+MLT_COMM_RAM_CAL_TRNRD_DACR = 1459,
+MLT_COMM_RAM_LKG_UPT_ACTIVE = 1460,
+MLT_COMM_RAM_LKG_UPR_ACTIVE = 1461,
+MLT_COMM_RAM_LKG_DNT_ACTIVE = 1462,
+MLT_COMM_RAM_LKG_DNR_ACTIVE = 1463,
+MLT_COMM_RAM_CAL_LKG_EN_CNTL = 1468,
+MLT_COMM_RAM_CAL_PUPD_CNTL = 1469,
+MLT_COMM_RAM_CAL_AC_RCAL = 1471,
+MLT_COMM_RAM_CAL_DC_RCAL = 1472,
+MLT_COMM_RAM_KAC_MOD = 1473,
+MLT_COMM_RAM_KAC_SEL = 1474,
+MLT_COMM_RAM_SEL_RING = 1475,
+MLT_COMM_RAM_CMDAC_FWD = 1476,
+MLT_COMM_RAM_CMDAC_RVS = 1477,
+MLT_COMM_RAM_CAL_INC_STATE = 1478,
+MLT_COMM_RAM_CAL_DCDAC_COMP = 1479,
+MLT_COMM_RAM_BAT_SWITCH = 1480,
+MLT_COMM_RAM_CH_IRQ = 1481,
+MLT_COMM_RAM_ILOOP_CROSSING = 1482,
+MLT_COMM_RAM_VOC_FAILSAFE = 1483,
+MLT_COMM_RAM_GENERIC_0 = 1486,
+MLT_COMM_RAM_GENERIC_1 = 1487,
+MLT_COMM_RAM_GENERIC_2 = 1488,
+MLT_COMM_RAM_GENERIC_3 = 1489,
+MLT_COMM_RAM_GENERIC_4 = 1490,
+MLT_COMM_RAM_GENERIC_5 = 1491,
+MLT_COMM_RAM_GENERIC_6 = 1492,
+MLT_COMM_RAM_GENERIC_7 = 1493,
+MLT_COMM_RAM_QHI_SET = 1496,
+MLT_COMM_RAM_QHI_CLR = 1497,
+MLT_COMM_RAM_RDC_SUM = 1499,
+MLT_COMM_RAM_FLUSH_AUDIO_MAN = 1506,
+MLT_COMM_RAM_FLUSH_DC_MAN = 1507,
+MLT_COMM_RAM_TIP_RING_CNTL = 1508,
+MLT_COMM_RAM_SQUELCH_SET = 1509,
+MLT_COMM_RAM_SQUELCH_CLR = 1510,
+MLT_COMM_RAM_CAL_STATE_MAN = 1511,
+MLT_COMM_RAM_RINGING_BW = 1514,
+MLT_COMM_RAM_AUDIO_MAN = 1515,
+MLT_COMM_RAM_HVIC_STATE_SPARE = 1516,
+MLT_COMM_RAM_RINGING_FAST_MAN = 1517,
+MLT_COMM_RAM_VCM_DAC_MAN = 1518,
+MLT_COMM_RAM_GENERIC_8 = 1522,
+MLT_COMM_RAM_GENERIC_9 = 1523,
+MLT_COMM_RAM_GENERIC_10 = 1524,
+MLT_COMM_RAM_GENERIC_11 = 1525,
+MLT_COMM_RAM_GENERIC_12 = 1527,
+MLT_COMM_RAM_GENERIC_13 = 1528,
+MLT_COMM_RAM_DC_HOLD_DAC = 1530,
+MLT_COMM_RAM_OFFHOOK_CMP = 1531,
+MLT_COMM_RAM_PWRSAVE_SET = 1532,
+MLT_COMM_RAM_PWRSAVE_CLR = 1533,
+MLT_COMM_RAM_PD_WKUP = 1534,
+MLT_COMM_RAM_SPEEDUP_MASK_SET = 1535,
+MLT_COMM_RAM_SPEEDUP_MASK_CLR = 1536,
+MLT_COMM_RAM_PD_DCDC = 1538,
+MLT_COMM_RAM_UNUSED_REG515 = 1539,
+MLT_COMM_RAM_PD_UVLO = 1540,
+MLT_COMM_RAM_PD_OVLO = 1541,
+MLT_COMM_RAM_PD_OCLO = 1542,
+MLT_COMM_RAM_PD_SWDRV = 1543,
+MLT_COMM_RAM_DCDC_UVHYST = 1545,
+MLT_COMM_RAM_DCDC_UVTHRESH = 1546,
+MLT_COMM_RAM_DCDC_OVTHRESH = 1547,
+MLT_COMM_RAM_DCDC_OITHRESH = 1548,
+MLT_COMM_RAM_DCDC_STATUS = 1551,
+MLT_COMM_RAM_DCDC_SWDRV_POL = 1553,
+MLT_COMM_RAM_DCDC_UVPOL = 1554,
+MLT_COMM_RAM_DCDC_VREF_MAN = 1557,
+MLT_COMM_RAM_DCDC_VREF_CTRL = 1558,
+MLT_COMM_RAM_DCDC_RNGTYPE = 1560,
+MLT_COMM_RAM_DCDC_DIN_FILT = 1561,
+MLT_COMM_RAM_DCDC_DOUT = 1563,
+MLT_COMM_RAM_UNUSED_REG540 = 1564,
+MLT_COMM_RAM_DCDC_OIMASK = 1565,
+MLT_COMM_RAM_DCDC_SC_SET = 1568,
+MLT_COMM_RAM_WAKE_HOLD = 1569,
+MLT_COMM_RAM_PD_AC_SQUELCH = 1570,
+MLT_COMM_RAM_PD_REF_OSC = 1571,
+MLT_COMM_RAM_PWRSAVE_MAN = 1573,
+MLT_COMM_RAM_PWRSAVE_SEL = 1574,
+MLT_COMM_RAM_PWRSAVE_CTRL_LO = 1575,
+MLT_COMM_RAM_PWRSAVE_CTRL_HI = 1576,
+MLT_COMM_RAM_PWRSAVE_HVIC_LO = 1577,
+MLT_COMM_RAM_PWRSAVE_HVIC_HI = 1578,
+MLT_COMM_RAM_DSP_PROM_MISR = 1579,
+MLT_COMM_RAM_DSP_CROM_MISR = 1580,
+MLT_COMM_RAM_RAMBIST_ERROR = 1583,
+MLT_COMM_RAM_DCDC_ANA_VREF = 1584,
+MLT_COMM_RAM_DCDC_ANA_GAIN = 1585,
+MLT_COMM_RAM_DCDC_ANA_TOFF = 1586,
+MLT_COMM_RAM_DCDC_ANA_TONMIN = 1587,
+MLT_COMM_RAM_DCDC_ANA_TONMAX = 1588,
+MLT_COMM_RAM_DCDC_ANA_DSHIFT = 1589,
+MLT_COMM_RAM_DCDC_ANA_LPOLY = 1590,
+MLT_COMM_RAM_DCDC_ANA_PSKIP = 1591,
+MLT_COMM_RAM_PD_DCDC_ANA = 1592,
+MLT_COMM_RAM_PWRPEND_SET = 1595,
+MLT_COMM_RAM_PD_CM_BUF = 1596,
+};
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt.h
new file mode 100644
index 0000000..450b1e8
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt.h
@@ -0,0 +1,824 @@
+/*
+** Copyright (c) 2009-2015 by Silicon Laboratories
+**
+** $Id: proslic_mlt.h 5510 2016-01-25 01:32:44Z elgeorge $
+**
+*/
+/*! \file proslic_mlt.h
+** \brief ProSLIC MLT interface header file
+**
+** This is the header file for the ProSLIC MLT top level APIs
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef PROSLIC_MLT_H
+#define PROSLIC_MLT_H
+/** @mainpage ProSLIC MLT API Documentation
+ *
+ * This documentation describes the ProSLIC MLT API's
+ *
+ */
+#include "proslic_mlt_api_config.h"
+#include "proslic_mlt_macro.h"
+#include "si_voice_datatypes.h"
+#include "proslic.h"
+
+
+/*
+**
+** Enums
+**
+*/
+
+/** @defgroup MLT_RETURN_CODES MLT return codes
+** Most of the top level functions will return one of the following types:
+** @{
+*/
+/** General return codes */
+typedef enum {
+ RC_MLT_TEST_RUNNING, /**< Test needs to be periodicaly polled */
+ RC_MLT_TEST_COMPLETE, /**< Test completed and has no execution errors */
+ RC_MLT_NO_ERROR, /**< Function succeded */
+ RC_MLT_UNSUPPORTED_TEST, /**< Test is unsuported by the given chipset */
+ RC_MLT_ABORT, /**< Test was aborted */
+ RC_MLT_NOCONVERGE, /**< Test failed to converge on a specific value */
+ RC_MLT_TIMEOUT, /**< Test failed to complete */
+ RC_MLT_ERROR, /**< Generic error message */
+ RC_MLT_BAD_PARAM, /**< Bad parameter */
+ RC_MLT_FALSE_RINGTRIP, /**< Unexpected ringtrip */
+ RC_MLT_ALARM_ON_RING, /**< Power alarm on ring start */
+ RC_MLT_RINGSTART_ERR /**< Ringing failed to start */
+} RC_MLT_RC_T;
+
+/* ROH */
+enum {
+ RC_MLT_ROH_NOFAULT,
+ RC_MLT_ROH_FAIL_RESFAULT,
+ RC_MLT_ROH_FAIL_ROH
+};
+/** @} MLT_RETURN_CODES*/
+
+
+/*
+** Resistive Faults Test method
+*/
+typedef enum {
+ RESFAULT_METHOD_UNDEFINED,
+ AUTOV,
+ LKGDAC,
+ LOWR,
+ RCTC
+} resFaultMethod;
+
+/*
+** Terminal Tag
+*/
+enum {
+ MLT_TERM_TR,
+ MLT_TERM_TG,
+ MLT_TERM_RG
+};
+
+
+
+/** @defgroup PROSLIC_MLT_TYPES ProSLIC MLT API General Datatypes/Function Definitions
+ * This section documents functions and data structures related to the
+ * ProSLIC/FXS chipsets.
+ * @{
+ */
+
+/**
+ @brief Structure for REN test calibration coefficients to be stored
+*/
+typedef struct {
+ int32 highRenSlope;
+ int32 lowRenSlope ;
+ int32 highRenOffs ;
+ int32 lowRenOffs ;
+ int32 renTrans ;
+ int32 extraLowRenSlope;
+ int32 extraLowRenOffset;
+} ProSLIC_rencal_t;
+
+#ifdef MLT_RUNTIME_CONFIG
+/**
+ @brief Structure for optional runtime/per channel MLT configuration
+*/
+typedef struct {
+ uInt16 mlt_poll_rate_offs;
+ uInt16 mlt_poll_rate;
+ int32 mlt_prot_res;
+ int32 mlt_line_cap;
+ int32 mlt_emi_cap;
+ int32 mlt_femf_samples;
+ uInt8 mlt_ext_v_flag;
+}ProSLIC_mlt_config_t;
+#endif
+
+/**
+@internal
+@brief Structure to store I/V measurements
+*/
+typedef struct {
+ int32 vtip[MLT_MAX_IV_SAMPLES];
+ int32 vring[MLT_MAX_IV_SAMPLES];
+ int32 itip[MLT_MAX_IV_SAMPLES];
+ int32 iring[MLT_MAX_IV_SAMPLES];
+ int32 vloop[MLT_MAX_IV_SAMPLES];
+ int32 iloop[MLT_MAX_IV_SAMPLES];
+ int32 vlong[MLT_MAX_IV_SAMPLES];
+ int32 ilong[MLT_MAX_IV_SAMPLES];
+} ProSLIC_iv_t;
+
+/**
+@brief General terminal measurement structure
+*/
+typedef struct {
+ int32 measTR;
+ int32 measTG;
+ int32 measRG;
+ int32 measAUX;
+ int32 measTR2;
+ int32 measTG2;
+ int32 measRG2;
+ int trFlag;
+ int tgFlag;
+ int rgFlag;
+ int auxFlag;
+ uInt16 time1;
+ uInt16 time2;
+ uInt16 time3;
+ uInt8 resultsValid;
+ uInt8 ahsFlag;
+ ProSLIC_iv_t term;
+ uInt8 flags[16];
+ int32 slopeErr;
+} ProSLIC_term_meas_t;
+
+/**
+@brief Structure to store REN measurement data
+*/
+typedef struct {
+ ProSLIC_rencal_t calData;
+ int32 renValue;
+ int renFlag;
+ int renCalFlag;
+ int resultsValid;
+} ProSLIC_ren_meas_t;
+
+/**
+ @brief Structure to store ROH measurement data
+*/
+typedef struct {
+ int rohTrue;
+ int resultsValid;
+} ProSLIC_roh_meas_t;
+
+
+#ifdef WIN32
+typedef struct {
+ _int64 time;
+}timeProfile;
+#endif
+
+/**
+ @brief Main MLT channel structure
+*/
+typedef struct{
+ proslicChanType_ptr pProslic; /**< Linkage to ProSLIC API channel structure */
+ ProSLIC_term_meas_t resFaults; /**< Stores results of resistive faults test */
+ ProSLIC_term_meas_t resFaultsRaw;
+ ProSLIC_term_meas_t hazVAC; /**< Stores AC results of foreign/hazardous voltage test */
+ ProSLIC_term_meas_t hazVDC; /**< Stores DC results of foreign/hazardous voltage test */
+ ProSLIC_term_meas_t capFaults; /**< Stores results of capacitance test */
+ ProSLIC_term_meas_t capFaultsRaw;
+ ProSLIC_term_meas_t hazIDC;
+ ProSLIC_term_meas_t hazIAC;
+ ProSLIC_roh_meas_t roh; /**< Stores results of receiver offhook test */
+ ProSLIC_ren_meas_t ren; /**< Stores results of REN test */
+ ProslicRAMInit preserveRAM[MLT_MAX_PRESERVE_RAM]; /**< Storage for resotoring entry conditions */
+ ProslicRegInit preserveReg[MLT_MAX_PRESERVE_REG]; /**< Storage for resotoring entry conditions */
+ ProslicRAMInit preserveAuxRAM[MLT_MAX_PRESERVE_RAM]; /**< Auxillary storage for revision specific locations */
+ ProslicRegInit preserveAuxReg[MLT_MAX_PRESERVE_REG]; /**< Auxillary storage for revision specific locations */
+#ifdef WIN32
+ timeProfile startTime;
+ timeProfile timeDelay;
+ int exec_time;
+#endif
+#ifdef MLT_DLL
+ timeProfile runTime;
+#endif
+#ifdef MLT_RUNTIME_CONFIG
+ ProSLIC_mlt_config_t mlt_config;
+#endif
+ int pm_bom_flag;
+}ProSLICMLTType;
+
+
+/**
+ @brief MLT test state structure
+*/
+typedef struct {
+ uInt16 stage; /**< Stage counter for controlling reentry */
+ uInt16 sampleIterations; /**< Sample counter for AC or averaged measurements */
+ uInt16 waitIterations; /**< Wait counter for controlling delays */
+ uInt16 settleTime;
+ uInt16 numSamples;
+} ProSLIC_mlt_test_state;
+
+/**
+@brief Structure for storing foreign voltages test state information
+*/
+typedef struct {
+ ProSLIC_mlt_test_state State;
+ int32 vt[MLT_MAX_FEMF_SAMPLES]; /* All measurement values are in terms of mV */
+ int32 vr[MLT_MAX_FEMF_SAMPLES];
+ int32 vtr[MLT_MAX_FEMF_SAMPLES];
+ int32 vto[MLT_MAX_FEMF_SAMPLES];
+ int32 tipOffs;
+ int32 ringOffs;
+ int32 samples;
+ uInt8 regTemp;
+ int32 discharge;
+} ProSLIC_mlt_foreign_voltages_state;
+
+/**
+@brief Structure for storing AHS detection test information
+*/
+typedef struct {
+ uInt8 enable;
+ int32 detected;
+ int32 ratio;
+ int32 irms;
+ int32 count;
+}ProSLIC_ahs_det_t;
+
+/**
+@brief Structure for storing resistive faults test state information
+*/
+typedef struct {
+ ProSLIC_mlt_test_state setupState;
+ ProSLIC_mlt_test_state TRState;
+ ProSLIC_mlt_test_state RGState;
+ ProSLIC_mlt_test_state TGState;
+ ProSLIC_mlt_test_state autoVState;
+ ProSLIC_mlt_test_state resDivState;
+ ProSLIC_mlt_test_state rcmMethodState;
+ int32 v1;
+ int32 v2;
+ int32 i1;
+ int32 i2;
+ int32 step;
+ uInt16 interval;
+ uInt8 smallRFlag;
+ int32 tipOffs;
+ int32 ringOffs;
+ int32 iring1;
+ int32 iring2;
+ int32 itip1;
+ int32 itip2;
+ int32 vtip1;
+ int32 vtip2;
+ int32 vring1;
+ int32 vring2;
+ int32 vtar[2];
+ int32 vtmp;
+ int32 dvdt_tr;
+ ProSLIC_ahs_det_t ahs_det;
+ int32 vmeas;
+ int32 imeas;
+ int32 v_offset;
+ int32 i_offset;
+ int32 i_array[MLT_MAX_AUTOV_SAMPLES];
+ uInt32 hvic_state_save;
+ uInt8 fault_term;
+ uInt8 active_term;
+ /* track measurement method used */
+ resFaultMethod rtrMethod;
+ resFaultMethod rtgMethod;
+ resFaultMethod rrgMethod;
+} ProSLIC_mlt_rmeas_state;
+
+/**
+@brief Structure for storing receiver offhook test state information
+*/
+typedef struct {
+ ProSLIC_mlt_test_state State;
+ int32 Rv1;
+ int32 Rv2;
+} ProSLIC_mlt_roh_state;
+
+/**
+@brief Structure for storing REN test state information
+*/
+typedef struct {
+ ProSLIC_mlt_test_state State;
+ int32 max;
+ ProSLIC_rencal_t *renCal;
+ uInt32 counter_vtr_val;
+ uInt32 vcm_ring;
+ uInt32 vring;
+#ifdef MLT_RUNTIME_CONFIG
+ int32 v[256];
+#else
+ int32 v[MLT_REN_SAMPLE_TIME/MLT_POLL_RATE];
+#endif
+} ProSLIC_mlt_ren_state;
+
+
+/**
+@brief Structure for storing capacitance test state information
+*/
+typedef struct {
+ ProSLIC_mlt_test_state State;
+ ProSLIC_mlt_test_state MeasState;
+ ProSLIC_mlt_test_state TimeConstState;
+ uInt32 testavo;
+ uInt32 freq;
+ uInt32 ram1447;
+} ProSLIC_mlt_capacitance_state;
+
+/**
+@brief Structure for storing REN capacitance estimation test state information
+*/
+#define ProSLIC_mlt_ren_cap_state ProSLIC_mlt_capacitance_state
+/** @}*/
+
+
+/** @defgroup PROSLIC_API_TOPLEVEL Top Level ProSLIC MLT APIs
+ * This group contains the top level ProSLIC MLT APIs to be called by user's application
+ *
+ *@{
+ */
+
+/*
+** Function Definitions
+*/
+
+
+/*******************************************************************************************/
+/** @defgroup MLT_VOLTAGES MLT Hazardous/Foreign Voltage Test
+ * This group of functions are used to initialize and execute hazardous or
+ * foreign voltages test.
+ * @{
+ */
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_foreign_voltages
+ *
+ * @brief This routine should be called to measure AC and DC voltages on TIP/RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->hazVAC.measTG - Tip to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measRG - Ring to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measTR - Tip to Ring AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVDC.measTG - Tip to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measRG - Ring to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measTR - Tip to Ring DC voltage (mV)
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - ProSLIC_mlt_init_foreign_voltages() must be called prior to calling this routine to
+ * initialize test state variables
+ *
+ * @sa ProSLIC_mlt_init_foreign_voltages, MLT_POLL_RATE
+ *
+ */
+int ProSLIC_mlt_foreign_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState);
+
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_hazard_voltages
+ *
+ * @brief This routine should be called to measure AC and DC voltages on TIP/RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ * - pProSLICMLT->hazVAC.measTG - Tip to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measRG - Ring to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measTR - Tip to Ring AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVDC.measTG - Tip to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measRG - Ring to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measTR - Tip to Ring DC voltage (mV)
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - ProSLIC_mlt_init_foreign_voltages() must be called prior to calling this routine to
+ * initialize test state variables
+ *
+ * @sa ProSLIC_mlt_init_foreign_voltages(), MLT_POLL_RATE
+ *
+ */
+int ProSLIC_mlt_hazard_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_init_foreign_voltages
+ *
+ * @brief The routine should be called prior to ProSLIC_mlt_foreign_voltages to initialize state variables
+ *
+ * @param[in,out] *pState - state variable to track reentry
+ * @param[in] samples - number of voltage samples taken
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - The number of voltage samples taken is presently overwritten by the
+ * device driver to provide the most optimum results
+ *
+ * @sa ProSLIC_mlt_foreign_voltages()
+ *
+ */
+int ProSLIC_mlt_init_foreign_voltages(ProSLIC_mlt_foreign_voltages_state *pState, int samples);
+/** @}*/
+
+
+/*******************************************************************************************/
+/** @defgroup MLT_RESFAULTS MLT Resistive Faults Test
+ * This group of functions are used to initialize and execute the resistive faults test.
+ * @{
+ */
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_resistive_faults
+ *
+ * @brief This routine should be called to measure resistance from TIP-RING, TIP-GND, and RING-GND
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->resFaults.measTG - Tip to GND Resistance (ohms*10)
+ * - pProSLICMLT->resFaults.measRG - Ring to GND Resistance (ohms*10)
+ * - pProSLICMLT->resFaults.measTR - Tip to Ring Resistance (ohms*10)
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - ProSLIC_mlt_init_resistive_faults() must be called prior to calling this routine to
+ * initialize test state variables
+ *
+ * @sa ProSLIC_mlt_init_resistive_faults(), MLT_POLL_RATE
+ *
+ */
+int ProSLIC_mlt_resistive_faults(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_init_resistive_faults
+ *
+ * @brief The routine should be called prior to ProSLIC_mlt_receiver_offhook to initialize state variables
+ *
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ *
+ * @sa @ref ProSLIC_mlt_receiver_offhook()
+ *
+ */
+int ProSLIC_mlt_init_resistive_faults(ProSLIC_mlt_rmeas_state *pState);
+/** @}*/
+
+
+/*******************************************************************************************/
+/** @defgroup MLT_ROH MLT Receiver Offhook Test
+ * This group of functions are used to initialize and execute the receiver offhook test.
+ * @{
+ */
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_receiver_offhook
+ *
+ * @brief This routine should be called to detect the presence of an offhook receiver (FXO)
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data in pProSLICMLT->roh.rohTrue:
+ * - RC_MLT_ROH_NOFAULT - no resistive fault or offhook receiver detected
+ * - RC_MLT_ROH_FAIL_ROH - offhook receiver detected
+ * - RC_MLT_ROH_FAIL_RESFAULT - resistive fault detected
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - ProSLIC_mlt_init_receiver_offhook() must be called prior to calling this routine to
+ * initialize test state variables
+ *
+ * @sa ProSLIC_mlt_init_receiver_offhook(), MLT_POLL_RATE
+ *
+ */
+int ProSLIC_mlt_receiver_offhook(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_roh_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_init_receiver_offhook
+ *
+ * @brief The routine should be called prior to ProSLIC_mlt_receiver_offhook to initialize state variables
+ *
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ *
+ * @sa ProSLIC_mlt_receiver_offhook()
+ *
+ */
+int ProSLIC_mlt_init_receiver_offhook(ProSLIC_mlt_roh_state *pState);
+/** @}*/
+
+
+/*******************************************************************************************/
+/** @defgroup MLT_REN MLT REN Test
+ * This group of functions are used to initialize and execute the REN test.
+ * @{
+ */
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_ren
+ *
+ * @brief This routine should be called to measure the Ringer Equivalence Number (REN)
+ * present between TIP-RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->ren.revValue - REN value (REN / 1000)
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - 1 REN is presummed to be 6930ohms + 8uF
+ * - ProSLIC_mlt_init_ren() must be called prior to calling this routine to
+ * initialize test state variables
+ *
+ * @sa ProSLIC_mlt_init_ren(), MLT_POLL_RATE
+ *
+ */
+int ProSLIC_mlt_ren(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_state *pState);
+
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_init_ren
+ *
+ * @brief The routine should be called prior to ProSLIC_mlt_ren to initialize state variables
+ *
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ *
+ * @sa @ref ProSLIC_mlt_ren()
+ *
+ */
+int ProSLIC_mlt_init_ren(ProSLIC_mlt_ren_state *pState);
+/** @}*/
+
+
+/*******************************************************************************************/
+/** @defgroup MLT_CAPACITANCE MLT Capacitance Test
+ * This group of functions are used to initialize and execute the capacitance test.
+ * @{
+ */
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_capacitance
+ *
+ * @brief This routine should be called to measure the capacitance betweein TIP-RING, TIP-GND, and RING-GND
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->capFaults.measTG - Tip to GND Capacitance (nF*10)
+ * - pProSLICMLT->capFaults.measRG - Ring to GND Capacitance (nF*10)
+ * - pProSLICMLT->capFaults.measTR - Tip to Ring Capacitance (nF*10)
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - ProSLIC_mlt_init_capacitance() must be called prior to calling this routine to
+ * initialize test state variables
+ *
+ * @sa ProSLIC_mlt_init_capacitance(), MLT_POLL_RATE
+ *
+ */
+int ProSLIC_mlt_capacitance(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_capacitance_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_ren_cap
+ *
+ * @brief This routine should be called to measure the capacitance betweein TIP-RING, including
+ * what is presented by the phone
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->capFaults.measTR2 - Tip to Ring Capacitance (nF*10)
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - ProSLIC_mlt_init_capacitance() must be called prior to calling this routine to
+ * initialize test state variables
+ *
+ * @sa ProSLIC_mlt_init_capacitance(), MLT_POLL_RATE
+ *
+ */
+int ProSLIC_mlt_ren_cap(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_ren_cap_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_init_capacitance
+ *
+ * @brief The routine should be called prior to ProSLIC_mlt_capacitance to initialize state variables
+ *
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ *
+ * @sa @ref ProSLIC_mlt_capacitance()
+ *
+ */
+int ProSLIC_mlt_init_capacitance(ProSLIC_mlt_capacitance_state *pState);
+/** @}*/
+
+/*******************************************************************************************/
+/** @defgroup MLT_ABORT MLT Abort Test
+ * This group of functions are used to abort an MLT test.
+ * @{
+ */
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_abort
+ *
+ * @brief The routine should be called to abort an MLT routine
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_ABORT are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa MLT_POLL_RATE
+ *
+ */
+int ProSLIC_mlt_abort (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_test_state *pState);
+/** @}*/
+
+/*******************************************************************************************/
+/** @defgroup MLT_RENCAL MLT REN Calibration Test
+ * This group of functions are used to initialize the REN calibration coefficients.
+ * @{
+ */
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_init_ren_cal
+ *
+ * @brief The routine should be called to initialize REN calibration coefficients
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon function exit, the following data would of been modified:
+ * - pProSLICMLT->ren.calData - Structure updated with MLT_RENCAL values in @ref proslic_mlt_api_config.h
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ *
+ */
+int ProSLIC_mlt_init_ren_cal(ProSLICMLTType *pProSLICMLT);
+/** @}*/
+
+
+
+/*******************************************************************************************/
+/** @defgroup MLT_DATA_MGMT Management of MLT Test Data
+ * This group of functions are used to manage the MLT test results and flags.
+ * @{
+ */
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_clear_results
+ *
+ * @brief The routine should be called to clear MLT test results
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ *
+ */
+int ProSLIC_mlt_clear_results(ProSLICMLTType *pProSLICMLT);
+
+
+#ifdef MLT_RUNTIME_CONFIG
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_init_default_config
+ *
+ * @brief Initialize per-channel configuration paramters from macros
+ * in proslic_mlt_api_config.h
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ *
+ */
+int ProSLIC_mlt_init_default_config(ProSLICMLTType *pProSLICMLT);
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_init_custom_config
+ *
+ * @brief Initialize per-channel configuration paramters from custom user parameters.
+ * This allows the parameters to be modified during runtime.
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *mlt_config - pointer to user's mlt configuration structure
+ *
+ * @retval typical return value: @ref RC_MLT_NO_ERROR @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This routine should be called on a per channel basis
+ *
+ */
+int ProSLIC_mlt_init_custom_config(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_config_t *mlt_config);
+#endif
+
+/*******************************************************************************************/
+/**
+ * Function: ProSLIC_mlt_version
+ *
+ * @brief The routine returns ProSLIC MLT API Version string
+ *
+ * @retval Pointer to MLT API Version string *ProSLICMLTAPIVersion
+ *
+ * @sa proslic_mlt_version.c
+ *
+ */
+const char *ProSLIC_mlt_version(void);
+
+/** @}*/
+/**@}*/
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_api_config.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_api_config.h
new file mode 100644
index 0000000..57ca94a
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_api_config.h
@@ -0,0 +1,176 @@
+/*
+** Copyright (c) 2010-2014 by Silicon Laboratories
+**
+** $Id: proslic_mlt_api_config.h,v 1.4 2008/07/11 21:50:53 cdp Exp $
+**
+*/
+/*! \file proslic_mlt_api_config.h
+** \brief ProSLIC MLT configuration file
+**
+** This is the header file customers should use to configure the
+** ProSLIC MLT API
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+*/
+#ifndef MLT_CONFIG_H
+#define MLT_CONFIG_H
+
+/**
+ * @defgroup MLT_CONFIG ProSLIC MLT API Configuration Parameters
+ * Contains MLT parameters that may be modified by the end user. Please consult Silabs for assistance in making changes.
+ *
+ *@{
+ */
+/*************************************************************************************************************/
+/**
+ * @defgroup MLT_CONFIG_GENERAL General MLT Configuration Parameters
+ *
+ *@{
+ */
+#define MLT_POLL_RATE 10 /*!< Software poll rate (ms) - MUST be between 2-10 mSec in order for the specified accuracy levels published. */
+/*@}*/
+
+/*************************************************************************************************************/
+/**
+ * @defgroup MLT_CONFIG_BOM BOM Dependent MLT Configuration Parameters
+ *
+ *@{
+ */
+/*#define PM_BOM */ /* Define PM_BOM if hardware BOM supports pulse metering */
+#define MLT_PROTECTION_RESISTANCE 210 /*!< Value of series resistance(per leg) on TIP and RING (ohms*10) */
+#define MLT_LINE_CAPACITANCE 100 /*!< Value of capacitors on tip and ring (nF*10) */
+#define MLT_EMI_CAPACITANCE 100 /*!< Value of EMI capacitor from tip to ring (nF*10) */
+/*@}*/
+
+
+/*************************************************************************************************************/
+/**
+ * @defgroup MLT_CONFIG_FOREIGN_VOLTAGE Foreign Voltage MLT Configuration Parameters
+ *
+ *@{
+ */
+#define MLT_USE_EXTENDED_V_RANGE /*!< Define to extend voltage range to 250vrms (requires BOM change) */
+#undef MLT_USE_EXTENDED_V_RANGE
+
+#define MLT_TS_HAZV_LINE_DISCHARGE 50 /*!< Time under 0v V_VLIM prior to making FEMF measurement */
+#define MLT_MAX_FEMF_SAMPLES 256 /*!< Max number of samples allowed in FEMF test */
+#define MLT_FEMF_SAMPLES 30 /*!< Number of voltage samples to capture */
+#define MLT_HAZV_VTR_ENABLED /*!< Include VTR AC voltage measurement in hazardous voltage test.
+ ** This adds ~350ms of additional test time and is not a measurement
+ ** that is required by all MLT regulatory specifications */
+/*@}*/
+
+
+/*************************************************************************************************************/
+/**
+ * @defgroup MLT_CONFIG_RESFAULT Resistive Faults MLT Configuration Parameters
+ *
+ *@{
+ */
+#define MLT_FAST_RESFAULTS 0 /*!< Obsolete - settle times are now adaptive */
+#define MLT_RES_AUTOV_SAMPLES 20 /*!< Number of voltage samples averaged when making resistance measurements
+ in the 3k to 1M range. Note - no protection against overflow has
+ been included - maximum is 128 */
+#define MLT_RES_AUTOV_STEP 1 /*!< Obsolete - step size is now adaptive */
+#define MLT_RES_AUTOV_DIFF_V1 10 /*!< Resistive Fault Measurement - Diff V1 */
+#define MLT_RES_AUTOV_DIFF_V2 40 /*!< Resistive Fault Measurement - Diff V2 */
+#define MLT_RES_AUTOV_LONG_V1 28 /*!< Resistive Fault Measurement - Long V1 */
+#define MLT_RES_AUTOV_LONG_V2 50 /*!< Resistive Fault Measurement - Long V2 */
+
+#define MLT_RES_AUTOV_AHS_DET_EN 1 /*!< AHS Detection Enabled */
+#define MLT_RES_AUTOV_DIFF_AHS_V1 10 /*!< Resistive Fault Measurement - Diff V1 if AHS detected */
+#define MLT_RES_AUTOV_DIFF_AHS_V2 22 /*!< Resistive Fault Measurement - Diff V2 if AHS detected */
+#define MLT_RES_AUTOV_LONG_AHS_V1 12 /*!< Resistive Fault Measurement - Long V1 if AHS detected */
+#define MLT_RES_AUTOV_LONG_AHS_V2 24 /*!< Resistive Fault Measurement - Long V2 if AHS detected */
+#define MLT_RES_AUTOV_AHS_MAX_RETEST 2 /*!< Maximum number of measure repeats if AHS detected */
+#define MLT_RES_AUTOV_DIFF_AHS_SETTLE 4300 /*!< Measurement settle - Diff measurement if AHS detected */
+#define MLT_RES_AUTOV_LONG_AHS_SETTLE 1000 /*!< Measurement settle - Long measurement if AHS detected */
+
+#define MLT_RES_SM_R_MIN_I_FWD 8000 /*!< Min FWD ILOOP Small R Test in uA */
+#define MLT_RES_SM_R_MIN_I_REV 7000 /*!< Min REV ILOOP Small R Test in uA */
+
+/*@}*/
+
+
+
+
+
+/*************************************************************************************************************/
+/**
+ * @defgroup MLT_CONFIG_REN REN MLT Configuration Parameters
+ *
+ *@{
+ */
+#define MLT_REN_TEST_FREQ 20 /*!< Frequency at which REN is measured (16 or 20) */
+#define MLT_REN_SAMPLE_TIME 300 /*!< Period in which current is averaged in REN test */
+
+/*
+ * REN Calibration Constants
+ *
+ * Values based on typical REN calibration results using Silabs EVBs
+ * User should replace these with results of running a REN calibration
+ * using their own hardware
+ */
+#ifdef SI3217X
+#define MLT_RENCAL_HI_REN_SLOPE 87657L /*!< Example calibration constant from Si32178FB-EVB 2.1 */
+#define MLT_RENCAL_LO_REN_SLOPE 110457L
+#define MLT_RENCAL_HI_REN_OFFS 86616L
+#define MLT_RENCAL_LO_REN_OFFS 18215L
+#define MLT_RENCAL_REN_TRANS 384544L
+#define MLT_RENCAL_ELO_REN_SLOPE 117721L
+#define MLT_RENCAL_ELO_REN_OFFS 10951L
+#else
+#define MLT_RENCAL_HI_REN_SLOPE 85195L
+#define MLT_RENCAL_LO_REN_SLOPE 100696L
+#define MLT_RENCAL_HI_REN_OFFS 64184L
+#define MLT_RENCAL_LO_REN_OFFS 17681L
+#define MLT_RENCAL_REN_TRANS 351745L
+#define MLT_RENCAL_ELO_REN_SLOPE 113467L
+#define MLT_RENCAL_ELO_REN_OFFS 4910L
+#endif
+/*@}*/
+
+
+/*************************************************************************************************************/
+/**
+ * @defgroup MLT_CONFIG_ROH Receiver offhook MLT Configuration Parameters
+ *
+ *@{
+ */
+#define MLT_TS_ROH_MEAS1 250
+#define MLT_TS_ROH_MEAS2 100
+#define MLT_ROH_MAX_ZDIFF 13 /*!< Maximum % difference in TR impedance measured at two current levels
+ ** during ROH test */
+#define MLT_ROH_MIN_ZDIFF_REN 100 /*!< Min % difference in TR impedance measured at two current levels during
+ ROH test in which one of the measurements looks like a resistive fault, but
+ because of the large % difference in measurement, it must be measurement
+ error due to an excessive REN load. */
+#define MLT_ROH_MAX_ZTR 2500 /*!< Maximum T-R impedance that could be considered a valid cpe device
+ ** plus loop resistance */
+#define MLT_ROH_MIN_ILOOP 300 /*!< If loop current is below this during ROH test, no offhook phone or fault
+ is presumed (uA) */
+#define MLT_ROH_MIN_VLOOP 1000 /*!< If loop voltage is below this during ROH test, short circuit fault
+ is presumed (mv) */
+/*@}*/
+
+
+/*************************************************************************************************************/
+/**
+ * @defgroup MLT_CONFIG_CAP Capacitance MLT Configuration Parameters
+ *
+ *@{
+ */
+#define MLT_CTR_EST_T1 4
+#define MLT_CTR_EST_T2 10
+#define MLT_CTR_MAX_VTR 42000 /*!< Max T-R voltage (in mv) during time constant measurement */
+#define MLT_CTR_MIN_VTR 3000 /*!< Max T-R voltage (in mv) during time constant measurement */
+#define MLT_DISABLE_3TERM_CAP_COMPENSATION 0 /*!< Used to disable capacitance 3 terminal equations. */
+/*@}*/
+
+/*@}*/
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_dcfeed.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_dcfeed.h
new file mode 100644
index 0000000..a5edcf6
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_dcfeed.h
@@ -0,0 +1,145 @@
+/*
+** Copyright (c) 2011-2012 by Silicon Laboratories
+**
+** $Id: proslic_mlt_dcfeed.h 5526 2016-02-04 22:27:57Z elgeorge $
+**
+*/
+/*! \file proslic_mlt_dcfeed.h
+** \brief ProSLIC MLT dc feed setup header file
+**
+** This is the header file for the ProSLIC DC feed setup during MLT tests
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+** This code may produce different results on different host processors
+**
+*/
+
+#ifndef PROSLIC_MLT_DCFEED_H
+#define PROSLIC_MLT_DCFEED_H
+
+
+
+/**
+ * @internal @defgroup PROSLIC_DCFEED_API ProSLIC DC Feed Setup APIs
+ * These functions are used by the MLT device drivers and never called from a higher level routine
+ *
+ * @{
+ */
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters to drive TIP/RING close to 0v
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeedCloseToZero(ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters to drive TIP/RING to 10v
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeed10VLONG (ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters to drive TIP/RING to 50v
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeed50VLONG (ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters to drive TIP/RING to 35v
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeed35VCM (ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters to drive VTR to 35v
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeed35V (ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters for 40v/14mA feed
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeedV1SmallR (ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters for 35v/7mA feed
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeedV2SmallR (ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters for 45v/20mA feed
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeed45V (ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters for REN test
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeedForRENTest (ProSLICMLTType *pProSLICMLT);
+
+/********************************************************************************/
+/**
+** @brief Load custom DC feed parameters for REN test
+**
+** @param[in] pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+void setupDcFeedAutoV (ProSLICMLTType *pProSLICMLT);
+/**@}*/
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_diag_madc.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_diag_madc.h
new file mode 100644
index 0000000..e4e5ab1
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_diag_madc.h
@@ -0,0 +1,404 @@
+/*
+** Copyright (c) 2009-2015 by Silicon Laboratories
+**
+** $Id: proslic_mlt_diag_madc.h 5526 2016-02-04 22:27:57Z elgeorge $
+**/
+/*! \file proslic_mlt_diag_madc.h
+** \brief ProSLIC mlt diag and madc utilities
+**
+** This is the header file for mlt diag and madc utilities
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef PROSLIC_MLT_DIAG_MADC_H
+#define PROSLIC_MLT_DIAG_MADC_H
+
+/** @internal @defgroup PROSLIC_DIAG_MADC ProSLIC MLT Diag and MADC APIs
+ * This group contains the APIs for diag and MADC functions used by the MLT device drivers.
+ * Called only from MLT device drivers and not higher level code.
+ *
+ *@{
+ */
+
+
+/** @internal @defgroup PROSLIC_MLT_CONSTANTS ProSLIC MLT Constants
+ * This group contains computation constants that are to not be modified by user
+ * Called only from MLT device drivers and not higher level code.
+ *
+ *@{
+ */
+
+#define FULLSCALE_29BIT_2COMP 268435455L /*!< @internal Maximum positive 29-bit 2's compliment */
+
+/*
+ * BOM dependent resistance measurement scaling constants
+ */
+
+/* Extended Voltage BOM */
+#define MLT_CONST_REQ_DIFF_EV_0 101L /*!< @internal TR resistance calculation coef 0, std bom */
+#define MLT_CONST_REQ_LONG_EV_0 365305L /*!< @internal TG/RG resistance calculation coef 0, std bom */
+#define MLT_CONST_REQ_LONG_EV_1 547958L /*!< @internal TG/RG resistance calculation coef 1, std bom */
+#define MLT_CONST_REQ_AUTO_LONG_EV 182L /*!< @internal TG/RG resistance simplified calculation coef 0, std bom */
+#define MLT_CONST_PM_REQ_DIFF_EV_0 197L /*!< @internal TR resistance calculation coef 0, PM bom */
+#define MLT_CONST_PM_REQ_LONG_EV_0 365305L /*!< @internal TG/RG resistance calculation coef 0, PM bom */
+#define MLT_CONST_PM_REQ_LONG_EV_1 375391L /*!< @internal TG/RG resistance calculation coef 1, PM bom */
+#define MLT_CONST_MADC_VCOARSE_EV 639 /*!< @internal MADC coarse voltage scaling */
+#define MLT_CONST_MADC_HIRES_V_EV 146 /*!< @internal MADC hires voltage scaling (1000*406)/100 */
+/* Standard Voltage BOM */
+#define MLT_CONST_REQ_DIFF_SV_0 114L /*!< @internal TR resistance calculation coef 0, std bom */
+#define MLT_CONST_REQ_LONG_SV_0 321983L /*!< @internal TG/RG resistance calculation coef 0, std bom */
+#define MLT_CONST_REQ_LONG_SV_1 482975L /*!< @internal TG/RG resistance calculation coef 1, std bom */
+#define MLT_CONST_REQ_AUTO_LONG_SV 207L /*!< @internal TG/RG resistance simplified calculation coef 0, std bom */
+#define MLT_CONST_PM_REQ_DIFF_SV_0 218L /*!< @internal TR resistance calculation coef 0, PM bom */
+#define MLT_CONST_PM_REQ_LONG_SV_0 296283L /*!< @internal TG/RG resistance calculation coef 0, PM bom */
+#define MLT_CONST_PM_REQ_LONG_SV_1 374573L /*!< @internal TG/RG resistance calculation coef 1, PM bom */
+#define MLT_CONST_MADC_VCOARSE_SV 1074 /*!< @internal MADC coarse voltage scaling */
+#define MLT_CONST_MADC_HIRES_V_SV 246 /*!< @internal MADC hires voltage scaling (1000*406)/100 */
+
+
+
+#define MLT_CONST_BAL_RATIO 125L /*!< @internal RG to TG fault balance ratio */
+#define MLT_CONST_PM_BAL_RATIO 135L /*!< @internal RG to TG fault balance ratio, PM bom */
+
+/* BOM Independent */
+#define MLT_CONST_OPEN_RES 1000000000L /*!< @internal Open circuit impedance constant */
+#define MLT_CONST_MAX_RES 20000000L /*!< @internal Max 2Mohm resistance measured */
+#define MLT_CONST_LKG_DAC_VLIM 48500 /*!< @internal Minimum Vt/Vr supporting lkgdac method */
+#define MLT_CONST_AUTOV_REQ_OPEN 425000L /*!< @internal open lead impedance in tip/ring open mode */
+/*
+** Measurement Scaling (includes redundent defines from std API)
+*/
+#define MLT_CONST_MADC_I 597 /*!< @internal MADC current scale factor (1e6/1.676e-9 A/lsb) */
+#define MLT_CONST_MADC_V 1074 /*!< @internal MADC voltage scale factor (1e3/931.323e-9 V/lsb) */
+#define MLT_CONST_COARSE_SENSE_VOFFS 1500 /*!< @internal coarse sensor 1.5v intrinsic offset */
+#define MLT_CONST_AUTO_V_VTAR 1073741L /*!< @internal Auto-V vtar voltage scale (1/931.323e-9) */
+#define MLT_CONST_AUTO_V_RINGOF 4941L /*!< @internal Ringer DC useed as diag Isrc (Vdc=Isrc(uA)/319.57uA/V)*/
+#define MLT_CONST_AUTO_V_VFEED 1969L /*!< @internal V_FEED (internal source)scale in mV/10 */
+#define MLT_CONST_AUTO_V_STEP_SCALE 134272L /*!< @internal AutoV step scale (tbd)*/
+#define MLT_CONST_P_TH_HVIC 0x6468ADL /*!< @internal threshold programmed during MLT test execution */
+#define MLT_CONST_DSP_TIMER_SCALE 65536L /*!< @internal dsp timer msec lsb (2^16) */
+#define MLT_CONST_DSP_TIMER_V_SCALE 1974L /*!< @internal timed, auto captured v (1/5.0663948e-7v) */
+
+/**@}*/
+
+/**
+ * @internal @defgroup PROSLIC_MLT_DIAG_MASK ProSLIC MLT Diag Bitmasks
+ * Contains bitmask macros for the DIAG registers
+ *
+ * @{
+ */
+#define DIAG_AUTO_V 0x40
+#define DIAG_HPF_EN 0x20
+#define DIAG_TX_FILT_EN 0x10
+#define DIAG_ENABLE 0x08
+#define DIAG_KDC_OFF 0x04
+#define DIAG_DCLPF_44K 0x02
+#define DIAG_FB_OFF 0x01
+#define DIAG_CLR_DIAG1 0x00
+/*
+** DIAG2 BITMASK
+*/
+#define DIAG_SEL_HIRES_VRINGC 0x12
+#define DIAG_SEL_HIRES_VTIPC 0x11
+#define DIAG_HIRES_EN 0x10
+#define DIAG_SEL_IRING 0x0A
+#define DIAG_SEL_ITIP 0x08
+#define DIAG_SEL_VLONG 0x07
+#define DIAG_SEL_VBAT 0x03
+#define DIAG_SEL_VRINGC 0x02
+#define DIAG_SEL_VTIPC 0x01
+#define DIAG_CLR_DIAG1 0x00
+
+#define MADC_NORMAL 0
+#define MADC_HIRES 1
+
+/**@}*/
+
+/*
+** Function Definitions
+*/
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: getRAMScale
+ *
+ * @brief This routine returns the voltage or current scale factor for the passed RAM address
+ *
+ * @param[in] addr - RAM address
+ * @param[in] ext_v_opt - extedned voltage range (1 = enabled)
+ *
+ * @retval int32 - scale factor
+ *
+ * @remark Scale factors presume desired uA or mV
+ *
+ */
+int32 getRAMScale(uInt16 addr, uInt8 ext_v_opt);
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: ReadMADCScaled
+ *
+ * @brief This routine returns the scaled voltage or current represented by the passed RAM location
+ *
+ * @param[in] pProSLICMLT - pointer to ProSLIC channel structure
+ * @param[in] addr - RAM address to read
+ * @param[in] scale - supply scale factor or 0 to scale automatically using getRamScale()
+ *
+ * @retval int32 - scaled voltage or current reading
+ *
+ * \b Example \b Usage:
+ * @code
+ * int32 iloopMeas;
+ *
+ * iloopMeas = ReadMADCScaled(pProslic, MADC_ILOOP,0);
+ * @endcode
+ * @remark Scale factors presume desired uA or mV
+ *
+ */
+int32 ReadMADCScaled(ProSLICMLTType *pProSLICMLT, uInt16 addr, int32 scale);
+
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: setupCoarseSensors
+ *
+ * @brief This routine preparsed VTIPC and VRINGC for use
+ *
+ * @param[in] pProslic - ptr to MLT type
+ * @param[in] tipOffs - ptr to value stored in MADC_VTIPC_DIAG_OS
+ * @param[in] ringOffs - ptr to value stored in MADC_VRINGC_DIAG_OS
+ *
+ * @retval 0
+ *
+ * @remark
+ * This routine does the following
+ * - Powers up MADC
+ * - Powers up VTIPC and VRINGC course sensors
+ * - Sets GPIOs for analog inputs
+ * - Reads coarse sensor offsets from RAM
+ *
+ */
+int setupCoarseSensors(ProSLICMLTType *pProslic, int32 *tipOffs, int32 *ringOffs);
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: readCoarseSensor
+ *
+ * @brief This routine reads MADC_DIAG_RAW and returns
+ *
+ * @param[in] pProSLICMLT - pointer to ProSLIC MLT structure
+ * @param[in] offset - offset value
+ *
+ * @retval int32 - value of MADC_DIAG_RAW with passed offset applied
+ *
+ * \b Example \b Usage:
+ * @code
+ * int32 senseValue;
+ * int32 tipOffs;
+ * int32 ringOffs;
+ *
+ * setupCoarseSensors(pProSLICMLT->pProslic,&tipOffs);
+ *
+ * senseValue = readCoarseSensor(pProSLICMLT,tipOffs);
+ *
+ * @endcode
+ * @remark
+ * This routine does the following
+ * - Reads MADC_DIAG_RAW
+ * - Applies default sensor offset, MLT_CONST_COARSE_SENSE_VOFFS
+ * - Applies user supplied offset
+ * - Returns adjusted value
+ *
+ */
+int32 readCoarseSensor(ProSLICMLTType *pProSLICMLT,int32 offset);
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: diagSet
+ *
+ * @brief This routine programs DIAG1 register
+ *
+ * @param[in] pProslic - pointer to ProSLIC channel structure
+ * @param[in] setting - OR'd bitmask of DIAG1 bits
+ *
+ * @retval void - none
+ *
+ * \b Example \b Usage:
+ * @code
+ *
+ * diagSet(pProSLICMLT->pProslic, DIAG_AUTO_V | DIAG_ENABLE | DIAG_KDC_OFF);
+ *
+ * @endcode
+ *
+ * @remark
+ */
+void diagSet(proslicChanType_ptr pProslic, uInt8 setting);
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: diagSelect
+ *
+ * @brief This routine selects the signal to be routed to the DIAG block
+ *
+ * @param[in] pProslic - pointer to ProSLIC channel structure
+ * @param[in] select - signal to be routed to DIAG block (see diag bitmasks)
+ * @param[in] hiresFlag - indicates if HIRES mode is enabled
+ *
+ * @retval void - none
+ *
+ * \b Example \b Usage:
+ * @code
+ *
+ * diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VTIPC, MADC_HIRES);
+ *
+ * @endcode
+ *
+ * @remark
+ */
+void diagSelect(proslicChanType_ptr pProslic, uInt8 select, int hiresFlag);
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: setupDiagCurrentSource
+ *
+ * @brief This routine sets the diag current source using the ringer dc offset
+ *
+ * @param[in] pProslic - pointer to ProSLIC channel structure
+ * @param[in] iForce - dc current in uA
+ *
+ * @retval void - none
+ *
+ * \b Example \b Usage:
+ * @code
+ * int32 iforce1 = 5000;
+ *
+ * setupDiagCurrentSource(pProSLICMLT->pProslic, iforce1);
+ *
+ * @endcode
+ *
+ * @remark This routine does not enable diag
+ */
+void setupDiagCurrentSource(proslicChanType_ptr pProslic, int32 iForce);
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: readTerminalValues
+ *
+ * @brief Reads sample of all commonly used terminals
+ *
+ * @param[in] pProSLICMLT - pointer to ProSLIC MLT structure
+ * @param[in] term - pointer to ProSLIC terminal measurement structure
+ * @param[in] index - sample index
+ *
+ * @retval void - none
+ *
+ *
+ * @remark
+ */
+void readTerminalValues(ProSLICMLTType *pProSLICMLT,ProSLIC_term_meas_t *term, int index);
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: printTerminalValues
+ *
+ * @brief Displays sample of all commonly used terminals
+ *
+ * @param[in] term - pointer to ProSLIC terminal measurement structure
+ * @param[in] index - sample index
+ *
+ * @retval void - none
+ *
+ *
+ * @remark
+ */
+void printTerminalValues(ProSLIC_iv_t *term, int index);
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: setup300HzBandbass
+ *
+ * @brief Setup audio diag filters for 300Hz bandpass
+ *
+ * @param[in] pProSLICMLT - pointer to ProSLIC MLT structure
+ *
+ * @retval void - none
+ *
+ *
+ * @remark
+ */
+void setup300HzBandpass(ProSLICMLTType * pProSLICMLT);
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: setup3014HzBandbass
+ *
+ * @brief Setup audio diag filters for 3014Hz bandpass
+ *
+ * @param[in] pProSLICMLT - pointer to ProSLIC MLT structure
+ *
+ * @retval void - none
+ *
+ *
+ * @remark
+ */
+void setup3014HzBandpass(ProSLICMLTType * pProSLICMLT);
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: setup300HzTestTone
+ *
+ * @brief Setup diag tone gen for 300Hz current source
+ *
+ * @param[in] pProSLICMLT - pointer to ProSLIC MLT structure
+ *
+ * @retval void - none
+ *
+ *
+ * @remark
+ */
+void setup300HzTestTone(ProSLICMLTType * pProSLICMLT);
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: setup3014HzTestTone
+ *
+ * @brief Setup diag tone gen for 3014Hz current source
+ *
+ * @param[in] pProSLICMLT - pointer to ProSLIC MLT structure
+ *
+ * @retval void - none
+ *
+ *
+ * @remark
+ */
+void setup3014HzTestTone(ProSLICMLTType * pProSLICMLT);
+
+/*@}*/
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_macro.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_macro.h
new file mode 100644
index 0000000..b144247
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_macro.h
@@ -0,0 +1,107 @@
+/*
+** Copyright (c) 2010-2011 by Silicon Laboratories
+**
+** $Id: proslic_mlt_macro.h 5071 2015-08-27 21:29:12Z elgeorge $
+**
+*/
+/*! \file proslic_mlt_macro.h
+** \brief ProSLIC MLT commonly used macros
+**
+** This is the header file for commonly used macros
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+*/
+
+#ifndef PROSLIC_MLT_MACRO_H
+#define PROSLIC_MLT_MACRO_H
+
+
+/* Timer and Control Macros*/
+#ifdef SI_USE_IFACE_MACROS
+#define WriteReg pProslic->deviceId->ctrlInterface->WriteRegister_fptr
+#define ReadReg pProslic->deviceId->ctrlInterface->ReadRegister_fptr
+#define pProHW pProslic->deviceId->ctrlInterface->hCtrl
+#define Reset pProslic->deviceId->ctrlInterface->Reset_fptr
+#define Delay pProslic->deviceId->ctrlInterface->Delay_fptr
+#define pProTimer pProslic->deviceId->ctrlInterface->hTimer
+#define WriteRAM pProslic->deviceId->ctrlInterface->WriteRAM_fptr
+#define ReadRAM pProslic->deviceId->ctrlInterface->ReadRAM_fptr
+#define getTime pProslic->deviceId->ctrlInterface->getTime_fptr
+#define TimeElapsed pProslic->deviceId->ctrlInterface->timeElapsed_fptr
+#define SetSemaphore pProslic->deviceId->ctrlInterface->Semaphore_fptr
+#endif
+
+
+/*
+** Chip Type
+*/
+#define CHIPTYPE pProslic->deviceId->chipType
+#define CHIPREV pProslic->deviceId->chipRev
+#define MLT_CHIPTYPE pProSLICMLT->pProslic->deviceId->chipType
+#define MLT_CHIPREV pProSLICMLT->pProslic->deviceId->chipRev
+#define pMLT_CHAN pProSLICMLT->pProslic->channel
+#define pMLT_HW pProSLICMLT->pProHW
+#define MLT17X_REVB (pProSLICMLT->CHIPREV == SI3217X_REVB)
+#define MLT17X_REVC (pProSLICMLT->CHIPREV == SI3217X_REVC)
+#define MLT18X_REVA (pProSLICMLT->CHIPREV == SI3218X_REVA)
+#define MLT26X_REVC (pProSLICMLT->CHIPREV == SI3226X_REVC)
+#define MLT28X_REVA (pProSLICMLT->CHIPREV == SI3228X_REVA)
+
+#define MLT_VALID_SI3217X_DEVICE ((int)((MLT_CHIPTYPE >= SI32171)&&(MLT_CHIPTYPE <= SI32179)))
+#define MLT_VALID_SI3218X_DEVICE ((int)((MLT_CHIPTYPE >= SI32180)&&(MLT_CHIPTYPE <= SI32189)))
+#define MLT_VALID_SI3226X_DEVICE ((int)((MLT_CHIPTYPE >= SI32260)&&(MLT_CHIPTYPE <= SI32269)))
+#define MLT_VALID_SI3228X_DEVICE ((int)((MLT_CHIPTYPE >= SI32280)&&(MLT_CHIPTYPE <= SI32289)))
+
+/*
+** Commonly Used Macros
+*/
+#define MLT_MAX_PRESERVE_RAM 128
+#define MLT_MAX_PRESERVE_REG 32
+#define MLT_MAX_IV_SAMPLES 6
+#define MLT_MAX_AUTOV_SAMPLES 128
+
+#define INCREASE 1
+#define DECREASE 0
+#define OPEN 0
+#define CLOSE 1
+#define LOW 0
+#define HIGH 1
+#define TIP_TERM 0
+#define RING_TERM 1
+
+/*
+ The following macros used by the ProSLIC MLT software are system constants
+ that should not be modified.
+*/
+#define MLT_AUDIAG_SCALE_3014HZ 2992L /**< TESTAVO to impedance conversion at 3014Hz (2.992e-4) */
+#define MLT_AUDIAG_SCALE_300HZ 4091L /**< TESTAVO to impedance conversion at 300Hz (4.091e-4) */
+#define MLT_MIN_CAPACITANCE 50L /**< Minimum capacitance to be reported (nF*10) */
+#define MLT_MAX_CAPACITANCE 120000L /**< Maximum capacitance to be reported (nF*10) */
+#define MLT_RS_CAPACITANCE_TEST 23656648L /**< Rkdc squared (4863.81ohms ^2) */
+#define MLT_HVIC_SWITCH_RES 20L /**< Resistance of hvic switches to gnd (ohms*10) */
+#define SI3226X_MLT_HVIC_SWITCH_RES 120L
+#define SI3228X_MLT_HVIC_SWITCH_RES 120L
+#define MLT_RINGOF_IBIAS_P5 0x17C29D1L /**< Diag current source +5mA */
+#define MLT_RINGOF_IBIAS_N5 0x1E83D62FL /**< Diag current source -5mA */
+#define MLT_MAX_300HZ_TESTAVO 3000000L /**< Maximum testavo measurement w/ 300Hz source */
+#define MLT_RES_VBATH_SET 0x47AE125L /**< VBATH for resistance test */
+#define MLT_MAX_I_THRESH 0xFFFFFFFL
+
+/*
+** RAM or Memory-mapped register locations used by patch
+*/
+enum {
+ MLT17X_B_PSR_DSP_TIMED_VTR2_VAL = 999,
+ MLT17X_B_PSR_DSP_TIMED_VTR1_VAL,
+ MLT17X_B_PSR_DSP_STOP_TIMER2_VAL,
+ MLT17X_B_PSR_DSP_STOP_TIMER1_VAL,
+ MLT17X_B_PSR_DSP_STOP_TIMER2,
+ MLT17X_B_PSR_DSP_STOP_TIMER1,
+};
+
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_math.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_math.h
new file mode 100644
index 0000000..34fd01c
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/proslic_mlt_math.h
@@ -0,0 +1,100 @@
+/*
+** Copyright (c) 2007-2011 by Silicon Laboratories
+**
+** $Id: proslic_mlt_math.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file proslic_mlt_math.h
+** \brief ProSLIC MLT math functions header file
+**
+** This is the header file for the ProSLIC MLT math functions.
+**
+** \author Silicon Laboratories, Inc (laj, cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+*/
+
+#ifndef PROSLIC_MLT_MATH_H
+#define PROSLIC_MLT_MATH_H
+
+/** @internal @defgroup PROSLIC_MATH ProSLIC math utility APIs
+ * This group contains the APIs for math utilities used by the ProSLIC API driver code
+ *
+ *@{
+ */
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: fp_abs
+ *
+ * @brief This routine returns absolute value of a 32-bit 2's compliment number
+ *
+ * @param[in] a - value to be evaluated
+ *
+ * @retval int32 - abs(a)
+ *
+ *
+ */
+int32 fp_abs(int32 a);
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: Isqrt
+ *
+ * @brief This routine returns a square-root approximation of passed 32-bit unsigned integer
+ *
+ * @param[in] number - value to be square rooted
+ *
+ * @retval uInt32 - square root of number
+ *
+ *
+ */
+uInt32 Isqrt(uInt32 number);
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: computeResTC
+ *
+ * @brief This routine returns an impedance based on time constant measurement
+ *
+ * @param[in] v1 - first voltage measurement
+ * @param[in] v2 - second voltage measurement
+ * @param[in] delta_t - time delay between voltage measurements
+ * @param[in] cEst - estimated capacitance
+ * @param[in] *tau - estimate time constant
+ *
+ * @retval int32 - impedance
+ *
+ *
+ */
+int32 computeResTC(int32 v1, int32 v2, int32 delta_t, int32 cEst , int32 *tau);
+
+
+
+/*******************************************************************************************/
+/**
+ *
+ * Function: dBLookup
+ *
+ * @brief This routine converts the passed ratio to dB
+ *
+ * @param[in] number - input ratio (typ mVpk/mVpkref)
+ *
+ * @retval int32 - 20*LOG10(number)
+ *
+ * @remark This function returns the power (in dB*10) given an input voltage ratio
+ * (mVpk/mVpkref) based on a lookup table
+ *
+ */
+int32 dBLookup(uInt32 number);
+
+/*@}*/
+#endif
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3217x_mlt.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3217x_mlt.h
new file mode 100644
index 0000000..fa80f59
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3217x_mlt.h
@@ -0,0 +1,265 @@
+/*
+** Copyright (c) 2009-2012 by Silicon Laboratories
+**
+** $Id: si3217x_mlt.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file si3217x_mlt.h
+** \brief Si3217x ProSLIC MLT interface header file
+**
+** This is the si3217x MLT interface header file
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef SI3217X_MLT_H
+#define SI3217X_MLT_H
+
+/** @internal @defgroup SI3217X_DRIVER_LEVEL_API Si3217x Driver Level MLT APIs
+ * This group contains si3217x MLT driver functions that are called by the top level ProSLIC MLT APIs
+ *
+ * Functions in this module should not be called directly by code outside of the ProSLIC API
+ *@{
+ */
+
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3217x_mlt_foreign_voltages
+ *
+ * @brief This routine should be called to measure AC and DC voltages on TIP/RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->hazVAC.measTG - Tip to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measRG - Ring to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measTR - Tip to Ring AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVDC.measTG - Tip to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measRG - Ring to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measTR - Tip to Ring DC voltage (mV)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_foreign_voltages() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_foreign_voltages, MLT_POLL_RATE
+ *
+ */
+int si3217x_mlt_foreign_voltages (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState);
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3217x_mlt_hazard_voltages
+ *
+ * @brief This routine should be called to measure AC and DC voltages on TIP/RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->hazVAC.measTG - Tip to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measRG - Ring to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measTR - Tip to Ring AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVDC.measTG - Tip to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measRG - Ring to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measTR - Tip to Ring DC voltage (mV)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_hazard_voltages() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_foreign_voltages(), MLT_POLL_RATE
+ *
+ */
+int si3217x_mlt_hazard_voltages (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState);
+
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3217x_mlt_resistive_faults
+ *
+ * @brief This routine should be called to measure resistance from TIP-RING, TIP-GND, and RING-GND
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->resFaults.measTG - Tip to GND Resistance (ohms*10)
+ * - pProSLICMLT->resFaults.measRG - Ring to GND Resistance (ohms*10)
+ * - pProSLICMLT->resFaults.measTR - Tip to Ring Resistance (ohms*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_resistive_faults() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_resistive_faults(), MLT_POLL_RATE
+ *
+ */
+int si3217x_mlt_resistive_faults( ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState);
+
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3217x_mlt_receiver_offhook
+ *
+ * @brief This routine should be called to detect the presence of an offhook receiver (FXO)
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data in pProSLICMLT->roh.rohTrue:
+ * - RC_MLT_ROH_NOFAULT - no resistive fault or offhook receiver detected
+ * - RC_MLT_ROH_FAIL_ROH - offhook receiver detected
+ * - RC_MLT_ROH_FAIL_RESFAULT - resistive fault detected
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_receiver_offhook() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_receiver_offhook(), MLT_POLL_RATE
+ *
+ */
+int si3217x_mlt_receiver_offhook (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_roh_state *pState);
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3217x_mlt_ren
+ *
+ * @brief This routine should be called to measure the Ringer Equivalence Number (REN)
+ * present between TIP-RING
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->ren.revValue - REN value (REN / 1000)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_ren() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - 1 REN is presummed to be 6930ohms + 8uF
+ *
+ * @sa ProSLIC_mlt_init_ren(), MLT_POLL_RATE
+ *
+ */
+int si3217x_mlt_ren (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_state *pState);
+
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3217x_mlt_capacitance
+ *
+ * @brief This routine should be called to measure the capacitance betweein TIP-RING, TIP-GND, and RING-GND
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->capFaults.measTG - Tip to GND Capacitance (nF*10)
+ * - pProSLICMLT->capFaults.measRG - Ring to GND Capacitance (nF*10)
+ * - pProSLICMLT->capFaults.measTR - Tip to Ring Capacitance (nF*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_capacitance() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_capacitance(), MLT_POLL_RATE
+ *
+ */
+int si3217x_mlt_capacitance (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3217x_mlt_ren_cap
+ *
+ * @brief This routine should be called to measure the capacitance betweein TIP-RING, including the phone
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->capFaults.measTR - Tip to Ring Capacitance (nF*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_capacitance() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_capacitance(), MLT_POLL_RATE
+ *
+ */
+int si3217x_mlt_ren_cap (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_cap_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3217x_mlt_abort
+ *
+ * @brief The routine should be called to abort an MLT routine
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_ABORT are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_abort() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa MLT_POLL_RATE
+ *
+ */
+int si3217x_mlt_abort (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_test_state *pState);
+
+
+/**@}*/
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3218x_mlt.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3218x_mlt.h
new file mode 100644
index 0000000..249ad84
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3218x_mlt.h
@@ -0,0 +1,265 @@
+/*
+** Copyright (c) 2009-2012 by Silicon Laboratories
+**
+** $Id: si3218x_mlt.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file si3218x_mlt.h
+** \brief Si3218x ProSLIC MLT interface header file
+**
+** This is the si3218x MLT interface header file
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef SI3218X_MLT_H
+#define SI3218X_MLT_H
+
+/** @internal @defgroup SI3218X_DRIVER_LEVEL_API Si3218x Driver Level MLT APIs
+ * This group contains si3218x MLT driver functions that are called by the top level ProSLIC MLT APIs
+ *
+ * Functions in this module should not be called directly by code outside of the ProSLIC API
+ *@{
+ */
+
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3218x_mlt_foreign_voltages
+ *
+ * @brief This routine should be called to measure AC and DC voltages on TIP/RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->hazVAC.measTG - Tip to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measRG - Ring to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measTR - Tip to Ring AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVDC.measTG - Tip to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measRG - Ring to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measTR - Tip to Ring DC voltage (mV)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_foreign_voltages() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_foreign_voltages, MLT_POLL_RATE
+ *
+ */
+int si3218x_mlt_foreign_voltages (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState);
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3218x_mlt_hazard_voltages
+ *
+ * @brief This routine should be called to measure AC and DC voltages on TIP/RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->hazVAC.measTG - Tip to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measRG - Ring to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measTR - Tip to Ring AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVDC.measTG - Tip to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measRG - Ring to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measTR - Tip to Ring DC voltage (mV)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_hazard_voltages() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_foreign_voltages(), MLT_POLL_RATE
+ *
+ */
+int si3218x_mlt_hazard_voltages (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState);
+
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3218x_mlt_resistive_faults
+ *
+ * @brief This routine should be called to measure resistance from TIP-RING, TIP-GND, and RING-GND
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->resFaults.measTG - Tip to GND Resistance (ohms*10)
+ * - pProSLICMLT->resFaults.measRG - Ring to GND Resistance (ohms*10)
+ * - pProSLICMLT->resFaults.measTR - Tip to Ring Resistance (ohms*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_resistive_faults() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_resistive_faults(), MLT_POLL_RATE
+ *
+ */
+int si3218x_mlt_resistive_faults( ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState);
+
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3218x_mlt_receiver_offhook
+ *
+ * @brief This routine should be called to detect the presence of an offhook receiver (FXO)
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data in pProSLICMLT->roh.rohTrue:
+ * - RC_MLT_ROH_NOFAULT - no resistive fault or offhook receiver detected
+ * - RC_MLT_ROH_FAIL_ROH - offhook receiver detected
+ * - RC_MLT_ROH_FAIL_RESFAULT - resistive fault detected
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_receiver_offhook() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_receiver_offhook(), MLT_POLL_RATE
+ *
+ */
+int si3218x_mlt_receiver_offhook (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_roh_state *pState);
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3218x_mlt_ren
+ *
+ * @brief This routine should be called to measure the Ringer Equivalence Number (REN)
+ * present between TIP-RING
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->ren.revValue - REN value (REN / 1000)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_ren() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - 1 REN is presummed to be 6930ohms + 8uF
+ *
+ * @sa ProSLIC_mlt_init_ren(), MLT_POLL_RATE
+ *
+ */
+int si3218x_mlt_ren (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_state *pState);
+
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3218x_mlt_capacitance
+ *
+ * @brief This routine should be called to measure the capacitance betweein TIP-RING, TIP-GND, and RING-GND
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->capFaults.measTG - Tip to GND Capacitance (nF*10)
+ * - pProSLICMLT->capFaults.measRG - Ring to GND Capacitance (nF*10)
+ * - pProSLICMLT->capFaults.measTR - Tip to Ring Capacitance (nF*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_capacitance() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_capacitance(), MLT_POLL_RATE
+ *
+ */
+int si3218x_mlt_capacitance (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3218x_mlt_ren_cap
+ *
+ * @brief This routine should be called to measure the capacitance betweein TIP-RING, including the phone
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->capFaults.measTR - Tip to Ring Capacitance (nF*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_capacitance() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_capacitance(), MLT_POLL_RATE
+ *
+ */
+int si3218x_mlt_ren_cap (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_cap_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3218x_mlt_abort
+ *
+ * @brief The routine should be called to abort an MLT routine
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_ABORT are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_abort() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa MLT_POLL_RATE
+ *
+ */
+int si3218x_mlt_abort (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_test_state *pState);
+
+
+/**@}*/
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3226x_mlt.h b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3226x_mlt.h
new file mode 100644
index 0000000..bd916d7
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/include/si3226x_mlt.h
@@ -0,0 +1,258 @@
+/*
+** Copyright (c) 2010-2011 by Silicon Laboratories
+**
+** $Id: si3226x_mlt.h 4551 2014-10-27 20:57:24Z nizajerk $
+**
+*/
+/*! \file si3226x_mlt.h
+** \brief Si3226x ProSLIC MLT interface header file
+**
+** This is the si3226x MLT interface header file
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#ifndef SI3226X_MLT_H
+#define SI3226X_MLT_H
+
+/** @internal @defgroup SI3226X_DRIVER_LEVEL_API Si3226x Driver Level MLT APIs
+ * This group contains si3226x MLT driver functions that are called by the top level ProSLIC MLT APIs
+ *
+ * Functions in this module should not be called directly by code outside of the ProSLIC API
+ *@{
+ */
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3226x_mlt_foreign_voltages
+ *
+ * @brief This routine should be called to measure AC and DC voltages on TIP/RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->hazVAC.measTG - Tip to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measRG - Ring to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measTR - Tip to Ring AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVDC.measTG - Tip to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measRG - Ring to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measTR - Tip to Ring DC voltage (mV)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_foreign_voltages() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_foreign_voltages, MLT_POLL_RATE
+ *
+ */
+int si3226x_mlt_foreign_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3226x_mlt_hazard_voltages
+ *
+ * @brief This routine should be called to measure AC and DC voltages on TIP/RING
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->hazVAC.measTG - Tip to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measRG - Ring to GND AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVAC.measTR - Tip to Ring AC voltage (Vrms^2 / 100)
+ * - pProSLICMLT->hazVDC.measTG - Tip to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measRG - Ring to GND DC voltage (mV)
+ * - pProSLICMLT->hazVDC.measTR - Tip to Ring DC voltage (mV)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_hazard_voltages() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_foreign_voltages(), MLT_POLL_RATE
+ *
+ */
+int si3226x_mlt_hazard_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3226x_mlt_resistive_faults
+ *
+ * @brief This routine should be called to measure resistance from TIP-RING, TIP-GND, and RING-GND
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->resFaults.measTG - Tip to GND Resistance (ohms*10)
+ * - pProSLICMLT->resFaults.measRG - Ring to GND Resistance (ohms*10)
+ * - pProSLICMLT->resFaults.measTR - Tip to Ring Resistance (ohms*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_resistive_faults() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_resistive_faults(), MLT_POLL_RATE
+ *
+ */
+int si3226x_mlt_resistive_faults(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3226x_mlt_receiver_offhook
+ *
+ * @brief This routine should be called to detect the presence of an offhook receiver (FXO)
+ *
+ * @param[in,out] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data in pProSLICMLT->roh.rohTrue:
+ * - RC_MLT_ROH_NOFAULT - no resistive fault or offhook receiver detected
+ * - RC_MLT_ROH_FAIL_ROH - offhook receiver detected
+ * - RC_MLT_ROH_FAIL_RESFAULT - resistive fault detected
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_receiver_offhook() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_receiver_offhook(), MLT_POLL_RATE
+ *
+ */
+int si3226x_mlt_receiver_offhook(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_roh_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3226x_mlt_ren
+ *
+ * @brief This routine should be called to measure the Ringer Equivalence Number (REN)
+ * present between TIP-RING
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->ren.revValue - REN value (REN / 1000)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_ren() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ * - 1 REN is presummed to be 6930ohms + 8uF
+ *
+ * @sa ProSLIC_mlt_init_ren(), MLT_POLL_RATE
+ *
+ */
+int si3226x_mlt_ren(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_state *pState);
+
+
+/*******************************************************************************************/
+/**
+ * Function: si3226x_mlt_capacitance
+ *
+ * @brief This routine should be called to measure the capacitance betweein TIP-RING, TIP-GND, and RING-GND
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->capFaults.measTG - Tip to GND Capacitance (nF*10)
+ * - pProSLICMLT->capFaults.measRG - Ring to GND Capacitance (nF*10)
+ * - pProSLICMLT->capFaults.measTR - Tip to Ring Capacitance (nF*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_capacitance() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_capacitance(), MLT_POLL_RATE
+ *
+ */
+int si3226x_mlt_capacitance (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3226x_mlt_ren_cap
+ *
+ * @brief This routine should be called to measure the capacitance betweein TIP-RING, including the phone
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * Upon success, the function returns back in pProSLICMLT, the following data:
+ *
+ * - pProSLICMLT->capFaults.measTR - Tip to Ring Capacitance (nF*10)
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_capacitance() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa ProSLIC_mlt_init_capacitance(), MLT_POLL_RATE
+ *
+ */
+int si3226x_mlt_ren_cap (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_cap_state *pState);
+
+/*******************************************************************************************/
+/**
+ * Function: si3226x_mlt_abort
+ *
+ * @brief The routine should be called to abort an MLT routine
+ *
+ * @param[in] *pProSLICMLT - pointer to MLT channel structure
+ * @param[in] *pState - state variable to track reentry
+ *
+ * @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_ABORT are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+ *
+ * @remark
+ * - This function is wrapped by @ref ProSLIC_mlt_abort() and should not be called by
+ * high level application code
+ * - This routine should be called on a per channel basis
+ * - This function is reentrant and must be called at periodic intervals defined by MLT_POLL_RATE
+ *
+ * @sa MLT_POLL_RATE
+ *
+ */
+int si3226x_mlt_abort (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_test_state *pState);
+
+
+/**@}*/
+
+#endif
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt.c b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt.c
new file mode 100644
index 0000000..6ab0c7e
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt.c
@@ -0,0 +1,410 @@
+/*
+** Copyright (c) 2009-2016 by Silicon Laboratories
+**
+** $Id: proslic_mlt.c 5512 2016-01-25 17:42:11Z elgeorge $
+**
+*/
+/*! \file proslic_mlt.c
+** \brief ProSLIC MLT API implementation file
+**
+** This is the implementation of the ProSLIC API function prototypes
+**
+** \author Silicon Laboratories, Inc (laj,cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#define SI_USE_IFACE_MACROS
+#include "proslic_mlt.h"
+
+
+#ifdef SI3217X
+#include "si3217x_mlt.h"
+#endif
+#ifdef SI3218X
+#include "si3218x_mlt.h"
+#endif
+#ifdef SI3226X
+#include "si3226x_mlt.h"
+#endif
+#ifdef SI3228X
+/* #include "si3228x_mlt.h" */
+#error "Si3228x not supported in MLT API 3.0.0."
+#endif
+
+#if (MLT_POLL_RATE >10) || (MLT_POLL_RATE < 2)
+#error "MLT_POLL_RATE setting requirements not met - needs to be between 2 and 10 mSec"
+#endif
+
+/*
+** ProSLIC MLT State Initialization Functions - documented in proslic_mlt.h
+*/
+/* Foreign/Hazardous Voltages */
+int ProSLIC_mlt_init_foreign_voltages(ProSLIC_mlt_foreign_voltages_state *pState,int samples)
+{
+ pState->State.stage = 0;
+ pState->samples = samples;
+ return RC_MLT_NO_ERROR;
+}
+/* Receiver Offhook */
+int ProSLIC_mlt_init_receiver_offhook(ProSLIC_mlt_roh_state *pState)
+{
+ pState->State.stage = 0;
+ return RC_MLT_NO_ERROR;
+}
+/* REN */
+int ProSLIC_mlt_init_ren(ProSLIC_mlt_ren_state *pState)
+{
+ pState->State.stage = 0;
+ return RC_MLT_NO_ERROR;
+}
+/* Resistive Faults */
+int ProSLIC_mlt_init_resistive_faults(ProSLIC_mlt_rmeas_state *pState)
+{
+ pState->TRState.stage = 0;
+ pState->TGState.stage = 0;
+ pState->RGState.stage = 0;
+ pState->setupState.stage = 0;
+ return RC_MLT_NO_ERROR;
+}
+
+/* Capacitance */
+int ProSLIC_mlt_init_capacitance(ProSLIC_mlt_capacitance_state *pState)
+{
+ pState->State.stage = 0;
+ return RC_MLT_NO_ERROR;
+}
+
+/*
+** ProSLIC MLT Functions - documented in proslic_mlt.h
+*/
+
+/* Foreign/Hazardous Voltages */
+int ProSLIC_mlt_foreign_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState)
+{
+ int returnCode = RC_MLT_UNSUPPORTED_TEST;
+#ifdef SI3217X
+ if(MLT_VALID_SI3217X_DEVICE)
+ returnCode = si3217x_mlt_foreign_voltages(pProSLICMLT,pState);
+#endif
+#ifdef SI3218X
+ if(MLT_VALID_SI3218X_DEVICE)
+ returnCode = si3218x_mlt_foreign_voltages(pProSLICMLT,pState);
+#endif
+#ifdef SI3226X
+ if(MLT_VALID_SI3226X_DEVICE)
+ returnCode = si3226x_mlt_foreign_voltages(pProSLICMLT,pState);
+#endif
+#ifdef SI3228X
+ if(MLT_VALID_SI3228X_DEVICE)
+ returnCode = si3228x_mlt_foreign_voltages(pProSLICMLT,pState);
+#endif
+ return returnCode;
+}
+
+/* Foreign/Hazardous Voltages */
+int ProSLIC_mlt_hazard_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState)
+{
+ int returnCode = RC_MLT_UNSUPPORTED_TEST;
+#ifdef SI3217X
+ if(MLT_VALID_SI3217X_DEVICE)
+ returnCode = si3217x_mlt_foreign_voltages(pProSLICMLT,pState);
+#endif
+#ifdef SI3218X
+ if(MLT_VALID_SI3218X_DEVICE)
+ returnCode = si3218x_mlt_foreign_voltages(pProSLICMLT,pState);
+#endif
+#ifdef SI3226X
+ if(MLT_VALID_SI3226X_DEVICE)
+ returnCode = si3226x_mlt_foreign_voltages(pProSLICMLT,pState);
+#endif
+#ifdef SI3228X
+ if(MLT_VALID_SI3228X_DEVICE)
+ returnCode = si3228x_mlt_foreign_voltages(pProSLICMLT,pState);
+#endif
+ return returnCode;
+}
+
+
+/* Resistive Faults */
+int ProSLIC_mlt_resistive_faults(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState)
+{
+ int returnCode = RC_MLT_UNSUPPORTED_TEST;
+#ifdef SI3217X
+ if(MLT_VALID_SI3217X_DEVICE)
+ returnCode = si3217x_mlt_resistive_faults(pProSLICMLT,pState);
+#endif
+#ifdef SI3218X
+ if(MLT_VALID_SI3218X_DEVICE)
+ returnCode = si3218x_mlt_resistive_faults(pProSLICMLT,pState);
+#endif
+#ifdef SI3226X
+ if(MLT_VALID_SI3226X_DEVICE)
+ returnCode = si3226x_mlt_resistive_faults(pProSLICMLT,pState);
+#endif
+#ifdef SI3228X
+ if(MLT_VALID_SI3228X_DEVICE)
+ returnCode = si3228x_mlt_resistive_faults(pProSLICMLT,pState);
+#endif
+ return returnCode;
+}
+
+/* Receiver Offhook */
+int ProSLIC_mlt_receiver_offhook(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_roh_state *pState)
+{
+ int returnCode = RC_MLT_UNSUPPORTED_TEST;
+#ifdef SI3217X
+ if(MLT_VALID_SI3217X_DEVICE)
+ returnCode = si3217x_mlt_receiver_offhook(pProSLICMLT,pState);
+#endif
+#ifdef SI3218X
+ if(MLT_VALID_SI3218X_DEVICE)
+ returnCode = si3218x_mlt_receiver_offhook(pProSLICMLT,pState);
+#endif
+#ifdef SI3226X
+ if(MLT_VALID_SI3226X_DEVICE)
+ returnCode = si3226x_mlt_receiver_offhook(pProSLICMLT,pState);
+#endif
+#ifdef SI3228X
+ if(MLT_VALID_SI3228X_DEVICE)
+ returnCode = si3228x_mlt_receiver_offhook(pProSLICMLT,pState);
+#endif
+ return returnCode;
+}
+
+/* REN */
+int ProSLIC_mlt_ren(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_state *pState)
+{
+ int returnCode = RC_MLT_UNSUPPORTED_TEST;
+#ifdef SI3217X
+ if(MLT_VALID_SI3217X_DEVICE)
+ returnCode = si3217x_mlt_ren(pProSLICMLT,pState);
+#endif
+#ifdef SI3218X
+ if(MLT_VALID_SI3218X_DEVICE)
+ returnCode = si3218x_mlt_ren(pProSLICMLT,pState);
+#endif
+#ifdef SI3226X
+ if(MLT_VALID_SI3226X_DEVICE)
+ returnCode = si3226x_mlt_ren(pProSLICMLT,pState);
+#endif
+#ifdef SI3228X
+ if(MLT_VALID_SI3228X_DEVICE)
+ returnCode = si3228x_mlt_ren(pProSLICMLT,pState);
+#endif
+ return returnCode;
+}
+
+
+/* Capacitance */
+int ProSLIC_mlt_capacitance(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState)
+{
+ int returnCode = RC_MLT_UNSUPPORTED_TEST;
+#ifdef SI3217X
+ if(MLT_VALID_SI3217X_DEVICE)
+ returnCode = si3217x_mlt_capacitance(pProSLICMLT,pState);
+#endif
+#ifdef SI3218X
+ if(MLT_VALID_SI3218X_DEVICE)
+ returnCode = si3218x_mlt_capacitance(pProSLICMLT,pState);
+#endif
+#ifdef SI3226X
+ if(MLT_VALID_SI3226X_DEVICE)
+ returnCode = si3226x_mlt_capacitance(pProSLICMLT,pState);
+#endif
+#ifdef SI3228X
+ if(MLT_VALID_SI3228X_DEVICE)
+ returnCode = si3228x_mlt_capacitance(pProSLICMLT,pState);
+#endif
+
+ return returnCode;
+}
+
+/* REN Capacitance */
+int ProSLIC_mlt_ren_cap(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_cap_state *pState)
+{
+ int returnCode = RC_MLT_UNSUPPORTED_TEST;
+#ifdef SI3217X
+ if(MLT_VALID_SI3217X_DEVICE)
+ returnCode = si3217x_mlt_ren_cap(pProSLICMLT,pState);
+#endif
+#ifdef SI3218X
+ if(MLT_VALID_SI3218X_DEVICE)
+ returnCode = si3218x_mlt_ren_cap(pProSLICMLT,pState);
+#endif
+#ifdef SI3226X
+ if(MLT_VALID_SI3226X_DEVICE)
+ returnCode = si3226x_mlt_ren_cap(pProSLICMLT,pState);
+#endif
+#ifdef SI3228X
+ if(MLT_VALID_SI3228X_DEVICE)
+ returnCode = si3228x_mlt_ren_cap(pProSLICMLT,pState);
+#endif
+ return returnCode;
+}
+
+
+/* Abort */
+int ProSLIC_mlt_abort (ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_test_state *pState)
+{
+ int returnCode = RC_MLT_UNSUPPORTED_TEST;
+#ifdef SI3217X
+ if(MLT_VALID_SI3217X_DEVICE)
+ returnCode = si3217x_mlt_abort(pProSLICMLT,pState);
+#endif
+#ifdef SI3218X
+ if(MLT_VALID_SI3218X_DEVICE)
+ returnCode = si3218x_mlt_abort(pProSLICMLT,pState);
+#endif
+#ifdef SI3226X
+ if(MLT_VALID_SI3226X_DEVICE)
+ returnCode = si3226x_mlt_abort(pProSLICMLT,pState);
+#endif
+#ifdef SI3228X
+ if(MLT_VALID_SI3228X_DEVICE)
+ returnCode = si3228x_mlt_abort(pProSLICMLT,pState);
+#endif
+ return returnCode;
+}
+
+
+/* Initialize REN calibration constants */
+int ProSLIC_mlt_init_ren_cal (ProSLICMLTType *pProSLICMLT)
+{
+ if(pProSLICMLT != NULL)
+ {
+ pProSLICMLT->ren.calData.extraLowRenOffset = MLT_RENCAL_ELO_REN_OFFS;
+ pProSLICMLT->ren.calData.extraLowRenSlope = MLT_RENCAL_ELO_REN_SLOPE;
+ pProSLICMLT->ren.calData.highRenOffs = MLT_RENCAL_HI_REN_OFFS;
+ pProSLICMLT->ren.calData.highRenSlope = MLT_RENCAL_HI_REN_SLOPE;
+ pProSLICMLT->ren.calData.lowRenOffs = MLT_RENCAL_LO_REN_OFFS;
+ pProSLICMLT->ren.calData.lowRenSlope = MLT_RENCAL_LO_REN_SLOPE;
+ pProSLICMLT->ren.calData.renTrans = MLT_RENCAL_REN_TRANS;
+ return RC_MLT_NO_ERROR;
+ }
+ return RC_MLT_BAD_PARAM;
+}
+
+#ifdef MLT_RUNTIME_CONFIG
+/* Initialize MLT configuration from data structure */
+int ProSLIC_mlt_init_default_config (ProSLICMLTType *pProSLICMLT)
+{
+ if(pProSLICMLT != NULL)
+ {
+ pProSLICMLT->mlt_config.mlt_ext_v_flag = 0;
+ pProSLICMLT->mlt_config.mlt_poll_rate = MLT_POLL_RATE;
+ pProSLICMLT->mlt_config.mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+ pProSLICMLT->mlt_config.mlt_line_cap = MLT_LINE_CAPACITANCE;
+ pProSLICMLT->mlt_config.mlt_emi_cap = MLT_EMI_CAPACITANCE;
+ pProSLICMLT->mlt_config.mlt_femf_samples = MLT_FEMF_SAMPLES;
+ pProSLICMLT->ren.calData.extraLowRenOffset = MLT_RENCAL_ELO_REN_OFFS;
+ pProSLICMLT->ren.calData.extraLowRenSlope = MLT_RENCAL_ELO_REN_SLOPE;
+ pProSLICMLT->ren.calData.highRenOffs = MLT_RENCAL_HI_REN_OFFS;
+ pProSLICMLT->ren.calData.highRenSlope = MLT_RENCAL_HI_REN_SLOPE;
+ pProSLICMLT->ren.calData.lowRenOffs = MLT_RENCAL_LO_REN_OFFS;
+ pProSLICMLT->ren.calData.lowRenSlope = MLT_RENCAL_LO_REN_SLOPE;
+ pProSLICMLT->ren.calData.renTrans = MLT_RENCAL_REN_TRANS;
+ return RC_MLT_NO_ERROR;
+ }
+ return RC_MLT_BAD_PARAM;
+}
+
+#endif
+
+/* Initialize REN calibration constants with passed rencal structure */
+int ProSLIC_mlt_init_ren_cal_multichan (ProSLICMLTType *pProSLICMLT, ProSLIC_rencal_t *ren_cal_data )
+{
+ if(pProSLICMLT != NULL)
+ {
+ pProSLICMLT->ren.calData.extraLowRenOffset = ren_cal_data[pProSLICMLT->pProslic->channel].extraLowRenOffset;
+ pProSLICMLT->ren.calData.extraLowRenSlope = ren_cal_data[pProSLICMLT->pProslic->channel].extraLowRenSlope;
+ pProSLICMLT->ren.calData.highRenOffs = ren_cal_data[pProSLICMLT->pProslic->channel].highRenOffs;
+ pProSLICMLT->ren.calData.highRenSlope = ren_cal_data[pProSLICMLT->pProslic->channel].highRenSlope;
+ pProSLICMLT->ren.calData.lowRenOffs = ren_cal_data[pProSLICMLT->pProslic->channel].lowRenOffs;
+ pProSLICMLT->ren.calData.lowRenSlope = ren_cal_data[pProSLICMLT->pProslic->channel].lowRenSlope;
+ pProSLICMLT->ren.calData.renTrans = ren_cal_data[pProSLICMLT->pProslic->channel].renTrans;
+ return RC_MLT_NO_ERROR;
+ }
+ return RC_MLT_BAD_PARAM;
+}
+
+/* Copy passed MLT structure's calibration constants to passed rencal struct */
+int ProSLIC_mlt_store_ren_cal_multichan (ProSLICMLTType *pProSLICMLT, ProSLIC_rencal_t *ren_cal_data )
+{
+ if(pProSLICMLT != NULL)
+ {
+ ren_cal_data[pProSLICMLT->pProslic->channel].extraLowRenOffset = pProSLICMLT->ren.calData.extraLowRenOffset;
+ ren_cal_data[pProSLICMLT->pProslic->channel].extraLowRenSlope = pProSLICMLT->ren.calData.extraLowRenSlope;
+ ren_cal_data[pProSLICMLT->pProslic->channel].highRenOffs = pProSLICMLT->ren.calData.highRenOffs;
+ ren_cal_data[pProSLICMLT->pProslic->channel].highRenSlope = pProSLICMLT->ren.calData.highRenSlope;
+ ren_cal_data[pProSLICMLT->pProslic->channel].lowRenOffs = pProSLICMLT->ren.calData.lowRenOffs;
+ ren_cal_data[pProSLICMLT->pProslic->channel].lowRenSlope = pProSLICMLT->ren.calData.lowRenSlope;
+ ren_cal_data[pProSLICMLT->pProslic->channel].renTrans = pProSLICMLT->ren.calData.renTrans;
+ return RC_MLT_NO_ERROR;
+ }
+ else
+ return RC_MLT_BAD_PARAM;
+}
+
+
+/*
+** MLT Test Data and Flag Management
+**
+*/
+
+/*
+** ProSLIC_mlt_clear_results - documented in proslic_mlt.h
+*/
+int ProSLIC_mlt_clear_results(ProSLICMLTType *pProSLICMLT)
+{
+ /* Hazardous/Foriegn Voltages Test */
+ pProSLICMLT->hazVAC.measTG = 0;
+ pProSLICMLT->hazVAC.measTR = 0;
+ pProSLICMLT->hazVAC.measRG = 0;
+ pProSLICMLT->hazVAC.resultsValid = 0;
+ pProSLICMLT->hazVDC.measTG = 0;
+ pProSLICMLT->hazVDC.measTR = 0;
+ pProSLICMLT->hazVDC.measRG = 0;
+ pProSLICMLT->hazVDC.resultsValid = 0;
+
+ /* Resistive Faults Test */
+ pProSLICMLT->resFaults.measTG = 20000000L;
+ pProSLICMLT->resFaults.measTR = 20000000L;
+ pProSLICMLT->resFaults.measRG = 20000000L;
+ pProSLICMLT->resFaults.ahsFlag = 0;
+ pProSLICMLT->resFaults.resultsValid = 0;
+
+ /* Receiver Offhook Test */
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_NOFAULT;
+ pProSLICMLT->roh.resultsValid = 0;
+
+ /* REN Test */
+ pProSLICMLT->ren.renValue = 0;
+ pProSLICMLT->ren.resultsValid = 0;
+
+ /* Capacitance Test */
+ pProSLICMLT->capFaults.measTG = 0;
+ pProSLICMLT->capFaults.measTR = 0;
+ pProSLICMLT->capFaults.measRG = 0;
+ pProSLICMLT->capFaults.resultsValid = 0;
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/*
+** ProSLIC_mlt_version - documented in proslic_mlt.h
+*/
+extern const char *ProSLICMLTAPIVersion;
+const char *ProSLIC_mlt_version(void)
+{
+ return (const char *)ProSLICMLTAPIVersion;
+}
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_dcfeed.c b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_dcfeed.c
new file mode 100644
index 0000000..6fcb504
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_dcfeed.c
@@ -0,0 +1,292 @@
+/*
+** Copyright (c) 2010 by Silicon Laboratories
+**
+** $Id: proslic_mlt_dcfeed.c 4550 2014-10-27 20:57:00Z nizajerk $
+**
+*/
+/*! \file proslic_mlt_dcfeed.c
+** \brief DC feed setup during MLT tests
+**
+** This is the implementation file for the ProSLIC DC feed setup during MLT tests
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+** This code may produce different results on different host processors
+**
+*/
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "proslic.h"
+#define SI_USE_IFACE_MACROS
+#include "proslic_mlt.h"
+
+#include "mlt_comm_regs.h"
+
+
+/*
+**
+*/
+void setupDcFeedCloseToZero(ProSLICMLTType *pProSLICMLT){
+ /*sets dc feed close to zero vcm, and vdiff*/
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1C206275L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1A10433FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x3E0BD90L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1E0FA137L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x150D28L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0xC0784L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x603C2L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0xDF58CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x94E5DL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0xAA10L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x10624EL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+ if (pProSLICMLT->pProslic->deviceId->chipRev == 0)
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_AUTO,0x1e);
+ else
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_AUTO,0x1f);
+}
+
+
+
+/*
+**
+*/
+void setupDcFeed10VLONG (ProSLICMLTType *pProSLICMLT){
+ /*set up dc feed for longitudinal resistance measurement V1*/
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x18842BD7L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1F389145L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x1ECE8A98L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1EF744EAL );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x2657F6FL );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0x21D5253L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x168E18CL );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0x8B9779L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x5D0FA6L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x135C2CL );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x116872BL );
+
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+ if (pProSLICMLT->pProslic->deviceId->chipRev == 0)
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_AUTO,0x1e);
+ else
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_AUTO,0x1f);
+}
+
+
+/*
+**
+*/
+void setupDcFeed50VLONG (ProSLICMLTType *pProSLICMLT){
+ /*set up dc feed for longitudinal resistance measurement V2*/
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1D28720FL );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1F5E4A5BL );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x1C617135L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1D6A2C4AL );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x476CA3EL );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0x3C25977L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x2EFD5E5L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0xB026C3L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x5D0FA6L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x241016L );
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x20C49BAL );
+
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+ if (pProSLICMLT->pProslic->deviceId->chipRev == 0)
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_AUTO,0x1e);
+ else
+ {
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_AUTO,0x1f);
+ }
+}
+
+
+
+/*
+**
+*/
+void setupDcFeed35VCM (ProSLICMLTType *pProSLICMLT){
+ /*
+ ** V_VLIM = 2v V_RFEED = 0.8v V_ILIM = 0.2V VCM_OH = 30v VOV_BAT = 0v VOV_GND = 0v
+ ** I_VLIM = 0mA I_RFEED = 5mA I_ILIM = 8mA
+ */
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1B1852DAL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1A10433FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x7C17B20L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1E72E75FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x3C2597L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0x180F09L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x603C2L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0x29E0A4L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x253975L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x1E5E6L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x1EB851FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+ if (pProSLICMLT->pProslic->deviceId->chipRev == 0)
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_AUTO,0x1e);
+ else
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_AUTO,0x1f);
+}
+
+
+
+/*
+**
+*/
+void setupDcFeed35V (ProSLICMLTType *pProSLICMLT){
+ /*set up dcfeed for 35V, 0V VTIP - no overhead*/
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1C8A024CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1F03C159L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x1CC4B75DL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1DD87A3EL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x41C91DBL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0x38633E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x2EFD5E5L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0xD16335L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x5D0FA6L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x21373DL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x11EB852L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+
+}
+
+
+/*
+**
+*/
+void setupDcFeedV1SmallR (ProSLICMLTType *pProSLICMLT){
+ /*set up dcfeed for 40V 14mA so that we are in constant current region for our small R measurement < 2.5k*/
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1A10433FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1DC6E1D3L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x1DD87A3EL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1EB51625L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x4B2EFD5L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0x476CA3EL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x43AA4A6L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0x19029B0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x41248DL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x25F5FDL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x147AE14L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+
+}
+
+
+/*
+**
+*/
+void setupDcFeedV2SmallR (ProSLICMLTType *pProSLICMLT){
+ /*set up dcfeed for 35V, 7ma so that we are in constant current region for our small R measurement < 2.5k*/
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1E3081AAL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1F03C159L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x164E2617L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1C1F426FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x50D2839L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0x4B2EFD5L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x476CA3EL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0xD16335L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x209246L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x28CED6L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x1604189L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+
+}
+
+
+/*
+**
+*/
+void setupDcFeed45V (ProSLICMLTType *pProSLICMLT){
+ /*set up dcfeed for 45V, 0V VTIP - no overhead*/
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1C8A024CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1F03C159L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x1CC4B75DL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1DD87A3EL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x5494DD0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0x4B2EFD5BL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x41C91DBL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0xFFEB09L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x5D0FA6L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x2AB4BCL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x170A3D7L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+
+}
+
+
+/*
+**
+*/
+void setupDcFeedForRENTest (ProSLICMLTType *pProSLICMLT){
+
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1A10433FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1D28720FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0x1D6A2C4AL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1EB51625L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x12CBBF5L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0xD28392L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x965DFAL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0x97396EL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x5D0FA6L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x97D7FL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x23D70A4L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0x500000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0x500000L);
+
+}
+
+
+/*
+**
+*/
+void setupDcFeedAutoV (ProSLICMLTType *pProSLICMLT){
+ /*set up dcfeed for 45V, 0V VTIP - no overhead*/
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_VLIM,0x1E655196);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RFEED,0x1F389145);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA1,0xF64E2617);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_SLOPE_DELTA2,0x1BB0F47C);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_VLIM,0x5A38633);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_RFEED,0x476CA3E);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_V_ILIM,0x3C25977);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_RFEED,0xD92483);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_CONST_ILIM,0x5D0FA6);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_I_VLIM,0x2D8D96);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VCM_OH,0x189374B);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_BAT,0);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_VOV_GND,0);
+
+}
+
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_diag_madc.c b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_diag_madc.c
new file mode 100644
index 0000000..aededa9
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_diag_madc.c
@@ -0,0 +1,342 @@
+/*
+** Copyright (c) 2010-2011 by Silicon Laboratories
+**
+** $Id: proslic_mlt_diag_madc.c 5526 2016-02-04 22:27:57Z elgeorge $
+**
+*/
+/*! \file proslic_mlt_diag_madc.c
+** \brief ProSLIC MLT diag and madc utility functions implementation file
+**
+** This is the implementation file for the ProSLIC MLT diag and madc utility functions
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "proslic.h"
+#define SI_USE_IFACE_MACROS
+#include "proslic_mlt.h"
+#include "proslic_mlt_diag_madc.h"
+
+#include "mlt_comm_regs.h"
+
+#ifdef SI3217X
+#include "mlt17x_b_regs.h"
+#include "mlt17x_c_regs.h"
+#endif
+
+#ifdef SI3218X
+#include "mlt18x_a_regs.h"
+#endif
+
+#ifdef SI3226X
+#include "mlt26x_c_regs.h"
+#endif
+
+#ifdef SI3228X
+#include "mlt28x_a_regs.h"
+#endif
+
+
+/*
+** Function: getRAMScale
+*/
+int32 getRAMScale(uInt16 addr,uInt8 ext_v_opt)
+{
+int32 scale;
+
+ switch(addr)
+ {
+ case MLT_COMM_RAM_MADC_ILOOP:
+ case MLT_COMM_RAM_MADC_ITIP:
+ case MLT_COMM_RAM_MADC_IRING:
+ case MLT_COMM_RAM_MADC_ILONG:
+ scale = MLT_CONST_MADC_I;
+ break;
+
+ case MLT_COMM_RAM_MADC_VTIPC:
+ case MLT_COMM_RAM_MADC_VRINGC:
+ case MLT_COMM_RAM_VDIFF_COARSE:
+ if(ext_v_opt)
+ {
+ scale = MLT_CONST_MADC_VCOARSE_EV;
+ }
+ else
+ {
+ scale = MLT_CONST_MADC_VCOARSE_SV;
+ }
+ break;
+
+ case MLT_COMM_RAM_MADC_VBAT:
+ case MLT_COMM_RAM_MADC_VLONG:
+ case MLT_COMM_RAM_VDIFF_SENSE:
+ case MLT_COMM_RAM_VDIFF_FILT:
+ case MLT_COMM_RAM_VTIP:
+ case MLT_COMM_RAM_VRING:
+ scale = MLT_CONST_MADC_V;
+ break;
+
+ case MLT_COMM_RAM_MADC_DIAG_RAW:
+ case MLT_COMM_RAM_MADC_VTIPC_DIAG_OS:
+ case MLT_COMM_RAM_MADC_VRINGC_DIAG_OS:
+ if(ext_v_opt)
+ {
+ scale = MLT_CONST_MADC_HIRES_V_EV;
+ }
+ else
+ {
+ scale = MLT_CONST_MADC_HIRES_V_SV;
+ }
+ break;
+
+ case MLT_COMM_RAM_RINGOF:
+ scale = MLT_CONST_AUTO_V_RINGOF;
+ break;
+
+ case MLT_COMM_RAM_V_FEED_IN:
+ scale = MLT_CONST_AUTO_V_VFEED;
+ break;
+
+ default:
+ scale = 1;
+ break;
+ }
+
+ return scale;
+}
+
+/*
+** Function: ReadMADCScaled
+*/
+int32 ReadMADCScaled(ProSLICMLTType *pProSLICMLT, uInt16 addr, int32 scale)
+{
+int32 data;
+uInt8 ext_v_opt = 0;
+
+ /*
+ ** Read 29-bit RAM and sign extend to 32-bit
+ */
+ data = pProSLICMLT->ReadRAM(pMLT_HW,pMLT_CHAN,addr);
+ if (data & 0x10000000L)
+ data |= 0xF0000000L;
+
+ /* Determine if extened voltage option applies */
+#ifdef MLT_RUNTIME_CONFIG
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ ext_v_opt = 1;
+ }
+#else
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ ext_v_opt = 1;
+#endif
+#endif
+
+
+ /*
+ ** Scale to provided value, or use defualts if scale = 0
+ */
+ if(scale == 0)
+ scale = getRAMScale(addr,ext_v_opt);
+
+ data /= scale;
+
+ return data;
+}
+
+
+/*
+** Function: setupCoarseSensors
+*/
+int setupCoarseSensors(ProSLICMLTType *pProSLICMLT,int32 *tipOffs,int32 *ringOffs)
+{
+ uInt8 reg;
+
+ /*
+ ** Powerup MADC
+ */
+ reg = pProSLICMLT->ReadReg(pMLT_HW,pMLT_CHAN,MLT_COMM_REG_PDN);
+ reg |= 0x80;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_PDN,reg);
+
+ /*
+ ** Powerup coarse sensors
+ */
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_PD_DC_COARSE_SNS,0x200000L);
+ pProSLICMLT->WriteReg(pMLT_HW,pMLT_CHAN,MLT_COMM_REG_GPIO,0);
+
+ /*
+ ** Read offsets (stored during madc offset calibration)
+ */
+ *tipOffs = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_VTIPC_DIAG_OS,0);
+ *ringOffs = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_VRINGC_DIAG_OS,0);
+
+#ifdef ENABLE_DEBUG
+ if(pProSLICMLT->pProslic->debugMode)
+ {
+ LOGPRINT("proslic_mlt_diag_madc: setupCoarseSensors : tipOffs = %d\n",*tipOffs);
+ LOGPRINT("proslic_mlt_diag_madc: setupCoarseSensors : ringOffs = %d\n",*ringOffs);
+ }
+#endif
+
+ return 0;
+
+}
+
+/*
+** Function: readCoarseSensor
+*/
+int32 readCoarseSensor(ProSLICMLTType *pProSLICMLT,int32 offset)
+{
+ int32 data;
+
+
+ data = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_DIAG_RAW, 0);
+ data -= MLT_CONST_COARSE_SENSE_VOFFS;
+ if(data&0x10000000L)
+ data |= 0xF0000000L;
+ data -= offset;
+ return data;
+}
+
+/*
+** Function: diagSet
+*/
+void diagSet(proslicChanType_ptr pProslic, uInt8 setting)
+{
+ WriteReg(pProHW,pProslic->channel,MLT_COMM_REG_DIAG1, setting);
+}
+
+
+/*
+** Function: diagSelect
+*/
+void diagSelect(proslicChanType_ptr pProslic, uInt8 select, int hiresFlag)
+{
+ if(hiresFlag)
+ select |= DIAG_HIRES_EN;
+
+ WriteReg(pProHW,pProslic->channel,MLT_COMM_REG_DIAG2, select);
+}
+
+/*
+** Funtion: setupDiagCurrentSource
+*/
+void setupDiagCurrentSource (proslicChanType_ptr pProslic, int32 iForce)
+{
+int32 val;
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_RINGAMP,0L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_RINGFR,0L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_SLOPE_RING,0x1F000000L);
+ /* iForce in uA */
+ val = iForce * MLT_CONST_AUTO_V_RINGOF;
+ val &= 0x1FFFFFFFL;
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_RINGOF,val);
+}
+
+
+
+/*
+**
+*/
+void readTerminalValues(ProSLICMLTType *pProSLICMLT,ProSLIC_term_meas_t *term, int index)
+{
+ if(index >= MLT_MAX_IV_SAMPLES)
+ return;
+ term->term.itip[index] = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ITIP,0);
+ term->term.vtip[index] = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VTIP,0);
+ term->term.iring[index] = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_IRING,0);
+ term->term.vring[index] = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VRING,0);
+ term->term.iloop[index] = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP,0);
+ term->term.vloop[index] = term->term.vring[index] - term->term.vtip[index];
+ term->term.ilong[index] = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ILONG,0);
+ term->term.vlong[index] = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_VLONG,0);
+}
+
+
+void printTerminalValues(ProSLIC_iv_t *term, int index)
+{
+ #ifdef ENABLE_DEBUG
+ LOGPRINT ("VTIP %d = %d\n", index,term->vtip[index]);
+ LOGPRINT ("VRING %d = %d\n", index,term->vring[index]);
+ LOGPRINT ("VLOOP %d = %d\n", index,term->vloop[index]);
+ LOGPRINT ("VLONG %d = %d\n\n", index,term->vlong[index]);
+ LOGPRINT ("ITIP %d = %d\n", index,term->itip[index]);
+ LOGPRINT ("IRING %d = %d\n", index,term->iring[index]);
+ LOGPRINT ("ILOOP %d = %d\n", index,term->iloop[index]);
+ LOGPRINT ("ILONG %d = %d\n\n", index,term->ilong[index]);
+ #endif
+}
+
+
+void setup300HzBandpass(ProSLICMLTType * pProSLICMLT)
+{
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB0_1, 0x10B2A0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB1_1, 0x0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB2_1, 0x1FEF4D60L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA1_1, 0xF3F2BB0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA2_1, 0x185119D0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB0_2, 0x2863A0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB1_2, 0x0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB2_2, 0x1FD79C60L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA1_2, 0xF3F2BB0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA2_2, 0x185119D0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB0_3, 0x2899D0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB1_3, 0x0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB2_3, 0x1FD76630L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA1_3, 0xF3F2BB0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA2_3, 0x185119D0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTAVBW, 0x40000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTWLN, 0x7D00000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTAVTH, 0x0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTPKTH, 0x0L);
+
+}
+void setup3014HzBandpass(ProSLICMLTType * pProSLICMLT)
+{
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB0_1, 0x16CFF0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB1_1, 0x0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB2_1, 0x1FE93010L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA1_1, 0x14CA9450L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA2_1, 0x185119D0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB0_2, 0x2845C0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB1_2, 0x0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB2_2, 0x1FD7BA40L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA1_2, 0x14CA9450L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA2_2, 0x185119D0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB0_3, 0x28A850L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB1_3, 0x0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTB2_3, 0x1FD757B0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA1_3, 0x14ca9450L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTA2_3, 0x185119D0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTAVBW, 0x40000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTWLN, 0x7D00000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTAVTH, 0x0L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_TESTPKTH, 0x0L);
+
+}
+void setup300HzTestTone(ProSLICMLTType * pProSLICMLT)
+{
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_OSC1FREQ, 0x7c70000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_OSC1AMP, 0x2a000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_OSC1PHAS, 0x0L);
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_OMODE, 2);
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_OCON, 1); /*enable osc1 */
+}
+void setup3014HzTestTone(ProSLICMLTType * pProSLICMLT)
+{
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_OSC1FREQ, 0x1a480000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_OSC1AMP, 0x376000L);
+ pProSLICMLT->WriteRAM(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_RAM_OSC1PHAS, 0x0L);
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_OMODE, 2);
+ pProSLICMLT->WriteReg(pProSLICMLT->pProHW, pProSLICMLT->pProslic->channel,MLT_COMM_REG_OCON, 1); /*enable osc1 */
+}
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_math.c b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_math.c
new file mode 100644
index 0000000..5afdaee
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_math.c
@@ -0,0 +1,317 @@
+/*
+** Copyright (c) 2007-2011 by Silicon Laboratories
+**
+** $Id: proslic_mlt_math.c 4550 2014-10-27 20:57:00Z nizajerk $
+**
+*/
+/*! \file proslic_mlt_math.c
+** \brief ProSLIC MLT math functions implementation file
+**
+** This is the implementation file for the ProSLIC MLT math functions.
+**
+** \author Silicon Laboratories, Inc (laj, cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+*/
+
+#include "si_voice_datatypes.h"
+
+
+#define BIN_PLACES 16 /*!< Resolution of log estimate */
+#define MLT_CONST_LN 45426 /*!< Constant used in computing natural log */
+
+/*
+** fp_abs - Return absolute value of 32-bit integer
+*/
+int32 fp_abs(int32 a)
+{
+ if (a < 0)
+ return -1 * a;
+ return a;
+}
+
+
+/*
+** Isqrt - estimate square root of 32bit integer
+*/
+uInt32 Isqrt(uInt32 number)
+{
+ uInt32 op, res, one;
+
+ op = number;
+ res = 0;
+
+ /* "one" starts at the highest power of four <= than the argument. */
+ one = 1L << 30; /* second-to-top bit set */
+ while (one > op)
+ one >>= 2;
+
+ while (one != 0)
+ {
+ if (op >= res + one)
+ {
+ op = op - (res + one);
+ res = res + 2 * one;
+ }
+ res >>= 1;
+ one >>= 2;
+ }
+
+
+ return (res);
+}
+/*
+** fp_log2 - Fixed point log base-2 estimate
+*/
+uInt32 fp_log2(int32 input)
+{
+ int i;
+ uInt32 tmp;
+ int divs = 0;
+ uInt32 prod;
+ uInt32 mantissa = 0;
+
+ /* binary point is between bits 15 & 16 */
+ tmp = input << 16;
+
+ while (tmp >= (2 << 16)) {
+ tmp = tmp >> 1;
+ divs++;
+ }
+
+ for (i = 0; i < BIN_PLACES; i++) {
+
+ prod = ((tmp >> 2) * (tmp >> 2)) >> 12;
+
+ mantissa = mantissa << 1;
+ if (prod >= (2 << 16)) {
+ prod = prod >> 1;
+ mantissa = mantissa | 1;
+ } else {
+ }
+ tmp = prod;
+ }
+
+ return ((divs << 16) | (mantissa << (16 - BIN_PLACES)));
+}
+
+
+/*
+** fp_ln - fixed point log base-e estimate
+*/
+uInt32 fp_ln(int32 input)
+{
+ return (fp_log2(input) >> 2) * (MLT_CONST_LN >> 2) >> 12;
+}
+
+/*@}*/
+
+
+/*
+** computeResTC - convert ratio to dB
+*/
+int32 computeResTC(int32 v1, int32 v2, int32 delta_t, int32 cEst , int32 *tau)
+{
+ int32 lnDiff;
+ int32 rEst;
+
+ lnDiff = fp_ln(v1) - fp_ln(v2);
+ if(lnDiff > 0){
+ *tau = (65536*delta_t) / lnDiff;
+ }
+ else {
+ *tau = 65536*delta_t; /* Arbitrarily large number */
+ }
+
+ rEst = 1000000L/cEst; /* Should never underflow */
+
+ rEst *= (*tau);
+ return rEst;
+}
+
+
+/*
+** dB lookup table
+*/
+const uInt32 dBTable10_n60 [] = {
+ 31623,
+ 29854,
+ 28184,
+ 26607,
+ 25119,
+ 23714,
+ 22387,
+ 21135,
+ 19953,
+ 18836,
+ 17783,
+ 16788,
+ 15849,
+ 14962,
+ 14125,
+ 13335,
+ 12589,
+ 11885,
+ 11220,
+ 10593,
+ 10000,
+ 9441,
+ 8913,
+ 8414,
+ 7943,
+ 7499,
+ 7079,
+ 6683,
+ 6310,
+ 5957,
+ 5623,
+ 5309,
+ 5012,
+ 4732,
+ 4467,
+ 4217,
+ 3981,
+ 3758,
+ 3548,
+ 3350,
+ 3162,
+ 2985,
+ 2818,
+ 2661,
+ 2512,
+ 2371,
+ 2239,
+ 2113,
+ 1995,
+ 1884,
+ 1778,
+ 1679,
+ 1585,
+ 1496,
+ 1413,
+ 1334,
+ 1259,
+ 1189,
+ 1122,
+ 1059,
+ 1000,
+ 944,
+ 891,
+ 841,
+ 794,
+ 750,
+ 708,
+ 668,
+ 631,
+ 596,
+ 562,
+ 531,
+ 501,
+ 473,
+ 447,
+ 422,
+ 398,
+ 376,
+ 355,
+ 335,
+ 316,
+ 299,
+ 282,
+ 266,
+ 251,
+ 237,
+ 224,
+ 211,
+ 200,
+ 188,
+ 178,
+ 168,
+ 158,
+ 150,
+ 141,
+ 133,
+ 126,
+ 119,
+ 112,
+ 106,
+ 100,
+ 94,
+ 89,
+ 84,
+ 79,
+ 75,
+ 71,
+ 67,
+ 63,
+ 60,
+ 56,
+ 53,
+ 50,
+ 47,
+ 45,
+ 42,
+ 40,
+ 38,
+ 35,
+ 33,
+ 32,
+ 30,
+ 28,
+ 27,
+ 25,
+ 24,
+ 22,
+ 21,
+ 20,
+ 19,
+ 18,
+ 17,
+ 16,
+ 15,
+ 14,
+ 13,
+ 13,
+ 12,
+ 11,
+ 11,
+ 10
+};
+
+
+/*
+** dbLookup - looks up dB value for passed ratio
+*/
+int32 dBLookup(uInt32 number)
+{
+ int i;
+ uInt32 err;
+
+ if(number >= dBTable10_n60[0])
+ {
+ return 10000; /* out of range - clamp at 10dB */
+ }
+
+ for(i=0;i<139;i++)
+ {
+ if((number < dBTable10_n60[i])&&(number >= dBTable10_n60[i+1]))
+ {
+ /* See which level it is closest to */
+ err = dBTable10_n60[i] - number;
+ if(err < (number - dBTable10_n60[i+1]))
+ {
+ return (10000 - i*500);
+ }
+ else
+ {
+ return (10000 - (i+1)*500);
+ }
+ }
+ }
+ /* No solution found? Odd..but return -40.5dB */
+ return -60000;
+}
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_version.c b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_version.c
new file mode 100644
index 0000000..81ac8bc
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/proslic_mlt_version.c
@@ -0,0 +1,22 @@
+/*
+** Copyright (c) 2016 by Silicon Laboratories
+**
+** file: proslic_mlt_version.c
+**
+** Distributed by:
+** Silicon Laboratories, Inc
+**
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+**
+** THIS FILE IS AUTOGENERATED - DO NOT MODIFY
+**
+*/
+
+
+
+char *ProSLICMLTAPIVersion= "3.0.0";
+
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3217x_mlt.c b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3217x_mlt.c
new file mode 100644
index 0000000..004c352
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3217x_mlt.c
@@ -0,0 +1,4468 @@
+/*
+** Copyright (c) 2007-2014 by Silicon Laboratories
+**
+** $Id: si3217x_mlt.c 5526 2016-02-04 22:27:57Z elgeorge $
+**
+*/
+/*! \file si3217x_mlt.c
+** \brief Si3217x ProSLIC MLT interface implementation file
+**
+** This is the implementation file for the Si3217x MLT functions
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+** This code may produce different results on different host processors
+**
+*/
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#define SI_USE_IFACE_MACROS
+#include "proslic_mlt.h"
+#include "proslic_mlt_math.h"
+#include "proslic_mlt_diag_madc.h"
+#include "proslic_mlt_dcfeed.h"
+
+#include "si3217x.h"
+#include "si3217x_intf.h"
+#include "si3217x_mlt.h"
+#include "mlt_comm_regs.h"
+#include "mlt17x_b_regs.h"
+#include "mlt17x_c_regs.h"
+
+
+/*
+** Datalogging Macro
+*/
+#ifdef ENABLE_DEBUG
+#define MLT_DEBUG_LOG(...) \
+ if(pProSLICMLT->pProslic->debugMode) {\
+ LOGPRINT(__VA_ARGS__);\
+ }
+#else
+#define MLT_DEBUG_LOG(...) do {} while(0)
+#endif
+
+/*
+** MLT Specific Patch RAM Locations
+*/
+#define MLT17X_C_PRAM_VTR3 796
+#define MLT17X_C_PRAM_STOP_TIMER3 798
+#define MLT17X_C_PRAM_STOP_TIMER3_VAL 797
+
+extern Si3217x_General_Cfg Si3217x_General_Configuration;
+typedef int (*execAutoV_fptr)(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState);
+
+/*******************************************************/
+
+/*
+** List of RAM Addresses to be stored before each MLT test is executed
+*/
+
+/* Common RAM */
+static const uInt16 si3217x_comm_preserve_RAM[] = {
+ MLT_COMM_RAM_SLOPE_VLIM,
+ MLT_COMM_RAM_SLOPE_RFEED,
+ MLT_COMM_RAM_SLOPE_ILIM,
+ MLT_COMM_RAM_SLOPE_RING,
+ MLT_COMM_RAM_SLOPE_DELTA1,
+ MLT_COMM_RAM_SLOPE_DELTA2,
+ MLT_COMM_RAM_V_VLIM,
+ MLT_COMM_RAM_V_RFEED,
+ MLT_COMM_RAM_V_ILIM,
+ MLT_COMM_RAM_CONST_RFEED,
+ MLT_COMM_RAM_CONST_ILIM,
+ MLT_COMM_RAM_I_VLIM,
+ MLT_COMM_RAM_VCM_OH,
+ MLT_COMM_RAM_VOV_BAT,
+ MLT_COMM_RAM_VOV_GND,
+ MLT_COMM_RAM_P_TH_HVIC,
+ MLT_COMM_RAM_VCMDAC_SCALE_MAN,
+ MLT_COMM_RAM_LCROFFHK,
+ MLT_COMM_RAM_LCRONHK,
+ MLT_COMM_RAM_RINGAMP,
+ MLT_COMM_RAM_RINGOF,
+ MLT_COMM_RAM_RTPER,
+ MLT_COMM_RAM_RINGFR,
+ MLT_COMM_RAM_RINGPHAS,
+ MLT_COMM_RAM_VCM_RING,
+ MLT_COMM_RAM_COUNTER_VTR_VAL,
+ MLT_COMM_RAM_LONGHITH,
+ MLT_COMM_RAM_LONGLOTH,
+ MLT_COMM_RAM_RA_EN_B,
+ MLT_COMM_RAM_AUDIO_MAN,
+ MLT_COMM_RAM_PD_BIAS,
+ MLT_COMM_RAM_PD_DC_BUF,
+ MLT_COMM_RAM_PD_AC_ADC,
+ MLT_COMM_RAM_PD_AC_DAC,
+ MLT_COMM_RAM_PD_AC_SNS,
+ MLT_COMM_RAM_PD_CM,
+ MLT_COMM_RAM_LKG_UPT_ACTIVE,
+ MLT_COMM_RAM_LKG_UPR_ACTIVE,
+ MLT_COMM_RAM_LKG_DNT_ACTIVE,
+ MLT_COMM_RAM_LKG_DNR_ACTIVE,
+ MLT_COMM_RAM_COMP_Z,
+ MLT_COMM_RAM_EZSYNTH_B0,
+ MLT_COMM_RAM_VBATR_EXPECT,
+ MLT_COMM_RAM_VBATH_EXPECT,
+ MLT_COMM_RAM_RXACGAIN,
+ MLT_COMM_RAM_RXACGAIN_SAVE,
+ MLT_COMM_RAM_OSC1FREQ,
+ MLT_COMM_RAM_OSC1AMP,
+ MLT_COMM_RAM_OSC1PHAS,
+ MLT_COMM_RAM_HVIC_STATE_MAN,
+ MLT_COMM_RAM_TESTB0_1,
+ MLT_COMM_RAM_TESTB1_1,
+ MLT_COMM_RAM_TESTB2_1,
+ MLT_COMM_RAM_TESTA1_1,
+ MLT_COMM_RAM_TESTA2_1,
+ MLT_COMM_RAM_TESTB0_2,
+ MLT_COMM_RAM_TESTB1_2,
+ MLT_COMM_RAM_TESTB2_2,
+ MLT_COMM_RAM_TESTA1_2,
+ MLT_COMM_RAM_TESTA2_2,
+ MLT_COMM_RAM_TESTB0_3,
+ MLT_COMM_RAM_TESTB1_3,
+ MLT_COMM_RAM_TESTB2_3,
+ MLT_COMM_RAM_TESTA1_3,
+ MLT_COMM_RAM_TESTA2_3,
+ MLT_COMM_RAM_TESTAVBW,
+ MLT_COMM_RAM_TESTWLN,
+ MLT_COMM_RAM_TESTAVTH,
+ MLT_COMM_RAM_TESTPKTH,
+ 0 /* NULL TERMINATE */
+};
+
+/* Rev B Specific RAM */
+static const uInt16 si3217x_B_preserve_RAM[] = {
+ MLT17X_B_RAM_STDBY_THRLO,
+ MLT17X_B_RAM_STDBY_THRHI,
+ MLT17X_B_RAM_LKG_UPT_STBY,
+ MLT17X_B_RAM_LKG_UPR_STBY,
+ MLT17X_B_RAM_LKG_DNT_STBY,
+ MLT17X_B_RAM_LKG_DNR_STBY,
+ MLT17X_B_RAM_DIAG_V_TAR,
+ 0 /* NULL TERMINATE */
+};
+
+
+/* Rev C Specific RAM */
+static const uInt16 si3217x_C_preserve_RAM[] = {
+ MLT17X_C_RAM_STOP_TIMER2_VAL,
+ MLT17X_C_RAM_STOP_TIMER2,
+ MLT17X_C_RAM_STOP_TIMER1_VAL,
+ MLT17X_C_RAM_STOP_TIMER1,
+ MLT17X_C_RAM_DIAG_V_TAR,
+ 0 /* NULL TERMINATE */
+};
+
+
+/* Common Registers */
+static const uInt8 si3217x_comm_preserve_Reg[] = {
+ MLT_COMM_REG_LINEFEED,
+ MLT_COMM_REG_PDN,
+ MLT_COMM_REG_RINGCON,
+ MLT_COMM_REG_AUTO,
+ MLT_COMM_REG_IRQEN1,
+ MLT_COMM_REG_IRQEN2,
+ MLT_COMM_REG_IRQEN3,
+ MLT_COMM_REG_IRQEN4,
+ MLT_COMM_REG_ENHANCE,
+ MLT_COMM_REG_DIGCON,
+ MLT_COMM_REG_GPIO,
+ MLT_COMM_REG_GPIO_CFG1,
+ MLT_COMM_REG_GPIO_CFG2,
+ MLT_COMM_REG_GPIO_CFG3,
+ MLT_COMM_REG_DIAG1,
+ MLT_COMM_REG_DIAG2,
+ MLT_COMM_REG_OCON,
+ MLT_COMM_REG_OMODE,
+ MLT_COMM_REG_RA,
+ 0 /* NULL TERMINATE */
+};
+
+/* RevB Registers */
+static const uInt8 si3217x_B_preserve_Reg[] = {
+ 0 /* NULL TERMINATE */
+};
+
+
+/* RevC Registers */
+static const uInt8 si3217x_C_preserve_Reg[] = {
+ MLT17X_C_REG_DIAG3,
+ 0 /* NULL TERMINATE */
+};
+
+
+/**
+ * @internal @defgroup SI3217X_DRV_STATIC Si3217x Driver Level Static APIs
+ * These functions are used by the Si3217x driver and never called from a higher level routine
+ *
+ * @{
+ */
+/********************************************************************************/
+/**
+** @brief Delay function utilizing reentry
+**
+** @param[in] *pState - MLT state structure
+** @param[in] delayCount - number of reentries or polling cycles
+**
+** @retval void
+**
+** @todo Implement poll rate adjustment in this function
+*/
+static void delay_poll (ProSLIC_mlt_test_state *pState,uInt16 delayCount){
+ pState->waitIterations++;
+ if ((pState->waitIterations == delayCount) || (delayCount == 0)){
+ pState->waitIterations=0;
+ pState->stage++;
+ }
+}
+
+
+/********************************************************************************/
+/**
+** @brief Stores select RAM and register values defined by
+** si3217x_preserve_RAM and si3217x_preserve_RAM arrays.
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+static void si3217x_preserve_state (ProSLICMLTType *pProSLICMLT){
+int i;
+
+ i=0;
+ while(si3217x_comm_preserve_RAM[i] != 0)
+ {
+ pProSLICMLT->preserveRAM[i].address = si3217x_comm_preserve_RAM[i];
+ pProSLICMLT->preserveRAM[i].initValue = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,si3217x_comm_preserve_RAM[i]);
+ i++;
+ }
+ pProSLICMLT->preserveRAM[i].address = 0; /* Null Terminate */
+
+ if(MLT_CHIPREV == SI3217X_REVB)
+ {
+ i=0;
+ while(si3217x_B_preserve_RAM[i] != 0)
+ {
+ pProSLICMLT->preserveAuxRAM[i].address = si3217x_B_preserve_RAM[i];
+ pProSLICMLT->preserveAuxRAM[i].initValue = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,si3217x_B_preserve_RAM[i]);
+ i++;
+ }
+ pProSLICMLT->preserveAuxRAM[i].address = 0; /* Null Terminate */
+ }
+ else
+ {
+ i=0;
+ while(si3217x_C_preserve_RAM[i] != 0)
+ {
+ pProSLICMLT->preserveAuxRAM[i].address = si3217x_C_preserve_RAM[i];
+ pProSLICMLT->preserveAuxRAM[i].initValue = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,si3217x_C_preserve_RAM[i]);
+ i++;
+ }
+ pProSLICMLT->preserveAuxRAM[i].address = 0; /* Null Terminate */
+
+ }
+
+ i=0;
+ while(si3217x_comm_preserve_Reg[i] != 0)
+ {
+ pProSLICMLT->preserveReg[i].address = si3217x_comm_preserve_Reg[i];
+ pProSLICMLT->preserveReg[i].initValue = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,si3217x_comm_preserve_Reg[i]);
+ i++;
+ }
+ pProSLICMLT->preserveReg[i].address = 0; /* Null Terminate */
+
+ if(MLT_CHIPREV == SI3217X_REVB)
+ {
+ i=0;
+ while(si3217x_B_preserve_Reg[i] != 0)
+ {
+ pProSLICMLT->preserveAuxReg[i].address = si3217x_B_preserve_Reg[i];
+ pProSLICMLT->preserveAuxReg[i].initValue = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,si3217x_B_preserve_Reg[i]);
+ i++;
+ }
+ pProSLICMLT->preserveAuxReg[i].address = 0; /* Null Terminate */
+ }
+ else
+ {
+ i=0;
+ while(si3217x_C_preserve_Reg[i] != 0)
+ {
+ pProSLICMLT->preserveAuxReg[i].address = si3217x_C_preserve_Reg[i];
+ pProSLICMLT->preserveAuxReg[i].initValue = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,si3217x_C_preserve_Reg[i]);
+ i++;
+ }
+ pProSLICMLT->preserveAuxReg[i].address = 0; /* Null Terminate */
+
+ }
+}
+
+
+/********************************************************************************/
+/**
+** @brief Restores RAM and register data defined by si3217x_preserve_RAM and
+** si3217x_preserve_REG array of addresses
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+static void si3217x_restore_state (ProSLICMLTType *pProSLICMLT){
+int i;
+
+ i=0;
+ while(pProSLICMLT->preserveRAM[i].address != 0)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveRAM[i].address,pProSLICMLT->preserveRAM[i].initValue);
+ i++;
+ }
+
+ i=0;
+ while(pProSLICMLT->preserveAuxRAM[i].address != 0)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveAuxRAM[i].address,pProSLICMLT->preserveAuxRAM[i].initValue);
+ i++;
+ }
+
+ i=0;
+ while(pProSLICMLT->preserveReg[i].address != 0)
+ {
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveReg[i].address,pProSLICMLT->preserveReg[i].initValue);
+ i++;
+ }
+
+ i=0;
+ while(pProSLICMLT->preserveAuxReg[i].address != 0)
+ {
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveAuxReg[i].address,pProSLICMLT->preserveAuxReg[i].initValue);
+ i++;
+ }
+}
+
+
+/********************************************************************************/
+/**
+** @brief Setup DSP Timers
+**
+** @param[in] *pProslic - Pointer to channel object
+** @param[in] timer1 - Timer 1 preset (usec)
+** @param[in] timer2 - Timer 2 preset (usec)
+** @param[in] timer3 - Timer 3 preset (usec)
+**
+** @retval void
+**
+*/
+static void setupDspTimers(proslicChanType_ptr pProslic, int timer1, int timer2, int timer3)
+{
+int32 t1;
+int32 t2;
+int32 t3;
+uInt8 regTmp;
+
+ t1 = timer1*MLT_CONST_DSP_TIMER_SCALE;
+ t2 = timer2*MLT_CONST_DSP_TIMER_SCALE;
+ t3 = timer3*MLT_CONST_DSP_TIMER_SCALE;
+
+ if(CHIPREV == SI3217X_REVB)
+ {
+ regTmp = ReadReg(pProHW,pProslic->channel,MLT_COMM_REG_USERSTAT);
+ WriteReg(pProHW,pProslic->channel,MLT_COMM_REG_USERSTAT,regTmp&0xFD); /* Clear USERSTAT[1] */
+ WriteRAM(pProHW,pProslic->channel,MLT17X_B_PSR_DSP_STOP_TIMER2_VAL, t2);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_B_PSR_DSP_STOP_TIMER2, t2);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_B_PSR_DSP_STOP_TIMER1_VAL, t1);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_B_PSR_DSP_STOP_TIMER1, t1);
+ }
+ else
+ {
+ regTmp = ReadReg(pProHW,pProslic->channel,MLT17X_C_REG_DIAG3);
+ WriteReg(pProHW,pProslic->channel,MLT17X_C_REG_DIAG3,regTmp&0xFD);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_C_PRAM_STOP_TIMER3_VAL, t3);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_C_PRAM_STOP_TIMER3, t3);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_C_RAM_STOP_TIMER2_VAL, t2);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_C_RAM_STOP_TIMER2, t2);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_C_RAM_STOP_TIMER1_VAL, t1);
+ WriteRAM(pProHW,pProslic->channel,MLT17X_C_RAM_STOP_TIMER1, t1);
+ }
+}
+
+
+static void armDspTimers(proslicChanType_ptr pProslic)
+{
+uInt8 regTmp;
+ regTmp = ReadReg(pProHW,pProslic->channel,MLT_COMM_REG_USERSTAT);
+ WriteReg(pProHW,pProslic->channel,MLT_COMM_REG_USERSTAT,regTmp|0x02);
+}
+
+static void readDspTimerV(proslicChanType_ptr pProslic, int32 *v1, int32 *v2, int32 *v3)
+{
+int16 addr1,addr2,addr3;
+
+ if(CHIPREV == SI3217X_REVB)
+ {
+ addr1 = MLT17X_B_PSR_DSP_TIMED_VTR1_VAL;
+ addr2 = MLT17X_B_PSR_DSP_TIMED_VTR2_VAL;
+ addr3 = 0;
+ }
+ else
+ {
+ addr1 = MLT17X_C_RAM_VTR1;
+ addr2 = MLT17X_C_RAM_VTR2;
+ addr3 = MLT17X_C_PRAM_VTR3;
+ }
+
+ *v1 = ReadRAM(pProHW,pProslic->channel,addr1);
+ if (*v1 & 0x10000000L)
+ *v1 |= 0xF0000000L;
+ *v2 = ReadRAM(pProHW,pProslic->channel,addr2);
+ if (*v2 & 0x10000000L)
+ *v2 |= 0xF0000000L;
+
+ *v1 /= MLT_CONST_DSP_TIMER_V_SCALE;
+ *v2 /= MLT_CONST_DSP_TIMER_V_SCALE;
+
+ if(CHIPREV >= SI3217X_REVC)
+ {
+ *v3 = ReadRAM(pProHW,pProslic->channel,addr3);
+ if (*v3 & 0x10000000L)
+ *v3 |= 0xF0000000L;
+
+ *v3 /= MLT_CONST_DSP_TIMER_V_SCALE;
+ }
+ else
+ {
+ *v3 = 0;
+ }
+
+}
+
+
+static void gndOpenTerm(proslicChanType_ptr pProslic, int gndOn)
+{
+ if(gndOn)
+ {
+ if(CHIPREV == SI3217X_REVB)
+ {
+ uInt8 rev_test;
+ rev_test = (uInt8)((ReadRAM(pProHW,pProslic->channel,1791)>>20)&0x000000FFL);
+ if(rev_test == 0x10)
+ {
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE, 0x2F000L);
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE, 0x6F0000L);
+ }
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE, 0x2F000L);
+ }
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_PD_CM, 0x300000L);
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_PD_CM, 0x0L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE_MAN, 0x0L);
+ }
+}
+
+/********************************************************************************/
+/**
+** @brief Establish AUTO-V step size from measured dV/dt
+**
+** @param[in] pProSLICMLT - pointer to ProSLIC channel structure
+** @param[in] pState - Pointer to resistance test state structure
+**
+** @retval int32
+
+** @remark
+** - The constants applied in this function were empirically derived.
+** - Settle times test voltages may be modified by the user, but it is not recommended.
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+*/
+static int setupAutovForDvdt(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState)
+{
+int return_val = RC_MLT_ERROR;
+
+ switch(pState->active_term)
+ {
+ case MLT_TERM_TR:
+ return_val = RC_NONE;
+
+ pState->interval = 10; /* Fast interval req'd to monitor for AHS charge pump */
+
+ if((pState->dvdt_tr > 0) && (pState->dvdt_tr <= 95))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 2000000L;
+ }
+ else if((pState->dvdt_tr > 95) && (pState->dvdt_tr <= 120))
+ {
+ pState->setupState.settleTime = 500;
+ pState->step = 800000L;
+ }
+ else if((pState->dvdt_tr > 120) && (pState->dvdt_tr <= 150))
+ {
+ pState->setupState.settleTime = 400;
+ pState->step = 400000L;
+ }
+ else if((pState->dvdt_tr > 150) && (pState->dvdt_tr <= 210))
+ {
+ pState->setupState.settleTime = 300;
+ pState->step = 200000L;
+ }
+ else
+ {
+ pState->setupState.settleTime = 200;
+ pState->step = 120000L;
+ }
+
+ /* Adjust test voltages and settle time if AHS detected */
+ if(pState->ahs_det.detected > 0)
+ {
+ pState->setupState.settleTime = MLT_RES_AUTOV_DIFF_AHS_SETTLE;
+ pState->vtar[0] = MLT_RES_AUTOV_DIFF_AHS_V1;
+ if(pState->ahs_det.detected == 1)
+ pState->vtar[1] = MLT_RES_AUTOV_DIFF_AHS_V2;
+ }
+ else
+ {
+ pState->vtar[0] = MLT_RES_AUTOV_DIFF_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_DIFF_V2;
+ }
+
+ break;
+
+
+ case MLT_TERM_TG:
+ case MLT_TERM_RG:
+ return_val = RC_NONE;
+ pState->interval = 30;
+
+ if(MLT17X_REVC)
+ {
+ if((pState->dvdt_tr > 0) && (pState->dvdt_tr <= 90))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 200000;
+ pState->interval = 50;
+ }
+ else if((pState->dvdt_tr > 90) && (pState->dvdt_tr <= 120))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 200000;
+ pState->interval = 30;
+ }
+ else
+ {
+ pState->setupState.settleTime = 300;
+ pState->step = 100000;
+ pState->interval = 30;
+ }
+ }
+ else
+ {
+ if((pState->dvdt_tr > 0) && (pState->dvdt_tr <= 90))
+ {
+ pState->setupState.settleTime = 500;
+ pState->step = 2500000L;
+ pState->interval = 50;
+ }
+ else if((pState->dvdt_tr > 90) && (pState->dvdt_tr <= 100))
+ {
+ pState->setupState.settleTime = 500;
+ pState->step = 2000000L;
+ }
+ else if((pState->dvdt_tr > 100) && (pState->dvdt_tr <= 120))
+ {
+ pState->setupState.settleTime = 500;
+ pState->step = 1200000L;
+ }
+ else if((pState->dvdt_tr > 120) && (pState->dvdt_tr <= 150))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 800000L;
+ }
+ else if((pState->dvdt_tr > 150) && (pState->dvdt_tr <= 200))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 400000L;
+ }
+ else
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 150000L;
+ }
+ }
+ /* Adjust test voltages and settle time if AHS detected during TR test */
+ if(pState->ahs_det.count > 0)
+ {
+ pState->setupState.settleTime = MLT_RES_AUTOV_LONG_AHS_SETTLE;
+ pState->vtar[0] = MLT_RES_AUTOV_LONG_AHS_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_LONG_AHS_V2;
+ }
+ else
+ {
+ pState->vtar[0] = MLT_RES_AUTOV_LONG_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_LONG_V2;
+ }
+
+ if(pState->active_term == MLT_TERM_TG)
+ {
+ pState->vtar[0] *= -1;
+ pState->vtar[1] *= -1;
+ }
+ break;
+ }
+ return return_val;
+}
+/********************************************************************************/
+/**
+** @brief Implements Auto-V offset calibration
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+
+static int calOffsetAutoV (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState)
+{
+int32 i_samp;
+int32 v_samp;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant loop */
+ switch (pState->autoVState.stage)
+ {
+ case 0:
+ /****************************************/
+ /* Setup DIAG current source for 0V T-R */
+ /****************************************/
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0); /* DC */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DIAG_ADJ_STEP,pState->step);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0);
+ if(MLT17X_REVB)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_B_RAM_DIAG_V_TAR,0L);
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_C_RAM_DIAG_V_TAR,0L);
+ }
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC,0x4468adL);
+ diagSet(pProSLICMLT->pProslic, DIAG_AUTO_V|DIAG_ENABLE|DIAG_KDC_OFF|DIAG_DCLPF_44K|DIAG_FB_OFF);
+ pState->autoVState.waitIterations=0;
+ pState->autoVState.sampleIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 2: /* Capture samples and accumulate */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+ pState->imeas += i_samp;
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ {
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v_offset = pState->vmeas;
+ pState->i_offset = pState->imeas;
+
+ pState->autoVState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 3:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_DIAG1,0);/*disable diag*/
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* Switch */
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Implements Auto-V adaptive force-IV/measure-IV method
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int execAutoV (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState)
+{
+int32 i_samp;
+int32 v_samp;
+int32 v_target;
+int i;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ /* Start of reentrant loop */
+ switch (pState->autoVState.stage)
+ {
+ case 0:
+ /************************************/
+ /* Setup DIAG current source/AUTO-V */
+ /************************************/
+ v_target = pState->vtar[0] * MLT_CONST_AUTO_V_VTAR;
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0); /* DC */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DIAG_ADJ_STEP,pState->step);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0);
+ if(MLT17X_REVB)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_B_RAM_DIAG_V_TAR,v_target);
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_C_RAM_DIAG_V_TAR,v_target);
+ }
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC,0x4468adL);
+ diagSet(pProSLICMLT->pProslic, DIAG_AUTO_V|DIAG_ENABLE|DIAG_KDC_OFF|DIAG_DCLPF_44K|DIAG_FB_OFF);
+ pState->autoVState.waitIterations=0;
+ pState->autoVState.sampleIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 2: /* Capture samples and accumulate */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+ if(pState->active_term == MLT_TERM_TR)
+ pState->imeas += (i_samp-pState->i_offset);
+ else
+ pState->imeas += i_samp;
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ {
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v1 = pState->vmeas;
+ pState->i1 = pState->imeas;
+
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Avg V1 = %dmV \n",pState->vmeas);
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Avg I1 = %duA \n",pState->imeas);
+
+ pState->autoVState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 3: /* Setup for 2nd measurement */
+ pState->autoVState.sampleIterations = 0;
+ pState->autoVState.waitIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ v_target = pState->vtar[1] * MLT_CONST_AUTO_V_VTAR;
+ if(MLT17X_REVB)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_B_RAM_DIAG_V_TAR,v_target);
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_C_RAM_DIAG_V_TAR,v_target);
+ }
+
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 5: /* Capture samples and accumulate 2nd measurement*/
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+
+ if(pState->active_term == MLT_TERM_TR)
+ {
+ pState->imeas += (i_samp-pState->i_offset);
+ pState->i_array[pState->autoVState.sampleIterations] = (i_samp-pState->i_offset);
+ }
+ else
+ {
+ pState->imeas += i_samp;
+ }
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ {
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v2 = pState->vmeas;
+ pState->i2 = pState->imeas;
+ pState->autoVState.stage++;
+
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Avg V2 = %dmV \n",pState->vmeas);
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Avg I2 = %duA \n",pState->imeas);
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 6: /* Computations */
+
+ /* -------------------------
+ ** Active Handset Detection
+ ** -------------------------
+ */
+
+ if((pState->ahs_det.enable)&&(pState->active_term == MLT_TERM_TR))
+ {
+ /*
+ ** Test 1:
+ **
+ ** Compute RMS current of second capture. If an active handset
+ ** is present, there will be a large ac component.
+ */
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->i_array[i] -= pState->imeas; /* Remove DC */
+ }
+ pState->ahs_det.irms = 0;
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->ahs_det.irms += (pState->i_array[i])*(pState->i_array[i]);
+ }
+
+ pState->ahs_det.irms /= pState->autoVState.numSamples;
+
+ /*
+ ** Test 2:
+ **
+ ** Look at different between ratio of I2 to I1 and the difference
+ ** between I2 and I1 (eg. large ratio, small difference)
+ */
+ pState->ahs_det.ratio = (pState->i2 * 1000L) / pState->i1;
+ pState->ahs_det.ratio -= (pState->i2 - pState->i1);
+
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : AHS Rms = %d uArms\n", pState->ahs_det.irms);
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : AHS Ratio = %d \n", pState->ahs_det.ratio);
+
+ /*
+ ** Test against configurable rms current and current
+ ** ratio limits to identify active handset. Occassionally,
+ ** current is measure while the AHS's charge pump is not
+ ** active, so the current ratio will cover that portion.
+ **
+ ** There are cases in which a longitudinal fault in parallel
+ ** with the AHS will result in missing both of these, but
+ ** the magnitude of the fault is large enough that it becomes
+ ** the dominant concern.
+ **
+ ** In the case of a TG fault, the ratio will be large, but
+ ** the absolute current will be low, so I2 is also checked.
+ **
+ */
+ pState->ahs_det.detected = 0; /* Default to 0 */
+
+ if((pState->ahs_det.irms > 200L)&&(pState->i2 >= 300L))
+ {/* Case in which harge pump is full on */
+ if((pState->ahs_det.irms >= 700L)&&(pState->ahs_det.irms < 1000L)&&(pState->ahs_det.ratio > 14000L))
+ {/* Outlier AHS with large breakover leakage > 24v */
+ pState->ahs_det.detected = 2;
+ }
+ else if(pState->ahs_det.ratio >= 10000L) /* Typical AHS */
+ {
+ pState->ahs_det.detected = 1;
+ }
+ }
+ else if((pState->ahs_det.irms > 1000L)&&(pState->ahs_det.ratio > 1000L))
+ {/* Typical AHS in which charge pump just turns on */
+ pState->ahs_det.detected = 1;
+ }
+
+ }
+
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_DIAG1,0);/*disable diag*/
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* Switch */
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+static int execAutoV_2 (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState)
+{
+int32 i_samp;
+int32 v_samp;
+int32 v_open_term = 0;
+int32 i_leak = 0;
+int32 v_target;
+int i;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant loop */
+ switch (pState->autoVState.stage)
+ {
+ case 0:
+ /************************************/
+ /* Setup DIAG current source/AUTO-V */
+ /************************************/
+ v_target = pState->vtar[0] * MLT_CONST_AUTO_V_VTAR;
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+
+ /* If RG or TG, setup coarse sensors to measure OPEN terminal */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VTIPC, MADC_HIRES);
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VRINGC, MADC_HIRES);
+ }
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0); /* DC */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DIAG_ADJ_STEP,pState->step);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_C_RAM_DIAG_V_TAR,v_target);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC,0x4468adL);
+ diagSet(pProSLICMLT->pProslic, DIAG_AUTO_V|DIAG_ENABLE|DIAG_KDC_OFF|DIAG_DCLPF_44K|DIAG_FB_OFF);
+ pState->autoVState.waitIterations=0;
+ pState->autoVState.sampleIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 2: /* Sample Interval */
+ delay_poll(&(pState->autoVState),pState->interval/mlt_poll_rate );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 3: /* Capture samples and accumulate */
+
+ /* Drive terminal voltage */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+
+
+ /* Open terminal voltage (if applicable) */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->tipOffs;
+ i_leak = (v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Tip Open V = %dmV \n", v_open_term);
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Tip Leakage = %duA \n", i_leak);
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->ringOffs;
+ i_leak = -(v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Ring Open V = %dmV \n", v_open_term);
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Ring Leakage = %duA \n", i_leak);
+ }
+
+ /* Drive terminal current */
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+
+ /* Store drive current less leakage */
+ pState->imeas += (i_samp - i_leak);
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ { /* Compute averages */
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v1 = pState->vmeas;
+ pState->i1 = pState->imeas;
+
+#ifdef MLT_RES_AUTOV_SINGLE_SAMPLE
+ pState->v1 = v_samp;
+ pState->i1 = i_samp;
+#endif
+
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Avg V1 = %dmV \n",pState->vmeas);
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Avg I1 = %duA \n",pState->imeas);
+
+ pState->autoVState.stage++;
+ }
+ else /* Take next sample */
+ {
+ pState->autoVState.stage = 2;
+ }
+
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 4: /* Setup for 2nd measurement */
+ pState->autoVState.sampleIterations = 0;
+ pState->autoVState.waitIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ v_target = pState->vtar[1] * MLT_CONST_AUTO_V_VTAR;
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_C_RAM_DIAG_V_TAR,v_target);
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 6: /* Sample Interval */
+ delay_poll(&(pState->autoVState),pState->interval/mlt_poll_rate );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 7: /* Capture samples and accumulate 2nd measurement*/
+ /* Drive terminal voltage */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+
+ /* Open terminal voltage (if applicable) */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->tipOffs;
+ i_leak = (v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->ringOffs;
+ i_leak = -(v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ }
+
+
+ /* Drive terminal current */
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+
+ /* Store sample for AHS detection */
+ pState->i_array[pState->autoVState.sampleIterations] = i_samp - i_leak;
+ /* Store drive current less leakage */
+ pState->imeas += (i_samp - i_leak);
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ { /* Compute averages */
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v2 = pState->vmeas;
+ pState->i2 = pState->imeas;
+
+#ifdef MLT_RES_AUTOV_SINGLE_SAMPLE
+ pState->v2 = v_samp;
+ pState->i2 = i_samp;
+#endif
+ pState->autoVState.stage++;
+
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Avg V2 = %dmV \n",pState->vmeas);
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : Avg I2 = %duA \n",pState->imeas);
+ }
+ else
+ { /* Take next sample */
+ pState->autoVState.stage = 6;
+ }
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 8: /* AHS Computation */
+
+ /* -------------------------
+ ** Active Handset Detection
+ ** -------------------------
+ */
+
+ if(pState->ahs_det.enable)
+ {
+ /*
+ ** Test 1:
+ **
+ ** Compute RMS current of second capture. If an active handset
+ ** is present, there will be a large ac component.
+ */
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->i_array[i] -= pState->imeas; /* Remove DC */
+ }
+ pState->ahs_det.irms = 0;
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->ahs_det.irms += (pState->i_array[i])*(pState->i_array[i]);
+ }
+
+ pState->ahs_det.irms /= pState->autoVState.numSamples;
+
+ /*
+ ** Test 2:
+ **
+ ** Look at different between ratio of I2 to I1 and the difference
+ ** between I2 and I1 (eg. large ratio, small difference)
+ */
+ if(pState->i1 != 0)
+ {
+ pState->ahs_det.ratio = (pState->i2 * 1000L) / pState->i1;
+ }
+ else
+ {
+ pState->ahs_det.ratio = (pState->i2 * 1000L);
+ }
+ pState->ahs_det.ratio -= (pState->i2 - pState->i1);
+
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : AHS Rms = %d uArms\n", pState->ahs_det.irms);
+ MLT_DEBUG_LOG ("si3217x_mlt : execAutoV : AHS Ratio = %d \n", pState->ahs_det.ratio);
+
+ /*
+ ** Test against configurable rms current and current
+ ** ratio limits to identify active handset. Occassionally,
+ ** current is measure while the AHS's charge pump is not
+ ** active, so the current ratio will cover that portion.
+ **
+ ** There are cases in which a longitudinal fault in parallel
+ ** with the AHS will result in missing both of these, but
+ ** the magnitude of the fault is large enough that it becomes
+ ** the dominant concern.
+ **
+ ** In the case of a TG fault, the ratio will exceed 3000, but
+ ** the absolute current will be low, so I2 is also checked.
+ */
+ pState->ahs_det.detected = 0; /* Default to 0 */
+
+ if((pState->ahs_det.ratio >= 3000)&&(pState->i2 > 200))
+ {
+ pState->ahs_det.detected = 1;
+ }
+ else if((pState->ahs_det.irms > 200L)&&(pState->ahs_det.ratio > 2000))
+ {
+ pState->ahs_det.detected = 2;
+ }
+
+ }
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_DIAG1,0);/*disable diag*/
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* Switch */
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @internal @brief Measures resistance present between TIP and RING
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Upon completion, pProSLICMLT->resFaults.measTR have the measured values.
+** @param[in] *pState - pointer to test state structure
+**
+** @retval
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRtr(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+ int32 vdiff,ir;
+ static execAutoV_fptr pExecAutoV;
+ uInt16 mlt_poll_rate;
+ uInt32 mlt_prot_res;
+ int32 tr_req_const;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tr_req_const = MLT_CONST_PM_REQ_DIFF_EV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_EV_0;
+ }
+ }
+ else
+ {
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tr_req_const = MLT_CONST_PM_REQ_DIFF_SV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_SV_0;
+ }
+ }
+
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tr_req_const = MLT_CONST_PM_REQ_DIFF_EV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_EV_0;
+ }
+#else
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tr_req_const = MLT_CONST_PM_REQ_DIFF_SV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_SV_0;
+ }
+#endif
+#endif
+ /* Start of reentrant block */
+ switch (pState->TRState.stage){
+
+ case 0:
+ if(MLT17X_REVB)
+ {
+ pExecAutoV = &execAutoV;
+ }
+ else
+ {
+ pExecAutoV = &execAutoV_2;
+ }
+ pState->active_term = MLT_TERM_TR;
+ pState->ahs_det.enable = MLT_RES_AUTOV_AHS_DET_EN; /* Enable active handset detection */
+ pState->ahs_det.detected = 0; /* Clear active handset detection flag */
+ pState->ahs_det.count = 0; /* Clear remeasure counter */
+ pState->autoVState.numSamples = MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Initialize flags and counters; Setup linefeed */
+ pState->TRState.waitIterations=0;
+ pState->TRState.sampleIterations=0;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ pProSLICMLT->resFaults.trFlag = 0;
+ pProSLICMLT->resFaults.tgFlag = 0;
+ pProSLICMLT->resFaults.rgFlag = 0;
+ setupDcFeedAutoV(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* settle linefeed */
+ delay_poll(&(pState->TRState),450/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Check for small Rtr in FWD mode */
+ ir = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : FWD Short : ILOOP = %duA\n",ir);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : FWD Short : VDIFF = %dmV\n", vdiff);
+
+ if(ir > MLT_RES_SM_R_MIN_I_FWD)
+ { /* Store if iloop > 8mA */
+ pProSLICMLT->resFaults.measTR = (vdiff*10000)/ir - 2*mlt_prot_res;
+ if(pProSLICMLT->resFaults.measTR < 0)
+ pProSLICMLT->resFaults.measTR = 0;
+ pProSLICMLT->resFaults.trFlag = 1;
+ }
+ else
+ { /* Consider open and do auto-v test */
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.trFlag = 0;
+ }
+ /* Setup for reverse active test */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_REV_ACTIVE);
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* settle */
+ delay_poll(&(pState->TRState),450/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* check for small Rtr in REV active, decide which is real later */
+ ir = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : REV Short : ILOOP = %duA\n",ir);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : REV Short : VDIFF = %dmV\n", vdiff);
+
+ if(fp_abs(ir) > MLT_RES_SM_R_MIN_I_REV)
+ { /* store if > 7ma (1ma of error between fwd/rev */
+ pProSLICMLT->resFaults.measAUX = (fp_abs(vdiff)*10000)/fp_abs(ir) - 2*mlt_prot_res;
+ if(pProSLICMLT->resFaults.measAUX < 0)
+ pProSLICMLT->resFaults.measAUX = 0;
+ pProSLICMLT->resFaults.auxFlag = 1;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measAUX = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ }
+
+ /* Return to FWD */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+
+ /*
+ ** If both fwd and rev indicate a small R, skip remainder of test
+ ** since the small fault is from T-R
+ */
+ if(pProSLICMLT->resFaults.auxFlag && pProSLICMLT->resFaults.trFlag)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : Small RTR FWD RAW = %d\n", pProSLICMLT->resFaults.measTR);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : Small RTR REV RAW = %d\n", pProSLICMLT->resFaults.measAUX);
+
+ pProSLICMLT->resFaults.measTR = (pProSLICMLT->resFaults.measTR+pProSLICMLT->resFaults.measAUX)/2L;
+ pState->rtrMethod = LOWR;
+ pState->TRState.stage = 70;
+ }
+ else
+ {
+ pState->rtrMethod = AUTOV;
+ pState->TRState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ setupAutovForDvdt(pProSLICMLT,pState);
+
+ if(MLT17X_REVC)
+ {
+ /* Bias LKG DACs to 4mA to improve open loop stability */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNR_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPR_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNT_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPT_ACTIVE, 0x1FF00000L);
+ }
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : AutoV Setup : Samples = %d\n", pState->autoVState.numSamples);
+
+ pState->autoVState.stage=0;
+ if(pState->ahs_det.count) /* Skip cal on retest */
+ {
+ pState->TRState.stage = 8;
+ }
+ else
+ {
+ pState->TRState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* AutoV Current Source Offset Cal */
+ if (calOffsetAutoV(pProSLICMLT,pState))
+ {
+ pState->autoVState.stage=0;
+ pState->TRState.stage++;
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : AutoV Cal : Voffs = %d\n", pState->v_offset);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : AutoV Cal : Ioffs = %d\n", pState->i_offset);
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Execute autov test */
+ if(pExecAutoV(pProSLICMLT,pState))
+ {
+ /*
+ ** Active handset detected - repeat measurement until settled
+ */
+ if((pState->ahs_det.detected)&&(pState->ahs_det.count <= MLT_RES_AUTOV_AHS_MAX_RETEST))
+ {
+ pState->TRState.stage = 6;
+ pState->ahs_det.count++;
+ pProSLICMLT->resFaults.ahsFlag = 1;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /* Process Results */
+ if ((pState->i2-pState->i1) == 0) { /* OPEN */
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ }
+ else { /* Find Absolute Resistance between T-R */
+ pProSLICMLT->resFaults.measTR = ((pState->v2 - pState->v1)*10000 / (pState->i2-pState->i1) - 2*mlt_prot_res);
+ }
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRtr : AutoV RTR RAW : %d\n", pProSLICMLT->resFaults.measTR);
+
+ if ((pProSLICMLT->resFaults.measTR != 0) && (MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTR != tr_req_const))
+ pProSLICMLT->resFaults.measTR = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTR - tr_req_const);
+ else
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pState->TRState.stage=70;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 70: /* move to end */
+ if(MLT17X_REVC)
+ {
+ /* Restore LKG DACs */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNR_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPR_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNT_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPT_ACTIVE, 0x0L);
+ }
+
+ if (pProSLICMLT->resFaults.measTR < 0)
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+
+
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Measures resistance present between RING and GND
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Upon completion, pProSLICMLT->resFaults.measRG contains the measured values.
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRrg(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+ /* first check for a small R then run auto-v*/
+ int32 iring; int32 vring;
+ int32 dV; int32 dI;
+ static execAutoV_fptr pExecAutoV;
+ int32 rg_req_const_0;
+ int32 rg_req_const_1;
+ int32 rg_req_auto_const;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ rg_req_const_0 = MLT_CONST_PM_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_PM_REQ_LONG_EV_1;
+ }
+ else
+ {
+ rg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+ }
+ else
+ {
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ rg_req_const_0 = MLT_CONST_PM_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_PM_REQ_LONG_SV_1;
+ }
+ else
+ {
+ rg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+ }
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ rg_req_const_0 = MLT_CONST_PM_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_PM_REQ_LONG_EV_1;
+ }
+ else
+ {
+ rg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+#else
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ rg_req_const_0 = MLT_CONST_PM_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_PM_REQ_LONG_SV_1;
+ }
+ else
+ {
+ rg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+#endif
+#endif
+ switch (pState->RGState.stage){
+
+ case 0:
+ if(MLT17X_REVB)
+ {
+ pExecAutoV = &execAutoV;
+ }
+ else
+ {
+ pExecAutoV = &execAutoV_2;
+ }
+ pState->active_term = MLT_TERM_RG;
+ pState->RGState.waitIterations=0;
+ if (!(pState->smallRFlag & 2))
+ {
+ pState->RGState.stage=5; /*auto-v method*/
+ }
+ else
+ {
+ setupDcFeedV1SmallR(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ pState->RGState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&(pState->RGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* small R test, first measurement */
+ iring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_IRING,0);
+ vring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VRING, 0);
+
+ MLT_DEBUG_LOG ("si3217x_mlt : measRrg : Small RRG : V1 = %dmV\n",vring);
+ MLT_DEBUG_LOG ("si3217x_mlt : measRrg : Small RRG : I1 = %duA\n",iring);
+
+ pProSLICMLT->resFaults.measRG = vring / -iring;
+ pState->i1 = -iring;
+ pState->v1 = vring;
+
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = 0;
+ setupDcFeedV2SmallR(pProSLICMLT);
+ pState->RGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle */
+ delay_poll(&(pState->RGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Small R test, second measurement and difference calculation */
+ iring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_IRING,0);
+ vring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VRING,0);
+
+ MLT_DEBUG_LOG ("si3217x_mlt : measRrg : Small RRG : V2 = %dmV\n",vring);
+ MLT_DEBUG_LOG ("si3217x_mlt : measRrg : Small RRG : I2 = %duA\n",iring);
+
+ pState->i2 = -iring;
+ pState->v2 = vring;
+
+ /*
+ ** Loop equation in TIP-OPEN mode yields
+ ** RRG = dV/(dI - dV/a1 - 1/a0), where a1 and a0
+ ** are constants derived from the equivalent circuit
+ ** model. They may depend on pulse metering bom option
+ */
+ dV = 1000L*fp_abs(pState->v2 - pState->v1);
+ dI = fp_abs(pState->i2 - pState->i1) / 10L;
+ dI -= dV/rg_req_const_1;
+ dI += 1000000/rg_req_const_0;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measRG = (dV/dI);
+ pProSLICMLT->resFaults.measRG -= mlt_prot_res; /* subtract protection resistance */
+ }
+
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = 0;
+
+ pState->RGState.stage=70;
+ return RC_MLT_TEST_COMPLETE;
+
+ case 5: /* Auto V test */
+ pState->ahs_det.enable = 0; /* Disable active handset detection */
+ pState->autoVState.numSamples = 2*MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+
+ setupAutovForDvdt(pProSLICMLT,pState);
+
+ pState->RGState.stage++;
+ pState->autoVState.stage=0;
+ pState->RGState.waitIterations=0;
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRrg : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3217x_mlt : measRrg : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3217x_mlt : measRrg : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3217x_mlt : measRrg : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Settle */
+ delay_poll(&(pState->RGState),50/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ if(MLT17X_REVB)
+ {
+ uInt8 rev_test;
+ /* Short open terminal to GND */
+ pState->hvic_state_save = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*active delay*/
+ rev_test = (uInt8)((pProSLICMLT->ReadRAM(pMLT_HW,pMLT_CHAN, 1791)>>20)&0x000000FFL);
+ if(rev_test == 0x10)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_HVIC_STATE, pState->hvic_state_save | 0x2f000L);
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_HVIC_STATE, pState->hvic_state_save | 0x2f0000L);
+ }
+ }
+
+ if(MLT17X_REVC)
+ {
+ /* Bias RING side LKG DAC to 4mA to improve open loop stability */
+ /* Can't short open terminal on 17C because it is connected to VBAT instead of GND */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNR_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPR_ACTIVE, 0x1FF00000L);
+ }
+
+ pState->RGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ if(pExecAutoV(pProSLICMLT,pState))
+ {
+ if(MLT17X_REVC)
+ {
+ /* Restore 0mA bias */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNR_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPR_ACTIVE, 0x0L);
+ }
+ if ((pState->i2-pState->i1) == 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ else {
+
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ /* New computation - simplified to single order */
+ dV = fp_abs(pState->v2 - pState->v1);
+ dV *= 1100L;
+ dI = fp_abs(pState->i2-pState->i1);
+ dI -= dV/rg_req_const_1;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measRG = (dV*10)/dI;
+ pProSLICMLT->resFaults.measRG -= mlt_prot_res;
+ }
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRrg : AutoV RRG RAW : %d\n", pProSLICMLT->resFaults.measRG);
+
+ }
+ else
+ {
+ /* first order model since no r between tip/ring */
+ dV = (fp_abs(pState->v2 - pState->v1))*10000;
+ dI = fp_abs(pState->i2-pState->i1);
+
+ if(dI <= 0)
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measRG = dV/dI;
+ pProSLICMLT->resFaults.measRG *= 107;
+ pProSLICMLT->resFaults.measRG /= 100;
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRrg : AutoV RRG RAW : %d\n", pProSLICMLT->resFaults.measRG);
+
+ if(pProSLICMLT->resFaults.measRG > 0)
+ {
+ if(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measRG <= rg_req_auto_const)
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measRG - rg_req_auto_const);
+ pProSLICMLT->resFaults.measRG -= mlt_prot_res;
+ }
+ }
+ }
+ }
+ }
+
+ if(MLT17X_REVB)
+ {
+ /* Float open terminal */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->hvic_state_save);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0L);
+ }
+
+ pState->RGState.stage=70;
+ }/* goToV */
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* switch */
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Measures resistance present between TIP and GND
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is located in pProSLICMLT->resFaults.measTG
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRtg(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+ /* first check for a short then run auto-v*/
+ int32 itip,vtip;
+ int32 dV; int32 dI;
+ static execAutoV_fptr pExecAutoV;
+ int32 tg_req_const_0;
+ int32 tg_req_const_1;
+ int32 tg_req_auto_const;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tg_req_const_0 = MLT_CONST_PM_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_PM_REQ_LONG_EV_1;
+ }
+ else
+ {
+ tg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+ }
+ else
+ {
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tg_req_const_0 = MLT_CONST_PM_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_PM_REQ_LONG_SV_1;
+ }
+ else
+ {
+ tg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+ }
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tg_req_const_0 = MLT_CONST_PM_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_PM_REQ_LONG_EV_1;
+ }
+ else
+ {
+ tg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+#else
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tg_req_const_0 = MLT_CONST_PM_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_PM_REQ_LONG_SV_1;
+ }
+ else
+ {
+ tg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+#endif
+#endif
+ switch (pState->TGState.stage){
+
+ case 0:
+ if(MLT17X_REVB)
+ {
+ pExecAutoV = &execAutoV;
+ }
+ else
+ {
+ pExecAutoV = &execAutoV_2;
+ }
+ pState->active_term = MLT_TERM_TG;
+ pState->TGState.waitIterations=0;
+ if (!(pState->smallRFlag & 1))
+ {
+ pState->TGState.stage=5; /*auto-v method*/
+ }
+ else
+ {
+ setupDcFeedV1SmallR(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW,pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_RING_OPEN);
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ case 1:
+ delay_poll(&(pState->TGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /*Small R test, first measurment*/
+ itip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ITIP,0);
+ vtip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VTIP,0);
+
+ MLT_DEBUG_LOG ("si3217x_mlt : measRtg : Small RTG : V1 = %dmV\n",vtip);
+ MLT_DEBUG_LOG ("si3217x_mlt : measRtg : Small RTG : I1 = %duA\n",itip);
+
+ pProSLICMLT->resFaults.measTG = vtip / -itip;
+ pState->v1 = vtip;
+ pState->i1 = -itip;
+
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = 0;
+ setupDcFeedV2SmallR(pProSLICMLT);
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle */
+ delay_poll(&(pState->TGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Small R test, second measurement and difference calculation */
+ itip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ITIP,0);
+ vtip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VTIP,0);
+
+ MLT_DEBUG_LOG ("si3217x_mlt : measRtg : Small RTG : V2 = %dmV\n",vtip);
+ MLT_DEBUG_LOG ("si3217x_mlt : measRtg : Small RTG : I2 = %duA\n",itip);
+
+ pState->v2 = vtip;
+ pState->i2 = -itip;
+
+ /*
+ ** Loop equation in RING-OPEN mode yields
+ ** RTG = dV/(dI - dV/a1 - 1/a0), where a1 and a0
+ ** are constants derived from the equivalent circuit
+ ** model. They may depend on pulse metering bom option
+ */
+
+ dV = 1000L*fp_abs(pState->v2 - pState->v1);
+ dI = fp_abs(pState->i2 - pState->i1) / 10L;
+ dI -= dV/tg_req_const_1;
+ dI += 1000000/tg_req_const_0;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measTG = (dV/dI);
+ pProSLICMLT->resFaults.measTG -= mlt_prot_res;
+ }
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = 0;
+
+ pState->TGState.stage=70;
+ return RC_MLT_TEST_COMPLETE;
+
+ case 5: /* Auto V test */
+ pState->ahs_det.enable = 0; /* Disable active handset detection - detected in TR test */
+ pState->autoVState.numSamples = 2*MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+
+ setupAutovForDvdt(pProSLICMLT,pState);
+
+ pState->TGState.stage++;
+ pState->autoVState.stage=0;
+ pState->TGState.waitIterations=0;
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRtg : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtg : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtg : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3217x_mlt : measRtg : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Settle */
+ delay_poll(&(pState->TGState),50/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_RING_OPEN);
+
+ if(MLT17X_REVB)
+ {
+ uInt8 rev_test;
+ /* Short open terminal to GND */
+ pState->hvic_state_save = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*active delay*/
+ rev_test = (uInt8)((pProSLICMLT->ReadRAM(pMLT_HW,pMLT_CHAN, 1791)>>20)&0x000000FFL);
+ if(rev_test == 0x10)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_HVIC_STATE,pState->hvic_state_save | 0x82f000L);
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_HVIC_STATE,pState->hvic_state_save | 0x1f0000L);
+ }
+ }
+ if(MLT17X_REVC)
+ {
+ /* Bias TIP side LKG DAC to 4mA to improve open loop stability */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNT_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPT_ACTIVE, 0x1FF00000L);
+ }
+
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ if(pExecAutoV(pProSLICMLT,pState))
+ {
+ if(MLT17X_REVC)
+ {
+ /* Restore 0mA bias */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNT_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPT_ACTIVE, 0x0L);
+ }
+ if ((pState->i2-pState->i1) == 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ else {
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ /* New computation - simplified to single order*/
+ dV = fp_abs(pState->v2 - pState->v1);
+ dV *= 1100;
+ dI = fp_abs(pState->i2-pState->i1);
+ dI -= dV/tg_req_const_1;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measTG = (dV*10)/dI;
+ pProSLICMLT->resFaults.measTG -= mlt_prot_res;
+ }
+ MLT_DEBUG_LOG("si3217x_mlt : measRtg : AutoV RTG RAW : %d\n", pProSLICMLT->resFaults.measTG);
+ }
+ else
+ {
+ /* first order model since no r between tip/ring */
+ dV = (fp_abs(pState->v2 - pState->v1))*10000;
+ dI = fp_abs(pState->i2-pState->i1);
+
+ if(dI <= 0)
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measTG = dV/dI;
+ pProSLICMLT->resFaults.measTG *= 107;
+ pProSLICMLT->resFaults.measTG /= 100;
+ /* Check for condition in which measured == Req */
+
+ MLT_DEBUG_LOG("si3217x_mlt : measRtg : AutoV RTG RAW : %d\n", pProSLICMLT->resFaults.measTG);
+
+ if(pProSLICMLT->resFaults.measTG > 0)
+ {
+ if ((MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTG) <= tg_req_auto_const)
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTG - tg_req_auto_const);
+ pProSLICMLT->resFaults.measTG -= mlt_prot_res;
+ }
+ }
+ }
+ }
+ }
+
+ if(MLT17X_REVB)
+ {
+ /* Float open terminal */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->hvic_state_save);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0L);
+ }
+ pState->TGState.stage=70;
+ }/* goToV */
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Measure time constant using MLT diagnostic timers
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure.
+** @param[in,out] *termMeas - Pointer to mlt terminal structure
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measureTimeConstant(ProSLICMLTType *pProSLICMLT, ProSLIC_term_meas_t *termMeas, ProSLIC_mlt_test_state *pState)
+{
+int32 dt1, dt2, dv1,dv2;
+int32 slope1, slope2;
+int32 i_offset = 50;
+uInt16 mlt_poll_rate;
+int enable_meas_down;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ enable_meas_down = termMeas->tgFlag;
+
+ switch(pState->stage)
+ {
+ case 0:
+ pState->waitIterations=0;
+ termMeas->term.iloop[1] = termMeas->term.iloop[0] + i_offset; /* comp for offset */
+ setupDspTimers(pProSLICMLT->pProslic,termMeas->time1,termMeas->time2,termMeas->time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,-1*termMeas->term.iloop[0]); /* (-) current to discharge */
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle open terminal switch to GND */
+ delay_poll(pState,500/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Enable current source */
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle approximate acquisition time */
+ delay_poll(pState,((termMeas->time3/10)*10 + 100)/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Read voltages */
+ readDspTimerV(pProSLICMLT->pProslic,&(termMeas->term.vloop[0]),&(termMeas->term.vloop[1]),&(termMeas->term.vloop[2]));
+ if(!enable_meas_down)
+ {
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ }
+ /* Calculate dv/dt and estimate C */
+ dt1 = fp_abs(termMeas->time2 - termMeas->time1);
+ dt2 = fp_abs(termMeas->time3 - termMeas->time2);
+ dv1 = fp_abs(termMeas->term.vloop[1] - termMeas->term.vloop[0]);
+ dv2 = fp_abs(termMeas->term.vloop[2] - termMeas->term.vloop[1]);
+
+ if(dv1 > 0)
+ {
+ termMeas->measTR2 = (fp_abs(termMeas->term.iloop[0])*1000L*dt1)/dv1;
+ }
+ else
+ {
+ termMeas->measTR2 = 0;
+ }
+
+ if(dv2 > 0)
+ {
+ termMeas->measRG2 = (fp_abs(termMeas->term.iloop[0])*1000L*dt2)/dv2;
+ }
+ else
+ {
+ termMeas->measRG2 = 0;
+ }
+
+ slope1 = 0;
+ slope2 = 0;
+
+ if(dt1 > 0)
+ {
+ slope1 = (10L*dv1) / dt1;
+ }
+
+ if(dt2 > 0)
+ {
+ slope2 = (10L*dv2) / dt2;
+ }
+
+ termMeas->slopeErr = (1000L * fp_abs(slope1 - slope2));
+ if(slope1 > 0)
+ {
+ termMeas->slopeErr /= slope1;
+ }
+ else
+ {
+ termMeas->slopeErr = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : iForce = %d uA\n", -1*termMeas->term.iloop[0]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR1 = %d mV\n", termMeas->term.vloop[0]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR2 = %d mV\n", termMeas->term.vloop[1]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR3 = %d mV\n", termMeas->term.vloop[2]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t1 = %d ms\n", termMeas->time1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t2 = %d ms\n", termMeas->time2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t3 = %d ms\n", termMeas->time3);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dv1 = %d mV\n", dv1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dv2 = %d mV\n", dv2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dt1 = %d ms\n", dt1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dt2 = %d ms\n", dt2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : slopeErr = %d \n", termMeas->slopeErr);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : C1 = %d nF\n", termMeas->measTR2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : C2 = %d nF\n", termMeas->measRG2);
+
+ if(!enable_meas_down)
+ {
+ pState->stage = 0;
+ pState->waitIterations = 0;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ else
+ {
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ case 5: /* Allow full discharge */
+ delay_poll(pState,(200/mlt_poll_rate) - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ setupDspTimers(pProSLICMLT->pProslic,termMeas->time1,termMeas->time2,termMeas->time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,termMeas->term.iloop[1]); /* (+) current to charge */
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* Settle approximate acquisition time */
+ delay_poll(pState,((termMeas->time3/10)*10 + 100)/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Read voltages */
+ readDspTimerV(pProSLICMLT->pProslic,&(termMeas->term.vloop[3]),&(termMeas->term.vloop[4]),&(termMeas->term.vloop[5]));
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ /* Calculate dv/dt and estimate C */
+ dt1 = fp_abs(termMeas->time2 - termMeas->time1);
+ dt2 = fp_abs(termMeas->time3 - termMeas->time2);
+ dv1 = fp_abs(termMeas->term.vloop[4] - termMeas->term.vloop[3]);
+ dv2 = fp_abs(termMeas->term.vloop[5] - termMeas->term.vloop[4]);
+
+ if(dv1 > 0)
+ {
+ termMeas->measAUX = (fp_abs(termMeas->term.iloop[1])*1000L*dt1)/dv1;
+ }
+ else
+ {
+ termMeas->measAUX = 0;
+ }
+
+ if(dv2 > 0)
+ {
+ termMeas->measTG2 = (fp_abs(termMeas->term.iloop[1])*1000L*dt2)/dv2;
+ }
+ else
+ {
+ termMeas->measTG2 = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : iForce = %d uA\n", termMeas->term.iloop[1]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR1 = %d mV\n", termMeas->term.vloop[3]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR2 = %d mV\n", termMeas->term.vloop[4]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR3 = %d mV\n", termMeas->term.vloop[5]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t1 = %d ms\n", termMeas->time1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t2 = %d ms\n", termMeas->time2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t3 = %d ms\n", termMeas->time3);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dv1 = %d mV\n", dv1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dv2 = %d mV\n", dv2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dt1 = %d ms\n", dt1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dt2 = %d ms\n", dt2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : C1 = %d nF\n", termMeas->measAUX);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : C2 = %d nF\n", termMeas->measTG2);
+
+ pState->stage = 0;
+ pState->waitIterations = 0;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Coarse measure of capacitance between TIP and RING
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is stored under pProSLICMLT->capFaults.measTR
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+
+/*
+** Measurements
+*/
+#define MLT_TC_CTR pProSLICMLT->capFaults.measTR2
+#define MLT_TC_DISCHG_CTR1 pProSLICMLT->capFaults.measTR2
+#define MLT_TC_DISCHG_CTR2 pProSLICMLT->capFaults.measRG2
+#define MLT_TC_CHG_CTR1 pProSLICMLT->capFaults.measAUX
+#define MLT_TC_CHG_CTR2 pProSLICMLT->capFaults.measTG2
+#define MLT_TC_DISCHG_V1 pProSLICMLT->capFaults.term.vloop[0]
+#define MLT_TC_DISCHG_V2 pProSLICMLT->capFaults.term.vloop[1]
+#define MLT_TC_DISCHG_V3 pProSLICMLT->capFaults.term.vloop[2]
+#define MLT_TC_T1 pProSLICMLT->capFaults.time1
+#define MLT_TC_T2 pProSLICMLT->capFaults.time2
+#define MLT_TC_T3 pProSLICMLT->capFaults.time3
+#define MLT_TC_DISCHG_DV1 (fp_abs(MLT_TC_DISCHG_V2 - MLT_TC_DISCHG_V1))
+#define MLT_TC_DISCHG_DV2 (fp_abs(MLT_TC_DISCHG_V3 - MLT_TC_DISCHG_V2))
+#define MLT_TC_SLOPE_ERR pProSLICMLT->capFaults.slopeErr
+#define MLT_TC_ISRC pProSLICMLT->capFaults.term.iloop[0]
+#define MLT_TC_RUN_COUNT pProSLICMLT->capFaults.auxFlag
+#define MLT_TC_MEAS_CHG_PHASE pProSLICMLT->capFaults.tgFlag
+#define MLT_TC_USE_V1_V2_ONLY pProSLICMLT->capFaults.rgFlag
+#define MLT_TC_USE_V2_V3_ONLY pProSLICMLT->capFaults.trFlag
+/*
+** Test Condition Flags
+*/
+#define MLT_TC_COND_V1_LOW pProSLICMLT->capFaults.flags[0]
+#define MLT_TC_COND_V1_HIGH pProSLICMLT->capFaults.flags[1]
+#define MLT_TC_COND_V2_LOW pProSLICMLT->capFaults.flags[2]
+#define MLT_TC_COND_V2_HIGH pProSLICMLT->capFaults.flags[3]
+#define MLT_TC_COND_V3_LOW pProSLICMLT->capFaults.flags[4]
+#define MLT_TC_COND_V3_HIGH pProSLICMLT->capFaults.flags[5]
+#define MLT_TC_COND_DV1_LOW pProSLICMLT->capFaults.flags[6]
+#define MLT_TC_COND_DV1_HIGH pProSLICMLT->capFaults.flags[7]
+#define MLT_TC_COND_DV2_LOW pProSLICMLT->capFaults.flags[8]
+#define MLT_TC_COND_DV2_HIGH pProSLICMLT->capFaults.flags[9]
+#define MLT_TC_COND_SLOPE_ERR pProSLICMLT->capFaults.flags[10]
+#define MLT_TC_COND_REDUCE_DV_LIM pProSLICMLT->capFaults.flags[11]
+#define MLT_TC_COND_V1_MID pProSLICMLT->capFaults.flags[12]
+#define MLT_TC_COND_V2_MID pProSLICMLT->capFaults.flags[13]
+#define MLT_TC_COND_V3_MID pProSLICMLT->capFaults.flags[14]
+/*
+** Thresholds
+*/
+#define MLT_TC_TH_V1_LOW 10000
+#define MLT_TC_TH_V1_HIGH 46000
+#define MLT_TC_TH_V2_LOW 3000
+#define MLT_TC_TH_V2_HIGH 43000
+#define MLT_TC_TH_V3_LOW 3000
+#define MLT_TC_TH_V3_HIGH 40000
+#define MLT_TC_TH_DV1_LOW (MLT_TC_COND_REDUCE_DV_LIM ? 1000:1800)
+#define MLT_TC_TH_DV1_HIGH 35000
+#define MLT_TC_TH_DV2_LOW (MLT_TC_COND_REDUCE_DV_LIM ? 1000:1800)
+#define MLT_TC_TH_DV2_HIGH 35000
+#define MLT_TC_TH_SLOPE_ERR 150
+#define MLT_TC_TH_V_MID 20000
+/*
+** Other constants
+*/
+#define MLT_TC_MAX_RUNS 5
+#define MLT_TC_CAL_ISRC 500L
+/*
+** Tests
+*/
+#define MLT_TC_TEST_ZERO (MLT_TC_COND_V1_LOW && MLT_TC_COND_V2_LOW && MLT_TC_COND_V3_LOW)
+#define MLT_TC_TEST_V1_OK (!(MLT_TC_COND_V1_LOW||MLT_TC_COND_V1_HIGH))
+#define MLT_TC_TEST_V2_OK (!(MLT_TC_COND_V2_LOW||MLT_TC_COND_V2_HIGH))
+#define MLT_TC_TEST_V3_OK (!(MLT_TC_COND_V3_LOW||MLT_TC_COND_V3_HIGH))
+#define MLT_TC_TEST_V2_V3_LOW (MLT_TC_COND_V2_LOW && MLT_TC_COND_V3_LOW && MLT_TC_TEST_V1_OK)
+#define MLT_TC_TEST_V3_LOW (MLT_TC_COND_V3_LOW && MLT_TC_TEST_V1_OK && MLT_TC_TEST_V2_OK)
+#define MLT_TC_TEST_DV1_OK (!(MLT_TC_COND_DV1_LOW||MLT_TC_COND_DV1_HIGH))
+#define MLT_TC_TEST_DV2_OK (!(MLT_TC_COND_DV2_LOW||MLT_TC_COND_DV2_HIGH))
+#define MLT_TC_TEST_ALL_V_OK (MLT_TC_TEST_V1_OK && MLT_TC_TEST_V2_OK && MLT_TC_TEST_V3_OK)
+#define MLT_TC_TEST_ALL_V_HIGH (MLT_TC_COND_V1_HIGH && MLT_TC_COND_V2_HIGH && MLT_TC_COND_V3_HIGH)
+#define MLT_TC_TEST_V_OK_DV1_LOW (MLT_TC_TEST_ALL_V_OK && MLT_TC_COND_DV1_LOW)
+#define MLT_TC_TEST_V3_LOW_DV1_OK (MLT_TC_TEST_V3_LOW && MLT_TC_TEST_DV1_OK)
+#define MLT_TC_TEST_SLOPE_ERR (MLT_TC_TEST_ALL_V_OK && MLT_TC_TEST_DV1_OK && MLT_TC_TEST_DV2_OK && MLT_TC_COND_SLOPE_ERR)
+#define MLT_TC_TEST_V1_HIGH_V3_OK (MLT_TC_COND_V1_HIGH && MLT_TC_TEST_V3_OK)
+#define MLT_TC_TEST_LOW_I_V3_MID (MLT_TC_COND_V3_MID && MLT_TC_TEST_V3_OK && (MLT_TC_ISRC == MLT_TC_CAL_ISRC))
+#define MLT_TC_TEST_V1_MID (MLT_TC_COND_V1_MID)
+#define MLT_TC_TEST_V2_MID (MLT_TC_COND_V2_MID)
+#define MLT_TC_TEST_V3_MID (MLT_TC_COND_V3_MID)
+
+
+static int estimateCtr_2(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_capacitance_state *pState)
+{
+uInt32 mlt_line_cap;
+uInt32 mlt_emi_cap;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_line_cap = pProSLICMLT->mlt_config.mlt_line_cap;
+ mlt_emi_cap = pProSLICMLT->mlt_config.mlt_emi_cap;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_line_cap = MLT_LINE_CAPACITANCE;
+ mlt_emi_cap = MLT_EMI_CAPACITANCE;
+#endif
+
+ switch(pState->MeasState.stage)
+ {
+ case 0:
+ Si3217x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);/*max out threshold*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,0xFFFFFFFL);/*max out threshold*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ gndOpenTerm(pProSLICMLT->pProslic,TRUE);
+ /* Initialize time constant measurement parameters */
+ MLT_TC_T1 = 6;
+ MLT_TC_T2 = 22;
+ MLT_TC_T3 = 44;
+ MLT_TC_ISRC = MLT_TC_CAL_ISRC;
+ MLT_TC_MEAS_CHG_PHASE = 0; /* Do discharge only measurement */
+ MLT_TC_RUN_COUNT = 0;
+ MLT_TC_USE_V1_V2_ONLY = 0;
+ MLT_TC_USE_V2_V3_ONLY = 0;
+ MLT_TC_COND_REDUCE_DV_LIM = 0;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Time constant measurement */
+ if(measureTimeConstant(pProSLICMLT,&(pProSLICMLT->capFaults),&(pState->TimeConstState)))
+ {
+ /* Process results of calibration run */
+ MLT_TC_COND_V1_LOW = (MLT_TC_DISCHG_V1 < MLT_TC_TH_V1_LOW ) ? 1 : 0;
+ MLT_TC_COND_V1_HIGH = (MLT_TC_DISCHG_V1 > MLT_TC_TH_V1_HIGH ) ? 1 : 0;
+ MLT_TC_COND_V2_LOW = (MLT_TC_DISCHG_V2 < MLT_TC_TH_V2_LOW ) ? 1 : 0;
+ MLT_TC_COND_V2_HIGH = (MLT_TC_DISCHG_V2 > MLT_TC_TH_V2_HIGH ) ? 1 : 0;
+ MLT_TC_COND_V3_LOW = (MLT_TC_DISCHG_V3 < MLT_TC_TH_V3_LOW ) ? 1 : 0;
+ MLT_TC_COND_V3_HIGH = (MLT_TC_DISCHG_V3 > MLT_TC_TH_V3_HIGH ) ? 1 : 0;
+ MLT_TC_COND_DV1_LOW = (MLT_TC_DISCHG_DV1 < MLT_TC_TH_DV1_LOW ) ? 1 : 0;
+ MLT_TC_COND_DV1_HIGH = (MLT_TC_DISCHG_DV1 > MLT_TC_TH_DV1_HIGH ) ? 1 : 0;
+ MLT_TC_COND_DV2_LOW = (MLT_TC_DISCHG_DV2 < MLT_TC_TH_DV2_LOW ) ? 1 : 0;
+ MLT_TC_COND_DV2_HIGH = (MLT_TC_DISCHG_DV2 > MLT_TC_TH_DV2_HIGH ) ? 1 : 0;
+ MLT_TC_COND_SLOPE_ERR = (MLT_TC_SLOPE_ERR > MLT_TC_TH_SLOPE_ERR) ? 1 : 0;
+ MLT_TC_COND_V1_MID = (MLT_TC_DISCHG_V1 > MLT_TC_TH_V_MID) ? 1 : 0;
+ MLT_TC_COND_V2_MID = (MLT_TC_DISCHG_V2 > MLT_TC_TH_V_MID) ? 1 : 0;
+ MLT_TC_COND_V3_MID = (MLT_TC_DISCHG_V3 > MLT_TC_TH_V_MID) ? 1 : 0;
+
+ MLT_TC_USE_V1_V2_ONLY = 0;
+ MLT_TC_USE_V2_V3_ONLY = 0;
+
+ /* ------------------
+ ** Analysis of result
+ ** ------------------
+ */
+
+ /*
+ ** All voltages low - extrememly fast time constant
+ ** or R is out of max range (500uA*R > VBAT), call it 0nF
+ */
+ if(MLT_TC_TEST_ZERO)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : MLT_TC_TEST_ZERO\n");
+ MLT_TC_CTR = 0;
+ pState->MeasState.stage = 20;
+ }
+ /*
+ ** All voltages high - extremely slow time constant,
+ * increase drive current and measurement window
+ */
+ else if(MLT_TC_TEST_ALL_V_HIGH)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : MLT_TC_TEST_ALL_V_HIGH\n");
+ MLT_TC_T1 += 10;
+ MLT_TC_T2 += 20;
+ MLT_TC_T3 += 20;
+ MLT_TC_ISRC *= 2;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** All voltages in range, but small dV
+ ** indicates a large C, but some R is present
+ ** resulting in a voltage drop. Cannot source
+ ** too much current because of I*R drop, so
+ ** capture times must be primary variant.
+ **
+ ** dV limit is dynamic. Ideally, it would be as
+ ** large as possible, but with large series R,
+ ** it needs to be reduced to accomodate minimized
+ ** voltage range. If V1 is < 20v, do not increase
+ ** current drive
+ */
+ else if(MLT_TC_TEST_V_OK_DV1_LOW)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : MLT_TC_TEST_V_OK_DV1_LOW\n");
+ /* Select ISRC based on dV1 */
+ MLT_TC_COND_REDUCE_DV_LIM = 1;
+ if((MLT_TC_DISCHG_DV1 < 300)&&(MLT_TC_TEST_V1_MID)) /* C in 30-50uF Range */
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 60;
+ MLT_TC_T3 = 100;
+ }
+ else if((MLT_TC_DISCHG_DV1 < 500)&&(MLT_TC_TEST_V1_MID)) /* C in 20-40uF Range */
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 50;
+ MLT_TC_T3 = 80;
+ }
+ else if((MLT_TC_DISCHG_DV1 < 800)&&(MLT_TC_TEST_V1_MID))
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 40;
+ MLT_TC_T3 = 60;
+ }
+ else /* dV between 800 and 1000 */
+ {
+ /* Don't change Isrc...just increase time */
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 60;
+ MLT_TC_T3 = 100;
+ }
+
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** Medium C. Use V1 and V2 to compute result
+ ** Increase t2 if enough margin to improve
+ ** accuracy
+ */
+ else if(MLT_TC_TEST_V3_LOW_DV1_OK)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : MLT_TC_TEST_V3_LOW_DV1_OK\n");
+ MLT_TC_USE_V1_V2_ONLY = 1;
+ if(MLT_TC_DISCHG_V2 > 14000)
+ {
+ MLT_TC_T2 += 4;
+ }
+
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ if(MLT_TC_RUN_COUNT == 0)
+ {
+ pState->MeasState.stage = 1;
+ }
+ else
+ {
+ pState->MeasState.stage++;
+ }
+ }
+ /*
+ ** Fast Time Constant - first move t2,t3 for
+ ** 300nF-800nF range, then move all 3 capture times
+ ** for < 500nF
+ **
+ **
+ */
+ else if(MLT_TC_TEST_V2_V3_LOW)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : MLT_TC_TEST_V2_V3_LOW\n");
+ if(MLT_TC_RUN_COUNT == 0)
+ {
+ MLT_TC_T2 = 12;
+ MLT_TC_T3 = 18;
+ pState->MeasState.stage = 1;
+ }
+ else if(MLT_TC_RUN_COUNT == 1)
+ {
+ MLT_TC_T1 = 4;
+ MLT_TC_T2 = 8;
+ MLT_TC_T3 = 14;
+
+ MLT_TC_USE_V1_V2_ONLY = 1;
+ pState->MeasState.stage =1;
+ }
+ else /* Can't reduce any further, assume 0nF */
+ {
+ MLT_TC_CTR = 0;
+ pState->MeasState.stage = 20;
+ }
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ }
+ /*
+ ** Differing slopes - indicates inductor present.
+ ** Use V2 and V3 to compute result since V1 is
+ ** likely measured during the transient
+ */
+ else if(MLT_TC_TEST_SLOPE_ERR)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : MLT_TC_TEST_SLOPE_ERR\n");
+ MLT_TC_USE_V2_V3_ONLY = 1;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage++;
+ }
+ /*
+ ** V1 out of range, but V3 OK - double current
+ */
+ else if(MLT_TC_TEST_V1_HIGH_V3_OK)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : MLT_TC_TEST_V1_HIGH_V3_OK\n");
+ MLT_TC_ISRC *= 2;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** For 500uA case, if V3 > 20v, bump up
+ ** current to 700uA to improve accuracy
+ */
+ else if(MLT_TC_TEST_LOW_I_V3_MID)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : MLT_TC_TEST_LOW_I_V3_MID\n");
+ MLT_TC_ISRC = 700;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** Initial measurement in range
+ */
+ else
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : STATE : NO_CHANGE\n");
+ pState->MeasState.stage++;
+ }
+ MLT_TC_RUN_COUNT++;
+
+ /* Limit number of iterations */
+ if(MLT_TC_RUN_COUNT > MLT_TC_MAX_RUNS)
+ {
+ pState->MeasState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ MLT_TC_MEAS_CHG_PHASE = 1;
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Optional up/down measurement */
+ if(!MLT_TC_MEAS_CHG_PHASE)
+ {
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ if(measureTimeConstant(pProSLICMLT,&(pProSLICMLT->capFaults),&(pState->TimeConstState)))
+ {
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ if((MLT_TC_USE_V1_V2_ONLY)&&(MLT_TC_DISCHG_CTR1 < 300))
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : METHOD_V1_V2 : DISCHG_CTR1_ONLY\n");
+ MLT_TC_CTR = MLT_TC_DISCHG_CTR1;
+ }
+ else if((MLT_TC_USE_V1_V2_ONLY)&&(MLT_TC_DISCHG_CTR1 >= 300))
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : METHOD_V1_V2 : CTR1_AVG\n");
+ MLT_TC_CTR = (3L*MLT_TC_DISCHG_CTR1+MLT_TC_CHG_CTR1)/4L;
+ }
+ else if(MLT_TC_USE_V2_V3_ONLY)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : METHOD_V2_V3 : DISCHG_CTR2_ONLY\n");
+ MLT_TC_CTR = MLT_TC_DISCHG_CTR2;
+ }
+ else
+ {
+ /* Don't average large C's where offset current has little effect */
+ if(MLT_TC_DISCHG_CTR1 > 10000)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : METHOD_ALL : DISCHG_CTR1_CTR2_AVG\n");
+ MLT_TC_CTR = (MLT_TC_DISCHG_CTR1 + MLT_TC_DISCHG_CTR2)/2;
+ }
+ else
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : estimateCtr : METHOD_ALL : CTR1_AVG\n");
+ MLT_TC_CTR = (3L*MLT_TC_DISCHG_CTR1+MLT_TC_CHG_CTR1)/4L;
+ }
+ }
+
+ /* Compensate for EMI and linefeed capacitance */
+ MLT_TC_CTR -= (mlt_emi_cap + (mlt_line_cap/2))/10;
+ MLT_DEBUG_LOG("estimateCtr : Final Cavg = %d nF\n", MLT_TC_CTR);
+ pState->MeasState.stage = 20;
+ return RC_MLT_TEST_RUNNING;
+
+ case 20:
+ gndOpenTerm(pProSLICMLT->pProslic,FALSE);
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Coarse measure of capacitance between TIP and RING
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is stored under pProSLICMLT->capFaults.measTR
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+#define MLT_CTR_EST_VMAX 38000
+#define MLT_CTR_EST_VMIN 1800
+#define MLT_CTR_EST_LOW_DV_VMAX 38000
+#define MLT_CTR_EST_DVMIN 1000
+#define MLT_REN_CAP_RANGE_VMAX 46000
+#define MLT_CTR_EST_DV_SM 1500
+#define MLT_CTR_EST_DV_LG 5000
+#define MLT_CTR_EST_T1_FAST 4
+#define MLT_CTR_EST_T2_FAST 10
+#define MLT_CTR_EST_T1_LOW 6
+#define MLT_CTR_EST_T2_LOW 12
+#define MLT_CTR_EST_T1_HIGH 8
+#define MLT_CTR_EST_T2_HIGH 24
+#define MLT_CTR_EST_T1_SLOW 20
+#define MLT_CTR_EST_T2_SLOW 120
+
+
+static int estimateCtr(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_test_state *pState)
+{
+int32 iForce[] = {500,700,1000,2000,4000,8000,12000}; /* uA */
+static int maxIforceIndex = 6;
+static int modTimer = 0;
+int32 dt, dv;
+int32 slopeErr;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+uInt32 mlt_line_cap;
+uInt32 mlt_emi_cap;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ mlt_line_cap = pProSLICMLT->mlt_config.mlt_line_cap;
+ mlt_emi_cap = pProSLICMLT->mlt_config.mlt_emi_cap;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+ mlt_line_cap = MLT_LINE_CAPACITANCE;
+ mlt_emi_cap = MLT_EMI_CAPACITANCE;
+#endif
+
+ switch(pState->stage)
+ {
+ case 0:
+ pState->waitIterations=0;
+ pState->sampleIterations=0; /* Will be used as iForce[] index in this func */
+ pProSLICMLT->capFaults.time1 = MLT_CTR_EST_T1_LOW;
+ pProSLICMLT->capFaults.time2 = MLT_CTR_EST_T2_LOW;
+ modTimer = 0;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE,0x0); /* Disable powersave */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);/*max out threshold*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ setupDspTimers(pProSLICMLT->pProslic,pProSLICMLT->capFaults.time1,pProSLICMLT->capFaults.time2,pProSLICMLT->capFaults.time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,-1*iForce[pState->sampleIterations]); /* Force (-) current */
+ gndOpenTerm(pProSLICMLT->pProslic,TRUE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ delay_poll(pState,500/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Enable current source */
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ delay_poll(pState,((pProSLICMLT->capFaults.time2/10)*10 + 100)/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Read voltages, calculate dv/dt and C */
+ readDspTimerV(pProSLICMLT->pProslic,&(pProSLICMLT->capFaults.term.vloop[0]),&(pProSLICMLT->capFaults.term.vloop[1]),&(pProSLICMLT->capFaults.term.vloop[2]));
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ /* Calculate dv/dt and estimate C */
+ dt = fp_abs(pProSLICMLT->capFaults.time2 - pProSLICMLT->capFaults.time1);
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[1] - pProSLICMLT->capFaults.term.vloop[0]);
+ if(dv > 0) {
+ pProSLICMLT->capFaults.measTR2 = (fp_abs(iForce[pState->sampleIterations])*1000L*dt)/dv;
+ }
+ else {
+ pProSLICMLT->capFaults.measTR2 = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : iForce = %d uA\n", pState->sampleIterations,-1*iForce[pState->sampleIterations]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : VTR1 = %d mV\n", pState->sampleIterations,pProSLICMLT->capFaults.term.vloop[0]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : VTR2 = %d mV\n", pState->sampleIterations,pProSLICMLT->capFaults.term.vloop[1]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : dv = %d mV\n", pState->sampleIterations,dv);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : dt = %d ms\n", pState->sampleIterations,dt);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : Cest = %d nF\n", pState->sampleIterations,pProSLICMLT->capFaults.measTR2);
+
+ /* Set iloop to be used for final measurements */
+ pProSLICMLT->capFaults.term.iloop[0] = iForce[pState->sampleIterations];
+
+ /*
+ ** Check 0: Slope
+ **
+ ** If dv is < 1v, mod timers and repeat beause large C is present.
+ **
+ ** Do this only on the first iteration (eg. lowest iForce) so that results
+ ** can be interpretted properly.
+ */
+ if((modTimer == 0)&&(dv < MLT_CTR_EST_DVMIN)&&(pState->sampleIterations == 0))
+ {
+ /*
+ ** Check 1A: GND Headroom
+ **
+ ** If both measurements < MLT_CTR_MIN_VTR, then very small C, call it 0nF
+ */
+ if((pProSLICMLT->capFaults.term.vloop[0] < MLT_CTR_EST_VMIN)&&(pProSLICMLT->capFaults.term.vloop[1] < MLT_CTR_EST_VMIN)) {
+ pProSLICMLT->capFaults.measTR2 = 0;
+ pState->stage = 14;
+ return RC_MLT_TEST_RUNNING;
+ }
+ else if((pProSLICMLT->capFaults.term.vloop[0]< MLT_CTR_EST_LOW_DV_VMAX)&&(pProSLICMLT->capFaults.term.vloop[1] < MLT_CTR_EST_LOW_DV_VMAX))
+ {
+ /* Changed timers AND force 700uA test only (large C, large R) */
+ pProSLICMLT->capFaults.time1 = MLT_CTR_EST_T1_SLOW;
+ pProSLICMLT->capFaults.time2 = MLT_CTR_EST_T2_SLOW;
+ pState->sampleIterations = 1;
+ pProSLICMLT->capFaults.term.iloop[0] = iForce[pState->sampleIterations];
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ else
+ {
+ /* Change timers only (large C, small R) */
+ pProSLICMLT->capFaults.time1 = MLT_CTR_EST_T1_HIGH;
+ pProSLICMLT->capFaults.time2 = MLT_CTR_EST_T2_HIGH;
+ }
+ modTimer = 1;
+ pState->stage = 1; /* Repeat test */
+ return RC_MLT_TEST_RUNNING;
+ }
+ /*
+ ** Check 1B: GND Headroom
+ **
+ ** If both measurements < MLT_CTR_MIN_VTR, then very small C, call it 0nF
+ */
+ if((pProSLICMLT->capFaults.term.vloop[0] < MLT_CTR_EST_VMIN)&&(pProSLICMLT->capFaults.term.vloop[1] < MLT_CTR_EST_VMIN)) {
+ pProSLICMLT->capFaults.measTR2 = 0;
+ pState->stage = 14;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Check 2: Too Little Current Drive
+ **
+ ** If both measurements are > MLT_CTR_MAX_VTR, then large C and needs more current.
+ ** Increase current and repeat test. If on max current, then go with it.
+ */
+ if((pProSLICMLT->capFaults.term.vloop[0] > MLT_CTR_EST_VMAX)&&(pProSLICMLT->capFaults.term.vloop[1] > MLT_CTR_EST_VMAX) && (pState->sampleIterations < maxIforceIndex))
+ {
+ pState->sampleIterations++;
+ pState->stage = 1; /* Repeat test */
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Check 3: Slow Time Constant
+ **
+ ** If dV is very small, increase current drive
+ **
+ */
+ if((dv < MLT_CTR_EST_DV_SM)&&(pState->sampleIterations < maxIforceIndex))
+ {
+ pState->sampleIterations++;
+ pState->stage = 1; /* Repeat test */
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Check 4: Fast Time Constant
+ **
+ ** If dV is fairly large, shift sample window to prevent measuring a railed voltage
+ **
+ */
+ if(dv > MLT_CTR_EST_DV_LG)
+ {
+ pProSLICMLT->capFaults.time1 = MLT_CTR_EST_T1_FAST;
+ pProSLICMLT->capFaults.time2 = MLT_CTR_EST_T2_FAST;
+ }
+
+
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ delay_poll(pState, 200/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* Forward down measurement */
+ setupDspTimers(pProSLICMLT->pProslic,pProSLICMLT->capFaults.time1,pProSLICMLT->capFaults.time2,pProSLICMLT->capFaults.time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,-1*pProSLICMLT->capFaults.term.iloop[0]);
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ delay_poll(pState, ((pProSLICMLT->capFaults.time2/10)*10 + 100)/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 9:
+ readDspTimerV(pProSLICMLT->pProslic,&(pProSLICMLT->capFaults.term.vloop[0]),&(pProSLICMLT->capFaults.term.vloop[1]),&(pProSLICMLT->capFaults.term.vloop[2]));
+ dt = fp_abs(pProSLICMLT->capFaults.time2 - pProSLICMLT->capFaults.time1);
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[1] - pProSLICMLT->capFaults.term.vloop[0]);
+ if(dv > 0) {
+ pProSLICMLT->capFaults.measTR2 = (fp_abs(pProSLICMLT->capFaults.term.iloop[0])*1000L*dt)/dv;
+ }
+ else {
+ pProSLICMLT->capFaults.measTR2 = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : iForce = %d uA\n", -1*pProSLICMLT->capFaults.term.iloop[0]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : VTR1 = %d mV\n", pProSLICMLT->capFaults.term.vloop[0]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : VTR2 = %d mV\n", pProSLICMLT->capFaults.term.vloop[1]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : dv = %d mV\n", dv);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : dt = %d ms\n", dt);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : Cest = %d nF\n", pProSLICMLT->capFaults.measTR2);
+
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 10:
+ delay_poll(pState, 100/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 11:
+ setupDspTimers(pProSLICMLT->pProslic,pProSLICMLT->capFaults.time1,pProSLICMLT->capFaults.time2,pProSLICMLT->capFaults.time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,pProSLICMLT->capFaults.term.iloop[0]);
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 12:
+ delay_poll(pState, ((pProSLICMLT->capFaults.time2/10)*10 + 200)/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 13:
+ readDspTimerV(pProSLICMLT->pProslic,&(pProSLICMLT->capFaults.term.vloop[2]),&(pProSLICMLT->capFaults.term.vloop[3]),&(pProSLICMLT->capFaults.term.vloop[4]));
+ dt = fp_abs(pProSLICMLT->capFaults.time2 - pProSLICMLT->capFaults.time1);
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[3] - pProSLICMLT->capFaults.term.vloop[2]);
+ /* Store this reading in TG to be averaged with previous reading */
+ if(dv > 0) {
+ pProSLICMLT->capFaults.measTG2 = (fp_abs(pProSLICMLT->capFaults.term.iloop[0])*1000L*dt)/dv;
+ }
+ else {
+ pProSLICMLT->capFaults.measTG2 = 0;
+ }
+
+ /*
+ ** Compute Average *IF*
+ ** - up reading voltages within range
+ ** - both up and down readings are > 200nF
+ ** - slopes are within 10% of each other OR C < 2uF
+ ** otherwise, use down reading only
+ */
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[1] - pProSLICMLT->capFaults.term.vloop[0]);
+ slopeErr = fp_abs(dv - fp_abs(pProSLICMLT->capFaults.term.vloop[3] - pProSLICMLT->capFaults.term.vloop[2]));
+ slopeErr *= 1000;
+ slopeErr /= dv;
+
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[3] - pProSLICMLT->capFaults.term.vloop[2]);
+ if(((slopeErr < 200)||(pProSLICMLT->capFaults.measTR2 < 2000))&&(pProSLICMLT->capFaults.term.vloop[2] < MLT_REN_CAP_RANGE_VMAX)&&(pProSLICMLT->capFaults.term.vloop[3] < MLT_REN_CAP_RANGE_VMAX)&&(pProSLICMLT->capFaults.measTR2 > 200)&&(pProSLICMLT->capFaults.measTG2 > 200))
+ {
+ pProSLICMLT->capFaults.measTR2 += pProSLICMLT->capFaults.measTG2;
+ pProSLICMLT->capFaults.measTR2 /= 2;
+ }
+
+
+ /* Compensate for LF Caps */
+
+ pProSLICMLT->capFaults.measTR2 -= (mlt_emi_cap + (mlt_line_cap/2))/10;
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : iForce = %d uA\n", pProSLICMLT->capFaults.term.iloop[0]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : VTR1 = %d mV\n", pProSLICMLT->capFaults.term.vloop[2]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : VTR2 = %d mV\n", pProSLICMLT->capFaults.term.vloop[3]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : dv2 = %d mV\n", dv);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : dt = %d ms\n", dt);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : Cest = %d nF\n", pProSLICMLT->capFaults.measTG2);
+ MLT_DEBUG_LOG("\n");
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Slope Error : slopeErr = %d\n", slopeErr);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : AVG : Cavg = %d nF\n", pProSLICMLT->capFaults.measTR2);
+
+ /* Final dv check - if << 100mV, call it 0nF */
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[1] - pProSLICMLT->capFaults.term.vloop[0]);
+ if(dv < 100)
+ pProSLICMLT->capFaults.measTR2= 0;
+
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 14:
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ gndOpenTerm(pProSLICMLT->pProslic,FALSE);
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+
+/********************************************************************************/
+/**
+** @brief Measure REN using subthreshold ringing method
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Ouput is located under pProSLICMLT->ren.renValue
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - Uses 16vrms 20Hz ring signal and fits ringing current to calibrated curve to determine REN
+**
+*/
+static int si3217x_mlt_ren_subthresh_ring_method(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_ren_state *pState)
+{
+uInt8 regData;
+uInt8 irq2Reg,irq3Reg;
+int32 temp;
+int32 Ren;
+#ifdef MLT_REN_TEST_FREQ
+int test_freq = MLT_REN_TEST_FREQ;
+#endif
+int i;
+ uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+switch (pState->State.stage){
+ case 0:
+ si3217x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ regData = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_ENHANCE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE,regData&0x27);
+
+ setupDcFeedForRENTest(pProSLICMLT); /*set up low V_VLIM so we are guaranteed to start ringing*/
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE); /*go forward active to charge the line to V_VLIM*/
+ pState->State.sampleIterations=0;
+ pState->State.waitIterations=0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&(pState->State),200/mlt_poll_rate - 2 ); /*wait 5 tau*/
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,0xFFFFFFFL);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VBATR_EXPECT,0x3f00000L); /* 60v */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_AUTO,0x2e); /*disable battery tracking*/
+
+#ifdef MLT_REN_TEST_FREQ
+ if(test_freq == 16)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7F5A800L); /*16Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x72000L); /*16Vrms*/
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7efe000L); /*20Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x92000L); /*16Vrms*/
+ }
+#else
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7efe000L); /*20Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x92000L); /*16Vrms*/
+#endif
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x1CF4B64L);/*18Vdc */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DCDC_RNGTYPE,0);/* Fixed VBAT rail to fix distorting at GND issue */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGPHAS,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RTPER,0x50000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VCM_RING,0x1680000L);/*set vcm_ring so we dont clip*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_RINGCON,0);/*disable timers*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_COUNTER_VTR_VAL,0x51EB8L);/*couter_vtr-val*/
+ temp = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);/*clear power alarm and ringtrip interrupts*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3,(uInt8)temp); /*required for GCI to clear*/
+ temp = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2);/*clear*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2,(uInt8)temp);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN3,0x3);/* P_THERM_IE, P_HVIC_IE */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN2,0x1); /* RTP_IE */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_RINGING);/*start ringing*/
+ pState->max=0;
+ pState->State.stage++;
+
+
+ return RC_MLT_TEST_RUNNING;
+
+ case 3:
+ delay_poll(&(pState->State),250/mlt_poll_rate - 2);/*wait one ringing cycle to make sure ringing has started*/
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 4:
+ regData=pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED);/*check we made it to ringing state*/
+ if (regData != 0x44) /* Ringing failed to start/persist */
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Linefeed = 0x%0X\n", regData);
+
+ /* Check interrupts */
+ irq2Reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2);
+ irq3Reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ /* Restore entry conditions and force failing value */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ si3217x_restore_state(pProSLICMLT);
+ pProSLICMLT->ren.renValue = 999999L;
+ /* Check for ringtrip */
+ if( irq2Reg & 0x01 )
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Ringtrip on Ring Start \n");
+
+ return RC_MLT_FALSE_RINGTRIP;
+ }
+
+ /* Check for power alarm or thermal alarm */
+ if (irq3Reg & 0x03)
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Power/Thermal Alarm on Ring Start \n");
+ return RC_MLT_ALARM_ON_RING;
+ }
+
+ /* If not false ringtrip or alarm, return unknown ring start error */
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Ring Start Failed\n");
+ return RC_MLT_RINGSTART_ERR;
+ }
+
+ temp = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_MADC_ILOOP);
+
+ if (temp&0x10000000L)
+ temp |= 0xf0000000L; /*sign extend negative value*/
+ pState->v[pState->State.sampleIterations++] = temp; /*store sample*/
+
+ MLT_DEBUG_LOG("sample %d\tIloop = %d\n",pState->State.sampleIterations,(temp/10));
+
+ if (pState->State.sampleIterations == (MLT_REN_SAMPLE_TIME/mlt_poll_rate))
+ { /*we are done collecting samples - calculate*/
+
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE);/* ACTIVE before OPEN */
+ temp=0;
+
+ /*calculate dc value */
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ temp += pState->v[i];
+ }
+ temp /= MLT_REN_SAMPLE_TIME/mlt_poll_rate;
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ pState->v[i] -= temp; /*remove dc*/
+ }
+ temp =0;
+
+ /*calculate avg current*/
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ if (pState->v[i] < 0) /*recitfy the signal*/
+ pState->v[i] *= -1;
+ temp += pState->v[i]/10;
+ }
+ temp /= MLT_REN_SAMPLE_TIME/mlt_poll_rate;
+
+ MLT_DEBUG_LOG ("I Avg = %d\n",temp);
+
+ pState->max = temp;
+
+ /*we are cal'ing test - return raw value*/
+ if (pProSLICMLT->ren.renCalFlag){
+ pState->State.stage++;
+ pProSLICMLT->ren.renValue = pState->max;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*interpolate from cal values*/
+ if(pState->max > pProSLICMLT->ren.calData.renTrans)
+ Ren = ((pState->max - pProSLICMLT->ren.calData.highRenOffs)*1000)/pProSLICMLT->ren.calData.highRenSlope;
+ else
+ Ren = ((pState->max - pProSLICMLT->ren.calData.lowRenOffs)*1000)/pProSLICMLT->ren.calData.lowRenSlope;
+ if (Ren < 900)
+ Ren = ((pState->max - pProSLICMLT->ren.calData.extraLowRenOffset)*1000)/pProSLICMLT->ren.calData.extraLowRenSlope;
+
+ if (Ren < 0)
+ Ren = 0;
+ pProSLICMLT->ren.renValue = Ren;
+
+ MLT_DEBUG_LOG ("REN RAW = %d\n",Ren);
+
+ pState->State.stage++;
+
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* wait 1 ring period for ring exit */
+ delay_poll(&(pState->State),50/mlt_poll_rate - 2 );
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ si3217x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Implementation of capacitance measurement
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is stored in pState->testavo - diag power ac voltage measurement
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - This function does not modify the linefeed state or audio path
+** - This function measures testavo w/ 300Hz source applied and remeasures with 3014Hz source
+** if measured testavo reading is greater the MLT_MAX_300HZ_TESTAVO
+**
+*/
+static int measCapacitanceAC(ProSLICMLTType * pProSLICMLT, ProSLIC_mlt_capacitance_state * pState)
+{
+uInt32 data;
+ uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->MeasState.stage)
+ {
+ case 0:
+ pState->freq = 300;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ setup300HzBandpass(pProSLICMLT);
+ setup300HzTestTone(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /*enable testfilter */
+ pState->MeasState.stage++;
+ pState->MeasState.waitIterations = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&pState->MeasState, 900 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ data = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_TESTABO);
+ pState->testavo = data;
+
+ if (pState->testavo <= MLT_MAX_300HZ_TESTAVO)
+ {
+ return RC_MLT_TEST_COMPLETE;
+ }
+ pState->MeasState.stage++;
+ pState->freq = 3014;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ setup3014HzBandpass(pProSLICMLT);
+ setup3014HzTestTone(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /*enable testfilter */
+ pState->MeasState.waitIterations = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3:
+ delay_poll(&pState->MeasState, 900 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ pState->MeasState.stage++;
+ pState->MeasState.waitIterations = 0;
+ data = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_TESTABO);
+ pState->testavo = data;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+/********************************************************************************/
+/**
+** @brief Calculation of capacitance from TESTAVO reading
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+** @param[in] *pState - pointer to test state structure
+** @param[in] term - measured terminal
+**
+** @retval tmp - computed capacitance
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - This function does not modify the linefeed state or audio path
+** - This function measures testavo w/ 300Hz source applied and remeasures with 3014Hz source
+** if measured testavo reading is greater the MLT_MAX_300HZ_TESTAVO
+**
+*/
+static int32 processTestavoForC(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState, int term){
+uInt32 tmp;
+uInt32 zScale;
+uInt32 rp_mult;
+uInt32 r_bom_comp;
+uInt32 c_bom_comp;
+uInt32 mlt_prot_res;
+uInt32 mlt_line_cap;
+uInt32 mlt_emi_cap;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ mlt_line_cap = pProSLICMLT->mlt_config.mlt_line_cap;
+ mlt_emi_cap = pProSLICMLT->mlt_config.mlt_emi_cap;
+#else
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+ mlt_line_cap = MLT_LINE_CAPACITANCE;
+ mlt_emi_cap = MLT_EMI_CAPACITANCE;
+#endif
+
+ MLT_DEBUG_LOG("si3217x_mlt : processTestavoForC : TESTAVO = %d\n", pState->testavo);
+
+ if((term == MLT_TERM_TG)||(term == MLT_TERM_RG))
+ {
+ rp_mult = 10L;
+ r_bom_comp = MLT_HVIC_SWITCH_RES + mlt_prot_res;
+ c_bom_comp = mlt_line_cap + mlt_emi_cap;
+ }
+ else
+ {
+ rp_mult = 40L;
+ r_bom_comp = mlt_prot_res;
+ c_bom_comp = (mlt_line_cap/2) + mlt_emi_cap;
+ }
+
+ if(pState->freq == 300)
+ zScale = MLT_AUDIAG_SCALE_300HZ;
+ else
+ zScale = MLT_AUDIAG_SCALE_3014HZ;
+
+ if (pState->testavo > 310000L || (pState->freq == 3014)) /* Use Eq. 2 or 3 */
+ {
+ if ((pState->testavo > 500000L) && (pState->freq == 3014)) /* Use Eq. 3 */
+ {
+ tmp = (zScale * (pState->testavo / 100L));
+
+ MLT_DEBUG_LOG("si3217x_mlt : processTestavoForC : Method EQ 3\n");
+
+ tmp = (tmp / 100000L) * (tmp / 100000L); /* Zmag^2 */
+ tmp = (MLT_RS_CAPACITANCE_TEST / (tmp / 100L))*100L; /* (Rs^2/Zmag^2) */
+ tmp = tmp - 10000L; /* (Rs^2/Zmag^2) - 1 */
+ tmp = Isqrt(((tmp / 100L) * 16384L) / 100L); /* 16384 and 1179 are part of a truncation minimization */
+ tmp = (tmp * 1000L) / (1179L); /* minito implement 1/2*pi*f*Rs, or 1/92108312 */
+
+ }
+ else /* Use Eq. 2 */
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : processTestavoForC : Method EQ 2\n");
+
+ tmp = ((628L * pState->freq) / 100L * zScale) / 100000L;
+ tmp = tmp * (pState->testavo / 1000L);
+ tmp = (1000000000L / (tmp / 100L)) / 10L;
+ tmp = (tmp / 10L); /* - (LINE_CAPACITANCE/2); */
+ }
+ }
+ else /* Use Eq. 4 - large C */
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : processTestavoForC : Method EQ 4\n");
+ tmp = (zScale * (pState->testavo/10L));
+ tmp = (tmp / 10000L) * (tmp / 10000L);
+ tmp = tmp / 10L - rp_mult * (r_bom_comp*r_bom_comp);
+ tmp = Isqrt((tmp*10L) / 39L); /* 10/39 ~ 256/10000 */
+ tmp = ((tmp * pState->freq) / 16L) * 628L;
+ tmp = 1000000000L / (tmp / 1000L);
+ }
+
+ /* Compensate for bom & emi caps */
+
+ tmp -= c_bom_comp;
+
+ MLT_DEBUG_LOG("si3217x_mlt : processTestavoForC : adjC(%d) = %d\n", pState->freq,tmp);
+
+ return tmp;
+}
+/**@}*/
+
+
+
+/*
+** Function: si3217x_mlt_abort - documented in si3217x_mlt.h
+*/
+int si3217x_mlt_abort(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_test_state *pState)
+{
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->stage)
+ {
+ case 0:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED, LF_OPEN);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+ case 1:
+ delay_poll(pState,50/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ case 2:
+ si3217x_restore_state(pProSLICMLT);
+ pState->stage++;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+/*
+** Function: si3217x_mlt_foreign_voltages - documented in si3217x_mlt.h
+*/
+int si3217x_mlt_foreign_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState){
+ int i;
+ int32 data;
+ int32 tmp;
+ int32 vtsqrt, vrsqrt, vtrsqrt;
+ uInt8 reg;
+ uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ /* Start of reentrant block */
+ switch (pState->State.stage){
+
+ case 0: /* Enable user mode, store entry settings, and initialize state structure */
+ si3217x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE,reg&0x27);
+
+ if(pState->samples > MLT_MAX_FEMF_SAMPLES)
+ pState->samples = MLT_MAX_FEMF_SAMPLES;
+ pState->State.waitIterations=0;
+ pState->State.sampleIterations=0;
+ pState->State.stage++;
+ setupDcFeedCloseToZero (pProSLICMLT);
+ Si3217x_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE);
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->State),MLT_TS_HAZV_LINE_DISCHARGE/(mlt_poll_rate) - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Go Open for Hi-Z measurement */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN); /*disconnect from line*/
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Setup coarse sensors, enable diag, select VTIPC */
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VTIPC, MADC_HIRES);
+ diagSet(pProSLICMLT->pProslic, DIAG_ENABLE);
+ MLT_DEBUG_LOG ("OFFSET (vtipc) = %d mV\n",pState->tipOffs);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Read VTIPC samples, remove offset on each sample */
+ tmp = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - MLT_CONST_COARSE_SENSE_VOFFS;
+ pState->vt[pState->State.sampleIterations] = tmp - pState->tipOffs;
+ pState->State.sampleIterations++;
+ if (pState->State.sampleIterations == pState->samples)
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Reset sample counter, select VRINGC */
+ pState->State.sampleIterations=0;
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VRINGC, MADC_HIRES);
+ diagSet(pProSLICMLT->pProslic, DIAG_ENABLE);
+ MLT_DEBUG_LOG ("OFFSET (vringc) = %d mV\n",pState->ringOffs);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Read VRINGC samples, remove offset on each sample */
+ tmp = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - MLT_CONST_COARSE_SENSE_VOFFS;
+ pState->vr[pState->State.sampleIterations] = tmp - pState->ringOffs;
+ pState->State.sampleIterations++;
+ if (pState->State.sampleIterations == pState->samples) {
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pState->State.stage++;
+ #else
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pState->State.stage = 9;
+ #endif
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* Differential AC Measurement - Normal Res */
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pState->State.waitIterations = 0;
+ pState->State.sampleIterations = 0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Read coarse VTR samples */
+ pState->vtr[pState->State.sampleIterations] = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_COARSE,0);
+ pState->State.sampleIterations++;
+ if(pState->State.sampleIterations == pState->samples) {
+ pState->State.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9: /* Cleanup */
+ si3217x_restore_state(pProSLICMLT);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Calculate DC Voltages
+ */
+
+ pProSLICMLT->hazVDC.measTG = 0;
+ pProSLICMLT->hazVDC.measRG = 0;
+ pProSLICMLT->hazVDC.measTR = 0;
+ pProSLICMLT->hazVDC.measAUX = 0;
+
+ for (i = 0; i < pState->samples; i++)
+ {
+ pProSLICMLT->hazVDC.measTG += pState->vt[i];
+ pProSLICMLT->hazVDC.measRG += pState->vr[i];
+ pProSLICMLT->hazVDC.measAUX += pState->vtr[i];
+ }
+ pProSLICMLT->hazVDC.measTG /= pState->samples;
+ pProSLICMLT->hazVDC.measRG /= pState->samples;
+ pProSLICMLT->hazVDC.measAUX /= pState->samples;
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVDC.measTR = pProSLICMLT->hazVDC.measTG - pProSLICMLT->hazVDC.measRG;
+ #endif
+
+ /*
+ ** Calculate AC Voltages ( units of 100&Vrms^2 )
+ */
+ for (i = 0; i < pState->samples; i++)
+ {
+ pState->vt[i] -= pProSLICMLT->hazVDC.measTG;
+ pState->vr[i] -= pProSLICMLT->hazVDC.measRG;
+ pState->vtr[i] -= pProSLICMLT->hazVDC.measAUX;
+ }
+
+ pProSLICMLT->hazVAC.measTG = 0;
+ pProSLICMLT->hazVAC.measRG = 0;
+ pProSLICMLT->hazVAC.measTR = 0;
+
+ for (i = 0; i < pState->samples; i++)
+ {
+ pProSLICMLT->hazVAC.measTG += (pState->vt[i] / 100) * (pState->vt[i] / 100);
+ pProSLICMLT->hazVAC.measRG += (pState->vr[i] / 100) * (pState->vr[i] / 100);
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVAC.measTR += (pState->vtr[i] / 100) * (pState->vtr[i] / 100);
+ #endif
+ }
+
+ pProSLICMLT->hazVAC.measTG /= pState->samples;
+ pProSLICMLT->hazVAC.measRG /= pState->samples;
+
+ /* Skip rest if VTR measurement disabled */
+#ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVAC.measTR /= pState->samples;
+
+ /* Below 10v, trAC may not be very accurate due to having to use normal madc mode */
+ /* If trAC is < 10v, check to see if tgAC + rgAC is within 25% of trAC. If so, it */
+ /* likely that Vtg and Vrg are out of phase and Vtr may be calculated as Vtg+Vrg */
+ /* If the sum is not within 25% of trAC, do not modify trAC because voltage on */
+ /* tg and rg must be common mode. */
+
+ vtsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measTG);
+ vrsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measRG);
+ vtrsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measTR);
+
+ /* Calculate error between sum of longitudinal voltages and measured differential */
+ if (vtrsqrt > 0)
+ {
+ data = 100 * fp_abs((vtsqrt + vrsqrt) - vtrsqrt);
+ data /= vtrsqrt;
+ } else
+ data = 100;
+
+ if (data < 0)
+ data = -data;
+
+ MLT_DEBUG_LOG("si3217x_mlt: VtgSQ = %d\tVtg = %d\n", pProSLICMLT->hazVAC.measTG, vtsqrt);
+ MLT_DEBUG_LOG("si3217x_mlt: VrgSQ = %d\tVrg = %d\n", pProSLICMLT->hazVAC.measRG, vrsqrt);
+ MLT_DEBUG_LOG("si3217x_mlt: VtrSQ = %d\tVtr = %d\n", pProSLICMLT->hazVAC.measTR, vtrsqrt);
+
+
+ if (data < 25)
+ {
+ pProSLICMLT->hazVAC.measTR = vtsqrt + vrsqrt;
+ pProSLICMLT->hazVAC.measTR /= 10; /* prevent overflow */
+ pProSLICMLT->hazVAC.measTR *= pProSLICMLT->hazVAC.measTR;
+ }
+#endif
+
+ /*
+ ** Invert voltage polarity relative to GND
+ */
+ pProSLICMLT->hazVDC.measTR *= -1;
+ pProSLICMLT->hazVDC.measTG *= -1;
+ pProSLICMLT->hazVDC.measRG *= -1;
+ if (pProSLICMLT->hazVAC.measTG < 0)
+ pProSLICMLT->hazVAC.measTG *=-1;
+ if (pProSLICMLT->hazVAC.measRG < 0)
+ pProSLICMLT->hazVAC.measRG *=-1;
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+
+/*
+** Function: si3217x_mlt_hazard_voltages - documented in si3217x_mlt.h
+*/
+int si3217x_mlt_hazard_voltages(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_foreign_voltages_state *pState)
+{
+ return si3217x_mlt_foreign_voltages(pProSLICMLT,pState);
+}
+
+
+/*
+** Function: si3217x_mlt_resistive_faults - documented in si3217x_mlt.h
+*/
+int si3217x_mlt_resistive_faults(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState)
+{
+ int32 vc2;
+ int32 data;
+ int alarm;
+ uInt16 mlt_poll_rate;
+ int32 bal_ratio;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant block */
+ switch(pState->setupState.stage)
+ {
+ case 0: /* Setup diag current source for T-R dvdt measurement */
+ si3217x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ ProSLIC_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ /* Set VBATH to 70v */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VBATH_EXPECT,MLT_RES_VBATH_SET);
+
+ /* Initialize return values and methods */
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measAUX = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.ahsFlag = 0;
+ pProSLICMLT->resFaults.trFlag = 0;
+ pProSLICMLT->resFaults.rgFlag = 0;
+ pProSLICMLT->resFaults.tgFlag = 0;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ pState->rtrMethod = RESFAULT_METHOD_UNDEFINED;
+ pState->rtgMethod = RESFAULT_METHOD_UNDEFINED;
+ pState->rrgMethod = RESFAULT_METHOD_UNDEFINED;
+
+ if(Si3217x_General_Configuration.pm_bom == BO_PM_BOM)
+ {
+ pProSLICMLT->pm_bom_flag = 1;
+ }
+ else
+ {
+ pProSLICMLT->pm_bom_flag = 0;
+ }
+#ifdef PM_BOM
+ pProSLICMLT->pm_bom_flag = 1;
+#endif
+
+ pState->smallRFlag=0;
+ pState->setupState.waitIterations=0;
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,MLT_MAX_I_THRESH);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,MLT_MAX_I_THRESH);
+ /* Go Active */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN3,0x1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC, MLT_CONST_P_TH_HVIC );
+
+ /* Setup dc current source = 2V*0.31957mA/V = 639.14uA*/
+ if(MLT17X_REVB)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_B_RAM_STDBY_THRLO,0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT17X_B_RAM_STDBY_THRHI,0L);
+ }
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);/*set slope_ring*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x337A28L); /*2V*/
+ diagSet(pProSLICMLT->pProslic,DIAG_ENABLE|DIAG_DCLPF_44K|DIAG_FB_OFF);
+
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Wait*/
+ delay_poll(&(pState->setupState),400/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Setup diag current source for V2 measurement (time constant)*/
+ pState->v1 = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_FILT,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x1FCC85D8L);
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* wait - fixed 20ms wait period */
+ delay_poll(&(pState->setupState),20/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Measure T-R dV/dt to set auto-v step size and settle times */
+ vc2 = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_FILT,0);
+ pState->dvdt_tr = fp_abs(pState->v1 - vc2);
+ pState->dvdt_tr /= 20L;
+
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : dV/dt est : %d v/s\n",pState->dvdt_tr);
+
+ diagSet(pProSLICMLT->pProslic,DIAG_ENABLE);
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ /*check for small fault to ground - if it is present we probe further in individual tests.*/
+ setupDcFeed35VCM(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ delay_poll(&(pState->setupState),250/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ /* Estimate range of longitudinal fault by looking at current on TIP and RING.
+ ** If less than 10mA (large R) do auto-v method,
+ ** otherwise use normal dc feed.
+ */
+ data = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ITIP,0);
+ if(data < -10000L)
+ {
+ pState->smallRFlag = 1;
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : Small-R ITIP = %d uA : smallRFlag = %d\n",data,pState->smallRFlag);
+ }
+
+ data = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_IRING,0);
+ if(data < -10000L)
+ {
+ pState->smallRFlag |= 2;
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : Small-R IRING = %d uA : smallRFlag = %d\n",data,pState->smallRFlag);
+ }
+
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_OPEN);
+ pState->TRState.stage = 0;
+ pState->TGState.stage = 0;
+ pState->RGState.stage = 0;
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ /*
+ ** Skip TR measurement if smallRFlag is set - must be TG or RG fault
+ ** Otherwise, do TR measurement
+ */
+ if(pState->smallRFlag)
+ {
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_RUNNING;
+ }
+#ifdef MLT_RES_RTR_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+ if(measRtr(pProSLICMLT,pState))
+ {
+ /* If small Rtr, skip other tests */
+ if(pProSLICMLT->resFaults.trFlag == 1)
+ {
+ pState->setupState.stage = 11;
+ return RC_MLT_TEST_RUNNING;
+ }
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** If power alarm occurs while measuring RTR (usually due to small Rrg)
+ ** abort measurement and skip to RRG
+ */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : Aborted RTR Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9:
+#ifdef MLT_RES_RRG_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+ if(measRrg(pProSLICMLT,pState))
+ {
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ /* If power alarm occurs, abort */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : Aborted RRG Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 10:
+#ifdef MLT_RES_RTG_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+ if(measRtg(pProSLICMLT,pState))
+ {
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ /* If power alarm occurs, abort */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm)
+ {
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : Aborted RTG Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 11:
+ si3217x_restore_state(pProSLICMLT);
+
+ /*
+ ** Post-measurement analysis
+ **
+ ** Keep measurement results for dominant (smallest) fault only,
+ ** which is applicable when supporting single-fault model.
+ **
+ ** Leave compile option to return raw values for user to post
+ ** process on their own if they wish to examine 2T values.
+ **
+ */
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : RTR MEAS = %d\n", pProSLICMLT->resFaults.measTR);
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : RRG MEAS = %d\n", pProSLICMLT->resFaults.measRG);
+ MLT_DEBUG_LOG("si3217x_mlt : resFaults : RTG MEAS = %d\n", pProSLICMLT->resFaults.measTG);
+
+ /*
+ ** Cap each measurement at 2Mohm
+ */
+ if(pProSLICMLT->resFaults.measRG > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ if(pProSLICMLT->resFaults.measTG > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ if(pProSLICMLT->resFaults.measTR > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+
+ pState->fault_term = MLT_TERM_TR; /* Default to TR */
+ /*
+ ** Isolate single fault
+ */
+
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ bal_ratio = MLT_CONST_PM_BAL_RATIO;
+ }
+ else
+ {
+ bal_ratio = MLT_CONST_BAL_RATIO;
+ }
+
+ /*
+ ** RG Check:
+ ** 1. RRG < 2Mohm
+ ** 2. RRG < RTR
+ ** 3. RRG+25% < RTG
+ */
+ if((pProSLICMLT->resFaults.measRG < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measRG < pProSLICMLT->resFaults.measTR)&&
+ (bal_ratio*pProSLICMLT->resFaults.measRG/pProSLICMLT->resFaults.measTG < 100L))
+ {
+ pState->fault_term = MLT_TERM_RG;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TG Check:
+ ** 1. RTG < 2Mohm
+ ** 2. RTG < RTR
+ ** 3. RTG+25% < RRG
+ */
+ else if((pProSLICMLT->resFaults.measTG < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measTG < pProSLICMLT->resFaults.measTR)&&
+ (bal_ratio*pProSLICMLT->resFaults.measTG/pProSLICMLT->resFaults.measRG < 100L))
+ {
+ pState->fault_term = MLT_TERM_TG;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TR Check:
+ ** 1. RTR < 2Mohm
+ ** 2. RTG & RRG within 25% of each other
+ ** Note: RTR may be less than RRG and/or RTG since their measurements
+ ** include RTR + small leakage of HVIC switch.
+ */
+ else if((pProSLICMLT->resFaults.measTR < MLT_CONST_MAX_RES)&&
+ (100L*pProSLICMLT->resFaults.measTG/pProSLICMLT->resFaults.measRG < bal_ratio)&&
+ (100L*pProSLICMLT->resFaults.measRG/pProSLICMLT->resFaults.measTG < bal_ratio))
+ {
+ pState->fault_term = MLT_TERM_TR;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TR Re-Check:
+ ** 1. RRG != RTG
+ ** 2. RTR < RRG
+ ** 3. RTR < RTG
+ **
+ ** Multiple fault case (not supported). Report TR case if smallest.
+ */
+ else if((pProSLICMLT->resFaults.measTR < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measTR < pProSLICMLT->resFaults.measRG)&&
+ (pProSLICMLT->resFaults.measTR < pProSLICMLT->resFaults.measTG))
+ {
+ pState->fault_term = MLT_TERM_TR;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_COMPLETE;
+ break;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/*
+** Function: si3217x_mlt_receiver_offhook - documented in si3217x_mlt.h
+*/
+int si3217x_mlt_receiver_offhook(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_roh_state *pState)
+{
+ ProslicRAMInit dcfeed7mA [] = {
+ {MLT_COMM_RAM_SLOPE_VLIM,0x1EB48978L},
+ {MLT_COMM_RAM_SLOPE_RFEED,0x1FDA6949L},
+ {MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L},
+ {MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL},
+ {MLT_COMM_RAM_SLOPE_DELTA1,0x1907F1D3L},
+ {MLT_COMM_RAM_SLOPE_DELTA2,0x1AD45894L},
+ {MLT_COMM_RAM_V_VLIM,0x5A38633L},
+ {MLT_COMM_RAM_V_RFEED,0x55B5917L},
+ {MLT_COMM_RAM_V_ILIM,0x3E67006L},
+ {MLT_COMM_RAM_CONST_RFEED,0x526775L},
+ {MLT_COMM_RAM_CONST_ILIM,0x209246L},
+ {MLT_COMM_RAM_I_VLIM,0x2D8D96L},
+ {0xFFFF, 0xFFFFFFFFL} /*end flag*/
+ };
+ ProslicRAMInit dcfeed14mA [] = {
+ {MLT_COMM_RAM_SLOPE_VLIM,0x1B9C5AA7L},
+ {MLT_COMM_RAM_SLOPE_RFEED,0x1FC0DB63L},
+ {MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L},
+ {MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL},
+ {MLT_COMM_RAM_SLOPE_DELTA1,0x1E119F8AL},
+ {MLT_COMM_RAM_SLOPE_DELTA2,0x1E46C831L},
+ {MLT_COMM_RAM_V_VLIM,0x5A38633L},
+ {MLT_COMM_RAM_V_RFEED,0x55B5917L},
+ {MLT_COMM_RAM_V_ILIM,0x3E67006L},
+ {MLT_COMM_RAM_CONST_RFEED,0x7F6F07L},
+ {MLT_COMM_RAM_CONST_ILIM,0x41248DL},
+ {MLT_COMM_RAM_I_VLIM,0x2D8D96L},
+ {0xFFFF, 0xFFFFFFFFL} /*end flag*/
+ };
+ ProslicRegInit empty [] = {
+ {0xFF,0xFF} /*end flag*/
+ };
+
+ int32 iloop;
+ int32 vdiff;
+ int32 zDiff;
+ int32 zDiffLimit = MLT_ROH_MAX_ZDIFF;
+ int32 zDiffREN = MLT_ROH_MIN_ZDIFF_REN;
+ int32 RmaxTR = MLT_ROH_MAX_ZTR;
+ uInt8 reg;
+ uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ /* Start of reentrant loop */
+ switch (pState->State.stage)
+ {
+ case 0: /* Store entry conditions, setup DC feed for 7mA source, go active */
+ si3217x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE,reg&0x27);
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);/*max out threshold*/
+ pState->State.waitIterations=0;
+ pState->State.sampleIterations=0;
+ Si3217x_LoadRegTables(&(pProSLICMLT->pProslic),dcfeed7mA,empty,1);
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* settle */
+ delay_poll(&(pState->State),MLT_TS_ROH_MEAS1/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Measure I & V, calc first Ztr, setup 14mA source */
+ iloop = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+ if (iloop > MLT_ROH_MIN_ILOOP)
+ pState->Rv1 = ((vdiff*1000) / iloop)*100;
+ else
+ pState->Rv1 = 1000000000;
+ if (vdiff < MLT_ROH_MIN_VLOOP)
+ pState->Rv1 = 1; /* call it a short */
+ Si3217x_LoadRegTables(&(pProSLICMLT->pProslic),dcfeed14mA,empty,1);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* settle */
+ delay_poll(&(pState->State),MLT_TS_ROH_MEAS2/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Measure I & V, calc second Ztr, computations */
+ iloop = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+ if (iloop > MLT_ROH_MIN_ILOOP)
+ pState->Rv2 = ((vdiff*1000) / iloop)*100;
+ else
+ pState->Rv2 = 1000000000;
+ if (vdiff < MLT_ROH_MIN_VLOOP)
+ pState->Rv2 = 1; /* call it a short */
+
+ MLT_DEBUG_LOG("Rv1 = %d\nRv2 = %d\n",pState->Rv1,pState->Rv2);
+
+
+
+ /* If both impedances are high, no fault or offhook cpe device */
+ if ((pState->Rv1 == 1000000000) && (pState->Rv2 == 1000000000)) {
+ pProSLICMLT->roh.rohTrue = 0; /* no fault, roh passed */
+ }
+ else {
+ zDiff = pState->Rv1-pState->Rv2;
+ zDiff = ((zDiff)*100)/pState->Rv1;
+ if (zDiff<0) zDiff*=-1;
+
+ MLT_DEBUG_LOG("zDiff = %d\n",zDiff);
+
+ /*Qualify resistance and resistance differences*/
+
+ if((pState->Rv1 == 1)&& (zDiff >= zDiffLimit)) { /* < 100ohms*/
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_RESFAULT;
+ }
+ else if((zDiff >= zDiffLimit)&&((pState->Rv1/100)<RmaxTR)&&((pState->Rv2/100)<RmaxTR)) {
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_ROH;
+ }
+ else {
+ if(((pState->Rv1/100 < 10000) || (pState->Rv2/100 < 10000)) && (zDiff < zDiffREN) )
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_RESFAULT;
+ else
+ pProSLICMLT->roh.rohTrue = 0;
+ }
+ }
+ si3217x_restore_state(pProSLICMLT);
+ pState->State.stage++;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+/*
+** Function: si3217x_mlt_ren - documented in si3217x_mlt.h
+*/
+int si3217x_mlt_ren(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_state *pState){
+
+ return si3217x_mlt_ren_subthresh_ring_method (pProSLICMLT,pState);
+
+
+}
+
+/*
+** Function: si3217x_mlt_capacitance - documented in si3217x_mlt.h
+*/
+
+int si3217x_mlt_capacitance(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState)
+{
+int32 trC, rgC, tgC;
+int32 iForcep = 5000;
+int32 iForcen = -5000;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->State.stage)
+ {
+ case 0:
+ si3217x_preserve_state(pProSLICMLT); /*save register settings */
+
+ /* Disable Low Power Mode */
+ Si3217x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ setup300HzBandpass(pProSLICMLT);
+ pState->freq = 300;
+ if(MLT17X_REVB)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT17X_B_RAM_STDBY_THRLO, 0L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT17X_B_RAM_STDBY_THRHI, 0L); /* */
+ }
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RA_EN_B, 0x300000L); /*ra_sum disconnect */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_COMP_Z, 0x0L); /*comp_z disable */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_EZSYNTH_B0, 0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RXACGAIN, 0x2000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RXACGAIN_SAVE, 0x2000000L);
+
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIGCON, 0x1C); /*disable hyb */
+ /* Force on audio path */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_AUDIO_MAN, 0x300000L); /*force audio on */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_BIAS, 0x200000L); /*pd_bias */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_ADC, 0x200000L); /*pd_adc */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_DAC, 0x200000L); /*pd_dac */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_SNS, 0x200000L); /*pd_ac_sns */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x10); /* */
+
+ MLT_DEBUG_LOG("si3217x_mlt : Capacitance : TIP-RING\n");
+
+ Si3217x_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE); /*enable line driver */
+ /* Setup diag current source */
+
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcep);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+
+ pState->State.stage++;
+ pState->State.waitIterations=0;
+ pState->MeasState.stage = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* bias settle */
+ delay_poll(&pState->State, 600 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_RA, 0); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_EZSYNTH_B0, 0L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_COMP_Z, 0L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_AUDIO_MAN, 0x300000L); /*force audio on */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_OSC1FREQ, 0x7C70000L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_OSC1AMP, 0x2A000L); /*force audio on */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* osc settle */
+ delay_poll(&pState->State, 600 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Measure TIP-RING Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measTR = processTestavoForC(pProSLICMLT,pState,MLT_TERM_TR);
+
+ MLT_DEBUG_LOG("si3217x_mlt : Capacitance : tr_raw = %d.%d nF\n", pProSLICMLT->capFaults.measTR / 10, pProSLICMLT->capFaults.measTR % 10);
+
+ /* Setup for RING-GND Measurement */
+ pState->ram1447 = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_TIP_OPEN); /* tip-open */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0x300000L); /*pd_cm */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*active delay*/
+ if(MLT_CHIPREV == SI3217X_REVB)
+ {
+ uInt8 rev_test;
+ rev_test = (uInt8)((pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, 1791)>>20)&0x000000FFL);
+ if(rev_test == 0x10)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_HVIC_STATE,pState->ram1447 | 0x2f000L);
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_HVIC_STATE,pState->ram1447 | 0x2f0000L);
+ }
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447 | 0x2f000L);
+ }
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcep);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+ pState->State.stage++;
+ pState->MeasState.stage=0;
+
+ MLT_DEBUG_LOG("si3217x_mlt : Capacitance : RING-GND\n");
+
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 5:
+ delay_poll(&pState->State, 200 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+
+ return RC_MLT_TEST_RUNNING;
+ case 7:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Measure RING-GND Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measRG = processTestavoForC(pProSLICMLT,pState,MLT_TERM_RG);
+
+ MLT_DEBUG_LOG("si3217x_mlt : Capacitance : rg_raw = %d.%d nF\n", pProSLICMLT->capFaults.measRG / 10, pProSLICMLT->capFaults.measRG % 10);
+
+ /* Setup for T-G Measurement */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_RING_OPEN);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0x300000L); /*pd_cm */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*active delay*/
+ if(MLT_CHIPREV == SI3217X_REVB)
+ {
+ uInt8 rev_test;
+ rev_test = (uInt8)((pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, 1791)>>20)&0x000000FFL);
+ if(rev_test == 0x10)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_HVIC_STATE,pState->ram1447 | 0x82f000L);
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_HVIC_STATE,pState->ram1447 | 0x1f0000L);
+ }
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447 | 0x82f000L);
+ }
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcen); /* -5000 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+ pState->State.stage++;
+ pState->MeasState.stage=0;
+
+ MLT_DEBUG_LOG("si3217x_mlt : Capacitance : TIP-GND\n");
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 10:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 11:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 12: /* Measure TIP-GND Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measTG = processTestavoForC(pProSLICMLT,pState,MLT_TERM_TG);
+
+ MLT_DEBUG_LOG("si3217x_mlt : Capacitance : tg_raw = %d.%d nF\n", pProSLICMLT->capFaults.measTG / 10, pProSLICMLT->capFaults.measTG % 10);
+
+ /* Restore Settings */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_OPEN);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0L); /*pd_cm */
+
+
+ /* Compute 3-terminal values */
+ if (pProSLICMLT->capFaults.measTR < 0) pProSLICMLT->capFaults.measTR = 0L;
+ if (pProSLICMLT->capFaults.measTG < 0) pProSLICMLT->capFaults.measTG = 0L;
+ if (pProSLICMLT->capFaults.measRG < 0) pProSLICMLT->capFaults.measRG = 0L;
+
+
+
+ #if (MLT_DISABLE_3TERM_CAP_COMPENSATION)
+ trC = pProSLICMLT->capFaults.measTR - (LINE_CAPACITANCE/2);
+ tgC = pProSLICMLT->capFaults.measTG - LINE_CAPACITANCE;
+ rgC = pProSLICMLT->capFaults.measRG - LINE_CAPACITANCE;
+ #else
+ /*three-terminal compensation */
+ trC = (-pProSLICMLT->capFaults.measTG / 2) - (pProSLICMLT->capFaults.measRG / 2) + 2 * pProSLICMLT->capFaults.measTR;
+ tgC = (3 * pProSLICMLT->capFaults.measTG) / 2 + pProSLICMLT->capFaults.measRG / 2 - 2 * pProSLICMLT->capFaults.measTR;
+ rgC = pProSLICMLT->capFaults.measTG / 2 + (3 * pProSLICMLT->capFaults.measRG) / 2 - 2 * pProSLICMLT->capFaults.measTR;
+ #endif
+ pProSLICMLT->capFaults.measTR = trC;
+ pProSLICMLT->capFaults.measRG = rgC;
+ pProSLICMLT->capFaults.measTG = tgC;
+
+ /*clip output values */
+ if (pProSLICMLT->capFaults.measTR < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measTR = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTR > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measTR = MLT_MAX_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTG < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measTG = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTG > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measTG = MLT_MAX_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measRG < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measRG = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measRG > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measRG = MLT_MAX_CAPACITANCE;
+
+ pState->State.stage = 70;
+
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ si3217x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_RUNNING;
+}
+
+
+
+/*
+** Function: si3217x_mlt_cap_ren - documented in si3217x_mlt.h
+*/
+
+int si3217x_mlt_ren_cap(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_cap_state *pState)
+{
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->State.stage)
+ {
+ case 0:
+ si3217x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ Si3217x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+
+ pState->MeasState.stage = 0;
+ pState->MeasState.waitIterations = 0;
+ pState->MeasState.sampleIterations = 0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ if(MLT17X_REVB)
+ {
+ if(estimateCtr(pProSLICMLT,&(pState->MeasState)))
+ {
+ pState->State.stage++;
+ }
+ }
+ else
+ {
+ if(estimateCtr_2(pProSLICMLT,pState))
+ {
+ pState->State.stage++;
+ }
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ si3217x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+}
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3218x_mlt.c b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3218x_mlt.c
new file mode 100644
index 0000000..6bddb3f
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3218x_mlt.c
@@ -0,0 +1,4187 @@
+/*
+** Copyright (c) 2007-2014 by Silicon Laboratories
+**
+** $Id: si3218x_mlt.c 4552 2014-10-28 21:55:37Z nizajerk $
+**
+*/
+/*! \file si3218x_mlt.c
+** \brief Si3218x ProSLIC MLT interface implementation file
+**
+** This is the implementation file for the Si3218x MLT functions
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+** This code may produce different results on different host processors
+**
+*/
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#define SI_USE_IFACE_MACROS
+#include "proslic_mlt.h"
+#include "proslic_mlt_math.h"
+#include "proslic_mlt_diag_madc.h"
+#include "proslic_mlt_dcfeed.h"
+
+#include "si3218x.h"
+#include "si3218x_intf.h"
+#include "si3218x_mlt.h"
+#include "mlt_comm_regs.h"
+#include "mlt18x_a_regs.h"
+
+
+/*
+** Datalogging Macro
+*/
+#ifdef ENABLE_DEBUG
+#define MLT_DEBUG_LOG(...) \
+ if(pProSLICMLT->pProslic->debugMode) {\
+ LOGPRINT(__VA_ARGS__);\
+ }
+#else
+#define MLT_DEBUG_LOG(...) do {} while(0)
+#endif
+
+/*
+** MLT Specific Patch RAM Locations
+*/
+#define MLT18X_A_PRAM_VTR3 796
+#define MLT18X_A_PRAM_STOP_TIMER3 798
+#define MLT18X_A_PRAM_STOP_TIMER3_VAL 797
+
+extern Si3218x_General_Cfg Si3218x_General_Configuration;
+typedef int (*execAutoV_fptr)(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState);
+
+/*******************************************************/
+
+/*
+** List of RAM Addresses to be stored before each MLT test is executed
+*/
+
+/* Common RAM */
+static const uInt16 si3218x_comm_preserve_RAM[] = {
+ MLT_COMM_RAM_SLOPE_VLIM,
+ MLT_COMM_RAM_SLOPE_RFEED,
+ MLT_COMM_RAM_SLOPE_ILIM,
+ MLT_COMM_RAM_SLOPE_RING,
+ MLT_COMM_RAM_SLOPE_DELTA1,
+ MLT_COMM_RAM_SLOPE_DELTA2,
+ MLT_COMM_RAM_V_VLIM,
+ MLT_COMM_RAM_V_RFEED,
+ MLT_COMM_RAM_V_ILIM,
+ MLT_COMM_RAM_CONST_RFEED,
+ MLT_COMM_RAM_CONST_ILIM,
+ MLT_COMM_RAM_I_VLIM,
+ MLT_COMM_RAM_VCM_OH,
+ MLT_COMM_RAM_VOV_BAT,
+ MLT_COMM_RAM_VOV_GND,
+ MLT_COMM_RAM_P_TH_HVIC,
+ MLT_COMM_RAM_VCMDAC_SCALE_MAN,
+ MLT_COMM_RAM_LCROFFHK,
+ MLT_COMM_RAM_LCRONHK,
+ MLT_COMM_RAM_RINGAMP,
+ MLT_COMM_RAM_RINGOF,
+ MLT_COMM_RAM_RTPER,
+ MLT_COMM_RAM_RINGFR,
+ MLT_COMM_RAM_RINGPHAS,
+ MLT_COMM_RAM_VCM_RING,
+ MLT_COMM_RAM_COUNTER_VTR_VAL,
+ MLT_COMM_RAM_LONGHITH,
+ MLT_COMM_RAM_LONGLOTH,
+ MLT_COMM_RAM_RA_EN_B,
+ MLT_COMM_RAM_AUDIO_MAN,
+ MLT_COMM_RAM_PD_BIAS,
+ MLT_COMM_RAM_PD_DC_BUF,
+ MLT_COMM_RAM_PD_AC_ADC,
+ MLT_COMM_RAM_PD_AC_DAC,
+ MLT_COMM_RAM_PD_AC_SNS,
+ MLT_COMM_RAM_PD_CM,
+ MLT_COMM_RAM_LKG_UPT_ACTIVE,
+ MLT_COMM_RAM_LKG_UPR_ACTIVE,
+ MLT_COMM_RAM_LKG_DNT_ACTIVE,
+ MLT_COMM_RAM_LKG_DNR_ACTIVE,
+ MLT_COMM_RAM_COMP_Z,
+ MLT_COMM_RAM_EZSYNTH_B0,
+ MLT_COMM_RAM_VBATR_EXPECT,
+ MLT_COMM_RAM_VBATH_EXPECT,
+ MLT_COMM_RAM_RXACGAIN,
+ MLT_COMM_RAM_RXACGAIN_SAVE,
+ MLT_COMM_RAM_OSC1FREQ,
+ MLT_COMM_RAM_OSC1AMP,
+ MLT_COMM_RAM_OSC1PHAS,
+ MLT_COMM_RAM_HVIC_STATE_MAN,
+ MLT_COMM_RAM_TESTB0_1,
+ MLT_COMM_RAM_TESTB1_1,
+ MLT_COMM_RAM_TESTB2_1,
+ MLT_COMM_RAM_TESTA1_1,
+ MLT_COMM_RAM_TESTA2_1,
+ MLT_COMM_RAM_TESTB0_2,
+ MLT_COMM_RAM_TESTB1_2,
+ MLT_COMM_RAM_TESTB2_2,
+ MLT_COMM_RAM_TESTA1_2,
+ MLT_COMM_RAM_TESTA2_2,
+ MLT_COMM_RAM_TESTB0_3,
+ MLT_COMM_RAM_TESTB1_3,
+ MLT_COMM_RAM_TESTB2_3,
+ MLT_COMM_RAM_TESTA1_3,
+ MLT_COMM_RAM_TESTA2_3,
+ MLT_COMM_RAM_TESTAVBW,
+ MLT_COMM_RAM_TESTWLN,
+ MLT_COMM_RAM_TESTAVTH,
+ MLT_COMM_RAM_TESTPKTH,
+ 0 /* NULL TERMINATE */
+};
+
+
+/* Rev A Specific RAM */
+static const uInt16 si3218x_A_preserve_RAM[] = {
+ MLT18X_A_RAM_STOP_TIMER2_VAL,
+ MLT18X_A_RAM_STOP_TIMER2,
+ MLT18X_A_RAM_STOP_TIMER1_VAL,
+ MLT18X_A_RAM_STOP_TIMER1,
+ MLT18X_A_RAM_DIAG_V_TAR,
+ 0 /* NULL TERMINATE */
+};
+
+
+/* Common Registers */
+static const uInt8 si3218x_comm_preserve_Reg[] = {
+ MLT_COMM_REG_LINEFEED,
+ MLT_COMM_REG_PDN,
+ MLT_COMM_REG_RINGCON,
+ MLT_COMM_REG_AUTO,
+ MLT_COMM_REG_IRQEN1,
+ MLT_COMM_REG_IRQEN2,
+ MLT_COMM_REG_IRQEN3,
+ MLT_COMM_REG_IRQEN4,
+ MLT_COMM_REG_ENHANCE,
+ MLT_COMM_REG_DIGCON,
+ MLT_COMM_REG_GPIO,
+ MLT_COMM_REG_GPIO_CFG1,
+ MLT_COMM_REG_GPIO_CFG2,
+ MLT_COMM_REG_GPIO_CFG3,
+ MLT_COMM_REG_DIAG1,
+ MLT_COMM_REG_DIAG2,
+ MLT_COMM_REG_OCON,
+ MLT_COMM_REG_OMODE,
+ MLT_COMM_REG_RA,
+ 0 /* NULL TERMINATE */
+};
+
+
+/* RevA Registers */
+static const uInt8 si3218x_A_preserve_Reg[] = {
+ MLT18X_A_REG_DIAG3,
+ 0 /* NULL TERMINATE */
+};
+
+
+/**
+ * @internal @defgroup SI3218X_DRV_STATIC Si3218x Driver Level Static APIs
+ * These functions are used by the Si3218x driver and never called from a higher level routine
+ *
+ * @{
+ */
+/********************************************************************************/
+/**
+** @brief Delay function utilizing reentry
+**
+** @param[in] *pState - MLT state structure
+** @param[in] delayCount - number of reentries or polling cycles
+**
+** @retval void
+**
+** @todo Implement poll rate adjustment in this function
+*/
+static void delay_poll (ProSLIC_mlt_test_state *pState,uInt16 delayCount){
+ pState->waitIterations++;
+ if ((pState->waitIterations == delayCount) || (delayCount == 0)){
+ pState->waitIterations=0;
+ pState->stage++;
+ }
+}
+
+
+/********************************************************************************/
+/**
+** @brief Stores select RAM and register values defined by
+** si3218x_preserve_RAM and si3218x_preserve_RAM arrays.
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+static void si3218x_preserve_state (ProSLICMLTType *pProSLICMLT){
+int i;
+
+ i=0;
+ while(si3218x_comm_preserve_RAM[i] != 0)
+ {
+ pProSLICMLT->preserveRAM[i].address = si3218x_comm_preserve_RAM[i];
+ pProSLICMLT->preserveRAM[i].initValue = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,si3218x_comm_preserve_RAM[i]);
+ i++;
+ }
+ pProSLICMLT->preserveRAM[i].address = 0; /* Null Terminate */
+
+ i=0;
+ while(si3218x_A_preserve_RAM[i] != 0)
+ {
+ pProSLICMLT->preserveAuxRAM[i].address = si3218x_A_preserve_RAM[i];
+ pProSLICMLT->preserveAuxRAM[i].initValue = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,si3218x_A_preserve_RAM[i]);
+ i++;
+ }
+ pProSLICMLT->preserveAuxRAM[i].address = 0; /* Null Terminate */
+
+ i=0;
+ while(si3218x_comm_preserve_Reg[i] != 0)
+ {
+ pProSLICMLT->preserveReg[i].address = si3218x_comm_preserve_Reg[i];
+ pProSLICMLT->preserveReg[i].initValue = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,si3218x_comm_preserve_Reg[i]);
+ i++;
+ }
+ pProSLICMLT->preserveReg[i].address = 0; /* Null Terminate */
+
+ i=0;
+ while(si3218x_A_preserve_Reg[i] != 0)
+ {
+ pProSLICMLT->preserveAuxReg[i].address = si3218x_A_preserve_Reg[i];
+ pProSLICMLT->preserveAuxReg[i].initValue = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,si3218x_A_preserve_Reg[i]);
+ i++;
+ }
+ pProSLICMLT->preserveAuxReg[i].address = 0; /* Null Terminate */
+}
+
+
+/********************************************************************************/
+/**
+** @brief Restores RAM and register data defined by si3218x_preserve_RAM and
+** si3218x_preserve_REG array of addresses
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+static void si3218x_restore_state (ProSLICMLTType *pProSLICMLT){
+int i;
+
+ i=0;
+ while(pProSLICMLT->preserveRAM[i].address != 0)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveRAM[i].address,pProSLICMLT->preserveRAM[i].initValue);
+ i++;
+ }
+
+ i=0;
+ while(pProSLICMLT->preserveAuxRAM[i].address != 0)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveAuxRAM[i].address,pProSLICMLT->preserveAuxRAM[i].initValue);
+ i++;
+ }
+
+ i=0;
+ while(pProSLICMLT->preserveReg[i].address != 0)
+ {
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveReg[i].address,pProSLICMLT->preserveReg[i].initValue);
+ i++;
+ }
+
+ i=0;
+ while(pProSLICMLT->preserveAuxReg[i].address != 0)
+ {
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveAuxReg[i].address,pProSLICMLT->preserveAuxReg[i].initValue);
+ i++;
+ }
+}
+
+
+/********************************************************************************/
+/**
+** @brief Setup DSP Timers
+**
+** @param[in] *pProslic - Pointer to channel object
+** @param[in] timer1 - Timer 1 preset (usec)
+** @param[in] timer2 - Timer 2 preset (usec)
+** @param[in] timer3 - Timer 3 preset (usec)
+**
+** @retval void
+**
+*/
+static void setupDspTimers(proslicChanType_ptr pProslic, int timer1, int timer2, int timer3)
+{
+int32 t1;
+int32 t2;
+int32 t3;
+uInt8 regTmp;
+
+ t1 = timer1*MLT_CONST_DSP_TIMER_SCALE;
+ t2 = timer2*MLT_CONST_DSP_TIMER_SCALE;
+ t3 = timer3*MLT_CONST_DSP_TIMER_SCALE;
+
+ regTmp = ReadReg(pProHW,pProslic->channel,MLT18X_A_REG_DIAG3);
+ WriteReg(pProHW,pProslic->channel,MLT18X_A_REG_DIAG3,regTmp&0xFD);
+ WriteRAM(pProHW,pProslic->channel,MLT18X_A_PRAM_STOP_TIMER3_VAL, t3);
+ WriteRAM(pProHW,pProslic->channel,MLT18X_A_PRAM_STOP_TIMER3, t3);
+ WriteRAM(pProHW,pProslic->channel,MLT18X_A_RAM_STOP_TIMER2_VAL, t2);
+ WriteRAM(pProHW,pProslic->channel,MLT18X_A_RAM_STOP_TIMER2, t2);
+ WriteRAM(pProHW,pProslic->channel,MLT18X_A_RAM_STOP_TIMER1_VAL, t1);
+ WriteRAM(pProHW,pProslic->channel,MLT18X_A_RAM_STOP_TIMER1, t1);
+}
+
+
+static void armDspTimers(proslicChanType_ptr pProslic)
+{
+uInt8 regTmp;
+
+ regTmp = ReadReg(pProHW,pProslic->channel,MLT18X_A_REG_DIAG3);
+ WriteReg(pProHW,pProslic->channel,MLT18X_A_REG_DIAG3,regTmp|0x02);
+}
+
+static void readDspTimerV(proslicChanType_ptr pProslic, int32 *v1, int32 *v2, int32 *v3)
+{
+int16 addr1,addr2,addr3;
+
+ addr1 = MLT18X_A_RAM_VTR1;
+ addr2 = MLT18X_A_RAM_VTR2;
+ addr3 = MLT18X_A_PRAM_VTR3;
+
+ *v1 = ReadRAM(pProHW,pProslic->channel,addr1);
+ if (*v1 & 0x10000000L)
+ *v1 |= 0xF0000000L;
+ *v2 = ReadRAM(pProHW,pProslic->channel,addr2);
+ if (*v2 & 0x10000000L)
+ *v2 |= 0xF0000000L;
+
+ *v1 /= MLT_CONST_DSP_TIMER_V_SCALE;
+ *v2 /= MLT_CONST_DSP_TIMER_V_SCALE;
+
+ *v3 = ReadRAM(pProHW,pProslic->channel,addr3);
+ if (*v3 & 0x10000000L)
+ *v3 |= 0xF0000000L;
+
+ *v3 /= MLT_CONST_DSP_TIMER_V_SCALE;
+
+}
+
+
+static void gndOpenTerm(proslicChanType_ptr pProslic, int gndOn)
+{
+ if(gndOn)
+ {
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE, 0x2F000L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_PD_CM, 0x300000L);
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_PD_CM, 0x0L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE_MAN, 0x0L);
+ }
+}
+
+/********************************************************************************/
+/**
+** @brief Establish AUTO-V step size from measured dV/dt
+**
+** @param[in] pState - Pointer to resistance test state structure
+** @param[in] pProSLICMLT - Pointer to ProSLIC channel structure
+**
+** @retval int32
+
+** @remark
+** - The constants applied in this function were empirically derived.
+** - Settle times test voltages may be modified by the user, but it is not recommended.
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+*/
+static int setupAutovForDvdt(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState)
+{
+int return_val = RC_MLT_ERROR;
+
+ switch(pState->active_term)
+ {
+ case MLT_TERM_TR:
+ return_val = RC_NONE;
+
+ pState->interval = 10; /* Fast interval req'd to monitor for AHS charge pump */
+
+ if((pState->dvdt_tr > 0) && (pState->dvdt_tr <= 95))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 2000000L;
+ }
+ else if((pState->dvdt_tr > 95) && (pState->dvdt_tr <= 120))
+ {
+ pState->setupState.settleTime = 500;
+ pState->step = 800000L;
+ }
+ else if((pState->dvdt_tr > 120) && (pState->dvdt_tr <= 150))
+ {
+ pState->setupState.settleTime = 400;
+ pState->step = 400000L;
+ }
+ else if((pState->dvdt_tr > 150) && (pState->dvdt_tr <= 210))
+ {
+ pState->setupState.settleTime = 300;
+ pState->step = 200000L;
+ }
+ else
+ {
+ pState->setupState.settleTime = 200;
+ pState->step = 120000L;
+ }
+
+ /* Adjust test voltages and settle time if AHS detected */
+ if(pState->ahs_det.detected > 0)
+ {
+ pState->setupState.settleTime = MLT_RES_AUTOV_DIFF_AHS_SETTLE;
+ pState->vtar[0] = MLT_RES_AUTOV_DIFF_AHS_V1;
+ if(pState->ahs_det.detected == 1)
+ pState->vtar[1] = MLT_RES_AUTOV_DIFF_AHS_V2;
+ }
+ else
+ {
+ pState->vtar[0] = MLT_RES_AUTOV_DIFF_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_DIFF_V2;
+ }
+
+ break;
+
+
+ case MLT_TERM_TG:
+ case MLT_TERM_RG:
+ return_val = RC_NONE;
+ pState->interval = 30;
+
+ if((pState->dvdt_tr > 0) && (pState->dvdt_tr <= 90))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 200000;
+ pState->interval = 50;
+ }
+ else if((pState->dvdt_tr > 90) && (pState->dvdt_tr <= 120))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 200000;
+ pState->interval = 30;
+ }
+ else
+ {
+ pState->setupState.settleTime = 300;
+ pState->step = 100000;
+ pState->interval = 30;
+ }
+
+ /* Adjust test voltages and settle time if AHS detected during TR test */
+ if(pState->ahs_det.count > 0)
+ {
+ pState->setupState.settleTime = MLT_RES_AUTOV_LONG_AHS_SETTLE;
+ pState->vtar[0] = MLT_RES_AUTOV_LONG_AHS_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_LONG_AHS_V2;
+ }
+ else
+ {
+ pState->vtar[0] = MLT_RES_AUTOV_LONG_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_LONG_V2;
+ }
+
+ if(pState->active_term == MLT_TERM_TG)
+ {
+ pState->vtar[0] *= -1;
+ pState->vtar[1] *= -1;
+ }
+ break;
+ }
+ return return_val;
+}
+/********************************************************************************/
+/**
+** @brief Implements Auto-V offset calibration
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+
+static int calOffsetAutoV (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState)
+{
+int32 i_samp;
+int32 v_samp;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant loop */
+ switch (pState->autoVState.stage)
+ {
+ case 0:
+ /****************************************/
+ /* Setup DIAG current source for 0V T-R */
+ /****************************************/
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0); /* DC */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DIAG_ADJ_STEP,pState->step);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT18X_A_RAM_DIAG_V_TAR,0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC,0x4468adL);
+ diagSet(pProSLICMLT->pProslic, DIAG_AUTO_V|DIAG_ENABLE|DIAG_KDC_OFF|DIAG_DCLPF_44K|DIAG_FB_OFF);
+ pState->autoVState.waitIterations=0;
+ pState->autoVState.sampleIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 2: /* Capture samples and accumulate */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+ pState->imeas += i_samp;
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ {
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v_offset = pState->vmeas;
+ pState->i_offset = pState->imeas;
+
+ pState->autoVState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 3:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_DIAG1,0);/*disable diag*/
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* Switch */
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Implements Auto-V adaptive force-IV/measure-IV method
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int execAutoV (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState)
+{
+int32 i_samp;
+int32 v_samp;
+int32 v_target;
+int i;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ /* Start of reentrant loop */
+ switch (pState->autoVState.stage)
+ {
+ case 0:
+ /************************************/
+ /* Setup DIAG current source/AUTO-V */
+ /************************************/
+ v_target = pState->vtar[0] * MLT_CONST_AUTO_V_VTAR;
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0); /* DC */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DIAG_ADJ_STEP,pState->step);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT18X_A_RAM_DIAG_V_TAR,v_target);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC,0x4468adL);
+ diagSet(pProSLICMLT->pProslic, DIAG_AUTO_V|DIAG_ENABLE|DIAG_KDC_OFF|DIAG_DCLPF_44K|DIAG_FB_OFF);
+ pState->autoVState.waitIterations=0;
+ pState->autoVState.sampleIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 2: /* Capture samples and accumulate */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+ if(pState->active_term == MLT_TERM_TR)
+ pState->imeas += (i_samp-pState->i_offset);
+ else
+ pState->imeas += i_samp;
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ {
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v1 = pState->vmeas;
+ pState->i1 = pState->imeas;
+
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : Avg V1 = %dmV \n",pState->vmeas);
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : Avg I1 = %duA \n",pState->imeas);
+
+ pState->autoVState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 3: /* Setup for 2nd measurement */
+ pState->autoVState.sampleIterations = 0;
+ pState->autoVState.waitIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ v_target = pState->vtar[1] * MLT_CONST_AUTO_V_VTAR;
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT18X_A_RAM_DIAG_V_TAR,v_target);
+
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 5: /* Capture samples and accumulate 2nd measurement*/
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+
+ if(pState->active_term == MLT_TERM_TR)
+ {
+ pState->imeas += (i_samp-pState->i_offset);
+ pState->i_array[pState->autoVState.sampleIterations] = (i_samp-pState->i_offset);
+ }
+ else
+ {
+ pState->imeas += i_samp;
+ }
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ {
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v2 = pState->vmeas;
+ pState->i2 = pState->imeas;
+ pState->autoVState.stage++;
+
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : Avg V2 = %dmV \n",pState->vmeas);
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : Avg I2 = %duA \n",pState->imeas);
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 6: /* Computations */
+
+ /* -------------------------
+ ** Active Handset Detection
+ ** -------------------------
+ */
+
+ if((pState->ahs_det.enable)&&(pState->active_term == MLT_TERM_TR))
+ {
+ /*
+ ** Test 1:
+ **
+ ** Compute RMS current of second capture. If an active handset
+ ** is present, there will be a large ac component.
+ */
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->i_array[i] -= pState->imeas; /* Remove DC */
+ }
+ pState->ahs_det.irms = 0;
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->ahs_det.irms += (pState->i_array[i])*(pState->i_array[i]);
+ }
+
+ pState->ahs_det.irms /= pState->autoVState.numSamples;
+
+ /*
+ ** Test 2:
+ **
+ ** Look at different between ratio of I2 to I1 and the difference
+ ** between I2 and I1 (eg. large ratio, small difference)
+ */
+ pState->ahs_det.ratio = (pState->i2 * 1000L) / pState->i1;
+ pState->ahs_det.ratio -= (pState->i2 - pState->i1);
+
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : AHS Rms = %d uArms\n", pState->ahs_det.irms);
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : AHS Ratio = %d \n", pState->ahs_det.ratio);
+
+ /*
+ ** Test against configurable rms current and current
+ ** ratio limits to identify active handset. Occassionally,
+ ** current is measure while the AHS's charge pump is not
+ ** active, so the current ratio will cover that portion.
+ **
+ ** There are cases in which a longitudinal fault in parallel
+ ** with the AHS will result in missing both of these, but
+ ** the magnitude of the fault is large enough that it becomes
+ ** the dominant concern.
+ **
+ ** In the case of a TG fault, the ratio will be large, but
+ ** the absolute current will be low, so I2 is also checked.
+ **
+ */
+ pState->ahs_det.detected = 0; /* Default to 0 */
+
+ if((pState->ahs_det.irms > 200L)&&(pState->i2 >= 300L))
+ {/* Case in which harge pump is full on */
+ if((pState->ahs_det.irms >= 700L)&&(pState->ahs_det.irms < 1000L)&&(pState->ahs_det.ratio > 14000L))
+ {/* Outlier AHS with large breakover leakage > 24v */
+ pState->ahs_det.detected = 2;
+ }
+ else if(pState->ahs_det.ratio >= 10000L) /* Typical AHS */
+ {
+ pState->ahs_det.detected = 1;
+ }
+ }
+ else if((pState->ahs_det.irms > 1000L)&&(pState->ahs_det.ratio > 1000L))
+ {/* Typical AHS in which charge pump just turns on */
+ pState->ahs_det.detected = 1;
+ }
+
+ }
+
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_DIAG1,0);/*disable diag*/
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* Switch */
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+static int execAutoV_2 (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState)
+{
+int32 i_samp;
+int32 v_samp;
+int32 v_open_term = 0;
+int32 i_leak = 0;
+int32 v_target;
+int i;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant loop */
+ switch (pState->autoVState.stage)
+ {
+ case 0:
+ /************************************/
+ /* Setup DIAG current source/AUTO-V */
+ /************************************/
+ v_target = pState->vtar[0] * MLT_CONST_AUTO_V_VTAR;
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+
+ /* If RG or TG, setup coarse sensors to measure OPEN terminal */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VTIPC, MADC_HIRES);
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VRINGC, MADC_HIRES);
+ }
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0); /* DC */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DIAG_ADJ_STEP,pState->step);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT18X_A_RAM_DIAG_V_TAR,v_target);
+pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC,0x4468adL);
+ diagSet(pProSLICMLT->pProslic, DIAG_AUTO_V|DIAG_ENABLE|DIAG_KDC_OFF|DIAG_DCLPF_44K|DIAG_FB_OFF);
+ pState->autoVState.waitIterations=0;
+ pState->autoVState.sampleIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 2: /* Sample Interval */
+ delay_poll(&(pState->autoVState),pState->interval/mlt_poll_rate );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 3: /* Capture samples and accumulate */
+
+ /* Drive terminal voltage */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+
+
+ /* Open terminal voltage (if applicable) */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->tipOffs;
+ i_leak = (v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : Tip Open V = %dmV \n", v_open_term);
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : Tip Leakage = %duA \n", i_leak);
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->ringOffs;
+ i_leak = -(v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : Ring Open V = %dmV \n", v_open_term);
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : Ring Leakage = %duA \n", i_leak);
+ }
+
+ /* Drive terminal current */
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+
+ /* Store drive current less leakage */
+ pState->imeas += (i_samp - i_leak);
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ { /* Compute averages */
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v1 = pState->vmeas;
+ pState->i1 = pState->imeas;
+
+#ifdef MLT_RES_AUTOV_SINGLE_SAMPLE
+ pState->v1 = v_samp;
+ pState->i1 = i_samp;
+#endif
+
+ printk ("si3218x_mlt : execAutoV : Avg V1 = %dmV \n",pState->vmeas);
+ printk ("si3218x_mlt : execAutoV : Avg I1 = %duA \n",pState->imeas);
+
+ pState->autoVState.stage++;
+ }
+ else /* Take next sample */
+ {
+ pState->autoVState.stage = 2;
+ }
+
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 4: /* Setup for 2nd measurement */
+ pState->autoVState.sampleIterations = 0;
+ pState->autoVState.waitIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ v_target = pState->vtar[1] * MLT_CONST_AUTO_V_VTAR;
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT18X_A_RAM_DIAG_V_TAR,v_target);
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 6: /* Sample Interval */
+ delay_poll(&(pState->autoVState),pState->interval/mlt_poll_rate );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 7: /* Capture samples and accumulate 2nd measurement*/
+ /* Drive terminal voltage */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+
+ /* Open terminal voltage (if applicable) */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->tipOffs;
+ i_leak = (v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->ringOffs;
+ i_leak = -(v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ }
+
+
+ /* Drive terminal current */
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+
+ /* Store sample for AHS detection */
+ pState->i_array[pState->autoVState.sampleIterations] = i_samp - i_leak;
+ /* Store drive current less leakage */
+ pState->imeas += (i_samp - i_leak);
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ { /* Compute averages */
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v2 = pState->vmeas;
+ pState->i2 = pState->imeas;
+
+#ifdef MLT_RES_AUTOV_SINGLE_SAMPLE
+ pState->v2 = v_samp;
+ pState->i2 = i_samp;
+#endif
+ pState->autoVState.stage++;
+
+ printk ("si3218x_mlt : execAutoV : Avg V2 = %dmV \n",pState->vmeas);
+ printk ("si3218x_mlt : execAutoV : Avg I2 = %duA \n",pState->imeas);
+ }
+ else
+ { /* Take next sample */
+ pState->autoVState.stage = 6;
+ }
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 8: /* AHS Computation */
+
+ /* -------------------------
+ ** Active Handset Detection
+ ** -------------------------
+ */
+
+ if(pState->ahs_det.enable)
+ {
+ /*
+ ** Test 1:
+ **
+ ** Compute RMS current of second capture. If an active handset
+ ** is present, there will be a large ac component.
+ */
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->i_array[i] -= pState->imeas; /* Remove DC */
+ }
+ pState->ahs_det.irms = 0;
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->ahs_det.irms += (pState->i_array[i])*(pState->i_array[i]);
+ }
+
+ pState->ahs_det.irms /= pState->autoVState.numSamples;
+
+ /*
+ ** Test 2:
+ **
+ ** Look at different between ratio of I2 to I1 and the difference
+ ** between I2 and I1 (eg. large ratio, small difference)
+ */
+ if(pState->i1 != 0)
+ {
+ pState->ahs_det.ratio = (pState->i2 * 1000L) / pState->i1;
+ }
+ else
+ {
+ pState->ahs_det.ratio = (pState->i2 * 1000L);
+ }
+ pState->ahs_det.ratio -= (pState->i2 - pState->i1);
+
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : AHS Rms = %d uArms\n", pState->ahs_det.irms);
+ MLT_DEBUG_LOG ("si3218x_mlt : execAutoV : AHS Ratio = %d \n", pState->ahs_det.ratio);
+
+ /*
+ ** Test against configurable rms current and current
+ ** ratio limits to identify active handset. Occassionally,
+ ** current is measure while the AHS's charge pump is not
+ ** active, so the current ratio will cover that portion.
+ **
+ ** There are cases in which a longitudinal fault in parallel
+ ** with the AHS will result in missing both of these, but
+ ** the magnitude of the fault is large enough that it becomes
+ ** the dominant concern.
+ **
+ ** In the case of a TG fault, the ratio will exceed 3000, but
+ ** the absolute current will be low, so I2 is also checked.
+ */
+ pState->ahs_det.detected = 0; /* Default to 0 */
+
+ if((pState->ahs_det.ratio >= 3000)&&(pState->i2 > 200))
+ {
+ pState->ahs_det.detected = 1;
+ }
+ else if((pState->ahs_det.irms > 200L)&&(pState->ahs_det.ratio > 2000))
+ {
+ pState->ahs_det.detected = 2;
+ }
+
+ }
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_DIAG1,0);/*disable diag*/
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* Switch */
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @internal @brief Measures resistance present between TIP and RING
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Upon completion, pProSLICMLT->resFaults.measTR have the measured values.
+** @param[in] *pState - pointer to test state structure
+**
+** @retval
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRtr(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+ int32 vdiff,ir;
+ static execAutoV_fptr pExecAutoV;
+ uInt16 mlt_poll_rate;
+ uInt32 mlt_prot_res;
+ int32 tr_req_const;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tr_req_const = MLT_CONST_PM_REQ_DIFF_EV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_EV_0;
+ }
+ }
+ else
+ {
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tr_req_const = MLT_CONST_PM_REQ_DIFF_SV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_SV_0;
+ }
+ }
+
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tr_req_const = MLT_CONST_PM_REQ_DIFF_EV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_EV_0;
+ }
+#else
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tr_req_const = MLT_CONST_PM_REQ_DIFF_SV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_SV_0;
+ }
+#endif
+#endif
+ /* Start of reentrant block */
+ switch (pState->TRState.stage){
+
+ case 0:
+ pExecAutoV = &execAutoV_2;
+ pState->active_term = MLT_TERM_TR;
+ pState->ahs_det.enable = MLT_RES_AUTOV_AHS_DET_EN; /* Enable active handset detection */
+ pState->ahs_det.detected = 0; /* Clear active handset detection flag */
+ pState->ahs_det.count = 0; /* Clear remeasure counter */
+ pState->autoVState.numSamples = MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Initialize flags and counters; Setup linefeed */
+ pState->TRState.waitIterations=0;
+ pState->TRState.sampleIterations=0;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ pProSLICMLT->resFaults.trFlag = 0;
+ pProSLICMLT->resFaults.tgFlag = 0;
+ pProSLICMLT->resFaults.rgFlag = 0;
+ setupDcFeedAutoV(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* settle linefeed */
+ delay_poll(&(pState->TRState),450/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Check for small Rtr in FWD mode */
+ ir = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : FWD Short : ILOOP = %duA\n",ir);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : FWD Short : VDIFF = %dmV\n", vdiff);
+
+ if(ir > MLT_RES_SM_R_MIN_I_FWD)
+ { /* Store if iloop > 8mA */
+ pProSLICMLT->resFaults.measTR = (vdiff*10000)/ir - 2*mlt_prot_res;
+ if(pProSLICMLT->resFaults.measTR < 0)
+ pProSLICMLT->resFaults.measTR = 0;
+ pProSLICMLT->resFaults.trFlag = 1;
+ }
+ else
+ { /* Consider open and do auto-v test */
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.trFlag = 0;
+ }
+ /* Setup for reverse active test */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_REV_ACTIVE);
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* settle */
+ delay_poll(&(pState->TRState),450/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* check for small Rtr in REV active, decide which is real later */
+ ir = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : REV Short : ILOOP = %duA\n",ir);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : REV Short : VDIFF = %dmV\n", vdiff);
+
+ if(fp_abs(ir) > MLT_RES_SM_R_MIN_I_REV)
+ { /* store if > 7ma (1ma of error between fwd/rev */
+ pProSLICMLT->resFaults.measAUX = (fp_abs(vdiff)*10000)/fp_abs(ir) - 2*mlt_prot_res;
+ if(pProSLICMLT->resFaults.measAUX < 0)
+ pProSLICMLT->resFaults.measAUX = 0;
+ pProSLICMLT->resFaults.auxFlag = 1;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measAUX = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ }
+
+ /* Return to FWD */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+
+ /*
+ ** If both fwd and rev indicate a small R, skip remainder of test
+ ** since the small fault is from T-R
+ */
+ if(pProSLICMLT->resFaults.auxFlag && pProSLICMLT->resFaults.trFlag)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : Small RTR FWD RAW = %d\n", pProSLICMLT->resFaults.measTR);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : Small RTR REV RAW = %d\n", pProSLICMLT->resFaults.measAUX);
+
+ pProSLICMLT->resFaults.measTR = (pProSLICMLT->resFaults.measTR+pProSLICMLT->resFaults.measAUX)/2L;
+ pState->rtrMethod = LOWR;
+ pState->TRState.stage = 70;
+ }
+ else
+ {
+ pState->rtrMethod = AUTOV;
+ pState->TRState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ setupAutovForDvdt(pProSLICMLT,pState);
+/* Bias LKG DACs to 4mA to improve open loop stability */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNR_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPR_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNT_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPT_ACTIVE, 0x1FF00000L);
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : AutoV Setup : Samples = %d\n", pState->autoVState.numSamples);
+
+ pState->autoVState.stage=0;
+ if(pState->ahs_det.count) /* Skip cal on retest */
+ {
+ pState->TRState.stage = 8;
+ }
+ else
+ {
+ pState->TRState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* AutoV Current Source Offset Cal */
+ if (calOffsetAutoV(pProSLICMLT,pState))
+ {
+ pState->autoVState.stage=0;
+ pState->TRState.stage++;
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : AutoV Cal : Voffs = %d\n", pState->v_offset);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : AutoV Cal : Ioffs = %d\n", pState->i_offset);
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Execute autov test */
+ if(pExecAutoV(pProSLICMLT,pState))
+ {
+ /*
+ ** Active handset detected - repeat measurement until settled
+ */
+ if((pState->ahs_det.detected)&&(pState->ahs_det.count <= MLT_RES_AUTOV_AHS_MAX_RETEST))
+ {
+ pState->TRState.stage = 6;
+ pState->ahs_det.count++;
+ pProSLICMLT->resFaults.ahsFlag = 1;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /* Process Results */
+ if ((pState->i2-pState->i1) == 0) { /* OPEN */
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ }
+ else { /* Find Absolute Resistance between T-R */
+ pProSLICMLT->resFaults.measTR = ((pState->v2 - pState->v1)*10000 / (pState->i2-pState->i1) - 2*mlt_prot_res);
+ }
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRtr : AutoV RTR RAW : %d\n", pProSLICMLT->resFaults.measTR);
+
+ if ((pProSLICMLT->resFaults.measTR != 0) && (MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTR != tr_req_const))
+ pProSLICMLT->resFaults.measTR = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTR - tr_req_const);
+ else
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pState->TRState.stage=70;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 70: /* move to end */
+ /* Restore LKG DACs */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNR_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPR_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNT_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPT_ACTIVE, 0x0L);
+
+ if (pProSLICMLT->resFaults.measTR < 0)
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+
+
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Measures resistance present between RING and GND
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Upon completion, pProSLICMLT->resFaults.measRG contains the measured values.
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRrg(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+ /* first check for a small R then run auto-v*/
+ int32 iring; int32 vring;
+ int32 dV; int32 dI;
+ static execAutoV_fptr pExecAutoV;
+ int32 rg_req_const_0;
+ int32 rg_req_const_1;
+ int32 rg_req_auto_const;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ rg_req_const_0 = MLT_CONST_PM_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_PM_REQ_LONG_EV_1;
+ }
+ else
+ {
+ rg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+ }
+ else
+ {
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ rg_req_const_0 = MLT_CONST_PM_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_PM_REQ_LONG_SV_1;
+ }
+ else
+ {
+ rg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+ }
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ rg_req_const_0 = MLT_CONST_PM_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_PM_REQ_LONG_EV_1;
+ }
+ else
+ {
+ rg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+#else
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ rg_req_const_0 = MLT_CONST_PM_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_PM_REQ_LONG_SV_1;
+ }
+ else
+ {
+ rg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+#endif
+#endif
+ switch (pState->RGState.stage){
+
+ case 0:
+ pExecAutoV = &execAutoV_2;
+ pState->active_term = MLT_TERM_RG;
+ pState->RGState.waitIterations=0;
+ if (!(pState->smallRFlag & 2))
+ {
+ pState->RGState.stage=5; /*auto-v method*/
+ }
+ else
+ {
+ setupDcFeedV1SmallR(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ pState->RGState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&(pState->RGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* small R test, first measurement */
+ iring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_IRING,0);
+ vring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VRING, 0);
+
+ MLT_DEBUG_LOG ("si3218x_mlt : measRrg : Small RRG : V1 = %dmV\n",vring);
+ MLT_DEBUG_LOG ("si3218x_mlt : measRrg : Small RRG : I1 = %duA\n",iring);
+
+ pProSLICMLT->resFaults.measRG = vring / -iring;
+ pState->i1 = -iring;
+ pState->v1 = vring;
+
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = 0;
+ setupDcFeedV2SmallR(pProSLICMLT);
+ pState->RGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle */
+ delay_poll(&(pState->RGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Small R test, second measurement and difference calculation */
+ iring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_IRING,0);
+ vring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VRING,0);
+
+ MLT_DEBUG_LOG ("si3218x_mlt : measRrg : Small RRG : V2 = %dmV\n",vring);
+ MLT_DEBUG_LOG ("si3218x_mlt : measRrg : Small RRG : I2 = %duA\n",iring);
+
+ pState->i2 = -iring;
+ pState->v2 = vring;
+
+ /*
+ ** Loop equation in TIP-OPEN mode yields
+ ** RRG = dV/(dI - dV/a1 - 1/a0), where a1 and a0
+ ** are constants derived from the equivalent circuit
+ ** model. They may depend on pulse metering bom option
+ */
+ dV = 1000L*fp_abs(pState->v2 - pState->v1);
+ dI = fp_abs(pState->i2 - pState->i1) / 10L;
+ dI -= dV/rg_req_const_1;
+ dI += 1000000/rg_req_const_0;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measRG = (dV/dI);
+ pProSLICMLT->resFaults.measRG -= mlt_prot_res; /* subtract protection resistance */
+ }
+
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = 0;
+
+ pState->RGState.stage=70;
+ return RC_MLT_TEST_COMPLETE;
+
+ case 5: /* Auto V test */
+ pState->ahs_det.enable = 0; /* Disable active handset detection */
+ pState->autoVState.numSamples = 2*MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+
+ setupAutovForDvdt(pProSLICMLT,pState);
+
+ pState->RGState.stage++;
+ pState->autoVState.stage=0;
+ pState->RGState.waitIterations=0;
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRrg : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3218x_mlt : measRrg : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3218x_mlt : measRrg : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3218x_mlt : measRrg : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Settle */
+ delay_poll(&(pState->RGState),50/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ /* Bias RING side LKG DAC to 4mA to improve open loop stability */
+ /* Can't short open terminal on 18x because it is connected to VBAT instead of GND */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNR_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPR_ACTIVE, 0x1FF00000L);
+
+ pState->RGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ if(pExecAutoV(pProSLICMLT,pState))
+ {
+ /* Restore 0mA bias */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNR_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPR_ACTIVE, 0x0L);
+ if ((pState->i2-pState->i1) == 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ else {
+
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ /* New computation - simplified to single order */
+ dV = fp_abs(pState->v2 - pState->v1);
+ dV *= 1100L;
+ dI = fp_abs(pState->i2-pState->i1);
+ dI -= dV/rg_req_const_1;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measRG = (dV*10)/dI;
+ pProSLICMLT->resFaults.measRG -= mlt_prot_res;
+ }
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRrg : AutoV RRG RAW : %d\n", pProSLICMLT->resFaults.measRG);
+
+ }
+ else
+ {
+ /* first order model since no r between tip/ring */
+ dV = (fp_abs(pState->v2 - pState->v1))*10000;
+ dI = fp_abs(pState->i2-pState->i1);
+
+ if(dI <= 0)
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measRG = dV/dI;
+ pProSLICMLT->resFaults.measRG *= 107;
+ pProSLICMLT->resFaults.measRG /= 100;
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRrg : AutoV RRG RAW : %d\n", pProSLICMLT->resFaults.measRG);
+
+ if(pProSLICMLT->resFaults.measRG > 0)
+ {
+ if(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measRG <= rg_req_auto_const)
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measRG - rg_req_auto_const);
+ pProSLICMLT->resFaults.measRG -= mlt_prot_res;
+ }
+ }
+ }
+ }
+ }
+
+ /* Float open terminal */
+ //pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->hvic_state_save);
+ //pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0L);
+
+ pState->RGState.stage=70;
+ }/* goToV */
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* switch */
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Measures resistance present between TIP and GND
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is located in pProSLICMLT->resFaults.measTG
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRtg(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+ /* first check for a short then run auto-v*/
+ int32 itip,vtip;
+ int32 dV; int32 dI;
+ static execAutoV_fptr pExecAutoV;
+ int32 tg_req_const_0;
+ int32 tg_req_const_1;
+ int32 tg_req_auto_const;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tg_req_const_0 = MLT_CONST_PM_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_PM_REQ_LONG_EV_1;
+ }
+ else
+ {
+ tg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+ }
+ else
+ {
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tg_req_const_0 = MLT_CONST_PM_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_PM_REQ_LONG_SV_1;
+ }
+ else
+ {
+ tg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+ }
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tg_req_const_0 = MLT_CONST_PM_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_PM_REQ_LONG_EV_1;
+ }
+ else
+ {
+ tg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+#else
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ tg_req_const_0 = MLT_CONST_PM_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_PM_REQ_LONG_SV_1;
+ }
+ else
+ {
+ tg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+#endif
+#endif
+ switch (pState->TGState.stage){
+
+ case 0:
+ pExecAutoV = &execAutoV_2;
+ pState->active_term = MLT_TERM_TG;
+ pState->TGState.waitIterations=0;
+ if (!(pState->smallRFlag & 1))
+ {
+ pState->TGState.stage=5; /*auto-v method*/
+ }
+ else
+ {
+ setupDcFeedV1SmallR(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW,pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_RING_OPEN);
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ case 1:
+ delay_poll(&(pState->TGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /*Small R test, first measurment*/
+ itip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ITIP,0);
+ vtip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VTIP,0);
+
+ MLT_DEBUG_LOG ("si3218x_mlt : measRtg : Small RTG : V1 = %dmV\n",vtip);
+ MLT_DEBUG_LOG ("si3218x_mlt : measRtg : Small RTG : I1 = %duA\n",itip);
+
+ pProSLICMLT->resFaults.measTG = vtip / -itip;
+ pState->v1 = vtip;
+ pState->i1 = -itip;
+
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = 0;
+ setupDcFeedV2SmallR(pProSLICMLT);
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle */
+ delay_poll(&(pState->TGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Small R test, second measurement and difference calculation */
+ itip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ITIP,0);
+ vtip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VTIP,0);
+
+ MLT_DEBUG_LOG ("si3218x_mlt : measRtg : Small RTG : V2 = %dmV\n",vtip);
+ MLT_DEBUG_LOG ("si3218x_mlt : measRtg : Small RTG : I2 = %duA\n",itip);
+
+ pState->v2 = vtip;
+ pState->i2 = -itip;
+
+ /*
+ ** Loop equation in RING-OPEN mode yields
+ ** RTG = dV/(dI - dV/a1 - 1/a0), where a1 and a0
+ ** are constants derived from the equivalent circuit
+ ** model. They may depend on pulse metering bom option
+ */
+
+ dV = 1000L*fp_abs(pState->v2 - pState->v1);
+ dI = fp_abs(pState->i2 - pState->i1) / 10L;
+ dI -= dV/tg_req_const_1;
+ dI += 1000000/tg_req_const_0;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measTG = (dV/dI);
+ pProSLICMLT->resFaults.measTG -= mlt_prot_res;
+ }
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = 0;
+
+ pState->TGState.stage=70;
+ return RC_MLT_TEST_COMPLETE;
+
+ case 5: /* Auto V test */
+ pState->ahs_det.enable = 0; /* Disable active handset detection - detected in TR test */
+ pState->autoVState.numSamples = 2*MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+
+ setupAutovForDvdt(pProSLICMLT,pState);
+
+ pState->TGState.stage++;
+ pState->autoVState.stage=0;
+ pState->TGState.waitIterations=0;
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRtg : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtg : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtg : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3218x_mlt : measRtg : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Settle */
+ delay_poll(&(pState->TGState),50/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_RING_OPEN);
+
+ /* Bias TIP side LKG DAC to 4mA to improve open loop stability */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNT_ACTIVE, 0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPT_ACTIVE, 0x1FF00000L);
+
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ if(pExecAutoV(pProSLICMLT,pState))
+ {
+ /* Restore 0mA bias */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_DNT_ACTIVE, 0x0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_LKG_UPT_ACTIVE, 0x0L);
+ if ((pState->i2-pState->i1) == 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ else {
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ /* New computation - simplified to single order*/
+ dV = fp_abs(pState->v2 - pState->v1);
+ dV *= 1100;
+ dI = fp_abs(pState->i2-pState->i1);
+ dI -= dV/tg_req_const_1;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measTG = (dV*10)/dI;
+ pProSLICMLT->resFaults.measTG -= mlt_prot_res;
+ }
+ MLT_DEBUG_LOG("si3218x_mlt : measRtg : AutoV RTG RAW : %d\n", pProSLICMLT->resFaults.measTG);
+ }
+ else
+ {
+ /* first order model since no r between tip/ring */
+ dV = (fp_abs(pState->v2 - pState->v1))*10000;
+ dI = fp_abs(pState->i2-pState->i1);
+
+ if(dI <= 0)
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measTG = dV/dI;
+ pProSLICMLT->resFaults.measTG *= 107;
+ pProSLICMLT->resFaults.measTG /= 100;
+ /* Check for condition in which measured == Req */
+
+ MLT_DEBUG_LOG("si3218x_mlt : measRtg : AutoV RTG RAW : %d\n", pProSLICMLT->resFaults.measTG);
+
+ if(pProSLICMLT->resFaults.measTG > 0)
+ {
+ if ((MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTG) <= tg_req_auto_const)
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTG - tg_req_auto_const);
+ pProSLICMLT->resFaults.measTG -= mlt_prot_res;
+ }
+ }
+ }
+ }
+ }
+
+ /* Float open terminal */
+ //pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->hvic_state_save);
+ //pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0L);
+ pState->TGState.stage=70;
+ }/* goToV */
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Measure time constant using MLT diagnostic timers
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure.
+** @param[in,out] *termMeas - Pointer to mlt terminal structure
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measureTimeConstant(ProSLICMLTType *pProSLICMLT, ProSLIC_term_meas_t *termMeas, ProSLIC_mlt_test_state *pState)
+{
+int32 dt1, dt2, dv1,dv2;
+int32 slope1, slope2;
+int32 i_offset = 50;
+uInt16 mlt_poll_rate;
+int enable_meas_down;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ enable_meas_down = termMeas->tgFlag;
+
+ switch(pState->stage)
+ {
+ case 0:
+ pState->waitIterations=0;
+ termMeas->term.iloop[1] = termMeas->term.iloop[0] + i_offset; /* comp for offset */
+ setupDspTimers(pProSLICMLT->pProslic,termMeas->time1,termMeas->time2,termMeas->time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,-1*termMeas->term.iloop[0]); /* (-) current to discharge */
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle open terminal switch to GND */
+ delay_poll(pState,500/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Enable current source */
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle approximate acquisition time */
+ delay_poll(pState,((termMeas->time3/10)*10 + 100)/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Read voltages */
+ readDspTimerV(pProSLICMLT->pProslic,&(termMeas->term.vloop[0]),&(termMeas->term.vloop[1]),&(termMeas->term.vloop[2]));
+ if(!enable_meas_down)
+ {
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ }
+ /* Calculate dv/dt and estimate C */
+ dt1 = fp_abs(termMeas->time2 - termMeas->time1);
+ dt2 = fp_abs(termMeas->time3 - termMeas->time2);
+ dv1 = fp_abs(termMeas->term.vloop[1] - termMeas->term.vloop[0]);
+ dv2 = fp_abs(termMeas->term.vloop[2] - termMeas->term.vloop[1]);
+
+ if(dv1 > 0)
+ {
+ termMeas->measTR2 = (fp_abs(termMeas->term.iloop[0])*1000L*dt1)/dv1;
+ }
+ else
+ {
+ termMeas->measTR2 = 0;
+ }
+
+ if(dv2 > 0)
+ {
+ termMeas->measRG2 = (fp_abs(termMeas->term.iloop[0])*1000L*dt2)/dv2;
+ }
+ else
+ {
+ termMeas->measRG2 = 0;
+ }
+
+ slope1 = 0;
+ slope2 = 0;
+
+ if(dt1 > 0)
+ {
+ slope1 = (10L*dv1) / dt1;
+ }
+
+ if(dt2 > 0)
+ {
+ slope2 = (10L*dv2) / dt2;
+ }
+
+ termMeas->slopeErr = (1000L * fp_abs(slope1 - slope2));
+ if(slope1 > 0)
+ {
+ termMeas->slopeErr /= slope1;
+ }
+ else
+ {
+ termMeas->slopeErr = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : iForce = %d uA\n", -1*termMeas->term.iloop[0]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR1 = %d mV\n", termMeas->term.vloop[0]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR2 = %d mV\n", termMeas->term.vloop[1]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR3 = %d mV\n", termMeas->term.vloop[2]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t1 = %d ms\n", termMeas->time1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t2 = %d ms\n", termMeas->time2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t3 = %d ms\n", termMeas->time3);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dv1 = %d mV\n", dv1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dv2 = %d mV\n", dv2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dt1 = %d ms\n", dt1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dt2 = %d ms\n", dt2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : slopeErr = %d \n", termMeas->slopeErr);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : C1 = %d nF\n", termMeas->measTR2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : C2 = %d nF\n", termMeas->measRG2);
+
+ if(!enable_meas_down)
+ {
+ pState->stage = 0;
+ pState->waitIterations = 0;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ else
+ {
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ case 5: /* Allow full discharge */
+ delay_poll(pState,(200/mlt_poll_rate) - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ setupDspTimers(pProSLICMLT->pProslic,termMeas->time1,termMeas->time2,termMeas->time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,termMeas->term.iloop[1]); /* (+) current to charge */
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* Settle approximate acquisition time */
+ delay_poll(pState,((termMeas->time3/10)*10 + 100)/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Read voltages */
+ readDspTimerV(pProSLICMLT->pProslic,&(termMeas->term.vloop[3]),&(termMeas->term.vloop[4]),&(termMeas->term.vloop[5]));
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ /* Calculate dv/dt and estimate C */
+ dt1 = fp_abs(termMeas->time2 - termMeas->time1);
+ dt2 = fp_abs(termMeas->time3 - termMeas->time2);
+ dv1 = fp_abs(termMeas->term.vloop[4] - termMeas->term.vloop[3]);
+ dv2 = fp_abs(termMeas->term.vloop[5] - termMeas->term.vloop[4]);
+
+ if(dv1 > 0)
+ {
+ termMeas->measAUX = (fp_abs(termMeas->term.iloop[1])*1000L*dt1)/dv1;
+ }
+ else
+ {
+ termMeas->measAUX = 0;
+ }
+
+ if(dv2 > 0)
+ {
+ termMeas->measTG2 = (fp_abs(termMeas->term.iloop[1])*1000L*dt2)/dv2;
+ }
+ else
+ {
+ termMeas->measTG2 = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : iForce = %d uA\n", termMeas->term.iloop[1]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR1 = %d mV\n", termMeas->term.vloop[3]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR2 = %d mV\n", termMeas->term.vloop[4]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR3 = %d mV\n", termMeas->term.vloop[5]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t1 = %d ms\n", termMeas->time1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t2 = %d ms\n", termMeas->time2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t3 = %d ms\n", termMeas->time3);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dv1 = %d mV\n", dv1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dv2 = %d mV\n", dv2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dt1 = %d ms\n", dt1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dt2 = %d ms\n", dt2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : C1 = %d nF\n", termMeas->measAUX);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : C2 = %d nF\n", termMeas->measTG2);
+
+ pState->stage = 0;
+ pState->waitIterations = 0;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Coarse measure of capacitance between TIP and RING
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is stored under pProSLICMLT->capFaults.measTR
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+
+/*
+** Measurements
+*/
+#define MLT_TC_CTR pProSLICMLT->capFaults.measTR2
+#define MLT_TC_DISCHG_CTR1 pProSLICMLT->capFaults.measTR2
+#define MLT_TC_DISCHG_CTR2 pProSLICMLT->capFaults.measRG2
+#define MLT_TC_CHG_CTR1 pProSLICMLT->capFaults.measAUX
+#define MLT_TC_CHG_CTR2 pProSLICMLT->capFaults.measTG2
+#define MLT_TC_DISCHG_V1 pProSLICMLT->capFaults.term.vloop[0]
+#define MLT_TC_DISCHG_V2 pProSLICMLT->capFaults.term.vloop[1]
+#define MLT_TC_DISCHG_V3 pProSLICMLT->capFaults.term.vloop[2]
+#define MLT_TC_T1 pProSLICMLT->capFaults.time1
+#define MLT_TC_T2 pProSLICMLT->capFaults.time2
+#define MLT_TC_T3 pProSLICMLT->capFaults.time3
+#define MLT_TC_DISCHG_DV1 (fp_abs(MLT_TC_DISCHG_V2 - MLT_TC_DISCHG_V1))
+#define MLT_TC_DISCHG_DV2 (fp_abs(MLT_TC_DISCHG_V3 - MLT_TC_DISCHG_V2))
+#define MLT_TC_SLOPE_ERR pProSLICMLT->capFaults.slopeErr
+#define MLT_TC_ISRC pProSLICMLT->capFaults.term.iloop[0]
+#define MLT_TC_RUN_COUNT pProSLICMLT->capFaults.auxFlag
+#define MLT_TC_MEAS_CHG_PHASE pProSLICMLT->capFaults.tgFlag
+#define MLT_TC_USE_V1_V2_ONLY pProSLICMLT->capFaults.rgFlag
+#define MLT_TC_USE_V2_V3_ONLY pProSLICMLT->capFaults.trFlag
+/*
+** Test Condition Flags
+*/
+#define MLT_TC_COND_V1_LOW pProSLICMLT->capFaults.flags[0]
+#define MLT_TC_COND_V1_HIGH pProSLICMLT->capFaults.flags[1]
+#define MLT_TC_COND_V2_LOW pProSLICMLT->capFaults.flags[2]
+#define MLT_TC_COND_V2_HIGH pProSLICMLT->capFaults.flags[3]
+#define MLT_TC_COND_V3_LOW pProSLICMLT->capFaults.flags[4]
+#define MLT_TC_COND_V3_HIGH pProSLICMLT->capFaults.flags[5]
+#define MLT_TC_COND_DV1_LOW pProSLICMLT->capFaults.flags[6]
+#define MLT_TC_COND_DV1_HIGH pProSLICMLT->capFaults.flags[7]
+#define MLT_TC_COND_DV2_LOW pProSLICMLT->capFaults.flags[8]
+#define MLT_TC_COND_DV2_HIGH pProSLICMLT->capFaults.flags[9]
+#define MLT_TC_COND_SLOPE_ERR pProSLICMLT->capFaults.flags[10]
+#define MLT_TC_COND_REDUCE_DV_LIM pProSLICMLT->capFaults.flags[11]
+#define MLT_TC_COND_V1_MID pProSLICMLT->capFaults.flags[12]
+#define MLT_TC_COND_V2_MID pProSLICMLT->capFaults.flags[13]
+#define MLT_TC_COND_V3_MID pProSLICMLT->capFaults.flags[14]
+/*
+** Thresholds
+*/
+#define MLT_TC_TH_V1_LOW 10000
+#define MLT_TC_TH_V1_HIGH 46000
+#define MLT_TC_TH_V2_LOW 3000
+#define MLT_TC_TH_V2_HIGH 43000
+#define MLT_TC_TH_V3_LOW 3000
+#define MLT_TC_TH_V3_HIGH 40000
+#define MLT_TC_TH_DV1_LOW (MLT_TC_COND_REDUCE_DV_LIM ? 1000:1800)
+#define MLT_TC_TH_DV1_HIGH 35000
+#define MLT_TC_TH_DV2_LOW (MLT_TC_COND_REDUCE_DV_LIM ? 1000:1800)
+#define MLT_TC_TH_DV2_HIGH 35000
+#define MLT_TC_TH_SLOPE_ERR 150
+#define MLT_TC_TH_V_MID 20000
+/*
+** Other constants
+*/
+#define MLT_TC_MAX_RUNS 5
+#define MLT_TC_CAL_ISRC 500L
+/*
+** Tests
+*/
+#define MLT_TC_TEST_ZERO (MLT_TC_COND_V1_LOW && MLT_TC_COND_V2_LOW && MLT_TC_COND_V3_LOW)
+#define MLT_TC_TEST_V1_OK (!(MLT_TC_COND_V1_LOW||MLT_TC_COND_V1_HIGH))
+#define MLT_TC_TEST_V2_OK (!(MLT_TC_COND_V2_LOW||MLT_TC_COND_V2_HIGH))
+#define MLT_TC_TEST_V3_OK (!(MLT_TC_COND_V3_LOW||MLT_TC_COND_V3_HIGH))
+#define MLT_TC_TEST_V2_V3_LOW (MLT_TC_COND_V2_LOW && MLT_TC_COND_V3_LOW && MLT_TC_TEST_V1_OK)
+#define MLT_TC_TEST_V3_LOW (MLT_TC_COND_V3_LOW && MLT_TC_TEST_V1_OK && MLT_TC_TEST_V2_OK)
+#define MLT_TC_TEST_DV1_OK (!(MLT_TC_COND_DV1_LOW||MLT_TC_COND_DV1_HIGH))
+#define MLT_TC_TEST_DV2_OK (!(MLT_TC_COND_DV2_LOW||MLT_TC_COND_DV2_HIGH))
+#define MLT_TC_TEST_ALL_V_OK (MLT_TC_TEST_V1_OK && MLT_TC_TEST_V2_OK && MLT_TC_TEST_V3_OK)
+#define MLT_TC_TEST_ALL_V_HIGH (MLT_TC_COND_V1_HIGH && MLT_TC_COND_V2_HIGH && MLT_TC_COND_V3_HIGH)
+#define MLT_TC_TEST_V_OK_DV1_LOW (MLT_TC_TEST_ALL_V_OK && MLT_TC_COND_DV1_LOW)
+#define MLT_TC_TEST_V3_LOW_DV1_OK (MLT_TC_TEST_V3_LOW && MLT_TC_TEST_DV1_OK)
+#define MLT_TC_TEST_SLOPE_ERR (MLT_TC_TEST_ALL_V_OK && MLT_TC_TEST_DV1_OK && MLT_TC_TEST_DV2_OK && MLT_TC_COND_SLOPE_ERR)
+#define MLT_TC_TEST_V1_HIGH_V3_OK (MLT_TC_COND_V1_HIGH && MLT_TC_TEST_V3_OK)
+#define MLT_TC_TEST_LOW_I_V3_MID (MLT_TC_COND_V3_MID && MLT_TC_TEST_V3_OK && (MLT_TC_ISRC == MLT_TC_CAL_ISRC))
+#define MLT_TC_TEST_V1_MID (MLT_TC_COND_V1_MID)
+#define MLT_TC_TEST_V2_MID (MLT_TC_COND_V2_MID)
+#define MLT_TC_TEST_V3_MID (MLT_TC_COND_V3_MID)
+
+
+static int estimateCtr_2(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_capacitance_state *pState)
+{
+uInt32 mlt_line_cap;
+uInt32 mlt_emi_cap;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_line_cap = pProSLICMLT->mlt_config.mlt_line_cap;
+ mlt_emi_cap = pProSLICMLT->mlt_config.mlt_emi_cap;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_line_cap = MLT_LINE_CAPACITANCE;
+ mlt_emi_cap = MLT_EMI_CAPACITANCE;
+#endif
+
+ switch(pState->MeasState.stage)
+ {
+ case 0:
+ Si3218x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);/*max out threshold*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,0xFFFFFFFL);/*max out threshold*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ gndOpenTerm(pProSLICMLT->pProslic,TRUE);
+ /* Initialize time constant measurement parameters */
+ MLT_TC_T1 = 6;
+ MLT_TC_T2 = 22;
+ MLT_TC_T3 = 44;
+ MLT_TC_ISRC = MLT_TC_CAL_ISRC;
+ MLT_TC_MEAS_CHG_PHASE = 0; /* Do discharge only measurement */
+ MLT_TC_RUN_COUNT = 0;
+ MLT_TC_USE_V1_V2_ONLY = 0;
+ MLT_TC_USE_V2_V3_ONLY = 0;
+ MLT_TC_COND_REDUCE_DV_LIM = 0;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Time constant measurement */
+ if(measureTimeConstant(pProSLICMLT,&(pProSLICMLT->capFaults),&(pState->TimeConstState)))
+ {
+ /* Process results of calibration run */
+ MLT_TC_COND_V1_LOW = (MLT_TC_DISCHG_V1 < MLT_TC_TH_V1_LOW ) ? 1 : 0;
+ MLT_TC_COND_V1_HIGH = (MLT_TC_DISCHG_V1 > MLT_TC_TH_V1_HIGH ) ? 1 : 0;
+ MLT_TC_COND_V2_LOW = (MLT_TC_DISCHG_V2 < MLT_TC_TH_V2_LOW ) ? 1 : 0;
+ MLT_TC_COND_V2_HIGH = (MLT_TC_DISCHG_V2 > MLT_TC_TH_V2_HIGH ) ? 1 : 0;
+ MLT_TC_COND_V3_LOW = (MLT_TC_DISCHG_V3 < MLT_TC_TH_V3_LOW ) ? 1 : 0;
+ MLT_TC_COND_V3_HIGH = (MLT_TC_DISCHG_V3 > MLT_TC_TH_V3_HIGH ) ? 1 : 0;
+ MLT_TC_COND_DV1_LOW = (MLT_TC_DISCHG_DV1 < MLT_TC_TH_DV1_LOW ) ? 1 : 0;
+ MLT_TC_COND_DV1_HIGH = (MLT_TC_DISCHG_DV1 > MLT_TC_TH_DV1_HIGH ) ? 1 : 0;
+ MLT_TC_COND_DV2_LOW = (MLT_TC_DISCHG_DV2 < MLT_TC_TH_DV2_LOW ) ? 1 : 0;
+ MLT_TC_COND_DV2_HIGH = (MLT_TC_DISCHG_DV2 > MLT_TC_TH_DV2_HIGH ) ? 1 : 0;
+ MLT_TC_COND_SLOPE_ERR = (MLT_TC_SLOPE_ERR > MLT_TC_TH_SLOPE_ERR) ? 1 : 0;
+ MLT_TC_COND_V1_MID = (MLT_TC_DISCHG_V1 > MLT_TC_TH_V_MID) ? 1 : 0;
+ MLT_TC_COND_V2_MID = (MLT_TC_DISCHG_V2 > MLT_TC_TH_V_MID) ? 1 : 0;
+ MLT_TC_COND_V3_MID = (MLT_TC_DISCHG_V3 > MLT_TC_TH_V_MID) ? 1 : 0;
+
+ MLT_TC_USE_V1_V2_ONLY = 0;
+ MLT_TC_USE_V2_V3_ONLY = 0;
+
+ /* ------------------
+ ** Analysis of result
+ ** ------------------
+ */
+
+ /*
+ ** All voltages low - extrememly fast time constant
+ ** or R is out of max range (500uA*R > VBAT), call it 0nF
+ */
+ if(MLT_TC_TEST_ZERO)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : MLT_TC_TEST_ZERO\n");
+ MLT_TC_CTR = 0;
+ pState->MeasState.stage = 20;
+ }
+ /*
+ ** All voltages high - extremely slow time constant,
+ * increase drive current and measurement window
+ */
+ else if(MLT_TC_TEST_ALL_V_HIGH)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : MLT_TC_TEST_ALL_V_HIGH\n");
+ MLT_TC_T1 += 10;
+ MLT_TC_T2 += 20;
+ MLT_TC_T3 += 20;
+ MLT_TC_ISRC *= 2;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** All voltages in range, but small dV
+ ** indicates a large C, but some R is present
+ ** resulting in a voltage drop. Cannot source
+ ** too much current because of I*R drop, so
+ ** capture times must be primary variant.
+ **
+ ** dV limit is dynamic. Ideally, it would be as
+ ** large as possible, but with large series R,
+ ** it needs to be reduced to accomodate minimized
+ ** voltage range. If V1 is < 20v, do not increase
+ ** current drive
+ */
+ else if(MLT_TC_TEST_V_OK_DV1_LOW)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : MLT_TC_TEST_V_OK_DV1_LOW\n");
+ /* Select ISRC based on dV1 */
+ MLT_TC_COND_REDUCE_DV_LIM = 1;
+ if((MLT_TC_DISCHG_DV1 < 300)&&(MLT_TC_TEST_V1_MID)) /* C in 30-50uF Range */
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 60;
+ MLT_TC_T3 = 100;
+ }
+ else if((MLT_TC_DISCHG_DV1 < 500)&&(MLT_TC_TEST_V1_MID)) /* C in 20-40uF Range */
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 50;
+ MLT_TC_T3 = 80;
+ }
+ else if((MLT_TC_DISCHG_DV1 < 800)&&(MLT_TC_TEST_V1_MID))
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 40;
+ MLT_TC_T3 = 60;
+ }
+ else /* dV between 800 and 1000 */
+ {
+ /* Don't change Isrc...just increase time */
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 60;
+ MLT_TC_T3 = 100;
+ }
+
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** Medium C. Use V1 and V2 to compute result
+ ** Increase t2 if enough margin to improve
+ ** accuracy
+ */
+ else if(MLT_TC_TEST_V3_LOW_DV1_OK)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : MLT_TC_TEST_V3_LOW_DV1_OK\n");
+ MLT_TC_USE_V1_V2_ONLY = 1;
+ if(MLT_TC_DISCHG_V2 > 14000)
+ {
+ MLT_TC_T2 += 4;
+ }
+
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ if(MLT_TC_RUN_COUNT == 0)
+ {
+ pState->MeasState.stage = 1;
+ }
+ else
+ {
+ pState->MeasState.stage++;
+ }
+ }
+ /*
+ ** Fast Time Constant - first move t2,t3 for
+ ** 300nF-800nF range, then move all 3 capture times
+ ** for < 500nF
+ **
+ **
+ */
+ else if(MLT_TC_TEST_V2_V3_LOW)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : MLT_TC_TEST_V2_V3_LOW\n");
+ if(MLT_TC_RUN_COUNT == 0)
+ {
+ MLT_TC_T2 = 12;
+ MLT_TC_T3 = 18;
+ pState->MeasState.stage = 1;
+ }
+ else if(MLT_TC_RUN_COUNT == 1)
+ {
+ MLT_TC_T1 = 4;
+ MLT_TC_T2 = 8;
+ MLT_TC_T3 = 14;
+
+ MLT_TC_USE_V1_V2_ONLY = 1;
+ pState->MeasState.stage =1;
+ }
+ else /* Can't reduce any further, assume 0nF */
+ {
+ MLT_TC_CTR = 0;
+ pState->MeasState.stage = 20;
+ }
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ }
+ /*
+ ** Differing slopes - indicates inductor present.
+ ** Use V2 and V3 to compute result since V1 is
+ ** likely measured during the transient
+ */
+ else if(MLT_TC_TEST_SLOPE_ERR)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : MLT_TC_TEST_SLOPE_ERR\n");
+ MLT_TC_USE_V2_V3_ONLY = 1;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage++;
+ }
+ /*
+ ** V1 out of range, but V3 OK - double current
+ */
+ else if(MLT_TC_TEST_V1_HIGH_V3_OK)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : MLT_TC_TEST_V1_HIGH_V3_OK\n");
+ MLT_TC_ISRC *= 2;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** For 500uA case, if V3 > 20v, bump up
+ ** current to 700uA to improve accuracy
+ */
+ else if(MLT_TC_TEST_LOW_I_V3_MID)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : MLT_TC_TEST_LOW_I_V3_MID\n");
+ MLT_TC_ISRC = 700;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** Initial measurement in range
+ */
+ else
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : STATE : NO_CHANGE\n");
+ pState->MeasState.stage++;
+ }
+ MLT_TC_RUN_COUNT++;
+
+ /* Limit number of iterations */
+ if(MLT_TC_RUN_COUNT > MLT_TC_MAX_RUNS)
+ {
+ pState->MeasState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ MLT_TC_MEAS_CHG_PHASE = 1;
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Optional up/down measurement */
+ if(!MLT_TC_MEAS_CHG_PHASE)
+ {
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ if(measureTimeConstant(pProSLICMLT,&(pProSLICMLT->capFaults),&(pState->TimeConstState)))
+ {
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ if((MLT_TC_USE_V1_V2_ONLY)&&(MLT_TC_DISCHG_CTR1 < 300))
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : METHOD_V1_V2 : DISCHG_CTR1_ONLY\n");
+ MLT_TC_CTR = MLT_TC_DISCHG_CTR1;
+ }
+ else if((MLT_TC_USE_V1_V2_ONLY)&&(MLT_TC_DISCHG_CTR1 >= 300))
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : METHOD_V1_V2 : CTR1_AVG\n");
+ MLT_TC_CTR = (3L*MLT_TC_DISCHG_CTR1+MLT_TC_CHG_CTR1)/4L;
+ }
+ else if(MLT_TC_USE_V2_V3_ONLY)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : METHOD_V2_V3 : DISCHG_CTR2_ONLY\n");
+ MLT_TC_CTR = MLT_TC_DISCHG_CTR2;
+ }
+ else
+ {
+ /* Don't average large C's where offset current has little effect */
+ if(MLT_TC_DISCHG_CTR1 > 10000)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : METHOD_ALL : DISCHG_CTR1_CTR2_AVG\n");
+ MLT_TC_CTR = (MLT_TC_DISCHG_CTR1 + MLT_TC_DISCHG_CTR2)/2;
+ }
+ else
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : estimateCtr : METHOD_ALL : CTR1_AVG\n");
+ MLT_TC_CTR = (3L*MLT_TC_DISCHG_CTR1+MLT_TC_CHG_CTR1)/4L;
+ }
+ }
+
+ /* Compensate for EMI and linefeed capacitance */
+ MLT_TC_CTR -= (mlt_emi_cap + (mlt_line_cap/2))/10;
+ MLT_DEBUG_LOG("estimateCtr : Final Cavg = %d nF\n", MLT_TC_CTR);
+ pState->MeasState.stage = 20;
+ return RC_MLT_TEST_RUNNING;
+
+ case 20:
+ gndOpenTerm(pProSLICMLT->pProslic,FALSE);
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Coarse measure of capacitance between TIP and RING
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is stored under pProSLICMLT->capFaults.measTR
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+#define MLT_CTR_EST_VMAX 38000
+#define MLT_CTR_EST_VMIN 1800
+#define MLT_CTR_EST_LOW_DV_VMAX 38000
+#define MLT_CTR_EST_DVMIN 1000
+#define MLT_REN_CAP_RANGE_VMAX 46000
+#define MLT_CTR_EST_DV_SM 1500
+#define MLT_CTR_EST_DV_LG 5000
+#define MLT_CTR_EST_T1_FAST 4
+#define MLT_CTR_EST_T2_FAST 10
+#define MLT_CTR_EST_T1_LOW 6
+#define MLT_CTR_EST_T2_LOW 12
+#define MLT_CTR_EST_T1_HIGH 8
+#define MLT_CTR_EST_T2_HIGH 24
+#define MLT_CTR_EST_T1_SLOW 20
+#define MLT_CTR_EST_T2_SLOW 120
+
+
+static int estimateCtr(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_test_state *pState)
+{
+int32 iForce[] = {500,700,1000,2000,4000,8000,12000}; /* uA */
+static int maxIforceIndex = 6;
+static int modTimer = 0;
+int32 dt, dv;
+int32 slopeErr;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+uInt32 mlt_line_cap;
+uInt32 mlt_emi_cap;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ mlt_line_cap = pProSLICMLT->mlt_config.mlt_line_cap;
+ mlt_emi_cap = pProSLICMLT->mlt_config.mlt_emi_cap;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = 150; //MLT_PROTECTION_RESISTANCE;
+ mlt_line_cap = MLT_LINE_CAPACITANCE;
+ mlt_emi_cap = MLT_EMI_CAPACITANCE;
+#endif
+
+ switch(pState->stage)
+ {
+ case 0:
+ pState->waitIterations=0;
+ pState->sampleIterations=0; /* Will be used as iForce[] index in this func */
+ pProSLICMLT->capFaults.time1 = MLT_CTR_EST_T1_LOW;
+ pProSLICMLT->capFaults.time2 = MLT_CTR_EST_T2_LOW;
+ modTimer = 0;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE,0x0); /* Disable powersave */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);/*max out threshold*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ setupDspTimers(pProSLICMLT->pProslic,pProSLICMLT->capFaults.time1,pProSLICMLT->capFaults.time2,pProSLICMLT->capFaults.time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,-1*iForce[pState->sampleIterations]); /* Force (-) current */
+ gndOpenTerm(pProSLICMLT->pProslic,TRUE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ delay_poll(pState,500/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Enable current source */
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ delay_poll(pState,((pProSLICMLT->capFaults.time2/10)*10 + 100)/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Read voltages, calculate dv/dt and C */
+ readDspTimerV(pProSLICMLT->pProslic,&(pProSLICMLT->capFaults.term.vloop[0]),&(pProSLICMLT->capFaults.term.vloop[1]),&(pProSLICMLT->capFaults.term.vloop[2]));
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ /* Calculate dv/dt and estimate C */
+ dt = fp_abs(pProSLICMLT->capFaults.time2 - pProSLICMLT->capFaults.time1);
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[1] - pProSLICMLT->capFaults.term.vloop[0]);
+ if(dv > 0) {
+ pProSLICMLT->capFaults.measTR2 = (fp_abs(iForce[pState->sampleIterations])*1000L*dt)/dv;
+ }
+ else {
+ pProSLICMLT->capFaults.measTR2 = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : iForce = %d uA\n", pState->sampleIterations,-1*iForce[pState->sampleIterations]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : VTR1 = %d mV\n", pState->sampleIterations,pProSLICMLT->capFaults.term.vloop[0]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : VTR2 = %d mV\n", pState->sampleIterations,pProSLICMLT->capFaults.term.vloop[1]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : dv = %d mV\n", pState->sampleIterations,dv);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : dt = %d ms\n", pState->sampleIterations,dt);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Est %d : Cest = %d nF\n", pState->sampleIterations,pProSLICMLT->capFaults.measTR2);
+
+ /* Set iloop to be used for final measurements */
+ pProSLICMLT->capFaults.term.iloop[0] = iForce[pState->sampleIterations];
+
+ /*
+ ** Check 0: Slope
+ **
+ ** If dv is < 1v, mod timers and repeat beause large C is present.
+ **
+ ** Do this only on the first iteration (eg. lowest iForce) so that results
+ ** can be interpretted properly.
+ */
+ if((modTimer == 0)&&(dv < MLT_CTR_EST_DVMIN)&&(pState->sampleIterations == 0))
+ {
+ /*
+ ** Check 1A: GND Headroom
+ **
+ ** If both measurements < MLT_CTR_MIN_VTR, then very small C, call it 0nF
+ */
+ if((pProSLICMLT->capFaults.term.vloop[0] < MLT_CTR_EST_VMIN)&&(pProSLICMLT->capFaults.term.vloop[1] < MLT_CTR_EST_VMIN)) {
+ pProSLICMLT->capFaults.measTR2 = 0;
+ pState->stage = 14;
+ return RC_MLT_TEST_RUNNING;
+ }
+ else if((pProSLICMLT->capFaults.term.vloop[0]< MLT_CTR_EST_LOW_DV_VMAX)&&(pProSLICMLT->capFaults.term.vloop[1] < MLT_CTR_EST_LOW_DV_VMAX))
+ {
+ /* Changed timers AND force 700uA test only (large C, large R) */
+ pProSLICMLT->capFaults.time1 = MLT_CTR_EST_T1_SLOW;
+ pProSLICMLT->capFaults.time2 = MLT_CTR_EST_T2_SLOW;
+ pState->sampleIterations = 1;
+ pProSLICMLT->capFaults.term.iloop[0] = iForce[pState->sampleIterations];
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ else
+ {
+ /* Change timers only (large C, small R) */
+ pProSLICMLT->capFaults.time1 = MLT_CTR_EST_T1_HIGH;
+ pProSLICMLT->capFaults.time2 = MLT_CTR_EST_T2_HIGH;
+ }
+ modTimer = 1;
+ pState->stage = 1; /* Repeat test */
+ return RC_MLT_TEST_RUNNING;
+ }
+ /*
+ ** Check 1B: GND Headroom
+ **
+ ** If both measurements < MLT_CTR_MIN_VTR, then very small C, call it 0nF
+ */
+ if((pProSLICMLT->capFaults.term.vloop[0] < MLT_CTR_EST_VMIN)&&(pProSLICMLT->capFaults.term.vloop[1] < MLT_CTR_EST_VMIN)) {
+ pProSLICMLT->capFaults.measTR2 = 0;
+ pState->stage = 14;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Check 2: Too Little Current Drive
+ **
+ ** If both measurements are > MLT_CTR_MAX_VTR, then large C and needs more current.
+ ** Increase current and repeat test. If on max current, then go with it.
+ */
+ if((pProSLICMLT->capFaults.term.vloop[0] > MLT_CTR_EST_VMAX)&&(pProSLICMLT->capFaults.term.vloop[1] > MLT_CTR_EST_VMAX) && (pState->sampleIterations < maxIforceIndex))
+ {
+ pState->sampleIterations++;
+ pState->stage = 1; /* Repeat test */
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Check 3: Slow Time Constant
+ **
+ ** If dV is very small, increase current drive
+ **
+ */
+ if((dv < MLT_CTR_EST_DV_SM)&&(pState->sampleIterations < maxIforceIndex))
+ {
+ pState->sampleIterations++;
+ pState->stage = 1; /* Repeat test */
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Check 4: Fast Time Constant
+ **
+ ** If dV is fairly large, shift sample window to prevent measuring a railed voltage
+ **
+ */
+ if(dv > MLT_CTR_EST_DV_LG)
+ {
+ pProSLICMLT->capFaults.time1 = MLT_CTR_EST_T1_FAST;
+ pProSLICMLT->capFaults.time2 = MLT_CTR_EST_T2_FAST;
+ }
+
+
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ delay_poll(pState, 200/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* Forward down measurement */
+ setupDspTimers(pProSLICMLT->pProslic,pProSLICMLT->capFaults.time1,pProSLICMLT->capFaults.time2,pProSLICMLT->capFaults.time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,-1*pProSLICMLT->capFaults.term.iloop[0]);
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ delay_poll(pState, ((pProSLICMLT->capFaults.time2/10)*10 + 100)/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 9:
+ readDspTimerV(pProSLICMLT->pProslic,&(pProSLICMLT->capFaults.term.vloop[0]),&(pProSLICMLT->capFaults.term.vloop[1]),&(pProSLICMLT->capFaults.term.vloop[2]));
+ dt = fp_abs(pProSLICMLT->capFaults.time2 - pProSLICMLT->capFaults.time1);
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[1] - pProSLICMLT->capFaults.term.vloop[0]);
+ if(dv > 0) {
+ pProSLICMLT->capFaults.measTR2 = (fp_abs(pProSLICMLT->capFaults.term.iloop[0])*1000L*dt)/dv;
+ }
+ else {
+ pProSLICMLT->capFaults.measTR2 = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : iForce = %d uA\n", -1*pProSLICMLT->capFaults.term.iloop[0]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : VTR1 = %d mV\n", pProSLICMLT->capFaults.term.vloop[0]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : VTR2 = %d mV\n", pProSLICMLT->capFaults.term.vloop[1]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : dv = %d mV\n", dv);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : dt = %d ms\n", dt);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Up : Cest = %d nF\n", pProSLICMLT->capFaults.measTR2);
+
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 10:
+ delay_poll(pState, 100/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 11:
+ setupDspTimers(pProSLICMLT->pProslic,pProSLICMLT->capFaults.time1,pProSLICMLT->capFaults.time2,pProSLICMLT->capFaults.time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,pProSLICMLT->capFaults.term.iloop[0]);
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 12:
+ delay_poll(pState, ((pProSLICMLT->capFaults.time2/10)*10 + 200)/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 13:
+ readDspTimerV(pProSLICMLT->pProslic,&(pProSLICMLT->capFaults.term.vloop[2]),&(pProSLICMLT->capFaults.term.vloop[3]),&(pProSLICMLT->capFaults.term.vloop[4]));
+ dt = fp_abs(pProSLICMLT->capFaults.time2 - pProSLICMLT->capFaults.time1);
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[3] - pProSLICMLT->capFaults.term.vloop[2]);
+ /* Store this reading in TG to be averaged with previous reading */
+ if(dv > 0) {
+ pProSLICMLT->capFaults.measTG2 = (fp_abs(pProSLICMLT->capFaults.term.iloop[0])*1000L*dt)/dv;
+ }
+ else {
+ pProSLICMLT->capFaults.measTG2 = 0;
+ }
+
+ /*
+ ** Compute Average *IF*
+ ** - up reading voltages within range
+ ** - both up and down readings are > 200nF
+ ** - slopes are within 10% of each other OR C < 2uF
+ ** otherwise, use down reading only
+ */
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[1] - pProSLICMLT->capFaults.term.vloop[0]);
+ slopeErr = fp_abs(dv - fp_abs(pProSLICMLT->capFaults.term.vloop[3] - pProSLICMLT->capFaults.term.vloop[2]));
+ slopeErr *= 1000;
+ slopeErr /= dv;
+
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[3] - pProSLICMLT->capFaults.term.vloop[2]);
+ if(((slopeErr < 200)||(pProSLICMLT->capFaults.measTR2 < 2000))&&(pProSLICMLT->capFaults.term.vloop[2] < MLT_REN_CAP_RANGE_VMAX)&&(pProSLICMLT->capFaults.term.vloop[3] < MLT_REN_CAP_RANGE_VMAX)&&(pProSLICMLT->capFaults.measTR2 > 200)&&(pProSLICMLT->capFaults.measTG2 > 200))
+ {
+ pProSLICMLT->capFaults.measTR2 += pProSLICMLT->capFaults.measTG2;
+ pProSLICMLT->capFaults.measTR2 /= 2;
+ }
+
+
+ /* Compensate for LF Caps */
+
+ pProSLICMLT->capFaults.measTR2 -= (mlt_emi_cap + (mlt_line_cap/2))/10;
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : iForce = %d uA\n", pProSLICMLT->capFaults.term.iloop[0]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : VTR1 = %d mV\n", pProSLICMLT->capFaults.term.vloop[2]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : VTR2 = %d mV\n", pProSLICMLT->capFaults.term.vloop[3]);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : dv2 = %d mV\n", dv);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : dt = %d ms\n", dt);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Final Down : Cest = %d nF\n", pProSLICMLT->capFaults.measTG2);
+ MLT_DEBUG_LOG("\n");
+ MLT_DEBUG_LOG("ProSLIC_measCtr : Slope Error : slopeErr = %d\n", slopeErr);
+ MLT_DEBUG_LOG("ProSLIC_measCtr : AVG : Cavg = %d nF\n", pProSLICMLT->capFaults.measTR2);
+
+ /* Final dv check - if << 100mV, call it 0nF */
+ dv = fp_abs(pProSLICMLT->capFaults.term.vloop[1] - pProSLICMLT->capFaults.term.vloop[0]);
+ if(dv < 100)
+ pProSLICMLT->capFaults.measTR2= 0;
+
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 14:
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ gndOpenTerm(pProSLICMLT->pProslic,FALSE);
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+
+/********************************************************************************/
+/**
+** @brief Measure REN using subthreshold ringing method
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Ouput is located under pProSLICMLT->ren.renValue
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - Uses 16vrms 20Hz ring signal and fits ringing current to calibrated curve to determine REN
+**
+*/
+static int si3218x_mlt_ren_subthresh_ring_method(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_ren_state *pState)
+{
+uInt8 regData;
+uInt8 irq2Reg,irq3Reg;
+int32 temp;
+int32 Ren;
+#ifdef MLT_REN_TEST_FREQ
+int test_freq = MLT_REN_TEST_FREQ;
+#endif
+int i;
+ uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+switch (pState->State.stage){
+ case 0:
+ si3218x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ regData = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_ENHANCE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE,regData&0x27);
+
+ setupDcFeedForRENTest(pProSLICMLT); /*set up low V_VLIM so we are guaranteed to start ringing*/
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE); /*go forward active to charge the line to V_VLIM*/
+ pState->State.sampleIterations=0;
+ pState->State.waitIterations=0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&(pState->State),200/mlt_poll_rate - 2 ); /*wait 5 tau*/
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,0xFFFFFFFL);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VBATR_EXPECT,0x3f00000L); /* 60v */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_AUTO,0x2e); /*disable battery tracking*/
+
+#ifdef MLT_REN_TEST_FREQ
+ if(test_freq == 16)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7F5A800L); /*16Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x72000L); /*16Vrms*/
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7efe000L); /*20Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x92000L); /*16Vrms*/
+ }
+#else
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7efe000L); /*20Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x92000L); /*16Vrms*/
+#endif
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x1CF4B64L);/*18Vdc */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DCDC_RNGTYPE,0);/* Fixed VBAT rail to fix distorting at GND issue */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGPHAS,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RTPER,0x50000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VCM_RING,0x1680000L);/*set vcm_ring so we dont clip*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_RINGCON,0);/*disable timers*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_COUNTER_VTR_VAL,0x51EB8L);/*couter_vtr-val*/
+ temp = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);/*clear power alarm and ringtrip interrupts*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3,(uInt8)temp); /*required for GCI to clear*/
+ temp = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2);/*clear*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2,(uInt8)temp);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN3,0x3);/* P_THERM_IE, P_HVIC_IE */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN2,0x1); /* RTP_IE */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_RINGING);/*start ringing*/
+ pState->max=0;
+ pState->State.stage++;
+
+
+ return RC_MLT_TEST_RUNNING;
+
+ case 3:
+ delay_poll(&(pState->State),250/mlt_poll_rate - 2);/*wait one ringing cycle to make sure ringing has started*/
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 4:
+ regData=pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED);/*check we made it to ringing state*/
+ if (regData != 0x44) /* Ringing failed to start/persist */
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Linefeed = 0x%0X\n", regData);
+
+ /* Check interrupts */
+ irq2Reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2);
+ irq3Reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ /* Restore entry conditions and force failing value */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ si3218x_restore_state(pProSLICMLT);
+ pProSLICMLT->ren.renValue = 999999L;
+ /* Check for ringtrip */
+ if( irq2Reg & 0x01 )
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Ringtrip on Ring Start \n");
+
+ return RC_MLT_FALSE_RINGTRIP;
+ }
+
+ /* Check for power alarm or thermal alarm */
+ if (irq3Reg & 0x03)
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Power/Thermal Alarm on Ring Start \n");
+ return RC_MLT_ALARM_ON_RING;
+ }
+
+ /* If not false ringtrip or alarm, return unknown ring start error */
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Ring Start Failed\n");
+ return RC_MLT_RINGSTART_ERR;
+ }
+
+ temp = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_MADC_ILOOP);
+
+ if (temp&0x10000000L)
+ temp |= 0xf0000000L; /*sign extend negative value*/
+ pState->v[pState->State.sampleIterations++] = temp; /*store sample*/
+
+ MLT_DEBUG_LOG("sample %d\tIloop = %d\n",pState->State.sampleIterations,(temp/10));
+
+ if (pState->State.sampleIterations == (MLT_REN_SAMPLE_TIME/mlt_poll_rate))
+ { /*we are done collecting samples - calculate*/
+
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE);/* ACTIVE before OPEN */
+ temp=0;
+
+ /*calculate dc value */
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ temp += pState->v[i];
+ }
+ temp /= MLT_REN_SAMPLE_TIME/mlt_poll_rate;
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ pState->v[i] -= temp; /*remove dc*/
+ }
+ temp =0;
+
+ /*calculate avg current*/
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ if (pState->v[i] < 0) /*recitfy the signal*/
+ pState->v[i] *= -1;
+ temp += pState->v[i]/10;
+ }
+ temp /= MLT_REN_SAMPLE_TIME/mlt_poll_rate;
+
+ MLT_DEBUG_LOG ("I Avg = %d\n",temp);
+
+ pState->max = temp;
+
+ /*we are cal'ing test - return raw value*/
+ if (pProSLICMLT->ren.renCalFlag){
+ pState->State.stage++;
+ pProSLICMLT->ren.renValue = pState->max;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*interpolate from cal values*/
+ if(pState->max > pProSLICMLT->ren.calData.renTrans)
+ Ren = ((pState->max - pProSLICMLT->ren.calData.highRenOffs)*1000)/pProSLICMLT->ren.calData.highRenSlope;
+ else
+ Ren = ((pState->max - pProSLICMLT->ren.calData.lowRenOffs)*1000)/pProSLICMLT->ren.calData.lowRenSlope;
+ if (Ren < 900)
+ Ren = ((pState->max - pProSLICMLT->ren.calData.extraLowRenOffset)*1000)/pProSLICMLT->ren.calData.extraLowRenSlope;
+
+ if (Ren < 0)
+ Ren = 0;
+ pProSLICMLT->ren.renValue = Ren;
+
+ MLT_DEBUG_LOG ("REN RAW = %d\n",Ren);
+
+ pState->State.stage++;
+
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* wait 1 ring period for ring exit */
+ delay_poll(&(pState->State),50/mlt_poll_rate - 2 );
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ si3218x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Implementation of capacitance measurement
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is stored in pState->testavo - diag power ac voltage measurement
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - This function does not modify the linefeed state or audio path
+** - This function measures testavo w/ 300Hz source applied and remeasures with 3014Hz source
+** if measured testavo reading is greater the MLT_MAX_300HZ_TESTAVO
+**
+*/
+static int measCapacitanceAC(ProSLICMLTType * pProSLICMLT, ProSLIC_mlt_capacitance_state * pState)
+{
+uInt32 data;
+ uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->MeasState.stage)
+ {
+ case 0:
+ pState->freq = 300;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ setup300HzBandpass(pProSLICMLT);
+ setup300HzTestTone(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /*enable testfilter */
+ pState->MeasState.stage++;
+ pState->MeasState.waitIterations = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&pState->MeasState, 900 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ data = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_TESTABO);
+ pState->testavo = data;
+
+ if (pState->testavo <= MLT_MAX_300HZ_TESTAVO)
+ {
+ return RC_MLT_TEST_COMPLETE;
+ }
+ pState->MeasState.stage++;
+ pState->freq = 3014;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ setup3014HzBandpass(pProSLICMLT);
+ setup3014HzTestTone(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /*enable testfilter */
+ pState->MeasState.waitIterations = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3:
+ delay_poll(&pState->MeasState, 900 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ pState->MeasState.stage++;
+ pState->MeasState.waitIterations = 0;
+ data = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_TESTABO);
+ pState->testavo = data;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+/********************************************************************************/
+/**
+** @brief Calculation of capacitance from TESTAVO reading
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+** @param[in] *pState - pointer to test state structure
+** @param[in] term - measured terminal
+**
+** @retval tmp - computed capacitance
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - This function does not modify the linefeed state or audio path
+** - This function measures testavo w/ 300Hz source applied and remeasures with 3014Hz source
+** if measured testavo reading is greater the MLT_MAX_300HZ_TESTAVO
+**
+*/
+static int32 processTestavoForC(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState, int term){
+uInt32 tmp;
+uInt32 zScale;
+uInt32 rp_mult;
+uInt32 r_bom_comp;
+uInt32 c_bom_comp;
+uInt32 mlt_prot_res;
+uInt32 mlt_line_cap;
+uInt32 mlt_emi_cap;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ mlt_line_cap = pProSLICMLT->mlt_config.mlt_line_cap;
+ mlt_emi_cap = pProSLICMLT->mlt_config.mlt_emi_cap;
+#else
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+ mlt_line_cap = MLT_LINE_CAPACITANCE;
+ mlt_emi_cap = MLT_EMI_CAPACITANCE;
+#endif
+
+ MLT_DEBUG_LOG("si3218x_mlt : processTestavoForC : TESTAVO = %d\n", pState->testavo);
+
+ if((term == MLT_TERM_TG)||(term == MLT_TERM_RG))
+ {
+ rp_mult = 10L;
+ r_bom_comp = MLT_HVIC_SWITCH_RES + mlt_prot_res;
+ c_bom_comp = mlt_line_cap + mlt_emi_cap;
+ }
+ else
+ {
+ rp_mult = 40L;
+ r_bom_comp = mlt_prot_res;
+ c_bom_comp = (mlt_line_cap/2) + mlt_emi_cap;
+ }
+
+ if(pState->freq == 300)
+ zScale = MLT_AUDIAG_SCALE_300HZ;
+ else
+ zScale = MLT_AUDIAG_SCALE_3014HZ;
+
+ if (pState->testavo > 310000L || (pState->freq == 3014)) /* Use Eq. 2 or 3 */
+ {
+ if ((pState->testavo > 500000L) && (pState->freq == 3014)) /* Use Eq. 3 */
+ {
+ tmp = (zScale * (pState->testavo / 100L));
+
+ MLT_DEBUG_LOG("si3218x_mlt : processTestavoForC : Method EQ 3\n");
+
+ tmp = (tmp / 100000L) * (tmp / 100000L); /* Zmag^2 */
+ tmp = (MLT_RS_CAPACITANCE_TEST / (tmp / 100L))*100L; /* (Rs^2/Zmag^2) */
+ tmp = tmp - 10000L; /* (Rs^2/Zmag^2) - 1 */
+ tmp = Isqrt(((tmp / 100L) * 16384L) / 100L); /* 16384 and 1179 are part of a truncation minimization */
+ tmp = (tmp * 1000L) / (1179L); /* minito implement 1/2*pi*f*Rs, or 1/92108312 */
+
+ }
+ else /* Use Eq. 2 */
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : processTestavoForC : Method EQ 2\n");
+
+ tmp = ((628L * pState->freq) / 100L * zScale) / 100000L;
+ tmp = tmp * (pState->testavo / 1000L);
+ tmp = (1000000000L / (tmp / 100L)) / 10L;
+ tmp = (tmp / 10L); /* - (LINE_CAPACITANCE/2); */
+ }
+ }
+ else /* Use Eq. 4 - large C */
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : processTestavoForC : Method EQ 4\n");
+ tmp = (zScale * (pState->testavo/10L));
+ tmp = (tmp / 10000L) * (tmp / 10000L);
+ tmp = tmp / 10L - rp_mult * (r_bom_comp*r_bom_comp);
+ tmp = Isqrt((tmp*10L) / 39L); /* 10/39 ~ 256/10000 */
+ tmp = ((tmp * pState->freq) / 16L) * 628L;
+ tmp = 1000000000L / (tmp / 1000L);
+ }
+
+ /* Compensate for bom & emi caps */
+
+ tmp -= c_bom_comp;
+
+ MLT_DEBUG_LOG("si3218x_mlt : processTestavoForC : adjC(%d) = %d\n", pState->freq,tmp);
+
+ return tmp;
+}
+/**@}*/
+
+
+
+/*
+** Function: si3218x_mlt_abort - documented in si3218x_mlt.h
+*/
+int si3218x_mlt_abort(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_test_state *pState)
+{
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->stage)
+ {
+ case 0:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED, LF_OPEN);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+ case 1:
+ delay_poll(pState,50/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ case 2:
+ si3218x_restore_state(pProSLICMLT);
+ pState->stage++;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+/*
+** Function: si3218x_mlt_foreign_voltages - documented in si3218x_mlt.h
+*/
+int si3218x_mlt_foreign_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState){
+ int i;
+ int32 data;
+ int32 tmp;
+ int32 vtsqrt, vrsqrt, vtrsqrt;
+ uInt8 reg;
+ uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ /* Start of reentrant block */
+ switch (pState->State.stage){
+
+ case 0: /* Enable user mode, store entry settings, and initialize state structure */
+ si3218x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE,reg&0x27);
+
+ if(pState->samples > MLT_MAX_FEMF_SAMPLES)
+ pState->samples = MLT_MAX_FEMF_SAMPLES;
+ pState->State.waitIterations=0;
+ pState->State.sampleIterations=0;
+ pState->State.stage++;
+ setupDcFeedCloseToZero (pProSLICMLT);
+ Si3218x_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE);
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->State),MLT_TS_HAZV_LINE_DISCHARGE/(mlt_poll_rate) - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Go Open for Hi-Z measurement */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN); /*disconnect from line*/
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Setup coarse sensors, enable diag, select VTIPC */
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VTIPC, MADC_HIRES);
+ diagSet(pProSLICMLT->pProslic, DIAG_ENABLE);
+ MLT_DEBUG_LOG ("OFFSET (vtipc) = %d mV\n",pState->tipOffs);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Read VTIPC samples, remove offset on each sample */
+ tmp = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - MLT_CONST_COARSE_SENSE_VOFFS;
+ pState->vt[pState->State.sampleIterations] = tmp - pState->tipOffs;
+ pState->State.sampleIterations++;
+ if (pState->State.sampleIterations == pState->samples)
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Reset sample counter, select VRINGC */
+ pState->State.sampleIterations=0;
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VRINGC, MADC_HIRES);
+ diagSet(pProSLICMLT->pProslic, DIAG_ENABLE);
+ MLT_DEBUG_LOG ("OFFSET (vringc) = %d mV\n",pState->ringOffs);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Read VRINGC samples, remove offset on each sample */
+ tmp = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - MLT_CONST_COARSE_SENSE_VOFFS;
+ pState->vr[pState->State.sampleIterations] = tmp - pState->ringOffs;
+ pState->State.sampleIterations++;
+ if (pState->State.sampleIterations == pState->samples) {
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pState->State.stage++;
+ #else
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pState->State.stage = 9;
+ #endif
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* Differential AC Measurement - Normal Res */
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pState->State.waitIterations = 0;
+ pState->State.sampleIterations = 0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Read coarse VTR samples */
+ pState->vtr[pState->State.sampleIterations] = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_COARSE,0);
+ pState->State.sampleIterations++;
+ if(pState->State.sampleIterations == pState->samples) {
+ pState->State.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9: /* Cleanup */
+ si3218x_restore_state(pProSLICMLT);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Calculate DC Voltages
+ */
+
+ pProSLICMLT->hazVDC.measTG = 0;
+ pProSLICMLT->hazVDC.measRG = 0;
+ pProSLICMLT->hazVDC.measTR = 0;
+ pProSLICMLT->hazVDC.measAUX = 0;
+
+ for (i = 0; i < pState->samples; i++)
+ {
+ pProSLICMLT->hazVDC.measTG += pState->vt[i];
+ pProSLICMLT->hazVDC.measRG += pState->vr[i];
+ pProSLICMLT->hazVDC.measAUX += pState->vtr[i];
+ }
+ pProSLICMLT->hazVDC.measTG /= pState->samples;
+ pProSLICMLT->hazVDC.measRG /= pState->samples;
+ pProSLICMLT->hazVDC.measAUX /= pState->samples;
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVDC.measTR = pProSLICMLT->hazVDC.measTG - pProSLICMLT->hazVDC.measRG;
+ #endif
+
+ /*
+ ** Calculate AC Voltages ( units of 100&Vrms^2 )
+ */
+ for (i = 0; i < pState->samples; i++)
+ {
+ pState->vt[i] -= pProSLICMLT->hazVDC.measTG;
+ pState->vr[i] -= pProSLICMLT->hazVDC.measRG;
+ pState->vtr[i] -= pProSLICMLT->hazVDC.measAUX;
+ }
+
+ pProSLICMLT->hazVAC.measTG = 0;
+ pProSLICMLT->hazVAC.measRG = 0;
+ pProSLICMLT->hazVAC.measTR = 0;
+
+ for (i = 0; i < pState->samples; i++)
+ {
+ pProSLICMLT->hazVAC.measTG += (pState->vt[i] / 100) * (pState->vt[i] / 100);
+ pProSLICMLT->hazVAC.measRG += (pState->vr[i] / 100) * (pState->vr[i] / 100);
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVAC.measTR += (pState->vtr[i] / 100) * (pState->vtr[i] / 100);
+ #endif
+ }
+
+ pProSLICMLT->hazVAC.measTG /= pState->samples;
+ pProSLICMLT->hazVAC.measRG /= pState->samples;
+
+ /* Skip rest if VTR measurement disabled */
+#ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVAC.measTR /= pState->samples;
+
+ /* Below 10v, trAC may not be very accurate due to having to use normal madc mode */
+ /* If trAC is < 10v, check to see if tgAC + rgAC is within 25% of trAC. If so, it */
+ /* likely that Vtg and Vrg are out of phase and Vtr may be calculated as Vtg+Vrg */
+ /* If the sum is not within 25% of trAC, do not modify trAC because voltage on */
+ /* tg and rg must be common mode. */
+
+ vtsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measTG);
+ vrsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measRG);
+ vtrsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measTR);
+
+ /* Calculate error between sum of longitudinal voltages and measured differential */
+ if (vtrsqrt > 0)
+ {
+ data = 100 * fp_abs((vtsqrt + vrsqrt) - vtrsqrt);
+ data /= vtrsqrt;
+ } else
+ data = 100;
+
+ if (data < 0)
+ data = -data;
+
+ MLT_DEBUG_LOG("si3218x_mlt: VtgSQ = %d\tVtg = %d\n", pProSLICMLT->hazVAC.measTG, vtsqrt);
+ MLT_DEBUG_LOG("si3218x_mlt: VrgSQ = %d\tVrg = %d\n", pProSLICMLT->hazVAC.measRG, vrsqrt);
+ MLT_DEBUG_LOG("si3218x_mlt: VtrSQ = %d\tVtr = %d\n", pProSLICMLT->hazVAC.measTR, vtrsqrt);
+
+
+ if (data < 25)
+ {
+ pProSLICMLT->hazVAC.measTR = vtsqrt + vrsqrt;
+ pProSLICMLT->hazVAC.measTR /= 10; /* prevent overflow */
+ pProSLICMLT->hazVAC.measTR *= pProSLICMLT->hazVAC.measTR;
+ }
+#endif
+
+ /*
+ ** Invert voltage polarity relative to GND
+ */
+ pProSLICMLT->hazVDC.measTR *= -1;
+ pProSLICMLT->hazVDC.measTG *= -1;
+ pProSLICMLT->hazVDC.measRG *= -1;
+ if (pProSLICMLT->hazVAC.measTG < 0)
+ pProSLICMLT->hazVAC.measTG *=-1;
+ if (pProSLICMLT->hazVAC.measRG < 0)
+ pProSLICMLT->hazVAC.measRG *=-1;
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+
+/*
+** Function: si3218x_mlt_hazard_voltages - documented in si3218x_mlt.h
+*/
+int si3218x_mlt_hazard_voltages(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_foreign_voltages_state *pState)
+{
+ return si3218x_mlt_foreign_voltages(pProSLICMLT,pState);
+}
+
+
+/*
+** Function: si3218x_mlt_resistive_faults - documented in si3218x_mlt.h
+*/
+int si3218x_mlt_resistive_faults(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState)
+{
+ int32 vc2;
+ int32 data;
+ int alarm;
+ uInt16 mlt_poll_rate;
+ int32 bal_ratio;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant block */
+ switch(pState->setupState.stage)
+ {
+ case 0: /* Setup diag current source for T-R dvdt measurement */
+ si3218x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ ProSLIC_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ /* Set VBATH to 70v */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VBATH_EXPECT,MLT_RES_VBATH_SET);
+
+ /* Initialize return values and methods */
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measAUX = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.ahsFlag = 0;
+ pProSLICMLT->resFaults.trFlag = 0;
+ pProSLICMLT->resFaults.rgFlag = 0;
+ pProSLICMLT->resFaults.tgFlag = 0;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ pState->rtrMethod = RESFAULT_METHOD_UNDEFINED;
+ pState->rtgMethod = RESFAULT_METHOD_UNDEFINED;
+ pState->rrgMethod = RESFAULT_METHOD_UNDEFINED;
+
+ if(Si3218x_General_Configuration.pm_bom == BO_PM_BOM)
+ {
+ pProSLICMLT->pm_bom_flag = 1;
+ }
+ else
+ {
+ pProSLICMLT->pm_bom_flag = 0;
+ }
+#ifdef PM_BOM
+ pProSLICMLT->pm_bom_flag = 1;
+#endif
+
+ pState->smallRFlag=0;
+ pState->setupState.waitIterations=0;
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,MLT_MAX_I_THRESH);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,MLT_MAX_I_THRESH);
+ /* Go Active */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN3,0x1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC, MLT_CONST_P_TH_HVIC );
+
+ /* Setup dc current source = 2V*0.31957mA/V = 639.14uA*/
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);/*set slope_ring*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x337A28L); /*2V*/
+ diagSet(pProSLICMLT->pProslic,DIAG_ENABLE|DIAG_DCLPF_44K|DIAG_FB_OFF);
+
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Wait*/
+ delay_poll(&(pState->setupState),400/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Setup diag current source for V2 measurement (time constant)*/
+ pState->v1 = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_FILT,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x1FCC85D8L);
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* wait - fixed 20ms wait period */
+ delay_poll(&(pState->setupState),20/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Measure T-R dV/dt to set auto-v step size and settle times */
+ vc2 = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_FILT,0);
+ pState->dvdt_tr = fp_abs(pState->v1 - vc2);
+ pState->dvdt_tr /= 20L;
+
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : dV/dt est : %d v/s\n",pState->dvdt_tr);
+
+ diagSet(pProSLICMLT->pProslic,DIAG_ENABLE);
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ /*check for small fault to ground - if it is present we probe further in individual tests.*/
+ setupDcFeed35VCM(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ delay_poll(&(pState->setupState),250/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ /* Estimate range of longitudinal fault by looking at current on TIP and RING.
+ ** If less than 10mA (large R) do auto-v method,
+ ** otherwise use normal dc feed.
+ */
+ data = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ITIP,0);
+ if(data < -10000L)
+ {
+ pState->smallRFlag = 1;
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : Small-R ITIP = %d uA : smallRFlag = %d\n",data,pState->smallRFlag);
+ }
+
+ data = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_IRING,0);
+ if(data < -10000L)
+ {
+ pState->smallRFlag |= 2;
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : Small-R IRING = %d uA : smallRFlag = %d\n",data,pState->smallRFlag);
+ }
+
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_OPEN);
+ pState->TRState.stage = 0;
+ pState->TGState.stage = 0;
+ pState->RGState.stage = 0;
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ /*
+ ** Skip TR measurement if smallRFlag is set - must be TG or RG fault
+ ** Otherwise, do TR measurement
+ */
+ if(pState->smallRFlag)
+ {
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_RUNNING;
+ }
+#ifdef MLT_RES_RTR_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+ if(measRtr(pProSLICMLT,pState))
+ {
+ /* If small Rtr, skip other tests */
+ if(pProSLICMLT->resFaults.trFlag == 1)
+ {
+ pState->setupState.stage = 11;
+ return RC_MLT_TEST_RUNNING;
+ }
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** If power alarm occurs while measuring RTR (usually due to small Rrg)
+ ** abort measurement and skip to RRG
+ */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : Aborted RTR Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9:
+#ifdef MLT_RES_RRG_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+ if(measRrg(pProSLICMLT,pState))
+ {
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ /* If power alarm occurs, abort */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : Aborted RRG Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 10:
+#ifdef MLT_RES_RTG_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+ if(measRtg(pProSLICMLT,pState))
+ {
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ /* If power alarm occurs, abort */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm)
+ {
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : Aborted RTG Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 11:
+ si3218x_restore_state(pProSLICMLT);
+
+ /*
+ ** Post-measurement analysis
+ **
+ ** Keep measurement results for dominant (smallest) fault only,
+ ** which is applicable when supporting single-fault model.
+ **
+ ** Leave compile option to return raw values for user to post
+ ** process on their own if they wish to examine 2T values.
+ **
+ */
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : RTR MEAS = %d\n", pProSLICMLT->resFaults.measTR);
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : RRG MEAS = %d\n", pProSLICMLT->resFaults.measRG);
+ MLT_DEBUG_LOG("si3218x_mlt : resFaults : RTG MEAS = %d\n", pProSLICMLT->resFaults.measTG);
+
+ /*
+ ** Cap each measurement at 2Mohm
+ */
+ if(pProSLICMLT->resFaults.measRG > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ if(pProSLICMLT->resFaults.measTG > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ if(pProSLICMLT->resFaults.measTR > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+
+ pState->fault_term = MLT_TERM_TR; /* Default to TR */
+ /*
+ ** Isolate single fault
+ */
+
+ if(pProSLICMLT->pm_bom_flag)
+ {
+ bal_ratio = MLT_CONST_PM_BAL_RATIO;
+ }
+ else
+ {
+ bal_ratio = MLT_CONST_BAL_RATIO;
+ }
+
+ /*
+ ** RG Check:
+ ** 1. RRG < 2Mohm
+ ** 2. RRG < RTR
+ ** 3. RRG+25% < RTG
+ */
+ if((pProSLICMLT->resFaults.measRG < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measRG < pProSLICMLT->resFaults.measTR)&&
+ (bal_ratio*pProSLICMLT->resFaults.measRG/pProSLICMLT->resFaults.measTG < 100L))
+ {
+ pState->fault_term = MLT_TERM_RG;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TG Check:
+ ** 1. RTG < 2Mohm
+ ** 2. RTG < RTR
+ ** 3. RTG+25% < RRG
+ */
+ else if((pProSLICMLT->resFaults.measTG < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measTG < pProSLICMLT->resFaults.measTR)&&
+ (bal_ratio*pProSLICMLT->resFaults.measTG/pProSLICMLT->resFaults.measRG < 100L))
+ {
+ pState->fault_term = MLT_TERM_TG;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TR Check:
+ ** 1. RTR < 2Mohm
+ ** 2. RTG & RRG within 25% of each other
+ ** Note: RTR may be less than RRG and/or RTG since their measurements
+ ** include RTR + small leakage of HVIC switch.
+ */
+ else if((pProSLICMLT->resFaults.measTR < MLT_CONST_MAX_RES)&&
+ (100L*pProSLICMLT->resFaults.measTG/pProSLICMLT->resFaults.measRG < bal_ratio)&&
+ (100L*pProSLICMLT->resFaults.measRG/pProSLICMLT->resFaults.measTG < bal_ratio))
+ {
+ pState->fault_term = MLT_TERM_TR;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TR Re-Check:
+ ** 1. RRG != RTG
+ ** 2. RTR < RRG
+ ** 3. RTR < RTG
+ **
+ ** Multiple fault case (not supported). Report TR case if smallest.
+ */
+ else if((pProSLICMLT->resFaults.measTR < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measTR < pProSLICMLT->resFaults.measRG)&&
+ (pProSLICMLT->resFaults.measTR < pProSLICMLT->resFaults.measTG))
+ {
+ pState->fault_term = MLT_TERM_TR;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_COMPLETE;
+ break;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/*
+** Function: si3218x_mlt_receiver_offhook - documented in si3218x_mlt.h
+*/
+int si3218x_mlt_receiver_offhook(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_roh_state *pState)
+{
+ ProslicRAMInit dcfeed7mA [] = {
+ {MLT_COMM_RAM_SLOPE_VLIM,0x1EB48978L},
+ {MLT_COMM_RAM_SLOPE_RFEED,0x1FDA6949L},
+ {MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L},
+ {MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL},
+ {MLT_COMM_RAM_SLOPE_DELTA1,0x1907F1D3L},
+ {MLT_COMM_RAM_SLOPE_DELTA2,0x1AD45894L},
+ {MLT_COMM_RAM_V_VLIM,0x5A38633L},
+ {MLT_COMM_RAM_V_RFEED,0x55B5917L},
+ {MLT_COMM_RAM_V_ILIM,0x3E67006L},
+ {MLT_COMM_RAM_CONST_RFEED,0x526775L},
+ {MLT_COMM_RAM_CONST_ILIM,0x209246L},
+ {MLT_COMM_RAM_I_VLIM,0x2D8D96L},
+ {0xFFFF, 0xFFFFFFFFL} /*end flag*/
+ };
+ ProslicRAMInit dcfeed14mA [] = {
+ {MLT_COMM_RAM_SLOPE_VLIM,0x1B9C5AA7L},
+ {MLT_COMM_RAM_SLOPE_RFEED,0x1FC0DB63L},
+ {MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L},
+ {MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL},
+ {MLT_COMM_RAM_SLOPE_DELTA1,0x1E119F8AL},
+ {MLT_COMM_RAM_SLOPE_DELTA2,0x1E46C831L},
+ {MLT_COMM_RAM_V_VLIM,0x5A38633L},
+ {MLT_COMM_RAM_V_RFEED,0x55B5917L},
+ {MLT_COMM_RAM_V_ILIM,0x3E67006L},
+ {MLT_COMM_RAM_CONST_RFEED,0x7F6F07L},
+ {MLT_COMM_RAM_CONST_ILIM,0x41248DL},
+ {MLT_COMM_RAM_I_VLIM,0x2D8D96L},
+ {0xFFFF, 0xFFFFFFFFL} /*end flag*/
+ };
+ ProslicRegInit empty [] = {
+ {0xFF,0xFF} /*end flag*/
+ };
+
+ int32 iloop;
+ int32 vdiff;
+ int32 zDiff;
+ int32 zDiffLimit = MLT_ROH_MAX_ZDIFF;
+ int32 zDiffREN = MLT_ROH_MIN_ZDIFF_REN;
+ int32 RmaxTR = MLT_ROH_MAX_ZTR;
+ uInt8 reg;
+ uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ /* Start of reentrant loop */
+ switch (pState->State.stage)
+ {
+ case 0: /* Store entry conditions, setup DC feed for 7mA source, go active */
+ si3218x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_ENHANCE,reg&0x27);
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);/*max out threshold*/
+ pState->State.waitIterations=0;
+ pState->State.sampleIterations=0;
+ Si3218x_LoadRegTables(&(pProSLICMLT->pProslic),dcfeed7mA,empty,1);
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* settle */
+ delay_poll(&(pState->State),MLT_TS_ROH_MEAS1/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Measure I & V, calc first Ztr, setup 14mA source */
+ iloop = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+ if (iloop > MLT_ROH_MIN_ILOOP)
+ pState->Rv1 = ((vdiff*1000) / iloop)*100;
+ else
+ pState->Rv1 = 1000000000;
+ if (vdiff < MLT_ROH_MIN_VLOOP)
+ pState->Rv1 = 1; /* call it a short */
+ Si3218x_LoadRegTables(&(pProSLICMLT->pProslic),dcfeed14mA,empty,1);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* settle */
+ delay_poll(&(pState->State),MLT_TS_ROH_MEAS2/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Measure I & V, calc second Ztr, computations */
+ iloop = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+ if (iloop > MLT_ROH_MIN_ILOOP)
+ pState->Rv2 = ((vdiff*1000) / iloop)*100;
+ else
+ pState->Rv2 = 1000000000;
+ if (vdiff < MLT_ROH_MIN_VLOOP)
+ pState->Rv2 = 1; /* call it a short */
+
+ MLT_DEBUG_LOG("Rv1 = %d\nRv2 = %d\n",pState->Rv1,pState->Rv2);
+
+
+
+ /* If both impedances are high, no fault or offhook cpe device */
+ if ((pState->Rv1 == 1000000000) && (pState->Rv2 == 1000000000)) {
+ pProSLICMLT->roh.rohTrue = 0; /* no fault, roh passed */
+ }
+ else {
+ zDiff = pState->Rv1-pState->Rv2;
+ zDiff = ((zDiff)*100)/pState->Rv1;
+ if (zDiff<0) zDiff*=-1;
+
+ MLT_DEBUG_LOG("zDiff = %d\n",zDiff);
+
+ /*Qualify resistance and resistance differences*/
+
+ if((pState->Rv1 == 1)&& (zDiff >= zDiffLimit)) { /* < 100ohms*/
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_RESFAULT;
+ }
+ else if((zDiff >= zDiffLimit)&&((pState->Rv1/100)<RmaxTR)&&((pState->Rv2/100)<RmaxTR)) {
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_ROH;
+ }
+ else {
+ if(((pState->Rv1/100 < 10000) || (pState->Rv2/100 < 10000)) && (zDiff < zDiffREN) )
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_RESFAULT;
+ else
+ pProSLICMLT->roh.rohTrue = 0;
+ }
+ }
+ si3218x_restore_state(pProSLICMLT);
+ pState->State.stage++;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+/*
+** Function: si3218x_mlt_ren - documented in si3218x_mlt.h
+*/
+int si3218x_mlt_ren(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_state *pState){
+
+ return si3218x_mlt_ren_subthresh_ring_method (pProSLICMLT,pState);
+
+
+}
+
+/*
+** Function: si3218x_mlt_capacitance - documented in si3218x_mlt.h
+*/
+
+int si3218x_mlt_capacitance(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState)
+{
+int32 trC, rgC, tgC;
+int32 iForcep = 5000;
+int32 iForcen = -5000;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->State.stage)
+ {
+ case 0:
+ si3218x_preserve_state(pProSLICMLT); /*save register settings */
+
+ /* Disable Low Power Mode */
+ Si3218x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ setup300HzBandpass(pProSLICMLT);
+ pState->freq = 300;
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RA_EN_B, 0x300000L); /*ra_sum disconnect */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_COMP_Z, 0x0L); /*comp_z disable */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_EZSYNTH_B0, 0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RXACGAIN, 0x2000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RXACGAIN_SAVE, 0x2000000L);
+
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIGCON, 0x1C); /*disable hyb */
+ /* Force on audio path */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_AUDIO_MAN, 0x300000L); /*force audio on */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_BIAS, 0x200000L); /*pd_bias */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_ADC, 0x200000L); /*pd_adc */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_DAC, 0x200000L); /*pd_dac */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_SNS, 0x200000L); /*pd_ac_sns */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x10); /* */
+
+ MLT_DEBUG_LOG("si3218x_mlt : Capacitance : TIP-RING\n");
+
+ Si3218x_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE); /*enable line driver */
+ /* Setup diag current source */
+
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcep);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+
+ pState->State.stage++;
+ pState->State.waitIterations=0;
+ pState->MeasState.stage = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* bias settle */
+ delay_poll(&pState->State, 600 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_RA, 0); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_EZSYNTH_B0, 0L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_COMP_Z, 0L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_AUDIO_MAN, 0x300000L); /*force audio on */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_OSC1FREQ, 0x7C70000L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_OSC1AMP, 0x2A000L); /*force audio on */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* osc settle */
+ delay_poll(&pState->State, 600 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Measure TIP-RING Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measTR = processTestavoForC(pProSLICMLT,pState,MLT_TERM_TR);
+
+ MLT_DEBUG_LOG("si3218x_mlt : Capacitance : tr_raw = %d.%d nF\n", pProSLICMLT->capFaults.measTR / 10, pProSLICMLT->capFaults.measTR % 10);
+
+ /* Setup for RING-GND Measurement */
+ pState->ram1447 = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_TIP_OPEN); /* tip-open */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0x300000L); /*pd_cm */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*active delay*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447 | 0x2f000L);
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcep);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+ pState->State.stage++;
+ pState->MeasState.stage=0;
+
+ MLT_DEBUG_LOG("si3218x_mlt : Capacitance : RING-GND\n");
+
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 5:
+ delay_poll(&pState->State, 200 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+
+ return RC_MLT_TEST_RUNNING;
+ case 7:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Measure RING-GND Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measRG = processTestavoForC(pProSLICMLT,pState,MLT_TERM_RG);
+
+ MLT_DEBUG_LOG("si3218x_mlt : Capacitance : rg_raw = %d.%d nF\n", pProSLICMLT->capFaults.measRG / 10, pProSLICMLT->capFaults.measRG % 10);
+
+ /* Setup for T-G Measurement */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_RING_OPEN);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0x300000L); /*pd_cm */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*active delay*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447 | 0x82f000L);
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcen); /* -5000 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+ pState->State.stage++;
+ pState->MeasState.stage=0;
+
+ MLT_DEBUG_LOG("si3218x_mlt : Capacitance : TIP-GND\n");
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 10:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 11:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 12: /* Measure TIP-GND Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measTG = processTestavoForC(pProSLICMLT,pState,MLT_TERM_TG);
+
+ MLT_DEBUG_LOG("si3218x_mlt : Capacitance : tg_raw = %d.%d nF\n", pProSLICMLT->capFaults.measTG / 10, pProSLICMLT->capFaults.measTG % 10);
+
+ /* Restore Settings */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_OPEN);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0L); /*pd_cm */
+
+
+ /* Compute 3-terminal values */
+ if (pProSLICMLT->capFaults.measTR < 0) pProSLICMLT->capFaults.measTR = 0L;
+ if (pProSLICMLT->capFaults.measTG < 0) pProSLICMLT->capFaults.measTG = 0L;
+ if (pProSLICMLT->capFaults.measRG < 0) pProSLICMLT->capFaults.measRG = 0L;
+
+
+
+ #if (MLT_DISABLE_3TERM_CAP_COMPENSATION)
+ trC = pProSLICMLT->capFaults.measTR - (LINE_CAPACITANCE/2);
+ tgC = pProSLICMLT->capFaults.measTG - LINE_CAPACITANCE;
+ rgC = pProSLICMLT->capFaults.measRG - LINE_CAPACITANCE;
+ #else
+ /*three-terminal compensation */
+ trC = (-pProSLICMLT->capFaults.measTG / 2) - (pProSLICMLT->capFaults.measRG / 2) + 2 * pProSLICMLT->capFaults.measTR;
+ tgC = (3 * pProSLICMLT->capFaults.measTG) / 2 + pProSLICMLT->capFaults.measRG / 2 - 2 * pProSLICMLT->capFaults.measTR;
+ rgC = pProSLICMLT->capFaults.measTG / 2 + (3 * pProSLICMLT->capFaults.measRG) / 2 - 2 * pProSLICMLT->capFaults.measTR;
+ #endif
+ pProSLICMLT->capFaults.measTR = trC;
+ pProSLICMLT->capFaults.measRG = rgC;
+ pProSLICMLT->capFaults.measTG = tgC;
+
+ /*clip output values */
+ if (pProSLICMLT->capFaults.measTR < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measTR = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTR > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measTR = MLT_MAX_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTG < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measTG = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTG > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measTG = MLT_MAX_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measRG < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measRG = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measRG > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measRG = MLT_MAX_CAPACITANCE;
+
+ pState->State.stage = 70;
+
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ si3218x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_RUNNING;
+}
+
+
+
+/*
+** Function: si3218x_mlt_cap_ren - documented in si3218x_mlt.h
+*/
+
+int si3218x_mlt_ren_cap(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_cap_state *pState)
+{
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->State.stage)
+ {
+ case 0:
+ si3218x_preserve_state(pProSLICMLT);
+
+ /* Disable Low Power Mode */
+ Si3218x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+
+ pState->MeasState.stage = 0;
+ pState->MeasState.waitIterations = 0;
+ pState->MeasState.sampleIterations = 0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ if(estimateCtr_2(pProSLICMLT,pState))
+ {
+ pState->State.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ si3218x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+}
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3226x_mlt.c b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3226x_mlt.c
new file mode 100644
index 0000000..731d2e8
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/silicon_mlt/source/si3226x_mlt.c
@@ -0,0 +1,3245 @@
+/*
+** Copyright (c) 2010-2014 by Silicon Laboratories
+**
+** $Id: si3226x_mlt.c 5512 2016-01-25 17:42:11Z elgeorge $
+**
+*/
+/*! \file si3226x_mlt.c
+** \brief Si3226x ProSLIC MLT interface implementation file
+**
+** \author Silicon Laboratories, Inc (cdp)
+**
+** \attention
+** This file contains proprietary information.
+** No dissemination allowed without prior written permission from
+** Silicon Laboratories, Inc.
+** This code may produce different results on different host processors
+**
+*/
+
+#include "si_voice_datatypes.h"
+#include "si_voice_ctrl.h"
+#include "si_voice_timer_intf.h"
+#include "proslic.h"
+#define SI_USE_IFACE_MACROS
+#include "proslic_mlt.h"
+#include "proslic_mlt_math.h"
+#include "proslic_mlt_diag_madc.h"
+#include "proslic_mlt_dcfeed.h"
+
+#include "si3226x.h"
+#include "si3226x_intf.h"
+#include "si3226x_mlt.h"
+#include "mlt_comm_regs.h"
+#include "mlt26x_c_regs.h"
+
+/*******************************************************/
+
+/*
+** Datalogging Macro
+*/
+#ifdef ENABLE_DEBUG
+#define MLT_DEBUG_LOG(...) \
+ if(pProSLICMLT->pProslic->debugMode) {\
+ LOGPRINT(__VA_ARGS__);\
+ }
+#else
+#define MLT_DEBUG_LOG(...) do {} while(0)
+#endif
+
+/*
+** MLT Specific Patch RAM Locations
+*/
+#define MLT26X_C_PRAM_VTR3 352
+#define MLT26X_C_PRAM_STOP_TIMER3 333
+#define MLT26X_C_PRAM_STOP_TIMER3_VAL 334
+
+
+/*
+** List of RAM Addresses to be stored before each MLT test is executed
+*/
+static const uInt16 si3226x_preserve_RAM[] = {
+ MLT_COMM_RAM_SLOPE_VLIM,
+ MLT_COMM_RAM_SLOPE_RFEED,
+ MLT_COMM_RAM_SLOPE_ILIM,
+ MLT_COMM_RAM_SLOPE_RING,
+ MLT_COMM_RAM_SLOPE_DELTA1,
+ MLT_COMM_RAM_SLOPE_DELTA2,
+ MLT_COMM_RAM_V_VLIM,
+ MLT_COMM_RAM_V_RFEED,
+ MLT_COMM_RAM_V_ILIM,
+ MLT_COMM_RAM_CONST_RFEED,
+ MLT_COMM_RAM_CONST_ILIM,
+ MLT_COMM_RAM_I_VLIM,
+ MLT_COMM_RAM_VCM_OH,
+ MLT_COMM_RAM_VOV_BAT,
+ MLT_COMM_RAM_VOV_GND,
+ MLT_COMM_RAM_P_TH_HVIC,
+ MLT_COMM_RAM_VCMDAC_SCALE_MAN,
+ MLT_COMM_RAM_LCROFFHK,
+ MLT_COMM_RAM_LCRONHK,
+ MLT_COMM_RAM_RINGAMP,
+ MLT_COMM_RAM_RINGOF,
+ MLT_COMM_RAM_RTPER,
+ MLT_COMM_RAM_RINGFR,
+ MLT_COMM_RAM_RINGPHAS,
+ MLT_COMM_RAM_VCM_RING,
+ MLT_COMM_RAM_COUNTER_VTR_VAL,
+ MLT_COMM_RAM_LONGHITH,
+ MLT_COMM_RAM_LONGLOTH,
+ MLT_COMM_RAM_RA_EN_B,
+ MLT_COMM_RAM_AUDIO_MAN,
+ MLT_COMM_RAM_PD_BIAS,
+ MLT_COMM_RAM_PD_DC_BUF,
+ MLT_COMM_RAM_PD_AC_ADC,
+ MLT_COMM_RAM_PD_AC_DAC,
+ MLT_COMM_RAM_PD_AC_SNS,
+ MLT_COMM_RAM_PD_CM,
+ MLT_COMM_RAM_PD_DC_COARSE_SNS,
+ MLT_COMM_RAM_LKG_UPT_ACTIVE,
+ MLT_COMM_RAM_LKG_UPR_ACTIVE,
+ MLT_COMM_RAM_LKG_DNT_ACTIVE,
+ MLT_COMM_RAM_LKG_DNR_ACTIVE,
+ MLT26X_C_RAM_LKG_UPT_OHT,
+ MLT26X_C_RAM_LKG_UPR_OHT,
+ MLT26X_C_RAM_LKG_DNT_OHT,
+ MLT26X_C_RAM_LKG_DNR_OHT,
+ MLT_COMM_RAM_COMP_Z,
+ MLT_COMM_RAM_VBATR_EXPECT,
+ MLT_COMM_RAM_VBATH_EXPECT,
+ MLT_COMM_RAM_VOV_RING_GND,
+ 0 /* NULL TERMINATE */
+};
+
+static const uInt8 si3226x_preserve_Reg[] = {
+ MLT_COMM_REG_LINEFEED,
+ MLT_COMM_REG_PDN,
+ MLT_COMM_REG_RINGCON,
+ MLT_COMM_REG_AUTO,
+ MLT_COMM_REG_IRQEN1,
+ MLT_COMM_REG_IRQEN2,
+ MLT_COMM_REG_IRQEN3,
+ MLT_COMM_REG_IRQEN4,
+ MLT_COMM_REG_ENHANCE,
+ MLT_COMM_REG_DIGCON,
+ MLT_COMM_REG_GPIO,
+ MLT_COMM_REG_GPIO_CFG1,
+ MLT_COMM_REG_GPIO_CFG2,
+ MLT_COMM_REG_GPIO_CFG3,
+ MLT_COMM_REG_DIAG1,
+ MLT_COMM_REG_DIAG2,
+ MLT26X_C_REG_DIAG3,
+ MLT_COMM_REG_RA,
+ 0 /* NULL TERMINATE */
+};
+
+
+/**
+ * @internal @defgroup SI3226X_DRV_STATIC Si3226x Driver Level Static APIs
+ * These functions are used by the Si3226x driver and never called from a higher level routine
+ *
+ *@{
+ */
+/********************************************************************************/
+/**
+** @brief Delay function utilizing reentry
+**
+** @param[in] *pState - MLT state structure
+** @param[in] delayCount - number of reentries or polling cycles
+**
+** @retval void
+**
+** @todo Implement poll rate adjustment in this function
+*/
+static void delay_poll (ProSLIC_mlt_test_state *pState,uInt16 delayCount){
+ pState->waitIterations++;
+ if ((pState->waitIterations == delayCount) || (delayCount == 0)){
+ pState->waitIterations=0;
+ pState->stage++;
+ }
+}
+
+/**
+** @brief Stores select RAM and register values defined by
+** si3226x_preserve_RAM and si3226x_preserve_RAM arrays.
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+static void si3226x_preserve_state (ProSLICMLTType *pProSLICMLT){
+int i;
+
+ i=0;
+ while(si3226x_preserve_RAM[i] != 0)
+ {
+ pProSLICMLT->preserveRAM[i].address = si3226x_preserve_RAM[i];
+ pProSLICMLT->preserveRAM[i].initValue = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,si3226x_preserve_RAM[i]);
+ i++;
+ }
+ pProSLICMLT->preserveRAM[i].address = 0; /* Null Terminate */
+
+ i=0;
+ while(si3226x_preserve_Reg[i] != 0)
+ {
+ pProSLICMLT->preserveReg[i].address = si3226x_preserve_Reg[i];
+ pProSLICMLT->preserveReg[i].initValue = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,si3226x_preserve_Reg[i]);
+ i++;
+ }
+ pProSLICMLT->preserveReg[i].address = 0; /* Null Terminate */
+}
+
+/********************************************************************************/
+/**
+** @brief Restores RAM and register data defined by si3226x_preserve_RAM and
+** si3226x_preserve_REG array of addresses
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+**
+** @retval void
+**
+*/
+static void si3226x_restore_state (ProSLICMLTType *pProSLICMLT){
+int i;
+
+ i=0;
+ while(pProSLICMLT->preserveRAM[i].address != 0)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveRAM[i].address,pProSLICMLT->preserveRAM[i].initValue);
+ i++;
+ }
+
+ i=0;
+ while(pProSLICMLT->preserveReg[i].address != 0)
+ {
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,pProSLICMLT->preserveReg[i].address,pProSLICMLT->preserveReg[i].initValue);
+ i++;
+ }
+}
+
+
+/********************************************************************************/
+/**
+** @brief Setup DSP Timers
+**
+** @param[in] *pProslic - Pointer to channel object
+** @param[in] timer1 - Timer 1 preset (usec)
+** @param[in] timer2 - Timer 2 preset (usec)
+** @param[in] timer3 - Timer 3 preset (usec)
+**
+** @retval void
+**
+*/
+static void setupDspTimers(proslicChanType_ptr pProslic, int timer1, int timer2, int timer3)
+{
+int32 t1;
+int32 t2;
+int32 t3;
+uInt8 regTmp;
+
+ t1 = timer1*MLT_CONST_DSP_TIMER_SCALE;
+ t2 = timer2*MLT_CONST_DSP_TIMER_SCALE;
+ t3 = timer3*MLT_CONST_DSP_TIMER_SCALE;
+
+ regTmp = ReadReg(pProHW,pProslic->channel,MLT26X_C_REG_DIAG3);
+ WriteReg(pProHW,pProslic->channel,MLT26X_C_REG_DIAG3,regTmp&0xFD);
+ WriteRAM(pProHW,pProslic->channel,MLT26X_C_PRAM_STOP_TIMER3_VAL, t3);
+ WriteRAM(pProHW,pProslic->channel,MLT26X_C_PRAM_STOP_TIMER3, t3);
+ WriteRAM(pProHW,pProslic->channel,MLT26X_C_RAM_STOP_TIMER2_VAL, t2);
+ WriteRAM(pProHW,pProslic->channel,MLT26X_C_RAM_STOP_TIMER2, t2);
+ WriteRAM(pProHW,pProslic->channel,MLT26X_C_RAM_STOP_TIMER1_VAL, t1);
+ WriteRAM(pProHW,pProslic->channel,MLT26X_C_RAM_STOP_TIMER1, t1);
+
+}
+
+static void armDspTimers(proslicChanType_ptr pProslic)
+{
+uInt8 regTmp;
+
+ regTmp = ReadReg(pProHW,pProslic->channel,MLT26X_C_REG_DIAG3);
+ WriteReg(pProHW,pProslic->channel,MLT26X_C_REG_DIAG3,regTmp|0x02);
+}
+
+static void readDspTimerV(proslicChanType_ptr pProslic, int32 *v1, int32 *v2, int32 *v3)
+{
+ *v1 = ReadRAM(pProHW,pProslic->channel,MLT26X_C_RAM_VTR1);
+ if (*v1 & 0x10000000L)
+ *v1 |= 0xF0000000L;
+ *v2 = ReadRAM(pProHW,pProslic->channel,MLT26X_C_RAM_VTR2);
+ if (*v2 & 0x10000000L)
+ *v2 |= 0xF0000000L;
+
+ *v3 = ReadRAM(pProHW,pProslic->channel,MLT26X_C_PRAM_VTR3);
+ if (*v3 & 0x10000000L)
+ *v3 |= 0xF0000000L;
+
+ *v1 /= MLT_CONST_DSP_TIMER_V_SCALE;
+ *v2 /= MLT_CONST_DSP_TIMER_V_SCALE;
+ *v3 /= MLT_CONST_DSP_TIMER_V_SCALE;
+}
+
+
+static void gndOpenTerm(proslicChanType_ptr pProslic, int gndOn)
+{
+ if(gndOn)
+ {
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE, 0x2F000L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_PD_CM, 0x300000L);
+ }
+ else
+ {
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_PD_CM, 0x0L);
+ WriteRAM(pProHW,pProslic->channel,MLT_COMM_RAM_HVIC_STATE_MAN, 0x0L);
+ }
+}
+/********************************************************************************/
+/**
+** @brief Calculation of capacitance from TESTAVO reading
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+** @param[in] *pState - pointer to test state structure
+** @param[in] term - measured terminal
+**
+** @retval tmp - computed capacitance
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - This function does not modify the linefeed state or audio path
+** - This function measures testavo w/ 300Hz source applied and remeasures with 3014Hz source
+** if measured testavo reading is greater the MLT_MAX_300HZ_TESTAVO
+**
+*/
+static int32 processTestavoForC(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState, int term){
+uInt32 tmp;
+uInt32 zScale;
+uInt32 rp_mult;
+uInt32 r_bom_comp;
+uInt32 c_bom_comp;
+uInt32 mlt_prot_res;
+uInt32 mlt_line_cap;
+uInt32 mlt_emi_cap;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ mlt_line_cap = pProSLICMLT->mlt_config.mlt_line_cap;
+ mlt_emi_cap = pProSLICMLT->mlt_config.mlt_emi_cap;
+#else
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+ mlt_line_cap = MLT_LINE_CAPACITANCE;
+ mlt_emi_cap = MLT_EMI_CAPACITANCE;
+#endif
+
+
+ MLT_DEBUG_LOG("si3226x_mlt : processTestavoForC : TESTAVO = %d\n", pState->testavo);
+
+
+ if((term == MLT_TERM_TG)||(term == MLT_TERM_RG))
+ {
+ rp_mult = 10L; /* 1^2 = 1 */
+ r_bom_comp = SI3226X_MLT_HVIC_SWITCH_RES + mlt_prot_res;
+ c_bom_comp = mlt_line_cap + mlt_emi_cap;
+ }
+ else
+ {
+ rp_mult = 40L; /* 2^2 = 4 */
+ r_bom_comp = mlt_prot_res;
+ c_bom_comp = (mlt_line_cap/2) + mlt_emi_cap;
+ }
+
+ if(pState->freq == 300)
+ zScale = MLT_AUDIAG_SCALE_300HZ;
+ else
+ zScale = MLT_AUDIAG_SCALE_3014HZ;
+
+ if (pState->testavo > 310000L || (pState->freq == 3014)) /* Use Eq. 2 or 3 */
+ {
+ if ((pState->testavo > 500000L) && (pState->freq == 3014)) /* Use Eq. 3 */
+ {
+ tmp = (zScale * (pState->testavo / 100L));
+
+ MLT_DEBUG_LOG("si3226x_mlt : processTestavoForC : Method EQ 3\n");
+
+ tmp = (tmp / 100000L) * (tmp / 100000L); /* Zmag^2 */
+ tmp = (MLT_RS_CAPACITANCE_TEST / (tmp / 100L))*100L; /* (Rs^2/Zmag^2) */
+ tmp = tmp - 10000L; /* (Rs^2/Zmag^2) - 1 */
+ tmp = Isqrt(((tmp / 100L) * 16384L) / 100L); /* 16384 and 1179 are part of a truncation minimization */
+ tmp = (tmp * 1000L) / (1179L); /* minito implement 1/2*pi*f*Rs, or 1/92108312 */
+
+ }
+ else /* Use Eq. 2 */
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : processTestavoForC : Method EQ 2\n");
+ tmp = ((628L * pState->freq) / 100L * zScale) / 100000L;
+ tmp = tmp * (pState->testavo / 1000L);
+ tmp = (1000000000L / (tmp / 100L)) / 10L;
+ tmp = (tmp / 10L); /* - (LINE_CAPACITANCE/2); */
+ }
+ }
+ else /* Use Eq. 4 - large C */
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : processTestavoForC : Method EQ 4\n");
+ tmp = (zScale * (pState->testavo/10L));
+ tmp = (tmp / 10000L) * (tmp / 10000L);
+ tmp = tmp / 10L - rp_mult * (r_bom_comp*r_bom_comp);
+ tmp = Isqrt((tmp*10L) / 39L); /* 10/39 ~ 256/10000 */
+ tmp = ((tmp * pState->freq) / 16L) * 628L;
+ tmp = 1000000000L / (tmp / 1000L);
+ }
+
+
+
+ /* Compensate for bom & emi caps */
+
+ tmp -= c_bom_comp;
+
+ MLT_DEBUG_LOG("si3226x_mlt : processTestavoForC : adjC(%d) = %d\n", pState->freq,tmp);
+
+ return tmp;
+}
+/**@}*/
+
+/********************************************************************************/
+/**
+** @brief Implementation of capacitance measurement
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is stored in pState->testavo - diag power ac voltage measurement
+** @param[in] *pState - pointer to test state structure
+**I
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - This function does not modify the linefeed state or audio path
+** - This function measures testavo w/ 300Hz source applied and remeasures with 3014Hz source
+** if measured testavo reading is greater the MLT_MAX_300HZ_TESTAVO
+**
+*/
+static int measCapacitanceAC(ProSLICMLTType * pProSLICMLT, ProSLIC_mlt_capacitance_state * pState)
+{
+uInt32 data;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->MeasState.stage)
+ {
+ case 0:
+ pState->freq = 300;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ setup300HzBandpass(pProSLICMLT);
+ setup300HzTestTone(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /*enable testfilter */
+ pState->MeasState.stage++;
+ pState->MeasState.waitIterations = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&pState->MeasState, 900 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ data = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_TESTABO);
+ pState->testavo = data;
+
+ if (pState->testavo <= MLT_MAX_300HZ_TESTAVO)
+ {
+ return RC_MLT_TEST_COMPLETE;
+ }
+ pState->MeasState.stage++;
+ pState->freq = 3014;
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ setup3014HzBandpass(pProSLICMLT);
+ setup3014HzTestTone(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /*enable testfilter */
+ pState->MeasState.waitIterations = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3:
+ delay_poll(&pState->MeasState, 900 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ pState->MeasState.stage++;
+ pState->MeasState.waitIterations = 0;
+ data = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_TESTABO);
+ pState->testavo = data;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Establish AUTO-V step size from measured dV/dt
+**
+** @param[in] *pState - Pointer to resistance test state structure
+**
+** @retval int32
+**
+*/
+static int setupAutovForDvdt(ProSLIC_mlt_rmeas_state *pState)
+{
+int return_val = RC_MLT_ERROR;
+
+ switch(pState->active_term)
+ {
+ case MLT_TERM_TR:
+ return_val = RC_NONE;
+
+ pState->interval = 10; /* Fast interval req'd to monitor for AHS charge pump */
+
+ if((pState->dvdt_tr > 0) && (pState->dvdt_tr <= 95))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 2000000L;
+ }
+ else if((pState->dvdt_tr > 95) && (pState->dvdt_tr <= 120))
+ {
+ pState->setupState.settleTime = 500;
+ pState->step = 800000L;
+ }
+ else if((pState->dvdt_tr > 120) && (pState->dvdt_tr <= 150))
+ {
+ pState->setupState.settleTime = 400;
+ pState->step = 400000L;
+ }
+ else if((pState->dvdt_tr > 150) && (pState->dvdt_tr <= 210))
+ {
+ pState->setupState.settleTime = 300;
+ pState->step = 200000L;
+ }
+ else
+ {
+ pState->setupState.settleTime = 200;
+ pState->step = 120000L;
+ }
+
+ /* Adjust test voltages and settle time if AHS detected */
+ if(pState->ahs_det.detected > 0)
+ {
+ pState->setupState.settleTime = MLT_RES_AUTOV_DIFF_AHS_SETTLE;
+ pState->vtar[0] = MLT_RES_AUTOV_DIFF_AHS_V1;
+ if(pState->ahs_det.detected == 1)
+ pState->vtar[1] = MLT_RES_AUTOV_DIFF_AHS_V2;
+ }
+ else
+ {
+ pState->vtar[0] = MLT_RES_AUTOV_DIFF_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_DIFF_V2;
+ }
+
+ break;
+
+
+ case MLT_TERM_TG:
+ case MLT_TERM_RG:
+ return_val = RC_NONE;
+
+ if((pState->dvdt_tr > 0) && (pState->dvdt_tr <= 90))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 200000;
+ pState->interval = 50;
+ }
+ else if((pState->dvdt_tr > 90) && (pState->dvdt_tr <= 120))
+ {
+ pState->setupState.settleTime = 600;
+ pState->step = 200000;
+ pState->interval = 30;
+ }
+ else
+ {
+ pState->setupState.settleTime = 300;
+ pState->step = 100000;
+ pState->interval = 30;
+ }
+
+ /* Adjust test voltages and settle time if AHS detected during TR test */
+ if(pState->ahs_det.count > 0)
+ {
+ pState->setupState.settleTime = MLT_RES_AUTOV_LONG_AHS_SETTLE;
+ pState->vtar[0] = MLT_RES_AUTOV_LONG_AHS_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_LONG_AHS_V2;
+ }
+ else
+ {
+ pState->vtar[0] = MLT_RES_AUTOV_LONG_V1;
+ pState->vtar[1] = MLT_RES_AUTOV_LONG_V2;
+ }
+
+ if(pState->active_term == MLT_TERM_TG)
+ {
+ pState->vtar[0] *= -1;
+ pState->vtar[1] *= -1;
+ }
+
+ break;
+ }
+
+ return return_val;
+}
+/********************************************************************************/
+/**
+** @brief Implements Auto-V adaptive force-IV/measure-IV method
+**
+** @param[in] *pProSLICMLT - Pointer to MLT channel structure
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int execAutoV (ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_rmeas_state *pState)
+{
+int32 i_samp;
+int32 v_samp;
+int32 v_open_term = 0;
+int32 i_leak = 0;
+int32 v_target;
+int i;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant loop */
+ switch (pState->autoVState.stage)
+ {
+ case 0:
+ /************************************/
+ /* Setup DIAG current source/AUTO-V */
+ /************************************/
+ v_target = pState->vtar[0] * MLT_CONST_AUTO_V_VTAR;
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+
+ /* If RG or TG, setup coarse sensors to measure OPEN terminal */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VTIPC, MADC_HIRES);
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VRINGC, MADC_HIRES);
+ }
+
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0); /* DC */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DIAG_ADJ_STEP,pState->step);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT26X_C_RAM_DIAG_V_TAR,v_target);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC,0x4468adL);
+ diagSet(pProSLICMLT->pProslic, DIAG_AUTO_V|DIAG_ENABLE|DIAG_KDC_OFF|DIAG_DCLPF_44K|DIAG_FB_OFF);
+ pState->autoVState.waitIterations=0;
+ pState->autoVState.sampleIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 2: /* Sample Interval */
+ delay_poll(&(pState->autoVState),pState->interval/mlt_poll_rate );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 3: /* Capture samples and accumulate */
+
+ /* Drive terminal voltage */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+
+ /* Open terminal voltage (if applicable) */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->tipOffs;
+ i_leak = (v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->ringOffs;
+ i_leak = -(v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ }
+
+ /* Drive terminal current */
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+
+ /* Store drive current less leakage */
+ pState->imeas += (i_samp - i_leak);
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ { /* Compute averages */
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v1 = pState->vmeas;
+ pState->i1 = pState->imeas;
+
+#ifdef MLT_RES_AUTOV_SINGLE_SAMPLE
+ pState->v1 = v_samp;
+ pState->i1 = i_samp;
+#endif
+
+ MLT_DEBUG_LOG ("si3226x_mlt : execAutoV : Avg V1 = %dmV \n",pState->vmeas);
+ MLT_DEBUG_LOG ("si3226x_mlt : execAutoV : Avg I1 = %duA \n",pState->imeas);
+
+ pState->autoVState.stage++;
+ }
+ else /* Take next sample */
+ {
+ pState->autoVState.stage = 2;
+ }
+
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 4: /* Setup for 2nd measurement */
+ pState->autoVState.sampleIterations = 0;
+ pState->autoVState.waitIterations=0;
+ pState->vmeas = 0;
+ pState->imeas = 0;
+ v_target = pState->vtar[1] * MLT_CONST_AUTO_V_VTAR;
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT26X_C_RAM_DIAG_V_TAR,v_target);
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Settle */
+ delay_poll(&(pState->autoVState),pState->setupState.settleTime/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 6: /* Sample Interval */
+ delay_poll(&(pState->autoVState),pState->interval/mlt_poll_rate );
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 7: /* Capture samples and accumulate 2nd measurement*/
+ /* Drive terminal voltage */
+ v_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_V_FEED_IN, 0);
+ pState->vmeas += v_samp;
+
+ /* Open terminal voltage (if applicable) */
+ if(pState->active_term == MLT_TERM_RG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->tipOffs;
+ i_leak = (v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ }
+ else if(pState->active_term == MLT_TERM_TG)
+ {
+ v_open_term = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - pState->ringOffs;
+ i_leak = -(v_open_term*1000L)/MLT_CONST_AUTOV_REQ_OPEN;
+ }
+
+
+ /* Drive terminal current */
+ i_samp = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_RINGOF, 0);
+
+ /* Store sample for AHS detection */
+ pState->i_array[pState->autoVState.sampleIterations] = i_samp - i_leak;
+ /* Store drive current less leakage */
+ pState->imeas += (i_samp - i_leak);
+
+ pState->autoVState.sampleIterations++;
+
+ if (pState->autoVState.sampleIterations == pState->autoVState.numSamples)
+ { /* Compute averages */
+ pState->vmeas /= pState->autoVState.numSamples;
+ pState->imeas /= pState->autoVState.numSamples;
+
+ pState->v2 = pState->vmeas;
+ pState->i2 = pState->imeas;
+
+#ifdef MLT_RES_AUTOV_SINGLE_SAMPLE
+ pState->v2 = v_samp;
+ pState->i2 = i_samp;
+#endif
+ pState->autoVState.stage++;
+
+ MLT_DEBUG_LOG ("si3226x_mlt : execAutoV : Avg V2 = %dmV \n",pState->vmeas);
+ MLT_DEBUG_LOG ("si3226x_mlt : execAutoV : Avg I2 = %duA \n",pState->imeas);
+ }
+ else
+ { /* Take next sample */
+ pState->autoVState.stage = 6;
+ }
+ return RC_MLT_TEST_RUNNING;
+ break;
+
+ case 8: /* AHS Computation */
+
+ /* -------------------------
+ ** Active Handset Detection
+ ** -------------------------
+ */
+
+ if(pState->ahs_det.enable)
+ {
+ /*
+ ** Test 1:
+ **
+ ** Compute RMS current of second capture. If an active handset
+ ** is present, there will be a large ac component.
+ */
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->i_array[i] -= pState->imeas; /* Remove DC */
+ }
+ pState->ahs_det.irms = 0;
+ for(i=0;i<pState->autoVState.numSamples;i++)
+ {
+ pState->ahs_det.irms += (pState->i_array[i])*(pState->i_array[i]);
+ }
+
+ pState->ahs_det.irms /= pState->autoVState.numSamples;
+
+ /*
+ ** Test 2:
+ **
+ ** Look at different between ratio of I2 to I1 and the difference
+ ** between I2 and I1 (eg. large ratio, small difference)
+ */
+ if(pState->i1 != 0)
+ {
+ pState->ahs_det.ratio = (pState->i2 * 1000L) / pState->i1;
+ }
+ else
+ {
+ pState->ahs_det.ratio = 1;
+ }
+ pState->ahs_det.ratio -= (pState->i2 - pState->i1);
+
+ MLT_DEBUG_LOG ("si3226x_mlt : execAutoV : AHS Rms = %d uArms\n", pState->ahs_det.irms);
+ MLT_DEBUG_LOG ("si3226x_mlt : execAutoV : AHS Ratio = %d \n", pState->ahs_det.ratio);
+
+ /*
+ ** Test against configurable rms current and current
+ ** ratio limits to identify active handset. Occassionally,
+ ** current is measure while the AHS's charge pump is not
+ ** active, so the current ratio will cover that portion.
+ **
+ ** There are cases in which a longitudinal fault in parallel
+ ** with the AHS will result in missing both of these, but
+ ** the magnitude of the fault is large enough that it becomes
+ ** the dominant concern.
+ **
+ ** In the case of a TG fault, the ratio will exceed 3000, but
+ ** the absolute current will be low, so I2 is also checked.
+ */
+ pState->ahs_det.detected = 0; /* Default to 0 */
+
+ if((pState->ahs_det.ratio >= 3000)&&(pState->i2 > 200))
+ {
+ pState->ahs_det.detected = 1;
+ }
+ else if((pState->ahs_det.irms > 200L)&&(pState->ahs_det.ratio > 2000))
+ {
+ pState->ahs_det.detected = 2;
+ }
+
+ }
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_DIAG1,0);/*disable diag*/
+ pState->autoVState.stage++;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* Switch */
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @internal @brief Measures resistance present between TIP and RING
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Upon completion, pProSLICMLT->resFaults.measTR have the measured values.
+** @param[in] *pState - pointer to test state structure
+**
+** @retval
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRtr(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+int32 vdiff,ir;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+ int32 tr_req_const;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_EV_0;
+ }
+ else
+ {
+ tr_req_const = MLT_CONST_REQ_DIFF_SV_0;
+ }
+
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ tr_req_const = MLT_CONST_REQ_DIFF_EV_0;
+#else
+ tr_req_const = MLT_CONST_REQ_DIFF_SV_0;
+#endif
+#endif
+ /* Start of reentrant block */
+ switch (pState->TRState.stage){
+
+ case 0:
+ pState->active_term = MLT_TERM_TR;
+ pState->ahs_det.enable = MLT_RES_AUTOV_AHS_DET_EN; /* Enable active handset detection */
+ pState->ahs_det.detected = 0; /* Clear active handset detection flag */
+ pState->ahs_det.count = 0; /* Clear remeasure counter */
+ pState->autoVState.numSamples = MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Initialize flags and counters; Setup linefeed */
+ pState->TRState.waitIterations=0;
+ pState->TRState.sampleIterations=0;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ pProSLICMLT->resFaults.trFlag = 0;
+ pProSLICMLT->resFaults.tgFlag = 0;
+ pProSLICMLT->resFaults.rgFlag = 0;
+ setupDcFeedAutoV(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* settle linefeed */
+ delay_poll(&(pState->TRState),400/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Check for small Rtr in FWD mode */
+ ir = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : FWD Short : ILOOP = %duA\n",ir);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : FWD Short : VDIFF = %dmV\n", vdiff);
+
+
+ if(ir > MLT_RES_SM_R_MIN_I_FWD)
+ { /* Store if iloop > 8mA */
+ pProSLICMLT->resFaults.measTR = (vdiff*10000)/ir - 2*mlt_prot_res;
+ if(pProSLICMLT->resFaults.measTR < 0)
+ pProSLICMLT->resFaults.measTR = 0;
+ pProSLICMLT->resFaults.trFlag = 1;
+ }
+ else
+ { /* Consider open and do auto-v test */
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.trFlag = 0;
+ }
+ /* Setup for reverse active test */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_REV_ACTIVE);
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* settle */
+ delay_poll(&(pState->TRState),400/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* check for small Rtr in REV active, decide which is real later */
+ ir = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : REV Short : ILOOP = %duA\n",ir);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : REV Short : VDIFF = %dmV\n", vdiff);
+
+ if(fp_abs(ir) > MLT_RES_SM_R_MIN_I_REV)
+ { /* store if > 7ma (1ma of error between fwd/rev */
+ pProSLICMLT->resFaults.measAUX = (fp_abs(vdiff)*10000)/fp_abs(ir) - 2*mlt_prot_res;
+ if(pProSLICMLT->resFaults.measAUX < 0)
+ pProSLICMLT->resFaults.measAUX = 0;
+ pProSLICMLT->resFaults.auxFlag = 1;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measAUX = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ }
+
+ /* Return to FWD */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+
+ /* If both fwd and rev indicate a small R, skip remainder of test */
+ if(pProSLICMLT->resFaults.auxFlag && pProSLICMLT->resFaults.trFlag)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : Small RTR FWD RAW = %d\n", pProSLICMLT->resFaults.measTR);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : Small RTR REV RAW = %d\n", pProSLICMLT->resFaults.measAUX);
+
+ pState->rtrMethod = LOWR;
+ pState->TRState.stage = 70;
+ }
+ else
+ {
+ pState->rtrMethod = AUTOV;
+ pState->TRState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ setupAutovForDvdt(pState);
+
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : AutoV Setup : Samples = %d\n", pState->autoVState.numSamples);
+
+ pState->autoVState.stage=0;
+ pState->TRState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ if (execAutoV(pProSLICMLT,pState))
+ {
+ /*
+ ** Active handset detected - repeat measurement until settled
+ */
+ if((pState->ahs_det.detected)&&(pState->ahs_det.count <= MLT_RES_AUTOV_AHS_MAX_RETEST))
+ {
+ pState->TRState.stage = 6;
+ pState->ahs_det.count++;
+ pProSLICMLT->resFaults.ahsFlag = 1;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /* Process Results */
+ if ((pState->i2-pState->i1) == 0) { /* OPEN */
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ }
+ else { /* Find Absolute Resistance between T-R */
+ pProSLICMLT->resFaults.measTR = ((pState->v2 - pState->v1)*10000 / (pState->i2-pState->i1) - 2*mlt_prot_res);
+ }
+
+ MLT_DEBUG_LOG("si3226x_mlt : measRtr : AutoV RTR RAW : %d\n", pProSLICMLT->resFaults.measTR);
+
+ if ((pProSLICMLT->resFaults.measTR != 0) && (MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTR != tr_req_const))
+ pProSLICMLT->resFaults.measTR = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTR - tr_req_const);
+ else
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pState->TRState.stage=70;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+
+ case 70: /* move to end */
+ if (pProSLICMLT->resFaults.measTR < 0)
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+
+
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Measures resistance present between RING and GND
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Upon completion, pProSLICMLT->resFaults.measRG contains the measured values.
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRrg(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+ /* first check for a small R then run auto-v*/
+ int32 iring; int32 vring;
+ int32 dV; int32 dI;
+ int32 rg_req_const_0;
+ int32 rg_req_const_1;
+ int32 rg_req_auto_const;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ rg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+ else
+ {
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ rg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ rg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+#else
+ rg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ rg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ rg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+#endif
+#endif
+
+ switch (pState->RGState.stage){
+
+ case 0:
+ pState->active_term = MLT_TERM_RG;
+ pState->RGState.waitIterations=0;
+ if (!(pState->smallRFlag & 2))
+ {
+ pState->RGState.stage=5; /*auto-v method*/
+ }
+ else
+ {
+ setupDcFeedV1SmallR(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ pState->RGState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&(pState->RGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* small R test, first measurement */
+ iring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_IRING,0);
+ vring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VRING, 0);
+ MLT_DEBUG_LOG ("si3226x_mlt : measRrg : Small RRG : V1 = %dmV\n",vring);
+ MLT_DEBUG_LOG ("si3226x_mlt : measRrg : Small RRG : I1 = %duA\n",iring);
+
+ pProSLICMLT->resFaults.measRG = vring / -iring;
+ pState->i1 = -iring;
+ pState->v1 = vring;
+
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = 0;
+ setupDcFeedV2SmallR(pProSLICMLT);
+ pState->RGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle */
+ delay_poll(&(pState->RGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Small R test, second measurement and difference calculation */
+ iring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_IRING,0);
+ vring = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VRING,0);
+
+ MLT_DEBUG_LOG ("si3226x_mlt : measRrg : Small RRG : V2 = %dmV\n",vring);
+ MLT_DEBUG_LOG ("si3226x_mlt : measRrg : Small RRG : I2 = %duA\n",iring);
+
+ pState->i2 = -iring;
+ pState->v2 = vring;
+
+ /*
+ ** Loop equation in TIP-OPEN mode yields
+ ** RRG = dV/(dI - dV/a1 - 1/a0), where a1 and a0
+ ** are constants derived from the equivalent circuit
+ ** model. They may depend on pulse metering bom option
+ */
+ dV = 1000L*fp_abs(pState->v2 - pState->v1);
+ dI = fp_abs(pState->i2 - pState->i1) / 10L;
+ dI -= dV/rg_req_const_1;
+ dI += 1000000/rg_req_const_0;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measRG = (dV/dI);
+ pProSLICMLT->resFaults.measRG -= mlt_prot_res; /* subtract protection resistance */
+ }
+
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = 0;
+
+ pState->RGState.stage=70;
+ return RC_MLT_TEST_COMPLETE;
+
+ case 5: /* Auto V test */
+ pState->ahs_det.enable = 0; /* Disable active handset detection */
+ pState->autoVState.numSamples = MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+
+ setupAutovForDvdt(pState);
+
+ pState->RGState.stage++;
+ pState->autoVState.stage=0;
+ pState->RGState.waitIterations=0;
+
+ MLT_DEBUG_LOG("si3226x_mlt : measRrg : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3226x_mlt : measRrg : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3226x_mlt : measRrg : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3226x_mlt : measRrg : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Settle */
+ delay_poll(&(pState->RGState),50/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ /* Bias RING side LKG DAC to 4mA to improve open loop stability */
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_LKG_DNR_ACTIVE,0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_LKG_UPR_ACTIVE,0x1FF00000L);
+ pState->RGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ if(execAutoV(pProSLICMLT,pState))
+ {
+ /* Restore 0mA bias */
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_LKG_DNR_ACTIVE,0L);
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_LKG_UPR_ACTIVE,0L);
+ if ((pState->i2-pState->i1) == 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ else {
+ /* first order model since no r between tip/ring */
+ dV = (fp_abs(pState->v2 - pState->v1))*10000;
+ dI = fp_abs(pState->i2-pState->i1);
+
+ if(dI <= 0)
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measRG = dV/dI;
+ pProSLICMLT->resFaults.measRG *= 107;
+ pProSLICMLT->resFaults.measRG /= 100;
+
+ MLT_DEBUG_LOG("si3226x_mlt : measRrg : AutoV RRG RAW : %d\n", pProSLICMLT->resFaults.measRG);
+
+ if(pProSLICMLT->resFaults.measRG > 0)
+ {
+ if(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measRG <= rg_req_auto_const)
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measRG = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measRG - rg_req_auto_const);
+ pProSLICMLT->resFaults.measRG -= mlt_prot_res;
+ }
+ }
+ }
+ }
+ pState->RGState.stage=70;
+ }/* goToV */
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ if (pProSLICMLT->resFaults.measRG < 0)
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+
+ }/* switch */
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+/********************************************************************************/
+/**
+** @brief Measures resistance present between TIP and GND
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is located in pProSLICMLT->resFaults.measTG
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measRtg(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState){
+ /* first check for a short then run auto-v*/
+ int32 itip,vtip;
+ int32 dV; int32 dI;
+ int32 tg_req_const_0;
+ int32 tg_req_const_1;
+ int32 tg_req_auto_const;
+uInt32 mlt_prot_res;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_prot_res = pProSLICMLT->mlt_config.mlt_prot_res;
+ if(pProSLICMLT->mlt_config.mlt_ext_v_flag)
+ {
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ tg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+ }
+ else
+ {
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ tg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+ }
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_prot_res = MLT_PROTECTION_RESISTANCE;
+#ifdef MLT_USE_EXTENDED_V_RANGE
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_EV;
+ tg_req_const_0 = MLT_CONST_REQ_LONG_EV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_EV_1;
+#else
+ tg_req_auto_const = MLT_CONST_REQ_AUTO_LONG_SV;
+ tg_req_const_0 = MLT_CONST_REQ_LONG_SV_0;
+ tg_req_const_1 = MLT_CONST_REQ_LONG_SV_1;
+#endif
+#endif
+ switch (pState->TGState.stage){
+
+ case 0:
+ pState->active_term = MLT_TERM_TG;
+ pState->TGState.waitIterations=0;
+ if (!(pState->smallRFlag & 1))
+ {
+ pState->TGState.stage=5; /*auto-v method*/
+ }
+ else
+ {
+ setupDcFeedV1SmallR(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_RING_OPEN);
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ case 1:
+ delay_poll(&(pState->TGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /*Small R test, first measurment*/
+ itip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ITIP,0);
+ vtip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VTIP,0);
+
+ MLT_DEBUG_LOG ("si3226x_mlt : measRtg : Small RTG : V1 = %dmV\n",vtip);
+ MLT_DEBUG_LOG ("si3226x_mlt : measRtg : Small RTG : I1 = %duA\n",itip);
+
+ pProSLICMLT->resFaults.measTG = vtip / -itip;
+ pState->v1 = vtip;
+ pState->i1 = -itip;
+
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = 0;
+ setupDcFeedV2SmallR(pProSLICMLT);
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle */
+ delay_poll(&(pState->TGState),320/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Small R test, second measurement and difference calculation */
+ itip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_ITIP,0);
+ vtip = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VTIP,0);
+
+ MLT_DEBUG_LOG ("si3226x_mlt : measRtg : Small RTG : V2 = %dmV\n",vtip);
+ MLT_DEBUG_LOG ("si3226x_mlt : measRtg : Small RTG : I2 = %duA\n",itip);
+
+ pState->v2 = vtip;
+ pState->i2 = -itip;
+
+ /*
+ ** Loop equation in RING-OPEN mode yields
+ ** RTG = dV/(dI - dV/a1 - 1/a0), where a1 and a0
+ ** are constants derived from the equivalent circuit
+ ** model. They may depend on pulse metering bom option
+ */
+
+ dV = 1000L*fp_abs(pState->v2 - pState->v1);
+ dI = fp_abs(pState->i2 - pState->i1) / 10L;
+ dI -= dV/tg_req_const_1;
+ dI += 1000000/tg_req_const_0;
+
+ if(dI <= 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ else {
+ pProSLICMLT->resFaults.measTG = (dV/dI);
+ pProSLICMLT->resFaults.measTG -= mlt_prot_res;
+ }
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = 0;
+
+ pState->TGState.stage=70;
+ return RC_MLT_TEST_COMPLETE;
+
+ case 5: /* Auto V test */
+ pState->ahs_det.enable = 0; /* Disable active handset detection - detected in TR test */
+ pState->autoVState.numSamples = MLT_RES_AUTOV_SAMPLES;
+ /* Limit to capture array size */
+ if(pState->autoVState.numSamples > MLT_MAX_AUTOV_SAMPLES)
+ pState->autoVState.numSamples = MLT_MAX_AUTOV_SAMPLES;
+
+ setupAutovForDvdt(pState);
+
+ pState->TGState.stage++;
+ pState->autoVState.stage=0;
+ pState->TGState.waitIterations=0;
+
+ MLT_DEBUG_LOG("si3226x_mlt : measRtg : AutoV Setup : Step = %d\n", pState->step);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtg : AutoV Setup : Settle = %d\n", pState->setupState.settleTime);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtg : AutoV Setup : V1 = %d\n", pState->vtar[0]);
+ MLT_DEBUG_LOG("si3226x_mlt : measRtg : AutoV Setup : V2 = %d\n", pState->vtar[1]);
+
+ /* Precharge open lead */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_REV_ACTIVE);
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Settle */
+ delay_poll(&(pState->TGState),200/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_RING_OPEN);
+ /* Bias TIP side LKG DAC to 4mA to improve open loop stability */
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_LKG_DNT_ACTIVE,0x1FF00000L);
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_LKG_UPT_ACTIVE,0x1FF00000L);
+ pState->TGState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ if(execAutoV(pProSLICMLT,pState))
+ {
+ /* Restore 0mA bias */
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_LKG_DNT_ACTIVE,0L);
+ pProSLICMLT->WriteRAM(pMLT_HW,pMLT_CHAN,MLT_COMM_RAM_LKG_UPT_ACTIVE,0L);
+ if ((pState->i2-pState->i1) == 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ else {
+ /* first order model since no r between tip/ring */
+ dV = (fp_abs(pState->v2 - pState->v1))*10000;
+ dI = fp_abs(pState->i2-pState->i1);
+
+ if(dI <= 0)
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measTG = dV/dI;
+ pProSLICMLT->resFaults.measTG *= 107;
+ pProSLICMLT->resFaults.measTG /= 100;
+
+ MLT_DEBUG_LOG("si3226x_mlt : measRtg : AutoV RTG RAW : %d\n", pProSLICMLT->resFaults.measTG);
+
+ if(pProSLICMLT->resFaults.measTG > 0)
+ {
+ if ((MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTG) <= tg_req_auto_const)
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ else
+ {
+ pProSLICMLT->resFaults.measTG = MLT_CONST_OPEN_RES/(MLT_CONST_OPEN_RES/pProSLICMLT->resFaults.measTG - tg_req_auto_const);
+ pProSLICMLT->resFaults.measTG -= mlt_prot_res;
+ }
+ }
+ }
+ }
+ pState->TGState.stage=70;
+ }/* goToV */
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ if (pProSLICMLT->resFaults.measTG < 0)
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/********************************************************************************/
+/**
+** @brief Measure time constant using MLT diagnostic timers
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure.
+** @param[in,out] *termMeas - Pointer to mlt terminal structure
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+static int measureTimeConstant(ProSLICMLTType *pProSLICMLT, ProSLIC_term_meas_t *termMeas, ProSLIC_mlt_test_state *pState)
+{
+int32 dt1, dt2, dv1,dv2;
+int32 slope1, slope2;
+int32 i_offset = 50;
+uInt16 mlt_poll_rate;
+int enable_meas_down;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+
+ enable_meas_down = termMeas->tgFlag;
+
+ switch(pState->stage)
+ {
+ case 0:
+ pState->waitIterations=0;
+ termMeas->term.iloop[1] = termMeas->term.iloop[0] + i_offset; /* comp for offset */
+ setupDspTimers(pProSLICMLT->pProslic,termMeas->time1,termMeas->time2,termMeas->time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,-1*termMeas->term.iloop[0]); /* (-) current to discharge */
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle open terminal switch to GND */
+ delay_poll(pState,500/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Enable current source */
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Settle approximate acquisition time */
+ delay_poll(pState,((termMeas->time3/10)*10 + 100)/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Read voltages */
+ readDspTimerV(pProSLICMLT->pProslic,&(termMeas->term.vloop[0]),&(termMeas->term.vloop[1]),&(termMeas->term.vloop[2]));
+ if(!enable_meas_down)
+ {
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ }
+ /* Calculate dv/dt and estimate C */
+ dt1 = fp_abs(termMeas->time2 - termMeas->time1);
+ dt2 = fp_abs(termMeas->time3 - termMeas->time2);
+ dv1 = fp_abs(termMeas->term.vloop[1] - termMeas->term.vloop[0]);
+ dv2 = fp_abs(termMeas->term.vloop[2] - termMeas->term.vloop[1]);
+
+ if(dv1 > 0)
+ {
+ termMeas->measTR2 = (fp_abs(termMeas->term.iloop[0])*1000L*dt1)/dv1;
+ }
+ else
+ {
+ termMeas->measTR2 = 0;
+ }
+
+ if(dv2 > 0)
+ {
+ termMeas->measRG2 = (fp_abs(termMeas->term.iloop[0])*1000L*dt2)/dv2;
+ }
+ else
+ {
+ termMeas->measRG2 = 0;
+ }
+
+ slope1 = 0;
+ slope2 = 0;
+
+ if(dt1 > 0)
+ {
+ slope1 = (10L*dv1) / dt1;
+ }
+
+ if(dt2 > 0)
+ {
+ slope2 = (10L*dv2) / dt2;
+ }
+
+ termMeas->slopeErr = (1000L * fp_abs(slope1 - slope2));
+ if(slope1 > 0)
+ {
+ termMeas->slopeErr /= slope1;
+ }
+ else
+ {
+ termMeas->slopeErr = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : iForce = %d uA\n", -1*termMeas->term.iloop[0]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR1 = %d mV\n", termMeas->term.vloop[0]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR2 = %d mV\n", termMeas->term.vloop[1]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : VTR3 = %d mV\n", termMeas->term.vloop[2]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t1 = %d ms\n", termMeas->time1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t2 = %d ms\n", termMeas->time2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : t3 = %d ms\n", termMeas->time3);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dv1 = %d mV\n", dv1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dv2 = %d mV\n", dv2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dt1 = %d ms\n", dt1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : dt2 = %d ms\n", dt2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : slopeErr = %d \n", termMeas->slopeErr);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : C1 = %d nF\n", termMeas->measTR2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasUp : C2 = %d nF\n", termMeas->measRG2);
+
+ if(!enable_meas_down)
+ {
+ pState->stage = 0;
+ pState->waitIterations = 0;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ else
+ {
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ case 5: /* Allow full discharge */
+ delay_poll(pState,(200/mlt_poll_rate) - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ setupDspTimers(pProSLICMLT->pProslic,termMeas->time1,termMeas->time2,termMeas->time3);
+ setupDiagCurrentSource(pProSLICMLT->pProslic,termMeas->term.iloop[1]); /* (+) current to charge */
+ armDspTimers(pProSLICMLT->pProslic);
+ diagSet(pProSLICMLT->pProslic, DIAG_FB_OFF|DIAG_DCLPF_44K|DIAG_KDC_OFF|DIAG_ENABLE);
+ pState->stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* Settle approximate acquisition time */
+ delay_poll(pState,((termMeas->time3/10)*10 + 100)/mlt_poll_rate);
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Read voltages */
+ readDspTimerV(pProSLICMLT->pProslic,&(termMeas->term.vloop[3]),&(termMeas->term.vloop[4]),&(termMeas->term.vloop[5]));
+ diagSet(pProSLICMLT->pProslic,DIAG_CLR_DIAG1);
+ /* Calculate dv/dt and estimate C */
+ dt1 = fp_abs(termMeas->time2 - termMeas->time1);
+ dt2 = fp_abs(termMeas->time3 - termMeas->time2);
+ dv1 = fp_abs(termMeas->term.vloop[4] - termMeas->term.vloop[3]);
+ dv2 = fp_abs(termMeas->term.vloop[5] - termMeas->term.vloop[4]);
+
+ if(dv1 > 0)
+ {
+ termMeas->measAUX = (fp_abs(termMeas->term.iloop[1])*1000L*dt1)/dv1;
+ }
+ else
+ {
+ termMeas->measAUX = 0;
+ }
+
+ if(dv2 > 0)
+ {
+ termMeas->measTG2 = (fp_abs(termMeas->term.iloop[1])*1000L*dt2)/dv2;
+ }
+ else
+ {
+ termMeas->measTG2 = 0;
+ }
+
+ MLT_DEBUG_LOG("\n\n");
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : iForce = %d uA\n", termMeas->term.iloop[1]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR1 = %d mV\n", termMeas->term.vloop[3]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR2 = %d mV\n", termMeas->term.vloop[4]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : VTR3 = %d mV\n", termMeas->term.vloop[5]);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t1 = %d ms\n", termMeas->time1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t2 = %d ms\n", termMeas->time2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : t3 = %d ms\n", termMeas->time3);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dv1 = %d mV\n", dv1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dv2 = %d mV\n", dv2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dt1 = %d ms\n", dt1);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : dt2 = %d ms\n", dt2);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : C1 = %d nF\n", termMeas->measAUX);
+ MLT_DEBUG_LOG("measureTimeConstant : tcMeasDown : C2 = %d nF\n", termMeas->measTG2);
+
+ pState->stage = 0;
+ pState->waitIterations = 0;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+/********************************************************************************/
+/**
+** @brief Coarse measure of capacitance between TIP and RING
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Output is stored under pProSLICMLT->capFaults.measTR
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+**
+*/
+
+/*
+** Measurements
+*/
+#define MLT_TC_CTR pProSLICMLT->capFaults.measTR2
+#define MLT_TC_DISCHG_CTR1 pProSLICMLT->capFaults.measTR2
+#define MLT_TC_DISCHG_CTR2 pProSLICMLT->capFaults.measRG2
+#define MLT_TC_CHG_CTR1 pProSLICMLT->capFaults.measAUX
+#define MLT_TC_CHG_CTR2 pProSLICMLT->capFaults.measTG2
+#define MLT_TC_DISCHG_V1 pProSLICMLT->capFaults.term.vloop[0]
+#define MLT_TC_DISCHG_V2 pProSLICMLT->capFaults.term.vloop[1]
+#define MLT_TC_DISCHG_V3 pProSLICMLT->capFaults.term.vloop[2]
+#define MLT_TC_T1 pProSLICMLT->capFaults.time1
+#define MLT_TC_T2 pProSLICMLT->capFaults.time2
+#define MLT_TC_T3 pProSLICMLT->capFaults.time3
+#define MLT_TC_DISCHG_DV1 (fp_abs(MLT_TC_DISCHG_V2 - MLT_TC_DISCHG_V1))
+#define MLT_TC_DISCHG_DV2 (fp_abs(MLT_TC_DISCHG_V3 - MLT_TC_DISCHG_V2))
+#define MLT_TC_SLOPE_ERR pProSLICMLT->capFaults.slopeErr
+#define MLT_TC_ISRC pProSLICMLT->capFaults.term.iloop[0]
+#define MLT_TC_RUN_COUNT pProSLICMLT->capFaults.auxFlag
+#define MLT_TC_MEAS_CHG_PHASE pProSLICMLT->capFaults.tgFlag
+#define MLT_TC_USE_V1_V2_ONLY pProSLICMLT->capFaults.rgFlag
+#define MLT_TC_USE_V2_V3_ONLY pProSLICMLT->capFaults.trFlag
+/*
+** Test Condition Flags
+*/
+#define MLT_TC_COND_V1_LOW pProSLICMLT->capFaults.flags[0]
+#define MLT_TC_COND_V1_HIGH pProSLICMLT->capFaults.flags[1]
+#define MLT_TC_COND_V2_LOW pProSLICMLT->capFaults.flags[2]
+#define MLT_TC_COND_V2_HIGH pProSLICMLT->capFaults.flags[3]
+#define MLT_TC_COND_V3_LOW pProSLICMLT->capFaults.flags[4]
+#define MLT_TC_COND_V3_HIGH pProSLICMLT->capFaults.flags[5]
+#define MLT_TC_COND_DV1_LOW pProSLICMLT->capFaults.flags[6]
+#define MLT_TC_COND_DV1_HIGH pProSLICMLT->capFaults.flags[7]
+#define MLT_TC_COND_DV2_LOW pProSLICMLT->capFaults.flags[8]
+#define MLT_TC_COND_DV2_HIGH pProSLICMLT->capFaults.flags[9]
+#define MLT_TC_COND_SLOPE_ERR pProSLICMLT->capFaults.flags[10]
+#define MLT_TC_COND_REDUCE_DV_LIM pProSLICMLT->capFaults.flags[11]
+#define MLT_TC_COND_V1_MID pProSLICMLT->capFaults.flags[12]
+#define MLT_TC_COND_V2_MID pProSLICMLT->capFaults.flags[13]
+#define MLT_TC_COND_V3_MID pProSLICMLT->capFaults.flags[14]
+/*
+** Thresholds
+*/
+#define MLT_TC_TH_V1_LOW 10000
+#define MLT_TC_TH_V1_HIGH 46000
+#define MLT_TC_TH_V2_LOW 3000
+#define MLT_TC_TH_V2_HIGH 43000
+#define MLT_TC_TH_V3_LOW 3000
+#define MLT_TC_TH_V3_HIGH 40000
+#define MLT_TC_TH_DV1_LOW (MLT_TC_COND_REDUCE_DV_LIM ? 1000:1800)
+#define MLT_TC_TH_DV1_HIGH 35000
+#define MLT_TC_TH_DV2_LOW (MLT_TC_COND_REDUCE_DV_LIM ? 1000:1800)
+#define MLT_TC_TH_DV2_HIGH 35000
+#define MLT_TC_TH_SLOPE_ERR 150
+#define MLT_TC_TH_V_MID 20000
+/*
+** Other constants
+*/
+#define MLT_TC_MAX_RUNS 5
+#define MLT_TC_CAL_ISRC 500L
+/*
+** Tests
+*/
+#define MLT_TC_TEST_ZERO (MLT_TC_COND_V1_LOW && MLT_TC_COND_V2_LOW && MLT_TC_COND_V3_LOW)
+#define MLT_TC_TEST_V1_OK (!(MLT_TC_COND_V1_LOW||MLT_TC_COND_V1_HIGH))
+#define MLT_TC_TEST_V2_OK (!(MLT_TC_COND_V2_LOW||MLT_TC_COND_V2_HIGH))
+#define MLT_TC_TEST_V3_OK (!(MLT_TC_COND_V3_LOW||MLT_TC_COND_V3_HIGH))
+#define MLT_TC_TEST_V2_V3_LOW (MLT_TC_COND_V2_LOW && MLT_TC_COND_V3_LOW && MLT_TC_TEST_V1_OK)
+#define MLT_TC_TEST_V3_LOW (MLT_TC_COND_V3_LOW && MLT_TC_TEST_V1_OK && MLT_TC_TEST_V2_OK)
+#define MLT_TC_TEST_DV1_OK (!(MLT_TC_COND_DV1_LOW||MLT_TC_COND_DV1_HIGH))
+#define MLT_TC_TEST_DV2_OK (!(MLT_TC_COND_DV2_LOW||MLT_TC_COND_DV2_HIGH))
+#define MLT_TC_TEST_ALL_V_OK (MLT_TC_TEST_V1_OK && MLT_TC_TEST_V2_OK && MLT_TC_TEST_V3_OK)
+#define MLT_TC_TEST_ALL_V_HIGH (MLT_TC_COND_V1_HIGH && MLT_TC_COND_V2_HIGH && MLT_TC_COND_V3_HIGH)
+#define MLT_TC_TEST_V_OK_DV1_LOW (MLT_TC_TEST_ALL_V_OK && MLT_TC_COND_DV1_LOW)
+#define MLT_TC_TEST_V3_LOW_DV1_OK (MLT_TC_TEST_V3_LOW && MLT_TC_TEST_DV1_OK)
+#define MLT_TC_TEST_SLOPE_ERR (MLT_TC_TEST_ALL_V_OK && MLT_TC_TEST_DV1_OK && MLT_TC_TEST_DV2_OK && MLT_TC_COND_SLOPE_ERR)
+#define MLT_TC_TEST_V1_HIGH_V3_OK (MLT_TC_COND_V1_HIGH && MLT_TC_TEST_V3_OK)
+#define MLT_TC_TEST_LOW_I_V3_MID (MLT_TC_COND_V3_MID && MLT_TC_TEST_V3_OK && (MLT_TC_ISRC == MLT_TC_CAL_ISRC))
+#define MLT_TC_TEST_V1_MID (MLT_TC_COND_V1_MID)
+#define MLT_TC_TEST_V2_MID (MLT_TC_COND_V2_MID)
+#define MLT_TC_TEST_V3_MID (MLT_TC_COND_V3_MID)
+
+
+static int estimateCtr(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_capacitance_state *pState)
+{
+uInt32 mlt_line_cap;
+uInt32 mlt_emi_cap;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+ mlt_line_cap = pProSLICMLT->mlt_config.mlt_line_cap;
+ mlt_emi_cap = pProSLICMLT->mlt_config.mlt_emi_cap;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+ mlt_line_cap = MLT_LINE_CAPACITANCE;
+ mlt_emi_cap = MLT_EMI_CAPACITANCE;
+#endif
+
+ switch(pState->MeasState.stage)
+ {
+ case 0:
+ Si3226x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);/*max out threshold*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,0xFFFFFFFL);/*max out threshold*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_TIP_OPEN);
+ gndOpenTerm(pProSLICMLT->pProslic,TRUE);
+ /* Initialize time constant measurement parameters */
+ MLT_TC_T1 = 6;
+ MLT_TC_T2 = 22;
+ MLT_TC_T3 = 44;
+ MLT_TC_ISRC = MLT_TC_CAL_ISRC;
+ MLT_TC_MEAS_CHG_PHASE = 0; /* Do discharge only measurement */
+ MLT_TC_RUN_COUNT = 0;
+ MLT_TC_USE_V1_V2_ONLY = 0;
+ MLT_TC_USE_V2_V3_ONLY = 0;
+ MLT_TC_COND_REDUCE_DV_LIM = 0;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Time constant measurement */
+ if(measureTimeConstant(pProSLICMLT,&(pProSLICMLT->capFaults),&(pState->TimeConstState)))
+ {
+ /* Process results of calibration run */
+ MLT_TC_COND_V1_LOW = (MLT_TC_DISCHG_V1 < MLT_TC_TH_V1_LOW ) ? 1 : 0;
+ MLT_TC_COND_V1_HIGH = (MLT_TC_DISCHG_V1 > MLT_TC_TH_V1_HIGH ) ? 1 : 0;
+ MLT_TC_COND_V2_LOW = (MLT_TC_DISCHG_V2 < MLT_TC_TH_V2_LOW ) ? 1 : 0;
+ MLT_TC_COND_V2_HIGH = (MLT_TC_DISCHG_V2 > MLT_TC_TH_V2_HIGH ) ? 1 : 0;
+ MLT_TC_COND_V3_LOW = (MLT_TC_DISCHG_V3 < MLT_TC_TH_V3_LOW ) ? 1 : 0;
+ MLT_TC_COND_V3_HIGH = (MLT_TC_DISCHG_V3 > MLT_TC_TH_V3_HIGH ) ? 1 : 0;
+ MLT_TC_COND_DV1_LOW = (MLT_TC_DISCHG_DV1 < MLT_TC_TH_DV1_LOW ) ? 1 : 0;
+ MLT_TC_COND_DV1_HIGH = (MLT_TC_DISCHG_DV1 > MLT_TC_TH_DV1_HIGH ) ? 1 : 0;
+ MLT_TC_COND_DV2_LOW = (MLT_TC_DISCHG_DV2 < MLT_TC_TH_DV2_LOW ) ? 1 : 0;
+ MLT_TC_COND_DV2_HIGH = (MLT_TC_DISCHG_DV2 > MLT_TC_TH_DV2_HIGH ) ? 1 : 0;
+ MLT_TC_COND_SLOPE_ERR = (MLT_TC_SLOPE_ERR > MLT_TC_TH_SLOPE_ERR) ? 1 : 0;
+ MLT_TC_COND_V1_MID = (MLT_TC_DISCHG_V1 > MLT_TC_TH_V_MID) ? 1 : 0;
+ MLT_TC_COND_V2_MID = (MLT_TC_DISCHG_V2 > MLT_TC_TH_V_MID) ? 1 : 0;
+ MLT_TC_COND_V3_MID = (MLT_TC_DISCHG_V3 > MLT_TC_TH_V_MID) ? 1 : 0;
+
+ MLT_TC_USE_V1_V2_ONLY = 0;
+ MLT_TC_USE_V2_V3_ONLY = 0;
+
+ /* ------------------
+ ** Analysis of result
+ ** ------------------
+ */
+
+ /*
+ ** All voltages low - extrememly fast time constant
+ ** or R is out of max range (500uA*R > VBAT), call it 0nF
+ */
+ if(MLT_TC_TEST_ZERO)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : MLT_TC_TEST_ZERO\n");
+ MLT_TC_CTR = 0;
+ pState->MeasState.stage = 20;
+ }
+ /*
+ ** All voltages high - extremely slow time constant,
+ * increase drive current and measurement window
+ */
+ else if(MLT_TC_TEST_ALL_V_HIGH)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : MLT_TC_TEST_ALL_V_HIGH\n");
+ MLT_TC_T1 += 10;
+ MLT_TC_T2 += 20;
+ MLT_TC_T3 += 20;
+ MLT_TC_ISRC *= 2;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** All voltages in range, but small dV
+ ** indicates a large C, but some R is present
+ ** resulting in a voltage drop. Cannot source
+ ** too much current because of I*R drop, so
+ ** capture times must be primary variant.
+ **
+ ** dV limit is dynamic. Ideally, it would be as
+ ** large as possible, but with large series R,
+ ** it needs to be reduced to accomodate minimized
+ ** voltage range. If V1 is < 20v, do not increase
+ ** current drive
+ */
+ else if(MLT_TC_TEST_V_OK_DV1_LOW)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : MLT_TC_TEST_V_OK_DV1_LOW\n");
+ /* Select ISRC based on dV1 */
+ MLT_TC_COND_REDUCE_DV_LIM = 1;
+ if((MLT_TC_DISCHG_DV1 < 300)&&(MLT_TC_TEST_V1_MID)) /* C in 30-50uF Range */
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 60;
+ MLT_TC_T3 = 100;
+ }
+ else if((MLT_TC_DISCHG_DV1 < 500)&&(MLT_TC_TEST_V1_MID)) /* C in 20-40uF Range */
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 50;
+ MLT_TC_T3 = 80;
+ }
+ else if((MLT_TC_DISCHG_DV1 < 800)&&(MLT_TC_TEST_V1_MID))
+ {
+ MLT_TC_ISRC += 500;
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 40;
+ MLT_TC_T3 = 60;
+ }
+ else /* dV between 800 and 1000 */
+ {
+ /* Don't change Isrc...just increase time */
+ MLT_TC_T1 = 20;
+ MLT_TC_T2 = 60;
+ MLT_TC_T3 = 100;
+ }
+
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** Medium C. Use V1 and V2 to compute result
+ ** Increase t2 if enough margin to improve
+ ** accuracy
+ */
+ else if(MLT_TC_TEST_V3_LOW_DV1_OK)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : MLT_TC_TEST_V3_LOW_DV1_OK\n");
+ MLT_TC_USE_V1_V2_ONLY = 1;
+ if(MLT_TC_DISCHG_V2 > 14000)
+ {
+ MLT_TC_T2 += 4;
+ }
+
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ if(MLT_TC_RUN_COUNT == 0)
+ {
+ pState->MeasState.stage = 1;
+ }
+ else
+ {
+ pState->MeasState.stage++;
+ }
+ }
+ /*
+ ** Fast Time Constant - first move t2,t3 for
+ ** 300nF-800nF range, then move all 3 capture times
+ ** for < 500nF
+ **
+ **
+ */
+ else if(MLT_TC_TEST_V2_V3_LOW)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : MLT_TC_TEST_V2_V3_LOW\n");
+ if(MLT_TC_RUN_COUNT == 0)
+ {
+ MLT_TC_T2 = 12;
+ MLT_TC_T3 = 18;
+ pState->MeasState.stage = 1;
+ }
+ else if(MLT_TC_RUN_COUNT == 1)
+ {
+ MLT_TC_T1 = 4;
+ MLT_TC_T2 = 8;
+ MLT_TC_T3 = 14;
+
+ MLT_TC_USE_V1_V2_ONLY = 1;
+ pState->MeasState.stage =1;
+ }
+ else /* Can't reduce any further, assume 0nF */
+ {
+ MLT_TC_CTR = 0;
+ pState->MeasState.stage = 20;
+ }
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ }
+ /*
+ ** Differing slopes - indicates inductor present.
+ ** Use V2 and V3 to compute result since V1 is
+ ** likely measured during the transient
+ */
+ else if(MLT_TC_TEST_SLOPE_ERR)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : MLT_TC_TEST_SLOPE_ERR\n");
+ MLT_TC_USE_V2_V3_ONLY = 1;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage++;
+ }
+ /*
+ ** V1 out of range, but V3 OK - double current
+ */
+ else if(MLT_TC_TEST_V1_HIGH_V3_OK)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : MLT_TC_TEST_V1_HIGH_V3_OK\n");
+ MLT_TC_ISRC *= 2;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** For 500uA case, if V3 > 20v, bump up
+ ** current to 700uA to improve accuracy
+ */
+ else if(MLT_TC_TEST_LOW_I_V3_MID)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : MLT_TC_TEST_LOW_I_V3_MID\n");
+ MLT_TC_ISRC = 700;
+ pState->TimeConstState.stage = 0;
+ pState->TimeConstState.waitIterations = 0;
+ pState->MeasState.stage = 1;
+ }
+ /*
+ ** Initial measurement in range
+ */
+ else
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : STATE : NO_CHANGE\n");
+ pState->MeasState.stage++;
+ }
+ MLT_TC_RUN_COUNT++;
+
+ /* Limit number of iterations */
+ if(MLT_TC_RUN_COUNT > MLT_TC_MAX_RUNS)
+ {
+ pState->MeasState.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ MLT_TC_MEAS_CHG_PHASE = 1;
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Optional up/down measurement */
+ if(!MLT_TC_MEAS_CHG_PHASE)
+ {
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ if(measureTimeConstant(pProSLICMLT,&(pProSLICMLT->capFaults),&(pState->TimeConstState)))
+ {
+ pState->MeasState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ if((MLT_TC_USE_V1_V2_ONLY)&&(MLT_TC_DISCHG_CTR1 < 300))
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : METHOD_V1_V2 : DISCHG_CTR1_ONLY\n");
+ MLT_TC_CTR = MLT_TC_DISCHG_CTR1;
+ }
+ else if((MLT_TC_USE_V1_V2_ONLY)&&(MLT_TC_DISCHG_CTR1 >= 300))
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : METHOD_V1_V2 : CTR1_AVG\n");
+ MLT_TC_CTR = (3L*MLT_TC_DISCHG_CTR1+MLT_TC_CHG_CTR1)/4L;
+ }
+ else if(MLT_TC_USE_V2_V3_ONLY)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : METHOD_V2_V3 : DISCHG_CTR2_ONLY\n");
+ MLT_TC_CTR = MLT_TC_DISCHG_CTR2;
+ }
+ else
+ {
+ /* Don't average large C's where offset current has little effect */
+ if(MLT_TC_DISCHG_CTR1 > 10000)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : METHOD_ALL : DISCHG_CTR1_CTR2_AVG\n");
+ MLT_TC_CTR = (MLT_TC_DISCHG_CTR1 + MLT_TC_DISCHG_CTR2)/2;
+ }
+ else
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : estimateCtr : METHOD_ALL : CTR1_AVG\n");
+ MLT_TC_CTR = (3L*MLT_TC_DISCHG_CTR1+MLT_TC_CHG_CTR1)/4L;
+ }
+ }
+
+ /* Compensate for EMI and linefeed capacitance */
+ MLT_TC_CTR -= (mlt_emi_cap + (mlt_line_cap/2))/10;
+ MLT_DEBUG_LOG("estimateCtr : Final Cavg = %d nF\n", MLT_TC_CTR);
+ pState->MeasState.stage = 20;
+ return RC_MLT_TEST_RUNNING;
+
+ case 20:
+ gndOpenTerm(pProSLICMLT->pProslic,FALSE);
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+
+/********************************************************************************/
+/**
+** @brief Measure REN using subthreshold ringing method
+**
+** @param[in,out] *pProSLICMLT - Pointer to MLT channel structure. Ouput is located under pProSLICMLT->ren.renValue
+** @param[in] *pState - pointer to test state structure
+**
+** @retval typical values: @ref RC_MLT_TEST_RUNNING or @ref RC_MLT_TEST_COMPLETE are normal values returned. @sa MLT_RETURN_CODES for other possible values.
+**
+**
+** @remark
+** - This function is reentrant and should be called at periodic intervals defined by mlt_poll_rate
+** - USER MODE status is not modified in this function
+** - Uses 16vrms 20Hz ring signal and fits ringing current to calibrated curve to determine REN
+**
+*/
+static int32 si3226x_mlt_ren_subthresh_ring_method(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_ren_state *pState)
+{
+/* in this test we ring the phone at 16Vrms with 18Vdc.
+* We measure the loop current and interpolate the REN value
+* Loop current is AC component only and is rectified and averaged.
+*/
+uInt8 regData,irq2Reg,irq3Reg;
+int32 temp;
+int32 Ren;
+#ifdef MLT_REN_TEST_FREQ
+int test_freq = MLT_REN_TEST_FREQ;
+#endif
+int i;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+switch (pState->State.stage){
+ case 0:
+ si3226x_preserve_state(pProSLICMLT);
+ Si3226x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ setupDcFeedForRENTest(pProSLICMLT); /*set up low V_VLIM so we are guaranteed to start ringing*/
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE); /*go forward active to charge the line to V_VLIM*/
+ pState->State.sampleIterations=0;
+ pState->State.waitIterations=0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ delay_poll(&(pState->State),200/mlt_poll_rate - 2 ); /*wait 5 tau*/
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,0xFFFFFFFL);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VBATR_EXPECT,0x3f00000L); /*vbatr_expect ~= 60*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_AUTO,0x2e); /*disable battery tracking*/
+
+#ifdef MLT_REN_TEST_FREQ
+ if(test_freq == 16)
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7F5A800L); /*16Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x72000L); /*16Vrms*/
+ }
+ else
+ {
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7efe000L); /*20Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x92000L); /*16Vrms*/
+ }
+#else
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0x7efe000L); /*20Hz*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0x92000L); /*16Vrms*/
+#endif
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x1CF4B64L);/*18Vdc */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_DCDC_RNGTYPE,0);/* Fixed VBAT rail to fix distorting at GND issue */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGPHAS,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RTPER,0x50000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VOV_RING_GND,0x51EB80L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VCM_RING,0x1680000L);/*set vcm_ring so we dont clip*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_RINGCON,0);/*disable timers*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_COUNTER_VTR_VAL,0x51EB8L);/*couter_vtr-val*/
+ temp = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);/*clear power alarm and ringtrip interrupts*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3,(uInt8)temp); /*required for GCI to clear*/
+ temp = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2);/*clear*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2,(uInt8)temp);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN3,0x3);/* P_THERM_IE, P_HVIC_IE */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN2,0x1);/* RTP_IE */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_RINGING);/*start ringing*/
+ pState->max=0;
+ pState->State.stage++;
+
+ return RC_MLT_TEST_RUNNING;
+
+ case 3:
+ delay_poll(&(pState->State),250/mlt_poll_rate - 2);/*wait one ringing cycle to make sure ringing has started*/
+ return RC_MLT_TEST_RUNNING;
+
+ case 4:
+ regData=pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED);/*check we made it to ringing state*/
+ if (regData != 0x44) /* Ringing failed to start/persist */
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Linefeed = 0x%0X\n", regData);
+ /* Check interrupts */
+ irq2Reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ2);
+ irq3Reg = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ /* Restore entry state and force failing value */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ si3226x_restore_state(pProSLICMLT);
+ pProSLICMLT->ren.renValue = 999999L;
+ /* Check for ringtrip */
+ if( irq2Reg & 0x01 )
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Ringtrip on Ring Start\n");
+ return RC_MLT_FALSE_RINGTRIP;
+ }
+
+ /* Check for power alarm */
+ if (irq3Reg & 0x03)
+ {
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Power/Thermal Alarm on Ring Start\n");
+ return RC_MLT_ALARM_ON_RING;
+ }
+
+ /* If not false ringtrip or alarm, return unknown err */
+ MLT_DEBUG_LOG("ProSLIC MLT : REN : Ring Start Failed\n");
+ return RC_MLT_RINGSTART_ERR;
+ }
+
+ temp = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_MADC_ILOOP);
+
+ if (temp&0x10000000L)
+ temp |= 0xf0000000L; /*sign extend negative value*/
+ pState->v[pState->State.sampleIterations++] = temp; /*store sample*/
+ MLT_DEBUG_LOG("sample %d\tIloop = %d\n",pState->State.sampleIterations,(temp/10));
+
+ if (pState->State.sampleIterations == (MLT_REN_SAMPLE_TIME/mlt_poll_rate))
+ { /*we are done collecting samples - calculate*/
+
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE);/* ACTIVE before OPEN */
+ temp=0;
+
+ /*calculate dc value */
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ temp += pState->v[i];
+ }
+ temp /= MLT_REN_SAMPLE_TIME/mlt_poll_rate;
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ pState->v[i] -= temp; /*remove dc*/
+ }
+ temp =0;
+
+ /*calculate avg current*/
+ for (i=0;i<MLT_REN_SAMPLE_TIME/mlt_poll_rate;i++){
+ if (pState->v[i] < 0) /*recitfy the signal*/
+ pState->v[i] *= -1;
+ temp += pState->v[i]/10;
+ }
+ temp /= MLT_REN_SAMPLE_TIME/mlt_poll_rate;
+ MLT_DEBUG_LOG ("I Avg = %d\n",temp);
+ pState->max = temp;
+
+ /*we are cal'ing test - return raw value*/
+ if (pProSLICMLT->ren.renCalFlag){
+ pState->State.stage++;
+ pProSLICMLT->ren.renValue = pState->max;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*interpolate from cal values*/
+ if(pState->max > pProSLICMLT->ren.calData.renTrans)
+ Ren = ((pState->max - pProSLICMLT->ren.calData.highRenOffs)*1000)/pProSLICMLT->ren.calData.highRenSlope;
+ else
+ Ren = ((pState->max - pProSLICMLT->ren.calData.lowRenOffs)*1000)/pProSLICMLT->ren.calData.lowRenSlope;
+ if (Ren < 900)
+ Ren = ((pState->max - pProSLICMLT->ren.calData.extraLowRenOffset)*1000)/pProSLICMLT->ren.calData.extraLowRenSlope;
+
+ if (Ren < 0)
+ Ren = 0;
+ pProSLICMLT->ren.renValue = Ren;
+
+ MLT_DEBUG_LOG ("REN RAW = %d\n",Ren);
+
+ pState->State.stage++;
+
+ return RC_MLT_TEST_RUNNING;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* wait 1 ring period for ring exit */
+ delay_poll(&(pState->State),50/mlt_poll_rate - 2 );
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN);
+ si3226x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+/**@}*/
+/* end of SI3226X_DRV_STATIC */
+
+/*
+** Function: si3226x_mlt_abort - documented in si3226x_mlt.h
+*/
+int si3226x_mlt_abort(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_test_state *pState)
+{
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->stage)
+ {
+ case 0:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED, LF_OPEN);
+ pState->stage++;
+ return 0;
+ case 1:
+ delay_poll(pState,50/mlt_poll_rate -2 );
+ return 0;
+ case 2:
+ si3226x_restore_state(pProSLICMLT);
+ pState->stage++;
+ return 1;
+ }
+ return 1;
+}
+
+
+
+/*
+** Function: si3226x_mlt_foreign_voltages - documented in si3226x_mlt.h
+*/
+int si3226x_mlt_foreign_voltages(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_foreign_voltages_state *pState){
+ int i;
+ int32 data;
+ int32 tmp;
+ int32 vtsqrt, vrsqrt, vtrsqrt;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant block */
+ switch (pState->State.stage){
+
+ case 0: /* Enable user mode, store entry settings, and initialize state structure */
+ si3226x_preserve_state(pProSLICMLT);
+ Si3226x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ if(pState->samples > MLT_MAX_FEMF_SAMPLES)
+ pState->samples = MLT_MAX_FEMF_SAMPLES;
+ pState->State.waitIterations=0;
+ pState->State.sampleIterations=0;
+ pState->State.stage++;
+ setupDcFeedCloseToZero (pProSLICMLT);
+ Si3226x_SetLinefeedStatus(pProSLICMLT->pProslic, 1);
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* Settle */
+ delay_poll(&(pState->State),MLT_TS_HAZV_LINE_DISCHARGE/(mlt_poll_rate) - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Go Open for Hi-Z measurement */
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_OPEN); /*disconnect from line*/
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Setup coarse sensors, enable diag, select VTIPC */
+ setupCoarseSensors(pProSLICMLT, &(pState->tipOffs), &(pState->ringOffs));
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VTIPC, MADC_HIRES);
+ diagSet(pProSLICMLT->pProslic, DIAG_ENABLE);
+
+ MLT_DEBUG_LOG ("OFFSET (vtipc) = %d mV\n",pState->tipOffs);
+
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Read VTIPC samples, remove offset on each sample */
+ tmp = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - MLT_CONST_COARSE_SENSE_VOFFS;
+ pState->vt[pState->State.sampleIterations] = tmp - pState->tipOffs;
+ pState->State.sampleIterations++;
+ if (pState->State.sampleIterations == pState->samples)
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Reset sample counter, select VRINGC */
+ pState->State.sampleIterations=0;
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ diagSelect(pProSLICMLT->pProslic, DIAG_SEL_VRINGC, MADC_HIRES);
+ diagSet(pProSLICMLT->pProslic, DIAG_ENABLE);
+
+ MLT_DEBUG_LOG ("OFFSET (vringc) = %d mV\n",pState->ringOffs);
+
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 6: /* Read VRINGC samples, remove offset on each sample */
+ tmp = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_MADC_DIAG_RAW,0) - MLT_CONST_COARSE_SENSE_VOFFS;
+ pState->vr[pState->State.sampleIterations] = tmp - pState->ringOffs;
+ pState->State.sampleIterations++;
+ if (pState->State.sampleIterations == pState->samples) {
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pState->State.stage++;
+ #else
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pState->State.stage = 9;
+ #endif
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 7: /* Differential AC Measurement - Normal Res */
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pState->State.waitIterations = 0;
+ pState->State.sampleIterations = 0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Read coarse VTR samples */
+ pState->vtr[pState->State.sampleIterations] = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_COARSE,0);
+ pState->State.sampleIterations++;
+ if(pState->State.sampleIterations == pState->samples) {
+ pState->State.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9: /* Cleanup */
+ si3226x_restore_state(pProSLICMLT);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /*
+ ** Calculate DC Voltages
+ */
+
+ pProSLICMLT->hazVDC.measTG = 0;
+ pProSLICMLT->hazVDC.measRG = 0;
+ pProSLICMLT->hazVDC.measTR = 0;
+ pProSLICMLT->hazVDC.measAUX = 0;
+
+ for (i = 0; i < pState->samples; i++)
+ {
+ pProSLICMLT->hazVDC.measTG += pState->vt[i];
+ pProSLICMLT->hazVDC.measRG += pState->vr[i];
+ pProSLICMLT->hazVDC.measAUX += pState->vtr[i];
+ }
+ pProSLICMLT->hazVDC.measTG /= pState->samples;
+ pProSLICMLT->hazVDC.measRG /= pState->samples;
+ pProSLICMLT->hazVDC.measAUX /= pState->samples;
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVDC.measTR = pProSLICMLT->hazVDC.measTG - pProSLICMLT->hazVDC.measRG;
+ #endif
+
+ /*
+ ** Calculate AC Voltages ( units of 100&Vrms^2 )
+ */
+ for (i = 0; i < pState->samples; i++)
+ {
+ pState->vt[i] -= pProSLICMLT->hazVDC.measTG;
+ pState->vr[i] -= pProSLICMLT->hazVDC.measRG;
+ pState->vtr[i] -= pProSLICMLT->hazVDC.measAUX;
+ }
+
+ pProSLICMLT->hazVAC.measTG = 0;
+ pProSLICMLT->hazVAC.measRG = 0;
+ pProSLICMLT->hazVAC.measTR = 0;
+
+ for (i = 0; i < pState->samples; i++)
+ {
+ pProSLICMLT->hazVAC.measTG += (pState->vt[i] / 100) * (pState->vt[i] / 100);
+ pProSLICMLT->hazVAC.measRG += (pState->vr[i] / 100) * (pState->vr[i] / 100);
+ #ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVAC.measTR += (pState->vtr[i] / 100) * (pState->vtr[i] / 100);
+ #endif
+ }
+
+ pProSLICMLT->hazVAC.measTG /= pState->samples;
+ pProSLICMLT->hazVAC.measRG /= pState->samples;
+
+ /* Skip rest if VTR measurement disabled */
+#ifdef MLT_HAZV_VTR_ENABLED
+ pProSLICMLT->hazVAC.measTR /= pState->samples;
+
+ /* Below 10v, trAC may not be very accurate due to having to use normal madc mode */
+ /* If trAC is < 10v, check to see if tgAC + rgAC is within 25% of trAC. If so, it */
+ /* likely that Vtg and Vrg are out of phase and Vtr may be calculated as Vtg+Vrg */
+ /* If the sum is not within 25% of trAC, do not modify trAC because voltage on */
+ /* tg and rg must be common mode. */
+
+ vtsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measTG);
+ vrsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measRG);
+ vtrsqrt = 10 * Isqrt(pProSLICMLT->hazVAC.measTR);
+
+ /* Calculate error between sum of longitudinal voltages and measured differential */
+ if (vtrsqrt > 0)
+ {
+ data = 100 * fp_abs((vtsqrt + vrsqrt) - vtrsqrt);
+ data /= vtrsqrt;
+ } else
+ data = 100;
+
+ if (data < 0)
+ data = -data;
+
+ MLT_DEBUG_LOG("si3226x_mlt: VtgSQ = %d\tVtg = %d\n", pProSLICMLT->hazVAC.measTG, vtsqrt);
+ MLT_DEBUG_LOG("si3226x_mlt: VrgSQ = %d\tVrg = %d\n", pProSLICMLT->hazVAC.measRG, vrsqrt);
+ MLT_DEBUG_LOG("si3226x_mlt: VtrSQ = %d\tVtr = %d\n", pProSLICMLT->hazVAC.measTR, vtrsqrt);
+
+
+ if (data < 25)
+ {
+ pProSLICMLT->hazVAC.measTR = vtsqrt + vrsqrt;
+ pProSLICMLT->hazVAC.measTR /= 10; /* prevent overflow */
+ pProSLICMLT->hazVAC.measTR *= pProSLICMLT->hazVAC.measTR;
+ }
+#endif
+
+ /*
+ ** Invert voltage polarity relative to GND
+ */
+ pProSLICMLT->hazVDC.measTR *= -1;
+ pProSLICMLT->hazVDC.measTG *= -1;
+ pProSLICMLT->hazVDC.measRG *= -1;
+ if (pProSLICMLT->hazVAC.measTG < 0)
+ pProSLICMLT->hazVAC.measTG *=-1;
+ if (pProSLICMLT->hazVAC.measRG < 0)
+ pProSLICMLT->hazVAC.measRG *=-1;
+
+ return RC_MLT_TEST_COMPLETE;
+}
+
+
+
+
+/*
+** Function: si3226x_mlt_hazard_voltages - documented in si3226x_mlt.h
+*/
+int si3226x_mlt_hazard_voltages(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_foreign_voltages_state *pState)
+{
+ return si3226x_mlt_foreign_voltages(pProSLICMLT,pState);
+}
+
+
+
+/*
+** Function: si3226x_mlt_resistive_faults - documented in si3226x_mlt.h
+*/
+int si3226x_mlt_resistive_faults(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_rmeas_state *pState)
+{
+ int32 vc2;
+ int32 data;
+ int alarm;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant block */
+ switch(pState->setupState.stage){
+
+ case 0: /* Setup diag current source for T-R dvdt measurement*/
+ si3226x_preserve_state(pProSLICMLT);
+
+ /* Diable Low Power Mode */
+ ProSLIC_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+
+ /* Set VBATH to 70v */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_VBATH_EXPECT,MLT_RES_VBATH_SET);
+
+ /* Initialize return values and methods */
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measAUX = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.ahsFlag = 0;
+ pProSLICMLT->resFaults.trFlag = 0;
+ pProSLICMLT->resFaults.rgFlag = 0;
+ pProSLICMLT->resFaults.tgFlag = 0;
+ pProSLICMLT->resFaults.auxFlag = 0;
+ pState->rtrMethod = RESFAULT_METHOD_UNDEFINED;
+ pState->rtgMethod = RESFAULT_METHOD_UNDEFINED;
+ pState->rrgMethod = RESFAULT_METHOD_UNDEFINED;
+
+ pState->smallRFlag=0;
+ pState->setupState.waitIterations=0;
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,MLT_MAX_I_THRESH);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LONGHITH,MLT_MAX_I_THRESH);
+ /* Go Active*/
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQEN3,0x1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_P_TH_HVIC, MLT_CONST_P_TH_HVIC );
+
+ /* Setup dc current source = 2V*0.31957mA/V = 639.14uA*/
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGAMP,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGFR,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_SLOPE_RING,0x1f000000L);/*set slope_ring*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x337A28L); /*2V*/
+ diagSet(pProSLICMLT->pProslic,DIAG_ENABLE|DIAG_DCLPF_44K|DIAG_FB_OFF);
+
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Wait*/
+ delay_poll(&(pState->setupState),400/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* Setup diag current source for V2 measurement (time constant)*/
+ pState->v1 = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_FILT,0);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_RINGOF,0x1FCC85D8L);
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* wait - fixed 20ms wait period */
+ delay_poll(&(pState->setupState),20/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 5: /* Measure T-R dV/dt to set auto-v step size and settle times */
+ vc2 = ReadMADCScaled(pProSLICMLT,MLT_COMM_RAM_VDIFF_FILT,0);
+ pState->dvdt_tr = fp_abs(pState->v1 - vc2);
+ pState->dvdt_tr /= 20L;
+
+ MLT_DEBUG_LOG("si3226x_mlt : resFaults : dV/dt est : %d v/s\n",pState->dvdt_tr);
+
+ diagSet(pProSLICMLT->pProslic,DIAG_ENABLE);
+ diagSet(pProSLICMLT->pProslic, DIAG_CLR_DIAG1);
+ /*check for small fault to ground - if it is present we probe further in individual tests.*/
+ setupDcFeed35VCM(pProSLICMLT);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_FWD_ACTIVE);
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ delay_poll(&(pState->setupState),250/mlt_poll_rate -2 );
+ return RC_MLT_TEST_RUNNING;
+
+ case 7:
+ /* Estimate range of fault by looking at current on TIP and RING.
+ ** If less than 10mA (large R) do auto-v method, otherwise,
+ ** use normal dc feed.
+ */
+ data = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ITIP,0);
+ if(data < -(10000L))
+ {
+ pState->smallRFlag = 1;
+ MLT_DEBUG_LOG("si3226x_mlt : resFaults : Small-R ITIP = %d uA : smallRFlag = %d\n",data,pState->smallRFlag);
+ }
+
+ data = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_IRING,0);
+ if (data < -(10000))
+ {
+ pState->smallRFlag |= 2;
+ MLT_DEBUG_LOG("si3226x_mlt : resFaults : Small-R IRING = %d uA : smallRFlag = %d\n",data,pState->smallRFlag);
+ }
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_LINEFEED,LF_OPEN);
+ pState->TRState.stage = 0;
+ pState->TGState.stage = 0;
+ pState->RGState.stage = 0;
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 8:
+ /* Skip T-R test if smallRFlag is set - must be TG or RG */
+ if(pState->smallRFlag) {
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_OPEN_RES;
+ return RC_MLT_TEST_RUNNING;
+ }
+#ifdef MLT_RES_RTR_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+
+ if(measRtr(pProSLICMLT,pState))
+ {
+ /* If small Rtr, skip all other tests */
+ if(pProSLICMLT->resFaults.trFlag == 1)
+ {
+ pState->setupState.stage = 11;
+ return RC_MLT_TEST_RUNNING;
+ }
+ pState->setupState.stage++; /* do auto-v method */
+ return RC_MLT_TEST_RUNNING;
+ }
+
+ /* If power alarm occurs (usually due to small Rrg) skip RTR */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm) {
+ MLT_DEBUG_LOG("si3226x_mlt : resfaults : Aborted RTR Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9:
+#ifdef MLT_RES_RRG_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+ if(measRrg(pProSLICMLT,pState)) {
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ /* If power alarm occurs (usually due to small Rrg) skip RTR */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : resFaults : Aborted RRG Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 10:
+#ifdef MLT_RES_RTG_DISABLE
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+#endif
+ if(measRtg(pProSLICMLT,pState)) {
+ pState->setupState.stage++;
+ return RC_MLT_TEST_RUNNING;
+ }
+ /* If power alarm occurs (usually due to small Rrg) skip RTR */
+ alarm = pProSLICMLT->ReadReg(pMLT_HW, pMLT_CHAN,MLT_COMM_REG_IRQ3);
+ if (alarm)
+ {
+ MLT_DEBUG_LOG("si3226x_mlt : resFaults : Aborted RTG Measurement : Alarm = %d",alarm);
+ pState->setupState.stage++;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 11:
+ si3226x_restore_state(pProSLICMLT);
+ /* post-measurement analysis */
+
+ /*
+ ** Post-measurement analysis
+ **
+ ** Keep measurement results for dominant (smallest) fault only,
+ ** which is applicable when supporting single-fault model.
+ **
+ ** Leave compile option to return raw values for user to post
+ ** process on their own if they wish to examine 2T values.
+ **
+ */
+ MLT_DEBUG_LOG("si3226x_mlt : resFaults : RTR Meas = %d\n", pProSLICMLT->resFaults.measTR);
+ MLT_DEBUG_LOG("si3226x_mlt : resFaults : RRG Meas = %d\n", pProSLICMLT->resFaults.measRG);
+ MLT_DEBUG_LOG("si3226x_mlt : resFaults : RTG Meas = %d\n", pProSLICMLT->resFaults.measTG);
+
+ /*
+ ** Cap each measurement at 2Mohm
+ */
+ if(pProSLICMLT->resFaults.measRG > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ if(pProSLICMLT->resFaults.measTG > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ if(pProSLICMLT->resFaults.measTR > MLT_CONST_MAX_RES) pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+
+ pState->fault_term = MLT_TERM_TR; /* Default to TR */
+ /*
+ ** Isolate single fault
+ */
+
+ /*
+ ** RG Check:
+ ** 1. RRG < 2Mohm
+ ** 2. RRG < RTR
+ ** 3. RRG+20% < RTG
+ */
+ if((pProSLICMLT->resFaults.measRG < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measRG < pProSLICMLT->resFaults.measTR)&&
+ (12L*pProSLICMLT->resFaults.measRG/pProSLICMLT->resFaults.measTG) < 10L)
+ {
+ pState->fault_term = MLT_TERM_RG;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TG Check:
+ ** 1. RTG < 2Mohm
+ ** 2. RTG < RTR
+ ** 3. RTG+20% < RRG
+ */
+ else if((pProSLICMLT->resFaults.measTG < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measTG < pProSLICMLT->resFaults.measTR)&&
+ (12L*pProSLICMLT->resFaults.measTG/pProSLICMLT->resFaults.measRG < 10L))
+ {
+ pState->fault_term = MLT_TERM_TG;
+ pProSLICMLT->resFaults.measTR = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TR Check:
+ ** 1. RTR < 2Mohm
+ ** 2. RTG & RRG within 20% of each other
+ ** Note: RTR may be less than RRG and/or RTG since their measurements
+ ** include RTR + small leakage of HVIC switch.
+ */
+ else if((pProSLICMLT->resFaults.measTR < MLT_CONST_MAX_RES)&&
+ (10L*pProSLICMLT->resFaults.measTG/pProSLICMLT->resFaults.measRG < 12L)&&
+ (10L*pProSLICMLT->resFaults.measRG/pProSLICMLT->resFaults.measTG < 12L))
+ {
+ pState->fault_term = MLT_TERM_TR;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ /*
+ ** TR Re-Check:
+ ** 1. RRG != RTG
+ ** 2. RTR < RRG
+ ** 3. RTR < RTG
+ **
+ ** In this case, the fault is from TR, but because of the OPEN lead
+ ** leakage compensation, small, but larger than RTR faults are detected
+ ** on RG and TG.
+ */
+ else if((pProSLICMLT->resFaults.measTR < MLT_CONST_MAX_RES)&&
+ (pProSLICMLT->resFaults.measTR < pProSLICMLT->resFaults.measRG)&&
+ (pProSLICMLT->resFaults.measTR < pProSLICMLT->resFaults.measTG))
+ {
+ pState->fault_term = MLT_TERM_TR;
+ pProSLICMLT->resFaults.measRG = MLT_CONST_MAX_RES;
+ pProSLICMLT->resFaults.measTG = MLT_CONST_MAX_RES;
+ }
+ return RC_MLT_TEST_COMPLETE;
+ break;
+
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/*
+** Function: si3226x_mlt_receiver_offhook - documented in si3226x_mlt.h
+*/
+int si3226x_mlt_receiver_offhook(ProSLICMLTType *pProSLICMLT, ProSLIC_mlt_roh_state *pState)
+{
+ ProslicRAMInit dcfeed7mA [] = {
+ {MLT_COMM_RAM_SLOPE_VLIM,0x1EB48978L},
+ {MLT_COMM_RAM_SLOPE_RFEED,0x1FDA6949L},
+ {MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L},
+ {MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL},
+ {MLT_COMM_RAM_SLOPE_DELTA1,0x1907F1D3L},
+ {MLT_COMM_RAM_SLOPE_DELTA2,0x1AD45894L},
+ {MLT_COMM_RAM_V_VLIM,0x5A38633L},
+ {MLT_COMM_RAM_V_RFEED,0x55B5917L},
+ {MLT_COMM_RAM_V_ILIM,0x3E67006L},
+ {MLT_COMM_RAM_CONST_RFEED,0x526775L},
+ {MLT_COMM_RAM_CONST_ILIM,0x209246L},
+ {MLT_COMM_RAM_I_VLIM,0x2D8D96L},
+ {0xFFFF, 0xFFFFFFFFL} /*end flag*/
+ };
+ ProslicRAMInit dcfeed14mA [] = {
+ {MLT_COMM_RAM_SLOPE_VLIM,0x1B9C5AA7L},
+ {MLT_COMM_RAM_SLOPE_RFEED,0x1FC0DB63L},
+ {MLT_COMM_RAM_SLOPE_ILIM,0x40A0E0L},
+ {MLT_COMM_RAM_SLOPE_RING,0x1CFCA14CL},
+ {MLT_COMM_RAM_SLOPE_DELTA1,0x1E119F8AL},
+ {MLT_COMM_RAM_SLOPE_DELTA2,0x1E46C831L},
+ {MLT_COMM_RAM_V_VLIM,0x5A38633L},
+ {MLT_COMM_RAM_V_RFEED,0x55B5917L},
+ {MLT_COMM_RAM_V_ILIM,0x3E67006L},
+ {MLT_COMM_RAM_CONST_RFEED,0x7F6F07L},
+ {MLT_COMM_RAM_CONST_ILIM,0x41248DL},
+ {MLT_COMM_RAM_I_VLIM,0x2D8D96L},
+ {0xFFFF, 0xFFFFFFFFL} /*end flag*/
+ };
+ ProslicRegInit empty [] = {
+ {0xFF,0xFF} /*end flag*/
+ };
+
+ int32 iloop;
+ int32 vdiff;
+ int32 zDiff;
+ int32 zDiffLimit = MLT_ROH_MAX_ZDIFF;
+ int32 zDiffREN = MLT_ROH_MIN_ZDIFF_REN;
+ int32 RmaxTR = MLT_ROH_MAX_ZTR;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ /* Start of reentrant loop */
+ switch (pState->State.stage){
+
+ case 0: /* Store entry conditions, setup DC feed for 7mA source, go active */
+ si3226x_preserve_state(pProSLICMLT);
+ Si3226x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN,MLT_COMM_RAM_LCROFFHK,0xFFFFFFFL);/*max out threshold*/
+ pState->State.waitIterations=0;
+ pState->State.sampleIterations=0;
+ ProSLIC_LoadRegTables(&(pProSLICMLT->pProslic),dcfeed7mA,empty,1);
+ ProSLIC_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* settle */
+ delay_poll(&(pState->State),MLT_TS_ROH_MEAS1/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2: /* Measure I & V, calc first Ztr, setup 14mA source */
+ iloop = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+ if (iloop > MLT_ROH_MIN_ILOOP)
+ pState->Rv1 = ((vdiff*1000) / iloop)*100;
+ else
+ pState->Rv1 = 1000000000;
+ if (vdiff < MLT_ROH_MIN_VLOOP)
+ pState->Rv1 = 1; /* call it a short */
+ ProSLIC_LoadRegTables(&(pProSLICMLT->pProslic),dcfeed14mA,empty,1);
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* settle */
+ delay_poll(&(pState->State),MLT_TS_ROH_MEAS2/mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Measure I & V, calc second Ztr, computations */
+ iloop = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_MADC_ILOOP, 0);
+ vdiff = ReadMADCScaled(pProSLICMLT, MLT_COMM_RAM_VDIFF_FILT, 0);
+ if (iloop > MLT_ROH_MIN_ILOOP)
+ pState->Rv2 = ((vdiff*1000) / iloop)*100;
+ else
+ pState->Rv2 = 1000000000;
+ if (vdiff < MLT_ROH_MIN_VLOOP)
+ pState->Rv2 = 1; /* call it a short */
+
+ MLT_DEBUG_LOG("Rv1 = %d\nRv2 = %d\n",pState->Rv1,pState->Rv2);
+
+ /* If both impedances are high, no fault or offhook cpe device */
+ if ((pState->Rv1 == 1000000000) && (pState->Rv2 == 1000000000)) {
+ pProSLICMLT->roh.rohTrue = 0; /* no fault, roh passed */
+ }
+ else {
+ zDiff = pState->Rv1-pState->Rv2;
+ zDiff = ((zDiff)*100)/pState->Rv1;
+ if (zDiff<0) zDiff*=-1;
+
+ MLT_DEBUG_LOG("zDiff = %d\n",zDiff);
+
+ /*Qualify resistance and resistance differences*/
+
+ if((pState->Rv1 == 1)&& (zDiff >= zDiffLimit)) { /* < 100ohms*/
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_RESFAULT;
+ }
+ else if((zDiff >= zDiffLimit)&&((pState->Rv1/100)<RmaxTR)&&((pState->Rv2/100)<RmaxTR)) {
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_ROH;
+ }
+ else {
+ if(((pState->Rv1/100 < 10000) || (pState->Rv2/100 < 10000)) && (zDiff < zDiffREN) )
+ pProSLICMLT->roh.rohTrue = RC_MLT_ROH_FAIL_RESFAULT;
+ else
+ pProSLICMLT->roh.rohTrue = 0;
+ }
+ }
+ si3226x_restore_state(pProSLICMLT);
+ pState->State.stage++;
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_COMPLETE;
+}
+
+/*
+** Function: si3226x_mlt_ren - documented in si3226x_mlt.h
+*/
+int si3226x_mlt_ren(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_state *pState){
+
+ return si3226x_mlt_ren_subthresh_ring_method (pProSLICMLT,pState);
+
+
+}
+
+/*
+** Function: si3226x_mlt_capacitance - documented in si3226x_mlt.h
+*/
+
+int si3226x_mlt_capacitance(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_capacitance_state *pState)
+{
+int32 trC, rgC, tgC;
+int32 iForcep = 5000;
+int32 iForcen = -5000;
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->State.stage)
+ {
+ case 0:
+ si3226x_preserve_state(pProSLICMLT); /*save register settings */
+ Si3226x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ setup300HzBandpass(pProSLICMLT);
+ pState->freq = 300;
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RA_EN_B, 0x300000L); /*ra_sum disconnect */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_COMP_Z, 0x0L); /*comp_z disable */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_EZSYNTH_B0, 0L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RXACGAIN, 0x2000000L);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_RXACGAIN_SAVE, 0x2000000L);
+
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIGCON, 0x1C); /*disable hyb */
+ /* Force on audio path */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_AUDIO_MAN, 0x300000L); /*force audio on */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_BIAS, 0x200000L); /*pd_bias */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_ADC, 0x200000L); /*pd_adc */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_DAC, 0x200000L); /*pd_dac */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_AC_SNS, 0x200000L); /*pd_ac_sns */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x10); /* */
+
+ MLT_DEBUG_LOG("si3226x_mlt : Capacitance : TIP-RING\n");
+
+ Si3226x_SetLinefeedStatus(pProSLICMLT->pProslic, LF_FWD_ACTIVE); /*enable line driver */
+ /* Setup diag current source */
+
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcep);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+
+ pState->State.stage++;
+ pState->State.waitIterations=0;
+ pState->MeasState.stage = 0;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1: /* bias settle */
+ delay_poll(&pState->State, 600 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_RA, 0); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_EZSYNTH_B0, 0L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_COMP_Z, 0L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_AUDIO_MAN, 0x300000L); /*force audio on */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_OSC1FREQ, 0x7C70000L); /* */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_OSC1AMP, 0x2A000L); /*force audio on */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 3: /* osc settle */
+ delay_poll(&pState->State, 600 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 4: /* Measure TIP-RING Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measTR = processTestavoForC(pProSLICMLT,pState,MLT_TERM_TR);
+
+ MLT_DEBUG_LOG("si3226x_mlt : Capacitance : tr_raw = %d.%d nF\n", pProSLICMLT->capFaults.measTR / 10, pProSLICMLT->capFaults.measTR % 10);
+
+
+ /* Setup for RING-GND Measurement */
+ pState->ram1447 = pProSLICMLT->ReadRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_TIP_OPEN); /* tip-open */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0x300000L); /*pd_cm */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*active delay*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447 | 0x2f000L);
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcep);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+ pState->State.stage++;
+ pState->MeasState.stage=0;
+
+ MLT_DEBUG_LOG("si3226x_mlt : Capacitance : RING-GND\n");
+
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 5:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 6:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+
+ return RC_MLT_TEST_RUNNING;
+ case 7:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 8: /* Measure RING-GND Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measRG = processTestavoForC(pProSLICMLT,pState,MLT_TERM_RG);
+
+ MLT_DEBUG_LOG("si3226x_mlt : Capacitance : rg_raw = %d.%d nF\n", pProSLICMLT->capFaults.measRG / 10, pProSLICMLT->capFaults.measRG % 10);
+
+ /* Setup for T-G Measurement */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_RING_OPEN);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0x300000L); /*pd_cm */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE_MAN, 0x10000000L);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*active delay*/
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447 | 0x82f000L);
+ setupDiagCurrentSource(pProSLICMLT->pProslic, iForcen);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0xB); /* */
+ pState->State.stage++;
+ pState->MeasState.stage=0;
+
+ MLT_DEBUG_LOG("si3226x_mlt : Capacitance : TIP-GND\n");
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 9:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 10:
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OMODE, 0x2); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x1); /* */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x1B); /* */
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 11:
+ delay_poll(&pState->State, 500 / mlt_poll_rate - 2);
+ return RC_MLT_TEST_RUNNING;
+
+ case 12: /* Measure TIP-GND Capacitance */
+ if(measCapacitanceAC(pProSLICMLT,pState))
+ {
+ pProSLICMLT->capFaults.measTG = processTestavoForC(pProSLICMLT,pState,MLT_TERM_TG);
+
+ MLT_DEBUG_LOG("si3226x_mlt : Capacitance : tg_raw = %d.%d nF\n", pProSLICMLT->capFaults.measTG / 10, pProSLICMLT->capFaults.measTG % 10);
+
+ /* Restore Settings */
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_HVIC_STATE, pState->ram1447);
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_DIAG1, 0x0); /*disable testfilter */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_OCON, 0x0); /*disable osc1 */
+ pProSLICMLT->WriteReg(pMLT_HW, pMLT_CHAN, MLT_COMM_REG_LINEFEED, LF_OPEN);
+ pProSLICMLT->WriteRAM(pMLT_HW, pMLT_CHAN, MLT_COMM_RAM_PD_CM, 0L); /*pd_cm */
+
+
+ /* Compute 3-terminal values */
+ if (pProSLICMLT->capFaults.measTR < 0) pProSLICMLT->capFaults.measTR = 0L;
+ if (pProSLICMLT->capFaults.measTG < 0) pProSLICMLT->capFaults.measTG = 0L;
+ if (pProSLICMLT->capFaults.measRG < 0) pProSLICMLT->capFaults.measRG = 0L;
+
+ #if (MLT_DISABLE_3TERM_CAP_COMPENSATION)
+ trC = pProSLICMLT->capFaults.measTR - (LINE_CAPACITANCE/2);
+ tgC = pProSLICMLT->capFaults.measTG - LINE_CAPACITANCE;
+ rgC = pProSLICMLT->capFaults.measRG - LINE_CAPACITANCE;
+ #else
+ /*three-terminal compensation */
+ trC = (-pProSLICMLT->capFaults.measTG / 2) - (pProSLICMLT->capFaults.measRG / 2) + 2 * pProSLICMLT->capFaults.measTR;
+ tgC = (3 * pProSLICMLT->capFaults.measTG) / 2 + pProSLICMLT->capFaults.measRG / 2 - 2 * pProSLICMLT->capFaults.measTR;
+ rgC = pProSLICMLT->capFaults.measTG / 2 + (3 * pProSLICMLT->capFaults.measRG) / 2 - 2 * pProSLICMLT->capFaults.measTR;
+ #endif
+ pProSLICMLT->capFaults.measTR = trC;
+ pProSLICMLT->capFaults.measRG = rgC;
+ pProSLICMLT->capFaults.measTG = tgC;
+
+ /*clip output values */
+ if (pProSLICMLT->capFaults.measTR < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measTR = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTR > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measTR = MLT_MAX_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTG < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measTG = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measTG > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measTG = MLT_MAX_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measRG < MLT_MIN_CAPACITANCE)
+ pProSLICMLT->capFaults.measRG = MLT_MIN_CAPACITANCE;
+ if (pProSLICMLT->capFaults.measRG > MLT_MAX_CAPACITANCE)
+ pProSLICMLT->capFaults.measRG = MLT_MAX_CAPACITANCE;
+
+ pState->State.stage = 70;
+
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 70:
+ si3226x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_RUNNING;
+}
+
+
+/*
+** Function: si3217x_mlt_cap_ren - documented in si3217x_mlt.h
+*/
+
+int si3226x_mlt_ren_cap(ProSLICMLTType *pProSLICMLT,ProSLIC_mlt_ren_cap_state *pState)
+{
+uInt16 mlt_poll_rate;
+#ifdef MLT_RUNTIME_CONFIG
+ mlt_poll_rate = pProSLICMLT->mlt_config.mlt_poll_rate;
+#else
+ mlt_poll_rate = MLT_POLL_RATE;
+#endif
+ switch (pState->State.stage)
+ {
+ case 0:
+ si3226x_preserve_state(pProSLICMLT);
+ Si3226x_SetPowersaveMode(pProSLICMLT->pProslic,PWRSAVE_DISABLE);
+ pState->MeasState.stage = 0;
+ pState->MeasState.waitIterations = 0;
+ pState->MeasState.sampleIterations = 0;
+ pState->State.stage++;
+ return RC_MLT_TEST_RUNNING;
+
+ case 1:
+ if(estimateCtr(pProSLICMLT,pState))
+ {
+ pState->State.stage++;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+ case 2:
+ si3226x_restore_state(pProSLICMLT);
+ return RC_MLT_TEST_COMPLETE;
+ }
+ return RC_MLT_TEST_RUNNING;
+
+}
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/usr_line.c b/ap/os/linux/linux-3.4.x/drivers/slic/usr_line.c
new file mode 100755
index 0000000..b45eb5c
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/usr_line.c
@@ -0,0 +1,2189 @@
+/*******************************************************************************
+* SUBSYSTEM£º User Line Driver
+* MOUDLE: USL
+* FILE NAME: usr_line.c
+* PURPOSE: To scan and control the user line(slic/daa).
+* Author: jiang.yuelong
+* Version£º 1.0
+* Date£º 24/12/2004
+*------------------------------------------------------------------------------
+* DEVELOPMENT HISTORY
+* Date Version Modifier Description of Mpdify
+* mm/dd/yyyy x.x X XX xxxxxxxxxxxxx
+*******************************************************************************/
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/signal.h>
+//#include <linux/smp_lock.h>
+#include <linux/fs.h>
+#include <asm/uaccess.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+#include <mach/gpio.h>
+#include <linux/irqreturn.h>
+#include <mach/pcu.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <linux/wakelock.h>
+#include <linux/soc/zte/pm/drv_idle.h>
+
+#include "usr_line.h"
+#include "si3217x_constants.h"
+//#include <linux/soc/zte/rpm/rpmsg.h>
+#include <mach/gpio_cfg.h>
+
+#include "i2s.h"
+
+/* ---- Public Variables ------------------------------------------------- */
+USL_PORT *pstUslPort = NULL; /* global USL_PORT pointer */
+u8 si_usl_debuglvl = 3; /* control whether to print message to serial port, init to enable printk */
+int dtmf_mute = 0;
+int slic_pcm_open = 0;
+struct spi_device *pslicSpi;
+static struct class *slic_dev_class;
+static struct device *slic_device;
+static int fskbuf_avail_flag = 0;
+/* ---- Private Variables ------------------------------------------------ */
+static u8 *pIoctlData = NULL; /* global pointer for ioctl parameters */
+
+static USL_MSG *msg_queue;
+static DECLARE_WAIT_QUEUE_HEAD(msg_wait_queue); /* for message report */
+
+static u8 timer_run = 1;
+static u8 scan_over = 0;
+static u8 self_test = 0;
+u8 slic_offhook = 0;
+
+u8 init_flg = 0;
+slic_state current_state = NONE;
+int irq_num = 0;
+
+#define MAX_INT_STRINGS 38
+#define FSK_DEPTH_TRIG 4
+#define SLIC_INT_GPIO ZX29_GPIO_53
+#define FNC_SLIC_INT_GPIO GPIO53_EXT_INT6
+#define SLIC_RST_GPIO ZX29_GPIO_122
+#define FNC_SLIC_RST_GPIO GPIO122_GPIO122
+static struct wake_lock slic_wakelock;
+
+static char *intMapStrings[] =
+{
+ "IRQ_OSC1_T1",
+ "IRQ_OSC1_T2",
+ "IRQ_OSC2_T1",
+ "IRQ_OSC2_T2",
+ "IRQ_RING_T1",
+ "IRQ_RING_T2",
+ "IRQ_PM_T1",
+ "IRQ_PM_T2",
+ "IRQ_FSKBUF_AVAIL", /**< FSK FIFO depth reached */
+ "IRQ_VBAT",
+ "IRQ_RING_TRIP", /**< Ring Trip detected */
+ "IRQ_LOOP_STATUS", /**< Loop Current changed */
+ "IRQ_LONG_STAT",
+ "IRQ_VOC_TRACK",
+ "IRQ_DTMF", /**< DTMF Detected - call @ref ProSLIC_DTMFReadDigit to decode the value */
+ "IRQ_INDIRECT", /**< Indirect/RAM access completed */
+ "IRQ_TXMDM",
+ "IRQ_RXMDM",
+ "IRQ_PQ1", /**< Power alarm 1 */
+ "IRQ_PQ2", /**< Power alarm 2 */
+ "IRQ_PQ3", /**< Power alarm 3 */
+ "IRQ_PQ4", /**< Power alarm 4 */
+ "IRQ_PQ5", /**< Power alarm 5 */
+ "IRQ_PQ6", /**< Power alarm 6 */
+ "IRQ_RING_FAIL",
+ "IRQ_CM_BAL",
+ "IRQ_USER_0",
+ "IRQ_USER_1",
+ "IRQ_USER_2",
+ "IRQ_USER_3",
+ "IRQ_USER_4",
+ "IRQ_USER_5",
+ "IRQ_USER_6",
+ "IRQ_USER_7",
+ "IRQ_DSP",
+ "IRQ_MADC_FS",
+ "IRQ_P_HVIC",
+ "IRQ_P_THERM", /**< Thermal alarm */
+ "IRQ_P_OFFLD"
+};
+
+
+/*--------extern variables---------------------------------------------*/
+
+
+/* ---- Public functions ------------------------------------------------- */
+
+
+/* ---- Private functions ------------------------------------------------ */
+static s8 SlicMallocMemory(void); /* */
+static void SlicFreeMemory(void); /* */
+static void zx29_i2s_tdm_pin_cfg(void);
+
+//volatile static T_ZDrvRpMsg_Msg icp_pMsg;
+volatile static int rpMsgBuf[8] = {1,2};
+
+
+/*--------extern functions---------------------------------------------*/
+
+
+
+
+
+/*---------------------func define--------------------------------*/
+
+/*
+*****************************************************************************
+** FUNCTION: SlicMallocMemory
+**
+** PURPOSE: request memory for global variables pstUslPort and pIoctlData,
+** used in si_usrline_init only
+**
+** PARAMETERS: none
+**
+** RETURNS: 0 on success, else -1
+**
+*****************************************************************************
+*/
+static s8 SlicMallocMemory(void)
+{
+ /* USL_PORT used */
+ pstUslPort = (USL_PORT *)kmalloc(sizeof(USL_PORT)*MAX_PORT_NUM, GFP_KERNEL);
+
+ if (NULL != pstUslPort)
+ {
+ memset(pstUslPort, 0, sizeof(USL_PORT)*MAX_PORT_NUM);
+ }
+ else
+ {
+ return -1;
+ }
+
+ /* ioctl used */
+ pIoctlData = (u8 *)kmalloc(512, GFP_KERNEL);
+
+ if (NULL != pIoctlData)
+ {
+ memset(pIoctlData, 0, 512);
+ }
+ else
+ {
+ kfree(pstUslPort);
+ return -1;
+ }
+
+ return 0;
+}
+
+/*
+*****************************************************************************
+** FUNCTION: SlicFreeMemory
+**
+** PURPOSE: free memory requested by SlicMallocMemory
+**
+** PARAMETERS: none
+**
+** RETURNS: none
+**
+*****************************************************************************
+*/
+static void SlicFreeMemory(void)
+{
+ if (NULL != pstUslPort)
+ {
+ kfree(pstUslPort);
+ }
+ pstUslPort = NULL;
+
+ if (NULL != pIoctlData)
+ {
+ kfree(pIoctlData);
+ }
+ pIoctlData = NULL;
+
+ if (NULL != msg_queue )
+ {
+ kfree(msg_queue);
+ }
+ msg_queue = NULL ;
+
+ return;
+}
+
+void CreatMsgQueue(void)
+{
+ msg_queue = kzalloc(sizeof(USL_MSG),GFP_KERNEL);
+}
+
+bool QueueEmpty(void)
+{
+ return msg_queue->tail == msg_queue->head;
+}
+
+bool QueueFull(void)
+{
+ return (msg_queue->tail + 1)%MSGMAX == msg_queue->head;
+}
+
+s8 usrline_report(const u16 port, const u8 event, const u32 payload,u16 mask)
+{
+ USLPUT1("->%s: port %d, ev %d, pay %d, mask %x.\n", __FUNCTION__, port, event, payload, mask );
+ if( GET_EV_MASK(event) & mask ) {
+ USLPUT1("ev %x, ~mask%x\n", GET_EV_MASK(event), mask );
+ return 0;
+ }
+ if (QueueFull())
+ {
+ USLPUT0(" usrline_report msgqueue full!!( event=%d,port=%d,payload=%d). \n", event, port, payload);
+ return -1;
+ }
+ /* add to queue tail */
+ //msg_queue->data[msg_queue->tail].port = port;
+ msg_queue->data[msg_queue->tail].msgid = event;
+ msg_queue->data[msg_queue->tail].payload = payload;
+ msg_queue->tail = (msg_queue->tail + 1)%MSGMAX;
+ /* wake up messages wait queue*/
+ wake_up_interruptible(&msg_wait_queue);
+ USLPUT1("\nevent:%d port:%d payload:0x%x\n", event, port, payload);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_msg_rev(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ printk("howard usrline_ioctl_msg_rev\n");
+ if (NULL == pstCmd)
+ {
+ USLPUT0("%s pstCmd NULL\n",__FUNCTION__);
+ return SLC_FAIL;
+ }
+
+ if (QueueEmpty()) /* no message. sleep */
+ {
+ interruptible_sleep_on(&msg_wait_queue);
+ }
+
+ while (self_test)
+ {
+ sleep_on_timeout(&msg_wait_queue, 10);
+ }
+
+ if (copy_to_user(pstCmd->data, &msg_queue->data[msg_queue->head], sizeof(MSG_DATA)) != 0)
+ {
+ USLPUT0("%s copy data to user fail!\n",__FUNCTION__);
+ }
+ msg_queue->head = (msg_queue->head + 1)%MSGMAX;
+
+ return SLC_SUCCESS;
+}
+
+
+static s8 usrline_ioctl_msg_clear(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL != msg_queue)
+ {
+ memset(msg_queue,0,sizeof(USL_MSG));
+ }
+
+ return SLC_SUCCESS;
+}
+
+s8 usrline_port_register( const u16 port, const u8 type,
+ CODEC_OPS *ops, Port_t *pchip)
+{
+
+ USL_PORT *ptr;
+
+ if (NULL == pstUslPort)
+ {
+ USLPUT0("usrline_port_register pstUslPort NULL!\n");
+ return -1;
+ }
+
+ if (port >= MAX_PORT_NUM)
+ {
+ USLPUT0("usrline_port_register port %d illegal\n", port);
+ return -1;
+ }
+
+ if ((NULL == ops) || (NULL == pchip))
+ {
+ USLPUT0("usrline_port_register input pointer NULL!\n");
+ return -1;
+ }
+
+ ptr = (USL_PORT *)&pstUslPort[port];
+
+ if (NULL == ptr)
+ {
+ USLPUT0("usrline_port_register get port Para NULL!\n");
+ return -1;
+ }
+
+ ptr->port = port;
+ ptr->port_type = type;
+ ptr->codec_ops = ops;
+
+ ptr->pLine = pchip;
+ ptr->event_mask = 0;
+ ptr->signal_flag = SIGNAL_PLAY_STOP;
+ ptr->signal_on = RING_SIGNAL_OFF;
+
+ /*added for ring queue*/
+ ptr->stRingQuenePara.dwRingStop = 0;
+ ptr->stRingQuenePara.dwNeedSort = 0;
+ ptr->stRingQuenePara.dwOffCountStart = 0;
+ ptr->stRingQuenePara.dwOffCount = 0;
+ ptr->stRingQuenePara.dwOffMaxCount = 0;
+ ptr->stRingQuenePara.RingQueneDelay = 10;
+
+ ptr->dwIsRevPol = 0;
+
+ ptr->dwInitOK = LINE_INITOK;
+ ptr->flag = LINE_ENABLE;
+
+ return 0;
+}
+
+static void uslput_sig(const SIGNAL_DATA *sig)
+{
+ USLPUT3("signal_type:%d cid:%s tone_type:%d\n",
+ sig->signal_type,sig->cid,sig->tone_type);
+}
+
+/* ================================================================== */
+static s8 usrline_ioctl_Inf_precfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == pstCmd)
+ {
+ USLPUT0("%s pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+
+ slic_inf_precfg((SLCINF_CFG *)pIoctlData);
+
+ return 0;
+}
+
+static unsigned char checkBufSum(char *str, int nLen)
+{
+ int i=0;
+ uInt8 sum = 0;
+ for(i=0; i<nLen; i++)
+ {
+ sum += str[i];
+ LOGPRINT ("\nsum=%02X", sum);
+ }
+
+ return -sum;
+}
+
+static int WaitOnFSKBuffer (proslicChanType *pProslic){
+ uInt8 avail;
+ uInt32 i=0;
+ uInt8 hook_status = 0;
+ ProSLIC_ReadHookStatus(pProslic,&hook_status);
+ if(hook_status == PROSLIC_OFFHOOK)
+ {
+ ProSLIC_DisableCID(pProslic);
+ return -1;
+ }
+ do {
+ if (fskbuf_avail_flag == 1)
+ break;
+ ProSLIC_CheckCIDBuffer(pProslic,&avail);
+ i++;
+ }
+ while ((avail == 0)&& (i<20000));
+ fskbuf_avail_flag = 0;
+ if(i>=20000)
+ {
+ printk("\nWaitOnFSKBuffer Time = %d", i);
+ }
+ //return 0;
+}
+
+static int DoOnHookCallerIDEx (proslicChanType *pProslic, int8 *BufTel, int8 *BufTxt)
+{ //SI324X/26 example code--------
+ char sTime[] = "01020304";
+ unsigned char preamble[] ={'U','U','U','U','U','U','U','U'};
+ int i;uInt8 data;
+ int j;
+ unsigned char TxBuf[256];
+ unsigned char *pTxBuf=TxBuf;
+ int nTxLen;
+ int nNumLen = strlen(BufTel);
+ int nTxtLen = strlen(BufTxt);
+ uInt8 hook_status = 0;
+ // Êý¾Ý×é°ü
+ *pTxBuf++ = 0x80; //msg type: ¸´ºÏÊý¾Ý¸ñʽ
+ if(1)
+ {
+ if(nNumLen==0)
+ {
+ *pTxBuf++ = (2+8)+(2+nTxtLen); //msg length
+ }
+ else if(nTxtLen==0)
+ {
+ *pTxBuf++ = (2+8)+(2+nNumLen); //msg length
+ }
+ else
+ {
+ *pTxBuf++ = (2+8)+(2+nNumLen)+(2+nTxtLen); //msg length
+ }
+ *pTxBuf++ = 0x01;//²ÎÊýÀàÐÍ £ºÈÕÆÚʱ¼ä
+ *pTxBuf++ = 0x08;//ʱ¼ä³¤¶È
+ for(i=0; i<8; i++)
+ {
+ *pTxBuf++ = sTime[i];
+ }
+ }
+ else
+ {
+ //MSG_FATAL("-zja--Don't SENDING current_time",0,0,0);
+ *pTxBuf++ = (2+nNumLen)+(2+nTxtLen); //msg length
+ }
+ if(nNumLen!=0)
+ {
+ *pTxBuf++ =0x02; //²ÎÊýÀàÐÍ £ºµç»°ºÅÂë
+ *pTxBuf++ =nNumLen; //²ÎÊý³¤¶È
+ memcpy(pTxBuf, BufTel, nNumLen);
+ pTxBuf += nNumLen;
+ }
+ if(nTxtLen!=0)
+ {
+ *pTxBuf++=0x07; //²ÎÊýÀàÐÍ £ºÖ÷½ÐÐÅÏ¢
+ *pTxBuf++=nTxtLen; //²ÎÊýÀàÐÍ £ºµç»°ºÅÂë
+ memcpy(pTxBuf, BufTxt, nTxtLen);
+ pTxBuf += nTxtLen;
+ }
+ *pTxBuf++=(checkBufSum(TxBuf, pTxBuf-TxBuf));
+ nTxLen = pTxBuf-TxBuf;
+ printk("\n Len=%d", nTxLen);
+ for(i=0; i<nTxLen; i++)
+ {
+ if((i&0x0F)==0)
+ printk("\n");
+ printk("0x%02X ", TxBuf[i]);
+ }
+ printk("\n");
+ /* The setting for FSKDEPTH will depend on your system contraints*/
+ //fire interrupt when FSK_DEPTH_TRIG bytes of space, set FSKDEPTH to 8-FSK_DEPTH_TRIG
+
+ ProSLIC_ReadHookStatus(pProslic,&hook_status);
+ if(hook_status == PROSLIC_OFFHOOK)
+ {
+ return -1;
+ }
+
+ ProSLIC_FSKSetup (pProslic, 1);
+
+ if (pProslic->debugMode)
+ LOGPRINT ("\nSending CID to channel %d\n",pProslic->channel);
+ (pProslic->deviceId->ctrlInterface)->Delay_fptr((pProslic->deviceId->ctrlInterface)->hTimer,50);
+// (pProslic->deviceId->ctrlInterface)->Delay_fptr((pProslic->deviceId->ctrlInterface)->hTimer,130); //130ms of mark bits
+
+ ProSLIC_EnableCID(pProslic);
+
+
+ for (i=0;i<30;i+=FSK_DEPTH_TRIG)
+ {
+ /*if (WaitOnFSKBuffer (pProslic))
+ {
+ //printk("howard offhook during ONHOOK FSK CID\n");
+ return -1;
+ }*/
+ if(i>=4)
+ {
+ WaitOnFSKBuffer (pProslic);
+ }
+ ProSLIC_SendCID(pProslic,preamble,FSK_DEPTH_TRIG);
+ }
+
+ if (30%FSK_DEPTH_TRIG)
+ {
+ /*if (WaitOnFSKBuffer (pProslic))
+ {
+ //printk("howard offhook during ONHOOK FSK CID\n");
+ return -1;
+ }*/
+ WaitOnFSKBuffer (pProslic);
+ }
+
+ ProSLIC_SendCID(pProslic,preamble,30%FSK_DEPTH_TRIG);
+ WaitOnFSKBuffer (pProslic);
+ /*if (WaitOnFSKBuffer (pProslic))
+ {
+ //printk("howard offhook during ONHOOK FSK CID\n");
+ return -1;
+ }*/
+ (pProslic->deviceId->ctrlInterface)->Delay_fptr((pProslic->deviceId->ctrlInterface)->hTimer,140); //wait for 1 byte then 130ms +/- 25ms mark bits
+
+ for (i=0;i<nTxLen; i+=FSK_DEPTH_TRIG){
+ /*if (WaitOnFSKBuffer (pProslic))
+ {
+ //printk("howard offhook during ONHOOK FSK CID\n");
+ return -1;
+ }*/
+ ProSLIC_SendCID (pProslic,&(TxBuf[i]),FSK_DEPTH_TRIG);
+ WaitOnFSKBuffer (pProslic);
+
+ }
+ if (nTxLen%FSK_DEPTH_TRIG)
+ {
+ /*if (WaitOnFSKBuffer (pProslic))
+ {
+ //printk("howard offhook during ONHOOK FSK CID\n");
+ return -1;
+ }*/
+ ProSLIC_SendCID (pProslic,&(TxBuf[(nTxLen/FSK_DEPTH_TRIG)*FSK_DEPTH_TRIG]),nTxLen%FSK_DEPTH_TRIG);
+ WaitOnFSKBuffer (pProslic);
+ }
+
+
+ (pProslic->deviceId->ctrlInterface)->Delay_fptr((pProslic->deviceId->ctrlInterface)->hTimer,10*(FSK_DEPTH_TRIG));
+ (pProslic->deviceId->ctrlInterface)->Delay_fptr((pProslic->deviceId->ctrlInterface)->hTimer,50); //130ms of mark bits
+
+ ProSLIC_DisableCID(pProslic);
+}
+
+void ring_sendcid(proslicChanType_ptr hProslic, int8 *cid)
+{
+ /* Ensure OFFHOOK Active */
+ ProSLIC_SetLinefeedStatus(hProslic,LF_FWD_ACTIVE);
+ msleep(500);
+ /* 1st Ring Burst */
+ ProSLIC_SetLinefeedStatus(hProslic,LF_RINGING);
+ msleep(2500);/* Delay 250 to 3600ms */
+
+ printk("ring_sendcid %s\n", cid);
+ DoOnHookCallerIDEx(hProslic, cid, "");
+ //DoOnHookCallerIDEx(hProslic, "15029909468", "");
+}
+
+static s8 usrline_ioctl_signal_start(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ s8 i = 0;
+ USL_PORT *pPort = NULL;
+ SIGNAL_DATA *sig = NULL;
+ int use_cid=1;
+ int cid_len = 0;
+ //CANDENCE_ATTR *cadc = NULL;
+ printk("howard usrline_ioctl_signal_start\n");
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT2("%s: port %d \n",__FUNCTION__, data->port );
+ pPort = (USL_PORT *)&pstUslPort[(data->port+1)%2];
+ sig = (SIGNAL_DATA *) &(data->sig_data);
+ //cadc = sig->cadence;
+ if (copy_from_user(sig, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+ uslput_sig(sig);
+ /* init signal data */
+ /*added for ring queue*/
+ //data->stRingQuenePara.dwOffMaxCount = cadc->cadence_off - cadc->cadence_on - data->stRingQuenePara.RingQueneDelay;
+
+ if (USL_RING_SIGNAL == sig->signal_type)
+ {
+ printk("ring singnal\n");
+ data->stRingQuenePara.dwRingStop = 0;
+ if((NULL == pPort) /* no other port */
+ || (USL_TONE_SIGNAL == pPort->sig_data.signal_type) /* other port is playing tone */
+ || ((USL_RING_SIGNAL == pPort->sig_data.signal_type) && (SIGNAL_PLAY_STOP == pPort->signal_flag))) /* other port is ringing in off state */
+ //|| (cadc->cadence_off < cadc->cadence_on + data->stRingQuenePara.RingQueneDelay*2)) /* not match quene rule */
+ {
+ data->codec_ops->codec_signal_ctrl(data->pLine, sig, RING_SIGNAL_INIT);
+ data->signal_flag = SIGNAL_PLAY_START;
+
+ }
+ else /* need quene to ring */
+ {
+ //USLPUT2("stRingQuenePara.dwOffMaxCount = %d\n", data->stRingQuenePara.dwOffMaxCount);
+ data->stRingQuenePara.dwNeedSort = 1;
+ }
+ printk("howard ring and send cid in ioctl\n");
+ //sendCIDStream(data->pLine->ProObj);
+
+ cid_len = strlen(sig->cid);
+ printk("cid_len %d\n", cid_len);
+ for (i=0; i < cid_len; i++)
+ {
+ if((sig->cid[i]<0x30) || (sig->cid[i]>0x39))
+ {
+ use_cid = 0;
+ break;
+ }
+ }
+ if((use_cid == 1) && (cid_len > 0))
+ ring_sendcid(data->pLine->ProObj, sig->cid);
+ else
+ ProSLIC_RingStart(data->pLine->ProObj);
+
+ current_state = RINGING;
+ } else {
+ printk("tone singnal\n");
+ data->codec_ops->codec_signal_ctrl(data->pLine, sig, TONE_SIGNAL_INIT);
+ data->signal_flag = SIGNAL_PLAY_START;
+ data->stRingQuenePara.dwRingStop = 0;
+ }
+ /*ring queue add*/
+
+
+ return 0;
+ }
+
+/*added for ring queue*/
+static s8 usrline_signal_start(USL_PORT *data)
+{
+ SIGNAL_DATA *sig = NULL;
+
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ sig = (SIGNAL_DATA *) &(data->sig_data);
+ USLPUT2("%s: port %d \n",__FUNCTION__, data->port );
+ data->codec_ops->codec_signal_ctrl(data->pLine, sig, RING_SIGNAL_INIT);
+ data->signal_flag = SIGNAL_PLAY_START;
+ data->stRingQuenePara.dwNeedSort = 0;
+ data->stRingQuenePara.dwOffCount = 0;
+ data->stRingQuenePara.dwOffCountStart = 0;
+
+ return 0;
+}
+/*ring queue add*/
+
+/*added for ring queue*/
+static s8 usrline_ioctl_signal_stop(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ printk("howard usrline_ioctl_signal_stop\n");
+
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+ USLPUT2("%s: port %d, signal type %d\n",__FUNCTION__, data->port, data->sig_data.signal_type);
+
+ if ((data->signal_flag == SIGNAL_PLAY_START)||(1==data->stRingQuenePara.dwNeedSort)) /* stop signal */
+ {
+ data->stRingQuenePara.dwNeedSort = 0;
+ data->stRingQuenePara.dwRingStop = 1;
+ }
+
+ return 0;
+}
+
+/*added for ring queue*/
+static s8 usrline_signal_stop(USL_PORT *data)
+{
+ u8 cmd = 0;
+ SIGNAL_DATA *sig = NULL;
+
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ sig = (SIGNAL_DATA *) &(data->sig_data);
+
+ data->signal_flag = SIGNAL_PLAY_STOP;
+
+ if (sig->signal_type == USL_RING_SIGNAL)
+ {
+ USLPUT0("ring singal stop\n");
+ data->signal_on = RING_SIGNAL_OFF;
+ cmd = RING_SIGNAL_CLEAN_OFF;
+ } else {
+ USLPUT0("tone singal stop\n");
+ cmd = TONE_SIGNAL_CLEAN;
+ }
+
+ data->codec_ops->codec_signal_ctrl(data->pLine, sig, cmd);
+ data->stRingQuenePara.dwRingStop = 0;
+ data->stRingQuenePara.dwNeedSort = 0;
+ data->stRingQuenePara.dwOffCountStart = 0;
+ data->stRingQuenePara.dwOffCount = 0;
+
+ return 0;
+}
+
+static s8 usrline_signal_play(USL_PORT *pdata)
+{
+ SIGNAL_DATA *data = (SIGNAL_DATA *) &(pdata->sig_data);
+ u16 port = pdata->port;
+ u16 signal_type = data->signal_type;
+ u32 delay;
+ u8 signal_clean, signal_on, signal_off;
+
+ //data->tick_count++;
+ if (signal_type == USL_RING_SIGNAL)
+ {
+ if (RINGING != current_state)
+ {
+ signal_on = RING_SIGNAL_ON;
+ signal_off = RING_SIGNAL_OFF;
+ signal_clean = RING_SIGNAL_CLEAN_ON;
+ pdata->codec_ops->codec_signal_ctrl(pdata->pLine, data, signal_on);
+ pdata->signal_on = signal_on;
+ }
+ } else {
+ if (PLAYING_TONE != current_state)
+ {
+ signal_on = TONE_SIGNAL_ON;
+ signal_off = TONE_SIGNAL_OFF;
+ signal_clean = TONE_SIGNAL_CLEAN;
+ pdata->codec_ops->codec_signal_ctrl(pdata->pLine, data, signal_on);
+ pdata->signal_on = signal_on;
+ }
+ }
+ return 0;
+}
+static s8 usrline_ioctl_pcm_open(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ proslicChanType_ptr hProslic;
+ hProslic = data->pLine->ProObj;
+ printk("howard usrline_ioctl_pcm_open\n");
+ ProSLIC_PCMStart(hProslic);
+ slic_pcm_open = 1;
+ return 0;
+}
+static s8 usrline_ioctl_pcm_close(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ proslicChanType_ptr hProslic;
+ hProslic = data->pLine->ProObj;
+ printk("howard usrline_ioctl_pcm_close\n");
+ ProSLIC_PCMStop(hProslic);
+ slic_pcm_open = 0;
+ return 0;
+}
+
+static s8 usrline_ioctl_pcm_set_nb(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ proslicChanType_ptr hProslic;
+ hProslic = data->pLine->ProObj;
+ printk("howard usrline_ioctl_pcm_set nb\n");
+ ProSLIC_PCMSetup(hProslic, PCM_16LIN);
+ return 0;
+}
+
+
+static s8 usrline_ioctl_pcm_set_wb(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ proslicChanType_ptr hProslic;
+ hProslic = data->pLine->ProObj;
+ printk("howard usrline_ioctl_pcm_set wb\n");
+ ProSLIC_PCMSetup(hProslic, PCM_16LIN_WB);
+ return 0;
+}
+
+
+
+
+static s8 usrline_ioctl_timeslot_set(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_timeslot_set(data->pLine, pstCmd->unPara.stTimeSlot.bTx, pstCmd->unPara.stTimeSlot.bRx);
+ return 0;
+}
+
+static s8 usrline_ioctl_timeslot_release(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT2("%s: port %d \n",__FUNCTION__, data->port );
+ data->codec_ops->codec_timeslot_release( data->pLine );
+
+ return 0;
+}
+
+static s8 usrline_ioctl_codec_config(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+
+ data->codec_ops->codec_parm_cfg(data->pLine , pIoctlData, pstCmd->data_size);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_codec_read(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+
+ data->codec_ops->codec_parm_get(data->pLine, pIoctlData, pstCmd->data_size);
+ return 0;
+}
+
+static s8 usrline_ioctl_ram_config(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+
+ data->codec_ops->codec_ram_cfg(data->pLine, pIoctlData, pstCmd->data_size);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_mute(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ proslicChanType_ptr hProslic;
+ hProslic = data->pLine->ProObj;
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+ printk("howard slic usrline_ioctl_mute %s\n", pIoctlData);
+ if(*pIoctlData == 't')
+ {
+ ProSLIC_SetMuteStatus(hProslic,PROSLIC_MUTE_TX);
+ printk("howard slic mute tx\n");
+ }
+ else if(*pIoctlData == 'r')
+ {
+ ProSLIC_SetMuteStatus(hProslic,PROSLIC_MUTE_RX);
+ printk("howard slic mute rx\n");
+ }
+ else if(*pIoctlData == 'n')
+ {
+ ProSLIC_SetMuteStatus(hProslic,PROSLIC_MUTE_NONE);
+ printk("howard slic mute none\n");
+ }
+
+ return 0;
+}
+
+static s8 usrline_ioctl_ram_read(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ u16 addr = 0;
+
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+ addr = *(u16 *)pIoctlData;
+ printk("SLIC usrline_ioctl_ram_read addr %d,size %d\n", addr, pstCmd->data_size);
+ data->codec_ops->codec_ram_get(data->pLine, pIoctlData, pstCmd->data_size);
+
+ return 0;
+}
+extern void ctrl_ReadRegister(uInt8 cs, uInt8 channel, uInt8 regAddr, uInt8 *prdata);
+extern void ctrl_WriteRegister(uInt8 cs, uInt8 channel, uInt8 regAddr, uInt8 wdata);
+
+static s8 usrline_ioctl_dev_init(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ int ret = 0;
+ printk("howard usrline_ioctl_dev_init\n");
+
+ if (0 == init_flg)
+ {
+ ret = InitSlicChip();
+ if (0 == ret)
+ {
+ init_flg = 1;
+ printk("SLIC init complete\n");
+ }
+ else
+ {
+ init_flg = 0;
+ printk("SLIC init NOT complete\n");
+ }
+ /* disable printk after init */
+ si_usl_debuglvl = 0;
+ }
+
+ return SLC_SUCCESS;
+}
+
+static s8 usrline_ioctl_port_reset(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT2("%s: port %d \n",__FUNCTION__, data->port );
+
+ usrline_ioctl_timeslot_release(data, pstCmd);
+
+ if ((data->signal_flag == SIGNAL_PLAY_START)||(1==data->stRingQuenePara.dwNeedSort)) /* stop signal */
+ {
+ //usrline_signal_stop(data);
+ data->stRingQuenePara.dwNeedSort = 0;
+ data->stRingQuenePara.dwRingStop = 1;
+ }
+ data->dwIsRevPol = 0;
+ data->flag = LINE_DISABLE;
+ data->codec_ops->codec_reset(data->pLine, data->port);
+ data->flag = LINE_ENABLE;
+ return SLC_SUCCESS;
+}
+
+/*added for slc time cfg*/
+static s8 usrline_ioctl_time_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+
+ /* first save the ring quene time */
+ data->stRingQuenePara.RingQueneDelay = ((USL_CONFIG *)pIoctlData)->RingQueneDelay;
+
+ /* then save the chip related time parameters */
+ data->codec_ops->codec_time_cfg(data->pLine, (USL_CONFIG *)pIoctlData);
+
+ return SLC_SUCCESS;
+}
+static s8 usrline_ioctl_slctool_hooklowlen_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_HOOK_LOWLEN, pstCmd->unPara.wTime);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_slctool_hookhiglen_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_HOOK_HIGLEN, pstCmd->unPara.wTime);
+
+ return 0;
+}
+static s8 usrline_ioctl_slctool_prehookhiglen_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_PREHOOK_HIGLEN, pstCmd->unPara.wTime);
+
+ return 0;
+}
+static s8 usrline_ioctl_slctool_flashlowmin_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_FLASH_LMIN, pstCmd->unPara.wTime);
+
+ return 0;
+}
+static s8 usrline_ioctl_slctool_flashlowmax_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_FLASH_LMAX, pstCmd->unPara.wTime);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_slctool_flashhfix_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_FLASH_HFIX, pstCmd->unPara.wTime);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_slctool_dialhmin_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_DIAL_HMIN, pstCmd->unPara.wTime);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_slctool_dialhmax_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_DIAL_HMAX, pstCmd->unPara.wTime);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_slctool_diallmin_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_DIAL_LMIN, pstCmd->unPara.wTime);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_slctool_diallmax_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //data->codec_ops->codec_slctool_time_cfg(data->pLine, SLIC_CFG_DIAL_LMAX, pstCmd->unPara.wTime);
+
+ return 0;
+}
+
+
+static s8 usrline_ioctl_dial_start(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT3("%s port %d \n",__FUNCTION__,data->port);
+ data->codec_ops->codec_dial_set(data->pLine, EV_DIAL_START);
+
+ return SLC_SUCCESS;
+}
+
+static s8 usrline_ioctl_dial_stop(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT3("%s port %d \n",__FUNCTION__,data->port);
+ data->codec_ops->codec_dial_set(data->pLine, EV_DIAL_STOP);
+
+ return SLC_SUCCESS;
+}
+
+#ifdef POWER_SUPPLY_05A
+/*used for dinggasp deal*/
+extern u8 (*slic_function)(void);
+/*
+function: return ring state
+return : zero: not ring;
+ none zero: is ring
+*/
+u8 slic_is_ring_state(void)
+{
+ USL_PORT *data = NULL;
+ u8 done_line = 0;
+ int i = 0;
+ for ( i = 0; i < MAX_PORT_NUM; i++ )
+ {
+ data = (USL_PORT *)&pstUslPort[i];
+
+ if((NULL == data) || (LINE_DISABLE == data->flag))
+ {
+ continue;
+ }
+
+ if (RING_SIGNAL_ON == data->signal_on)
+ {
+ data->stRingQuenePara.dwRingStop = 1;
+ done_line++;
+ }
+ }
+
+ USLPUT3("done_line = %d.\n",done_line);
+
+ return done_line;
+}
+#endif
+
+static s8 usrline_ioctl_port_lock(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT2("%s: port %d \n",__FUNCTION__, data->port);
+ data->flag = LINE_DISABLE;
+
+ return 0;
+}
+
+static s8 usrline_ioctl_port_unlock(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT2("%s: port %d \n",__FUNCTION__, data->port);
+ data->flag = LINE_ENABLE;
+
+ return 0;
+}
+
+static s8 usrline_ioctl_polarity_reverse(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT2("%s: port %d \n",__FUNCTION__, data->port);
+ data->codec_ops->codec_polarity_reverse(data->pLine,data->port);
+
+ data->dwIsRevPol ^= 1;
+
+ return 0;
+}
+
+static s8 usrline_ioctl_dtmf_start(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ data->codec_ops->codec_signal_ctrl(data->pLine, NULL, RING_SIGNAL_OFF_REVERSED);
+
+ USLPUT2("%s : port %d \n",__FUNCTION__, data->port);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_fsk_start(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT2("%s : port %d ",__FUNCTION__, data->port);
+ if (0 == data->dwIsRevPol)
+ {
+ USLPUT2("set fsk OHT\n");
+ data->codec_ops->codec_signal_ctrl(data->pLine, NULL, RING_SIGNAL_OFF);
+ }
+ else
+ {
+ USLPUT2("set dtmf OHTREV\n");
+ data->codec_ops->codec_signal_ctrl(data->pLine, NULL, RING_SIGNAL_OFF_REVERSED);
+ }
+
+ return 0;
+}
+
+static s8 usrline_ioctl_fsk_stop(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ USLPUT2("%s : port %d \n",__FUNCTION__, data->port);
+ data->codec_ops->codec_signal_ctrl(data->pLine, NULL, RING_SIGNAL_CLEAN_ON);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_set_debuglvl(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ USL_PORT *pUslPort = NULL;
+ int i = 0;
+
+ if (NULL == pstCmd)
+ {
+ USLPUT0("%s pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ //si_usl_debuglvl = pstCmd->unPara.wLevel;
+
+ if(si_usl_debuglvl > 2)
+ {
+
+ for ( i = 0; i < MAX_PORT_NUM; i++ )
+ {
+ pUslPort = (USL_PORT *)&pstUslPort[i];
+
+ if((NULL == pUslPort) || (LINE_DISABLE == pUslPort->flag))
+ {
+ continue;
+ }
+
+ USLPUT0("port: %d\n",pUslPort->port);
+ /* print the chip relative time parameters */
+ pUslPort->codec_ops->codec_time_print(pUslPort->pLine);
+
+ USLPUT0("ring_quene: %d\n",pUslPort->stRingQuenePara.RingQueneDelay);
+ }
+
+ }
+
+ return 0;
+}
+
+static s8 usrline_ioctl_start_test(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+
+ data->event_mask = ~(GET_EV_MASK(EV_FXS_TEST_DONE) | GET_EV_MASK(EV_FXS_TEST_ERROR));
+
+ if (-1 == data->codec_ops->codec_start_test(data->pLine, (WriteCmd_t *)pIoctlData))
+ {
+ data->event_mask = 0;
+ USLPUT0("%s test start error\n",__FUNCTION__);
+ }
+
+ return 0;
+}
+
+static s8 usrline_ioctl_stop_test(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if (NULL == data)
+ {
+ USLPUT0("%s data NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ data->codec_ops->codec_stop_test(data->pLine);
+ data->event_mask = 0;
+
+ USLPUT2("%s:port %d.\n", __FUNCTION__, data->port);
+
+ return 0;
+}
+
+static s8 usrline_ioctl_read_test_result(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ TestResult_t *stResult = (TestResult_t *)pIoctlData;
+
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstResult NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ data->codec_ops->codec_read_reslult(data->pLine, stResult);
+ data->event_mask = 0;
+
+ USLPUT3("%s:port %d.\n", __FUNCTION__, data->port);
+
+ USLPUT3("112 test result:");
+ USLPUT3("port %d\n", stResult->port);
+ USLPUT3("port_type %d\n", stResult->port_type);
+ USLPUT3("item %d\n", stResult->item);
+ USLPUT3("obligate %d\n", stResult->obligate);
+ USLPUT3("num %ld\n", stResult->num);
+ USLPUT3("omci_item %d\n", stResult->omci_item);
+ USLPUT3("flg %d\n", stResult->flg);
+ USLPUT3("user_flg %d\n", stResult->user_flg);
+ USLPUT3("err_num %d\n", stResult->err_num);
+ USLPUT3("Vac_tr %ld\n", stResult->vac_tr);
+ USLPUT3("vac_tg %ld\n", stResult->vac_tg);
+ USLPUT3("vac_rg %ld\n", stResult->vac_rg);
+ USLPUT3("Vdc_tr %ld\n", stResult->vdc_tr);
+ USLPUT3("vdc_tg %ld\n", stResult->vdc_tg);
+ USLPUT3("vdc_rg %ld\n", stResult->vdc_rg);
+ USLPUT3("res_tr %ld\n", stResult->res_tr);
+ USLPUT3("res_tg %ld\n", stResult->res_tg);
+ USLPUT3("res_rg %ld\n", stResult->res_rg);
+ USLPUT3("cap_tr %ld\n", stResult->cap_tr);
+ USLPUT3("cap_tg %ld\n", stResult->cap_tg);
+ USLPUT3("cap_rg %ld\n", stResult->cap_rg);
+ USLPUT3("ring_vol %ld\n", stResult->ring_vol);
+ USLPUT3("Hz %ld\n", stResult->Hz);
+ USLPUT3("ren %ld\n", stResult->ren);
+ USLPUT3("loop_curent %ld\n",stResult->loop_curent);
+ USLPUT3("loop_res %ld\n", stResult->loop_res);
+ USLPUT3("battary %ld\n", stResult->battary);
+
+ if (copy_to_user(pstCmd->data, stResult, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data to user fail!\n",__FUNCTION__);
+ }
+
+ return 0;
+}
+
+static s8 usrline_ioctl_electric_cfg(USL_PORT *data, SLIC_IOCTL_DATA *pstCmd)
+{
+ if ((NULL == data) || (NULL == pstCmd))
+ {
+ USLPUT0("%s data or pstCmd NULL\n",__FUNCTION__);
+ return -1;
+ }
+
+ if (copy_from_user(pIoctlData, pstCmd->data, pstCmd->data_size) != 0)
+ {
+ USLPUT0("%s copy data from user fail!\n",__FUNCTION__);
+ return -1;
+ }
+
+ data->codec_ops->codec_electric_cfg(data->pLine, data->port, (ELECTRIC_CFG_CUSTOMIZED *)pIoctlData);
+
+ return 0;
+}
+
+/*ring queue add by chenjian*/
+void usrline_ring_ctrl(USL_PORT *usl_port)
+{
+ USL_PORT *data = NULL;
+ data = (USL_PORT *)&pstUslPort[(usl_port->port+1)%2];
+
+ if(1 == usl_port->stRingQuenePara.dwNeedSort)
+ {
+ if ((NULL == data) || (SIGNAL_PLAY_STOP == data->signal_flag))
+ {
+ usrline_signal_start(usl_port);
+ }
+ else if ((data->stRingQuenePara.RingQueneDelay <= data->stRingQuenePara.dwOffCount) && (data->stRingQuenePara.dwOffCount <= data->stRingQuenePara.dwOffMaxCount))
+ {
+ usrline_signal_start(usl_port);
+ }
+ }
+
+ if (1==usl_port->stRingQuenePara.dwRingStop)
+ {
+ usrline_signal_stop(usl_port);
+ }
+
+ return;
+}
+/*ring queue add by chenjian*/
+
+
+static int usrline_scan(void* info)
+{
+ USL_PORT *usl_port = NULL;
+ sigset_t blocked;
+ u16 port = 0;
+
+ //lock_kernel();
+ sprintf(current->comm, "usl_scan"); /* comm is 16 bytes */
+ daemonize("usl_scan");
+#if 1
+ /* Block and flush all signals */
+ sigfillset(&blocked);
+ sigprocmask(SIG_BLOCK, &blocked, NULL);
+ flush_signals(current);
+#endif
+ /* real time task FIFO */
+ current->policy = SCHED_FIFO;
+ //unlock_kernel();
+ printk("howard usrline_scan, HZ is %d\n", HZ);
+ while (timer_run)
+ {
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(10);
+ //if(slic_offhook){
+
+ //schedule_timeout(10);
+ //printk("howard usrline_scan while\n");
+
+ for (port = 0; port < MAX_PORT_NUM; port++)
+ {
+ usl_port = (USL_PORT *)&pstUslPort[port];
+
+ if((NULL == usl_port) || (LINE_DISABLE == usl_port->flag))
+ {
+ continue;
+ }
+
+ usrline_ring_ctrl(usl_port);
+
+ if (SIGNAL_PLAY_START == usl_port->signal_flag)
+ {
+ usrline_signal_play(usl_port);
+ }
+
+ usl_port->codec_ops->codec_scan(usl_port);
+ //}
+ }
+
+ } /* while () */
+
+ USLPUT0("User Line scan thread exit\n\r");
+ scan_over = 1;
+
+ return 0;
+}
+
+/* ==================================================================== */
+static int usrline_open(struct inode *inode, struct file *filp)
+{
+ //MOD_INC_USE_COUNT;
+ return 0;
+}
+
+static int usrline_release(struct inode *inode, struct file *filp)
+{
+ // MOD_DEC_USE_COUNT;
+ return 0;
+}
+
+static void irq_handle_interrupt(USL_PORT *data,
+ ProslicInt interrupt, int *hook_det)
+{
+ proslicChanType_ptr hProslic;
+ hProslic = data->pLine->ProObj;
+
+ switch(interrupt)
+ {
+ case IRQ_LOOP_STATUS:
+ ProSLIC_ReadHookStatus(hProslic,hook_det);
+ if(*hook_det == PROSLIC_OFFHOOK)
+ {
+ slic_offhook = 1;
+ printk("OFFHOOK\n");
+ }
+ else
+ {
+ slic_offhook = 0;
+ printk("ONHOOK\n");
+ }
+ break;
+
+ case IRQ_P_HVIC:
+ case IRQ_P_THERM:
+ printk("IRQ_P_HVIC or IRQ_P_THERM detect, set linefeed FWD_ACTIVE\n");
+ ProSLIC_SetLinefeedStatus(hProslic,LF_FWD_ACTIVE);
+ break;
+
+ case IRQ_DTMF:
+ {
+ unsigned char digit;
+ char digit_char;
+ int ret = 0;
+ //ProSLIC_SetMuteStatus(hProslic,PROSLIC_MUTE_TX);
+ if(slic_pcm_open == 1)
+ {
+ //ret = zDrvRpMsg_Write(&icp_pMsg);
+ CPPS_FUNC(cpps_callbacks, zDrvVp_SetDtmfMute_Wrap)();
+ // printk("DTMF zDrvRpMsg_Write ret %d\n",ret);
+ }
+ dtmf_mute = 1;
+ ProSLIC_DTMFReadDigit(hProslic, &digit);
+ if( (digit >=1) && (digit <= 9 ) )
+ {
+ digit_char = digit + '0';
+ }
+ else
+ {
+ if(digit == 0)
+ {
+ digit_char = 'D';
+ }
+ else
+ {
+ char digit_decode[] = "0*#ABC";
+ digit_char = digit_decode[digit - 10];
+ }
+ }
+ printk("detected dtmf-%c\n", digit_char);
+ usrline_report(data->port,EV_FXS_COLLECT_DIG,digit_char, data->event_mask);
+ }
+ break;
+
+ default:
+ break;
+ }
+}
+
+static int irq_check_interrupts(USL_PORT *data, int *hook_det)
+{
+ proslicIntType irqs;
+ ProslicInt arrayIrqs[MAX_PROSLIC_IRQS];
+ proslicChanType_ptr hProslic;
+ hProslic = data->pLine->ProObj;
+
+
+ irqs.irqs = arrayIrqs;
+
+ if (ProSLIC_GetInterrupts(hProslic, &irqs) != 0)
+ {
+ unsigned int i;
+ /* Iterate through the interrupts and handle */
+ for(i=0 ; i<irqs.number; i++)
+ {
+ if (irqs.irqs[i] == 8)
+ fskbuf_avail_flag = 1;
+ /*
+ if (irqs.irqs[i] < MAX_INT_STRINGS)
+ {
+ printk("detected: %s\n", intMapStrings[irqs.irqs[i]]);
+ }
+ */
+ irq_handle_interrupt(data,irqs.irqs[i], hook_det);
+ }
+ }
+ /*
+ if (irqs.number)
+ {
+ printk("\n");
+ }
+ */
+
+ return irqs.number;
+}
+
+static int slic_get_gpio_state(int gpioNum,
+ unsigned int gpio_sel_gpio,unsigned int gpio_sel_int)
+{
+ unsigned int gpio_state = GPIO_HIGH;
+
+ zx29_gpio_config(gpioNum, gpio_sel_gpio);
+ //pcu_clr_irq_pending(irq);
+ zx29_gpio_set_direction(gpioNum,GPIO_IN);
+ msleep(30);
+ gpio_state = gpio_get_value(gpioNum);
+ msleep(30);
+ zx29_gpio_config(gpioNum, gpio_sel_int);/******qhf***int****/
+ //pcu_clr_irq_pending(irq);
+
+ //printk(KERN_INFO "gpio state=%d.\n",gpio_state);
+
+ return gpio_state; /* 0: µÍµçƽ(press), 1:¸ßµçƽ(release) */
+
+}
+
+static irqreturn_t slic_int_irq(int irq, void *data)
+{
+ int ret = IRQ_HANDLED;
+ int hook_changed = 0;
+ //int gpio_state = 0;
+ proslicChanType_ptr hProslic;
+ hProslic = ((USL_PORT *)data)->pLine->ProObj;
+
+ //gpio_state = slic_get_gpio_state(SLIC_INT_GPIO, GPIO74_GPIO74, GPIO74_EXT_INT12);
+ //printk("howard slic irq %d, clear pending\n", irq);
+ pcu_clr_irq_pending(irq);
+ if (1 == init_flg)
+ irq_check_interrupts((USL_PORT *)data, &hook_changed);
+
+ /* To be done */
+ return ret;
+}
+/*******************************************************************************
+* Function: slic_int_irq_handler
+* Description: clear irq , wake thread irq
+* Parameters:
+* Input:
+* Output:
+********************************************************************************/
+static irqreturn_t slic_int_irq_handler(int irq, void *dev_id)
+{
+ //disable_irq_nosync(irq);
+ //pcu_int_clear(irq);
+ //printk("howard slic int handler irq=%d.\n", irq);
+ pcu_clr_irq_pending(irq);
+
+ return IRQ_WAKE_THREAD;
+}
+#if 0
+static int slic_create_rpmsg()
+{
+ int ret = 0;
+ icp_pMsg.actorID = PS_ID;
+ icp_pMsg.buf = rpMsgBuf;
+ icp_pMsg.len = 8;
+ icp_pMsg.chID = ICP_CHANNEL_DTMF;
+ icp_pMsg.flag |= RPMSG_WRITE_INT;
+ ret = zDrvRpMsg_CreateChannel(PS_ID, ICP_CHANNEL_DTMF, 0x10);
+ printk("create_rpmsg ret %d\n", ret);
+ return ret;
+}
+#endif
+/*********************************************************************************
+*{usrline_ioctl_xxxx},func deals ioctl cmd, if not realized, please fill {NULL},
+*must corresponding to cmd one by one
+*********************************************************************************/
+static const USRLINE_IOCTL_FUNC_MAP IoctlFuncMap[] =
+{
+ {usrline_ioctl_dev_init}, /* SLIC_DEV_INIT */
+ {usrline_ioctl_msg_rev}, /* SLIC_MSG_REV */
+ {NULL}, /* SLIC_TEST */
+ {usrline_ioctl_signal_start}, /* SLIC_SIGNAL_START */
+ {usrline_ioctl_signal_stop}, /* SLIC_SIGNAL_STOP */
+ {usrline_ioctl_pcm_open}, /* SLIC_PCM_OPEN */
+ {usrline_ioctl_pcm_close}, /* SLIC_PCM_CLOSE */
+ {usrline_ioctl_pcm_set_nb}, /* SLIC_PCM_SET_NB */
+ {usrline_ioctl_pcm_set_wb}, /* SLIC_PCM_SET_WB */
+
+ {usrline_ioctl_Inf_precfg}, /* SLIC_INF_PRECFG */
+
+ {NULL}, /* SLIC_NOTUSED */
+ {usrline_ioctl_port_reset}, /* SLIC_PORT_RESET */
+
+ {usrline_ioctl_msg_clear}, /* SLIC_MSG_CLR */
+ {usrline_ioctl_dial_start}, /* SLIC_DIAL_START */
+ {usrline_ioctl_dial_stop}, /* SLIC_DIAL_STOP */
+
+
+ {usrline_ioctl_timeslot_set}, /* SLIC_TIMESLOT_SET */
+ {usrline_ioctl_timeslot_release}, /* SLIC_TIMESLOT_RELEASE */
+ {usrline_ioctl_port_lock}, /* SLIC_PORT_LOCK */
+ {usrline_ioctl_port_unlock}, /* SLIC_PORT_UNLOCK */
+ {usrline_ioctl_fsk_start}, /* SLIC_FSK_START */
+ {usrline_ioctl_fsk_stop}, /* SLIC_FSK_STOP */
+ {usrline_ioctl_polarity_reverse}, /* SLIC_POLARITY_REVERSE */
+ {usrline_ioctl_dtmf_start}, /* SLIC_DTMFCID_START */
+ {usrline_ioctl_start_test}, /* SLIC_LINE_TEST_START */
+ {usrline_ioctl_stop_test}, /* SLIC_LINE_TEST_ABORT */
+ {usrline_ioctl_read_test_result}, /* SLIC_LINE_TEST_READ */
+ {usrline_ioctl_time_cfg}, /* SLIC_TIMEPARA_CFG */
+ {usrline_ioctl_electric_cfg}, /* SLIC_ELECTRIC_CFG */
+ {usrline_ioctl_set_debuglvl}, /* SLIC_DEBUG_LEVEL */
+ {usrline_ioctl_slctool_hooklowlen_cfg}, /* SLIC_CFG_HOOK_LOWLEN */
+ {usrline_ioctl_slctool_hookhiglen_cfg}, /* SLIC_CFG_HOOK_HIGLEN */
+ {usrline_ioctl_slctool_flashlowmin_cfg}, /* SLIC_CFG_FLASH_LMIN */
+ {usrline_ioctl_slctool_flashlowmax_cfg}, /* SLIC_CFG_FLASH_LMAX */
+ {usrline_ioctl_slctool_flashhfix_cfg}, /* SLIC_CFG_FLASH_HFIX */
+ {usrline_ioctl_slctool_dialhmin_cfg}, /* SLIC_CFG_DIAL_HMIN */
+ {usrline_ioctl_slctool_dialhmax_cfg}, /* SLIC_CFG_DIAL_HMAX */
+ {usrline_ioctl_slctool_diallmin_cfg}, /* SLIC_CFG_DIAL_LMIN */
+ {usrline_ioctl_slctool_diallmax_cfg}, /* SLIC_CFG_DIAL_LMAX */
+ {NULL}, /* SLIC_CFG_RINGCEASE */
+ {usrline_ioctl_slctool_prehookhiglen_cfg}, /* SLIC_CFG_PREHOOK_HIGLEN */
+ {NULL}, /* SLIC_CFG_QUEUE_DELAY */
+ {usrline_ioctl_codec_read}, /* SLIC_CODEC_GET */
+ {usrline_ioctl_codec_config}, /* SLIC_CODEC_SET */
+ {usrline_ioctl_ram_read}, /* SLIC_RAM_GET */
+ {usrline_ioctl_ram_config}, /* SLIC_RAM_SET */
+ {usrline_ioctl_mute}, /* SLIC_RAM_SET */
+ {NULL}, /* SLIC_CODEC_GETALL */
+ {NULL}, /* SLIC_RAM_GETALL */
+ {NULL}, /* SLIC_GET_CHIP_NAME */
+};
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)
+static long usrline_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+#else
+static int usrline_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
+#endif
+{
+ s8 rev = -1;
+ USL_PORT *usl_port = NULL;
+ SLIC_IOCTL_DATA stCmd = {0};
+
+ printk("howard usrline_ioctl cmd=%d\n", cmd);
+
+ if((0 == init_flg) && (SLIC_DEV_INIT != cmd) && (SLIC_MSG_REV != cmd))
+ {
+ printk("SLIC init NOT complete\n");
+ return -1;
+ }
+
+ if (NULL != (void *)arg)
+ {
+ if (copy_from_user(&stCmd, (SLIC_IOCTL_DATA *)arg, sizeof(SLIC_IOCTL_DATA)) != 0)
+ {
+ USLPUT0("usrline_ioctl copy data from user fail!\n");
+ return rev;
+ }
+#if 0
+ if (stCmd.port >= MAX_PORT_NUM)
+ {
+ USLPUT0("usrline_ioctl port:%d illegal, max:%d\n", stCmd.port, MAX_PORT_NUM-1);
+ return rev;
+ }
+#endif
+ usl_port = (USL_PORT *)&pstUslPort[0];
+ //ProSLIC_Init_MultiBOM(&(pstUslPort->pLine->ProObj),1,3);
+
+ if (NULL == usl_port)
+ {
+ USLPUT0("usrline_ioctl usl_port NULL\n");
+ return rev;
+ }
+
+ if (LINE_DISABLE == usl_port->flag)
+ {
+ USLPUT0("usrline_ioctl port:0 is disable now!\n");
+ switch (cmd)
+ {
+ case SLIC_INF_PRECFG:
+ case SLIC_MSG_REV:
+ rev = IoctlFuncMap[cmd].pIoctlFunc(usl_port, &stCmd);
+ break;
+ case SLIC_PORT_UNLOCK:
+ if (LINE_INITOK == usl_port->dwInitOK)
+ {
+ rev = IoctlFuncMap[cmd].pIoctlFunc(usl_port, &stCmd);
+ }
+ break;
+ default:
+ rev = IoctlFuncMap[cmd].pIoctlFunc(usl_port, &stCmd);
+ break;
+ }
+
+ return rev;
+ }
+ }
+
+ if ((cmd >= 0) && (cmd < SLIC_IOCTL_CMD_MAX))
+ {
+ if (NULL != IoctlFuncMap[cmd].pIoctlFunc)
+ {
+ rev = IoctlFuncMap[cmd].pIoctlFunc(usl_port, &stCmd);
+ }
+ else
+ {
+ USLPUT0("cmd:%d not realized!\n", cmd);
+ }
+ }
+ else
+ {
+ USLPUT0("cmd:%d not supprot!\n", cmd);
+ }
+
+ return rev;
+}
+
+static struct file_operations usrline_fops = {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)
+ unlocked_ioctl: usrline_ioctl,
+#else
+ ioctl: usrline_ioctl,
+#endif
+ open: usrline_open,
+ release: usrline_release,
+ owner: THIS_MODULE
+};
+
+/* =================================================== */
+int si_usrline_init(void)
+{
+ int rev;
+
+ init_waitqueue_head(&msg_wait_queue);
+
+ CreatMsgQueue();
+ printk("howard si_usrline_init\n");
+
+ rev = register_chrdev(USL_MAJOR, USL_NAME, &usrline_fops);
+ if (rev < 0) {
+ USLPUT0("%s: can't get major %d\n", USL_NAME, USL_MAJOR);
+ return rev;
+ }
+
+ if (0 != SlicMallocMemory())
+ {
+ unregister_chrdev(USL_MAJOR, USL_NAME);
+ USLPUT0("Can't get USL_PORT memory!\n");
+ return -1;
+ }
+ slic_dev_class = class_create(THIS_MODULE, USL_NAME);
+ if (IS_ERR(slic_dev_class))
+ {
+ printk("howard failed in creat slic class!\n");
+ unregister_chrdev(USL_MAJOR, USL_NAME);
+ return -1;
+ }
+ slic_device = device_create(slic_dev_class, NULL, MKDEV(USL_MAJOR, 0), NULL, USL_NAME);
+ if (IS_ERR(slic_device))
+ {
+ printk("howard failed in creat slic device!\n");
+ class_destroy(slic_dev_class);
+ unregister_chrdev(USL_MAJOR, USL_NAME);
+ return -1;
+ }
+ printk("howard kernel_thread\n");
+ kernel_thread(usrline_scan, NULL, 0); /* fork the main thread */
+
+ SlicCfgParaBasedBoardType();
+#ifdef POWER_SUPPLY_05A
+ slic_function = slic_is_ring_state;
+#endif
+ SPI_Init();
+
+ //zx29_gpio_config(SLIC_POW_EN_GPIO, GPIO121_GPIO121); /* set SLIC 3.3V EN GPIO */
+ //zx29_gpio_set_direction(SLIC_POW_EN_GPIO, GPIO_OUT);
+ //gpio_direction_output(SLIC_POW_EN_GPIO, 1);
+
+/* add by zhanghuan for INT and RST GPIO */
+ //zx29_gpio_config(SLIC_INT_GPIO, GPIO74_GPIO74); /* set SLIC_INT_GPIO as GPIO */
+ //zx29_gpio_config(SLIC_RST_GPIO, GPIO77_GPIO77); /* set SLIC_RST_GPIO as GPIO */
+ #if 0
+ rev = gpio_is_valid(SLIC_INT_GPIO);
+ if(rev < 0)
+ {
+ printk("SLIC_INT_GPIO is not valid\n");
+ //return -1;
+ };
+ rev = gpio_request(SLIC_INT_GPIO, "slic int");
+ if(rev < 0)
+ {
+ printk("SLIC_INT_GPIO is not valid\n");
+ //return -1;
+ };
+ //gpio_direction_input(SLIC_INT_GPIO);
+
+ zx29_gpio_config(SLIC_INT_GPIO, GPIO74_GPIO74); /* set SLIC_INT_GPIO as GPIO */
+ gpio_direction_input(SLIC_INT_GPIO);
+ #endif
+ //zx29_gpio_set_direction(SLIC_INT_GPIO, GPIO_IN);
+ #if 1
+ rev = gpio_request(SLIC_INT_GPIO, "slic_int");
+ if (rev) {
+ printk(KERN_INFO "slic_int gpio request error.\n");
+ return rev;
+ }
+
+ zx29_gpio_pd_pu_set(SLIC_INT_GPIO, IO_CFG_PULL_DISABLE);//IO_CFG_PULL_DISABLE
+ rev = zx29_gpio_config(SLIC_INT_GPIO,FNC_SLIC_INT_GPIO);/********V3 GPIO53:0 /EXT_INT:6*******//********V2 GPIO74:0 /EXT_INT:12*******/
+
+ zx29_gpio_set_inttype(SLIC_INT_GPIO,IRQ_TYPE_EDGE_FALLING/*IRQ_TYPE_EDGE_FALLING/*IRQ_TYPE_EDGE_RISING*/); //INT_POSEDGE
+ //zx29_gpio_pd_pu_set(SLIC_INT_GPIO, 0);
+ irq_num = gpio_to_irq(SLIC_INT_GPIO);
+ rev = irq_set_irq_wake(irq_num, 1);
+ printk("howard irq_set_irq_wake irq_num %d, ret %d\n", irq_num, rev);
+ pcu_clr_irq_pending(irq_num);
+
+ request_threaded_irq(irq_num, slic_int_irq_handler,
+ slic_int_irq, IRQF_ONESHOT, "slic int", pstUslPort);
+ #endif
+ rev = gpio_is_valid(SLIC_RST_GPIO);
+ if(rev < 0)
+ {
+ printk("SLIC_RST_GPIO is not valid\n");
+ //return -1;
+ };
+ rev = gpio_request(SLIC_RST_GPIO, "slic reset");
+ if(rev < 0)
+ {
+ printk("SLIC_RST_GPIO is not valid\n");
+ //return -1;
+ };
+ zx29_gpio_config(SLIC_RST_GPIO, FNC_SLIC_RST_GPIO); /* set SLIC_RST_GPIO as GPIO */
+
+ //zx29_gpio_set_direction(SLIC_RST_GPIO, GPIO_OUT);
+ gpio_direction_output(SLIC_RST_GPIO, 0);
+ gpio_set_value(SLIC_RST_GPIO,1);
+ //gpio_direction_output(SLIC_RST_GPIO, 1);
+ //zx29_gpio_output_data(SLIC_RST_GPIO, 1);
+ /* add by zhanghuan for SLIC wake lock */
+ wake_lock_init(&slic_wakelock, WAKE_LOCK_SUSPEND, "slic_wakelock");
+ wake_lock(&slic_wakelock);
+ zx_cpuidle_set_busy(IDLE_FLAG_SLIC);
+#if 0
+ rev = slic_create_rpmsg();
+ if(rev < 0)
+ {
+ printk("slic_create_rpmsg failed\n");
+ };
+#endif
+ zx29_i2s_tdm_pin_cfg();
+
+ USLPUT0("howard:User SLIC Driver V3.0.0 Init Finish.\n\r");
+ return 0;
+}
+
+void si_usrline_cleanup(void)
+{
+ timer_run = 0; /* stop scan */
+ while(!scan_over) /* wait scan thread exit */
+ {
+ schedule();
+ }
+ printk("howard si_usrline_cleanup\n");
+ free_irq(irq_num, pstUslPort);
+
+ DeinitSlicChip();
+ SlicFreeMemory();
+
+ SPI_Exit();
+ gpio_free(SLIC_INT_GPIO);
+ gpio_free(SLIC_RST_GPIO);
+ printk("howard free irq\n");
+ device_destroy(slic_dev_class, MKDEV(USL_MAJOR, 0));
+ class_destroy(slic_dev_class);
+ unregister_chrdev(USL_MAJOR, USL_NAME);
+ wake_lock_destroy(&slic_wakelock);
+ zx_cpuidle_set_free(IDLE_FLAG_SLIC);
+ USLPUT0("SLC:User SLIC Driver remove OK!\n\r");
+
+ return;
+}
+static void zx29_i2s_tdm_pin_cfg(void)
+{
+ unsigned int regval = 0;
+
+ int ret = 0;
+ printk("zx29_i2s_tdm_pin_cfg\n");
+ //ret = zOss_NvItemRead(OS_FLASH_VOICE_DRV_RW_NONFAC_BASE_ADDR, ((UINT8 *)(&audionvflag)), sizeof(audionvflag));
+
+ printk("after zx29_i2s_tdm_pin_cfg\n");
+ #if 0
+ ret = gpio_request(PIN_TDM_FS, "i2s0_ws");
+ if (ret < 0)
+ BUG();
+ ret = gpio_request(PIN_TDM_CLK, "i2s0_clk");
+ if (ret < 0)
+ BUG();
+ ret = gpio_request(PIN_TDM_DIN, "i2s0_din");
+ if (ret < 0)
+ BUG();
+ ret = gpio_request(PIN_TDM_DOUT, "i2s0_dout");
+ if (ret < 0)
+ BUG();
+ zx29_gpio_config(PIN_TDM_FS, FUN_TDM_FS);
+ zx29_gpio_config(PIN_TDM_CLK, FUN_TDM_CLK);
+ zx29_gpio_config(PIN_TDM_DIN, FUN_TDM_DIN);
+ zx29_gpio_config(PIN_TDM_DOUT, FUN_TDM_DOUT);
+
+
+ //zDrvRamlog_PRINTF(RAMLOG_MOD_AUDIO,"vp_SetTopTdmConfig set top TDM,ARM_TDM_LOOP_SET=0x%x\n",ARM_TDM_LOOP_SET);
+ // sel tdm wclk
+ regval = zx_read_reg(ZX29_TDM_MOD_CLK_SEL);
+ regval &= 0xfcffffff; //set mod_clk_sel bit 25:24 to select the tdm wclk, 0, main_clk;1,122.88m;2,mpll104m;3,mpll104m;
+ zx_write_reg(ZX29_TDM_MOD_CLK_SEL, regval);
+ //zDrvRamlog_PRINTF(RAMLOG_MOD_AUDIO,"vp_SetTopTdmConfig set top TDM,MOD_CLK_SEL=0x%x\n",TDM_MOD_CLK_SEL);
+ //zDrvRamlog_PRINTF(RAMLOG_MOD_AUDIO,"vp_SetTopTdmConfig set top TDM,DMA_SEL_CFG=0x%x\n",DMA_SEL_CFG);
+
+ // sel tdm use dma
+ regval = zx_read_reg(ZX29_I2S_DMA_SEL_CFG);
+ regval &= 0xffffff87;
+ regval |= 0x00000018; // bit3 1 tdmtx,bit4 1 tdmrx bit5 i2s1tx,bit6 i2s1rx
+ zx_write_reg(ZX29_I2S_DMA_SEL_CFG, regval);
+
+ printk("slic cfg tdm gpio pin end !\n");
+ #else
+ ret = gpio_request(PIN_I2S0_WS, "i2s0_ws");
+ if (ret < 0)
+ BUG();
+ ret = gpio_request(PIN_I2S0_CLK, "i2s0_clk");
+ if (ret < 0)
+ BUG();
+ ret = gpio_request(PIN_I2S0_DIN, "i2s0_din");
+ if (ret < 0)
+ BUG();
+ ret = gpio_request(PIN_I2S0_DOUT, "i2s0_dout");
+ if (ret < 0)
+ BUG();
+ zx29_gpio_config(PIN_I2S0_WS, FUN_I2S0_WS);
+ zx29_gpio_config(PIN_I2S0_CLK, FUN_I2S0_CLK);
+ zx29_gpio_config(PIN_I2S0_DIN, FUN_I2S0_DIN);
+ zx29_gpio_config(PIN_I2S0_DOUT, FUN_I2S0_DOUT);
+
+ // sel i2s0 use dma
+ regval = zx_read_reg(ZX29_I2S_DMA_SEL_CFG);
+ regval &= 0xffffff87; //bit3 1 i2s0tx,bit4 1 i2s0rx bit5 i2s1tx,bit6 i2s1rx
+ zx_write_reg(ZX29_I2S_DMA_SEL_CFG, regval);
+ printk("slic cfg i2s0 gpio pin end !\n");
+
+ #endif
+ //top i2s1 cfg
+ regval = zx_read_reg(ZX29_I2S_LOOP_CFG);
+ regval &= 0xfffffff8;
+ regval |= 0x00000001; // inter arm_i2s1--top i2s1
+ zx_write_reg(ZX29_I2S_LOOP_CFG, regval);
+
+ // inter loop
+ regval = zx_read_reg(ZX29_I2S_LOOP_CFG);
+ regval &= 0xfffffe07;
+ regval |= 0x000000a8; // inter arm_i2s2--afe i2s
+ zx_write_reg(ZX29_I2S_LOOP_CFG, regval);
+
+ printk("slic cfg top gpio end !\n");
+
+
+
+}
+/* =================================================== */
+#ifdef USE_GPIO_SPI_SLIC
+module_init(si_usrline_init);
+module_exit(si_usrline_cleanup);
+#endif
+
+#ifdef USE_STD_SPI_SLIC
+/* É豸̽²âº¯Êý */
+static int slic_probe(struct spi_device *spi)
+{
+ printk("howard slic_probe\n");
+ pslicSpi =spi;
+ si_usrline_init();
+ return 0;
+
+}
+static int slic_remove(struct spi_device *spi)
+{
+ printk("howard slic_remove\n");
+ si_usrline_cleanup();
+ return 0;
+}
+
+static const struct spi_device_id slic_id[] = {
+ {"slic_spi", 0 },
+ { }
+};
+
+MODULE_DEVICE_TABLE(spi, slic_id);
+
+static struct spi_driver slic_spi_driver = {
+ .driver = {
+ .name = "slic_spi",
+ .owner = THIS_MODULE,
+ },
+ .probe = slic_probe,
+ .remove = slic_remove,
+ .id_table = slic_id,
+};
+
+static int __init slic_spi_init(void)
+{
+ int ret;
+ printk("howard slic_spi_init\n");
+
+ ret = spi_register_driver(&slic_spi_driver);
+ if (ret != 0)
+ {
+ printk("howard slic Failed to register slic_spi_driver : %d\n", ret);
+ }
+
+ return ret;
+}
+
+static void __exit slic_spi_exit(void)
+{
+ printk("howard slic_spi_exit\n");
+ spi_unregister_driver(&slic_spi_driver);
+}
+
+module_init(slic_spi_init);
+module_exit(slic_spi_exit);
+#endif
+MODULE_AUTHOR("zxic");
+MODULE_DESCRIPTION("SLIC Driver");
+MODULE_LICENSE("GPL");
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/slic/usr_line.h b/ap/os/linux/linux-3.4.x/drivers/slic/usr_line.h
new file mode 100644
index 0000000..83e0032
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/slic/usr_line.h
@@ -0,0 +1,339 @@
+#ifndef _USR_LINE_H
+#define _USR_LINE_H
+
+#include <asm/types.h>
+#include <linux/mutex.h>
+#include "112.h"
+#include "si_adt.h"
+#include "silicon_spi.h"
+#include "si3217x_registers.h"
+
+#define USL_MAJOR 211 /* device num */
+#define USL_NAME "slic" /* device name */
+
+#define MSGMAX 32
+#define SLIC_PORT_TYPE 0
+#define DAA_PORT_TYPE 1
+
+/* if line is ok to be scaned or operated */
+#define LINE_NOTINIT 0
+#define LINE_INITOK 1
+#define LINE_DISABLE 0
+#define LINE_ENABLE 1
+
+#define SLC_SUCCESS (0)
+#define SLC_FAIL (-1)
+
+typedef enum {
+ SLIC_UNKNOWN_CMD = -1, /* unknow cmd */
+
+ /* modified cmd*/
+ SLIC_DEV_INIT = 0, /* ³õʼ»¯SLICоƬ */
+ SLIC_MSG_REV, /* ½ÓÊÕÉϱ¨Ê¼þ*/
+ SLIC_TEST,
+ SLIC_SIGNAL_START, /* ¿ªÊ¼ÕñÁå»ò·ÅÒô */
+ SLIC_SIGNAL_STOP, /* Í£Ö¹ÕñÁå»ò·ÅÒô */
+ SLIC_PCM_OPEN = 5, /* ´ò¿ªPCMͨ· */
+ SLIC_PCM_CLOSE, /* ¹Ø±ÕPCMͨ· */
+ SLIC_PCM_SET_NB, /* ÉèÖÃÕ´øÒôƵ */
+ SLIC_PCM_SET_WB, /* ÉèÖÿí´øÒôƵ */
+
+ /* original cmd*/
+ /* below cmd is used for ulc or slctool */
+ SLIC_INF_PRECFG = 9, /* */
+ SLIC_NOTUSED, /* for ioctl #define FIGETBSZ _IO(0x00,2) */
+ SLIC_PORT_RESET, /* */
+ SLIC_MSG_CLR, /* */
+ SLIC_DIAL_START, /* */
+ SLIC_DIAL_STOP, /* */
+ SLIC_TIMESLOT_SET, /* */
+ SLIC_TIMESLOT_RELEASE, /* */
+ SLIC_PORT_LOCK, /* */
+ SLIC_PORT_UNLOCK, /* */
+ SLIC_FSK_START, /* */
+ SLIC_FSK_STO, /* */
+ SLIC_POLARITY_REVERSE, /* */
+ SLIC_DTMFCID_START, /* */
+ SLIC_LINE_TEST_START, /* start line test */
+ SLIC_LINE_TEST_ABORT, /* stop line test */
+ SLIC_LINE_TEST_READ, /* read line test result */
+ SLIC_TIMEPARA_CFG, /* config the time para used for hookon¡¢hookoff¡¢pulse dial and flash */
+ SLIC_ELECTRIC_CFG, /* */
+
+ /* below cmd is only used for slctool for debug */
+ SLIC_DEBUG_LEVEL = 28, /* set the message print level */
+ SLIC_CFG_HOOK_LOWLEN, /* config the hookon time */
+ SLIC_CFG_HOOK_HIGLEN, /* */
+ SLIC_CFG_FLASH_LMIN, /* */
+ SLIC_CFG_FLASH_LMAX, /* */
+ SLIC_CFG_FLASH_HFIX, /* */
+ SLIC_CFG_DIAL_HMIN, /* */
+ SLIC_CFG_DIAL_HMAX, /* */
+ SLIC_CFG_DIAL_LMIN, /* */
+ SLIC_CFG_DIAL_LMAX, /* */
+ SLIC_CFG_RINGCEASE, /* */
+ SLIC_CFG_PREHOOK_HIGLEN, /* */
+ SLIC_CFG_QUEUE_DELAY, /* */
+ SLIC_CODEC_GET, /* read the content of reg xxx */
+ SLIC_CODEC_SET, /* wrtie value X to reg xxx */
+ SLIC_RAM_GET = 43, /* read the content of ram xxx */
+ SLIC_RAM_SET, /* wrtie value X to ram xxx */
+ SLIC_MUTE,
+ SLIC_CODEC_GETALL, /* read all the reg */
+ SLIC_RAM_GETALL, /* read all the ram */
+ SLIC_GET_CHIP_NAME, /* */
+
+ SLIC_IOCTL_CMD_MAX,
+} SLIC_IOCTL_CMD;
+
+/* scan report event */
+typedef enum {
+ EV_UNKONWN = -1,
+ EV_FXS_HOOKON, /*¹Ò»úʼþ*/
+ EV_FXS_HOOKOFF, /*Õª»úʼþ*/
+ EV_FXS_COLLECT_DIG, /*¼ì²âµ½°´¼ü£¬ÕýÔڲɼ¯ºÅÂë*/
+ EV_FXS_FLASH, /*ÅIJå»Éʼþ*/
+
+ EV_FXS_FIRST_RING,
+ EV_FXS_SIGNAL_CEASE,
+ EV_FXO_RING_START,
+ EV_FXO_RING_STOP,
+ EV_FXS_PRE_HOOKOFF,
+ EV_FXS_FIRST_TONE,
+ EV_FXS_TEST_DONE,
+ EV_FXS_TEST_ERROR
+} SLIC_EVENT;
+
+/* daa line status */
+#define DAA_STATES 3 /* all daa phone state */
+#define DAA_RING_ON 0 /* ring */
+#define DAA_RING_OFF 1 /* no ring */
+#define DAA_REPORT 2 /* report ring */
+
+
+/* errno define */
+#define MALLOC_ERR 0x60
+#define PORT_NOFOUND 0x61
+#define CODEC_HARDWARE_ERR 0x63
+#define MESSAGE_FULL 0x64
+#define NOT_SUPPORT 0x65
+#define PULSE_ERROR 0x66
+
+
+#define SIGNAL_PLAY_START 1
+#define SIGNAL_PLAY_STOP 0
+
+
+#define USL_RING_SIGNAL RING_SIGNAL
+#define USL_TONE_SIGNAL TONE_SIGNAL
+
+
+#define RING_SIGNAL_INIT 49
+#define RING_SIGNAL_ON 50
+#define RING_SIGNAL_OFF 51
+#define RING_SIGNAL_CLEAN_OFF 52
+#define RING_SIGNAL_CLEAN_ON 53
+#define RING_SIGNAL_OFF_REVERSED 54
+#define TONE_SIGNAL_INIT 60
+#define TONE_SIGNAL_ON 61
+#define TONE_SIGNAL_OFF 62
+#define TONE_SIGNAL_CLEAN 63
+
+#define GET_EV_MASK(x) (1<<x)
+/* conver time format millisecond to system jiffies */
+#define MS2JIFF(num, ms) ((num) * (ms) * HZ / 1000)
+
+#if 0
+#define DIAL_LOW_MAX_NORMAL 0
+#define DIAL_LOW_MAX_BIGGER 1
+#endif
+
+#define EV_DIAL_STOP 0
+#define EV_DIAL_START 1
+
+extern u8 si_usl_debuglvl;
+
+
+#define USLPUT0 printk
+#define USLPUT1 printk
+#define USLPUT2 printk
+#define USLPUT3 printk
+
+
+typedef struct
+{
+ u8 bTx;
+ u8 bRx;
+} TIME_SLOT;
+
+typedef union
+{
+ u16 wTime;
+ u16 wLevel;
+ u16 wImpe;
+ u16 wHighWay;
+ TIME_SLOT stTimeSlot;
+} SLIC_PARA_UNION;
+
+typedef struct
+{
+#if 0
+ u16 port;
+ u8 port_type;
+ SLIC_PARA_UNION unPara;
+#endif
+ void *data;
+ u32 data_size;
+} SLIC_IOCTL_DATA;
+
+typedef struct
+{
+ //u16 port; /* del by zhanghuan */
+ u8 msgid;
+ u32 payload; /* payload only 4 byte */
+} MSG_DATA;
+
+typedef struct
+{
+ MSG_DATA data[MSGMAX];
+ u32 head;
+ u32 tail;
+} USL_MSG;
+
+typedef struct
+{
+ u16 wCadence_rptcnt;
+ u16 cadence_on;
+ u16 cadence_off;
+ u16 freq1;
+ u16 freq2;
+ u16 amp;
+} CANDENCE_ATTR;
+
+#if 0
+typedef struct
+{
+ u16 dura; /* dura time */
+ u16 signal_type; /* tone type */
+ u16 signal_id; /* signal id */
+ u16 tone_num; /* Ring Tone counter */
+ u32 tick_count; /* passed tick */
+ u32 next_time; /* next time of ring tone toggle */
+
+ /* Tone attrible struct */
+ u32 cease_time;
+ u8 cadence_num;
+ u16 cadence_index;
+ u16 wCurrentrptcnt; /* repeat count on current cadence_index */
+ CANDENCE_ATTR cadence[4];
+
+} SIGNAL_DATA;
+#endif
+
+/* add by zhanghuan for new signal struct */
+typedef enum {
+ RING_SIGNAL = 0,
+ TONE_SIGNAL = 1
+} SLIC_SIGNAL_TYPE;
+
+typedef enum
+{
+ TONE_DIAL, /* ²¦ºÅÒô */
+ TONE_BUSY, /* æÒô */
+ TONE_RINGBACK, /* »ØÁåÒô */
+ TONE_CONGESTION, /* ×èÈûÒô*/
+ TONE_CW, /* ºô½ÐµÈ´ýÒô*/
+ TONE_TKY, /* Ð¥½ÐÒô*/
+ TONE_SERVICE_SUCCESS, /* ÉèÖóɹ¦Òô */
+ TONE_SERVICE_FAIL, /* ÉèÖÃʧ°ÜÒô */
+ /* ´ýÀ©Õ¹ */
+ TONE_MAX,
+
+} TONE_TYPE;
+
+typedef struct
+{
+ SLIC_SIGNAL_TYPE signal_type;
+ /* TONE_SIGNAL ±íʾTONEÒô */
+ /* RING_SIGNAL ±íʾÕñÁå */
+ char cid[32]; /* À´µçÏÔʾºÅÂë */
+ TONE_TYPE tone_type; /* toneÒôÀàÐÍ*/
+
+} SIGNAL_DATA;
+/* add by zhanghuan for new signal struct end*/
+
+
+/* used for quene ring */
+typedef struct
+{
+ u32 dwRingStop; /*flag: add for dealingl the stop ringing conflit 0:noaction 1:stop ringing*/
+ u32 dwNeedSort; /*flag: need the sort algorithm 0:no 1:need*/
+ u32 dwOffCountStart; /*during the ringing off time, we will start statistics*/
+ u32 dwOffCount; /*statistics time: ringing off time*/
+ u32 dwOffMaxCount; /*time: cadence_off - cadence_on - data->delay*2 */
+
+ u32 RingQueneDelay;
+} RING_QUENE_PARA;
+
+struct codec_ops;
+
+typedef struct
+{
+ struct codec_ops *codec_ops; /* chip adpter interface func struct pointer */
+
+ u16 port;
+ u8 port_type;
+ u8 flag; /* 0:disable 1:enable */
+ u32 dwInitOK; /* 0:not init 1:init ok*/
+
+ /* daa internal data */
+ u32 ring_on_len;
+ u32 ring_off_len;
+
+ /* used for setting fsk&dtmf transmit mode */
+ u32 dwIsRevPol;
+
+ u16 event_mask; /* event mask flag */
+
+ /* play signal data */
+ u8 signal_flag; /* play signal start or stop */
+ u8 signal_on; /* signal is on or off */
+ SIGNAL_DATA sig_data;
+ RING_QUENE_PARA stRingQuenePara;
+
+ Port_t *pLine; /*Ö¸ÏòоƬ²Ù×÷µÄÖ¸Õë*/
+
+} USL_PORT;
+
+typedef struct
+{
+ s8 (*pIoctlFunc) (USL_PORT *data, SLIC_IOCTL_DATA *pstCmd);
+} USRLINE_IOCTL_FUNC_MAP;
+
+typedef struct codec_ops
+{
+ s8 (*codec_signal_ctrl) (Port_t *pPort, const void *signal_attr, const u8 flag);
+ s8 (*codec_timeslot_set) (Port_t *pPort, const u8 tx, const u8 rx);
+ s8 (*codec_timeslot_release) (Port_t *pPort);
+ s8 (*codec_polarity_reverse) (Port_t *pPort, const u16 port);
+ s8 (*codec_reset) (Port_t *pPort, const u16 port);
+ s8 (*codec_parm_cfg) (Port_t *pPort, u8 *parm, const u8 size);
+ s8 (*codec_parm_get) (Port_t *pPort, u8 *parm, const u8 size);
+ s8 (*codec_ram_cfg) (Port_t *pPort, u8 *parm, const u8 size);
+ s8 (*codec_ram_get) (Port_t *pPort, u8 *parm, const u8 size);
+ s8 (*codec_time_cfg) (Port_t *pPort, const USL_CONFIG *buf);
+ s8 (*codec_slctool_time_cfg) (Port_t *pPort, SLIC_IOCTL_CMD cmd, u16 wTime);
+ s8 (*codec_time_print) (Port_t *pPort);
+ s8 (*codec_dial_set) (Port_t *pPort, u8 bDialEn);
+ s8 (*codec_electric_cfg) (Port_t *pPort, const u16 port, const ELECTRIC_CFG_CUSTOMIZED *buf);
+ s8 (*codec_start_test) (Port_t *pPort, const WriteCmd_t *Cmd);
+ s8 (*codec_stop_test) (Port_t *pPort);
+ s8 (*codec_read_reslult) (Port_t *pPort, TestResult_t *pstResult);
+ s8 (*codec_power_ctrl) (Port_t *pPort, u8 level);
+
+ void (*codec_scan) (USL_PORT *pUslPort);
+} CODEC_OPS;
+
+s8 usrline_report(const u16 port, const u8 event, const u32 payload, u16 mask);
+s8 usrline_port_register( const u16 port, const u8 type, CODEC_OPS *ops, Port_t *pchip);
+#endif /* _USR_LINE_H */