[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit
Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/boot/common/src/uboot/drivers/gpio/Makefile b/boot/common/src/uboot/drivers/gpio/Makefile
new file mode 100644
index 0000000..4b80dc9
--- /dev/null
+++ b/boot/common/src/uboot/drivers/gpio/Makefile
@@ -0,0 +1,54 @@
+#
+# Copyright 2000-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)libgpio.o
+
+COBJS-y += hal_gpio.o
+ifeq ($(SOC),zx297520v3)
+COBJS-y += hal_gpioInfo_v3.o
+endif
+ifeq ($(SOC),zx297520v2)
+COBJS-y += hal_gpioInfo_v2.o
+endif
+
+
+COBJS := $(COBJS-y)
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+########################################################################
diff --git a/boot/common/src/uboot/drivers/gpio/hal_gpio.c b/boot/common/src/uboot/drivers/gpio/hal_gpio.c
new file mode 100644
index 0000000..82d1e82
--- /dev/null
+++ b/boot/common/src/uboot/drivers/gpio/hal_gpio.c
@@ -0,0 +1,484 @@
+/***********************************************************************
+* Copyright (C) 2016, ZIXC Corporation.
+*
+* File Name: hal_gpio.c
+* File Mark:
+* Description:
+* Others:
+* Version: v1.0
+* Author: zhangdongdong
+* Date: 2015-07-31
+*
+* History 1:
+* Date:
+* Version:
+* Author:
+* Modification:
+*
+* History 2:
+**********************************************************************/
+/*************************************************************************
+* Include files *
+*************************************************************************/
+#include <config.h>
+#include "hal_gpio_v3.h"
+#include <drvs_gpio.h>
+
+/*GPIO*/
+#define GPIO0_REG_BASE 0x0013D000
+#define GPIO1_REG_BASE 0x0013E000
+
+#define PINMUX_REG_BASE 0x01303000
+#define PADCTRL_REG_BASE 0x0013c000
+#define IO_CFG_REG_BASE (PADCTRL_REG_BASE+0x800)
+
+#define EX_GPIO_INT_TOP_AP_CLEAR_REG (0x13a000+0x128)
+#define EX_GPIO_INT_TOP_CP_CLEAR_REG (0x13a000+0x118)
+#define EX_8INT1_CLEAR_REG (0x13a000+0x064)
+/*************************************************************************
+* Macro *
+*************************************************************************/
+#define GPIO0_MODULE_NUM 128
+#define GPIO1_MODULE_NUM 28
+
+#define GPIOPDD_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16) * 4)
+#define RECV_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16 + 5) * 4)
+#define SET1_SEND_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16 + 6) * 4)
+#define SET0_SEND_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16 + 7) * 4)
+#define SEND_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16 + 8) * 4)
+
+#define GPIOPDD_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16) * 4)
+#define RECV_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16 + 5) * 4)
+#define SET1_SEND_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16 + 6) * 4)
+#define SET0_SEND_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16 + 7) * 4)
+#define SEND_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16 + 8) * 4)
+
+#define TOP_SEL_AON 0
+#define TOP_SEL_PD 1
+
+
+/**************************************************************************
+* Types *
+
+
+**************************************************************************/
+
+
+/**************************************************************************
+* Global Variable *
+**************************************************************************/
+extern UINT32 gGpioNumMax;
+extern T_Gpio gGpioInfoTable[];
+
+/**************************************************************************
+* Function Prototypes *
+**************************************************************************/
+
+
+/**************************************************************************
+* Function Defines *
+**************************************************************************/
+
+
+/**************************************************************************
+* Functin: zDrvGpio_SetFunc
+* Description: set the pin use ,used as GPIO or other module,when use for GPIO
+* Parameters:
+* Input:
+* gpio_id: gpio id
+* func_sel: sel pd or aon func
+* val: pd or aon func val
+* Output:
+* NONE
+* Returns:
+* success or parameter fault
+* Others:
+* None.
+**************************************************************************/
+SINT32 zDrvGpio_SetFunc(UINT32 gpio_id, T_ZDrvGpio_FuncSel func_sel)
+{
+#if 1//ndef _FPGA_TEST
+ UINT32 i = 0;
+ UINT32 topFunc = (func_sel>>12)&0x1;
+ UINT32 l2Func = func_sel&0x3ff;
+
+ if((gpio_id != (func_sel>>24))||(MAX_GPIO_NUM < gpio_id)){
+ return -1;
+ }
+
+ for(i=0; i<gGpioNumMax; i++)
+ {
+ if(gpio_id == gGpioInfoTable[i].gpio)
+ break;
+ }
+
+ if(INVLID_ADDR != gGpioInfoTable[i].topFuncSel.regBase)
+ {
+
+ set_reg_bits(gGpioInfoTable[i].topFuncSel.regBase,
+ gGpioInfoTable[i].topFuncSel.offset,
+ gGpioInfoTable[i].topFuncSel.size,
+ topFunc);
+
+ }
+
+ if(TOP_SEL_AON == topFunc)
+ {
+ if(INVLID_ADDR != gGpioInfoTable[i].aonFuncSel.regBase)
+ {
+
+ set_reg_bits(gGpioInfoTable[i].aonFuncSel.regBase,
+ gGpioInfoTable[i].aonFuncSel.offset,
+ gGpioInfoTable[i].aonFuncSel.size,
+ l2Func);
+
+ }
+ }
+ else
+ {
+ if(INVLID_ADDR != gGpioInfoTable[i].pdFuncSel.regBase)
+ {
+
+ set_reg_bits(gGpioInfoTable[i].pdFuncSel.regBase,
+ gGpioInfoTable[i].pdFuncSel.offset,
+ gGpioInfoTable[i].pdFuncSel.size,
+ l2Func);
+
+ }
+ }
+#endif
+ return 0;
+}
+
+/**************************************************************************
+* Functin: zDrvGpio_PullUpDown
+* Description: internal pull up or pull down
+* Parameters:
+* Input:
+* gpio_id: gpio id
+* value: pull up or down val
+* Output:
+* NONE
+* Returns:
+* success or parameter fault
+* Others:
+* None.
+**************************************************************************/
+SINT32 zDrvGpio_PullUpDown(UINT32 gpio_id, UINT32 val)
+{
+ UINT32 i = 0;
+
+ if(MAX_GPIO_NUM < gpio_id){
+ return -1;
+ }
+
+ for(i=0; i<gGpioNumMax; i++)
+ {
+ if(gpio_id == gGpioInfoTable[i].gpio)
+ break;
+ }
+
+ if(INVLID_ADDR != gGpioInfoTable[i].ioCfg.regBase)
+ {
+
+ set_reg_bits(gGpioInfoTable[i].ioCfg.regBase,
+ gGpioInfoTable[i].ioCfg.offset,
+ gGpioInfoTable[i].ioCfg.size,
+ val);
+
+ }
+ else
+ return -1;
+
+
+ return 0;
+}
+
+/**************************************************************************
+* Functin: zDrvGpio_SetDirection
+* Description: set direction of gpio, in or out
+* Parameters:
+* Input:
+* gpio_id: gpio id
+* value: in or out.
+* Output:
+* NONE
+* Returns:
+* NONE
+* Others:
+* None.
+**************************************************************************/
+void zDrvGpio_SetDirection(UINT32 gpio_id, T_ZDrvGpio_IoDirection value)
+{
+ UINT32 gpio_addr = 0;
+ UINT32 tmp = 0;
+
+ if(GPIO0_MODULE_NUM > gpio_id)
+ gpio_addr = GPIOPDD_REG0(gpio_id);
+ else
+ gpio_addr = GPIOPDD_REG1(gpio_id-GPIO0_MODULE_NUM);
+
+ tmp = get_reg_val(gpio_addr);
+
+ if(GPIO_IN == value)
+ tmp &= ~(0x1<<(gpio_id % 16));
+ else
+ tmp |= (0x1<<(gpio_id % 16));
+
+
+ set_reg_val(gpio_addr, tmp);
+;
+}
+
+/**************************************************************************
+* Functin: zDrvGpio_GetDirection
+* Description: get direction
+* Parameters:
+* Input:
+* gpio_id: gpio id
+* Output:
+* gpio input or output
+* Returns:
+*
+* Others:
+* None.
+**************************************************************************/
+T_ZDrvGpio_IoDirection zDrvGpio_GetDirection(UINT32 gpio_id)
+{
+ UINT32 gpio_addr = 0;
+ UINT32 tmp = 0;
+
+ if(GPIO0_MODULE_NUM > gpio_id)
+ gpio_addr = GPIOPDD_REG0(gpio_id);
+ else
+ gpio_addr = GPIOPDD_REG1(gpio_id-GPIO0_MODULE_NUM);
+
+ tmp = get_reg_val(gpio_addr);
+
+ if((tmp >> (gpio_id % 16)) & 0x1)
+ return GPIO_OUT;
+ else
+ return GPIO_IN;
+}
+
+/**************************************************************************
+* Functin: zDrvGpio_SetOutputValue
+* Description: set output value
+* Parameters:
+* Input:
+* gpio_id: gpio id
+* value: high or low.
+* Output:
+* NONE
+* Returns:
+* success or parameter fault
+* Others:
+* None.
+**************************************************************************/
+void zDrvGpio_SetOutputValue(UINT32 gpio_id, T_ZDrvGpio_IoVal value)
+{
+ UINT32 gpio_addr = 0;
+ UINT32 tmp = 0;
+
+ if(GPIO_LOW == value)
+ {
+ if(GPIO0_MODULE_NUM > gpio_id)
+ gpio_addr = SET0_SEND_REG0(gpio_id);
+ else
+ gpio_addr = SET0_SEND_REG1(gpio_id-GPIO0_MODULE_NUM);
+
+ tmp = (0x1<<(gpio_id % 16));
+
+
+ set_reg_val(gpio_addr, tmp);
+
+ }
+
+ if(GPIO_HIGH == value)
+ {
+ if(GPIO0_MODULE_NUM > gpio_id)
+ gpio_addr = SET1_SEND_REG0(gpio_id);
+ else
+ gpio_addr = SET1_SEND_REG1(gpio_id-GPIO0_MODULE_NUM);
+
+ tmp = (0x1<<(gpio_id % 16));
+
+
+ set_reg_val(gpio_addr, tmp);
+
+ }
+}
+
+/**************************************************************************
+* Functin: zDrvGpio_GetOutputValue
+* Description: get output value
+* Parameters:
+* Input:
+* gpio_id: gpio id
+* Output:
+* output high or low
+* Returns:
+* NONE
+* Others:
+* None.
+**************************************************************************/
+T_ZDrvGpio_IoVal zDrvGpio_GetOutputValue(UINT32 gpio_id)
+{
+ UINT32 gpio_addr = 0;
+ UINT32 tmp = 0;
+
+ if(GPIO0_MODULE_NUM > gpio_id)
+ gpio_addr = SEND_REG0(gpio_id);
+ else
+ gpio_addr = SEND_REG1(gpio_id-GPIO0_MODULE_NUM);
+
+ tmp = get_reg_val(gpio_addr);
+
+ if((tmp >> (gpio_id % 16)) & 0x1)
+ return GPIO_HIGH;
+ else
+ return GPIO_LOW;
+
+}
+
+/**************************************************************************
+* Functin: zDrvGpio_GetInputValue
+* Description: get input value
+* Parameters:
+* Input:
+* gpio_id: gpio id
+* Output:
+* input high or low
+* Returns:
+* NONE
+* Others:
+* None.
+**************************************************************************/
+T_ZDrvGpio_IoVal zDrvGpio_GetInputValue(UINT32 gpio_id)
+{
+ UINT32 gpio_addr = 0;
+ UINT32 tmp = 0;
+
+ if(GPIO0_MODULE_NUM > gpio_id)
+ gpio_addr = RECV_REG0(gpio_id);
+ else
+ gpio_addr = RECV_REG1(gpio_id-GPIO0_MODULE_NUM);
+
+ tmp = get_reg_val(gpio_addr);
+
+ if((tmp >> (gpio_id % 16)) & 0x1)
+ return GPIO_HIGH;
+ else
+ return GPIO_LOW;
+
+}
+
+
+void gpio_reset(void)
+{
+ unsigned int i=0;
+
+ //gpio0~1
+ for(i=0;i<8;i++)
+ {
+ if(i == 1) { //v3 pshold1: gpio24
+
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x00) &=0x0100;
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x18) &=0x0100;
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x1c) &=0x0100;
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x20) &=0x0100;
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x24) &=0x0100;
+
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x00)=0;
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x18)=0;
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x1c)=0;
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x20)=0;
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x24)=0;
+ }
+ else {
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x00)=0;
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x18)=0;
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x1c)=0;
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x20)=0;
+ reg32(GPIO0_REG_BASE + 0x40 *i + 0x24)=0;
+
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x00)=0;
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x18)=0;
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x1c)=0;
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x20)=0;
+ reg32(GPIO1_REG_BASE + 0x40 *i + 0x24)=0;
+ }
+ }
+
+}
+
+
+void pinmux_reset(void)
+{
+ unsigned int i=0;
+ unsigned int tmp=0;
+
+ //pinmux
+ reg32(PINMUX_REG_BASE + 0x00)=0;
+ reg32(PINMUX_REG_BASE + 0x04)=0;
+ reg32(PINMUX_REG_BASE + 0x08)=0;
+ reg32(PINMUX_REG_BASE + 0x0c)=0x7ff;
+ for(i=4;i<14;i++) {
+ reg32(PINMUX_REG_BASE + 0x4* i)=0;
+ }
+
+ //padctrl fun_sel
+ reg32(PADCTRL_REG_BASE + 0x00)=0x00000500;
+ reg32(PADCTRL_REG_BASE + 0x04)=0x00000000;
+ reg32(PADCTRL_REG_BASE + 0x08)=0x00000000;
+ reg32(PADCTRL_REG_BASE + 0x0c)=0x00015400;
+ reg32(PADCTRL_REG_BASE + 0x10)=0x00000000;
+ reg32(PADCTRL_REG_BASE + 0x14)=0x00000000;
+ reg32(PADCTRL_REG_BASE + 0x18)=0x00000000;
+ reg32(PADCTRL_REG_BASE + 0x1c)=0x00007fff;
+ reg32(PADCTRL_REG_BASE + 0x20)=0x0000c030;
+ reg32(PADCTRL_REG_BASE + 0x24)=0x000003ff;
+ reg32(PADCTRL_REG_BASE + 0x28)=0x00007fc0;
+ reg32(PADCTRL_REG_BASE + 0x2c)=0x00000000;
+ reg32(PADCTRL_REG_BASE + 0x30)=0x00000000;
+
+ //padctrl io_cfg
+ tmp=reg32(IO_CFG_REG_BASE + 0x04); //pshold1-gpio24:bit[29:28]
+ tmp &= 0x30000000;
+ tmp |= 0x00d40000;
+ reg32(IO_CFG_REG_BASE + 0x04)=tmp;
+
+ reg32(IO_CFG_REG_BASE + 0x00)=0x00fffd4f;
+ //reg32(IO_CFG_REG_BASE+0x04)=0x10d40000;
+ reg32(IO_CFG_REG_BASE + 0x08)=0x557fff57;
+ reg32(IO_CFG_REG_BASE + 0x0c)=0x15554015;
+ reg32(IO_CFG_REG_BASE + 0x10)=0x38383858;
+ reg32(IO_CFG_REG_BASE + 0x14)=0x38583838;
+ reg32(IO_CFG_REG_BASE + 0x18)=0x38383838;
+ reg32(IO_CFG_REG_BASE + 0x1c)=0x155fd5ff;
+ reg32(IO_CFG_REG_BASE + 0x20)=0x00154ff7;
+ reg32(IO_CFG_REG_BASE + 0x24)=0x00555555;
+ reg32(IO_CFG_REG_BASE + 0x28)=0x00003858;
+ reg32(IO_CFG_REG_BASE + 0x2c)=0x05555555;
+ reg32(IO_CFG_REG_BASE + 0x30)=0x000000ad;
+ reg32(IO_CFG_REG_BASE + 0x34)=0x00000048;
+ reg32(IO_CFG_REG_BASE + 0x38)=0x00000001;
+ reg32(IO_CFG_REG_BASE + 0x3c)=0x00000058;
+ reg32(IO_CFG_REG_BASE + 0x40)=0x00585858;
+}
+void pcu_clear_8in1_Int(void)
+{
+ reg32(EX_8INT1_CLEAR_REG) = 0xff<<8;//clear External_Gpio_Int_Top_Clear_Reg
+ reg32(EX_GPIO_INT_TOP_AP_CLEAR_REG) = 0x1;//clear External_Gpio_Int_Top_Clear_Reg
+ reg32(EX_GPIO_INT_TOP_CP_CLEAR_REG) = 0x1;//clear External_Gpio_Int_Top_Clear_Reg
+}
+
+int gpio_pad_init2rst(void)
+{
+ gpio_reset();
+ pinmux_reset();
+ pcu_clear_8in1_Int();
+
+ return 0;
+}
+
diff --git a/boot/common/src/uboot/drivers/gpio/hal_gpioInfo_v2.c b/boot/common/src/uboot/drivers/gpio/hal_gpioInfo_v2.c
new file mode 100644
index 0000000..8a32781
--- /dev/null
+++ b/boot/common/src/uboot/drivers/gpio/hal_gpioInfo_v2.c
@@ -0,0 +1,1534 @@
+/*******************************************************************************
+ * Copyright (C) 2014, ZTE Corporation.
+ *
+ * File Name: hal_gpioinfo.c
+ * File Mark:
+ * Description: gpio information table
+ * Others:
+ * Version: 1.0
+ * Author: zhangdongdong
+ * Date: 2015-07-31
+ * History 1:
+ * Date:
+ * Version:
+ * Author:
+ * Modification:
+ ********************************************************************************/
+
+/****************************************************************************
+* Include files
+****************************************************************************/
+#include "hal_gpio_v2.h"
+#include <drvs_gpio.h>
+
+
+
+
+/****************************************************************************
+* Local Macros
+****************************************************************************/
+/*PIN MUX*/
+#define ZX297520V2_PIN_MUX 0x01303000
+#define GPIO_PINMUX_REG_BASE ZX297520V2_PIN_MUX
+
+/*PAD*/
+#define ZX297520V2_A1_PAD_CTRL0 0x0013C000
+#define PAD_CTRL_REG_BASE ZX297520V2_A1_PAD_CTRL0
+
+
+
+
+#define PD_FUNC_SEL_BASE (GPIO_PINMUX_REG_BASE)
+#define AON_FUNC_SEL_BASE (PAD_CTRL_REG_BASE)
+#define TOP_FUNC_SEL_BASE (PAD_CTRL_REG_BASE)
+#define IO_CFG_BASE (PAD_CTRL_REG_BASE+0x800)
+
+/****************************************************************************
+* Local Types
+****************************************************************************/
+
+
+/****************************************************************************
+* Local Constants
+****************************************************************************/
+
+/****************************************************************************
+* Local Variables
+****************************************************************************/
+
+/****************************************************************************
+* Global Constants
+****************************************************************************/
+
+/****************************************************************************
+* Global Variables
+****************************************************************************/
+
+/****************************************************************************
+* Global Function Prototypes
+****************************************************************************/
+T_Gpio gGpioInfoTable[] =
+{
+ [NAND_WE] = {
+ .name = "nand_we",
+ .gpio = GPIO0,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 0, 1},
+ .ioCfg = {IO_CFG_BASE, 0, 2},
+ },
+
+ [NAND_CSN] = {
+ .name = "nand_csn",
+ .gpio = GPIO1,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 1, 1},
+ .ioCfg = {IO_CFG_BASE, 2, 2},
+ },
+
+ [NAND_READY] = {
+ .name = "nand_ready",
+ .gpio = GPIO2,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 2, 1},
+ .ioCfg = {IO_CFG_BASE, 4, 2},
+ },
+
+ [NAND_CLE_] = {
+ .name = "nand_cle",
+ .gpio = GPIO3,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE, 0, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 3, 1},
+ .ioCfg = {IO_CFG_BASE, 6, 2},
+ },
+
+ [NAND_ALE_] = {
+ .name = "nand_ale",
+ .gpio = GPIO4,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 4, 1},
+ .ioCfg = {IO_CFG_BASE, 8, 2},
+ },
+
+ [NAND_RE] = {
+ .name = "nand_re",
+ .gpio = GPIO5,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE, 2, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 5, 1},
+ .ioCfg = {IO_CFG_BASE, 10, 2},
+ },
+
+ [NAND_WP] = {
+ .name = "nand_wp",
+ .gpio = GPIO6,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 6, 1},
+ .ioCfg = {IO_CFG_BASE, 12, 2},
+ },
+
+ [NAND_DATA0] = {
+ .name = "nand_data0",
+ .gpio = GPIO7,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 0, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 7, 1},
+ .ioCfg = {IO_CFG_BASE, 14, 2},
+ },
+
+ [NAND_DATA1] = {
+ .name = "nand_data1",
+ .gpio = GPIO8,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 2, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 8, 1},
+ .ioCfg = {IO_CFG_BASE, 16, 2},
+ },
+
+ [NAND_DATA2] = {
+ .name = "nand_data2",
+ .gpio = GPIO9,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x0, 4, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 9, 1},
+ .ioCfg = {IO_CFG_BASE, 18, 2},
+ },
+
+ [NAND_DATA3] = {
+ .name = "nand_data3",
+ .gpio = GPIO10,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x0, 6, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 10, 1},
+ .ioCfg = {IO_CFG_BASE, 20, 2},
+ },
+
+ [NAND_DATA4] = {
+ .name = "nand_data4",
+ .gpio = GPIO11,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x0, 8, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 11, 1},
+ .ioCfg = {IO_CFG_BASE, 22, 2},
+ },
+
+ [NAND_DATA5] = {
+ .name = "nand_data5",
+ .gpio = GPIO12,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x0, 10, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 12, 1},
+ .ioCfg = {IO_CFG_BASE, 24, 2},
+ },
+
+ [NAND_DATA6] = {
+ .name = "nand_data6",
+ .gpio = GPIO13,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 4, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 13, 1},
+ .ioCfg = {IO_CFG_BASE, 26, 2},
+ },
+
+ [NAND_DATA7] = {
+ .name = "nand_data7",
+ .gpio = GPIO14,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 6, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 14, 1},
+ .ioCfg = {IO_CFG_BASE, 28, 2},
+ },
+
+ [CLK_OUT0] = {
+ .name = "clk_out0",
+ .gpio = GPIO23,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 0, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0x4, 4, 2},
+ },
+
+ [CLK_OUT1] = {
+ .name = "clk_out1",
+ .gpio = GPIO24,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 2, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0x4, 6, 2},
+ },
+
+ [CLK_OUT2] = {
+ .name = "clk_out2",
+ .gpio = GPIO25,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 4, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0x4, 8, 2},
+ },
+
+ [CLK_32K_OUT] = {
+ .name = "clk_32k_out",
+ .gpio = GPIO26,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 6, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0x4, 10, 2},
+ },
+
+ [CLK_REQ0] = {
+ .name = "clk_req0",
+ .gpio = GPIO27,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 8, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0x4, 12, 2},
+ },
+
+ [PWR_CTRL1] = {
+ .name = "pwr_ctrl1",
+ .gpio = GPIO29,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 10, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0x8, 0, 2},
+ },
+
+ [SSP0_CS] = {
+ .name = "ssp0_cs",
+ .gpio = GPIO30,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 15, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 2, 2},
+ },
+
+ [SSP0_CLK] = {
+ .name = "ssp0_clk",
+ .gpio = GPIO31,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 16, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 4, 2},
+ },
+
+ [SSP0_RXD] = {
+ .name = "ssp0_rxd",
+ .gpio = GPIO32,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 17, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 6, 2},
+ },
+
+ [SSP0_TXD] = {
+ .name = "ssp0_txd",
+ .gpio = GPIO33,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 18, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 8, 2},
+ },
+
+ [UART0_RXD] = {
+ .name = "uart0_rxd",
+ .gpio = GPIO34,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 0, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 12, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 19, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 14, 2},
+ },
+
+ [UART0_TXD] = {
+ .name = "uart0_txd",
+ .gpio = GPIO35,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 2, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 14, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 20, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 16, 2},
+ },
+
+ [UART0_CTS] = {
+ .name = "uart0_cts",
+ .gpio = GPIO36,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 4, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 16, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x10, 21, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 18, 2},
+ },
+
+ [UART0_RTS] = {
+ .name = "uart0_rts",
+ .gpio = GPIO37,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 6, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE, 18, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 0, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 20, 2},
+ },
+
+ [I2S0_WS] = {
+ .name = "i2s0_ws",
+ .gpio = GPIO38,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 8, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 1, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 22, 2},
+ },
+
+ [I2S0_CLK] = {
+ .name = "i2s0_clk",
+ .gpio = GPIO39,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 10, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 2, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 24, 2},
+ },
+
+ [I2S0_DIN] = {
+ .name = "i2s0_din",
+ .gpio = GPIO40,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 12, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 3, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 26, 2},
+ },
+
+ [I2S0_DOUT] = {
+ .name = "i2s0_dout",
+ .gpio = GPIO41,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 14, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 4, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 28, 2},
+ },
+
+ [I2S1_WS] = {
+ .name = "i2s1_ws",
+ .gpio = GPIO42,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 16, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 5, 1},
+ .ioCfg = {IO_CFG_BASE+0x8, 30, 2},
+ },
+
+ [I2S1_CLK] = {
+ .name = "i2s1_clk",
+ .gpio = GPIO43,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 18, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 6, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 0, 2},
+ },
+
+ [I2S1_DIN] = {
+ .name = "i2s1_din",
+ .gpio = GPIO44,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 20, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 7, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 2, 2},
+ },
+
+ [I2S1_DOUT] = {
+ .name = "i2s1_dout",
+ .gpio = GPIO45,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x4, 22, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 8, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 4, 2},
+ },
+
+ [SCL0] = {
+ .name = "scl0",
+ .gpio = GPIO46,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 0, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0xc, 6, 2},
+ },
+
+ [SDA0] = {
+ .name = "sda0",
+ .gpio = GPIO47,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 2, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0xc, 8, 2},
+ },
+
+ [SCL1] = {
+ .name = "scl1",
+ .gpio = GPIO48,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 9, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 10, 2},
+ },
+
+ [SDA1] = {
+ .name = "sda1",
+ .gpio = GPIO49,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 10, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 12, 2},
+ },
+
+ [EXT_INT0] = {
+ .name = "ext_int0",
+ .gpio = GPIO50,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 4, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 11, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 14, 2},
+ },
+
+ [EXT_INT1] = {
+ .name = "ext_int1",
+ .gpio = GPIO51,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 6, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 12, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 16, 2},
+ },
+
+ [EXT_INT2] = {
+ .name = "ext_int2",
+ .gpio = GPIO52,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 8, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 13, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 18, 2},
+ },
+
+ [EXT_INT3] = {
+ .name = "ext_int3",
+ .gpio = GPIO53,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 10, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 14, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 20, 2},
+ },
+
+ [EXT_INT4] = {
+ .name = "ext_int4",
+ .gpio = GPIO54,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 12, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 15, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 22, 2},
+ },
+
+ [EXT_INT5] = {
+ .name = "ext_int5",
+ .gpio = GPIO55,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 14, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 16, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 24, 2},
+ },
+
+ [EXT_INT6] = {
+ .name = "ext_int6",
+ .gpio = GPIO56,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 16, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 17, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 26, 2},
+ },
+
+ [EXT_INT7] = {
+ .name = "ext_int7",
+ .gpio = GPIO57,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 18, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 18, 1},
+ .ioCfg = {IO_CFG_BASE+0xc, 28, 2},
+ },
+
+ [SD1_CLK] = {
+ .name = "sd1_clk",
+ .gpio = GPIO58,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 19, 1},
+ .ioCfg = {IO_CFG_BASE+0x10, 0, 8},
+ },
+
+ [SD1_CMD] = {
+ .name = "sd1_cmd",
+ .gpio = GPIO59,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 8, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 20, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 20, 1},
+ .ioCfg = {IO_CFG_BASE+0x10, 8, 8},
+ },
+
+ [SD1_DATA0] = {
+ .name = "sd1_data0",
+ .gpio = GPIO60,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 10, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 22, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 21, 1},
+ .ioCfg = {IO_CFG_BASE+0x10, 16, 8},
+ },
+
+ [SD1_DATA1] = {
+ .name = "sd1_data1",
+ .gpio = GPIO61,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 12, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 24, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 22, 1},
+ .ioCfg = {IO_CFG_BASE+0x10, 24, 8},
+ },
+
+ [SD1_DATA2] = {
+ .name = "sd1_data2",
+ .gpio = GPIO62,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 14, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 26, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 23, 1},
+ .ioCfg = {IO_CFG_BASE+0x14, 0, 8},
+ },
+
+ [SD1_DATA3] = {
+ .name = "sd1_data3",
+ .gpio = GPIO63,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x8, 16, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x4, 28, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 24, 1},
+ .ioCfg = {IO_CFG_BASE+0x14, 8, 8},
+ },
+
+ [JTAG_TCK] = {
+ .name = "jtag_tck",
+ .gpio = GPIO64,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0xc, 0, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x8, 0, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 25, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 0, 2},
+ },
+
+ [JTAG_TDI] = {
+ .name = "jtag_tdi",
+ .gpio = GPIO66,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0xc, 2, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x8, 2, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 26, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 2, 2},
+ },
+
+ [JTAG_TDO] = {
+ .name = "jtag_tdo",
+ .gpio = GPIO67,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0xc, 4, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x8, 4, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 27, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 4, 2},
+ },
+
+ [JTAG_TMS] = {
+ .name = "jtag_tms",
+ .gpio = GPIO68,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0xc, 6, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x8, 6, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 28, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 6, 2},
+ },
+
+ [JTAG_TRST] = {
+ .name = "jtag_trst",
+ .gpio = GPIO69,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0xc, 8, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0x8, 8, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 29, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 8, 2},
+ },
+
+ [KBC_0] = {
+ .name = "kbc_0",
+ .gpio = GPIO70,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x10, 0, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 0, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 30, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 10, 2},
+ },
+
+ [KBC_1] = {
+ .name = "kbc_1",
+ .gpio = GPIO71,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 2, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x14, 31, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 12, 2},
+ },
+
+ [KBC_2] = {
+ .name = "kbc_2",
+ .gpio = GPIO72,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x10, 2, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 4, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 0, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 14, 2},
+ },
+
+ [KBC_3] = {
+ .name = "kbc_3",
+ .gpio = GPIO73,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x10, 4, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 6, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 1, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 16, 2},
+ },
+
+ [KBR_0] = {
+ .name = "kbr_0",
+ .gpio = GPIO74,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x10, 6, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 8, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 2, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 18, 2},
+ },
+
+ [KBR_1] = {
+ .name = "kbr_1",
+ .gpio = GPIO75,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x10, 8, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 10, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 3, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 20, 2},
+ },
+
+ [KBR_2] = {
+ .name = "kbr_2",
+ .gpio = GPIO76,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x10, 10, 2},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 12, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 4, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 22, 2},
+ },
+
+ [KBR_3] = {
+ .name = "kbr_3",
+ .gpio = GPIO77,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 14, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 5, 1},
+ .ioCfg = {IO_CFG_BASE+0x1c, 24, 2},
+ },
+
+ [LTE_TDD_TXRX_DATA0] = {
+ .name = "lte_tdd_txrx_data0",
+ .gpio = GPIO78,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 6, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA1] = {
+ .name = "lte_tdd_txrx_data1",
+ .gpio = GPIO79,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 7, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA2] = {
+ .name = "lte_tdd_txrx_data2",
+ .gpio = GPIO80,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 8, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA3] = {
+ .name = "lte_tdd_txrx_data3",
+ .gpio = GPIO81,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 9, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA4] = {
+ .name = "lte_tdd_txrx_data4",
+ .gpio = GPIO82,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 10, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA5] = {
+ .name = "lte_tdd_txrx_data5",
+ .gpio = GPIO83,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 11, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA6] = {
+ .name = "lte_tdd_txrx_data6",
+ .gpio = GPIO84,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 12, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA7] = {
+ .name = "lte_tdd_txrx_data7",
+ .gpio = GPIO85,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 13, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA8] = {
+ .name = "lte_tdd_txrx_data8",
+ .gpio = GPIO86,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 14, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA9] = {
+ .name = "lte_tdd_txrx_data9",
+ .gpio = GPIO87,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 15, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA10] = {
+ .name = "lte_tdd_txrx_data10",
+ .gpio = GPIO88,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 16, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_TXRX_DATA11] = {
+ .name = "lte_tdd_txrx_data11",
+ .gpio = GPIO89,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 17, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA0] = {
+ .name = "lte_tdd_rx_data0",
+ .gpio = GPIO90,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 18, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA1] = {
+ .name = "lte_tdd_rx_data1",
+ .gpio = GPIO91,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 19, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA2] = {
+ .name = "lte_tdd_rx_data2",
+ .gpio = GPIO92,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 20, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA3] = {
+ .name = "lte_tdd_rx_data3",
+ .gpio = GPIO93,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 21, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA4] = {
+ .name = "lte_tdd_rx_data4",
+ .gpio = GPIO94,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 22, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA5] = {
+ .name = "lte_tdd_rx_data5",
+ .gpio = GPIO95,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 23, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA6] = {
+ .name = "lte_tdd_rx_data6",
+ .gpio = GPIO96,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 24, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA7] = {
+ .name = "lte_tdd_rx_data7",
+ .gpio = GPIO97,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 25, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA8] = {
+ .name = "lte_tdd_rx_data8",
+ .gpio = GPIO98,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 26, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA9] = {
+ .name = "lte_tdd_rx_data9",
+ .gpio = GPIO99,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 27, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA10] = {
+ .name = "lte_tdd_rx_data10",
+ .gpio = GPIO100,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 28, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [LTE_TDD_RX_DATA11] = {
+ .name = "lte_tdd_rx_data11",
+ .gpio = GPIO101,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 29, 1},
+ .ioCfg = {IO_CFG_BASE+0x20, 0, 8},
+ },
+
+ [FCLK] = {
+ .name = "fclk",
+ .gpio = GPIO102,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 30, 1},
+ .ioCfg = {IO_CFG_BASE+0x28, 8, 8},
+ },
+
+ [FRAME_TX] = {
+ .name = "frame_tx",
+ .gpio = GPIO103,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x18, 31, 1},
+ .ioCfg = {IO_CFG_BASE+0x24, 0, 2},
+ },
+
+ [FRAME_RX] = {
+ .name = "frame_rx",
+ .gpio = GPIO104,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 0, 1},
+ .ioCfg = {IO_CFG_BASE+0x24, 2, 2},
+ },
+
+ [MCLK] = {
+ .name = "mclk",
+ .gpio = GPIO105,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 1, 1},
+ .ioCfg = {IO_CFG_BASE+0x24, 4, 2},
+ },
+
+ [LTE_REF_CLK] = {
+ .name = "lte_ref_clk",
+ .gpio = GPIO106,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 2, 1},
+ .ioCfg = {IO_CFG_BASE+0x24, 6, 2},
+ },
+
+ [LTE_TXRX_EN] = {
+ .name = "lte_txrx_en",
+ .gpio = GPIO107,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x14, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 3, 1},
+ .ioCfg = {IO_CFG_BASE+0x24, 8, 2},
+ },
+
+ [LTE_TXRX_SWITCH] = {
+ .name = "lte_txrx_switch",
+ .gpio = GPIO108,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x14, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 4, 1},
+ .ioCfg = {IO_CFG_BASE+0x24, 10, 2},
+ },
+
+ [RESETB_OUT] = {
+ .name = "resetb_out",
+ .gpio = GPIO109,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 5, 1},
+ .ioCfg = {IO_CFG_BASE+0x24, 12, 2},
+ },
+
+ [PDN_GSM] = {
+ .name = "pdn_gsm",
+ .gpio = GPIO110,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 16, 2},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 6, 1},
+ .ioCfg = {IO_CFG_BASE+0x24, 14, 2},
+ },
+
+ [WAKE_UP] = {
+ .name = "wake_up",
+ .gpio = GPIO111,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {AON_FUNC_SEL_BASE+0xc, 18, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {IO_CFG_BASE+0x24, 20, 2},
+ },
+
+ [RF_SPI0_STR0] = {
+ .name = "rf_spi0_str0",
+ .gpio = GPIO112,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 7, 1},
+ .ioCfg = {IO_CFG_BASE+0x28, 0, 8},
+ },
+
+ [RF_SPI0_STR1] = {
+ .name = "rf_spi0_str1",
+ .gpio = GPIO113,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 8, 1},
+ .ioCfg = {IO_CFG_BASE+0x28, 0, 8},
+ },
+
+ [RF_SPI0_CLK] = {
+ .name = "rf_spi0_clk",
+ .gpio = GPIO114,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 9, 1},
+ .ioCfg = {IO_CFG_BASE+0x28, 0, 8},
+ },
+
+ [RF_SPI0_DIN] = {
+ .name = "rf_spi0_din",
+ .gpio = GPIO115,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 10, 1},
+ .ioCfg = {IO_CFG_BASE+0x28, 0, 8},
+ },
+
+ [RF_SPI0_DATA] = {
+ .name = "rf_spi0_data",
+ .gpio = GPIO116,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 11, 1},
+ .ioCfg = {IO_CFG_BASE+0x28, 0, 8},
+ },
+
+ [RF_SPI1_STR] = {
+ .name = "rf_spi1_str",
+ .gpio = GPIO117,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 12, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 0, 2},
+ },
+
+ [RF_SPI1_CLK] = {
+ .name = "rf_spi1_clk",
+ .gpio = GPIO118,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 13, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 2, 2},
+ },
+
+ [RF_SPI1_DIN] = {
+ .name = "rf_spi1_din",
+ .gpio = GPIO119,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 14, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 4, 2},
+ },
+
+ [RF_SPI1_DATA] = {
+ .name = "rf_spi1_data",
+ .gpio = GPIO120,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 15, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 6, 2},
+ },
+
+ [RF_CONTROL0] = {
+ .name = "rf_control0",
+ .gpio = GPIO121,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x18, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 16, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 8, 2},
+ },
+
+ [RF_CONTROL1] = {
+ .name = "rf_control1",
+ .gpio = GPIO122,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x18, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 17, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 10, 2},
+ },
+
+ [RF_CONTROL2] = {
+ .name = "rf_control2",
+ .gpio = GPIO123,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x18, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 18, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 12, 2},
+ },
+
+ [RF_CONTROL3] = {
+ .name = "rf_control3",
+ .gpio = GPIO124,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x1c, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 19, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 14, 2},
+ },
+
+ [RF_CONTROL4] = {
+ .name = "rf_control4",
+ .gpio = GPIO125,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x1c, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 20, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 16, 2},
+ },
+
+ [RF_CONTROL5] = {
+ .name = "rf_control5",
+ .gpio = GPIO126,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x1c, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 21, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 18, 2},
+ },
+
+ [RF_CONTROL6] = {
+ .name = "rf_control6",
+ .gpio = GPIO127,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x20, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 22, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 20, 2},
+ },
+
+ [RF_CONTROL7] = {
+ .name = "rf_control7",
+ .gpio = GPIO128,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x20, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 23, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 22, 2},
+ },
+
+ [RF_CONTROL8] = {
+ .name = "rf_control8",
+ .gpio = GPIO129,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x20, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 24, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 24, 2},
+ },
+
+ [RF_CONTROL9] = {
+ .name = "rf_control9",
+ .gpio = GPIO130,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x24, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 25, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 26, 2},
+ },
+
+ [RF_CONTROL10] = {
+ .name = "rf_control10",
+ .gpio = GPIO131,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x24, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 26, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 28, 2},
+ },
+
+ [RF_CONTROL11] = {
+ .name = "rf_control11",
+ .gpio = GPIO132,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x24, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 27, 1},
+ .ioCfg = {IO_CFG_BASE+0x2c, 30, 2},
+ },
+
+ [RF_CONTROL12] = {
+ .name = "rf_control12",
+ .gpio = GPIO133,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x28, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 28, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 0, 2},
+ },
+
+ [RF_CONTROL13] = {
+ .name = "rf_control13",
+ .gpio = GPIO134,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x28, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 29, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 2, 2},
+ },
+
+ [RF_CONTROL14] = {
+ .name = "rf_control14",
+ .gpio = GPIO135,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x28, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 30, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 4, 2},
+ },
+
+ [RF_CONTROL15] = {
+ .name = "rf_control15",
+ .gpio = GPIO136,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x2c, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x1c, 31, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 6, 2},
+ },
+
+ [RF_CONTROL16] = {
+ .name = "rf_control16",
+ .gpio = GPIO137,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x2c, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 0, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 8, 2},
+ },
+
+ [RF_CONTROL17] = {
+ .name = "rf_control17",
+ .gpio = GPIO138,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x2c, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 1, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 10, 2},
+ },
+
+ [RF_CONTROL18] = {
+ .name = "rf_control18",
+ .gpio = GPIO139,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x30, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 2, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 12, 2},
+ },
+
+ [RF_CONTROL19] = {
+ .name = "rf_control19",
+ .gpio = GPIO140,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x30, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 3, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 14, 2},
+ },
+
+ [RF_CONTROL20] = {
+ .name = "rf_control20",
+ .gpio = GPIO141,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x30, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 4, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 16, 2},
+ },
+
+ [RF_CONTROL21] = {
+ .name = "rf_control21",
+ .gpio = GPIO142,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x34, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 5, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 18, 2},
+ },
+
+ [RF_CONTROL22] = {
+ .name = "rf_control22",
+ .gpio = GPIO143,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x34, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 6, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 20, 2},
+ },
+
+ [RF_CONTROL23] = {
+ .name = "rf_control23",
+ .gpio = GPIO144,
+ .flag = 0,
+ .pdFuncSel = {PD_FUNC_SEL_BASE+0x34, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 7, 1},
+ .ioCfg = {IO_CFG_BASE+0x30, 22, 2},
+ },
+
+ [RMII_CLK_I] = {
+ .name = "rmii_clk_i",
+ .gpio = GPIO155,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 8, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [RMII_CLK_O] = {
+ .name = "rmii_clk_o",
+ .gpio = GPIO154,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 9, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [RMII_TXEN] = {
+ .name = "rmii_txen",
+ .gpio = GPIO145,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 10, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [RMII_RXEN] = {
+ .name = "rmii_rxen",
+ .gpio = GPIO146,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 11, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [RMII_RXD0] = {
+ .name = "rmii_rxd0",
+ .gpio = GPIO147,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 12, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [RMII_RXD1] = {
+ .name = "rmii_rxd1",
+ .gpio = GPIO148,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 13, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [RMII_TXD0] = {
+ .name = "rmii_txd0",
+ .gpio = GPIO149,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 14, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [RMII_TXD1] = {
+ .name = "rmii_txd1",
+ .gpio = GPIO150,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 15, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [MDC_SCLK] = {
+ .name = "mdc_sclk",
+ .gpio = GPIO151,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 16, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [MDC_SDIO] = {
+ .name = "mdc_sdio",
+ .gpio = GPIO152,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 17, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+
+ [PHY_RST] = {
+ .name = "phy_rst",
+ .gpio = GPIO153,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {TOP_FUNC_SEL_BASE+0x20, 18, 1},
+ .ioCfg = {IO_CFG_BASE+0x40, 8, 8},
+ },
+};
+
+UINT32 gGpioNumMax = sizeof(gGpioInfoTable) / sizeof(T_Gpio);
+
diff --git a/boot/common/src/uboot/drivers/gpio/hal_gpioInfo_v3.c b/boot/common/src/uboot/drivers/gpio/hal_gpioInfo_v3.c
new file mode 100644
index 0000000..64a0bdd
--- /dev/null
+++ b/boot/common/src/uboot/drivers/gpio/hal_gpioInfo_v3.c
@@ -0,0 +1,1432 @@
+/*******************************************************************************
+ * Copyright (C) 2016, ZXIC Corporation.
+ *
+ * File Name: hal_gpioinfo.c
+ * File Mark:
+ * Description: gpio information table
+ * Others:
+ * Version: 1.0
+ * Author: zhangdongdong
+ * Date: 2015-07-31
+ * History 1:
+ * Date:
+ * Version:
+ * Author:
+ * Modification:
+ ********************************************************************************/
+
+/****************************************************************************
+* Include files
+****************************************************************************/
+#include <drvs_gpio.h>
+#include "hal_gpio_v3.h"
+
+/****************************************************************************
+* Local Macros
+****************************************************************************/
+ /*PIN MUX*/
+#define ZX297520V2_PIN_MUX 0x01303000
+#define GPIO_PINMUX_REG_BASE ZX297520V2_PIN_MUX
+
+ /*PAD*/
+#define ZX297520V2_A1_PAD_CTRL0 0x0013C000
+#define PAD_CTRL_REG_BASE ZX297520V2_A1_PAD_CTRL0
+
+#define PD_FUNC_SEL_BASE (GPIO_PINMUX_REG_BASE)
+#define AON_FUNC_SEL_BASE (PAD_CTRL_REG_BASE)
+#define TOP_FUNC_SEL_BASE (PAD_CTRL_REG_BASE)
+#define IO_CFG_BASE (PAD_CTRL_REG_BASE+0x800)
+
+#define CPU_SHIFT 0x0
+
+/****************************************************************************
+* Local Types
+****************************************************************************/
+
+
+/****************************************************************************
+* Local Constants
+****************************************************************************/
+
+/****************************************************************************
+* Local Variables
+****************************************************************************/
+
+/****************************************************************************
+* Global Constants
+****************************************************************************/
+
+/****************************************************************************
+* Global Variables
+****************************************************************************/
+
+/****************************************************************************
+* Global Function Prototypes
+****************************************************************************/
+T_Gpio gGpioInfoTable[] =
+{
+ [NAND_WE] = {
+ .name = "nand_we",
+ .gpio = GPIO0,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 0, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 0, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 0, 2},
+ },
+
+ [NAND_CSN] = {
+ .name = "nand_csn",
+ .gpio = GPIO1,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 1, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 1, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 2, 2},
+ },
+
+ [NAND_READY] = {
+ .name = "nand_ready",
+ .gpio = GPIO2,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 2, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 2, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 4, 2},
+ },
+
+ [NAND_CLE_] = {
+ .name = "nand_cle",
+ .gpio = GPIO3,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 3, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 3, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 6, 2},
+ },
+
+ [NAND_ALE_] = {
+ .name = "nand_ale",
+ .gpio = GPIO4,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 4, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 4, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 8, 2},
+ },
+
+ [NAND_RE] = {
+ .name = "nand_re",
+ .gpio = GPIO5,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 5, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 5, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 10, 2},
+ },
+
+ [NAND_WP] = {
+ .name = "nand_wp",
+ .gpio = GPIO6,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 6, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 6, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 12, 2},
+ },
+
+ [NAND_DATA0] = {
+ .name = "nand_data0",
+ .gpio = GPIO7,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 7, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 7, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 14, 2},
+ },
+
+ [NAND_DATA1] = {
+ .name = "nand_data1",
+ .gpio = GPIO8,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 8, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 8, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 16, 2},
+ },
+
+ [NAND_DATA2] = {
+ .name = "nand_data2",
+ .gpio = GPIO9,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 9, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 9, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 18, 2},
+ },
+
+ [NAND_DATA3] = {
+ .name = "nand_data3",
+ .gpio = GPIO10,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 10, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 10, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 20, 2},
+ },
+
+ [NAND_DATA4] = {
+ .name = "nand_data4",
+ .gpio = GPIO11,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 11, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 11, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 22, 2},
+ },
+
+ [NAND_DATA5] = {
+ .name = "nand_data5",
+ .gpio = GPIO12,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 12, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 12, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 24, 2},
+ },
+
+ [NAND_DATA6] = {
+ .name = "nand_data6",
+ .gpio = GPIO13,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 13, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 13, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 26, 2},
+ },
+
+ [NAND_DATA7] = {
+ .name = "nand_data7",
+ .gpio = GPIO14,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 14, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 14, 1},
+ .ioCfg = {(IO_CFG_BASE)>>CPU_SHIFT, 28, 2},
+ },
+
+
+ [CLK_OUT0] = {
+ .name = "clk_out0",
+ .gpio = GPIO15,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 0, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x4)>>CPU_SHIFT, 10, 2},
+ },
+
+ [CLK_OUT1] = {
+ .name = "clk_out1",
+ .gpio = GPIO16,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 2, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x4)>>CPU_SHIFT, 12, 2},
+ },
+
+ [CLK_OUT2] = {
+ .name = "clk_out2",
+ .gpio = GPIO17,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE)>>CPU_SHIFT, 15, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 4, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x30)>>CPU_SHIFT, 0, 1},
+ .ioCfg = {(IO_CFG_BASE+0x4)>>CPU_SHIFT, 14, 2},
+ },
+
+ [CLK_32K_OUT] = {
+ .name = "clk_32k_out",
+ .gpio = GPIO18,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 6, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x4)>>CPU_SHIFT, 16, 2},
+ },
+
+ [RMII_CLK_I] = {
+ .name = "rmii_clk_i",
+ .gpio = GPIO19,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 15, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [RMII_CLK_O] = {
+ .name = "rmii_clk_o",
+ .gpio = GPIO20,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 16, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [CLK_REQ0] = {
+ .name = "clk_req0",
+ .gpio = GPIO21,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 8, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x4)>>CPU_SHIFT, 18, 2},
+ },
+
+ [CLK_REQ1] = {
+ .name = "clk_req1",
+ .gpio = GPIO22,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 10, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x4)>>CPU_SHIFT, 20, 2},
+ },
+
+ [PWR_CTRL] = {
+ .name = "pwr_ctrl",
+ .gpio = GPIO23,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 12, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x4)>>CPU_SHIFT, 22, 2},
+ },
+
+ [PS_HOLD] = {
+ .name = "ps_hold",
+ .gpio = GPIO24,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x4)>>CPU_SHIFT, 28, 2},
+ },
+
+ [SSP0_CS] = {
+ .name = "ssp0_cs",
+ .gpio = GPIO25,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 17, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 0, 2},
+ },
+
+ [SSP0_CLK] = {
+ .name = "ssp0_clk",
+ .gpio = GPIO26,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 18, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 2, 2},
+ },
+
+ [SSP0_RXD] = {
+ .name = "ssp0_rxd",
+ .gpio = GPIO27,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 19, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 4, 2},
+ },
+
+ [SSP0_TXD] = {
+ .name = "ssp0_txd",
+ .gpio = GPIO28,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 20, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 6, 2},
+ },
+
+ [UART0_RXD] = {
+ .name = "uart0_rxd",
+ .gpio = GPIO29,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x04)>>CPU_SHIFT, 0, 1},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 14, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 0, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 10, 2},
+ },
+
+ [UART0_TXD] = {
+ .name = "uart0_txd",
+ .gpio = GPIO30,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x04)>>CPU_SHIFT, 1, 1},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 16, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 1, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 12, 2},
+ },
+
+ [UART0_CTS] = {
+ .name = "uart0_cts",
+ .gpio = GPIO31,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x04)>>CPU_SHIFT, 2, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 18, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 2, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 14, 2},
+ },
+
+ [UART0_RTS] = {
+ .name = "uart0_rts",
+ .gpio = GPIO32,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x04)>>CPU_SHIFT, 4, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE)>>CPU_SHIFT, 20, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 3, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 16, 2},
+ },
+
+ [UART1_RXD] = {
+ .name = "uart1_rxd",
+ .gpio = GPIO33,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 6, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 4, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 18, 2},
+ },
+
+ [UART1_TXD] = {
+ .name = "uart1_txd",
+ .gpio = GPIO34,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 8, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 5, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 20, 2},
+ },
+
+ [I2S0_WS] = {
+ .name = "i2s0_ws",
+ .gpio = GPIO35,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 10, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 6, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 22, 2},
+ },
+
+ [I2S0_CLK] = {
+ .name = "i2s0_clk",
+ .gpio = GPIO36,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 12, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 7, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 24, 2},
+ },
+
+ [I2S0_DIN] = {
+ .name = "i2s0_din",
+ .gpio = GPIO37,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 14, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 8, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 26, 2},
+ },
+
+ [I2S0_DOUT] = {
+ .name = "i2s0_dout",
+ .gpio = GPIO38,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 16, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 9, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 28, 2},
+ },
+
+ [I2S1_WS] = {
+ .name = "i2s1_ws",
+ .gpio = GPIO39,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 18, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 10, 1},
+ .ioCfg = {(IO_CFG_BASE+0x8)>>CPU_SHIFT, 30, 2},
+ },
+
+ [I2S1_CLK] = {
+ .name = "i2s1_clk",
+ .gpio = GPIO40,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 20, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 11, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 0, 2},
+ },
+
+ [I2S1_DIN] = {
+ .name = "i2s1_din",
+ .gpio = GPIO41,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 22, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 12, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 2, 2},
+ },
+
+ [I2S1_DOUT] = {
+ .name = "i2s1_dout",
+ .gpio = GPIO42,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 24, 2},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 13, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 4, 2},
+ },
+
+ [SCL0] = {
+ .name = "scl0",
+ .gpio = GPIO43,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 0, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 6, 2},
+ },
+
+ [SDA0] = {
+ .name = "sda0",
+ .gpio = GPIO44,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 2, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 8, 2},
+ },
+
+ [SCL1] = {
+ .name = "scl1",
+ .gpio = GPIO45,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 14, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 10, 2},
+ },
+
+ [SDA1] = {
+ .name = "sda1",
+ .gpio = GPIO46,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 15, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 12, 2},
+ },
+
+ [EXT_INT0] = {
+ .name = "ext_int0",
+ .gpio = GPIO47,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 4, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 14, 2},
+ },
+
+ [EXT_INT1] = {
+ .name = "ext_int1",
+ .gpio = GPIO48,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 6, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 16, 2},
+ },
+
+ [EXT_INT2] = {
+ .name = "ext_int2",
+ .gpio = GPIO49,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 8, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 18, 2},
+ },
+
+ [EXT_INT3] = {
+ .name = "ext_int3",
+ .gpio = GPIO50,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 10, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 16, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 20, 2},
+ },
+
+ [EXT_INT4] = {
+ .name = "ext_int4",
+ .gpio = GPIO51,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 12, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 17, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 22, 2},
+ },
+
+ [EXT_INT5] = {
+ .name = "ext_int5",
+ .gpio = GPIO52,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 14, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 18, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 24, 2},
+ },
+
+ [EXT_INT6] = {
+ .name = "ext_int6",
+ .gpio = GPIO53,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 16, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 19, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 26, 2},
+ },
+
+ [EXT_INT7] = {
+ .name = "ext_int7",
+ .gpio = GPIO54,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x4)>>CPU_SHIFT, 18, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 20, 1},
+ .ioCfg = {(IO_CFG_BASE+0xc)>>CPU_SHIFT, 28, 2},
+ },
+
+ [RMII_TXEN] = {
+ .name = "rmii_txen",
+ .gpio = GPIO55,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 0, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [RMII_RXEN] = {
+ .name = "rmii_rxen",
+ .gpio = GPIO56,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 1, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [RMII_RXD0] = {
+ .name = "rmii_rxd0",
+ .gpio = GPIO57,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 2, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [RMII_RXD1] = {
+ .name = "rmii_rxd1",
+ .gpio = GPIO58,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 3, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [RMII_TXD0] = {
+ .name = "rmii_txd0",
+ .gpio = GPIO59,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 4, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [RMII_TXD1] = {
+ .name = "rmii_txd1",
+ .gpio = GPIO60,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 5, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [MDC_SCLK] = {
+ .name = "mdc_sclk",
+ .gpio = GPIO61,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 6, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [MDC_SDIO] = {
+ .name = "mdc_sdio",
+ .gpio = GPIO62,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 7, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [PHY_RST] = {
+ .name = "phy_rst",
+ .gpio = GPIO63,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 8, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [PHY_INT] = {
+ .name = "phy_int",
+ .gpio = GPIO64,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 9, 1},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [PHY_WAKE] = {
+ .name = "phy_wake",
+ .gpio = GPIO65,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x3c)>>CPU_SHIFT, 0, 8},
+ },
+
+ [SD0_CLK] = {
+ .name = "sd0_clk",
+ .gpio = GPIO66,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 0, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 10, 1},
+ .ioCfg = {(IO_CFG_BASE+0x10)>>CPU_SHIFT, 0, 8},
+ },
+
+ [SD0_CMD] = {
+ .name = "sd0_cmd",
+ .gpio = GPIO67,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 2, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 11, 1},
+ .ioCfg = {(IO_CFG_BASE+0x10)>>CPU_SHIFT, 8, 8},
+ },
+
+ [SD0_DATA0] = {
+ .name = "sd0_data0",
+ .gpio = GPIO68,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 4, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 12, 1},
+ .ioCfg = {(IO_CFG_BASE+0x10)>>CPU_SHIFT, 16, 8},
+ },
+
+ [SD0_DATA1] = {
+ .name = "sd0_data1",
+ .gpio = GPIO69,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 6, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 13, 1},
+ .ioCfg = {(IO_CFG_BASE+0x10)>>CPU_SHIFT, 24, 8},
+ },
+
+ [SD0_DATA2] = {
+ .name = "sd0_data2",
+ .gpio = GPIO70,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 8, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 14, 1},
+ .ioCfg = {(IO_CFG_BASE+0x14)>>CPU_SHIFT, 0, 8},
+ },
+
+ [SD0_DATA3] = {
+ .name = "sd0_data3",
+ .gpio = GPIO71,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 10, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 15, 1},
+ .ioCfg = {(IO_CFG_BASE+0x14)>>CPU_SHIFT, 8, 8},
+ },
+
+ [SD1_CLK] = {
+ .name = "sd1_clk",
+ .gpio = GPIO72,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 16, 1},
+ .ioCfg = {(IO_CFG_BASE+0x14)>>CPU_SHIFT, 16, 8},
+ },
+
+ [SD1_CMD] = {
+ .name = "sd1_cmd",
+ .gpio = GPIO73,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 0, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 12, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 17, 1},
+ .ioCfg = {(IO_CFG_BASE+0x14)>>CPU_SHIFT, 24, 8},
+ },
+
+ [SD1_DATA0] = {
+ .name = "sd1_data0",
+ .gpio = GPIO74,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 2, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 14, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 18, 1},
+ .ioCfg = {(IO_CFG_BASE+0x18)>>CPU_SHIFT, 0, 8},
+ },
+
+ [SD1_DATA1] = {
+ .name = "sd1_data1",
+ .gpio = GPIO75,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 4, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 16, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 19, 1},
+ .ioCfg = {(IO_CFG_BASE+0x18)>>CPU_SHIFT, 8, 8},
+ },
+
+ [SD1_DATA2] = {
+ .name = "sd1_data2",
+ .gpio = GPIO76,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 6, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 18, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 20, 1},
+ .ioCfg = {(IO_CFG_BASE+0x18)>>CPU_SHIFT, 16, 8},
+ },
+
+ [SD1_DATA3] = {
+ .name = "sd1_data3",
+ .gpio = GPIO77,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 8, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 20, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 21, 1},
+ .ioCfg = {(IO_CFG_BASE+0x18)>>CPU_SHIFT, 24, 8},
+ },
+
+ [JTAG_TCK] = {
+ .name = "jtag_tck",
+ .gpio = GPIO78,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 0, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 0, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 22, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 0, 2},
+ },
+
+ [JTAG_TDI] = {
+ .name = "jtag_tdi",
+ .gpio = GPIO79,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 2, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 2, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 23, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 2, 2},
+ },
+
+ [JTAG_TDO] = {
+ .name = "jtag_tdo",
+ .gpio = GPIO80,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 4, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 4, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 24, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 4, 2},
+ },
+
+ [JTAG_TMS] = {
+ .name = "jtag_tms",
+ .gpio = GPIO81,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 6, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 6, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 25, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 6, 2},
+ },
+
+ [JTAG_TRST] = {
+ .name = "jtag_trst",
+ .gpio = GPIO82,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 8, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 8, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x24)>>CPU_SHIFT, 26, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 8, 2},
+ },
+
+ [KBC_0] = {
+ .name = "kbc_0",
+ .gpio = GPIO83,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 10, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 10, 2},
+ },
+
+ [KBC_1] = {
+ .name = "kbc_1",
+ .gpio = GPIO84,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 12, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 12, 2},
+ },
+
+ [KBR_0] = {
+ .name = "kbr_0",
+ .gpio = GPIO85,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 14, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 14, 2},
+ },
+
+ [KBR_1] = {
+ .name = "kbr_1",
+ .gpio = GPIO86,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 16, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 16, 2},
+ },
+
+ [CAM_SPI_CS] = {
+ .name = "cam_spi_cs",
+ .gpio = GPIO87,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 0, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 18, 2},
+ },
+
+ [CAM_SPI_CLK] = {
+ .name = "cam_spi_clk",
+ .gpio = GPIO88,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 1, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 20, 2},
+ },
+
+ [CAM_SPI_DATA0] = {
+ .name = "cam_spi_data0",
+ .gpio = GPIO89,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 2, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 22, 2},
+ },
+
+ [CAM_SPI_DATA1] = {
+ .name = "cam_spi_data1",
+ .gpio = GPIO90,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 10, 1},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 3, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 24, 2},
+ },
+
+ [CAM_SPI_DATA2] = {
+ .name = "cam_spi_data2",
+ .gpio = GPIO91,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 4, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 26, 2},
+ },
+
+ [CAM_SPI_DATA3] = {
+ .name = "cam_spi_data3",
+ .gpio = GPIO92,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 5, 1},
+ .ioCfg = {(IO_CFG_BASE+0x1c)>>CPU_SHIFT, 28, 2},
+ },
+
+ [SPIFC_CS] = {
+ .name = "spifc_cs",
+ .gpio = GPIO93,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 6, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 0, 2},
+ },
+
+ [SPIFC_CLK] = {
+ .name = "spifc_clk",
+ .gpio = GPIO94,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 7, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 2, 2},
+ },
+
+ [SPIFC_DATA0] = {
+ .name = "spifc_data0",
+ .gpio = GPIO95,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 8, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 4, 2},
+ },
+
+ [SPIFC_DATA1] = {
+ .name = "spifc_data1",
+ .gpio = GPIO96,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 9, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 6, 2},
+ },
+
+ [SPIFC_DATA2] = {
+ .name = "spifc_data2",
+ .gpio = GPIO97,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 10, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 8, 2},
+ },
+
+ [SPIFC_DATA3] = {
+ .name = "spifc_data3",
+ .gpio = GPIO98,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 11, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 10, 2},
+ },
+
+ [RESETB_OUT] = {
+ .name = "resetb_out",
+ .gpio = GPIO99,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 12, 2},
+ },
+
+ [RF_SPI_STR] = {
+ .name = "rf_spi_str",
+ .gpio = GPIO100,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 12, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 14, 2},
+ },
+
+ [RF_SPI_CLK] = {
+ .name = "rf_spi_clk",
+ .gpio = GPIO101,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 13, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 16, 2},
+ },
+
+ [RF_SPI_DATA] = {
+ .name = "rf_spi_data",
+ .gpio = GPIO102,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 14, 1},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 18, 2},
+ },
+
+ [RF_ISOLATE_EN] = {
+ .name = "rf_isolate_en",
+ .gpio = GPIO103,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x20)>>CPU_SHIFT, 20, 2},
+ },
+
+ [RF_CONTROL0] = {
+ .name = "rf_control0",
+ .gpio = GPIO104,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 15, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 0, 2},
+ },
+
+ [RF_CONTROL1] = {
+ .name = "rf_control1",
+ .gpio = GPIO105,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 16, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 2, 2},
+ },
+
+ [RF_CONTROL2] = {
+ .name = "rf_control2",
+ .gpio = GPIO106,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 17, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 4, 2},
+ },
+
+ [RF_CONTROL3] = {
+ .name = "rf_control3",
+ .gpio = GPIO107,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x14)>>CPU_SHIFT, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 18, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 6, 2},
+ },
+
+ [RF_CONTROL4] = {
+ .name = "rf_control4",
+ .gpio = GPIO108,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x14)>>CPU_SHIFT, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 19, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 8, 2},
+ },
+
+ [RF_CONTROL5] = {
+ .name = "rf_control5",
+ .gpio = GPIO109,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x14)>>CPU_SHIFT, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 20, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 10, 2},
+ },
+
+ [RF_CONTROL6] = {
+ .name = "rf_control6",
+ .gpio = GPIO110,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x18)>>CPU_SHIFT, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 21, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 12, 2},
+ },
+
+ [RF_CONTROL7] = {
+ .name = "rf_control7",
+ .gpio = GPIO111,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x18)>>CPU_SHIFT, 10, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 22, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 14, 2},
+ },
+
+ [RF_CONTROL8] = {
+ .name = "rf_control8",
+ .gpio = GPIO112,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x18)>>CPU_SHIFT, 20, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 23, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 16, 2},
+ },
+
+ [RF_CONTROL9] = {
+ .name = "rf_control9",
+ .gpio = GPIO113,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 0, 10},
+ .aonFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 24, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 18, 2},
+ },
+
+ [RF_CONTROL10] = {
+ .name = "rf_control10",
+ .gpio = GPIO114,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 10, 10},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 18, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 25, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 20, 2},
+ },
+
+ [RF_CONTROL11] = {
+ .name = "rf_control11",
+ .gpio = GPIO115,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x1c)>>CPU_SHIFT, 20, 10},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 20, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 26, 1},
+ .ioCfg = {(IO_CFG_BASE+0x24)>>CPU_SHIFT, 22, 2},
+ },
+
+ [RF_CONTROL12] = {
+ .name = "rf_control12",
+ .gpio = GPIO133,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 0, 10},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 22, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 27, 1},
+ .ioCfg = {(IO_CFG_BASE+0x40)>>CPU_SHIFT, 0, 8},
+ },
+
+ [RF_CONTROL13] = {
+ .name = "rf_control13",
+ .gpio = GPIO134,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 10, 10},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 24, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 28, 1},
+ .ioCfg = {(IO_CFG_BASE+0x40)>>CPU_SHIFT, 8, 8},
+ },
+
+ [RF_CONTROL14] = {
+ .name = "rf_control14",
+ .gpio = GPIO135,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x20)>>CPU_SHIFT, 20, 10},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x8)>>CPU_SHIFT, 26, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 29, 1},
+ .ioCfg = {(IO_CFG_BASE+0x40)>>CPU_SHIFT, 16, 8},
+ },
+
+ [SIM_RST] = {
+ .name = "sim_rst",
+ .gpio = GPIO116,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 22, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x28)>>CPU_SHIFT, 0, 8},
+ },
+
+ [SIM_CLK] = {
+ .name = "sim_clk",
+ .gpio = GPIO117,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 24, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x28)>>CPU_SHIFT, 0, 8},
+ },
+
+ [SIM_DATA] = {
+ .name = "sim_data",
+ .gpio = GPIO118,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0xc)>>CPU_SHIFT, 26, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x28)>>CPU_SHIFT, 8, 8},
+ },
+
+ [GPIO_119] = {
+ .name = "gpio119",
+ .gpio = GPIO119,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 0, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 0, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x2c)>>CPU_SHIFT, 0, 1},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 0, 2},
+ },
+
+ [GPIO_120] = {
+ .name = "gpio120",
+ .gpio = GPIO120,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 2, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 2, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x2c)>>CPU_SHIFT, 1, 1},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 2, 2},
+ },
+
+ [GPIO_121] = {
+ .name = "gpio121",
+ .gpio = GPIO121,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 4, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 4, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x2c)>>CPU_SHIFT, 2, 1},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 4, 2},
+ },
+
+ [GPIO_122] = {
+ .name = "gpio122",
+ .gpio = GPIO122,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 6, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 6, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x2c)>>CPU_SHIFT, 3, 1},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 6, 2},
+ },
+
+ [GPIO_123] = {
+ .name = "gpio123",
+ .gpio = GPIO123,
+ .flag = 0,
+ .pdFuncSel = {(PD_FUNC_SEL_BASE+0x28)>>CPU_SHIFT, 8, 2},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 8, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x2c)>>CPU_SHIFT, 4, 1},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 8, 2},
+ },
+
+ [GPIO_124] = {
+ .name = "gpio124",
+ .gpio = GPIO124,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 10, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x2c)>>CPU_SHIFT, 5, 1},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 10, 2},
+ },
+
+ [GPIO_125] = {
+ .name = "gpio125",
+ .gpio = GPIO125,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 12, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x2c)>>CPU_SHIFT, 6, 1},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 12, 2},
+ },
+
+ [GPIO_126] = {
+ .name = "gpio126",
+ .gpio = GPIO126,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 14, 2},
+ .topFuncSel = {(TOP_FUNC_SEL_BASE+0x2c)>>CPU_SHIFT, 7, 1},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 14, 2},
+ },
+
+ [GPIO_127] = {
+ .name = "gpio127",
+ .gpio = GPIO127,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 16, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 16, 2},
+ },
+
+ [GPIO_128] = {
+ .name = "gpio128",
+ .gpio = GPIO128,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 18, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 18, 2},
+ },
+
+ [GPIO_129] = {
+ .name = "gpio129",
+ .gpio = GPIO129,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 20, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 20, 2},
+ },
+
+ [GPIO_130] = {
+ .name = "gpio130",
+ .gpio = GPIO130,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 22, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 22, 2},
+ },
+
+ [GPIO_131] = {
+ .name = "gpio131",
+ .gpio = GPIO131,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 24, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 24, 2},
+ },
+
+ [GPIO_132] = {
+ .name = "gpio132",
+ .gpio = GPIO132,
+ .flag = 0,
+ .pdFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .aonFuncSel = {(AON_FUNC_SEL_BASE+0x10)>>CPU_SHIFT, 26, 2},
+ .topFuncSel = {INVLID_ADDR, INVLID_VALUE, INVLID_VALUE},
+ .ioCfg = {(IO_CFG_BASE+0x2c)>>CPU_SHIFT, 26, 2},
+ },
+
+};
+
+UINT32 gGpioNumMax = sizeof(gGpioInfoTable) / sizeof(T_Gpio);
+
diff --git a/boot/common/src/uboot/drivers/gpio/hal_gpio_v2.h b/boot/common/src/uboot/drivers/gpio/hal_gpio_v2.h
new file mode 100644
index 0000000..cafa03a
--- /dev/null
+++ b/boot/common/src/uboot/drivers/gpio/hal_gpio_v2.h
@@ -0,0 +1,234 @@
+/*******************************************************************************
+* Copyright (C) 2014, ZTE Corporation.
+*
+* File Name: hal_gpio.h
+* File Mark:
+* Description:
+* Others:
+* Version: v1.0
+* Author: zhangdongdong
+* Date: 2015-07-31
+* History 1:
+* Date:
+* Version:
+* Author:
+* Modification:
+* History 2:
+********************************************************************************/
+
+#ifndef _HAL_GPIO_H
+#define _HAL_GPIO_H
+
+
+/****************************************************************************
+* Include files
+****************************************************************************/
+
+/****************************************************************************
+* Macros
+****************************************************************************/
+#define reg32(addr) (*(volatile unsigned long *)(addr))
+
+#define get_reg_val(regAddr) reg32(regAddr)
+#define set_reg_val(regAddr,regVal) reg32(regAddr) = regVal
+
+#define set_reg_bit(regName, bitAddr, bitValue) \
+do{ \
+ if(bitValue == TRUE) \
+ reg32(regName) |= (0x1<<bitAddr); \
+ else \
+ reg32(regName) &= ~(0x1<<bitAddr); \
+}while(0)
+
+#define set_reg_bits(regName, bitsAddr, bitsLen, bitsValue) \
+do{ \
+ reg32(regName) = (reg32(regName)&(~(((0x1<<bitsLen)-0x1)<<bitsAddr)))|(bitsValue<<bitsAddr);\
+}while(0)
+
+#define INVLID_ADDR 0xffffffff
+#define INVLID_VALUE 0xffff
+/****************************************************************************
+* Types
+****************************************************************************/
+
+typedef signed char SINT8;
+typedef unsigned char UINT8;
+
+typedef signed short SINT16;
+typedef unsigned short UINT16;
+
+typedef signed int SINT32;
+typedef unsigned int UINT32;
+typedef signed char CHAR;
+
+typedef struct _T_GpioRegCfgInfo
+{
+ UINT32 regBase; /*gpio operation register base address*/
+ UINT16 offset; /*gpio operation domain offset in register*/
+ UINT16 size; /*gpio operation domain size*/
+} T_GpioRegCfgInfo;
+
+typedef struct _T_Gpio
+{
+ const char name[22]; /*gpio name*/
+ const UINT32 gpio;
+ UINT32 flag;
+ const T_GpioRegCfgInfo pdFuncSel; /*gpio pd func sel*/
+ const T_GpioRegCfgInfo aonFuncSel; /*gpio aon func sel*/
+ const T_GpioRegCfgInfo topFuncSel; /*gpio top func sel, 0:aon 1:pd*/
+ const T_GpioRegCfgInfo ioCfg; /*gpio config*/
+} T_Gpio;
+
+typedef enum{
+
+ NAND_WE = 0 ,
+ NAND_CSN = 1 ,
+ NAND_READY = 2 ,
+ NAND_CLE_ = 3 ,
+ NAND_ALE_ = 4 ,
+ NAND_RE = 5 ,
+ NAND_WP = 6 ,
+ NAND_DATA0 = 7 ,
+ NAND_DATA1 = 8 ,
+ NAND_DATA2 = 9 ,
+ NAND_DATA3 = 10 ,
+ NAND_DATA4 = 11 ,
+ NAND_DATA5 = 12 ,
+ NAND_DATA6 = 13 ,
+ NAND_DATA7 = 14 ,
+ CLK_OUT0 = 15 ,
+ CLK_OUT1 = 16 ,
+ CLK_OUT2 = 17 ,
+ CLK_32K_OUT = 18 ,
+ CLK_REQ0 = 19 ,
+ PWR_CTRL1 = 20 ,
+ SSP0_CS = 21 ,
+ SSP0_CLK = 22 ,
+ SSP0_RXD = 23 ,
+ SSP0_TXD = 24 ,
+ UART0_RXD = 25 ,
+ UART0_TXD = 26 ,
+ UART0_CTS = 27 ,
+ UART0_RTS = 28 ,
+ I2S0_WS = 29 ,
+ I2S0_CLK = 30 ,
+ I2S0_DIN = 31 ,
+ I2S0_DOUT = 32 ,
+ I2S1_WS = 33 ,
+ I2S1_CLK = 34 ,
+ I2S1_DIN = 35 ,
+ I2S1_DOUT = 36 ,
+ SCL0 = 37 ,
+ SDA0 = 38 ,
+ SCL1 = 39 ,
+ SDA1 = 40 ,
+ EXT_INT0 = 41 ,
+ EXT_INT1 = 42 ,
+ EXT_INT2 = 43 ,
+ EXT_INT3 = 44 ,
+ EXT_INT4 = 45 ,
+ EXT_INT5 = 46 ,
+ EXT_INT6 = 47 ,
+ EXT_INT7 = 48 ,
+ SD1_CLK = 49 ,
+ SD1_CMD = 50 ,
+ SD1_DATA0 = 51 ,
+ SD1_DATA1 = 52 ,
+ SD1_DATA2 = 53 ,
+ SD1_DATA3 = 54 ,
+ JTAG_TCK = 55 ,
+ JTAG_TDI = 56 ,
+ JTAG_TDO = 57 ,
+ JTAG_TMS = 58 ,
+ JTAG_TRST = 59 ,
+ KBC_0 = 60 ,
+ KBC_1 = 61 ,
+ KBC_2 = 62 ,
+ KBC_3 = 63 ,
+ KBR_0 = 64 ,
+ KBR_1 = 65 ,
+ KBR_2 = 66 ,
+ KBR_3 = 67 ,
+ LTE_TDD_TXRX_DATA0 = 68 ,
+ LTE_TDD_TXRX_DATA1 = 69 ,
+ LTE_TDD_TXRX_DATA2 = 70 ,
+ LTE_TDD_TXRX_DATA3 = 71 ,
+ LTE_TDD_TXRX_DATA4 = 72 ,
+ LTE_TDD_TXRX_DATA5 = 73 ,
+ LTE_TDD_TXRX_DATA6 = 74 ,
+ LTE_TDD_TXRX_DATA7 = 75 ,
+ LTE_TDD_TXRX_DATA8 = 76 ,
+ LTE_TDD_TXRX_DATA9 = 77 ,
+ LTE_TDD_TXRX_DATA10 = 78 ,
+ LTE_TDD_TXRX_DATA11 = 79 ,
+ LTE_TDD_RX_DATA0 = 80 ,
+ LTE_TDD_RX_DATA1 = 81 ,
+ LTE_TDD_RX_DATA2 = 82 ,
+ LTE_TDD_RX_DATA3 = 83 ,
+ LTE_TDD_RX_DATA4 = 84 ,
+ LTE_TDD_RX_DATA5 = 85 ,
+ LTE_TDD_RX_DATA6 = 86 ,
+ LTE_TDD_RX_DATA7 = 87 ,
+ LTE_TDD_RX_DATA8 = 88 ,
+ LTE_TDD_RX_DATA9 = 89 ,
+ LTE_TDD_RX_DATA10 = 90 ,
+ LTE_TDD_RX_DATA11 = 91 ,
+ FCLK = 92 ,
+ FRAME_TX = 93 ,
+ FRAME_RX = 94 ,
+ MCLK = 95 ,
+ LTE_REF_CLK = 96 ,
+ LTE_TXRX_EN = 97 ,
+ LTE_TXRX_SWITCH = 98 ,
+ RESETB_OUT = 99 ,
+ PDN_GSM = 100,
+ WAKE_UP = 101,
+ RF_SPI0_STR0 = 102,
+ RF_SPI0_STR1 = 103,
+ RF_SPI0_CLK = 104,
+ RF_SPI0_DIN = 105,
+ RF_SPI0_DATA = 106,
+ RF_SPI1_STR = 107,
+ RF_SPI1_CLK = 108,
+ RF_SPI1_DIN = 109,
+ RF_SPI1_DATA = 110,
+ RF_CONTROL0 = 111,
+ RF_CONTROL1 = 112,
+ RF_CONTROL2 = 113,
+ RF_CONTROL3 = 114,
+ RF_CONTROL4 = 115,
+ RF_CONTROL5 = 116,
+ RF_CONTROL6 = 117,
+ RF_CONTROL7 = 118,
+ RF_CONTROL8 = 119,
+ RF_CONTROL9 = 120,
+ RF_CONTROL10 = 121,
+ RF_CONTROL11 = 122,
+ RF_CONTROL12 = 123,
+ RF_CONTROL13 = 124,
+ RF_CONTROL14 = 125,
+ RF_CONTROL15 = 126,
+ RF_CONTROL16 = 127,
+ RF_CONTROL17 = 128,
+ RF_CONTROL18 = 129,
+ RF_CONTROL19 = 130,
+ RF_CONTROL20 = 131,
+ RF_CONTROL21 = 132,
+ RF_CONTROL22 = 133,
+ RF_CONTROL23 = 134,
+ RMII_CLK_I = 135,
+ RMII_CLK_O = 136,
+ RMII_TXEN = 137,
+ RMII_RXEN = 138,
+ RMII_RXD0 = 139,
+ RMII_RXD1 = 140,
+ RMII_TXD0 = 141,
+ RMII_TXD1 = 142,
+ MDC_SCLK = 143,
+ MDC_SDIO = 144,
+ PHY_RST = 145,
+
+}T_ZDrvGpio_Name;
+
+#endif
+
diff --git a/boot/common/src/uboot/drivers/gpio/hal_gpio_v3.h b/boot/common/src/uboot/drivers/gpio/hal_gpio_v3.h
new file mode 100644
index 0000000..6e09f94
--- /dev/null
+++ b/boot/common/src/uboot/drivers/gpio/hal_gpio_v3.h
@@ -0,0 +1,223 @@
+/*******************************************************************************
+* Copyright (C) 2016, ZIXC Corporation.
+*
+* File Name: hal_gpio.h
+* File Mark:
+* Description:
+* Others:
+* Version: v1.0
+* Author: zhangdongdong
+* Date: 2015-07-31
+* History 1:
+* Date:
+* Version:
+* Author:
+* Modification:
+* History 2:
+********************************************************************************/
+
+#ifndef _HAL_GPIO_H
+#define _HAL_GPIO_H
+
+
+/****************************************************************************
+* Include files
+****************************************************************************/
+
+/****************************************************************************
+* Macros
+****************************************************************************/
+#define reg32(addr) (*(volatile unsigned long *)(addr))
+
+#define get_reg_val(regAddr) reg32(regAddr)
+#define set_reg_val(regAddr,regVal) reg32(regAddr) = regVal
+
+#define set_reg_bit(regName, bitAddr, bitValue) \
+do{ \
+ if(bitValue == TRUE) \
+ reg32(regName) |= (0x1<<bitAddr); \
+ else \
+ reg32(regName) &= ~(0x1<<bitAddr); \
+}while(0)
+
+#define set_reg_bits(regName, bitsAddr, bitsLen, bitsValue) \
+do{ \
+ reg32(regName) = (reg32(regName)&(~(((0x1<<bitsLen)-0x1)<<bitsAddr)))|(bitsValue<<bitsAddr);\
+}while(0)
+
+#define INVLID_ADDR 0xffffffff
+#define INVLID_VALUE 0xffff
+/****************************************************************************
+* Types
+****************************************************************************/
+
+typedef signed char SINT8;
+typedef unsigned char UINT8;
+
+typedef signed short SINT16;
+typedef unsigned short UINT16;
+
+typedef signed int SINT32;
+typedef unsigned int UINT32;
+typedef signed char CHAR;
+
+typedef struct _T_GpioRegCfgInfo
+{
+ UINT32 regBase; /*gpio operation register base address*/
+ UINT16 offset; /*gpio operation domain offset in register*/
+ UINT16 size; /*gpio operation domain size*/
+} T_GpioRegCfgInfo;
+
+typedef struct _T_Gpio
+{
+ const char name[22]; /*gpio name*/
+ const UINT32 gpio;
+ UINT32 flag;
+ const T_GpioRegCfgInfo pdFuncSel; /*gpio pd func sel*/
+ const T_GpioRegCfgInfo aonFuncSel; /*gpio aon func sel*/
+ const T_GpioRegCfgInfo topFuncSel; /*gpio top func sel, 0:aon 1:pd*/
+ const T_GpioRegCfgInfo ioCfg; /*gpio config*/
+} T_Gpio;
+
+typedef enum{
+
+ NAND_WE = 0 ,
+ NAND_CSN = 1 ,
+ NAND_READY = 2 ,
+ NAND_CLE_ = 3 ,
+ NAND_ALE_ = 4 ,
+ NAND_RE = 5 ,
+ NAND_WP = 6 ,
+ NAND_DATA0 = 7 ,
+ NAND_DATA1 = 8 ,
+ NAND_DATA2 = 9 ,
+ NAND_DATA3 = 10 ,
+ NAND_DATA4 = 11 ,
+ NAND_DATA5 = 12 ,
+ NAND_DATA6 = 13 ,
+ NAND_DATA7 = 14 ,
+ CLK_OUT0 = 15 ,
+ CLK_OUT1 = 16 ,
+ CLK_OUT2 = 17 ,
+ CLK_32K_OUT = 18 ,
+ RMII_CLK_I = 19 ,
+ RMII_CLK_O = 20 ,
+ CLK_REQ0 = 21,
+ CLK_REQ1 = 22,
+ PWR_CTRL = 23 ,
+ PS_HOLD = 24 ,
+ SSP0_CS = 25 ,
+ SSP0_CLK = 26 ,
+ SSP0_RXD = 27,
+ SSP0_TXD = 28 ,
+ UART0_RXD = 29 ,
+ UART0_TXD = 30 ,
+ UART0_CTS = 31 ,
+ UART0_RTS = 32 ,
+ UART1_RXD = 33 ,
+ UART1_TXD = 34 ,
+ I2S0_WS = 35 ,
+ I2S0_CLK = 36 ,
+ I2S0_DIN = 37 ,
+ I2S0_DOUT = 38 ,
+ I2S1_WS = 39 ,
+ I2S1_CLK = 40 ,
+ I2S1_DIN = 41 ,
+ I2S1_DOUT = 42 ,
+ SCL0 = 43 ,
+ SDA0 = 44 ,
+ SCL1 = 45 ,
+ SDA1 = 46 ,
+ EXT_INT0 = 47 ,
+ EXT_INT1 = 48 ,
+ EXT_INT2 = 49 ,
+ EXT_INT3 = 50 ,
+ EXT_INT4 = 51 ,
+ EXT_INT5 = 52 ,
+ EXT_INT6 = 53 ,
+ EXT_INT7 = 54 ,
+ RMII_TXEN = 55 ,
+ RMII_RXEN = 56 ,
+ RMII_RXD0 = 57 ,
+ RMII_RXD1 = 58 ,
+ RMII_TXD0 = 59,
+ RMII_TXD1 = 60,
+ MDC_SCLK = 61,
+ MDC_SDIO = 62,
+ PHY_RST = 63,
+ PHY_INT = 64,
+ PHY_WAKE = 65,
+ SD0_CLK = 66 ,
+ SD0_CMD = 67 ,
+ SD0_DATA0 = 68 ,
+ SD0_DATA1 = 69 ,
+ SD0_DATA2 = 70 ,
+ SD0_DATA3 = 71,
+ SD1_CLK = 72 ,
+ SD1_CMD = 73 ,
+ SD1_DATA0 = 74 ,
+ SD1_DATA1 = 75 ,
+ SD1_DATA2 = 76 ,
+ SD1_DATA3 = 77,
+ JTAG_TCK = 78 ,
+ JTAG_TDI = 79 ,
+ JTAG_TDO = 80 ,
+ JTAG_TMS = 81 ,
+ JTAG_TRST = 82 ,
+ KBC_0 = 83 ,
+ KBC_1 = 84 ,
+ KBR_0 = 85 ,
+ KBR_1 = 86 ,
+ CAM_SPI_CS = 87 ,
+ CAM_SPI_CLK = 88 ,
+ CAM_SPI_DATA0 = 89 ,
+ CAM_SPI_DATA1 = 90 ,
+ CAM_SPI_DATA2 = 91 ,
+ CAM_SPI_DATA3 = 92 ,
+ SPIFC_CS = 93 ,
+ SPIFC_CLK = 94 ,
+ SPIFC_DATA0 = 95 ,
+ SPIFC_DATA1 = 96 ,
+ SPIFC_DATA2 = 97 ,
+ SPIFC_DATA3 = 98 ,
+ RESETB_OUT = 99 ,
+ RF_SPI_STR = 100 ,
+ RF_SPI_CLK = 101 ,
+ RF_SPI_DATA = 102 ,
+ RF_ISOLATE_EN = 103 ,
+ RF_CONTROL0 = 104,
+ RF_CONTROL1 = 105,
+ RF_CONTROL2 = 106,
+ RF_CONTROL3 = 107,
+ RF_CONTROL4 = 108,
+ RF_CONTROL5 = 109,
+ RF_CONTROL6 = 110,
+ RF_CONTROL7 = 111,
+ RF_CONTROL8 = 112,
+ RF_CONTROL9 = 113,
+ RF_CONTROL10 = 114,
+ RF_CONTROL11 = 115,
+ RF_CONTROL12 = 116,
+ RF_CONTROL13 = 117,
+ RF_CONTROL14 = 118,
+ SIM_RST = 119,
+ SIM_CLK = 120,
+ SIM_DATA = 121,
+ GPIO_119 = 122 ,
+ GPIO_120 = 123 ,
+ GPIO_121 = 124 ,
+ GPIO_122 = 125 ,
+ GPIO_123 = 126 ,
+ GPIO_124 = 127 ,
+ GPIO_125 = 128 ,
+ GPIO_126 = 129 ,
+ GPIO_127 = 130 ,
+ GPIO_128 = 131 ,
+ GPIO_129 = 132 ,
+ GPIO_130 = 133 ,
+ GPIO_131 = 134 ,
+ GPIO_132 = 135 ,
+}T_ZDrvGpio_Name;
+
+#endif
+