[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit
Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/boot/common/src/uboot/drivers/mmc/Makefile b/boot/common/src/uboot/drivers/mmc/Makefile
new file mode 100644
index 0000000..633bf4b
--- /dev/null
+++ b/boot/common/src/uboot/drivers/mmc/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)libmmc.o
+
+COBJS-y += mmc.o dw_mmc.o
+
+COBJS := $(COBJS-y)
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/boot/common/src/uboot/drivers/mmc/dw_mmc.c b/boot/common/src/uboot/drivers/mmc/dw_mmc.c
new file mode 100644
index 0000000..e721627
--- /dev/null
+++ b/boot/common/src/uboot/drivers/mmc/dw_mmc.c
@@ -0,0 +1,733 @@
+/*
+ * (C) Copyright 2012 SAMSUNG Electronics
+ * Jaehoon Chung <jh80.chung@samsung.com>
+ * Rajeshawari Shinde <rajeshwari.s@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <dwmmc.h>
+//#include <asm/arch/clk.h>
+#include <asm/arch/hardware.h>
+
+#include <asm-generic/errno.h>
+#include "zx234290.h"
+
+#define PAGE_SIZE 4096
+unsigned char *idma_desc = NULL;/*dw_mmc idma descriptor buffer*/
+unsigned char *idma_buffer = NULL;/*dw_mmc idma buffer*/
+
+static int dwmci_wait_reset(struct dwmci_host *host, u32 value)
+{
+ unsigned long timeout = 1000;
+ u32 ctrl;
+
+ dwmci_writel(host, DWMCI_CTRL, value);
+
+ while (timeout--) {
+ ctrl = dwmci_readl(host, DWMCI_CTRL);
+ if (!(ctrl & DWMCI_RESET_ALL))
+ return 1;
+ }
+ return 0;
+}
+
+
+static void dwmci_set_idma_desc(struct dwmci_idmac *idmac,
+ u32 desc0, u32 desc1, u32 desc2)
+{
+ struct dwmci_idmac *desc = idmac;
+
+ desc->flags = desc0;
+ desc->cnt = desc1;
+ desc->addr = desc2;
+ desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac);
+
+}
+
+static void dwmci_prepare_data(struct dwmci_host *host,
+ struct mmc_data *data,struct dwmci_idmac *cur_idmac)
+{
+
+#if DWMCI_USE_IDMA
+ unsigned long ctrl = 0;
+ unsigned int i = 0, cnt, blk_cnt;
+ unsigned int flags = 0;
+ ulong start_addr = 0;
+ blk_cnt = data->blocks;
+#endif
+ dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
+#if DWMCI_USE_IDMA
+ if (data->flags == MMC_DATA_READ)
+ {
+ //start_addr = (unsigned int)data->dest;
+ start_addr = (unsigned int)idma_buffer;
+ }
+ else
+ {
+ memcpy(idma_buffer,data->dest,blk_cnt*data->blocksize);
+ start_addr = (unsigned int)idma_buffer;
+ }
+
+ dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
+
+ ctrl = dwmci_readl(host, DWMCI_CTRL); //enable idma
+ ctrl |= DWMCI_IDMAC_EN ;
+ dwmci_writel(host, DWMCI_CTRL, ctrl);
+
+ dwmci_writel(host, DWMCI_BMOD, 1);
+
+ ctrl=0;
+ ctrl = dwmci_readl(host, DWMCI_INTMASK);
+ ctrl&=0xffffffcf;
+ dwmci_writel(host, DWMCI_INTMASK, ctrl); //DWMCI_INTMASK set
+
+ ctrl=0;
+ ctrl = dwmci_readl(host, DWMCI_RINTSTS); //clear RINTSTS
+ ctrl &= 0x0fffe;
+ dwmci_writel(host, DWMCI_RINTSTS, ctrl);
+
+ ctrl = 0;
+ ctrl = dwmci_readl(host, DWMCI_CTRL); //reset idma
+ ctrl |= 0x4;
+ dwmci_writel(host, DWMCI_CTRL, ctrl);
+ //Wait till IDMA Reset bit gets cleared.
+ do
+ {
+ ctrl = dwmci_readl(host, DWMCI_CTRL);
+ }while (ctrl & 0x4);
+
+ do {
+ flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ;
+ flags |= (i == 0) ? DWMCI_IDMAC_FS : 0;
+ if (blk_cnt <= 8) {
+ flags |= DWMCI_IDMAC_LD;
+ cnt = data->blocksize * blk_cnt;
+ } else
+ cnt = data->blocksize * 8;
+
+ dwmci_set_idma_desc(cur_idmac, flags, cnt,
+ start_addr + (i * PAGE_SIZE));
+
+ if(blk_cnt <= 8)
+ break;
+ blk_cnt -= 8;
+ cur_idmac++;
+ i++;
+ } while(1);
+
+ ctrl = 0;
+ ctrl = dwmci_readl(host, DWMCI_BMOD);
+ ctrl |= DWMCI_BMOD_IDMAC_FB | DWMCI_BMOD_IDMAC_EN;
+ dwmci_writel(host, DWMCI_BMOD, ctrl);
+
+
+ dwmci_writel(host, DWMCI_PLDMND, 1);
+
+#endif
+ dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
+ dwmci_writel(host, DWMCI_BYTCNT, data->blocksize * data->blocks);
+}
+
+static int dwmci_set_transfer_mode(struct dwmci_host *host,
+ struct mmc_data *data)
+{
+ unsigned long mode;
+
+ mode = DWMCI_CMD_DATA_EXP;
+ if (data->flags & MMC_DATA_WRITE)
+ mode |= DWMCI_CMD_RW;
+
+ return mode;
+}
+
+static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
+ int flags = 0, i;
+ //unsigned int timeout = 100000;
+ int timeout = 0xffffffff;
+ u32 retry = 10000;
+ u32 mask, ctrl;
+
+ struct dwmci_idmac *cur_idmac = (struct dwmci_idmac *)idma_desc;
+
+ while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
+ if (timeout == 0) {
+ printf("Timeout on data busy,status = %x\n",dwmci_readl(host, DWMCI_STATUS));
+ return TIMEOUT;
+ }
+ timeout--;
+ }
+
+ dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
+
+ if (data)
+ dwmci_prepare_data(host, data,cur_idmac);
+
+
+ dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
+
+ if (data)
+ flags = dwmci_set_transfer_mode(host, data );
+
+ if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY))
+ return -1;
+
+ if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
+ flags |= DWMCI_CMD_ABORT_STOP;
+ else
+ flags |= DWMCI_CMD_PRV_DAT_WAIT;
+
+ if (cmd->cmdidx == MMC_CMD_GO_IDLE_STATE)
+ flags |= DWMCI_CMD_SEND_INIT; //temp add for mmc reset
+
+ if (cmd->resp_type & MMC_RSP_PRESENT) {
+ flags |= DWMCI_CMD_RESP_EXP;
+ if (cmd->resp_type & MMC_RSP_136)
+ flags |= DWMCI_CMD_RESP_LENGTH;
+ }
+
+ if (cmd->resp_type & MMC_RSP_CRC)
+ flags |= DWMCI_CMD_CHECK_CRC;
+
+ if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK) ||(cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK) )
+ flags |= DWMCI_CMD_SEND_STOP;
+
+ flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG);
+
+ //printf("Sending CMD%d,flag is %x\n",cmd->cmdidx,flags);
+
+ dwmci_writel(host, DWMCI_CMD, flags);
+
+ for (i = 0; i < retry; i++) {
+ mask = dwmci_readl(host, DWMCI_RINTSTS);
+ if (mask & DWMCI_INTMSK_CDONE) {
+ if (!data)
+ dwmci_writel(host, DWMCI_RINTSTS, mask);
+ break;
+ }
+ }
+
+ if (i == retry)
+ {
+ printf("CMD DONE Timeout..\n");
+ return TIMEOUT;
+ }
+
+ if (mask & DWMCI_INTMSK_RTO) {
+ printf("Response Timeout.. mask =%x\n", (unsigned int)mask);
+ return TIMEOUT;
+ } else if (mask & DWMCI_INTMSK_RE) {
+ printf("Response Error..\n");
+ return -1;
+ }
+#if (!DWMCI_USE_IDMA)
+ if(data)
+ {
+ dwmci_cpu_transfer_data(host,data);
+ }
+#endif
+
+
+ if (cmd->resp_type & MMC_RSP_PRESENT) {
+ if (cmd->resp_type & MMC_RSP_136) {
+ cmd->response[0] = dwmci_readl(host, DWMCI_RESP3);
+ cmd->response[1] = dwmci_readl(host, DWMCI_RESP2);
+ cmd->response[2] = dwmci_readl(host, DWMCI_RESP1);
+ cmd->response[3] = dwmci_readl(host, DWMCI_RESP0);
+ } else {
+ cmd->response[0] = dwmci_readl(host, DWMCI_RESP0);
+ }
+ }
+
+ if (data) {
+ do {
+ mask = dwmci_readl(host, DWMCI_RINTSTS);
+ if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
+ printf("DATA ERROR,mask = 0x%x!\n",mask);
+ return -1;
+ }
+ } while (!(mask & DWMCI_INTMSK_DTO));
+
+ dwmci_writel(host, DWMCI_RINTSTS, mask);
+
+ ctrl = dwmci_readl(host, DWMCI_CTRL);
+ ctrl &= ~(DWMCI_DMA_EN);
+ dwmci_writel(host, DWMCI_CTRL, ctrl);
+#if (DWMCI_USE_IDMA)
+ if (data->flags == MMC_DATA_READ)
+ {
+ memcpy(data->src,idma_buffer,data->blocks*data->blocksize);
+ }
+#endif
+ }
+ //udelay(100);
+
+ mmc_delay(100);
+ return 0;
+}
+u32 status1 = 0;
+static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
+{
+ u32 div, status;
+ //int timeout = 10000;
+ int timeout = 0xffff; //mod temp
+ unsigned long sclk;
+
+ if (freq == host->clock)
+ return 0;
+
+ /*
+ * If host->mmc_clk didn't define,
+ * then assume that host->bus_hz is source clock value.
+ * host->bus_hz should be set from user.
+ */
+ if (host->mmc_clk)
+ sclk = host->mmc_clk(host->dev_index);
+ else if (host->bus_hz)
+ sclk = host->bus_hz;
+ else {
+ printf("Didn't get source clock value..\n");
+ return -EINVAL;
+ }
+
+ //div = DIV_ROUND_UP(sclk, 2 * freq);
+ div = (sclk != freq) ? DIV_ROUND_UP(sclk, 2 * freq) : 0;
+ dwmci_writel(host, DWMCI_CLKENA, 0);
+ dwmci_writel(host, DWMCI_CLKSRC, 0);
+
+ dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
+ DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
+
+ do {
+ status = dwmci_readl(host, DWMCI_CMD);
+ if (timeout-- < 0) {
+ printf("TIMEOUT1 error!!,STATUS = %x\n", (unsigned int)status);
+ return -ETIMEDOUT;
+ }
+ } while (status & DWMCI_CMD_START);
+ status1 = timeout;
+ dwmci_writel(host, DWMCI_CLKDIV, div);
+ dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
+ DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
+ timeout = 0xffff; //mod temp
+ do {
+ status = dwmci_readl(host, DWMCI_CMD);
+ if (timeout-- < 0) {
+ printf("TIMEOUT2 error!!\n");
+ return -ETIMEDOUT;
+ }
+ } while (status & DWMCI_CMD_START);
+
+ printf("TIMEOUT is %x\n",status1);
+
+ /*dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE |
+ DWMCI_CLKEN_LOW_PWR);*/
+ dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE);
+
+ dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
+ DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
+
+ //timeout = 10000;
+ timeout = 0xffff; //mod temp
+ do {
+ status = dwmci_readl(host, DWMCI_CMD);
+ if (timeout-- < 0) {
+ printf("TIMEOUT3 error!!\n");
+ return -ETIMEDOUT;
+ }
+ } while (status & DWMCI_CMD_START);
+
+ host->clock = freq;
+
+ return 0;
+}
+
+static void dwmci_set_ios(struct mmc *mmc)
+{
+ struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
+ u32 ctype;
+
+ printf("Buswidth = %d, clock: %d\n",mmc->bus_width, mmc->clock);
+
+ dwmci_setup_bus(host, mmc->clock);
+ switch (mmc->bus_width) {
+ case 8:
+ ctype = DWMCI_CTYPE_8BIT;
+ break;
+ case 4:
+ ctype = DWMCI_CTYPE_4BIT;
+ break;
+ default:
+ ctype = DWMCI_CTYPE_1BIT;
+ break;
+ }
+
+ dwmci_writel(host, DWMCI_CTYPE, ctype);
+
+ if (host->clksel)
+ host->clksel(host);
+}
+
+static int dwmci_init(struct mmc *mmc)
+{
+ struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
+ u32 fifo_size, fifoth_val;
+
+
+
+ if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
+ debug("%s[%d] Fail-reset!!\n",__func__,__LINE__);
+ return -1;
+ }
+
+ dwmci_writel(host, DWMCI_CTRL, 0);
+ dwmci_writel(host, DWMCI_PWREN, 1);
+
+ dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
+ //dwmci_writel(host, DWMCI_INTMASK, 0);
+ dwmci_writel(host, DWMCI_INTMASK, 0xfffffffe);
+
+ dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF);
+
+ dwmci_writel(host, DWMCI_IDINTEN, 0);
+ dwmci_writel(host, DWMCI_BMOD, 1);
+
+ dwmci_writel(host, DWMCI_DEBNCE, 0xfffff);
+ dwmci_writel(host, DWMCI_CARDRDTHRCTRL, 0x1|(0x200<<16)); //512 byte cardthr
+
+ fifo_size = 128;
+ if (host->fifoth_val)
+ fifoth_val = host->fifoth_val;
+ else
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
+ TX_WMARK(fifo_size/2);
+ dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
+
+ dwmci_writel(host, DWMCI_CLKENA, 0);
+ dwmci_writel(host, DWMCI_CLKSRC, 0);
+
+ return 0;
+}
+
+
+int dwmci_getcd(struct mmc *mmc)
+{
+ struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
+ int num = 0;
+
+ num = dwmci_readl(host,DWMCI_CDETECT)&(0x3fffffff);
+
+ return (num != 0x01);
+}
+
+ void zx29_dwmci_clksel(void)
+{
+ int clkdiv = 0;
+ //7520 mmc clk
+ clkdiv = readl(SYS_STD_CRM_BASE+0x5c);
+ clkdiv |= 0x3<<16; //clk enable
+ writel(clkdiv,SYS_STD_CRM_BASE+0x5c);
+ clkdiv = 0;
+
+ //udelay(80);
+ mmc_delay(80);
+ clkdiv = readl(SYS_STD_CRM_BASE+0x40);
+ clkdiv &= 0xffffffcf; //clk 52M
+ writel(clkdiv,SYS_STD_CRM_BASE+0x40);
+ clkdiv = 0;
+ mmc_delay(80);
+
+ clkdiv = readl(SYS_STD_CRM_BASE+0x60);
+ clkdiv |= 0x1<<16; //reset release
+ writel(clkdiv,SYS_STD_CRM_BASE+0x60);
+ clkdiv = 0;
+
+ //udelay(1000);
+ mmc_delay(1000);
+
+}
+
+int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk)
+{
+ struct mmc *mmc;
+ int err = 0;
+
+ mmc = malloc(sizeof(struct mmc));
+ if (!mmc) {
+ printf("mmc malloc fail!\n");
+ return -1;
+ }
+ memset(mmc,0x0,sizeof(struct mmc));
+ mmc->priv = host;
+ host->mmc = mmc;
+
+ sprintf(mmc->name, "%s", host->name);
+ mmc->send_cmd = dwmci_send_cmd;
+ mmc->set_ios = dwmci_set_ios;
+ mmc->init = dwmci_init;
+
+ mmc->getcd = dwmci_getcd; //get card num
+
+ mmc->f_min = min_clk;
+ mmc->f_max = max_clk;
+
+ mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
+
+ mmc->host_caps = host->caps;
+
+ if (host->buswidth == 8) {
+ mmc->host_caps |= MMC_MODE_8BIT;
+ mmc->host_caps &= ~MMC_MODE_4BIT;
+ } else {
+ mmc->host_caps |= MMC_MODE_4BIT;
+ mmc->host_caps &= ~MMC_MODE_8BIT;
+ }
+ mmc->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_HC;
+
+ err = mmc_register(mmc);
+
+ return err;
+}
+
+static char *ZX29_NAME = "ZX29 DWMMC";
+
+int zx29_dwmci_init(unsigned int regbase,int bus_width,int index)
+{
+ struct dwmci_host *host = NULL;
+ int reg = 0x3c;
+ host = malloc(sizeof(struct dwmci_host));
+ if (!host) {
+ printf("dwmci_host malloc fail!\n");
+ return 1;
+ }
+ memset(host,0x0,sizeof(struct dwmci_host));
+ host->name = ZX29_NAME;
+ host->ioaddr = (void *)regbase;
+ host->buswidth = bus_width;
+ host->dev_index = index;
+ host->clksel = zx29_dwmci_clksel; //7520 fpga temp
+ host->bus_hz = 52000000;
+
+ add_dwmci(host, 52000000, 400000);
+ zx234290_i2c_write_reg(MMC_CTRL, ®);
+
+ idma_desc = (unsigned char*)(CONFIG_NAND_DMA_BUF_ADDR+0x4400); /*dw_mmc idma_descriptor*/
+ idma_buffer = (unsigned char*)(CONFIG_NAND_DMA_BUF_ADDR+0x5400); /*dw_mmc idma_buffer*/
+ return 0;
+
+}
+
+int test1 = 0;
+int dwmci_cpu_transfer_data(struct dwmci_host *host,
+ struct mmc_data *data)
+{
+ u32 nTempStatus;
+ u32 nTransLen;
+ u32 i;
+ u32 nDepthMod, nAlignDepthLen;
+ u32 nWidthMod, nAlignWidthLen;
+ u32 nTempData;
+ u32 len = 0;
+ //BYTE *pbTempData;
+
+ //DMA is not used.
+
+ len = data->blocksize * data->blocks;
+
+ nDepthMod = len % MMC_FIFO_LEN;
+ nWidthMod = len % MMC_WIDTH_LEN;
+
+ //length align to fifo depth
+ nAlignDepthLen = len - nDepthMod;
+ nAlignWidthLen = nDepthMod - nWidthMod;
+
+ nTransLen = 0;
+
+ //read command
+ if (data->flags == MMC_DATA_READ)
+ {
+
+ while (nTransLen < nAlignDepthLen)
+ {
+ nTempStatus = dwmci_readl(host,DWMCI_STATUS);
+ if (nTempStatus & MMC_STATUS_FIFO_FULL)
+ {
+ for (i=0; i< MMC_FIFO_DEPTH; i++, nTransLen += MMC_WIDTH_LEN)
+
+ {
+ *(u32 *)((unsigned char *)data->dest + nTransLen) = dwmci_readl(host,DWMCI_DATA);
+ }
+
+ }
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_INTMSK_HLE)
+ {
+ return UNUSABLE_ERR;
+ }
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_ERR)
+ return -1;
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_TOUT)
+ return TIMEOUT;
+
+ }
+
+ for (i=0; i < nAlignWidthLen;)
+ {
+ if ((dwmci_readl(host,DWMCI_STATUS) & MMC_STATUS_FIFO_EMPTY) == 0)
+ {
+ *(u32 *)((unsigned char *)data->dest + nTransLen) = dwmci_readl(host,DWMCI_DATA);
+
+ i+= MMC_WIDTH_LEN;
+ nTransLen += MMC_WIDTH_LEN;
+
+ }
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_ERR)
+ return -1;
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_TOUT)
+ return TIMEOUT;
+
+
+ }
+
+ //not word align
+ if (nWidthMod)
+ {
+ while (dwmci_readl(host,DWMCI_STATUS) & MMC_STATUS_FIFO_EMPTY)
+ {
+ if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_ERR)
+ return -1;
+
+ if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_TOUT)
+ return TIMEOUT;
+ }
+
+ nTempData= dwmci_readl(host,DWMCI_DATA);
+
+ memcpy(((unsigned char *)data->dest + nTransLen), &nTempData, nWidthMod);
+ }
+
+ return 0;
+
+ }
+
+
+ //write command
+ else
+ {
+ while (nTransLen < nAlignDepthLen)
+ {
+ if (dwmci_readl(host,DWMCI_STATUS) & MMC_STATUS_FIFO_EMPTY)
+ {
+
+ for (i=0; i< MMC_FIFO_DEPTH; i=i+1,nTransLen=nTransLen + MMC_WIDTH_LEN)
+ {
+ dwmci_writel(host,DWMCI_DATA, *((u32 *)((unsigned char *)data->src + nTransLen)));
+
+ }
+
+ }
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_ERR)
+ return -1;
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_TOUT)
+ return TIMEOUT;
+
+
+
+ }
+
+ for (i=0; i < nAlignWidthLen;)
+ {
+ if ((dwmci_readl(host,DWMCI_STATUS) & MMC_STATUS_FIFO_FULL) == 0)
+ {
+
+ dwmci_writel(host,DWMCI_DATA,*((u32 *)((unsigned char *)data->src + nTransLen)));
+ i+=MMC_WIDTH_LEN;
+ nTransLen += MMC_WIDTH_LEN;
+ }
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_ERR)
+ return -1;
+
+ else if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_TOUT)
+ return TIMEOUT;
+
+ }
+
+ //not word align
+ if (nWidthMod)
+ {
+ while (dwmci_readl(host,DWMCI_STATUS) & MMC_STATUS_FIFO_FULL)
+ {
+ if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_ERR)
+ return -1;
+
+ if (dwmci_readl(host,DWMCI_RINTSTS) & DWMCI_DATA_TOUT)
+ return TIMEOUT;
+ }
+
+ memcpy(&nTempData,((unsigned char *)data->src + nTransLen), nWidthMod);
+
+ dwmci_writel(host,DWMCI_DATA, nTempData);
+ }
+
+ return 0;
+
+ }
+
+
+}
+
+int board_mmc_init(bd_t *bis)
+{
+ int err;
+ struct mmc *mmc;
+ unsigned int regbase = ZX29_SDMMC0_BASE;
+ int bus_width = 8;
+ int index = 0;
+
+ /*initialize synpsys dw mmc controler*/
+ err = zx29_dwmci_init(regbase,bus_width,index);
+ return err;
+}
+
+
+
+/*temp use usdelay*/
+void mmc_delay(unsigned long us)
+ {
+ #if 0
+ int i = 0; /* approximate */
+ for(i=0;i<5000;i++)
+ {
+ ;
+ }
+#else
+ udelay(us);
+#endif
+ }
+
diff --git a/boot/common/src/uboot/drivers/mmc/mmc.c b/boot/common/src/uboot/drivers/mmc/mmc.c
new file mode 100644
index 0000000..83a9f5a
--- /dev/null
+++ b/boot/common/src/uboot/drivers/mmc/mmc.c
@@ -0,0 +1,1526 @@
+/*
+ * Copyright 2008, Freescale Semiconductor, Inc
+ * Andy Fleming
+ *
+ * Based vaguely on the Linux code
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <command.h>
+#include <mmc.h>
+#include <part.h>
+#include <malloc.h>
+#include <linux/list.h>
+#include <div64.h>
+
+#include <nand.h>
+#include <boot_mode.h>
+
+
+
+extern int g_iftype;
+/* Set block count limit because of 16 bit register limit on some hardware*/
+#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
+#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
+#endif
+
+static struct list_head mmc_devices;
+static int cur_dev_num = -1;
+
+extern void zx29_dwmci_clksel(void);
+extern void mmc_delay(unsigned long us); //temp usdelay
+
+int __weak board_mmc_getwp(struct mmc *mmc)
+{
+ return -1;
+}
+
+int mmc_getwp(struct mmc *mmc)
+{
+ int wp;
+
+ wp = board_mmc_getwp(mmc);
+
+ if (wp < 0) {
+ if (mmc->getwp)
+ wp = mmc->getwp(mmc);
+ else
+ wp = 0;
+ }
+
+ return wp;
+}
+
+int __board_mmc_getcd(struct mmc *mmc) {
+ return -1;
+}
+
+int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
+ alias("__board_mmc_getcd")));
+
+static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct mmc_data backup;
+ int ret;
+
+ memset(&backup, 0, sizeof(backup));
+
+#ifdef CONFIG_MMC_TRACE
+ int i;
+ u8 *ptr;
+
+ printf("CMD_SEND:%d\n", cmd->cmdidx);
+ printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
+ ret = mmc->send_cmd(mmc, cmd, data);
+ switch (cmd->resp_type) {
+ case MMC_RSP_NONE:
+ printf("\t\tMMC_RSP_NONE\n");
+ break;
+ case MMC_RSP_R1:
+ printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
+ cmd->response[0]);
+ break;
+ case MMC_RSP_R1b:
+ printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
+ cmd->response[0]);
+ break;
+ case MMC_RSP_R2:
+ printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
+ cmd->response[0]);
+ printf("\t\t \t\t 0x%08X \n",
+ cmd->response[1]);
+ printf("\t\t \t\t 0x%08X \n",
+ cmd->response[2]);
+ printf("\t\t \t\t 0x%08X \n",
+ cmd->response[3]);
+ printf("\n");
+ printf("\t\t\t\t\tDUMPING DATA\n");
+ for (i = 0; i < 4; i++) {
+ int j;
+ printf("\t\t\t\t\t%03d - ", i*4);
+ ptr = (u8 *)&cmd->response[i];
+ ptr += 3;
+ for (j = 0; j < 4; j++)
+ printf("%02X ", *ptr--);
+ printf("\n");
+ }
+ break;
+ case MMC_RSP_R3:
+ printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
+ cmd->response[0]);
+ break;
+ default:
+ printf("\t\tERROR MMC rsp not supported\n");
+ break;
+ }
+#else
+ ret = mmc->send_cmd(mmc, cmd, data);
+#endif
+ return ret;
+}
+
+static int mmc_send_status(struct mmc *mmc, int timeout)
+{
+ struct mmc_cmd cmd;
+ int err, retries = 5;
+#ifdef CONFIG_MMC_TRACE
+ int status;
+#endif
+
+ cmd.cmdidx = MMC_CMD_SEND_STATUS;
+ cmd.resp_type = MMC_RSP_R1;
+ if (!mmc_host_is_spi(mmc))
+ cmd.cmdarg = mmc->rca << 16;
+
+ do {
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+ if (!err) {
+ if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
+ ((cmd.response[0] & MMC_STATUS_CURR_STATE) !=
+ MMC_STATE_PRG )&& (cmd.response[0] & MMC_STATUS_CURR_STATE) == MMC_STATE_TRAN)
+ break;
+ else if (cmd.response[0] & MMC_STATUS_MASK) {
+ printf("Status Error: 0x%08X\n",
+ cmd.response[0]);
+ return COMM_ERR;
+ }
+ }
+ else if (--retries < 0)
+ return err;
+
+ //udelay(1000);
+ mmc_delay(1000);
+
+ } while (timeout--);
+
+#ifdef CONFIG_MMC_TRACE
+ status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
+ printf("CURR STATE:%d\n", status);
+#endif
+ if (timeout <= 0) {
+ printf("Timeout waiting card ready\n");
+ return TIMEOUT;
+ }
+
+ return 0;
+}
+
+static int mmc_set_blocklen(struct mmc *mmc, int len)
+{
+ struct mmc_cmd cmd;
+
+ cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = len;
+
+ return mmc_send_cmd(mmc, &cmd, NULL);
+}
+
+struct mmc *find_mmc_device(int dev_num)
+{
+ struct mmc *m;
+ struct list_head *entry;
+
+ list_for_each(entry, &mmc_devices) {
+ m = list_entry(entry, struct mmc, link);
+
+ if (m->block_dev.dev == dev_num)
+ return m;
+ }
+
+ printf("MMC Device %d not found\n", dev_num);
+
+ return NULL;
+}
+
+static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
+{
+ struct mmc_cmd cmd;
+ ulong end;
+ int err, start_cmd, end_cmd;
+
+ if (mmc->high_capacity)
+ end = start + blkcnt - 1;
+ else {
+ end = (start + blkcnt - 1) * mmc->write_bl_len;
+ start *= mmc->write_bl_len;
+ }
+
+ if (IS_SD(mmc)) {
+ start_cmd = SD_CMD_ERASE_WR_BLK_START;
+ end_cmd = SD_CMD_ERASE_WR_BLK_END;
+ } else {
+ start_cmd = MMC_CMD_ERASE_GROUP_START;
+ end_cmd = MMC_CMD_ERASE_GROUP_END;
+ }
+
+ cmd.cmdidx = start_cmd;
+ cmd.cmdarg = start;
+ cmd.resp_type = MMC_RSP_R1;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+ if (err)
+ goto err_out;
+
+ cmd.cmdidx = end_cmd;
+ cmd.cmdarg = end;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+ if (err)
+ goto err_out;
+
+ cmd.cmdidx = MMC_CMD_ERASE;
+ cmd.cmdarg = 0;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+ if (err)
+ goto err_out;
+
+ return 0;
+
+err_out:
+ puts("mmc erase failed\n");
+ return err;
+}
+
+static unsigned long
+mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt)
+{
+ int err = 0;
+ struct mmc *mmc = find_mmc_device(dev_num);
+ lbaint_t blk = 0, blk_r = 0;
+ int timeout = 1000;
+
+ if (!mmc)
+ return -1;
+
+ if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
+ printf("\n\nCaution! Your devices Erase group is 0x%x\n"
+ "The erase range would be change to 0x%lx~0x%lx\n\n",
+ mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
+ ((start + blkcnt + mmc->erase_grp_size)
+ & ~(mmc->erase_grp_size - 1)) - 1);
+
+ while (blk < blkcnt) {
+ blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
+ mmc->erase_grp_size : (blkcnt - blk);
+ err = mmc_erase_t(mmc, start + blk, blk_r);
+ if (err)
+ break;
+
+ blk += blk_r;
+
+ /* Waiting for the ready status */
+ if (mmc_send_status(mmc, timeout))
+ return 0;
+ }
+
+ return blk;
+}
+
+static ulong
+mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
+{
+ struct mmc_cmd cmd;
+ struct mmc_data data;
+ int timeout = 1000;
+
+ if ((start + blkcnt) > mmc->block_dev.lba) {
+ printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
+ start + blkcnt, mmc->block_dev.lba);
+ return 0;
+ }
+
+ if (blkcnt > 1)
+ cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
+ else
+ cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
+
+ if (mmc->high_capacity)
+ cmd.cmdarg = start;
+ else
+ cmd.cmdarg = start * mmc->write_bl_len;
+
+ cmd.resp_type = MMC_RSP_R1;
+
+ data.src = src;
+ data.blocks = blkcnt;
+ data.blocksize = mmc->write_bl_len;
+ data.flags = MMC_DATA_WRITE;
+
+ if (mmc_send_cmd(mmc, &cmd, &data)) {
+ printf("mmc write failed\n");
+ return 0;
+ }
+
+ /* SPI multiblock writes terminate using a special
+ * token, not a STOP_TRANSMISSION request.
+ */
+#if 0
+
+ if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
+ cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
+ cmd.cmdarg = 0;
+ cmd.resp_type = MMC_RSP_R1b;
+ if (mmc_send_cmd(mmc, &cmd, NULL)) {
+ printf("mmc fail to send stop cmd\n");
+ return 0;
+ }
+ }
+#endif
+ /* Waiting for the ready status */
+ if (mmc_send_status(mmc, timeout))
+ return 0;
+
+ return blkcnt;
+}
+
+static ulong
+mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src)
+{
+ lbaint_t cur, blocks_todo = blkcnt;
+
+ if (blkcnt == 0)
+ return 0;
+
+ struct mmc *mmc = find_mmc_device(dev_num);
+ if (!mmc)
+ return 0;
+
+ if (mmc_set_blocklen(mmc, mmc->write_bl_len))
+ return 0;
+
+ do {
+ cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
+ if(mmc_write_blocks(mmc, start, cur, src) != cur)
+ return 0;
+ blocks_todo -= cur;
+ start += cur;
+ src += cur * mmc->write_bl_len;
+ } while (blocks_todo > 0);
+
+ return blkcnt;
+}
+
+static int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start,
+ lbaint_t blkcnt)
+{
+ struct mmc_cmd cmd;
+ struct mmc_data data;
+ int ret = 0;
+
+ if (blkcnt > 1)
+ cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
+ else
+ cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
+
+ if (mmc->high_capacity)
+ cmd.cmdarg = start;
+ else
+ cmd.cmdarg = start * mmc->read_bl_len;
+
+ cmd.resp_type = MMC_RSP_R1;
+
+ data.dest = dst;
+ data.blocks = blkcnt;
+ data.blocksize = mmc->read_bl_len;
+ data.flags = MMC_DATA_READ;
+
+ ret = mmc_send_cmd(mmc, &cmd, &data);
+ if (ret)
+ {
+ printf("mmc fail to send read cmd ret = %d\n",ret);
+ return 0;
+ }
+ #if 0
+ if (blkcnt > 1) {
+ cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
+ cmd.cmdarg = 0;
+ cmd.resp_type = MMC_RSP_R1b;
+ if (mmc_send_cmd(mmc, &cmd, NULL)) {
+ printf("mmc fail to send stop cmd\n");
+ return 0;
+ }
+ }
+#endif
+ return blkcnt;
+}
+
+static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst)
+{
+ lbaint_t cur, blocks_todo = blkcnt;
+
+ if (blkcnt == 0)
+ return 0;
+
+ struct mmc *mmc = find_mmc_device(dev_num);
+ if (!mmc)
+ return 0;
+
+ if ((start + blkcnt) > mmc->block_dev.lba) {
+ printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
+ start + blkcnt, mmc->block_dev.lba);
+ return 0;
+ }
+
+ if (mmc_set_blocklen(mmc, mmc->read_bl_len))
+ return 0;
+
+ do {
+ cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
+ if(mmc_read_blocks(mmc, dst, start, cur) != cur)
+ return 0;
+ blocks_todo -= cur;
+ start += cur;
+ dst += cur * mmc->read_bl_len;
+ } while (blocks_todo > 0);
+
+ return blkcnt;
+}
+
+static int mmc_go_idle(struct mmc *mmc)
+{
+ struct mmc_cmd cmd;
+ int err;
+
+ //udelay(1000);
+ mmc_delay(1000);
+ cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
+ cmd.cmdarg = 0;
+ cmd.resp_type = MMC_RSP_NONE;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ //udelay(2000);
+ mmc_delay(2000);
+ return 0;
+}
+
+static int sd_send_op_cond(struct mmc *mmc)
+{
+ int timeout = 1000;
+ int err;
+ struct mmc_cmd cmd;
+
+ do {
+ cmd.cmdidx = MMC_CMD_APP_CMD;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = 0;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
+ cmd.resp_type = MMC_RSP_R3;
+
+ /*
+ * Most cards do not answer if some reserved bits
+ * in the ocr are set. However, Some controller
+ * can set bit 7 (reserved for low voltages), but
+ * how to manage low voltages SD card is not yet
+ * specified.
+ */
+ cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
+ (mmc->voltages & 0xff8000);
+
+ if (mmc->version == SD_VERSION_2)
+ cmd.cmdarg |= OCR_HCS;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ //udelay(1000);
+ mmc_delay(1000);
+ } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
+
+ if (timeout <= 0)
+ return UNUSABLE_ERR;
+
+ if (mmc->version != SD_VERSION_2)
+ mmc->version = SD_VERSION_1_0;
+
+ if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
+ cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
+ cmd.resp_type = MMC_RSP_R3;
+ cmd.cmdarg = 0;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+ }
+
+ mmc->ocr = cmd.response[0];
+
+ mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
+ mmc->rca = 0;
+
+ return 0;
+}
+
+static int mmc_send_op_cond(struct mmc *mmc)
+{
+ int timeout = 10000;
+ struct mmc_cmd cmd;
+ int err;
+
+ /* Some cards seem to need this */
+ mmc_go_idle(mmc);
+
+ /* Asking to the card its capabilities */
+ cmd.cmdidx = MMC_CMD_SEND_OP_COND;
+ cmd.resp_type = MMC_RSP_R3;
+ cmd.cmdarg = 0;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ //udelay(1000);
+ mmc_delay(1000);
+
+ do {
+ cmd.cmdidx = MMC_CMD_SEND_OP_COND;
+ cmd.resp_type = MMC_RSP_R3;
+ cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 :
+ (mmc->voltages &
+ (cmd.response[0] & OCR_VOLTAGE_MASK)) |
+ (cmd.response[0] & OCR_ACCESS_MODE));
+
+ if (mmc->host_caps & MMC_MODE_HC)
+ cmd.cmdarg |= OCR_HCS;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ //udelay(1000);
+ mmc_delay(1000);
+ } while (!(cmd.response[0] & OCR_BUSY) && timeout--);
+
+ if (timeout <= 0)
+ return UNUSABLE_ERR;
+
+ if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
+ cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
+ cmd.resp_type = MMC_RSP_R3;
+ cmd.cmdarg = 0;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+ }
+
+ mmc->version = MMC_VERSION_UNKNOWN;
+ mmc->ocr = cmd.response[0];
+
+ mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
+ mmc->rca = 0;
+
+ return 0;
+}
+
+
+static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
+{
+ struct mmc_cmd cmd;
+ struct mmc_data data;
+ int err;
+
+ /* Get the Card Status Register */
+ cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = 0;
+
+ data.dest = (char *)ext_csd;
+ data.blocks = 1;
+ data.blocksize = 512;
+ data.flags = MMC_DATA_READ;
+
+ err = mmc_send_cmd(mmc, &cmd, &data);
+
+ return err;
+}
+
+
+static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
+{
+ struct mmc_cmd cmd;
+ int timeout = 1000;
+ int ret;
+
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
+ (index << 16) |
+ (value << 8)|set;
+
+ ret = mmc_send_cmd(mmc, &cmd, NULL);
+
+ /* Waiting for the ready status */
+ if (!ret)
+ ret = mmc_send_status(mmc, timeout);
+
+ return ret;
+
+}
+
+static int mmc_change_freq(struct mmc *mmc)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512);
+ //unsigned char ext_csd[512] = {0};
+ char cardtype;
+ int err;
+
+ mmc->card_caps = 0;
+
+ if (mmc_host_is_spi(mmc))
+ return 0;
+
+ /* Only version 4 supports high-speed */
+ if (mmc->version < MMC_VERSION_4)
+ return 0;
+
+ err = mmc_send_ext_csd(mmc, ext_csd);
+
+ if (err)
+ return err;
+
+ cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
+
+ err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
+
+ if (err)
+ return err;
+
+ /* Now check to see that it worked */
+ err = mmc_send_ext_csd(mmc, ext_csd);
+
+ if (err)
+ return err;
+
+ /* No high-speed support */
+ if (!ext_csd[EXT_CSD_HS_TIMING])
+ return 0;
+
+ /* High Speed is set, there are two types: 52MHz and 26MHz */
+ if (cardtype & MMC_HS_52MHZ)
+ mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
+ else
+ mmc->card_caps |= MMC_MODE_HS;
+
+ return 0;
+}
+
+int mmc_switch_part(int dev_num, unsigned int part_num)
+{
+ struct mmc *mmc = find_mmc_device(dev_num);
+
+ if (!mmc)
+ return -1;
+
+ return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
+ (mmc->part_config & ~PART_ACCESS_MASK)
+ | (part_num & PART_ACCESS_MASK));
+}
+
+int mmc_getcd(struct mmc *mmc)
+{
+ int cd = 0;
+
+ if (mmc->getcd)
+ cd = mmc->getcd(mmc);
+ else
+ cd = 0;
+
+ return cd;
+}
+
+static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
+{
+ struct mmc_cmd cmd;
+ struct mmc_data data;
+
+ /* Switch the frequency */
+ cmd.cmdidx = SD_CMD_SWITCH_FUNC;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = (mode << 31) | 0xffffff;
+ cmd.cmdarg &= ~(0xf << (group * 4));
+ cmd.cmdarg |= value << (group * 4);
+
+ data.dest = (char *)resp;
+ data.blocksize = 64;
+ data.blocks = 1;
+ data.flags = MMC_DATA_READ;
+
+ return mmc_send_cmd(mmc, &cmd, &data);
+}
+
+
+static int sd_change_freq(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+ ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
+ ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
+ struct mmc_data data;
+ int timeout;
+
+ mmc->card_caps = 0;
+
+ if (mmc_host_is_spi(mmc))
+ return 0;
+
+ /* Read the SCR to find out if this card supports higher speeds */
+ cmd.cmdidx = MMC_CMD_APP_CMD;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = mmc->rca << 16;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ cmd.cmdidx = SD_CMD_APP_SEND_SCR;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = 0;
+
+ timeout = 3;
+
+retry_scr:
+ data.dest = (char *)scr;
+ data.blocksize = 8;
+ data.blocks = 1;
+ data.flags = MMC_DATA_READ;
+
+ err = mmc_send_cmd(mmc, &cmd, &data);
+
+ if (err) {
+ if (timeout--)
+ goto retry_scr;
+
+ return err;
+ }
+
+ mmc->scr[0] = __be32_to_cpu(scr[0]);
+ mmc->scr[1] = __be32_to_cpu(scr[1]);
+
+ switch ((mmc->scr[0] >> 24) & 0xf) {
+ case 0:
+ mmc->version = SD_VERSION_1_0;
+ break;
+ case 1:
+ mmc->version = SD_VERSION_1_10;
+ break;
+ case 2:
+ mmc->version = SD_VERSION_2;
+ if ((mmc->scr[0] >> 15) & 0x1)
+ mmc->version = SD_VERSION_3;
+ break;
+ default:
+ mmc->version = SD_VERSION_1_0;
+ break;
+ }
+
+ if (mmc->scr[0] & SD_DATA_4BIT)
+ mmc->card_caps |= MMC_MODE_4BIT;
+
+ /* Version 1.0 doesn't support switching */
+ if (mmc->version == SD_VERSION_1_0)
+ return 0;
+
+ timeout = 4;
+ while (timeout--) {
+ err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
+ (u8 *)switch_status);
+
+ if (err)
+ return err;
+
+ /* The high-speed function is busy. Try again */
+ if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
+ break;
+ }
+
+ /* If high-speed isn't supported, we return */
+ if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
+ return 0;
+
+ /*
+ * If the host doesn't support SD_HIGHSPEED, do not switch card to
+ * HIGHSPEED mode even if the card support SD_HIGHSPPED.
+ * This can avoid furthur problem when the card runs in different
+ * mode between the host.
+ */
+ if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
+ (mmc->host_caps & MMC_MODE_HS)))
+ return 0;
+
+ err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
+
+ if (err)
+ return err;
+
+ if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
+ mmc->card_caps |= MMC_MODE_HS;
+
+ return 0;
+}
+
+/* frequency bases */
+/* divided by 10 to be nice to platforms without floating point */
+static const int fbase[] = {
+ 10000,
+ 100000,
+ 1000000,
+ 10000000,
+};
+
+/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
+ * to platforms without floating point.
+ */
+static const int multipliers[] = {
+ 0, /* reserved */
+ 10,
+ 12,
+ 13,
+ 15,
+ 20,
+ 25,
+ 30,
+ 35,
+ 40,
+ 45,
+ 50,
+ 55,
+ 60,
+ 70,
+ 80,
+};
+
+static void mmc_set_ios(struct mmc *mmc)
+{
+ mmc->set_ios(mmc);
+}
+
+void mmc_set_clock(struct mmc *mmc, uint clock)
+{
+ if (clock > mmc->f_max)
+ clock = mmc->f_max;
+
+ if (clock < mmc->f_min)
+ clock = mmc->f_min;
+
+ mmc->clock = clock;
+
+ mmc_set_ios(mmc);
+}
+
+static void mmc_set_bus_width(struct mmc *mmc, uint width)
+{
+ mmc->bus_width = width;
+
+ mmc_set_ios(mmc);
+}
+
+static int mmc_startup(struct mmc *mmc)
+{
+ int err;
+ uint mult, freq;
+ u64 cmult, csize, capacity;
+ struct mmc_cmd cmd;
+ ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512);
+ ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, 512);
+ int timeout = 1000;
+
+
+ /* Put the Card in Identify Mode */
+ cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
+ MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
+ cmd.resp_type = MMC_RSP_R2;
+ cmd.cmdarg = 0;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ memcpy(mmc->cid, cmd.response, 16);
+
+ /*
+ * For MMC cards, set the Relative Address.
+ * For SD cards, get the Relatvie Address.
+ * This also puts the cards into Standby State
+ */
+ if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
+ cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
+ cmd.cmdarg = mmc->rca << 16;
+ cmd.resp_type = MMC_RSP_R6;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ if (IS_SD(mmc))
+ mmc->rca = (cmd.response[0] >> 16) & 0xffff;
+ }
+
+ /* Get the Card-Specific Data */
+ cmd.cmdidx = MMC_CMD_SEND_CSD;
+ cmd.resp_type = MMC_RSP_R2;
+ cmd.cmdarg = mmc->rca << 16;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ /* Waiting for the ready status */
+ //mmc_send_status(mmc, timeout);
+
+ if (err)
+ return err;
+
+ mmc->csd[0] = cmd.response[0];
+ mmc->csd[1] = cmd.response[1];
+ mmc->csd[2] = cmd.response[2];
+ mmc->csd[3] = cmd.response[3];
+
+ if (mmc->version == MMC_VERSION_UNKNOWN) {
+ int version = (cmd.response[0] >> 26) & 0xf;
+
+ switch (version) {
+ case 0:
+ mmc->version = MMC_VERSION_1_2;
+ break;
+ case 1:
+ mmc->version = MMC_VERSION_1_4;
+ break;
+ case 2:
+ mmc->version = MMC_VERSION_2_2;
+ break;
+ case 3:
+ mmc->version = MMC_VERSION_3;
+ break;
+ case 4:
+ mmc->version = MMC_VERSION_4;
+ break;
+ default:
+ mmc->version = MMC_VERSION_1_2;
+ break;
+ }
+ }
+
+ /* divide frequency by 10, since the mults are 10x bigger */
+ freq = fbase[(cmd.response[0] & 0x7)];
+ mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
+
+ mmc->tran_speed = freq * mult;
+
+ mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
+
+ if (IS_SD(mmc))
+ mmc->write_bl_len = mmc->read_bl_len;
+ else
+ mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
+
+ if (mmc->high_capacity) {
+ csize = (mmc->csd[1] & 0x3f) << 16
+ | (mmc->csd[2] & 0xffff0000) >> 16;
+ cmult = 8;
+ } else {
+ csize = (mmc->csd[1] & 0x3ff) << 2
+ | (mmc->csd[2] & 0xc0000000) >> 30;
+ cmult = (mmc->csd[2] & 0x00038000) >> 15;
+ }
+
+ mmc->capacity = (csize + 1) << (cmult + 2);
+ mmc->capacity *= mmc->read_bl_len;
+
+ if (mmc->read_bl_len > 512)
+ mmc->read_bl_len = 512;
+
+ if (mmc->write_bl_len > 512)
+ mmc->write_bl_len = 512;
+
+ /* Select the card, and put it into Transfer Mode */
+ if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
+ cmd.cmdidx = MMC_CMD_SELECT_CARD;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = mmc->rca << 16;
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+ }
+
+ /*
+ * For SD, its erase group is always one sector
+ */
+ mmc->erase_grp_size = 1;
+ mmc->part_config = MMCPART_NOAVAILABLE;
+ if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
+ /* check ext_csd version and capacity */
+ err = mmc_send_ext_csd(mmc, ext_csd);
+ if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
+ /*
+ * According to the JEDEC Standard, the value of
+ * ext_csd's capacity is valid if the value is more
+ * than 2GB
+ */
+ capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
+ | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
+ | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
+ | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
+ capacity *= 512;
+ if ((capacity >> 20) > 2 * 1024)
+ mmc->capacity = capacity;
+ }
+
+ switch (ext_csd[EXT_CSD_REV]) {
+ case 1:
+ mmc->version = MMC_VERSION_4_1;
+ break;
+ case 2:
+ mmc->version = MMC_VERSION_4_2;
+ break;
+ case 3:
+ mmc->version = MMC_VERSION_4_3;
+ break;
+ case 5:
+ mmc->version = MMC_VERSION_4_41;
+ break;
+ case 6:
+ mmc->version = MMC_VERSION_4_5;
+ break;
+ }
+
+ /*
+ * Check whether GROUP_DEF is set, if yes, read out
+ * group size from ext_csd directly, or calculate
+ * the group size from the csd value.
+ */
+ if (ext_csd[EXT_CSD_ERASE_GROUP_DEF])
+ mmc->erase_grp_size =
+ ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 512 * 1024;
+ else {
+ int erase_gsz, erase_gmul;
+ erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
+ erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
+ mmc->erase_grp_size = (erase_gsz + 1)
+ * (erase_gmul + 1);
+ }
+
+ /* store the partition info of emmc */
+ if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
+ ext_csd[EXT_CSD_BOOT_MULT])
+ mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
+
+ }
+
+ if (IS_SD(mmc))
+ err = sd_change_freq(mmc);
+ else
+ err = mmc_change_freq(mmc);
+
+ if (err)
+ return err;
+
+ /* Restrict card's capabilities by what the host can do */
+ mmc->card_caps &= mmc->host_caps;
+
+ if (IS_SD(mmc)) {
+ if (mmc->card_caps & MMC_MODE_4BIT) {
+ cmd.cmdidx = MMC_CMD_APP_CMD;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = mmc->rca << 16;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+ if (err)
+ return err;
+
+ cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = 2;
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+ if (err)
+ return err;
+
+ mmc_set_bus_width(mmc, 4);
+ }
+
+ if (mmc->card_caps & MMC_MODE_HS)
+ mmc->tran_speed = 50000000;
+ else
+ mmc->tran_speed = 25000000;
+ } else {
+
+ int idx;
+
+ /* An array of possible bus widths in order of preference */
+ static unsigned ext_csd_bits[] = {
+ EXT_CSD_BUS_WIDTH_8,
+ EXT_CSD_BUS_WIDTH_4,
+ EXT_CSD_BUS_WIDTH_1,
+ };
+
+ /* An array to map CSD bus widths to host cap bits */
+ static unsigned ext_to_hostcaps[] = {
+ [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
+ [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
+ };
+
+ /* An array to map chosen bus width to an integer */
+ static unsigned widths[] = {
+ 8, 4, 1,
+ };
+ for (idx=0; idx < ARRAY_SIZE(ext_csd_bits)-2; idx++)
+ {
+ unsigned int extw = ext_csd_bits[idx];
+
+ printf("change extw = %d, width=%d\n",extw,widths[idx]);
+ /*
+ * Check to make sure the controller supports
+ * this bus width, if it's more than 1
+ */
+ if (extw != EXT_CSD_BUS_WIDTH_1 &&
+ !(mmc->host_caps & ext_to_hostcaps[extw]))
+ continue;
+
+ err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_BUS_WIDTH, extw);
+ if (err)
+ continue;
+
+ mmc_set_bus_width(mmc, widths[idx]);
+
+
+ }
+
+ if (mmc->card_caps & MMC_MODE_HS) {
+ if (mmc->card_caps & MMC_MODE_HS_52MHz)
+ mmc->tran_speed = 52000000;
+ else
+ mmc->tran_speed = 26000000;
+ }
+
+ }
+ printf("mmc_set_clock %d\n",mmc->tran_speed);
+
+ mmc_set_clock(mmc, mmc->tran_speed);
+
+ /* fill in device description */
+ mmc->block_dev.lun = 0;
+ mmc->block_dev.type = 0;
+ mmc->block_dev.blksz = mmc->read_bl_len;
+ mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
+ sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
+ mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
+ (mmc->cid[3] >> 16) & 0xffff);
+ sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
+ (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
+ (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
+ (mmc->cid[2] >> 24) & 0xff);
+ sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
+ (mmc->cid[2] >> 16) & 0xf);
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
+ //init_part(&mmc->block_dev);
+#endif
+
+ return 0;
+}
+static int mmc_send_if_cond(struct mmc *mmc)
+{
+ struct mmc_cmd cmd;
+ int err;
+
+ cmd.cmdidx = SD_CMD_SEND_IF_COND;
+ /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
+ cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
+ cmd.resp_type = MMC_RSP_R7;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+
+ if (err)
+ return err;
+
+ if ((cmd.response[0] & 0xff) != 0xaa)
+ return UNUSABLE_ERR;
+ else
+ mmc->version = SD_VERSION_2;
+
+ return 0;
+}
+
+int mmc_register(struct mmc *mmc)
+{
+ /* Setup the universal parts of the block interface just once */
+ mmc->block_dev.if_type = IF_TYPE_MMC;
+ mmc->block_dev.dev = cur_dev_num++;
+ mmc->block_dev.removable = 1;
+ mmc->block_dev.block_read = mmc_bread;
+ mmc->block_dev.block_write = mmc_bwrite;
+ mmc->block_dev.block_erase = mmc_berase;
+ if (!mmc->b_max)
+ mmc->b_max = 128;
+
+ INIT_LIST_HEAD (&mmc->link);
+
+ list_add_tail (&mmc->link, &mmc_devices);
+
+ return 0;
+}
+
+
+block_dev_desc_t *mmc_get_dev(int dev)
+{
+ struct mmc *mmc = find_mmc_device(dev);
+ if (!mmc || mmc_init(mmc))
+ return NULL;
+
+ return &mmc->block_dev;
+}
+
+
+int mmc_init(struct mmc *mmc)
+{
+ int err;
+ int flash_type = 0;
+
+
+
+ if (mmc->has_init)
+ return 0;
+
+ zx29_dwmci_clksel();
+ err = mmc->init(mmc);
+
+ if (err)
+ return err;
+
+ /*if (mmc_getcd(mmc) == 0) {
+ mmc->has_init = 0;
+ printf("MMC: no card present\n");
+ return NO_CARD_ERR;
+ }*/
+ mmc_set_bus_width(mmc, 1);
+ mmc_set_clock(mmc, 1);
+
+
+ /* Reset the Card */
+ err = mmc_go_idle(mmc);
+ if (err)
+ return err;
+
+ /* The internal partition reset to user partition(0) at every CMD0*/
+ mmc->part_num = 0;
+
+ err = mmc_send_op_cond(mmc);
+
+ if (err)
+ {
+ printf("Card did not respond to voltage select!\n");
+ return UNUSABLE_ERR;
+ }
+
+ err = mmc_startup(mmc);
+ if (err)
+ mmc->has_init = 0;
+ else
+ mmc->has_init = 1;
+ return err;
+}
+
+/*
+ * CPU and board-specific MMC initializations. Aliased function
+ * signals caller to move on
+ */
+static int __def_mmc_init(bd_t *bis)
+{
+ return -1;
+}
+
+int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
+int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
+
+void print_mmc_devices(char separator)
+{
+ struct mmc *m;
+ struct list_head *entry;
+
+ list_for_each(entry, &mmc_devices) {
+ m = list_entry(entry, struct mmc, link);
+
+ printf("%s: %d", m->name, m->block_dev.dev);
+
+ if (entry->next != &mmc_devices)
+ printf("%c ", separator);
+ }
+
+ printf("\n");
+}
+
+int get_mmc_num(void)
+{
+ return cur_dev_num;
+}
+
+int mmc_initialize(bd_t *bis)
+{
+ INIT_LIST_HEAD (&mmc_devices);
+ cur_dev_num = 0;
+
+ board_mmc_init(bis);
+ mmc_get_dev(0);
+ print_mmc_devices(',');
+
+ return 0;
+}
+
+int mmc_read( nand_info_t *nand, loff_t src, size_t *length, u_char *dst)
+{
+ ulong start = 0;
+ ulong end = 0;
+ lbaint_t blkcnt = 0;
+ uchar buf_s[512] = {0}; /*buffer for start block*/
+ uchar buf_e[512] = {0}; /*buffer for end block*/
+ uint blklen = 0;
+ uint len_s = 0;
+ uint len_e = 0;
+ int ret = 0;
+ size_t size = *length;
+
+ struct mmc *mmc = find_mmc_device(0);
+
+ if (!mmc)
+ return NO_CARD_ERR;
+
+ blklen = mmc->read_bl_len;
+
+ if((size == 0)||(src > mmc->capacity)||((src+size)> mmc->capacity))
+ {
+ printf("read length is error\n");
+ return LEN_ERR;
+ }
+
+ start = src &(~(blklen-1)); /*ÆðʼµØÖ·¶ÔÆëµ½¿é±ß½ç*/
+ end = (src+size-1)&(~(blklen-1)); /*½áÊøµØÖ·¶ÔÆëµ½¿é±ß½ç*/
+ if(size%blklen)
+ blkcnt = (size/blklen)+1;
+ else
+ blkcnt = size/blklen; /*¼ÆËãʵ¼Ê¶ÁÈ¡¿éÊý*/
+
+ len_s = blklen-(src-start); /*Æðʼ¿éʵ¼Ê³¤¶È*/
+ len_e = (src+size)-end; /*½áÊø¿éʵ¼Ê³¤¶È*/
+ if((start == src)&&(size%blklen == 0))
+ {
+ ret = mmc_bread(0, start/blklen, blkcnt, dst); /*°´Õû¿é¶ÔÆë¶ÁÈ¡*/
+ if(ret == blkcnt)
+ return 0;
+ else
+ return -1;
+ }
+ else if (blkcnt == 1) /*µ¥¿é²»¶ÔÆë¶ÁÈ¡*/
+ {
+ ret = mmc_bread(0, start/blklen, 1, (uchar *)buf_s);
+ memcpy(dst, (uchar *)buf_s+src-start,size);
+ if(ret == 1)
+ return 0;
+ else
+ return -1;
+ }
+ else /*¶à¿é²»¶ÔÆë¶ÁÈ¡*/
+ {
+ ret = mmc_bread(0, start/blklen, 1, (uchar *)buf_s);
+ ret += mmc_bread(0, (start+blklen)/blklen, blkcnt-2, dst+len_s);
+ ret += mmc_bread(0, end/blklen, 1, (uchar *)buf_e);
+ memcpy(dst,(uchar *)buf_s+src-start,len_s);
+ memcpy(dst+len_s+(blkcnt-2)*blklen,(uchar *)buf_e,len_e);
+ if(ret == blkcnt)
+ return 0;
+ else
+ return -1;
+ }
+}
+
+int mmc_erase( u64 src, lbaint_t blkcnt)
+{
+ ulong start = 0;
+ int ret = 0;
+ struct mmc *mmc = find_mmc_device(0);
+
+ if (!mmc)
+ return NO_CARD_ERR;
+
+ if((blkcnt == 0)||(src > mmc->capacity)||((src+blkcnt*mmc->read_bl_len)> mmc->capacity))
+ {
+ printf("length is error\n");
+ return LEN_ERR; //LENGTH_ERR
+ }
+ start = src &(~(mmc->read_bl_len-1)); /*µØÖ·¶ÔÆëµ½¿é±ß½ç*/
+ ret = mmc_berase(0, start/mmc->read_bl_len, blkcnt);
+ if(ret == blkcnt)
+ return 0;
+ else
+ return -1;
+
+}
+
+int mmc_write( nand_info_t *nand, loff_t src, size_t *length, u_char *dst, int flags)
+{
+ ulong start = 0;
+ ulong end = 0;
+ lbaint_t blkcnt = 0;
+ uchar buf_s[512] = {0};
+ uchar buf_e[512] = {0};
+ uint blklen = 0;
+ uint len_s = 0;
+ uint len_e = 0;
+ int ret = 0;
+ size_t size = *length;
+ struct mmc *mmc = find_mmc_device(0);
+
+ if (!mmc)
+ return NO_CARD_ERR;
+
+ blklen = mmc->read_bl_len;
+ if((size == 0)||(src > mmc->capacity)||((src+size)> mmc->capacity))
+ {
+ printf("length is error\n");
+ return LEN_ERR;
+ }
+ start = src &(~(blklen-1)); /*ÆðʼµØÖ·¶ÔÆëµ½¿é±ß½ç*/
+ end = (src+size-1)&(~(blklen-1)); /*½áÊøµØÖ·¶ÔÆëµ½¿é±ß½ç*/
+ if(size%mmc->read_bl_len)
+ blkcnt = (size/blklen)+1;
+ else
+ blkcnt = size/blklen; /*¼ÆËãʵ¼ÊдÈë¿éÊý*/
+
+ len_s = blklen-(src-start); /*Æðʼ¿éʵ¼Ê³¤¶È*/
+ len_e = (src+size)-end; /*½áÊø¿éʵ¼Ê³¤¶È*/
+
+ if((start == src)&&(size%blklen == 0))
+ {
+ ret = mmc_bwrite(0, start/blklen, blkcnt, dst); /*°´Õû¿é¶ÔÆëдÈë*/
+ if(ret == blkcnt)
+ return 0;
+ else
+ return -1;
+
+ }
+ else if (blkcnt == 1) /*µ¥¿é²»¶ÔÆëдÈë*/
+ {
+ ret = mmc_bread(0, start/blklen, 1, (uchar *)buf_s);
+ memcpy((uchar *)buf_s+src-start,dst ,size);
+ ret += mmc_bwrite(0, start/blklen, 1, (uchar *)buf_s);
+ if(ret == 2)
+ return 0;
+ else
+ return -1;
+ }
+ else /*¶à¿é²»¶ÔÆëдÈë*/
+ {
+ ret = mmc_bread(0, start/blklen, 1, (uchar *)buf_s);
+ ret += mmc_bread(0, end/blklen, 1, (uchar *)buf_e);
+ ret += mmc_bwrite(0, (start+blklen)/blklen, blkcnt-2, dst+len_s);
+
+ memcpy((uchar *)buf_s+src-start,dst,len_s);
+ memcpy((uchar *)buf_e,dst+len_s+(blkcnt-2)*blklen,len_e);
+ ret += mmc_bwrite(0, start/blklen, 1, (uchar *)buf_s);
+ ret += mmc_bwrite(0, end/blklen, 1, (uchar *)buf_e);
+ if(ret == blkcnt+2)
+ return 0;
+ else
+ return -1;
+ }
+}
+