[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit
Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/boot/common/src/uboot/test/Makefile b/boot/common/src/uboot/test/Makefile
new file mode 100644
index 0000000..d5f020a
--- /dev/null
+++ b/boot/common/src/uboot/test/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+#CFLAGS += -DET_DEBUG -DDEBUG
+
+LIB = $(obj)libtest.o
+
+COBJS-y += test_ddr.o
+COBJS-y += test_nand.o
+COBJS-y += test_gpio.o
+COBJS-y += test_tcled.o
+COBJS-y += test_entry.o
+COBJS := $(COBJS-y)
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/boot/common/src/uboot/test/test_ddr.c b/boot/common/src/uboot/test/test_ddr.c
new file mode 100644
index 0000000..db0b59e
--- /dev/null
+++ b/boot/common/src/uboot/test/test_ddr.c
@@ -0,0 +1,161 @@
+#include <common.h>
+#include <command.h>
+#include <net.h>
+#include <jffs2/load_kernel.h>
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/lsp_crpm.h>
+#include "errno.h"
+#include <config.h>
+#include <drvs_gpio.h>
+
+
+#if CONFIG_HARDWARE_TEST
+
+#define DDR_START 0x20000000
+#define DDR_END 0x27800000
+
+void led_init(void)
+{
+ int32_t reg = 0;
+
+ reg = __REG(0x10d440); /* ¹¦ÄÜÒý½Å */
+ reg |= (0x1 << 24);
+ __REG(0x10d440)=reg;
+
+ reg = __REG(0x10dC04); /* config OUT */
+ reg &= (~(0x1<<9));
+ __REG(0x10dC04)=reg;
+
+ #if 1
+ reg = __REG(0x10dC08);
+ reg |= (0x1<<9);
+ __REG(0x10dC08)=reg;
+ #endif
+}
+
+void led_on(void)
+{
+ int32_t reg = __REG(0x10dC08);
+ reg |= (0x1<<9);
+ __REG(0x10dC08)=reg;
+}
+
+void led_off(void)
+{
+ int32_t reg = __REG(0x10dC08);
+ reg &= ~(0x1<<9);
+ __REG(0x10dC08)=reg;
+}
+
+
+int do_test_ddr(void)
+{
+ volatile unsigned char *test_count = 0;
+ static int test_cnt = 0;
+ unsigned int cnt = 0;
+ volatile unsigned int state = 0;
+ int ret = 0;
+ test_cnt++;
+ printf("single byte test round:%d\n",test_cnt);
+ for(test_count = (unsigned char *)DDR_START; test_count < (unsigned char *)DDR_END; test_count++)
+ {
+ *test_count = 0x55;
+ if(*test_count != 0x55)
+ {
+ break;
+ ret = -1;
+ }
+ *test_count = 0xAA;
+ if(*test_count != 0xAA)
+ {
+ break;
+ ret = -1;
+ }
+
+ cnt++;
+ if(cnt%2000000 == 0)
+ {
+ if(state==0)
+ {
+ zDrvGpio_SetOutputValue(GPIO32,GPIO_HIGH);
+ printf("single byte test round:%d\n",cnt);
+ state = 1;
+ }
+ else
+ {
+ zDrvGpio_SetOutputValue(GPIO32,GPIO_LOW);
+ printf("single byte test round:%d\n",cnt);
+ state = 0;
+ }
+ }
+
+
+ }
+ if(test_count != (unsigned char *)DDR_END)
+ {
+ printf("test ddr faile\n");
+ ret = -1;
+ }
+ else
+ {
+ printf("test ddr success\n");
+ }
+
+ if(ret == -1)
+ {
+ zDrvGpio_SetOutputValue(GPIO70,GPIO_HIGH);
+ while(1);
+ }
+ printf("memset test round:%d\n",test_cnt);
+ memset(DDR_START,0x5a,DDR_END-DDR_START);
+ printf("check memset\n");
+ for(test_count = (unsigned char *)DDR_START; test_count < (unsigned char *)DDR_END; test_count++)
+ {
+ if(*test_count != 0x5a)
+ {
+ break;
+ ret = -1;
+ }
+ cnt++;
+ if(cnt%2000000 == 0)
+ {
+ if(state==0)
+ {
+ zDrvGpio_SetOutputValue(GPIO32,GPIO_HIGH);
+ state = 1;
+ }
+ else
+ {
+ zDrvGpio_SetOutputValue(GPIO32,GPIO_LOW);
+ state = 0;
+ }
+ }
+ }
+ if(test_count != (unsigned char *)DDR_END)
+ {
+ printf("test ddr faile\n");
+ ret = -1;
+ }
+ else
+ {
+ printf("test ddr success\n");
+ }
+
+ if(ret == -1)
+ {
+ zDrvGpio_SetOutputValue(GPIO70,GPIO_HIGH);
+ while(1);
+ }
+ return 0;
+}
+
+U_BOOT_CMD(
+ test_ddr, CONFIG_SYS_MAXARGS, 0, do_test_ddr,
+ "test_ddr: test_ddr ",
+ ""
+);
+
+#endif
+
diff --git a/boot/common/src/uboot/test/test_entry.c b/boot/common/src/uboot/test/test_entry.c
new file mode 100644
index 0000000..7bc88be
--- /dev/null
+++ b/boot/common/src/uboot/test/test_entry.c
@@ -0,0 +1,59 @@
+#include <common.h>
+#include <command.h>
+#include <net.h>
+#include <jffs2/load_kernel.h>
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/lsp_crpm.h>
+#include "errno.h"
+#include <config.h>
+#include <drvs_gpio.h>
+
+
+#if CONFIG_HARDWARE_TEST
+/*******************************************************************************
+ * Function: hardware_test
+ * Description: ÓÃÓÚÓ²¼þ²âÊÔ
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+ void hardware_test(void)
+{
+ //test DDR and NAND
+
+ zDrvGpio_SetFunc(GPIO32,GPIO32_GPIO32);
+ zDrvGpio_SetFunc(GPIO33,GPIO33_GPIO33);
+ zDrvGpio_SetFunc(GPIO70,GPIO70_GPIO70);
+ zDrvGpio_SetFunc(GPIO75,GPIO75_GPIO75);
+
+ zDrvGpio_SetDirection(GPIO32,GPIO_OUT);
+ zDrvGpio_SetDirection(GPIO33,GPIO_OUT);
+ zDrvGpio_SetDirection(GPIO70,GPIO_OUT);
+ zDrvGpio_SetDirection(GPIO75,GPIO_OUT);
+
+ zDrvGpio_SetOutputValue(GPIO32, GPIO_LOW);
+ zDrvGpio_SetOutputValue(GPIO33, GPIO_LOW);
+
+ zDrvGpio_SetOutputValue(GPIO70, GPIO_HIGH);
+ zDrvGpio_SetOutputValue(GPIO75, GPIO_HIGH);
+ udelay(100000);
+ zDrvGpio_SetOutputValue(GPIO70, GPIO_LOW);
+ zDrvGpio_SetOutputValue(GPIO75, GPIO_LOW);
+
+ while(1)
+ {
+ run_command("test_ddr", 0);
+ run_command("test_nand", 0);
+ }
+}
+
+#endif
+
diff --git a/boot/common/src/uboot/test/test_gpio.c b/boot/common/src/uboot/test/test_gpio.c
new file mode 100644
index 0000000..7a729fa
--- /dev/null
+++ b/boot/common/src/uboot/test/test_gpio.c
@@ -0,0 +1,51 @@
+#include <common.h>
+#include <command.h>
+#include <net.h>
+#include <jffs2/load_kernel.h>
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/lsp_crpm.h>
+#include "errno.h"
+
+//#if CONFIG_HARDWARE_TEST
+#if 0
+void gpio_led_on(gpio_pin_t pin, gpio_sel_t val)
+{
+ gpio_sel_t value = gpio_get_reuse(pin); /*for restore*/
+ gpio_set_reuse(pin,val); /* gpio function*/
+ gpio_direction_output(pin,1); /*out high*/
+ udelay(1000000);
+ gpio_direction_output(pin,0); /*out low*/
+ gpio_direction_input(pin);
+ gpio_set_reuse(pin,value); /*restore*/
+}
+
+void gpio_leds_on(void)
+{
+ gpio_led_on(GPIO9,1); /*gpio9 default function is i2c sda1*/
+ gpio_led_on(GPIO11,0);
+ gpio_led_on(GPIO12,0);
+// gpio_led_on(GPIO13,0);
+// gpio_led_on(GPIO16,0);
+ gpio_led_on(GPIO17,0);
+}
+
+
+int do_test_gpio(void)
+{
+ uint8_t i = 10;
+ while( i-- )
+ {
+ gpio_leds_on();
+ }
+ return 0;
+}
+
+U_BOOT_CMD(
+ test_gpio, CONFIG_SYS_MAXARGS, 0, do_test_gpio,
+ "test_gpio: test_gpio ",
+ ""
+);
+
+#endif
diff --git a/boot/common/src/uboot/test/test_nand.c b/boot/common/src/uboot/test/test_nand.c
new file mode 100644
index 0000000..4858820
--- /dev/null
+++ b/boot/common/src/uboot/test/test_nand.c
@@ -0,0 +1,96 @@
+#include <common.h>
+#include <command.h>
+#include <net.h>
+#include <jffs2/load_kernel.h>
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/lsp_crpm.h>
+#include "errno.h"
+#include <drvs_gpio.h>
+
+
+#if CONFIG_HARDWARE_TEST
+
+/* ================================================================================
+ * do_test_nand :
+ * ³É¹¦: GPIO17 GPIO16 ¶¼ÁÁ
+ * ʧ°Ü: GPIO17 ÁÁ
+ */
+int do_test_nand(void)
+{
+ uint32_t is_ok = 0;
+ static uint32_t nand_led_state = 0;
+ static uint32_t test_cnt=0;
+
+ test_cnt++;
+
+ memcpy((uint8_t *)0x21000000, (uint8_t *)0x82000000, 0x4000); //SYS_IRAM2_BASE
+
+ run_command("nand erase 0x300000 0x20000", 0);
+ run_command("nand write 0x21000000 0x300000 0x4000", 0);
+ run_command("nand read 0x22000000 0x300000 0x4000", 0);
+ is_ok = memcmp((uint8_t *)0x21000000, (uint8_t *)0x22000000, 0x4000);
+ if( is_ok != 0 )
+ goto error;
+ printf("test round:%d\n",test_cnt);
+
+ run_command("nand erase 0x500000 0x20000", 0);
+ run_command("nand write 0x21000000 0x500000 0x4000", 0);
+ run_command("nand read 0x23000000 0x500000 0x4000", 0);
+ is_ok = memcmp((uint8_t *)0x21000000, (uint8_t *)0x23000000, 0x4000);
+ if( is_ok != 0 )
+ goto error;
+ printf("test round:%d\n",test_cnt);
+
+ run_command("nand erase 0x5000000 0x20000", 0);
+ run_command("nand write 0x21000000 0x5000000 0x4000", 0);
+ run_command("nand read 0x24000000 0x5000000 0x4000", 0);
+ is_ok = memcmp((uint8_t *)0x21000000, (uint8_t *)0x24000000, 0x4000);
+ if( is_ok != 0 )
+ goto error;
+ printf("test round:%d\n",test_cnt);
+
+ run_command("nand erase 0xf000000 0x20000", 0);
+ run_command("nand write 0x21000000 0xf000000 0x4000", 0);
+ run_command("nand read 0x25000000 0xf000000 0x4000", 0);
+ is_ok = memcmp((uint8_t *)0x21000000, (uint8_t *)0x25000000, 0x4000);
+ if( is_ok != 0 )
+ goto error;
+ printf("test round:%d\n",test_cnt);
+
+ if( nand_led_state ==0 )
+ {
+ zDrvGpio_SetOutputValue(GPIO33,GPIO_HIGH);
+ nand_led_state = 1;
+ }
+ else
+ {
+ zDrvGpio_SetOutputValue(GPIO33,GPIO_LOW);
+ nand_led_state = 0;
+ }
+
+ udelay(500000);
+
+ return 0;
+
+ error:
+ zDrvGpio_SetOutputValue(GPIO75,GPIO_HIGH);
+ while(1);
+ printf("nand test failed !");
+ run_command("nand erase 0x300000 0x20000", 0);
+ run_command("nand erase 0x500000 0x20000", 0);
+ run_command("nand erase 0x5000000 0x20000", 0);
+ run_command("nand erase 0xf000000 0x20000", 0);
+ return -1;
+
+}
+
+U_BOOT_CMD(
+ test_nand, CONFIG_SYS_MAXARGS, 0, do_test_nand,
+ "test_nand: test_nand ",
+ ""
+);
+
+#endif
diff --git a/boot/common/src/uboot/test/test_tcled.c b/boot/common/src/uboot/test/test_tcled.c
new file mode 100644
index 0000000..11a3d9b
--- /dev/null
+++ b/boot/common/src/uboot/test/test_tcled.c
@@ -0,0 +1,210 @@
+#include <common.h>
+#include <command.h>
+#include <net.h>
+#include <jffs2/load_kernel.h>
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <i2c.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/lsp_crpm.h>
+#include "errno.h"
+
+//#if CONFIG_HARDWARE_TEST
+#if 0
+
+#define TPS65912_I2C_SLAVE_ADDR0 (0x2D)
+
+#define TPS65912_REG_ADDR_GPIO3 0x43
+#define TPS65912_REG_ADDR_GPIO4 0x44
+#define TPS65912_REG_ADDR_GPIO5 0x45
+#define GPIO_ODEN_LSH 5
+#define GPIO_CFG_LSH 2
+#define GPIO_LED_ONOFF_LSH 0
+#define GPIO_BIT_SET 1
+
+#if 1
+#define TPS65912_BITFVAL(var, lsh) ( (var) << (lsh) )
+#define TPS65912_BITFMASK(wid, lsh) ( ((1U << (wid)) - 1) << (lsh) )
+#define TPS65912_BITFEXT(var, wid, lsh) ((var & TPS65912_BITFMASK(wid, lsh)) >> (lsh))
+
+#define PMIC_ALL_BITS 0xFF
+#endif
+
+int zDrvPmic_SetRegister(uchar slv_addr, uchar reg_addr, uchar data, uchar mask)
+{
+ int ret = 0;
+ uchar content =0;
+
+ // If it is not updating the whole register (8 bits), we need to read
+ // the register first. Then we set the bits and write it back.
+ if ((mask & PMIC_ALL_BITS) ^ PMIC_ALL_BITS) /* 0xFF=0b 1111 1111, mask xx11xxx , */
+ {
+ ret = i2c_read(0, slv_addr, reg_addr, 8, &content, 1);
+ if (ret != 0)
+ {
+ return ret;
+ }
+ content &= ~mask;
+ content |= data & mask;
+ }
+ else
+ {
+ content = data;
+ }
+
+ ret = i2c_write(0, slv_addr, reg_addr, 8, &content, 1);
+ if (ret != 0)
+ {
+ return ret;
+ }
+
+ return ret;
+}
+
+
+int tcled_init(void)
+{
+ int ret = 0;
+ uchar slv_addr=0, reg_addr=0, reg_val=0, mask=0;
+
+#if 1 /* set led as GPIO */
+ /* GPIO_3 */
+ /* ODEN - 1 */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO3;
+
+ reg_val = TPS65912_BITFVAL(1, GPIO_ODEN_LSH ); /* µÚÒ»¸ö²ÎÊý val = 1;¸ÃλÖÃ1 */
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_ODEN_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+ /* CFG - 1 */
+ reg_val = TPS65912_BITFVAL(1, GPIO_CFG_LSH);
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_CFG_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+
+
+ /* GPIO_4 */
+ /* ODEN - 1 */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO4;
+
+ reg_val = TPS65912_BITFVAL(1, GPIO_ODEN_LSH );
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_ODEN_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+ /* CFG - 1 */
+ reg_val = TPS65912_BITFVAL(1, GPIO_CFG_LSH );
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_CFG_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+
+
+ /* GPIO_5 */
+ /* ODEN - 1 */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO5;
+
+ reg_val = TPS65912_BITFVAL(1, GPIO_ODEN_LSH );
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_ODEN_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+ /* CFG - 1 */
+ reg_val = TPS65912_BITFVAL(1, GPIO_CFG_LSH);
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_CFG_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+#endif
+
+ /* set the leds initial status */
+ /* CLOSE LEDA - RED */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO3;
+ reg_val = TPS65912_BITFVAL(1, GPIO_LED_ONOFF_LSH);
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_LED_ONOFF_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+
+ /* CLOSE LEDB - GREEN */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO4;
+ reg_val = TPS65912_BITFVAL(1, GPIO_LED_ONOFF_LSH);
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_LED_ONOFF_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+
+ /* CLOSE LEDC - BLUE */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO5;
+ reg_val = TPS65912_BITFVAL(1, GPIO_LED_ONOFF_LSH);
+ mask = TPS65912_BITFMASK(GPIO_BIT_SET, GPIO_LED_ONOFF_LSH);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+
+ return ret;
+
+}
+
+int tcled_on(int led_red, int led_green, int led_blue)
+{
+ int ret = 0;
+ uchar slv_addr=0, reg_addr=0, reg_val=0, mask=0;
+ uchar statusA = 0;
+ uchar statusB = 0;
+ uchar statusC = 0;
+
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+
+ statusA = led_red ? 0 : 1; /* led_red=1,±íʾ¿ª£¬ÔòGPIOÉèÖÃΪ0 */
+ statusB = led_green ? 0 : 1;
+ statusC = led_blue ? 0 : 1;
+
+ /* LEDA µÄ²Ù×÷ */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO3;
+ reg_val = TPS65912_BITFVAL(statusA, 0);
+ mask = TPS65912_BITFMASK(1, 0);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+
+ /* LEDB µÄ²Ù×÷ */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO4;
+ reg_val = TPS65912_BITFVAL(statusB, 0); /* statusB=0:¿ª£¬ =1,¹Ø */
+ mask = TPS65912_BITFMASK(1, 0);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+
+ /* LEDC µÄ²Ù×÷ */
+ slv_addr = TPS65912_I2C_SLAVE_ADDR0;
+ reg_addr = TPS65912_REG_ADDR_GPIO5;
+ reg_val = TPS65912_BITFVAL(statusB, 0); /* statusB=0:¿ª£¬ =1,¹Ø */
+ mask = TPS65912_BITFMASK(1, 0);
+ ret = zDrvPmic_SetRegister(slv_addr, reg_addr, reg_val, mask);
+}
+
+void leds_on(void)
+{
+ tcled_on(1, 0, 0);
+ tcled_on(0, 1, 0);
+ tcled_on(1, 0, 1);
+ udelay(1000000);
+ tcled_on(1, 1, 0);
+ tcled_on(1, 0, 1);
+ tcled_on(0, 1, 1);
+ udelay(1000000);
+ tcled_on(1, 1, 1);
+ tcled_on(0, 0, 0);
+}
+
+
+int do_test_tcled(void)
+{
+ tcled_init();
+
+ uint8_t i = 10;
+ while( i-- )
+ {
+ leds_on();
+ }
+ return 0;
+}
+
+U_BOOT_CMD(
+ test_tcled, CONFIG_SYS_MAXARGS, 0, do_test_tcled,
+ "test_TCled: test_tcled ",
+ ""
+);
+
+#endif
+
+