[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit
Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/cp/ps/driver/inc/cfg/drvs_cfg.h b/cp/ps/driver/inc/cfg/drvs_cfg.h
new file mode 100644
index 0000000..010e3aa
--- /dev/null
+++ b/cp/ps/driver/inc/cfg/drvs_cfg.h
@@ -0,0 +1,75 @@
+/*******************************************************************************
+ * Copyright (C) 2008, ZTE Corporation.
+ *
+ * File Name: drvs_cfg.h
+ * File Mark:
+ * Description: This file contains the
+ * Others:
+ * Version: V1.0
+ * Author: huji
+ * Date: 2008-11-18
+ * History 1:
+ * Date: 2008-12-31
+ * Version:
+ * Author: wangxia
+ * Modification: add flash address for zx2930,zx2960,zx2802
+ *********************************************************************************/
+
+#ifndef _DRV_CFG_H
+#define _DRV_CFG_H
+
+/****************************************************************************
+* Include files
+****************************************************************************/
+/*for iram ddr*/
+#include "ram_config.h"
+/*for registers*/
+#include "drvs_chip_cfg.h"
+/*for dma regions*/
+#include "dma_cfg.h"
+#include "drvs_int.h"
+
+/****************************************************************************
+* type
+****************************************************************************/
+
+/****************************************************************************
+* Macros
+****************************************************************************/
+//add for voice drv by xuxinqiang
+#define BASEADR_SM_INT (UINT16 *) 0xF6001000
+/****************************************************************************
+* i2S configuration
+****************************************************************************/
+#define ARM_TOP_REG_BASE 0x0010D000
+
+#define ARM_I2S_LOOP_CFG *((volatile UINT32 *)(0x00140060))
+
+#define ARM_FRAC_DIV_FREQ *((volatile UINT32 *)(0x0010D09C))
+#define ARM_CODEC_MCLK *((volatile UINT32 *)(0x0010D0a0))
+
+/*ARM I2S SEL & SET*/
+#define CRPM_CLKSEL *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x00))
+#define I2S0_CLKDIV *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x14))
+#define I2S1_CLKDIV *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x18))
+
+
+/*xxxx config---------------------------------------------------------------*/
+#define DMA_SILLY_MODE_EN 0
+//zhouyuchao add for usb phy suspend
+#define NAND_USB_CTRL (0x00)
+
+/****************************************************************************
+* sd configuration
+****************************************************************************/
+#define SD_MAX_SLOT_NUM 1 //max slot numbers
+#if (defined _CHIP_ZX2975)||(defined _CHIP_ZX297520)||(defined _CHIP_ZX297520V2)
+#define IO_OUT_POWER_READ_REG ((volatile UINT32*)(0x60005098))
+#define IO_OUT_POWER_WRITE_REG ((volatile UINT32*)(0x60005098))
+#else
+#define IO_OUT_POWER_READ_REG ((volatile UINT32*)(0x60005068))
+#define IO_OUT_POWER_WRITE_REG ((volatile UINT32*)(0x60005098))
+#endif
+
+#endif/*_DRV_CFG_H*/
+