[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit
Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/cp/ps/driver/inc/misc/drvs_tsc.h b/cp/ps/driver/inc/misc/drvs_tsc.h
new file mode 100644
index 0000000..634be99
--- /dev/null
+++ b/cp/ps/driver/inc/misc/drvs_tsc.h
@@ -0,0 +1,235 @@
+/*******************************************************************************
+ * Copyright (C) 2014, ZTE Corporation.
+ *
+ * File Name:
+ * File Mark:
+ * Description:
+ * Others:
+ * Version: v1.0
+ * Author:
+ * Date: 2015-09-11
+ * History 1:
+ * Date:
+ * Version:
+ * Author:
+ * Modification:
+ * History 2:
+ ********************************************************************************/
+
+#ifndef _DRVS_TSC_H
+#define _DRVS_TSC_H
+
+/****************************************************************************
+* Include files
+****************************************************************************/
+#include "ram_config.h"
+
+/****************************************************************************
+* Types
+****************************************************************************/
+ typedef enum _T_TsCtrl_Probe
+{
+ PROBE_ADC1 = 0,
+ PROBE_ADC2,
+ PROBE_RESEV1,
+ PROBE_RESEV2,
+ PROBE_RESEV3,
+ PROBE_RESEV4,
+ PROBE_MAX,
+} Ts_TsCtrl_Probe;
+
+ typedef enum _T_Ts_Temp_interregional
+ {
+ TS_TEMP_INTERVAL_T0 = 0,
+ TS_TEMP_INTERVAL_T1,
+ TS_TEMP_INTERVAL_T2,
+ TS_TEMP_INTERVAL_T3,
+ TS_TEMP_INTERVAL_T4,
+ TS_TEMP_INTERVAL_T5,
+ TS_TEMP_INTERVAL_T6,
+ TS_TEMP_INTERVAL_T7,
+ TS_TEMP_INTERVAL_MAX
+ }Ts_Temp_interregional;
+ typedef enum
+ {
+ TS_TEMP_VALUE_TABLE_NUMBER = 0,
+ TS_TEMP_VOLTAGE_TABLE_NUMBER = 1,
+ TS_TEMP_TABLE_NUMBER_MAX
+ }TS_TEMP_TABLE_NUMBER;
+
+ typedef enum _T_Ts_Member
+ {
+ TS_MEMBER_PROBE = 0,
+ TS_MEMBER_TEMP,
+
+ TS_MEMBER_MAX,
+ } Ts_Member;
+
+
+ typedef enum _T_TsCtrl_Strategy_Id
+{
+ PS_STRATEGY_RATE = 0,
+ PS_STRATEGY_ANYRESIDENT,
+ WIFI_STRATEGY,
+ CHARGER_STRATEGY,
+ AP_RATE,
+ MAX_TSCTRL_STRATEGY_ID
+} T_TsCtrl_Strategy_ModuleId;
+
+/**************************************************
+ 0--STRTEGY_STOP: ֹͣ
+ 1--STRTEGY_START: ¿ªÊ¼
+ 2--STRTEGY_HOLD: HOLD֮ǰ²ßÂÔ
+**************************************************/
+ typedef enum _T_TsCtrl_Strategy
+ {
+ STRTEGY_STOP = 0,
+ STRTEGY_START=1,
+ STRTEGY_HOLD=2,
+
+ STRTEGY_MAX,
+ } Ts_TsCtrlStrategy;
+ /****************************************************************************
+ * Global Function Prototypes
+ ****************************************************************************/
+typedef struct _T_ZDrvTsc_Opt
+{
+ VOID (*tsc_RefGetAdcvalue)(SINT32 adcValue, UINT32 *temp);
+ VOID (*tsc_RefSetProbeStr)(UINT32 probe_num,UINT32 temperature );
+ VOID (*tsc_RefStrategyDispatch)(VOID);
+
+}T_ZDrvTsc_Opt;
+/****************************************************************************
+* macro define
+****************************************************************************/
+#define tsc_SetRegBit(regName, bitAddr, bitValue) \
+ do{ \
+ if(bitValue == TRUE) \
+ reg32(regName) |= (0x1<<bitAddr); \
+ else \
+ reg32(regName) &= ~(0x1<<bitAddr); \
+ }while(0)
+
+#define tsc_SetRegBits(regName, bitsAddr, bitsLen, bitsValue) \
+ do{ \
+ reg32(regName) = (reg32(regName)&(~(((0x1<<bitsLen)-0x1)<<bitsAddr)))|(bitsValue<<bitsAddr);\
+ }while(0)
+
+
+/**/
+#define STRATEGY_PHY_NUM 8
+#define BITS_FOR_PHYIRAM 1
+/*TSCTRL_PHY iram ÿһbit±íʾPHYµÄÒ»¸ö²ßÂÔÊÇ·ñÖ´ÐÐ*/
+#define BIT_LIMIT_LTE_DOWNRATE1 0
+#define BIT_LIMIT_LTE_DOWNRATE2 1
+#define BIT_LIMIT_W_DOWNRATE1 2
+#define BIT_LIMIT_W_DOWNRATE2 3
+#define BIT_LIMIT_LTE_UPTRANSIMITPOWER1 4
+#define BIT_LIMIT_LTE_UPTRANSIMITPOWER2 5
+#define BIT_LIMIT_W_UPTRANSIMITPOWER1 6
+#define BIT_LIMIT_W_UPTRANSIMITPOWER2 7
+/**/
+//#define STRATEGY_PS_NUM 2
+#define BITS_FOR_PSIRAM 4
+/*TSCTRL_PS iram ÿËÄbit±íʾPSµÄÒ»¸ö²ßÂÔÊÇ·ñÖ´ÐÐ*/
+#define BIT_PS_RATE 0
+#define BIT_PS_ANYRESIDENT 4
+#define BIT_SHUTDOWN 8
+/**/
+//#define STRATEGY_PERIP_NUM 2
+#define BITS_FOR_PEPIPIRAM 4
+/*TSCTRL_PERIP iram ÿËÄbit±íʾTSCTRL_PERIPµÄÒ»¸ö²ßÂÔÊÇ·ñÖ´ÐÐ*/
+#define BIT_WIFI 0
+#define BIT_CHHRGER 4
+#define BIT_APRATE 8
+
+/**/
+//#define STRATEGY_AP_NUM 2
+#define BITS_FOR_APPIRAM 4
+/*TSCTRL_AP iram ÿËÄbit±íʾAPµÄÒ»¸ö²ßÂÔÊÇ·ñÖ´ÐÐ*/
+
+
+/*TSCTRL_PHY iramInfo:ÿһbit±íʾPHYµÄÒ»¸ö²ßÂÔÊÇ·ñÖ´ÐÐ
+bit0:limit_ltedownrate1 1:ÏÞÖÆlteÏÂÐÐËÙÂÊ1£»0:Í£Ö¹ÏÞÖÆlteÏÂÐÐËÙÂÊ1
+bit1:limit_ltedownrate2 1:ÏÞÖÆlteÏÂÐÐËÙÂÊ2£»0:Í£Ö¹ÏÞÖÆlteÏÂÐÐËÙÂÊ2
+bit2:limit_wdownrate1 1:ÏÞÖÆwÏÂÐÐËÙÂÊ1£»0:Í£Ö¹ÏÞÖÆwÏÂÐÐËÙÂÊ1
+bit3:limit_wdownrate2 1:ÏÞÖÆwÏÂÐÐËÙÂÊ2£»0:Í£Ö¹ÏÞÖÆwÏÂÐÐËÙÂÊ2
+bit4:limit_lteuptransmitrate1 1:ÏÞÖÆlteÉÏÐз¢É书ÂÊ1£»0:Í£Ö¹ÏÞÖÆlteÉÏÐз¢É书ÂÊ1
+bit5:limit_lteuptransmitrate2 1:ÏÞÖÆlteÉÏÐз¢É书ÂÊ2£»0:Í£Ö¹ÏÞÖÆlteÉÏÐз¢É书ÂÊ2
+bit6:limit_wuptransmitrate1 1:ÏÞÖÆwÉÏÐз¢É书ÂÊ1£»0:Í£Ö¹ÏÞÖÆwÉÏÐз¢É书ÂÊ1
+bit7:limit_wuptransmitrate2 1:ÏÞÖÆwÉÏÐз¢É书ÂÊ2£»0:Í£Ö¹ÏÞÖÆwÉÏÐз¢É书ÂÊ2
+*/
+#define TSCTRL_PHY (IRAM_BASE_ADDR_TPC+0x00)/* 1K£IRAM_BASE_ADDR_TPC++0x400--¬Â¿ØÊý¾Ý´æ·Å */
+
+/*TSCTRL_PHY+0x04--TSCTRL_PHY+0x44
+ÿ4 bit±íʾÿ¸ö̽²âµãÊÇ·ñÐèÒªÖ´ÐвßÂÔ1:Ö´ÐÐ0:²»Ö´ÐÐ;2 HOLD*/
+#define TSCTRL_PS (TSCTRL_PHY+0x04)
+#define TSCTRL_AP (TSCTRL_PHY+0x08)
+#define TSCTRL_PERIP (TSCTRL_PHY+0x0C)
+
+/*ÿ4 bit±íʾÿ¸ö̽²âµãÊÇ·ñÐèÒªÖ´ÐвßÂÔ1:Ö´ÐÐ0:²»Ö´ÐÐ;2 HOLD*/
+#define TSCTRL_LIMIT_LTE_DOWNRATE1 (TSCTRL_PHY+0x10) /*²ßÂÔA*/
+#define TSCTRL_LIMIT_LTE_DOWNRATE2 (TSCTRL_PHY+0x14) /*²ßÂÔB*/
+#define TSCTRL_LIMIT_W_DOWNRATE1 (TSCTRL_PHY+0x18) /*²ßÂÔA*/
+#define TSCTRL_LIMIT_W_DOWNRATE2 (TSCTRL_PHY+0x1c) /*²ßÂÔB*/
+#define TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER1 (TSCTRL_PHY+0x20) /*²ßÂÔC*/
+#define TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2 (TSCTRL_PHY+0x24) /*²ßÂÔD*/
+#define TSCTRL_LIMIT_W_UPTRANSIMITPOWER1 (TSCTRL_PHY+0x28) /*²ßÂÔC*/
+#define TSCTRL_LIMIT_W_UPTRANSIMITPOWER2 (TSCTRL_PHY+0x2c) /*²ßÂÔD*/
+#define TSCTRL_PS_RATE (TSCTRL_PHY+0x30) /*²ßÂÔE*/
+#define TSCTRL_PS_ANYRESIDENT (TSCTRL_PHY+0x34) /*²ßÂÔF*/
+#define TSCTRL_SHUTDOWN (TSCTRL_PHY+0x38) /*²ßÂÔG*/
+#define TSCTRL_WIFI (TSCTRL_PHY+0x3c) /*²ßÂÔF*/
+#define TSCTRL_CHARGER (TSCTRL_PHY+0x40) /*²ßÂÔF*/
+#define TSCTRL_APRATE (TSCTRL_PHY+0x44) /*²ßÂÔF*/
+#define TSCTRL_DFS (TSCTRL_PHY+0x48) /*²ßÂÔDFS*/
+
+/*ÿ¸ö̽Õë¶Ô²ßÂԵĿª¹ØÐÅÏ¢ÔÚ´æ´¢²ßÂÔIRAMµÄÆðʼbitλ*/
+#define BITS_FOR_PROBES 4
+#define BIT_PROBE_ADC1 (PROBE_ADC1*BITS_FOR_PROBES)
+#define BIT_PROBE_ADC2 (PROBE_ADC2*BITS_FOR_PROBES)
+#define BIT_PROBE_RESEV1 (PROBE_RESEV1*BITS_FOR_PROBES)
+#define BIT_PROBE_RESEV2 (PROBE_RESEV2*BITS_FOR_PROBES)
+#define BIT_PROBE_RESEV3 (PROBE_RESEV3*BITS_FOR_PROBES)
+#define BIT_PROBE_RESEV (PROBE_RESEV4*BITS_FOR_PROBES)
+
+
+/*Ô¤Áô²¿·Ö¿Õ¼äÓÃÀ´´æ´¢ÐèÒªR7´«µÝµ½A9µÄÐÅÏ¢,TSCTRL_PHY+0x100--TSCTRL_PHY+0x400*/
+#define TSCTRL_TEMPADC1 (TSCTRL_PHY+0x100) /*temp adc1*/
+#define TSCTRL_TEMPADC2 (TSCTRL_PHY+0x104) /*temp adc2*/
+#define TSCTRL_TEMPREV1 (TSCTRL_PHY+0x108) /*temp rev1*/
+#define TSCTRL_TEMPREV2 (TSCTRL_PHY+0x10c) /*temp rev2*/
+#define TSCTRL_TEMPREV3 (TSCTRL_PHY+0x110) /*temp rev3*/
+#define TSCTRL_TEMPREV4 (TSCTRL_PHY+0x114) /*temp rev3*/
+#define TSCTRL_DETECT_EN (TSCTRL_PHY+0x118) /*TsNvData.DetectEn*/
+#define TSCTRL_TEMP_PERCENT (TSCTRL_PHY+0x11c) /*APrate ,g_tempPercent*/
+
+/**/
+#define PROBE_NUM PROBE_MAX
+#define PROBE_INFO 2 //fixed value, probe num and temp
+#define TS_ADC_TEMP_NUMBER 2
+#define TS_ADC_TEMP_VOLTAGE_NUMBER 110
+#define TS_TEMP_NUMBER_SMALLEST 0
+#define TS_TEMP_NUMBER_BIGGEST 96
+
+#define TSC_DEBUG_DEF
+
+#ifdef TSC_DEBUG_DEF
+#define TSC_DEBUG(s...) zOss_Printf(1,1, ##s) /*ramlog_Printf(RAMLOG_MOD_CHARGER, ##s)*/
+#else
+#define TSC_DEBUG(s...)
+#endif
+ /****************************************************************************
+* fuction extern
+****************************************************************************/
+
+typedef VOID (* T_TsCtrl_CallbackFunction)( UINT8 en ); /*en: 1,Æô¶¯²ßÂÔ£¬0,Í£Ö¹²ßÂÔ; 2: hold ²ßÂÔ*/
+SINT32 zDrvTsc_SetOpt(T_ZDrvTsc_Opt* pTscOpt);
+
+extern SINT32 zDrvTsCtrl_RegCallback(T_TsCtrl_Strategy_ModuleId module,T_TsCtrl_CallbackFunction callback);
+extern SINT32 zDrvTsc_SetTscEn(UINT8 val); //val:0xB2,οشò¿ª£» ÆäËûֵοعرÕ
+extern SINT32 zDrvTsc_GetTscEn(VOID);
+VOID zDrvTsc_GetTscTempPercent(UINT32 *percent);
+//UINT32 *zDrvTsc_GetTscDbbProbTemp(void);
+#endif
+