[T106][ZXW-22]7520V3SCV2.01.01.02P42U09_VEC_V0.8_AP_VEC origin source commit
Change-Id: Ic6e05d89ecd62fc34f82b23dcf306c93764aec4b
diff --git a/pub/project/zx297520v3/include/nv/NvConfig.h b/pub/project/zx297520v3/include/nv/NvConfig.h
new file mode 100644
index 0000000..a70dbf5
--- /dev/null
+++ b/pub/project/zx297520v3/include/nv/NvConfig.h
@@ -0,0 +1,98 @@
+/*******************************************************************************
+ * Copyright (C) 2007, ZTE Corporation.
+ *
+ * File Name:
+ * File Mark:
+ * Description:
+
+ * Others:
+ * Version:
+ * Author: zhangpei
+ * Date:
+ * History 1:
+ * Date:
+ * Version:
+ * Author:
+ * Modification:
+ *
+ * History 2:
+********************************************************************************/
+
+#ifndef _NVCONFIG_H
+#define _NVCONFIG_H
+
+/****************************************************************************
+* Include files
+****************************************************************************/
+#include "RONvConfig.h"
+#include "RWNvConfig.h"
+#include "ram_config.h"
+
+/****************************************************************************
+* Local Macros
+****************************************************************************/
+// ZSP²àÎïÀí²ãNVµÄµØÖ·
+//NV-RO-AMT
+#define AMT_CALIB_LTE_NVRAM_BASE_ADDR (DDR_BASE_ADDR_PHY_NV)
+#define AMT_CALIB_LTE_NVRAM_LENTH OS_FLASH_AMT_LTE_RO_NONFAC_SIZE
+
+#define AMT_CALIB_TDS_NVRAM_BASE_ADDR (AMT_CALIB_LTE_NVRAM_BASE_ADDR+AMT_CALIB_LTE_NVRAM_LENTH)
+#define AMT_CALIB_TDS_NVRAM_LENTH OS_FLASH_AMT_TDS_RO_NONFAC_SIZE
+
+#define AMT_CALIB_GGE_NVRAM_BASE_ADDR (AMT_CALIB_TDS_NVRAM_BASE_ADDR+AMT_CALIB_TDS_NVRAM_LENTH)
+#define AMT_CALIB_GGE_NVRAM_LENTH OS_FLASH_AMT_GGE_RO_NONFAC_SIZE
+
+#define AMT_CALIB_WCDMA_NVRAM_BASE_ADDR (AMT_CALIB_GGE_NVRAM_BASE_ADDR+AMT_CALIB_GGE_NVRAM_LENTH)
+#define AMT_CALIB_WCDMA_NVRAM_LENTH OS_FLASH_AMT_WCDMA_RO_NONFAC_SIZE
+
+#define AMT_CALIB_LTEA_NVRAM_BASE_ADDR (AMT_CALIB_WCDMA_NVRAM_BASE_ADDR+AMT_CALIB_WCDMA_NVRAM_LENTH)
+#define AMT_CALIB_LTEA_NVRAM_LENTH OS_FLASH_AMT_LTEA_RO_NONFAC_SIZE
+
+//NV-RW-AMT-USER
+#define AMT_USER_LTE_NVRAM_BASE_ADDR (AMT_CALIB_LTEA_NVRAM_BASE_ADDR+AMT_CALIB_LTEA_NVRAM_LENTH)
+#define AMT_USER_LTE_NVRAM_LENTH OS_FLASH_AMT_RW_USER_LTE_SIZE
+
+#define AMT_USER_TDS_NVRAM_BASE_ADDR (AMT_USER_LTE_NVRAM_BASE_ADDR+AMT_USER_LTE_NVRAM_LENTH)
+#define AMT_USER_TDS_NVRAM_LENTH OS_FLASH_AMT_RW_USER_TDS_SIZE
+
+#define AMT_USER_GGE_NVRAM_BASE_ADDR (AMT_USER_TDS_NVRAM_BASE_ADDR+AMT_USER_TDS_NVRAM_LENTH)
+#define AMT_USER_GGE_NVRAM_LENTH OS_FLASH_AMT_RW_USER_GGE_SIZE
+
+#define AMT_USER_WCDMA_NVRAM_BASE_ADDR (AMT_USER_GGE_NVRAM_BASE_ADDR+AMT_USER_GGE_NVRAM_LENTH)
+#define AMT_USER_WCDMA_NVRAM_LENTH OS_FLASH_AMT_RW_USER_WCDMA_SIZE
+
+#define AMT_USER_LTEA_NVRAM_BASE_ADDR (AMT_USER_WCDMA_NVRAM_BASE_ADDR+AMT_USER_WCDMA_NVRAM_LENTH)
+#define AMT_USER_LTEA_NVRAM_LENTH OS_FLASH_AMT_RW_USER_LTEA_SIZE
+
+//NV-RW-PHY
+#define LTEA_PHY_NVRAM_BASE_ADDR (AMT_USER_LTEA_NVRAM_BASE_ADDR+AMT_USER_LTEA_NVRAM_LENTH)
+#define LTEA_PHY_NVRAM_LENTH OS_FLASH_LTEAPHY_RW_NONFAC_SIZE
+
+#define TDS_PHY_NVRAM_BASE_ADDR (LTEA_PHY_NVRAM_BASE_ADDR+LTEA_PHY_NVRAM_LENTH)
+#define TDS_PHY_NVRAM_LENTH OS_FLASH_TDPHY_RW_NONFAC_SIZE
+
+#define GSM_PHY_NVRAM_BASE_ADDR (TDS_PHY_NVRAM_BASE_ADDR+TDS_PHY_NVRAM_LENTH)
+#define GSM_PHY_NVRAM_LENTH OS_FLASH_GSML1G_RW_NONFAC_SIZE
+
+#define WCDMA_PHY_NVRAM_BASE_ADDR (GSM_PHY_NVRAM_BASE_ADDR+GSM_PHY_NVRAM_LENTH)
+#define WCDMA_PHY_NVRAM_LENTH OS_FLASH_WCDMAPHY_RW_NONFAC_SIZE
+
+#define PHY_CFG_NVRAM_BASE_ADDR (WCDMA_PHY_NVRAM_BASE_ADDR+WCDMA_PHY_NVRAM_LENTH)
+#define PHY_CFG_NVRAM_LENTH OS_FLASH_PHYCFG_RW_NONFAC_SIZE
+
+#define PHY_TXETAB_NVRAM_BASE_ADDR (PHY_CFG_NVRAM_BASE_ADDR+PHY_CFG_NVRAM_LENTH)
+#define PHY_TXETAB_NVRAM_LENTH OS_FLASH_TXETAB_RW_NONFAC_SIZE
+
+#define PHY_NV_CFG_END 0xFFFFFFFF
+
+typedef struct _T_zPhyNVCfg
+{
+ UINT32 uNVFlashBaseAddr; /*NV src addr(nand flash)*/
+ UINT32 uNVRamBaseAddr; /*NV dst addr(DDRAM)*/
+ UINT32 uNVSize; /*NV SIZE*/
+}
+T_zPhyNVCfg;
+
+extern T_zPhyNVCfg g_PhyNVCfg[];
+
+#endif /*_NVCONFIG_H*/