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/*******************************************************************************
* Copyright (C) 2007, ZTE Corporation.
*
* File Name: RWNvConfig.h
* File Mark:
* Description: descrip the nv config area,the start address of module
* Others:
* Version: v0.5
* Author: xuxingkui
* Date: 2009-09-30
* History 1:
* Date: 2009-11-24
* Version:
* Author:
* Modification:
* History 2:
********************************************************************************/
#ifndef _PRINVCONFIG_H
#define _PRINVCONFIG_H
#include "RWNvConfig.h"
#if 0
/****************************************************************************
Begin
****************************************************************************/
/****************************************************************************
Leave Factory Parmeters Area
****************************************************************************/
//#define OS_FLASH_PUB_OFFSET_FROM_NV (OS_FIRST_NV_ADDRESS_CONFIG + 262144 /* 256K ¼´¹«ÓÐÇøµÄ´óС */ )
#define OS_FLASH_RW_OFFSET_FROM_NV (0x40000) /* ¶ÁÐ´ÇøÆ«ÒÆ */
#if 0
/***************************
AMT area config
***************************/
#define OS_FLASH_AMT_RW_FAC_OFFSET_FROM_NV (OS_FLASH_RW_OFFSET_FROM_NV)
#define OS_FLASH_AMT_RW_FAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_AMT_RW_FAC_OFFSET_FROM_NV)
#define OS_FLASH_AMT_RW_FAC_SIZE 0
/***************************
ATI area config
***************************/
#define OS_FLASH_ATI_RW_FAC_OFFSET_FROM_NV (OS_FLASH_AMT_RW_FAC_OFFSET_FROM_NV + OS_FLASH_AMT_RW_FAC_SIZE)
#define OS_FLASH_ATI_RW_FAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_ATI_RW_FAC_OFFSET_FROM_NV)
#define OS_FLASH_ATI_RW_FAC_SIZE 0
/***************************
driver area config
***************************/
#define OS_FLASH_DRV_RW_FAC_OFFSET_FROM_NV (OS_FLASH_ATI_RW_FAC_OFFSET_FROM_NV + OS_FLASH_ATI_RW_FAC_SIZE)
#define OS_FLASH_DRV_RW_FAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_DRV_RW_FAC_OFFSET_FROM_NV)
#define OS_FLASH_DRV_RW_FAC_SIZE 0
/***************************
td physical area config
***************************/
#define OS_FLASH_TDPHY_RW_FAC_OFFSET_FROM_NV (OS_FLASH_DRV_RW_FAC_OFFSET_FROM_NV + OS_FLASH_DRV_RW_FAC_SIZE)
#define OS_FLASH_TDPHY_RW_FAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_TDPHY_RW_FAC_OFFSET_FROM_NV)
#define OS_FLASH_TDPHY_RW_FAC_SIZE 0
/***************************
GSM l1g area config
***************************/
#define OS_FLASH_GSML1G_RW_FAC_OFFSET_FROM_NV (OS_FLASH_TDPHY_RW_FAC_OFFSET_FROM_NV + OS_FLASH_TDPHY_RW_FAC_SIZE)
#define OS_FLASH_GSML1G_RW_FAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_GSML1G_RW_FAC_OFFSET_FROM_NV)
#define OS_FLASH_GSML1G_RW_FAC_SIZE 0
/***************************
ps area config
***************************/
#define OS_FLASH_PS_RW_FAC_OFFSET_FROM_NV (OS_FLASH_GSML1G_RW_FAC_OFFSET_FROM_NV + OS_FLASH_GSML1G_RW_FAC_SIZE)
#define OS_FLASH_PS_RW_FAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_PS_RW_FAC_OFFSET_FROM_NV)
#define OS_FLASH_PS_RW_FAC_SIZE 0
/***************************
plat area config
***************************/
#define OS_FLASH_PLAT_RW_FAC_OFFSET_FROM_NV (OS_FLASH_PS_RW_FAC_OFFSET_FROM_NV + OS_FLASH_PS_RW_FAC_SIZE)
#define OS_FLASH_PLAT_RW_FAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_PLAT_RW_FAC_OFFSET_FROM_NV)
#define OS_FLASH_PLAT_RW_FAC_SIZE 0
/***************************
user area config
***************************/
#define OS_FLASH_USER_RW_FAC_OFFSET_FROM_NV (OS_FLASH_PLAT_RW_FAC_OFFSET_FROM_NV + OS_FLASH_PLAT_RW_FAC_SIZE)
#define OS_FLASH_USER_RW_FAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_USER_RW_FAC_OFFSET_FROM_NV)
#define OS_FLASH_USER_RW_FAC_SIZE 0
#endif
/****************************************************************************
None Leave Factory Parmeters Area
****************************************************************************/
/***************************
AMT area config 32KB
***************************/
#define OS_FLASH_AMT_RW_NONFAC_OFFSET_FROM_NV OS_FLASH_RW_OFFSET_FROM_NV
#define OS_FLASH_AMT_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_AMT_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_AMT_RW_NONFAC_SIZE 32768
/***************************
AMT user config 32KB
***************************/
#define OS_FLASH_AMT_RW_USER_OFFSET_FROM_NV (OS_FLASH_AMT_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_AMT_RW_NONFAC_SIZE)
#define OS_FLASH_AMT_RW_USER_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_AMT_RW_USER_OFFSET_FROM_NV)
#define OS_FLASH_AMT_RW_USER_SIZE 32768
/***************************
ATI area config 64KB
***************************/
#define OS_FLASH_ATI_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_AMT_RW_USER_OFFSET_FROM_NV + OS_FLASH_AMT_RW_USER_SIZE)
#define OS_FLASH_ATI_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_ATI_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_ATI_RW_NONFAC_SIZE 65536 /* 64K */
/***************************
LTE physical area config 128KB
***************************/
#define OS_FLASH_LTEPHY_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_ATI_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_ATI_RW_NONFAC_SIZE)
#define OS_FLASH_LTEPHY_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_LTEPHY_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_LTEPHY_RW_NONFAC_SIZE 131072 /* 128K */
/***************************
GSM l1g area config 64KB
***************************/
#define OS_FLASH_GSML1G_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_LTEPHY_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_LTEPHY_RW_NONFAC_SIZE)
#define OS_FLASH_GSML1G_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_GSML1G_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_GSML1G_RW_NONFAC_SIZE 65536
/***************************
TSP area config 32KB
***************************/
#define OS_FLASH_TSP_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_GSML1G_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_GSML1G_RW_NONFAC_SIZE)
#define OS_FLASH_TSP_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_TSP_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_TSP_RW_NONFAC_SIZE 32768
/***************************
TDS physical area config 32KB
***************************/
#define OS_FLASH_TDPHY_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_TSP_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_TSP_RW_NONFAC_SIZE)
#define OS_FLASH_TDPHY_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_TDPHY_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_TDPHY_RW_NONFAC_SIZE 32768
/***************************
at config setting 1KB
***************************/
#define OS_FLASH_ATCFG_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_TDPHY_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_TDPHY_RW_NONFAC_SIZE)
#define OS_FLASH_ATCFG_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_ATCFG_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_ATCFG_RW_NONFAC_SIZE 1024
/***************************
ps area config 64KB
***************************/
#define OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_ATCFG_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_ATCFG_RW_NONFAC_SIZE)
#define OS_FLASH_PS_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_PS_RW_NONFAC_SIZE 65536
/***************************
driver area config 16KB
***************************/
#define OS_FLASH_DRV_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_PS_RW_NONFAC_SIZE)
#define OS_FLASH_DRV_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_DRV_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_DRV_RW_NONFAC_SIZE 16384
/***************************
plat area config 1KB
***************************/
#define OS_FLASH_PLAT_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_DRV_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_DRV_RW_NONFAC_SIZE)
#define OS_FLASH_PLAT_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_PLAT_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_PLAT_RW_NONFAC_SIZE 1024
/***************************
user area config 0KB
***************************/
#define OS_FLASH_USER_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_PLAT_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_PLAT_RW_NONFAC_SIZE)
#define OS_FLASH_USER_RW_NONFAC_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_USER_RW_NONFAC_OFFSET_FROM_NV)
#define OS_FLASH_USER_RW_NONFAC_SIZE 0
/******************************
reserved RWdate area config 302KB
******************************/
#define OS_FLASH_RW_RESERVED_OFFSET_FROM_NV (OS_FLASH_USER_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_USER_RW_NONFAC_SIZE)
#define OS_FLASH_RW_RESERVED_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_RW_RESERVED_OFFSET_FROM_NV)
#define OS_FLASH_RW_RESERVED_SIZE 309248
/***************************
SM MEMORY bakeup RWvate area config
***************************/
#define OS_FLASH_RW_SM_BAKEUP_OFFSET_FROM_NV 3145728 /* 3M */
#define OS_FLASH_RW_SM_BAKEUP_BASE_ADDR (OS_FLASH_ABSOLUTE_WORKAREA_NVRAM_BASE_ADDR + OS_FLASH_RW_SM_BAKEUP_OFFSET_FROM_NV)
#define OS_FLASH_RW_SM_BAKEUP_SIZE 1355776 /* 1M + 300K */
#endif
/****************************************************************************
End
****************************************************************************/
#endif