[Feature][ZXW-130]merge P50U02 version

Only Configure: No
Affected branch: master
Affected module: unknow
Is it affected on both ZXIC and MTK: only ZXIC
Self-test: Yes
Doc Update: No

Change-Id: I4f29ec5bb7c59385f23738d2b7ca84e67c100f69
diff --git a/ap/os/linux/linux-3.4.x/drivers/cpko/cpko_main.c b/ap/os/linux/linux-3.4.x/drivers/cpko/cpko_main.c
index 09782a0..282f151 100755
--- a/ap/os/linux/linux-3.4.x/drivers/cpko/cpko_main.c
+++ b/ap/os/linux/linux-3.4.x/drivers/cpko/cpko_main.c
@@ -82,30 +82,30 @@
 __comm_modem_text_start;unsigned int modem_text_end;unsigned int cpko_data_start
 ;unsigned int cpko_bss_start;unsigned int cpko_text_offset;}cpko_section_layout;
 cpko_section_layout cpko_ps_section;int raise(int signo){return
-(0x1019+2285-0x1906);}extern unsigned int SysEntry(void);static int 
-ko_Main_Thread(void*data){struct sched_param param={.sched_priority=
-MAX_USER_RT_PRIO/(0x1e05+849-0x2154)-(0x163f+244-0x1730)};int ret=
-(0x6a0+1651-0xd13);sched_setscheduler(current,SCHED_FIFO,&param);ret=SysEntry();
-if(ret!=(0x1c59+477-0x1e36))panic("Main_Thread\n");param.sched_priority=
-MAX_USER_RT_PRIO-(0xa62+2452-0x13c8);sched_setscheduler(kthreadd_task,SCHED_FIFO
-,&param);return(0x1874+837-0x1bb9);}int zte_modem_ko_start(void){kthread_run(
-ko_Main_Thread,NULL,"\x5a\x54\x45\x4d\x61\x69\x6e\x54\x68\x72\x65\x61\x64");
-return(0x16ed+2471-0x2094);}static void cpko_sectioninfo_set(void){int ret;
-struct file*fp;mm_segment_t old_fs;loff_t cpko_pos=(0x82b+1876-0xf7f);struct 
-cpps_globalModem globalVar;fp=filp_open(
+(0x2a6+2758-0xd6c);}extern unsigned int SysEntry(void);static int ko_Main_Thread
+(void*data){struct sched_param param={.sched_priority=MAX_USER_RT_PRIO/
+(0x10ed+1829-0x1810)-(0x9ca+3658-0x1811)};int ret=(0x1e12+1106-0x2264);
+sched_setscheduler(current,SCHED_FIFO,&param);ret=SysEntry();if(ret!=
+(0xed8+1332-0x140c))panic("Main_Thread\n");param.sched_priority=MAX_USER_RT_PRIO
+-(0x1fb+5594-0x17a7);sched_setscheduler(kthreadd_task,SCHED_FIFO,&param);return
+(0xec1+4814-0x218f);}int zte_modem_ko_start(void){kthread_run(ko_Main_Thread,
+NULL,"\x5a\x54\x45\x4d\x61\x69\x6e\x54\x68\x72\x65\x61\x64");return
+(0x2c+2793-0xb15);}static void cpko_sectioninfo_set(void){int ret;struct file*fp
+;mm_segment_t old_fs;loff_t cpko_pos=(0xab8+193-0xb79);struct cpps_globalModem 
+globalVar;fp=filp_open(
 "\x2f\x6c\x69\x62\x2f\x63\x70\x6b\x6f\x2f\x63\x70\x6b\x6f\x5f\x73\x65\x63\x69\x6e\x66\x6f\x2e\x62\x69\x6e"
-,(0xe32+3591-0x1c39),(0xe13+5426-0x2345));if(IS_ERR(fp)||fp==NULL)panic(
+,(0xdc+7601-0x1e8d),(0x208d+979-0x2460));if(IS_ERR(fp)||fp==NULL)panic(
 "\x6f\x70\x65\x6e\x20\x66\x69\x6c\x65\x20\x65\x72\x72\x6f\x72" "\n");old_fs=
 get_fs();set_fs(KERNEL_DS);ret=vfs_read(fp,(char*)&cpko_ps_section,sizeof(
-cpko_section_layout),&cpko_pos);if(ret<=(0x16f9+2110-0x1f37))panic(
+cpko_section_layout),&cpko_pos);if(ret<=(0xef6+4148-0x1f2a))panic(
 "\x72\x65\x61\x64\x20\x66\x69\x6c\x65\x20\x65\x72\x72\x6f\x72" "\n");filp_close(
 fp,NULL);
 #ifdef CONFIG_MODEM_CODE_IS_MAPPING
 fp=filp_open(
 "\x2f\x6c\x69\x62\x2f\x63\x70\x6b\x6f\x2f\x63\x70\x6b\x6f\x2e\x6b\x6f",
-(0xa57+3978-0x19e1),(0x1938+3499-0x26e3));if(IS_ERR(fp)||fp==NULL)panic(
+(0x16e4+3828-0x25d8),(0x7c1+3884-0x16ed));if(IS_ERR(fp)||fp==NULL)panic(
 "\x6f\x70\x65\x6e\x20\x66\x69\x6c\x65\x20\x65\x72\x72\x6f\x72" "\n");fp->f_ra.
-ra_pages=(0x90+7657-0x1e79);
+ra_pages=(0xbb1+3281-0x1882);
 #endif
 if(cpko_ps_section.cpko_text_start){globalVar.cpko_text_start=(unsigned long)
 cpko_ps_section.cpko_text_start;globalVar.cpko_rodata_start=(unsigned long)
@@ -125,7 +125,7 @@
 vfree_modem_section(globalVar.cpko_text_start,globalVar.modem_text_end);
 #endif
 }else panic("\x66\x69\x6c\x65\x20\x65\x72\x72\x6f\x72" "\n");}static int 
-cpko_start(void){struct cpps_callbacks callback={(0xfcd+1554-0x15df)};callback.
+cpko_start(void){struct cpps_callbacks callback={(0x447+1916-0xbc3)};callback.
 zOss_ResetNVFactory=zOss_ResetNVFactory;callback.zOss_NvramFlush=zOss_NvramFlush
 ;callback.zOss_NvItemWrite=zOss_NvItemWrite;callback.zOss_NvItemWriteFactory=
 zOss_NvItemWriteFactory;callback.zOss_NvItemRead=zOss_NvItemRead;callback.
@@ -195,5 +195,5 @@
 psm_GetModemSleepFlagStatus=psm_GetModemSleepFlagStatus;
 #endif
 cpps_callbacks_register(&callback);cpko_sectioninfo_set();zte_modem_ko_start();
-return(0x99a+2509-0x1367);}static int cpko_stop(void){return(0xa38+1976-0x11f0);
-}module_init(cpko_start);module_exit(cpko_stop);
+return(0x15d+541-0x37a);}static int cpko_stop(void){return(0xdeb+3702-0x1c61);}
+module_init(cpko_start);module_exit(cpko_stop);
diff --git a/ap/os/linux/linux-3.4.x/drivers/mfd/Kconfig b/ap/os/linux/linux-3.4.x/drivers/mfd/Kconfig
old mode 100644
new mode 100755
index 2b32a47..7305990
--- a/ap/os/linux/linux-3.4.x/drivers/mfd/Kconfig
+++ b/ap/os/linux/linux-3.4.x/drivers/mfd/Kconfig
@@ -216,9 +216,6 @@
 	help
 	  If you say yes here you get support for the ZX234290 series of
 	  PM chips with I2C interface.
-config PMU_GM
-	bool "pmu gm"
-	depends on MFD_ZX234290
 	
 config MENELAUS
 	bool "Texas Instruments TWL92330/Menelaus PM chip"
diff --git a/ap/os/linux/linux-3.4.x/drivers/mfd/zx234290-regulator-wrapper.c b/ap/os/linux/linux-3.4.x/drivers/mfd/zx234290-regulator-wrapper.c
old mode 100644
new mode 100755
index b20a3f1..c5d99db
--- a/ap/os/linux/linux-3.4.x/drivers/mfd/zx234290-regulator-wrapper.c
+++ b/ap/os/linux/linux-3.4.x/drivers/mfd/zx234290-regulator-wrapper.c
@@ -171,16 +171,11 @@
 

 

 #endif

-#ifdef CONFIG_PMU_GM

-extern int zx234296h_support_parameter(void);

-#endif

+

 int zDrvZx234290_LdoInit(void)

 {

     int ret = 0;

-	

-#ifdef CONFIG_PMU_GM

-	zx234296h_support_parameter();

-#endif

+

 	//zDrvZx234290_Config();

 	ret = zDrvZx234290_LdoRstErr();

     

diff --git a/ap/os/linux/linux-3.4.x/drivers/mfd/zx234290-regulator.c b/ap/os/linux/linux-3.4.x/drivers/mfd/zx234290-regulator.c
old mode 100644
new mode 100755
index 28b57f0..ab92928
--- a/ap/os/linux/linux-3.4.x/drivers/mfd/zx234290-regulator.c
+++ b/ap/os/linux/linux-3.4.x/drivers/mfd/zx234290-regulator.c
@@ -1986,35 +1986,7 @@
 
     return 0;
 }
-#ifdef CONFIG_PMU_GM
-int zx234296h_support_parameter(void)
-{
-    int ret = 0;
-    unsigned char reg_addr=0, reg_val=0, mask=0;
 
-#if 1//set gm debug bulk1&4
-	reg_addr = 0x70;
-	reg_val = 0xA1;
-	ret = zx234290_i2c_write_simple(reg_addr,&reg_val);	
-	if (ret != 0)
-	{
-		return -EIO;
-	}
-	
-	reg_addr = 0x8E;
-	reg_val = 0xD4;
-	ret = zx234290_i2c_write_simple(reg_addr,&reg_val);	
-	if (ret != 0)
-	{
-		return -EIO;
-	}
-	printk("gm set reg[0x8E]=0xd4,reg[0x70]=0xA1 ok!\n");
-	
-#endif
-
-    return 0;
-}
-#endif
 /*******************************************************************************
 * Function:
 * Description: Long Long Pressed Enable : 0 is disable, 1 is enable long long pressed interrupt.(default is 0)
diff --git a/ap/os/linux/linux-3.4.x/drivers/misc/zcat/logcat_drv.h b/ap/os/linux/linux-3.4.x/drivers/misc/zcat/logcat_drv.h
index 8288a32..0f5f320 100755
--- a/ap/os/linux/linux-3.4.x/drivers/misc/zcat/logcat_drv.h
+++ b/ap/os/linux/linux-3.4.x/drivers/misc/zcat/logcat_drv.h
@@ -100,8 +100,9 @@
     ZCAT_IPC_START,

     ZCAT_IPC_EXIT,

 #ifdef _USE_VEHICLE_DC

-	ZCAT_IPC_ALLOC_CAP_SMLOGBUF,

+    ZCAT_IPC_ALLOC_CAP_SMLOGBUF,

 #endif

+    ZCAT_IPC_READ_IRAM_ZCAT_MODE,

 } E_ZCAT_IPC_HANDSHAKE;

 

 /* zcatÈ«¾ÖÐÅÏ¢ */

diff --git a/ap/os/linux/linux-3.4.x/drivers/misc/zcat/logcat_drv_cp.c b/ap/os/linux/linux-3.4.x/drivers/misc/zcat/logcat_drv_cp.c
index eefaa76..2a58151 100755
--- a/ap/os/linux/linux-3.4.x/drivers/misc/zcat/logcat_drv_cp.c
+++ b/ap/os/linux/linux-3.4.x/drivers/misc/zcat/logcat_drv_cp.c
@@ -58,7 +58,7 @@
 /**
  * ºê¶¨Òå
  */
-#define ZCAT_MODE_ADDR            (int *)IRAM_BASE_ADDR_ZCAT_MODE 
+#define RAMDUMP_MODE_ADDR         (int *)IRAM_BASE_ADDR_RAMDUMP_MODE 
 
 #ifdef _USE_VEHICLE_DC
 #define RINGBUF_CAP_TO_AP_OFFSET  (ICP_CAP_BUF_LEN + TOOL_CAP_BUF_LEN)
@@ -115,8 +115,8 @@
 #ifdef _USE_VEHICLE_DC
 static struct ctl_table cfg_logcom_array[] = {
     {
-        .procname   = "log_save_mode",
-        .data       = ZCAT_MODE_ADDR,
+        .procname   = "ramdump_save_mode",
+        .data       = RAMDUMP_MODE_ADDR,
         .maxlen     = sizeof(int),
         .mode       = 0644,
         .proc_handler  = proc_dointvec_minmax,
@@ -261,6 +261,12 @@
                 return -1;
             break;
         }
+        case ZCAT_IPC_READ_IRAM_ZCAT_MODE:
+        {
+            if(copy_to_user((void __user *)arg, (UINT32 *)(IRAM_BASE_ADDR_ZCAT_MODE), sizeof(UINT32)))
+                return -1;
+            break;
+        }
         case ZCAT_IPC_SYN:
         {
             gZcatConfig.status = 1;
diff --git a/ap/os/linux/linux-3.4.x/drivers/mtd/cmdlinepart.c b/ap/os/linux/linux-3.4.x/drivers/mtd/cmdlinepart.c
old mode 100644
new mode 100755
index 3e65e07..f95d187
--- a/ap/os/linux/linux-3.4.x/drivers/mtd/cmdlinepart.c
+++ b/ap/os/linux/linux-3.4.x/drivers/mtd/cmdlinepart.c
@@ -73,6 +73,7 @@
 /* the command line passed to mtdpart_setupd() */
 static char *cmdline;
 static int cmdline_parsed = 0;
+char *nor_cmdline;
 
 /*
  * Parse one partition definition for an MTD. Since there can be many
@@ -375,6 +376,15 @@
 
 __setup("mtdparts=", mtdpart_setup);
 
+static int nor_cmdline_setup(char *s)
+{
+	nor_cmdline = s;
+	return 1;
+}
+
+__setup("EnhancedSecurity=", nor_cmdline_setup);
+
+
 static struct mtd_part_parser cmdline_parser = {
 	.owner = THIS_MODULE,
 	.parse_fn = parse_cmdline_partitions,
diff --git a/ap/os/linux/linux-3.4.x/drivers/mtd/nand/nand_ids.c b/ap/os/linux/linux-3.4.x/drivers/mtd/nand/nand_ids.c
index ca6012e..e15a472 100755
--- a/ap/os/linux/linux-3.4.x/drivers/mtd/nand/nand_ids.c
+++ b/ap/os/linux/linux-3.4.x/drivers/mtd/nand/nand_ids.c
@@ -89,6 +89,7 @@
 	{"SPI-NAND 512MiB 1,8V",	0x35, 4096, 512, 0x40000, 0},	
 	{"SPI-NAND 512MiB 1,8V",	0x45, 2048, 512, 0x20000, 0},	//GD5F4GQ6REY2G
 	{"SPI-NAND 512MiB 1,8V",	0x53, 4096, 512, 0x40000, 0},	//XT26Q04D-B
+	{"SPI-NAND 128MiB 1,8V",	0x15, 2048, 128, 0x20000, 0},	//UM19A0LISW
 	/*
 	 * These are the new chips with large page size. The pagesize and the
 	 * erasesize is determined from the extended id bytes
@@ -225,6 +226,7 @@
 	{NAND_MFR_EMST, "emst"},
 	{NAND_MFR_FORESEE, "foresee"},
 	{NAND_MFR_XTX, "xtx"},
+	{NAND_MFR_UNIM, "unim"},
 	{0x0, "Unknown"}
 };
 
diff --git a/ap/os/linux/linux-3.4.x/drivers/mtd/nand/spi_nand_devices.c b/ap/os/linux/linux-3.4.x/drivers/mtd/nand/spi_nand_devices.c
index a2eb6b1..6f4db46 100755
--- a/ap/os/linux/linux-3.4.x/drivers/mtd/nand/spi_nand_devices.c
+++ b/ap/os/linux/linux-3.4.x/drivers/mtd/nand/spi_nand_devices.c
@@ -283,6 +283,21 @@
 	}
 }
 
+static void get_unim_nand_para(uint8_t device_id)
+{
+
+	switch (device_id) {
+	case 0x15:
+		main_size = 2048;
+		spare_size = 64;
+		break;
+	default:
+		printk("Spectra: Unknown unim NAND (Device ID: 0x%x)."
+				"Will use default parameter values instead.\n",
+				device_id);
+	}
+}
+
 
 void spi_nand_get_param(uint32_t maf_id, uint32_t dev_id)
 {
@@ -329,6 +344,9 @@
 	else if (maf_id == NAND_MFR_XTX) {
 		get_xtx_nand_para(dev_id);
 	}
+	else if (maf_id == NAND_MFR_UNIM) {
+		get_unim_nand_para(dev_id);
+	}
 	else{
 		printk("Spectra: Unknown manufacturer (ID: 0x%x).", maf_id);
 	}
@@ -413,7 +431,11 @@
     .eccbytes = 192,
     .oobfree = {{2,62}}
 };
- 
+
+static struct nand_ecclayout nand_unim_oob_64= {
+   .oobfree = {{2,62}}
+};
+
 static void	spi_nand_winbond_init(struct spi_nand_info *spi_nand)
 {
 	uint8_t dev_id = spi_nand->dev_id;	
@@ -501,6 +523,7 @@
 			||(g_maf_id == NAND_MFR_GIGADEVICE)
 			||(g_maf_id == NAND_MFR_WINBOND)
 			|| (g_maf_id == NAND_MFR_XTX)
+			|| (g_maf_id == NAND_MFR_UNIM)
 			||(g_maf_id == NAND_MFR_MICRON))
 			return PLX4_MODE;
 		else
@@ -519,6 +542,7 @@
 			||(g_maf_id == NAND_MFR_GIGADEVICE)
 			||(g_maf_id == NAND_MFR_WINBOND)
 			|| (g_maf_id == NAND_MFR_XTX)
+			|| (g_maf_id == NAND_MFR_UNIM)
 			||(g_maf_id == NAND_MFR_MICRON))
 			return RDX4_MODE;
 		else
@@ -653,6 +677,12 @@
 			chip->ecc.layout =&nand_xtx_oob_256;
 		}
 		break;
+	case NAND_MFR_UNIM:
+		if(mtd->oobsize==64 && mtd->writesize==2048)
+		{
+			chip->ecc.layout =&nand_unim_oob_64;
+		}
+		break;
 	default:
 		break;
 	}
diff --git a/ap/os/linux/linux-3.4.x/drivers/mtd/nand/zxic_spifc.c b/ap/os/linux/linux-3.4.x/drivers/mtd/nand/zxic_spifc.c
index 98a0ccc..16c0efe 100755
--- a/ap/os/linux/linux-3.4.x/drivers/mtd/nand/zxic_spifc.c
+++ b/ap/os/linux/linux-3.4.x/drivers/mtd/nand/zxic_spifc.c
@@ -44,15 +44,17 @@
 #include "zxic_spifc.h"
 #include "spi_nand.h"
 
+
 #define zDrv_ASSERT(_EXP)  printk("spifc error\n")
 
+
 struct spifc_info g_spifc;
 extern unsigned char  g_maf_id;
-
+extern char *nor_cmdline;
 static int spifc_get_feature( uint32_t reg_addr, uint8_t *value);
 static uint32_t spi_fc_wait_cmd_end(void);
 int winbond_dev_id2 = 0;
-
+unsigned char g_nor_flag = 0;
 /* SPI NAND FLASH COMMAND FORMAT TYPE */
 /********************************************************************************
   [Instruction]                 |--write enable
@@ -550,6 +552,9 @@
 	
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+        
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_config_ctrl(FC_DMA_NONE);       
@@ -561,6 +566,10 @@
         {
             continue;   /* ¡ä?¨º?¨º¡ì¡ã¨¹¡ê??¨¢¨º?¡À?¡ä??-?¡¤2¡é??¡ä? */
         }
+
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+			
         break;        
     } while( --retries != 0 );
 
@@ -595,7 +604,10 @@
     };
 	while(1)
 	{
-	    do
+	    if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+
+		do
 	    {
 	        spi_fc_clear_fifo();
 	        spi_fc_clear_int();
@@ -612,6 +624,11 @@
 	    }
 	    while ( --retries != 0 );
 
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+
+		udelay(5);
+		
 		/* µÈ´ýÉÏ´ÎÃüÁîÖ´ÐÐÍê³É */
 		do
 		{
@@ -655,6 +672,9 @@
     };
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+         
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_config_ctrl(FC_DMA_NONE);
@@ -666,6 +686,9 @@
             continue;   /* ´«Êäʧ°Ü£¬½áÊø±¾´ÎÑ­»·²¢ÖØ´« */
         }
 
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+		
         break;
     }
     while ( --retries != 0 );
@@ -701,8 +724,11 @@
                0                       /* ¿ÕÏеȴýÖÜÆÚ x1 */
     };
     do
-    {
-        spi_fc_setup_cmd(&cmd, 0, 0); /* ÃüÁîÅäÖà */
+    { 
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+        
+		spi_fc_setup_cmd(&cmd, 0, 0); /* ÃüÁîÅäÖà */
 		spi_fc_clear_int();
         spi_fc_start();                     /* ¿ªÊ¼´«Êä */
         ret = spi_fc_wait_cmd_end();        /* µÈ´ýÃüÁî½áÊø */
@@ -710,6 +736,11 @@
         {
             continue;    /* ´«Êäʧ°Ü£¬½áÊø±¾´ÎÑ­»·²¢ÖØ´« */
         }
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+		
+		udelay(5);
+		
 		do
 		{
 			spifc_get_feature(REG_STATUS, &status); 
@@ -755,6 +786,9 @@
     };
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp		
+		
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_config_ctrl(FC_DMA_NONE);
@@ -772,6 +806,9 @@
             continue;   /* ´«Êäʧ°Ü£¬½áÊø±¾´ÎÑ­»·²¢ÖØ´« */
         }
 
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+
         break;
     }
     while ( --retries != 0 );
@@ -812,6 +849,9 @@
     };
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+        
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_config_ctrl(FC_DMA_NONE);
@@ -823,6 +863,10 @@
         {
             continue;   /* ´«Êäʧ°Ü£¬½áÊø±¾´ÎÑ­»·²¢ÖØ´« */
         }
+
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+		
         break;
     }
     while ( --retries != 0 );
@@ -864,6 +908,9 @@
 
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+    	
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_config_ctrl(FC_DMA_NONE);        
@@ -884,6 +931,9 @@
             continue;   /* ´«Êäʧ°Ü£¬½áÊø±¾´ÎÑ­»·²¢ÖØ´« */
         }
 
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+		
         break;
     }
     while ( --retries != 0 );
@@ -927,6 +977,9 @@
     };
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+    	
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_config_ctrl(FC_DMA_NONE);
@@ -938,6 +991,10 @@
             continue;   /* ´«Êäʧ°Ü£¬½áÊø±¾´ÎÑ­»·²¢ÖØ´« */
         }
 
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+        udelay(5);
+		
         /* µÈ´ýÃüÁîÖ´ÐÐÍê³É */
         do
         {	
@@ -996,6 +1053,9 @@
     };
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+    	
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_config_ctrl(FC_DMA_NONE);
@@ -1007,6 +1067,10 @@
             continue;   /* ´«Êäʧ°Ü£¬½áÊø±¾´ÎÑ­»·²¢ÖØ´« */
         }
 
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+		udelay(5);
+		
         /* µÈ´ýÃüÁîÖ´ÐÐÍê³É */
         do
         {
@@ -1155,6 +1219,9 @@
 
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+    	
         spi_fc_clear_fifo();
         spi_fc_clear_int();
 		spi_fc_setup_cmd(&cmd, column_addr, len);		/* ÃüÁîÅäÖà */
@@ -1185,7 +1252,9 @@
 		spifc_wait_dma_done(FC_DMA_RX);
 		spi_fc_config_ctrl(FC_DMA_NONE); 
 #endif
-
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+		
         break;
     }
     while ( --retries != 0 );
@@ -1240,6 +1309,9 @@
 
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+    	
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_setup_cmd(&cmd, column_addr, page_len+oob_len);       /* ÃüÁîÅäÖà */
@@ -1265,7 +1337,10 @@
 #if TRANS_USE_DMA
 		spifc_wait_dma_done(FC_DMA_TX);
 		spi_fc_config_ctrl(FC_DMA_NONE); 
-#endif		
+#endif	
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+		
         break;
     }
     while ( --retries != 0 );
@@ -1308,6 +1383,9 @@
     };
     do
     {
+        if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_LOW);//spp
+    	
         spi_fc_clear_fifo();
         spi_fc_clear_int();
         spi_fc_config_ctrl(FC_DMA_NONE);
@@ -1319,6 +1397,10 @@
             continue;   /* ´«Êäʧ°Ü£¬½áÊø±¾´ÎÑ­»·²¢ÖØ´« */
         }
 
+		if(g_nor_flag == 1)
+			gpio_set_value(86,GPIO_HIGH);//spp
+		udelay(5);
+		
         /* µÈ´ýÃüÁîÖ´ÐÐÍê³É */
         do
         {
@@ -1497,6 +1579,7 @@
 	zx29_gpio_config(95, 0x1);
 
 /*configure gpio5 to sfc_cs*/
+
 	ret = gpio_request(93, "sfc_cs");
 	if (ret)
 	{	
@@ -1504,8 +1587,21 @@
 		zDrv_ASSERT(0);
 		return;
 	}
-	zx29_gpio_config(93, 0x1);
-
+	if(g_nor_flag == 1){
+        zx29_gpio_config(93, GPIO93_GPIO93);
+		gpio_direction_output(93,1);
+		
+		ret = gpio_request(ZX29_GPIO_86, "gpio");
+		if (ret)
+		{	
+			printk("gpio86 fail\n");
+			zDrv_ASSERT(0);
+			return;
+		}
+		zx29_gpio_config(ZX29_GPIO_86, GPIO86_GPIO86);
+		gpio_direction_output(ZX29_GPIO_86,1);
+	}
+	
 /*configure gpio3 to sfc_sclk*/
 	ret = gpio_request(94, "sfc_sclk");
 	if (ret)
@@ -1763,12 +1859,22 @@
 	int ret = 0;
     struct spi_nand_info *spifc;
 
-	pr_info("spi_nand_probe------------\n");
+	/*ÅжÏÊÇ·ñΪÔöÇ¿ÐͰ²È«Æô¶¯*/
+	if(nor_cmdline != NULL)
+	{
+		if (!strcmp(nor_cmdline, "1"))
+		{
+		    g_nor_flag = 1;
+			//printk("----------EnhancedSecurity---------\n");
+		}
+	}
+
+	pr_info("----------spi_nand_probe-----------\n");
 
 	spifc = kzalloc(sizeof(*spifc), GFP_KERNEL);
 	if (!spifc)
 		return -ENOMEM;
-
+	
 	soft_spin_lock(NAND_SFLOCK);
 
 	ret = spifc_init_resource(pdev, spifc);
@@ -1800,12 +1906,12 @@
 		soft_spin_unlock(NAND_SFLOCK);
 		return ret;	
 	}
-
-	read_only_partitons_table_init();
 	
+	read_only_partitons_table_init();
     soft_spin_unlock(NAND_SFLOCK);
 
 	platform_set_drvdata(pdev, spifc);
+    printk("----------spi_nand_probe end!-----------\n");	
 
 	return 0;
 failed_alloc_memery:
diff --git a/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_main.c b/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_main.c
index 09586d0..a4d924a 100755
--- a/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_main.c
+++ b/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_main.c
@@ -7210,7 +7210,7 @@
     0x00ffcd80,
     0x00ffce70,
     0x00ffce80,
-    0x00ffcf7d,
+    0x00ffce93,
     0x00ffcf90,
     0x00ffc080,
     0x00ffc090,
@@ -7242,7 +7242,7 @@
     0x00ffcd80,
     0x00ffce70,
     0x00ffce80,
-    0x00ffcf7d,
+    0x00ffce93,
     0x00ffcf90,
     0x00ffc080,
     0x00ffc090,
@@ -7301,38 +7301,108 @@
 
 u32 wifi_txgain_table_24g_1_8800dcdw[32] =
 {
-    0x090E2011, //index 0
+    0x096E2011, //index 0
     0x00004001,
-    0x090E2015, //index 1
+    0x096E2015, //index 1
     0x00004001,
-    0x090E201B, //index 2
+    0x096E201B, //index 2
     0x00004001,
-    0x110E2018, //index 3
+    0x116E2018, //index 3
     0x00004001,
-    0x110E201E, //index 4
+    0x116E201E, //index 4
     0x00004001,
-    0x110E2023, //index 5
+    0x116E2023, //index 5
     0x00004001,
-    0x190E2021, //index 6
+    0x196E2021, //index 6
     0x00004001,
-    0x190E202B, //index 7
+    0x196E202B, //index 7
     0x00004001,
-    0x210E202B, //index 8
+    0x216E202B, //index 8
     0x00004001,
-    0x230E2027, //index 9
+    0x236E2027, //index 9
     0x00004001,
-    0x230E2031, //index 10
+    0x236E2031, //index 10
     0x00004001,
-    0x240E2039, //index 11
+    0x246E2039, //index 11
     0x00004001,
-    0x260E2039, //index 12
+    0x26922039, //index 12
     0x00004001,
-    0x2E0E203F, //index 13
+    0x2E92203F, //index 13
     0x00004001,
-    0x368E203F, //index 14
+    0x3692203F, //index 14
     0x00004001,
-    0x3EF2203F, //index 15
-    0x00004001
+    0x3FF2203F, //index 15
+    0x00004001,
+};
+u32 wifi_txgain_table_24g_8800dcdw_h[32] =
+{
+    0xA55629C9, //index 0
+    0x00005825,
+    0xAE5629C9, //index 1
+    0x00005825,
+    0xAD5629CD, //index 2
+    0x00005825,
+    0xAD5629D1, //index 3
+    0x00005825,
+    0xAD5629D7, //index 4
+    0x00005825,
+    0xAD5629DE, //index 5
+    0x00005825,
+    0xAD5629E6, //index 6
+    0x00005825,
+    0xBD5629E6, //index 7
+    0x00005825,
+    0xBD5629F0, //index 8
+    0x00005825,
+    0xCD5629F0, //index 9
+    0x00005825,
+    0xE55629F0, //index 10
+    0x00005825,
+    0xE55629FF, //index 11
+    0x00005825,
+    0xE55629FF, //index 12
+    0x00002825,
+    0xE75629FF, //index 13
+    0x00002825,
+    0xFF5629FF, //index 14
+    0x00001825,
+    0xFF5628FF, //index 15
+    0x00001025,
+};
+u32 wifi_txgain_table_24g_1_8800dcdw_h[32] =
+{
+    0x941A2048, //index 0
+    0x00001825,
+    0x961A2048, //index 1
+    0x00001825,
+    0x9D1A2048, //index 2
+    0x00001825,
+    0x9A1A204F, //index 3
+    0x00001825,
+    0x961A204F, //index 4
+    0x00001825,
+    0x9A1A2057, //index 5
+    0x00001825,
+    0x9C1A2057, //index 6
+    0x00001825,
+    0xA31A205B, //index 7
+    0x00001825,
+    0xAB1A205B, //index 8
+    0x00001825,
+    0xAD1A205B, //index 9
+    0x00001825,
+    0xA71A2064, //index 10
+    0x00001825,
+    0xAD1A2070, //index 11
+    0x00001825,
+    0xAD72207F, //index 12
+    0x00001825,
+    0xBCAE207F, //index 13
+    0x00001825,
+    0xBFB2207F, //index 14
+    0x00001825,
+    0xD73A207F, //index 15
+    0x00001825,
 };
 u32 wifi_rxgain_table_24g_20m_8800dcdw[64] = {
     0x82f282d1,
@@ -7396,7 +7466,7 @@
     0x80808419,
     0x000000f0,
     0x0ef29ae6,
-    0x959f592c,//////0x959f5924,           //loft [35:34]=3
+    0x959f5924,           //loft [35:34]=3
     0x80808419,
     0x000000f0
 };
@@ -7519,6 +7589,30 @@
     {0x00110bf0, 0x00181001},
 };
 
+int aicwf_misc_ram_init_8800dc(struct rwnx_hw *rwnx_hw)
+{
+    int ret = 0;
+    const uint32_t cfg_base = 0x10164;
+    struct dbg_mem_read_cfm cfm;
+    uint32_t misc_ram_addr;
+    uint32_t misc_ram_size = 12;
+    int i;
+    ret = rwnx_send_dbg_mem_read_req(rwnx_hw, cfg_base + 0x14, &cfm);
+    if (ret) {
+        printk("rf misc ram[0x%x] rd fail: %d\n", cfg_base + 0x14, ret);
+        return ret;
+    }
+    misc_ram_addr = cfm.memdata;
+    printk("misc_ram_addr=%x\n", misc_ram_addr);
+    for (i = 0; i < (misc_ram_size / 4); i++) {
+        ret = rwnx_send_dbg_mem_write_req(rwnx_hw, misc_ram_addr + i * 4, 0);
+        if (ret) {
+            printk("rf misc ram[0x%x] wr fail: %d\n",  misc_ram_addr + i * 4, ret);
+            return ret;
+        }
+    }
+    return ret;
+}
 static void patch_config(struct rwnx_hw *rwnx_hw)
 {
     #ifdef CONFIG_ROM_PATCH_EN
@@ -7693,14 +7787,15 @@
     {0x4010001C, 0x00000000},
 };
 
-u32 syscfg_tbl_masked[][3] = {
-    #ifdef CONFIG_PMIC_SETTING
+u32 syscfg_tbl_masked_8800dc[][3] = {
+    //#ifdef CONFIG_PMIC_SETTING
     #if defined(CONFIG_VRF_DCDC_MODE)
     {0x7000216C, (0x3 << 2), (0x1 << 2)}, // vrf select dcdc mode
     {0x700021BC, (0x3 << 2), (0x1 << 2)},
     {0x70002118, ((0x7 << 4) | (0x1 << 7)), ((0x2 << 4) | (0x1 << 7))},
     {0x70002104, ((0x3F << 0) | (0x1 << 6)), ((0x2 << 0) | (0x1 << 6))},
     {0x7000210C, ((0x3F << 0) | (0x1 << 6)), ((0x2 << 0) | (0x1 << 6))},
+    {0x70002170, (0xF << 0), (0x1 << 0)},
     {0x70002190, (0x3F << 0), (24 << 0)},
     {0x700021CC, ((0x7 << 4) | (0x1 << 7)), ((0x0 << 4) | (0x0 << 7))},
     {0x700010A0, (0x1 << 11), (0x1 << 11)},
@@ -7708,11 +7803,53 @@
     {0x70001038, (0x1 << 8), (0x1 << 8)},
     {0x70001094, (0x3 << 2), (0x0 << 2)},
     {0x700021D0, ((0x1 << 5) | (0x1 << 6)), ((0x1 << 5) | (0x1 << 6))},
-    {0x70001000, ((0x1 << 0) | (0x1 << 8) | (0x1 << 15) | (0x1 << 20) | (0x1 << 22)),
-                 ((0x1 << 0) | (0x1 << 8) | (0x1 << 15) | (0x1 << 20) | (0x0 << 22))},
+    {0x70001000, ((0x1 << 0) | (0x1 << 20) | (0x1 << 22)),
+                 ((0x1 << 0) | (0x1 << 20) | (0x0 << 22))},
+    {0x70001028, (0xf << 2), (0x1 << 2)},
+    #else
+    {0x7000216C, (0x3 << 2), (0x1 << 2)}, // pmic_pmu_init
+    {0x700021BC, (0x3 << 2), (0x1 << 2)},
+    {0x70002118, ((0x7 << 4) | (0x1 << 7)), ((0x2 << 4) | (0x1 << 7))},
+    {0x70002104, ((0x3F << 0) | (0x1 << 6)), ((0x2 << 0) | (0x1 << 6))},
+    {0x7000210C, ((0x3F << 0) | (0x1 << 6)), ((0x2 << 0) | (0x1 << 6))},
+    {0x70002170, (0xF << 0), (0x1 << 0)},
+    {0x70002190, (0x3F << 0), (24 << 0)},
+    {0x700021CC, ((0x7 << 4) | (0x1 << 7)), ((0x0 << 4) | (0x0 << 7))},
+    {0x700010A0, (0x1 << 11), (0x1 << 11)},
+    {0x70001034, ((0x1 << 20) | (0x7 << 26)), ((0x0 << 20) | (0x2 << 26))},
+    {0x70001038, (0x1 << 8), (0x1 << 8)},
+    {0x70001094, (0x3 << 2), (0x0 << 2)},
+    {0x700021D0, ((0x1 << 5) | (0x1 << 6)), ((0x1 << 5) | (0x1 << 6))},
+    {0x70001000, ((0x1 << 0) | (0x1 << 20) | (0x1 << 22)),
+                 ((0x0 << 0) | (0x1 << 20) | (0x0 << 22))},
     {0x70001028, (0xf << 2), (0x1 << 2)},
     #endif
+    {0x00000000, 0x00000000, 0x00000000}, // last one
+};
+u32 syscfg_tbl_masked_8800dc_h[][3] = {
+    {0x7000216C, ((0x3 << 2) | (0x3 << 4)), ((0x2 << 2) | (0x2 << 4))}, // pmic_pmu_init
+    {0x70002138, (0xFF << 0), (0xFF << 0)},
+    {0x7000213C, (0xFF << 0), (0xFF << 0)},
+    {0x70002144, (0xFF << 0), (0xFF << 0)},
+    {0x700021BC, (0x3 << 2), (0x1 << 2)},
+    {0x70002118, ((0x7 << 4) | (0x1 << 7)), ((0x2 << 4) | (0x1 << 7))},
+    {0x70002104, ((0x3F << 0) | (0x1 << 6)), ((0x2 << 0) | (0x1 << 6))},
+    {0x7000210C, ((0x3F << 0) | (0x1 << 6)), ((0x2 << 0) | (0x1 << 6))},
+    {0x70002170, (0xF << 0), (0x1 << 0)},
+    {0x70002190, (0x3F << 0), (24 << 0)},
+    {0x700021CC, ((0x7 << 4) | (0x1 << 7)), ((0x0 << 4) | (0x0 << 7))},
+    {0x700010A0, (0x1 << 11), (0x1 << 11)},
+    {0x70001038, (0x1 << 8), (0x1 << 8)},
+    {0x70001094, (0x3 << 2), (0x0 << 2)},
+    {0x700021D0, ((0x1 << 5) | (0x1 << 6)), ((0x1 << 5) | (0x1 << 6))},
+    #if defined(CONFIG_VRF_DCDC_MODE)
+    {0x70001000, ((0x1 << 0) | (0x1 << 20) | (0x1 << 22)),
+                 ((0x1 << 0) | (0x1 << 20) | (0x0 << 22))},
+    #else
+    {0x70001000, ((0x1 << 0) | (0x1 << 20) | (0x1 << 22)),
+                 ((0x0 << 0) | (0x1 << 20) | (0x0 << 22))},
     #endif /* CONFIG_PMIC_SETTING */
+    {0x70001028, (0xf << 2), (0x1 << 2)},
     {0x00000000, 0x00000000, 0x00000000}, // last one
 };
 
@@ -7723,6 +7860,7 @@
 static void system_config(struct rwnx_hw *rwnx_hw)
 {
     int syscfg_num;
+    array3_tbl_t p_syscfg_msk_tbl;
     int ret, cnt;
     const u32 mem_addr = 0x40500000;
     struct dbg_mem_read_cfm rd_mem_addr_cfm;
@@ -7745,6 +7883,8 @@
     chip_sub_id = (u8)(rd_mem_addr_cfm.memdata);
     //printk("%x=%x\n", rd_mem_addr_cfm.memaddr, rd_mem_addr_cfm.memdata);
     printk("chip_id=%x, chip_sub_id=%x\n", chip_id, chip_sub_id);
+    if (IS_CHIP_ID_H())
+	printk("IS_CHIP_ID_H\n");
 
     ret = rwnx_send_dbg_mem_read_req(rwnx_hw, 0x40500010, &rd_mem_addr_cfm);
 	printk("[0x40500010]=%x\n", rd_mem_addr_cfm.memdata);
@@ -7791,15 +7931,26 @@
         }
     }
 
-    syscfg_num = sizeof(syscfg_tbl_masked) / sizeof(u32) / 3;
+    if (IS_CHIP_ID_H()) {
+        syscfg_num = sizeof(syscfg_tbl_masked_8800dc_h) / sizeof(u32) / 3;
+        p_syscfg_msk_tbl = syscfg_tbl_masked_8800dc_h;
+    } else {
+        syscfg_num = sizeof(syscfg_tbl_masked_8800dc) / sizeof(u32) / 3;
+        p_syscfg_msk_tbl = syscfg_tbl_masked_8800dc;
+    }
     for (cnt = 0; cnt < syscfg_num; cnt++) {
-        if (syscfg_tbl_masked[cnt][0] == 0x00000000) {
+        if (p_syscfg_msk_tbl[cnt][0] == 0x00000000) {
             break;
+        } else if (p_syscfg_msk_tbl[cnt][0] == 0x70001000) {
+            if (chip_mcu_id == 0) {
+                p_syscfg_msk_tbl[cnt][1] |= ((0x1 << 8) | (0x1 << 15)); // mask
+                p_syscfg_msk_tbl[cnt][2] |= ((0x1 << 8) | (0x1 << 15));
+            }
         }
         ret = rwnx_send_dbg_mem_mask_write_req(rwnx_hw,
-            syscfg_tbl_masked[cnt][0], syscfg_tbl_masked[cnt][1], syscfg_tbl_masked[cnt][2]);
+            p_syscfg_msk_tbl[cnt][0], p_syscfg_msk_tbl[cnt][1], p_syscfg_msk_tbl[cnt][2]);
         if (ret) {
-            printk("%x mask write fail: %d\n", syscfg_tbl_masked[cnt][0], ret);
+            printk("%x mask write fail: %d\n", p_syscfg_msk_tbl[cnt][0], ret);
             return;
         }
     }
@@ -7975,6 +8126,9 @@
 
     if ((ret = rwnx_platform_on(rwnx_hw, NULL)))
         goto err_platon;
+#if 0//!defined(CONFIG_DPD)
+	aicwf_misc_ram_init_8800dc(rwnx_hw);
+#endif
 
     patch_config(rwnx_hw);
 
@@ -8083,20 +8237,27 @@
 
 
     if (testmode == 0) {
+		if (IS_CHIP_ID_H()) {
+			if ((ret = rwnx_send_rf_config_req(rwnx_hw, 0,    1, (u8_l *)wifi_txgain_table_24g_8800dcdw_h, 128)))
+				goto err_lmac_reqs;
+			if ((ret = rwnx_send_rf_config_req(rwnx_hw, 16,    1, (u8_l *)wifi_txgain_table_24g_1_8800dcdw_h, 128)))
+				goto err_lmac_reqs;
+		} else {
 		if ((ret = rwnx_send_rf_config_req(rwnx_hw, 0,	1, (u8_l *)wifi_txgain_table_24g_8800dcdw, 128)))
             goto err_lmac_reqs;
 
         if ((ret = rwnx_send_rf_config_req(rwnx_hw, 16,	1, (u8_l *)wifi_txgain_table_24g_1_8800dcdw, 128)))
 			goto err_lmac_reqs;
+		}
 		if ((ret = rwnx_send_rf_config_req(rwnx_hw, 0,	0, (u8_l *)wifi_rxgain_table_24g_20m_8800dcdw, 256)))
             goto err_lmac_reqs;
 
 		if ((ret = rwnx_send_rf_config_req(rwnx_hw, 32,  0, (u8_l *)wifi_rxgain_table_24g_40m_8800dcdw, 256)))
             goto err_lmac_reqs;
 
+	}
         if ((ret = rwnx_send_rf_calib_req(rwnx_hw, &cfm))) {
             goto err_lmac_reqs;
-        }
     }
 
     if ((ret = rwnx_send_get_macaddr_req(rwnx_hw, (struct mm_get_mac_addr_cfm *)mac_addr_efuse)))
diff --git a/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_main.h b/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_main.h
old mode 100644
new mode 100755
index 5e82956..7a8f166
--- a/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_main.h
+++ b/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_main.h
@@ -28,6 +28,9 @@
 #endif /* CONFIG_COMPAT */
 
 extern int testmode;
+typedef u32 (*array3_tbl_t)[3];
+#define CHIP_ID_H_MASK  0xC0
+#define IS_CHIP_ID_H()  ((chip_id & CHIP_ID_H_MASK) == CHIP_ID_H_MASK)
 
 int rwnx_cfg80211_init(struct rwnx_plat *rwnx_plat, void **platform_data);
 void rwnx_cfg80211_deinit(struct rwnx_hw *rwnx_hw);
diff --git a/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_mod_params.c b/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_mod_params.c
old mode 100644
new mode 100755
index 6e94d8d..1bd369b
--- a/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_mod_params.c
+++ b/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_mod_params.c
@@ -33,7 +33,7 @@
 	COMMON_PARAM(vht_on, true, true)
 	COMMON_PARAM(he_on, true, true)
 	COMMON_PARAM(mcs_map, IEEE80211_VHT_MCS_SUPPORT_0_9, IEEE80211_VHT_MCS_SUPPORT_0_9)
-	COMMON_PARAM(he_mcs_map, IEEE80211_HE_MCS_SUPPORT_0_9, IEEE80211_HE_MCS_SUPPORT_0_9)
+	COMMON_PARAM(he_mcs_map, IEEE80211_HE_MCS_SUPPORT_0_11, IEEE80211_HE_MCS_SUPPORT_0_11)
 	COMMON_PARAM(he_ul_on, false, false)
 	COMMON_PARAM(ldpc_on, true, true)
 	COMMON_PARAM(stbc_on, true, true)
diff --git a/ap/os/linux/linux-3.4.x/drivers/net/zvnet/zvnet_dev.c b/ap/os/linux/linux-3.4.x/drivers/net/zvnet/zvnet_dev.c
index 6e22779..4dd2a9d 100755
--- a/ap/os/linux/linux-3.4.x/drivers/net/zvnet/zvnet_dev.c
+++ b/ap/os/linux/linux-3.4.x/drivers/net/zvnet/zvnet_dev.c
@@ -106,14 +106,14 @@
 

 unsigned long virt_to_phys_cap(unsigned long virt)

 {

-	if(virt >= (unsigned long)vir_addr_cap && virt <= ((unsigned long)vir_addr_cap+DDR_BASE_LEN_CAP)) 

+	if(virt >= (unsigned long)vir_addr_cap)// && virt <= ((unsigned long)vir_addr_cap+DDR_BASE_LEN_CAP)

 		return DDR_BASE_CAP_ADDR_PA + (virt - (unsigned long)vir_addr_cap);

 	return NULL;

 }

 

 unsigned long phys_to_virt_cap(unsigned long phys)

 {

-	if(phys >= DDR_BASE_CAP_ADDR_PA && phys <= (DDR_BASE_CAP_ADDR_PA + DDR_BASE_LEN_CAP)) 

+	if(phys >= DDR_BASE_CAP_ADDR_PA)// && phys <= (DDR_BASE_CAP_ADDR_PA + DDR_BASE_LEN_CAP)

 		return (unsigned long)vir_addr_cap + (phys - DDR_BASE_CAP_ADDR_PA);

 	return NULL;

 }

@@ -243,7 +243,7 @@
 	unsigned int size;

 	int          len;

 	zv_info("build 0x%x 0x%x %d %d", pbuf_temp->buff, pbuf_temp->head, pbuf_temp->data_off, pbuf_temp->len);

-	if((unsigned long )pbuf_temp->head < DDR_BASE_CAP_ADDR_PA || (unsigned long )pbuf_temp->head > (DDR_BASE_CAP_ADDR_PA + DDR_BASE_LEN_CAP)){

+	if((unsigned long )pbuf_temp->head < DDR_BASE_CAP_ADDR_PA){// || (unsigned long )pbuf_temp->head > (DDR_BASE_CAP_ADDR_PA + DDR_BASE_LEN_CAP)

 		zv_err("err 0x%x 0x%x %d %d", pbuf_temp->buff, pbuf_temp->head, pbuf_temp->data_off, pbuf_temp->len);

 		panic("addr is not CAPBUF mem!!!");

 		return NULL;

@@ -439,7 +439,7 @@
 				if(pcu_CoreIsActive(2) == 0){

 					net->stats.tx_errors++;

 					net->stats.tx_dropped++;

-					zv_err("cap psm zvnet drop v4!");

+					//zv_err("cap psm zvnet drop v4!");

 					kfree_skb(skb);

 					return NET_XMIT_SUCCESS;

 				}

@@ -449,7 +449,7 @@
 				if(pcu_CoreIsActive(2) == 0){

 					net->stats.tx_errors++;

 					net->stats.tx_dropped++;

-					zv_err("cap psm zvnet drop v6!");

+					//zv_err("cap psm zvnet drop v6!");

 					kfree_skb(skb);

 					return NET_XMIT_SUCCESS;

 				}

@@ -1183,8 +1183,8 @@
 	        return PTR_ERR(th);

 	    }

 #endif

-		vir_addr_cap = ioremap_cached(DDR_BASE_CAP_ADDR_PA, DDR_BASE_LEN_CAP);

-		zv_warn("vir_addr_cap vir=0x%x phy=0x%x len=0x%x", vir_addr_cap, DDR_BASE_CAP_ADDR_PA, DDR_BASE_LEN_CAP);

+		vir_addr_cap = ioremap_cached(DDR_BASE_CAP_ADDR_PA, 0x20000000);//Ó³É䳤¶ÈʹÓÃÉÏÏÞ512M DDR_BASE_LEN_CAP

+		zv_warn("vir_addr_cap vir=0x%x phy=0x%x len=0x%x", vir_addr_cap, DDR_BASE_CAP_ADDR_PA, 0x20000000);

 		if(vir_addr_cap == NULL)

 		{

 			zv_err("CAP mmap failed.\n");

diff --git a/ap/os/linux/linux-3.4.x/drivers/psadapter/psadapter.c b/ap/os/linux/linux-3.4.x/drivers/psadapter/psadapter.c
old mode 100644
new mode 100755
index 66af70e..ef8744f
--- a/ap/os/linux/linux-3.4.x/drivers/psadapter/psadapter.c
+++ b/ap/os/linux/linux-3.4.x/drivers/psadapter/psadapter.c
@@ -159,6 +159,13 @@
 }
 EXPORT_SYMBOL(kernel_sys_open);
 
+long kernel_sys_ioctl(const char __user *filename, unsigned int cmd,
+				unsigned long arg)
+{
+       return sys_ioctl(filename,cmd,arg);
+}
+EXPORT_SYMBOL(kernel_sys_ioctl);
+
 long kernel_sys_access(const char __user *filename, int mode)
 {
 	return sys_access(filename, mode);
diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/Makefile b/ap/os/linux/linux-3.4.x/drivers/soc/zte/Makefile
old mode 100644
new mode 100755
index 27c1a01..491c007
--- a/ap/os/linux/linux-3.4.x/drivers/soc/zte/Makefile
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/Makefile
@@ -8,6 +8,9 @@
 ifndef CONFIG_SYSTEM_CAP
 obj-y	+= efuse/
 endif
+ifndef CONFIG_SPI_ZXIC_NOR
+obj-y	+= otp/
+endif
 endif
 obj-y	+= tsc/
 obj-y	+= ddr/
\ No newline at end of file
diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/Makefile b/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/Makefile
new file mode 100755
index 0000000..ccae250
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for rpm driver.
+#
+
+obj-y	+= otp_zx.o
+
+#ccflags-y += -I$(TOPDIR)/cp/ps/modem/com/inc
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/nor.h b/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/nor.h
new file mode 100755
index 0000000..dbbcaea
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/nor.h
@@ -0,0 +1,228 @@
+/*
+ * Freescale QuadSPI driver.
+ *
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+
+#define SF_DATA	  		(ZX29_SPIFC0_PHYS+0x38)
+
+#define ALIGN64(x) 					(((x) + 63) & 0xFFFFFFC0)
+
+ 
+struct spifc_nor_reg_t
+{
+    uint32_t     VER_REG;					//0x00
+    uint32_t     SFC_START;                 //0x04
+    uint32_t     SFC_EN;                    //0x08
+	uint32_t	 SFC_CTRL0;					//0x0c 
+	uint32_t	 SFC_CTRL1;					//0x10
+	uint32_t	 SFC_CTRL2;					//0x14 
+	uint32_t	 SFC_BYTE_NUM;				//0x18
+	uint32_t	 SFC_ADDR;					//0x1c
+	uint32_t	 SFC_INS;					//0x20
+	uint32_t	 SFC_TIMING;				//0x24
+	uint32_t	 SFC_INT_EN;				//0x28
+    uint32_t     SFC_INT_RAW;               //0x2c
+    uint32_t     SFC_INT_SW_CLR;            //0x30
+    uint32_t     SFC_SW;                    //0x34
+    uint32_t     SFC_DATA;                  //0x38
+};
+
+/*spifc start 0x4*/
+#define     FC_START      (1<<0)
+#define     FC_BUSY       (1<<0)
+
+/*spifc enable 0x8*/
+#define     FC_EN_BACK          (1)
+#define     FC_EN               (0)
+
+/*spifc main ctr0 0xc*/
+#define     FC_SCLK_PAUSE_CLR_ALLOW     (17)
+#define     FC_SCLK_PAUSE_EN            (16)
+#define     FC_TXFIFO_CLR               (15)
+#define     FC_RXFIFO_CLR               (14)
+#define     FC_TXFIFO_THRES             (10)
+#define     FC_RXFIFO_THRES             (6)
+#define     FC_TX_DMA_EN                (5)
+#define     FC_RX_DMA_EN                (4)
+#define     FC_WDOG_EN                  (3)
+#define     FC_SPI_MODE                 (1)
+#define     FC_WR_PROTECT               (0)
+
+/*spifc ctrl1 0x10  in the condition : SFC_EN = 1 SFC_BUSY = 0*/
+#define     FC_ADDR_TX_EN           (4)
+#define     FC_DUMMY_TX_EN          (2)
+#define     FC_READ_DAT_EN          (1)
+#define     FC_WRITE_DAT_EN         (0)
+
+/*spifc ctrl2 0x14*/
+#define     FC_DUMMY_BYTE_NUM           (12)  /* [12:15} */
+#define     FC_DUMMY_BIT_NUM            (8)   /* [8:10] */
+#define     FC_ADDR_BYTE_NUM            (5)   /* [5:6] */ 
+#define     FC_ADDR_MULTI_LINE_EN       (4)
+#define     FC_DAT_MULTI_LINE_EN        (2)
+#define     FC_TRANS_MOD                (0)
+
+#define     FC_ADDR_BYTE_NUM_8             (0) 
+#define     FC_ADDR_BYTE_NUM_16            (1) 
+#define     FC_ADDR_BYTE_NUM_24            (2)  
+#define     FC_ADDR_BYTE_NUM_32            (3)  
+
+
+/*spifc timing 0x24*/
+#define     FC_READ_DELAY           (1<<16)   /* [17:16} */
+#define     FC_T_CS_SETUP           (1<<11)   /* [11:13} */
+#define     FC_T_CS_HOLD            (1<<6)    /* [8:6} */
+#define     FC_T_CS_DESEL           (1<<0)    /* [0:3} */
+
+
+/*spifc int enable 0x28*/
+#define     FC_INT_EN_TX_BYD_THES           (1<<7)
+#define     FC_INT_EN_RX_BYD_THES           (1<<6)
+#define     FC_INT_EN_TX_UNDERRUN           (1<<5)
+#define     FC_INT_EN_RX_OVERRUN            (1<<4)
+#define     FC_INT_EN_WDOG_OVERRUN          (1<<2)
+#define     FC_INT_EN_FMT_ERR               (1<<1)
+#define     FC_INT_EN_CMD_END               (1<<0)
+
+/*spifc raw interrupt 0x2c*/
+#define     FC_INT_RAW_TX_BYD_THES           (1<<7)
+#define     FC_INT_RAW_RX_BYD_THES           (1<<6)
+#define     FC_INT_RAW_TX_UNDERRUN           (1<<5)
+#define     FC_INT_RAW_RX_OVERRUN            (1<<4)
+#define     FC_INT_RAW_WDOG_OVERRUN          (1<<2)
+#define     FC_INT_RAW_FMT_ERR               (1<<1)
+#define     FC_INT_RAW_CMD_END               (1<<0)
+#define     FC_INT_RAW_ERR_MASK              (FC_INT_RAW_TX_UNDERRUN|\
+                                              FC_INT_RAW_RX_OVERRUN|\
+                                              FC_INT_RAW_WDOG_OVERRUN|\
+                                              FC_INT_RAW_FMT_ERR)
+                                              
+#define     FC_INT_RAW_MASK              	 (FC_INT_RAW_TX_UNDERRUN|	\
+                                              FC_INT_RAW_RX_OVERRUN|	\
+                                              FC_INT_RAW_WDOG_OVERRUN|	\
+                                              FC_INT_RAW_FMT_ERR|		\
+                                              FC_INT_RAW_CMD_END)                                            
+
+/*spifc int startus and clr 0x30*/
+#define     FC_INT_CLR_TX_BYD_THES           (1<<7)
+#define     FC_INT_CLR_RX_BYD_THES           (1<<6)
+#define     FC_INT_CLR_TX_UNDERRUN           (1<<5)
+#define     FC_INT_CLR_RX_OVERRUN            (1<<4)
+#define     FC_INT_CLR_WDOG_OVERRUN          (1<<2)
+#define     FC_INT_CLR_FMT_ERR               (1<<1)
+#define     FC_INT_CLR_CMD_END               (1<<0)
+
+/*spifc sw 0x34*/
+#define     FC_TX_FIFO_CNT              (16)         /* [16:20} */
+#define     FC_TX_FIFO_CNT_MASK         (0x1F)      /* [8:12} */
+#define     FC_RX_FIFO_CNT              (8)             /* [8:12} */
+#define     FC_RX_FIFO_CNT_MASK         (0x1F)      /* [8:12} */
+#define     FC_TX_BYD_THRES             (1<<5)  
+#define     FC_RX_BYD_THRES             (1<<4)  
+#define     FC_SCLK_PAUSE_FLAG          (1<<3)  
+#define     FC_WAIT_FLAG                (1<<2) 
+#define     FC_FORMAT_ERR               (1<<1)  
+
+
+#define     FC_DMA_NONE           		0
+#define     FC_DMA_TX             		1
+#define     FC_DMA_RX             		2
+
+#define 	SPIFC_IRQ_ALL				(FC_INT_EN_CMD_END|\
+	                     				FC_INT_EN_FMT_ERR|\
+	                     				FC_INT_EN_RX_OVERRUN|\
+	                     				FC_INT_EN_TX_UNDERRUN|\
+	                     				FC_INT_EN_FMT_ERR)
+
+
+
+#define TX_DMA_EN		1 
+#define TX_DMA_DIS      0 
+#define RX_DMA_EN		1 
+#define RX_DMA_DIS      0
+#define ADDR_TX_EN      1   
+#define ADDR_TX_DIS     0
+#define DATA_TX_EN      1
+#define DATA_TX_DIS     0
+#define DATA_RX_EN      1
+#define DATA_RX_DIS     0
+#define DUMY_TX_EN      1
+#define DUMY_TX_DIS     0
+#define ADDR_MULTI_LINE_EN		1 
+#define ADDR_MULTI_LINE_DIS      0
+#define DATA_MULTI_LINE_EN		1 
+#define DATA_MULTI_LINE_DIS      0
+#define TRANS_MOD_QUAD		1 
+#define TRANS_MOD_DUAL      0
+#define TRANS_MOD_SINGLE	2
+
+
+#define ADDR_WIDTH_8    0
+#define ADDR_WIDTH_16   1
+#define ADDR_WIDTH_24   2
+#define ADDR_WIDTH_32   3
+
+
+
+typedef struct spinor_cmd
+{
+    u8 cmd;
+	u8 tx_dma_en;
+	u8 rx_dma_en;
+    u8 addr_tx_en;
+    u8 addr_byte_num;
+    u8 data_tx_en;
+    u8 data_rx_en;
+    u8 dumy_tx_en;
+    u8 dumy_byte_num;
+	u8 dumy_bit_num;
+	u8 addr_multi_line_en;
+	u8 data_multi_line_en;
+	u8 trans_mod;
+	u8 reserved[3];
+    u8 *info;
+}spinor_cmd_t;
+
+
+#define CMD_WREN                        0x06
+#define CMD_WRDI                        0x04
+#define CMD_WRENVSR                     0x50
+#define CMD_RDSR0                       0x05
+#define CMD_RDSR1                       0x35
+#define CMD_WRSR                        0x01
+#define CMD_RDB			            	0x03
+#define CMD_RDFT                   		0x0B
+#define CMD_RDDFT                       0x3B
+#define CMD_RDQFT                       0x6B
+#define CMD_PP                          0x02 
+#define CMD_QPP                         0x32
+#define CMD_SE                          0x20
+#define CMD_32KBE                       0x52
+#define CMD_64KBE                       0xD8
+#define CMD_CE                          0x60
+#define CMD_DP                          0xB9
+#define CMD_RDPRDI                      0xAB
+#define CMD_REMS                     	0x90
+#define CMD_RDID                    	0x9F
+#define CMD_PES                    		0x75
+#define CMD_PER                    		0x7A
+#define CMD_ESR                    		0x44
+#define CMD_PSR                    		0x42
+#define CMD_RSR                    		0x48
+#define CMD_ENRESET                    	0x66
+#define CMD_RESET                    	0x99
+
+
+#define NOR_MAX_PAGE_SIZE	2048
+#define SPI_NOR_BUF_SIZE	NOR_MAX_PAGE_SIZE
+
+
+#define FSL_QSPI_MAX_CHIP	1
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/otp_zx.c b/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/otp_zx.c
new file mode 100755
index 0000000..8c93da8
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/otp/otp_zx.c
@@ -0,0 +1,870 @@
+#include <linux/init.h>

+#include <linux/types.h>

+#include <linux/mm.h>

+#include <linux/kernel.h>

+#include <mach/board.h>

+#include <mach/iomap.h>

+#include <mach/debug.h>

+#include <linux/io.h>

+#include <mach/spinlock.h>

+#include <mach/pcu.h>

+#include <linux/mutex.h>

+#include <linux/device.h>

+#include <linux/module.h>

+#include <linux/cdev.h>

+#include <linux/fs.h>

+#include <linux/uaccess.h>

+#include <linux/soc/zte/otp/otp_zx.h>

+#include <asm/setup.h>

+#include <asm/io.h>

+#include <asm/system.h>

+#include <linux/delay.h>

+#include <linux/slab.h>

+#include <linux/miscdevice.h>

+#include "nor.h"

+#include <linux/gpio.h>

+#include <linux/dmaengine.h>

+#include <mach/iomap.h>

+#include <mach/gpio.h>

+

+struct mutex otpMutex;

+extern char *nor_cmdline;

+

+typedef volatile struct

+{

+	u32 secure_flag;

+	u32 puk_hash[8];

+	u32 secureDevId[3];

+} s_OtpStruct;

+

+typedef struct

+{

+	u32 uiPubKey[95];

+} s_ImageHeader;

+

+s_OtpStruct otp_data;

+

+#define SECURE_EN_OFFSET     0x1000

+#define PUB_KEY_HASH_OFFSET  0x1004

+#define DEVICE_ID_OFFSET     0x1024

+

+/**-----------------------------------------------------**/

+struct nor_info *spi_nor_flash = NULL;

+void  __iomem * nor_base_addr;

+

+/* Used when the "_ext_id" is two bytes at most */

+#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\

+		.id = {							\

+			((_jedec_id) >> 16) & 0xff,			\

+			((_jedec_id) >> 8) & 0xff,			\

+			(_jedec_id) & 0xff,				\

+			((_ext_id) >> 8) & 0xff,			\

+			(_ext_id) & 0xff,				\

+			},						\

+		.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))),	\

+		.sector_size = (_sector_size),				\

+		.n_sectors = (_n_sectors),				\

+		.page_size = 256,					\

+		.flags = (_flags),

+

+

+spinor_cmd_t nor_cmd_table[]=

+{	

+	{CMD_WREN, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "write enable"},

+	{CMD_WRDI, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "write disable"},

+	{CMD_WRENVSR, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "write ensable vsr"},		

+	{CMD_RDSR0, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "read SR S7-S0"},

+	{CMD_RDSR1, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "read SR S15-S8"},

+	{CMD_WRSR, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_EN, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "write SR S15-S0"},

+	{CMD_RDB, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "read data bytes"},

+	{CMD_RDFT, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_EN, 1, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "read fast"},

+	{CMD_RDDFT, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_EN, 1, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_EN, TRANS_MOD_DUAL, "read dual fast"},

+	{CMD_RDQFT, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_EN, 1, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_EN, TRANS_MOD_QUAD, "read quad fast"},

+	{CMD_PP, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_EN, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "page program"},

+	{CMD_QPP, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_EN, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_EN, TRANS_MOD_QUAD, "quad page program"},

+	{CMD_SE, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "sector erase"},

+	{CMD_32KBE, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "32K block erase"},

+	{CMD_64KBE, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "64K block erase"},

+	{CMD_CE, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "chip erase"},

+	{CMD_DP, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "deep power-down"},

+	{CMD_RDPRDI, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "releae DP adn RDI"},

+	{CMD_REMS, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "read manufacture device id"},	

+	{CMD_RDID, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "read identification"},

+	{CMD_ENRESET, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "reset enable"},	

+	{CMD_RESET, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_DIS, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "reset"},

+	{CMD_ESR, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "erase security registers"},

+	{CMD_PSR, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_EN, DATA_RX_DIS, DUMY_TX_DIS, 0, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "program security registers"},

+	{CMD_RSR, TX_DMA_DIS, RX_DMA_DIS, ADDR_TX_EN, ADDR_WIDTH_24, DATA_TX_DIS, DATA_RX_EN, DUMY_TX_EN, 1, 0, ADDR_MULTI_LINE_DIS, DATA_MULTI_LINE_DIS, TRANS_MOD_SINGLE, "read security registers"},

+};

+

+#ifdef CONFIG_ZX297520V3_UFI_MINI_32K_NOR

+ static const struct nor_info spi_nor_ids[] = {

+	 /* GigaDevice */

+	 { "gd25q128", INFO(0xc86018, 0, 32 * 1024, 512, 0) },

+	 { "gd25ld10c", INFO(0xc86011, 0, 32 * 1024, 4, 0) },

+	 { "gd25ld20e", INFO(0xc86012, 0, 32 * 1024, 8, 0) },

+	 /* winbond */	 

+	 { "w25q128fw", INFO(0xef6018, 0, 32 * 1024, 512, 0) },

+	 /* dosilicon */

+	 { "fm25m4aa", INFO(0xf84218, 0, 32 * 1024, 512, 0) },

+	 /* fudanwei */

+	 { "fm25w128", INFO(0xA12818, 0, 32 * 1024, 512, 0) },

+	 /* XMC */

+	 { "XM25QU64C", INFO(0x204117, 0, 32 * 1024, 256, 0) },

+	 { "XM25QU128", INFO(0x205018, 0, 32 * 1024, 512, 0) },

+	 { "XM25QU128C", INFO(0x204118, 0, 32 * 1024, 512, 0) },

+	 /* DQ25Q128AL */

+	 { "DQ25Q128AL", INFO(0x546018, 0, 32 * 1024, 512, 0) },

+	 /* dosilicon */

+	 { "DS25M4AB", INFO(0xE54218, 0, 32 * 1024, 512, 0) },

+	 /* esmt(eon) */

+	 { "EN25SX128A", INFO(0x1C7818, 0, 32 * 1024, 512, 0) },

+	 /* dosilicon */

+	 { "FM25M4AA", INFO(0xF84218, 0, 32 * 1024, 512, 0) },

+	 { },

+ };

+#else

+ static const struct nor_info spi_nor_ids[] = {

+	 /* GigaDevice */

+	 { "gd25q128", INFO(0xc86018, 0, 64 * 1024, 256, 0) },

+	 { "gd25ld10c", INFO(0xc86011, 0, 64 * 1024, 2, 0) },

+	 { "gd25ld20e", INFO(0xc86012, 0, 64 * 1024, 4, 0) },

+	 /* winbond */	 

+	 { "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256, 0) },

+	 /* dosilicon */

+	 { "fm25m4aa", INFO(0xf84218, 0, 64 * 1024, 256, 0) },

+	 /* fudanwei */

+	 { "fm25w128", INFO(0xA12818, 0, 64 * 1024, 256, 0) },

+	 /* xmc */

+	 { "XM25QU128", INFO(0x205018, 0, 64 * 1024, 256, 0) },

+	 { "XM25QU128C", INFO(0x204118, 0, 64 * 1024, 256, 0) },

+	 /* DQ25Q128AL */

+	 { "DQ25Q128AL", INFO(0x546018, 0, 64 * 1024, 256, 0) },

+	 /* dosilicon */

+	 { "DS25M4AB", INFO(0xE54218, 0, 64 * 1024, 256, 0) },

+	 /* esmt(eon) */

+	 { "EN25SX128A", INFO(0x1C7818, 0, 64 * 1024, 256, 0) },

+	 /* dosilicon */

+	 { "FM25M4AA", INFO(0xF84218, 0, 64 * 1024, 256, 0) },

+	 { },

+ };

+#endif

+

+ static void cs_open(void)

+ {

+     zx29_gpio_config(93,GPIO93_SPIFC_CS);    

+ }

+

+ static void cs_close(void)

+ {

+    zx29_gpio_config(93,GPIO93_GPIO93);

+	gpio_direction_output(93,1);

+ }

+

+ void spifc_enable(void)

+{

+   volatile struct spifc_nor_reg_t* spifc = (struct spifc_nor_reg_t*)(ZX_SPIFC0_BASE);

+    

+    if(spifc->SFC_EN & FC_EN_BACK)

+    {

+		printk("spifc en err.\n");

+		return;

+	}   

+    spifc->SFC_EN |= (1 << FC_EN);  

+    spifc->SFC_CTRL0 |= (1 << FC_SCLK_PAUSE_EN);

+}

+

+ void spifc_disable(void)

+{

+    volatile struct spifc_nor_reg_t* spifc = (struct spifc_nor_reg_t*)(ZX_SPIFC0_BASE);

+    

+    if(!(spifc->SFC_EN & FC_EN_BACK))

+    {

+		printk("spifc dis err.\n");

+		return;

+	}     

+    spifc->SFC_EN &= (~(1 <<FC_EN));    

+}

+

+ void spifc_setup_cmd(spinor_cmd_t *cmd, uint32_t addr, uint32_t len)

+ {	 

+	 volatile struct spifc_nor_reg_t* spifc = (struct spifc_nor_reg_t*)(ZX_SPIFC0_BASE);

+ 

+	 /* clear dma config */

+	 spifc->SFC_CTRL0 &= ~((1 << FC_RX_DMA_EN)|(1 << FC_TX_DMA_EN));

+	 /* clear fifo */

+	 spifc->SFC_CTRL0 |= (1 << FC_RXFIFO_CLR)|(1 << FC_TXFIFO_CLR);

+ 

+	 /* clear interrupt register */

+	 spifc->SFC_INT_SW_CLR = 0xFF;	

+	 

+	 /* dma + fifo config */

+	 spifc->SFC_CTRL0 |= ((cmd->tx_dma_en << FC_TX_DMA_EN) 

+						   | (cmd->rx_dma_en << FC_RX_DMA_EN)

+						   | (1 << FC_RXFIFO_THRES)

+						   | (1 << FC_TXFIFO_THRES));

+ 

+	 /* addr dumy data code config */

+	 spifc->SFC_CTRL1 = 0;

+	 spifc->SFC_CTRL1 = ((cmd->addr_tx_en << FC_ADDR_TX_EN) 

+						 | (cmd->dumy_tx_en << FC_DUMMY_TX_EN) 

+						 | (cmd->data_rx_en << FC_READ_DAT_EN) 

+						 | (cmd->data_tx_en << FC_WRITE_DAT_EN));

+ 

+	 spifc->SFC_CTRL2 = 0;

+	 spifc->SFC_CTRL2 = ((cmd->dumy_byte_num << FC_DUMMY_BYTE_NUM) 

+						 | (cmd->dumy_bit_num << FC_DUMMY_BIT_NUM) 

+						 | (cmd->addr_byte_num << FC_ADDR_BYTE_NUM)

+						 | (cmd->addr_multi_line_en << FC_ADDR_MULTI_LINE_EN)

+						 | (cmd->data_multi_line_en << FC_DAT_MULTI_LINE_EN)

+						 | (cmd->trans_mod << FC_TRANS_MOD));

+ 

+	 if(len)

+		 spifc->SFC_BYTE_NUM = len - 1;

+	 else

+		 spifc->SFC_BYTE_NUM = 0; 

+	 

+	 spifc->SFC_ADDR = addr; 

+	 spifc->SFC_INS = cmd->cmd; 		 

+ }

+ 

+  int spifc_wait_cmd_end(void)

+ {

+	 volatile struct spifc_nor_reg_t* spifc = (struct spifc_nor_reg_t*)(ZX_SPIFC0_BASE);

+	 uint32_t intr_status = 0;

+	 

+     while( spifc->SFC_START & FC_BUSY );

+	 

+	 while(!(spifc->SFC_INT_RAW & FC_INT_RAW_MASK));

+	 

+	 intr_status = spifc->SFC_INT_RAW;

+	 spifc->SFC_INT_SW_CLR = intr_status;		

+ 

+	 if(intr_status & FC_INT_RAW_CMD_END)

+	 {	 

+		 return 0;

+	 }

+	 else

+	 {

+		 printk("intr status err.\n");

+		 return -1;

+	 }	 

+ }

+

+   spinor_cmd_t *cmd_seek(u8 opcode)

+ {

+	 int i;

+ 

+	 for(i = 0; (&nor_cmd_table[i]) != NULL; i++)

+	 {

+		 if(opcode == nor_cmd_table[i].cmd)

+		 {

+			 return (&nor_cmd_table[i]);

+		 }

+	 }

+ 

+	 return NULL;	 

+ }

+   

+ uint32_t spifc_read_fifo(uint8_t *buf, uint32_t len)

+ {

+	 volatile struct spifc_nor_reg_t* spifc = (struct spifc_nor_reg_t*)(ZX_SPIFC0_BASE);

+	 uint32_t *p = (uint32_t *)buf;

+	 uint32_t cnt = 0;

+ 

+	 int remainder_cnt = len % 4;

+ 

+	 if(remainder_cnt != 0)

+	 {

+		 len = len + (4 - remainder_cnt);

+	 }

+	 else

+	 {

+		 remainder_cnt = 4;

+	 }

+	

+	 while(cnt < (len>>2))	

+	 {

+		 if(spifc->SFC_SW & (FC_RX_FIFO_CNT_MASK<<FC_RX_FIFO_CNT))//rx fifo not empty

+		 {			 

+			 p[cnt++]= spifc->SFC_DATA;

+		 }

+	 }

+ 

+	 return ((cnt<<2) - (4 - remainder_cnt));

+ }

+

+ int spifc_write_data(uint8_t *buf, uint32_t len)

+{

+    uint32_t *p = (uint32_t *)buf;

+    uint32_t cnt = 0;

+    volatile struct spifc_nor_reg_t* spifc = (struct spifc_nor_reg_t*)(ZX_SPIFC0_BASE);

+	int remainder_cnt = len % 4;

+	

+	if(remainder_cnt != 0)

+	{

+		len = len + (4 - remainder_cnt);

+	}

+	else

+	{

+		remainder_cnt = 4;

+	}

+	

+    while(cnt < (len >> 2))  

+    {

+        if(spifc->SFC_SW & (FC_TX_FIFO_CNT_MASK<<FC_TX_FIFO_CNT))//tx fifo not full

+        {       

+            spifc->SFC_DATA = p[cnt++];

+        }

+    }

+

+    return ((cnt<<2) - (4 - remainder_cnt));

+}

+ 

+  void spifc_start(void)

+ {

+	 volatile struct spifc_nor_reg_t* spifc = (struct spifc_nor_reg_t*)(ZX_SPIFC0_BASE);

+	 

+	 spifc->SFC_START |= FC_START;

+ }

+ 

+

+ int nor_read_reg(u8 opcode, int len, u8 *buf)

+{

+	int ret = 0;

+	spinor_cmd_t *cmd = NULL;

+	

+	cs_open();//spp

+	cmd = cmd_seek(opcode);

+	if(cmd == NULL)

+	{

+		printk("cmd_seek unkown cmd error.\n");

+		return -1;

+	}

+	

+	spifc_setup_cmd(cmd, 0x0, len);            

+    spifc_start(); 

+

+    ret = spifc_wait_cmd_end();             

+    if(ret != 0)

+    {

+		printk("spifc_wait_cmd_end error.\n");

+	   	return ret;

+    }

+

+	ret = spifc_read_fifo(buf, len);

+	cs_close();//spp

+	if(ret < 0)

+	{

+		printk("spifc_read_fifo error.\n");

+	    return ret;

+	}

+

+	return 0;	

+}

+

+ int nor_write_reg(u8 opcode, u8 *buf, int len)

+{

+	 int ret;

+	 spinor_cmd_t *cmd = NULL;

+	 int nor_status = 0;

+	 

+	 cs_open();//spp

+	 

+	 cmd = cmd_seek(opcode);

+	 if(cmd == NULL)

+	 {

+		 printk("cmd_seek unkown cmd = 0x%x error.\n", opcode);

+		 return -1;

+	 }

+	 

+	 spifc_setup_cmd(cmd, 0x0, len); 	 

+

+	 if(len > 0)

+	 {

+		 ret = spifc_write_data(buf, len);

+		 if(ret != len)

+		 {

+			 printk("spifc_write_data error.\n");

+			 return ret;

+		 }

+	 }

+

+	 spifc_start();

+

+	 ret = spifc_wait_cmd_end();			  

+	 if(ret != 0)

+	 {

+		 printk("spifc_wait_cmd_end error.\n");

+		 return ret;

+	 }

+

+	 do{

+		 ret = nor_read_reg(CMD_RDSR0, 1, &nor_status);

+		 if(ret != 0)

+		 {

+			 printk("read WIP fail.\n");

+		 }

+	 }while(nor_status & 0x1);

+    cs_close();//spp

+

+ return 0;

+}

+

+ int nor_read_id(void)

+ {

+	 int tmp;

+	 u8  id[SPI_NOR_MAX_ID_LEN];

+	 const struct nor_info	 *info;

+	 tmp = nor_read_reg(CMD_RDID, SPI_NOR_MAX_ID_LEN, id);

+	 if(tmp < 0) 

+	 {

+		 printk("error reading JEDEC ID\n");

+		 return tmp;

+	 }

+ 

+	 for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) 

+	 {

+		 info = &spi_nor_ids[tmp];

+		 if(info->id_len) 

+		 {

+			 if(!memcmp(info->id, id, info->id_len))

+			 {

+				 spi_nor_flash = info;

+				 printk("nor id is 0x%x,0x%x,0x%x.\n",spi_nor_flash->id[0],spi_nor_flash->id[1],spi_nor_flash->id[2]);

+				 return 0;

+			 }

+		 }

+	 }

+	 printk("unrecognized JEDEC id\n");

+	 return -1;

+	 

+ }

+

+  int spi_nor_write_security_register(uint32_t to, size_t len, u_char *buf)

+  {

+	 int ret;

+	 int nor_status = 0;

+	 spinor_cmd_t *cmd = NULL;

+

+	 cmd = cmd_seek(CMD_PSR);

+	 

+	 if(cmd == NULL)

+	 {

+		 printk("cmd_seek unkown cmd = 0x%x error.\n", CMD_PSR);

+		 return -1;

+	 }

+ 

+	 cmd->tx_dma_en = TX_DMA_DIS;

+     cs_open();//spp

+	 spifc_setup_cmd(cmd, to, len);	

+

+	 spifc_start();

+

+	 ret = spifc_write_data(buf, len);

+	 if(ret < 0)

+	 {

+		 printk("spifc_write_fifo error.\n");

+		 return ret;

+	 }

+

+	 ret = spifc_wait_cmd_end();			  

+	 if(ret != 0)

+	 {

+		 printk("spifc_wait_cmd_end error.\n");

+		 return ret;

+	 }

+     cs_close();//spp

+     udelay(5);

+	 

+	 do{

+		 ret = nor_read_reg(CMD_RDSR0, 1, &nor_status);

+		 if(ret != 0)

+		 {

+			 printk("read WIP fail.\n");

+		 }

+	 }while(nor_status & 0x1);

+	 

+	 return 0;

+  }

+  

+  int nor_write_security_register(uint32_t to, uint32_t len, uint32_t buf)

+ {

+	 int ret;

+	 u32 page_offset, page_size, i;

+	 struct nor_info *info = spi_nor_flash;

+

+	 nor_write_reg(CMD_WREN, NULL, 0);

+	 

+	 page_offset = to & (info->page_size - 1);

+ 

+	 /* do all the bytes fit onto one page? */

+	 if (page_offset + len <= info->page_size) {

+		 ret = spi_nor_write_security_register(to, len, (uint8_t *)buf);

+	 } else {

+		 /* the size of data remaining on the first page */

+		 page_size = info->page_size - page_offset;

+		 ret = spi_nor_write_security_register(to, page_size, (uint8_t *)buf);

+ 

+		 /* read everything in nor->page_size chunks */

+		 for (i = page_size; i < len; i += page_size) {

+			 page_size = len - i;

+			 if (page_size > info->page_size)

+				 page_size = info->page_size;

+

+			 nor_write_reg(CMD_WREN, NULL, 0);

+			 ret = spi_nor_write_security_register(to + i, page_size, ((uint8_t *)buf + i));

+		 }

+	 }

+ 

+	 return ret;

+ }

+ int spi_nor_read_security_register(uint32_t from, size_t len, u_char *buf)

+ {

+	 int ret;

+	 spinor_cmd_t *cmd = NULL;

+ 

+	 cmd = cmd_seek(CMD_RSR);

+

+	 if(cmd == NULL)

+	 {

+		 printk("cmd_seek unkown error.\n");

+		 return -1;

+	 }

+

+	 cmd->rx_dma_en = RX_DMA_DIS;

+     cs_open();//spp

+	 spifc_setup_cmd(cmd, from, len);				 

+	 spifc_start();

+	 ret = spifc_read_fifo(buf, len);

+	 if(ret < 0)

+	 {

+		 printk("spifc_read_fifo error.\n");

+		 return ret;

+	 }

+ 

+	 ret = spifc_wait_cmd_end();			 

+	 if(ret != 0)

+	 {

+		 printk("spifc_wait_cmd_end error.\n");

+		 cs_close();//spp

+		 return ret;

+	 }

+	 cs_close();//spp

+	 return 0;

+ }

+ 

+ int nor_read_security_register(uint32_t from, uint32_t len, uint32_t to)

+ {

+	 int ret;

+	 u32 page_offset, page_size, i;

+	 struct nor_info *info = spi_nor_flash;

+	 

+	 page_offset = from & (info->page_size - 1);

+ 

+	 /* do all the bytes fit onto one page? */

+	 if (page_offset + len <= info->page_size) {

+		 ret = spi_nor_read_security_register(from, len, (uint8_t *)to);

+	 } else {

+		 /* the size of data remaining on the first page */

+		 page_size = info->page_size - page_offset;

+		 ret = spi_nor_read_security_register(from, page_size, (uint8_t *)to);

+ 

+		 /* read everything in nor->page_size chunks */

+		 for (i = page_size; i < len; i += page_size) {

+			 page_size = len - i;

+			 if (page_size > info->page_size)

+				 page_size = info->page_size;

+ 

+			 ret = spi_nor_read_security_register(from + i, page_size, ((uint8_t *)to + i));

+		 }

+	 }

+ 

+	 return ret;

+ }

+

+int nor_init(void)

+{

+	int ret = 0;

+	printk("nor init ... \n");

+	soft_spin_lock(NAND_SFLOCK);

+    

+	//spifc_disable();

+	

+	//spifc_enable();

+

+	ret = nor_read_id();

+	if(ret != 0)

+	{

+	    soft_spin_unlock(NAND_SFLOCK);

+		return -1;

+	}

+	

+	soft_spin_unlock(NAND_SFLOCK);

+	return 0;

+}

+

+/*******************************************************************************

+* Function:     zDrvOtp_GetSecureMsg

+* Description:  get pub key from iram, load by uboot

+* Parameters:

+*   Input:

+*       None

+*   Output:

+*       None

+* Returns:

+*       None

+* Others:

+*******************************************************************************/

+void zDrvOtp_GetSecureMsg(T_ZDrvOtp_Secure *secure)

+{

+	u32 i = 0;

+	u32 ret = 0;

+	int32_t offset = 0x1000;

+	

+	uint32_t len = sizeof(s_OtpStruct);

+	

+	s_ImageHeader *s_header = (s_ImageHeader *)(ZX_IRAM0_BASE + 4);

+	s_OtpStruct *s_otp  = NULL;

+	

+    soft_spin_lock(NAND_SFLOCK);

+	mutex_lock(&otpMutex);

+	

+	ret = nor_read_security_register(offset, len, &otp_data);

+	if(ret !=0){

+        printk("read otp data error.\n");

+	}

+	

+	s_otp  = (s_OtpStruct *)(&otp_data);

+	

+	for(i = 0; i < 95; i ++)

+	{

+		secure->pubKey[i] = s_header->uiPubKey[i];

+		//printk("uiPubKey[%d] is 0x%x\n",i,s_header->uiPubKey[i]);

+	}

+

+	secure->secureFlag = s_otp->secure_flag;

+

+	for(i = 0; i < 8; i ++)

+	{

+		secure->pubKeyHash[i] = s_otp->puk_hash[i];

+		printk("puk_hash[%d] is 0x%x\n",i,s_otp->puk_hash[i]);

+	}

+

+	for(i = 0; i < 3; i ++)

+	{

+		secure->secureDevId[i] = s_otp->secureDevId[i];

+		printk("secureDevId[%d] is 0x%x\n",i,s_otp->secureDevId[i]);

+	}

+

+	mutex_unlock(&otpMutex);

+	soft_spin_unlock(NAND_SFLOCK);

+}

+EXPORT_SYMBOL(zDrvOtp_GetSecureMsg);

+

+/*******************************************************************************

+* Function:     zDrvOtp_SetSecureMsg

+* Description:  set otp value

+* Parameters:

+*   Input:

+*       None

+*   Output:

+*       None

+* Returns:

+*       None

+* Others:

+*******************************************************************************/

+int zDrvOtp_SetSecureMsg(E_ZDrvOtp_SecureMsg secure_msg, u32 *secure_buf)

+{

+	u32 i = 0;

+	T_ZDrvOtp_Secure secure = {0};

+	u32 tmpbuf[8] = {0xffffffff,0xffffffff,0xffffffff,0xffffffff,

+		             0xffffffff,0xffffffff,0xffffffff,0xffffffff};

+	int ret = 0;

+	

+	if(secure_msg >= OTP_MAX_ENUM)

+	{

+		return -EINVAL;

+	}

+

+	zDrvOtp_GetSecureMsg(&secure);

+

+	if(((secure_msg == OTP_SECURE_EN)&&(secure.secureFlag != 0xffffffff))||

+	  ((secure_msg == OTP_PUB_KEY_HASH)&&(memcmp(secure.pubKeyHash,tmpbuf,sizeof(secure.pubKeyHash)) != 0))||

+	  ((secure_msg == OTP_DEVICE_ID)&&(memcmp(secure.secureDevId,tmpbuf,sizeof(secure.secureDevId)) != 0)))

+		return -1;

+	

+    soft_spin_lock(NAND_SFLOCK);

+	mutex_lock(&otpMutex);

+

+	switch(secure_msg)

+	{

+		case OTP_SECURE_EN:

+		{

+		    ret = nor_write_security_register(SECURE_EN_OFFSET, 4, secure_buf);

+			if(ret < 0){

+				mutex_unlock(&otpMutex);

+				cs_close();//spp

+				return ret;

+			}

+			break;

+		}

+		case OTP_PUB_KEY_HASH:

+		{    

+		    //printk("pub key hash is 0x%x.\n",*(u32 *)secure_buf);

+		    ret = nor_write_security_register(PUB_KEY_HASH_OFFSET, 32, secure_buf);

+			if(ret < 0){

+				mutex_unlock(&otpMutex);

+				cs_close();//spp

+				return -ret;

+			}

+			break;

+		}

+		case OTP_DEVICE_ID:

+		{

+			ret = nor_write_security_register(DEVICE_ID_OFFSET, 12, secure_buf);

+			if(ret < 0){

+				mutex_unlock(&otpMutex);

+				cs_close();//spp

+				return ret;

+			}

+			break;

+		}

+		default:

+			break;

+	}

+

+	mutex_unlock(&otpMutex);

+    soft_spin_unlock(NAND_SFLOCK);

+	return 0;

+}

+

+int zx29_otp_set_secure(E_ZDrvOtp_SecureMsg secure_msg, u32 *secure_buf)

+{

+	int ret = 0;

+	int	len = 0;

+	void *buf=NULL;

+

+	switch(secure_msg)

+	{

+		case OTP_SECURE_EN:

+			len = sizeof(u32);

+			break;

+		case OTP_PUB_KEY_HASH:

+			len = 8 * sizeof(u32);

+			break;

+		case OTP_DEVICE_ID:

+			len = 3 * sizeof(u32);

+			break;

+

+		default:

+			return -EINVAL;

+	}

+

+	buf = kmalloc(len, GFP_KERNEL);

+	if(NULL == buf)

+		return -ENOSPC;

+	

+	ret = copy_from_user(buf, secure_buf, len);

+	if(ret)

+		printk("%s: copy user failed\n",__func__);

+	

+	ret = zDrvOtp_SetSecureMsg(secure_msg, buf);

+	kfree(buf);

+

+	return ret;

+}

+

+

+static long zx_otp_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)

+{

+	int ret = 0;

+	T_ZDrvOtp_Secure secure;

+

+	if (arg == NULL)

+		return -EFAULT;

+	

+	switch(cmd)

+	{

+		case OTP_GET_DATA:

+			printk("start get otp data...\n");

+			zDrvOtp_GetSecureMsg(&secure);		    

+			ret = copy_to_user((void *)arg, &secure, sizeof(T_ZDrvOtp_Secure));

+			if(ret){

+                printk("%s: copy user failed\n",__func__);

+				printk("write get otp data fail...\n");

+			}else{

+				printk("already get otp data...\n");

+			}

+				

+			break;

+		case OTP_SET_SECURE_EN:

+			printk("start set secure en...\n");

+			ret = zx29_otp_set_secure(OTP_SECURE_EN, (u32 *)arg);

+		    if(ret)

+				printk("set secure en fail...,ret is 0x%x\n",ret);

+			else

+				printk("already set secure en...\n");

+			break;

+		case OTP_SET_PUB_KEY_HASH:

+			printk("start set pub key hash...\n");

+			ret = zx29_otp_set_secure(OTP_PUB_KEY_HASH, (u32 *)arg);

+		    if(ret)

+				printk("set pub key hash fail...,ret is 0x%x\n",ret);

+			else

+				printk("already set pub key hash...\n");

+			break; 

+		case OTP_SET_DEVICE_ID:

+			ret = zx29_otp_set_secure(OTP_DEVICE_ID, (u32 *)arg);

+			break; 

+		default:

+			return -EPERM;

+		}

+	

+	return ret;

+}

+

+static const struct file_operations	zx_otp_ops = {

+	.owner 		= THIS_MODULE,

+	.unlocked_ioctl = zx_otp_ioctl,

+};

+

+static struct miscdevice zx_otp_miscdev = {

+	.minor		= MISC_DYNAMIC_MINOR,

+	.name		= "otp",

+	.fops		= &zx_otp_ops,

+};

+

+

+static int __init zx_otp_init(void)

+{

+	int ret = 0;

+

+	mutex_init(&otpMutex);

+	

+	ret = misc_register(&zx_otp_miscdev);

+	if (ret) {

+		printk(KERN_ERR"%s: otp failed to register miscdev (ret = %d)\n", __FILE__, ret);

+		return ret;

+	}

+

+	printk("[xxx] otp dev inited! \n");	

+

+	if(nor_cmdline != NULL)

+	{

+	    if (!strcmp(nor_cmdline, "1"))

+		{

+			ret = nor_init();

+			if(ret){

+		        printk("nor init err.\n");

+				return ret;

+			}	    

+		}

+	}

+	

+

+	return ret;

+}

+

+module_init(zx_otp_init);

+

diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/power/zx-cpuidle.c b/ap/os/linux/linux-3.4.x/drivers/soc/zte/power/zx-cpuidle.c
old mode 100644
new mode 100755
index 6b5f3cf..a2a3154
--- a/ap/os/linux/linux-3.4.x/drivers/soc/zte/power/zx-cpuidle.c
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/power/zx-cpuidle.c
@@ -607,7 +607,7 @@
 	sleep_count++;
 	pm_ram_log(" @@sleep enter,expect_time:%u,jiffies:%u\n", expect_time, jiffies);
 
-	pm_ram_log(" freq_sel=0x%x \n",  pm_read_reg(ZX_MATRIX_CRM_BASE+0x158) );
+	//pm_ram_log(" freq_sel=0x%x \n",  pm_read_reg(ZX_MATRIX_CRM_BASE+0x158) );
 	
 	#ifdef CONFIG_ZX_PM_DEBUG
 	pm_write_reg(AP_IDLE_SLEEP_STATUS_FLAG,0xff02);
diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/power/zx-pm.c b/ap/os/linux/linux-3.4.x/drivers/soc/zte/power/zx-pm.c
index f749f7c..8a731f1 100755
--- a/ap/os/linux/linux-3.4.x/drivers/soc/zte/power/zx-pm.c
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/power/zx-pm.c
@@ -265,7 +265,7 @@
 #ifdef CONFIG_ZX_RAM_CONSOLE
 	int i;
 
-	if((print_cnt++) % 100 == 0) {
+	if((print_cnt++) % 1 == 0) {
 		for(i=0; i<pm_idle_sram_cur_item; i++)
 		{
 			printk("%s", pm_idle_sram_buf[i].buf);
diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/rpm/at_io.c b/ap/os/linux/linux-3.4.x/drivers/soc/zte/rpm/at_io.c
index 8678a6a..5b76762 100755
--- a/ap/os/linux/linux-3.4.x/drivers/soc/zte/rpm/at_io.c
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/rpm/at_io.c
@@ -384,6 +384,30 @@
 extern int zDrvXp2xp_Cp2ApWakeupAp(void);
 #endif
 
+#ifdef _USE_VEHICLE_DC
+char *at_psm_filter;//="+CREG:+CGREG:+CEREG:^MODE:";
+module_param(at_psm_filter, charp, 0644);
+extern int pcu_CoreIsActive(int core);
+int atio_psm_check(const char *buffer)
+{
+	if(at_psm_filter && pcu_CoreIsActive(2) == 0 && buffer){
+		char prefix[128] = {0};
+		char *inform = strstr(buffer, ": ");
+		char *rsp_ok = strstr(buffer, "\r\nOK\r\n");
+		char *rsp_err = strstr(buffer, "ERROR");
+		
+		if(inform && rsp_ok == NULL && rsp_err == NULL){
+			if(inform - buffer - 1 < sizeof(prefix)){
+				strncpy(prefix, buffer + 2, inform - buffer - 1);
+				if(strstr(at_psm_filter, prefix))
+					return 1;
+			}
+		}
+	}
+	return 0;
+}
+#endif
+
 int PSCallBackEntry(unsigned char ch_ID, unsigned char *data, unsigned short dataLen, T_zAti2_CtrmChInd chInd)
 {
 	int ret = ATIO_SUCCESS;
@@ -445,6 +469,12 @@
 		//printk("err chid=%d cmd=%s!\n",ch_ID, data);
 		return ATIO_SUCCESS;
 	}
+#ifdef _USE_VEHICLE_DC
+	if(atio_psm_check(data)){
+		//printk("psm drop chid=%d cmd=%s!\n",ch_ID, data);
+		return ATIO_SUCCESS;
+	}
+#endif
 	//µ±Ç°ÎªATͨµÀµÄÊý¾Ý
 	if( (ZATI2_CHIND_AT == chInd) && ((rpmsg_channel = &rpmsg_sim_zx29.rpmsg_channel[chID-1]) != NULL) )
 	{
diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc-strategy.c b/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc-strategy.c
old mode 100644
new mode 100755
index e44578a..5b0568f
--- a/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc-strategy.c
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc-strategy.c
@@ -23,6 +23,7 @@
 #include <linux/cp_types.h>

 #include "NvParam_drv.h"

 #include "pub_debug_info.h"

+#include <mach/spinlock.h>

 

 /****************************************************************************

 *                                           Types

@@ -80,6 +81,16 @@
 	{"w up_tansmitepower2",  0},

 };

 

+

+u8 g_bit_probe[PROBE_MAX]={

+	BIT_PROBE_ADC1,

+	BIT_PROBE_ADC2,

+	BIT_PROBE_ADCRF,

+	BIT_PROBE_ADCRFd,

+	BIT_PROBE_RESEV3,

+	BIT_PROBE_RESEV4	

+};

+

 /*******************************************************************************

 *                                       ÒýÓÃÍⲿ±äÁ¿                                *

 *******************************************************************************/

@@ -103,8 +114,10 @@
 {

 	u32 temp;

 	

+	hw_spin_lock(REGLOCK_HWLOCK);

 	temp= (tsc_read_reg(regName)&(~(((0x1<<bitsLen)-0x1)<<bitsAddr)))|(bitsValue<<bitsAddr);

 	tsc_write_reg(regName,temp);

+	hw_spin_unlock(REGLOCK_HWLOCK);	

 }

 

 /*******************************************************************************

@@ -126,6 +139,181 @@
 }

 

 /*******************************************************************************

+ * Function: tsc_ProbeStrategy

+ * Description: 

+ * Parameters:

+ *   Input: 

+ *			

+

+ *   Output: N/A

+ * Returns: N/A

+

+ * Others:	//not use

+********************************************************************************/

+void tsctrl_probe_strategy(u32 probe_num,int temperature ) 

+{

+

+	int  temp1=(temperature-TsNvData.Threshods[probe_num].THROSHOLD_3);

+	int  temp2=(TsNvData.Threshods[probe_num].THROSHOLD_6-TsNvData.Threshods[probe_num].THROSHOLD_3);

+

+	if(temperature<=TsNvData.Threshods[probe_num].THROSHOLD_3){

+		temp_percent=0;	

+	}else if((temperature<=TsNvData.Threshods[probe_num].THROSHOLD_6)){

+		temp_percent=((100*temp1/temp2)/TEMP_PERCENT_INTERVAL)*TEMP_PERCENT_INTERVAL;

+	}else{

+		temp_percent=100;

+	}

+	

+	if(TsNvData.AdcRFd_En==0xB2){

+		/**/

+		if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_9)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN, g_bit_probe[probe_num] ,STRTEGY_START);

+		}	

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_7)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num] ,STRTEGY_START);

+		}

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_5)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, g_bit_probe[probe_num] ,STRTEGY_START);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);

+		}

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_3)

+		{   

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);

+		}

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_1)

+		{	

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);

+		}   

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_0)

+		{

+		}

+		else

+		{	

+

+		}

+

+		/**/

+		if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_0)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num], STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, g_bit_probe[probe_num], STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_STOP);

+		}

+		else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_2)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num], STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2 ,g_bit_probe[probe_num], STRTEGY_STOP);

+		}

+		else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_4)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP); 

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2,g_bit_probe[probe_num],STRTEGY_STOP);

+		}

+		else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_6)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,g_bit_probe[probe_num],STRTEGY_STOP);

+		}   

+		else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_8)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+		} 

+		else

+		{

+

+		}

+	}else{

+		/**/

+		if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_9)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN, g_bit_probe[probe_num] ,STRTEGY_START);

+		}

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_7)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num] ,STRTEGY_START);

+		}

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_5)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, g_bit_probe[probe_num] ,STRTEGY_START);

+			//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2, g_bit_probe[probe_num] ,STRTEGY_START);	   

+			tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_START);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);

+			//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);

+			tsctrl_set_strategy2Iram(TSCTRL_DFS, g_bit_probe[probe_num], STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

+		}

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_3)

+		{   

+			tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_START);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);

+			//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);	   

+			tsctrl_set_strategy2Iram(TSCTRL_DFS, g_bit_probe[probe_num], STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

+		}

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_1)

+		{	

+			tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_START);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);

+			//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_START);	  		

+		}   

+		else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_0)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_HOLD);

+		}

+		else

+		{	

+

+		}

+		/**/

+		if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_0)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num], STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, g_bit_probe[probe_num], STRTEGY_STOP);

+			//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2, g_bit_probe[probe_num], STRTEGY_STOP);	   	   	   

+			tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_STOP);

+			//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, g_bit_probe[probe_num], STRTEGY_STOP);	   

+			tsctrl_set_strategy2Iram(TSCTRL_DFS, g_bit_probe[probe_num], STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

+		}

+		else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_2)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num], STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2 ,g_bit_probe[probe_num], STRTEGY_STOP);

+			//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2 ,g_bit_probe[probe_num], STRTEGY_STOP);	   	   

+			tsctrl_set_strategy2Iram(TSCTRL_DFS, g_bit_probe[probe_num], STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

+		}

+		else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_4)

+		{

+

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2,g_bit_probe[probe_num],STRTEGY_STOP);

+			//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2,g_bit_probe[probe_num],STRTEGY_STOP);	   

+		}

+		else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_6)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+			tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,g_bit_probe[probe_num],STRTEGY_STOP);

+		}   

+		else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_8)

+		{

+			tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+		}  

+		else

+		{

+

+		}

+	}

+ 

+}

+

+/*******************************************************************************

  * Function: tsc_ProbeAdc1Strategy

  * Description: adc1̽ÕëµÄοزßÂÔ

  * Parameters:

@@ -139,99 +327,7 @@
 ********************************************************************************/

 void tsctrl_probe_adc1_strategy(u32 probe_num,int temperature ) 

 {	

-#if 1

-	int  temp1=(temperature-TsNvData.Threshods[probe_num].THROSHOLD_3);

-	int  temp2=(TsNvData.Threshods[probe_num].THROSHOLD_6-TsNvData.Threshods[probe_num].THROSHOLD_3);

-

-	if(temperature<=TsNvData.Threshods[probe_num].THROSHOLD_3){

-		temp_percent=0;	

-	} else if((temperature<=TsNvData.Threshods[probe_num].THROSHOLD_6)) {

-		temp_percent=((100*temp1/temp2)/TEMP_PERCENT_INTERVAL)*TEMP_PERCENT_INTERVAL;

-	} else {

-		temp_percent=100;

-	}

-

-	/**/

-   if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_9)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN, BIT_PROBE_ADC1 ,STRTEGY_START);

-   }

-   else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_7)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADC1 ,STRTEGY_START);

-   }

-   else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_5)

-   {

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, BIT_PROBE_ADC1 ,STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2, BIT_PROBE_ADC1 ,STRTEGY_START);	   

-	tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC1, STRTEGY_START);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADC1, STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADC1, STRTEGY_START);

-	tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADC1, STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

-   }

-   else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_3)

-   {   

-	tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC1, STRTEGY_START);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADC1, STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADC1, STRTEGY_START);	   

-	tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADC1, STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

-   }

-	else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_1)

-	{	

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC1, STRTEGY_START);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADC1, STRTEGY_START);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADC1, STRTEGY_START);	  		

-	}   

-	else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_0)

-   {

-		tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC1, STRTEGY_HOLD);

-   }

-   else

-   {	

-   

-   }

-	/**/

-   if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_0)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC1,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADC1, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, BIT_PROBE_ADC1, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2, BIT_PROBE_ADC1, STRTEGY_STOP);	   	   	   

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC1, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADC1, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADC1, STRTEGY_STOP);	   

-	  tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADC1, STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

-   }

-   else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_2)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC1,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADC1, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2 ,BIT_PROBE_ADC1, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2 ,BIT_PROBE_ADC1, STRTEGY_STOP);	   	   

-	  tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADC1, STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

-	}

-   else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_4)

-   {

-   

-	tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC1,STRTEGY_STOP);

-	tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,BIT_PROBE_ADC1,STRTEGY_STOP);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2,BIT_PROBE_ADC1,STRTEGY_STOP);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2,BIT_PROBE_ADC1,STRTEGY_STOP);	   

-   }

-   else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_6)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC1,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,BIT_PROBE_ADC1,STRTEGY_STOP);

-   }   

-   else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_8)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC1,STRTEGY_STOP);

-   }  

-   else

-   {

-

-   }

-#endif   

+	tsctrl_probe_strategy(probe_num, temperature);

 }

 

 /*******************************************************************************

@@ -248,99 +344,7 @@
 ********************************************************************************/

 void tsctrl_probe_adc2_strategy(u32 probe_num,int temperature ) 

 {

-#if 1

-	int  temp1=(temperature-TsNvData.Threshods[probe_num].THROSHOLD_3);

-	int  temp2=(TsNvData.Threshods[probe_num].THROSHOLD_6-TsNvData.Threshods[probe_num].THROSHOLD_3);

-

-	if(temperature<=TsNvData.Threshods[probe_num].THROSHOLD_3){

-		temp_percent=0;	

-	}else if((temperature<=TsNvData.Threshods[probe_num].THROSHOLD_6)){

-		temp_percent=((100*temp1/temp2)/TEMP_PERCENT_INTERVAL)*TEMP_PERCENT_INTERVAL;

-	}else{

-		temp_percent=100;

-	}

-

-	/**/

-   if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_9)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN, BIT_PROBE_ADC2 ,STRTEGY_START);

-   }

-   else  if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_7)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADC2 ,STRTEGY_START);

-   }

-   else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_5)

-   {

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, BIT_PROBE_ADC2 ,STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2, BIT_PROBE_ADC2 ,STRTEGY_START);	   

-	tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC2, STRTEGY_START);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADC2, STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADC2, STRTEGY_START);	   

-	tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADC2, STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

-   }

-   else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_3)

-   {   

-	tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC2, STRTEGY_START);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADC2, STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADC2, STRTEGY_START);	   

-	tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADC2, STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

-   }

-	else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_1)

-	{	

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC2, STRTEGY_START);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADC2, STRTEGY_START);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADC2, STRTEGY_START);	  		

-	}   

-	else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_0)

-   {

-		tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC2, STRTEGY_HOLD);

-   }

-   else

-   {	

-   

-   }

-	

-	/**/

-   if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_0)

-   {

-	  tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC2,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADC2, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, BIT_PROBE_ADC2, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2, BIT_PROBE_ADC2, STRTEGY_STOP);	   	   	   

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADC2, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADC2, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADC2, STRTEGY_STOP);	   

-	  tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADC2, STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

-   }

-   else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_2)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC2,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADC2, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2 ,BIT_PROBE_ADC2, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2 ,BIT_PROBE_ADC2, STRTEGY_STOP);	   	   

-	  tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADC2, STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

-   }

-   else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_4)

-   {

-	tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC2,STRTEGY_STOP);

-	tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,BIT_PROBE_ADC2,STRTEGY_STOP);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2,BIT_PROBE_ADC2,STRTEGY_STOP);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2,BIT_PROBE_ADC2,STRTEGY_STOP);	   

-   }

-   else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_6)

-   {

-   	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC2,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,BIT_PROBE_ADC2,STRTEGY_STOP);

-   }   

-   else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_8)

-   {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADC2,STRTEGY_STOP);

-   } 

-   else

-   {

-

-   }

-#endif   

+	tsctrl_probe_strategy(probe_num, temperature);

 }

 

 /*******************************************************************************

@@ -357,6 +361,24 @@
 ********************************************************************************/

 void tsctrl_probe_adcRf_strategy(u32 probe_num,int temperature ) 

 {

+	tsctrl_probe_strategy(probe_num, temperature);

+}

+

+

+/*******************************************************************************

+ * Function: tsc_ProbeAdcRfStrategy

+ * Description: adcRfd̽ÕëµÄοزßÂÔ

+ * Parameters:

+ *   Input: 

+ *			

+

+ *   Output: N/A

+ * Returns: N/A

+

+ * Others:	//not use

+********************************************************************************/

+void tsctrl_probe_adcRfd_strategy(u32 probe_num,int temperature ) 

+{

 #if 1

 	int  temp1=(temperature-TsNvData.Threshods[probe_num].THROSHOLD_3);

 	int  temp2=(TsNvData.Threshods[probe_num].THROSHOLD_6-TsNvData.Threshods[probe_num].THROSHOLD_3);

@@ -372,37 +394,29 @@
 	/**/

    if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_9)

    {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN, BIT_PROBE_ADCRF ,STRTEGY_START);

+	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN, g_bit_probe[probe_num] ,STRTEGY_START);

    }	

    else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_7)

    {

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADCRF ,STRTEGY_START);

+	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num] ,STRTEGY_START);

    }

    else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_5)

    {

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, BIT_PROBE_ADCRF ,STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2, BIT_PROBE_ADCRF ,STRTEGY_START);	   

-	tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADCRF, STRTEGY_START);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADCRF, STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADCRF, STRTEGY_START);	   

-	tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADCRF, STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

+	tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_START);

+	tsctrl_set_strategy2Iram(TSCTRL_DFS, g_bit_probe[probe_num], STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

    }

    else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_3)

    {   

-	tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADCRF, STRTEGY_START);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADCRF, STRTEGY_START);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADCRF, STRTEGY_START);	   

-	tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADCRF, STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

+	tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_START);

+	tsctrl_set_strategy2Iram(TSCTRL_DFS, g_bit_probe[probe_num], STRTEGY_START);//zDrvPow_SetArmPsCoreFreq(CLK312M);	   

    }

 	else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_1)

 	{	

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADCRF, STRTEGY_START);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADCRF, STRTEGY_START);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADCRF, STRTEGY_START);	  		

+	   tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_START);

 	}   

 	else if(temperature>=TsNvData.Threshods[probe_num].THROSHOLD_0)

    {

-		tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADCRF, STRTEGY_HOLD);

+		tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_HOLD);

    }

    else

    {	

@@ -412,38 +426,30 @@
 	/**/

    if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_0)

    {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADCRF,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADCRF, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2, BIT_PROBE_ADCRF, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2, BIT_PROBE_ADCRF, STRTEGY_STOP);	   	   	   

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, BIT_PROBE_ADCRF, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_DOWNRATE2, BIT_PROBE_ADCRF, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_DOWNRATE2, BIT_PROBE_ADCRF, STRTEGY_STOP);	   

-	  tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADCRF, STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

+	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num], STRTEGY_STOP);

+	   tsctrl_set_strategy2Iram(TSCTRL_PS_RATE, g_bit_probe[probe_num], STRTEGY_STOP);

+	  tsctrl_set_strategy2Iram(TSCTRL_DFS, g_bit_probe[probe_num], STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

    }

    else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_2)

    {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADCRF,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, BIT_PROBE_ADCRF, STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2 ,BIT_PROBE_ADCRF, STRTEGY_STOP);

-//	   tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2 ,BIT_PROBE_ADCRF, STRTEGY_STOP);	   	   

-	  tsctrl_set_strategy2Iram(TSCTRL_DFS, BIT_PROBE_ADCRF, STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

+	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT, g_bit_probe[probe_num], STRTEGY_STOP);

+	  tsctrl_set_strategy2Iram(TSCTRL_DFS, g_bit_probe[probe_num], STRTEGY_STOP);// zDrvPow_SetArmPsCoreFreq(CLK624M);

    }

    else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_4)

    {

-  	tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADCRF,STRTEGY_STOP); 

-	tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,BIT_PROBE_ADCRF,STRTEGY_STOP);

-	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_LTE_UPTRANSIMITPOWER2,BIT_PROBE_ADCRF,STRTEGY_STOP);

-//	tsctrl_set_strategy2Iram(TSCTRL_LIMIT_W_UPTRANSIMITPOWER2,BIT_PROBE_ADCRF,STRTEGY_STOP);	   

+  	tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP); 

+	tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,g_bit_probe[probe_num],STRTEGY_STOP);

    }

    else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_6)

    {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADCRF,STRTEGY_STOP);

-	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,BIT_PROBE_ADCRF,STRTEGY_STOP);

+	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

+	   tsctrl_set_strategy2Iram(TSCTRL_PS_ANYRESIDENT,g_bit_probe[probe_num],STRTEGY_STOP);

    }   

    else if(temperature<TsNvData.Threshods[probe_num].THROSHOLD_8)

    {

-	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,BIT_PROBE_ADCRF,STRTEGY_STOP);

+	   tsctrl_set_strategy2Iram(TSCTRL_SHUTDOWN,g_bit_probe[probe_num],STRTEGY_STOP);

    } 

    else

    {

@@ -452,6 +458,7 @@
 #endif   

 }

 

+

 /*******************************************************************************

  * Function: tsc_RefSetProbeStr

  * Description: ¸ù¾Ý̽ÕëºÅµ÷ÓÃÏàÓ¦µÄ²ßÂÔº¯Êý

@@ -487,7 +494,7 @@
 	g_probe_strategy[PROBE_ADC1]= tsctrl_probe_adc1_strategy;

 	g_probe_strategy[PROBE_ADC2]= tsctrl_probe_adc2_strategy;

 	g_probe_strategy[PROBE_ADCRF]= tsctrl_probe_adcRf_strategy;

-	

+	g_probe_strategy[PROBE_ADCRFd]= tsctrl_probe_adcRfd_strategy;

 }

 

 /*******************************************************************************

@@ -540,18 +547,23 @@
 ********************************************************************************/

 static void tsctrl_print_temp(void)

 {

-		if(g_adc1_flag==1){

-			sc_debug_info_record(MODULE_ID_AP_TSC, "temp1:%d\n", zx_read_reg(TSCTRL_TEMPADC1) );

-			printk( "temp1:%d\n", zx_read_reg(TSCTRL_TEMPADC1));

-		}

-		if(g_adc2_flag==1){

-			sc_debug_info_record(MODULE_ID_AP_TSC, "temp2:%d\n", zx_read_reg(TSCTRL_TEMPADC2) );

-			printk( "temp2:%d\n", zx_read_reg(TSCTRL_TEMPADC2));

-		}

-		if(g_adc3_flag==1){

-			sc_debug_info_record(MODULE_ID_AP_TSC, "tempRf:%d\n", zx_read_reg(TSCTRL_TEMPADCRF) );

-			printk( "tempRf:%d\n", zx_read_reg(TSCTRL_TEMPADCRF));

-		}

+	if(g_adc1_flag==1){

+		sc_debug_info_record(MODULE_ID_AP_TSC, "temp1:%d\n", zx_read_reg(TSCTRL_TEMPADC1) );

+		printk( "temp1:%d\n", zx_read_reg(TSCTRL_TEMPADC1));

+	}

+	if(g_adc2_flag==1){

+		sc_debug_info_record(MODULE_ID_AP_TSC, "temp2:%d\n", zx_read_reg(TSCTRL_TEMPADC2) );

+		printk( "temp2:%d\n", zx_read_reg(TSCTRL_TEMPADC2));

+	}

+	if(g_adc3_flag==1){

+		sc_debug_info_record(MODULE_ID_AP_TSC, "tempRf:%d\n", zx_read_reg(TSCTRL_TEMPADCRF) );

+		printk( "tempRf:%d\n", zx_read_reg(TSCTRL_TEMPADCRF));

+	}

+	if(TsNvData.AdcRFd_En==0xB2){		

+		sc_debug_info_record(MODULE_ID_AP_TSC, "tempRfd:%d\n", zx_read_reg(TSCTRL_TEMPADCRFd) );

+		printk( "tempRfd:%d\n", zx_read_reg(TSCTRL_TEMPADCRFd));

+	}		

+	

 }

 /*******************************************************************************

  * Function: tsctrl_set_strategy

@@ -752,8 +764,8 @@
 		}	

 

 		if(g_tsc_print_log_debug) {

-			tsc_print_log("0:stop;1:start;2:hold; reg32(TSCTRL_PS)=0x%x,reg32(PS_CORE_SEL_REG)=0x%x\n",tsc_read_reg(TSCTRL_PS),tsc_read_reg(PS_CORE_SEL_REG));		

-			tsc_print_log("bit1:limitLtedownrate2;bit3:limitWdownrate2;bit5:limitLteUptransmitrate2;bit7:limitWUptransmitrate2;reg32(TSCTRL_PHY)=0x%x.\n\n",tsc_read_reg(TSCTRL_PHY)); 

+			tsc_print_log("[0:stop;1:start;2:hold][bit11~8:ps_dfs,bit7~4:anyregister,bit3~0:ps_rate] reg32(TSCTRL_PS)=0x%x,reg32(PSCORE_SEL)=0x%x(1:624M;2:312M)\n",tsc_read_reg(TSCTRL_PS),tsc_read_reg(PS_CORE_SEL_REG));		

+			tsc_print_log("]bit1:limitLtedownrate2;bit3:limitWdownrate2;bit5:limitLteUptransmitrate2;bit7:limitWUptransmitrate2] reg32(TSCTRL_PHY)=0x%x.\n\n",tsc_read_reg(TSCTRL_PHY)); 

 		}

 	}

 	else

@@ -886,6 +898,16 @@
 				

 				tsctrl_set_probe_strategy(probe_num, temperature );

 			}

+			if(TsNvData.AdcRFd_En==0xB2){		

+				/*»ñÈ¡PROBE_ADCRFÐÅÏ¢*/

+				probe_num= TsDataValue[PROBE_ADCRFd][TS_MEMBER_PROBE];

+				temperature= TsDataValue[PROBE_ADCRFd][TS_MEMBER_TEMP];

+				//tsc_set_temp_data_info(probe_num);

+				if(g_tsc_print_log_debug)

+					tsc_print_log("set strategy for probe%d\n", probe_num);	

+				

+				tsctrl_set_probe_strategy(probe_num, temperature );

+			}

 			

 		}else{

 			if(g_tsc_print_log_debug)

diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc.c b/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc.c
old mode 100644
new mode 100755
index e695587..33deebc
--- a/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc.c
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc.c
@@ -26,11 +26,14 @@
 #include "NvParam_drv.h"

 #include "pub_debug_info.h"

 

-#ifdef RFC_DCXO_EN

+#ifdef RFC_DCXO_EN //jingti

 #define IRAM_TEMPCOMP_DAC (IRAM_BASE_ADDR_SLAVE_AFC+0x8)  //high16bit: the ADC value of temp	

 #else

-#define IRAM_TEMPCOMP_DAC (IRAM_BASE_ADDR_PUB_RF+64)//the ADC value of temp

+#define IRAM_TEMPCOMP_DAC (IRAM_BASE_ADDR_PUB_RF+0x40)//the ADC value of temp

 #endif

+#define IRAM_TEMPCOMP_RFDDAC (IRAM_BASE_ADDR_SLAVE_AFC+0x8)  //high16bit: the ADC value of temp	

+#define IRAM_TEMPCOMP_RFDTEMP (IRAM_BASE_ADDR_SLAVE_AFC+0xc)  //temp of adcrfd

+

 

 volatile u32 g_adc1_flag = 0;//¨¨?adc1¨®?¨®¨²¨¬?2apa2¨¤???¨¨¡ê??¨°g_adc1_flag=1

 volatile u32 g_adc2_flag = 0;//¨¨?adc2¨®?¨®¨²¨¬?2apa2¨¤???¨¨¡ê??¨°g_adc2_flag=1

@@ -38,9 +41,12 @@
 

 struct timer_list timer_tsc;

 

-s32 g_tsc_print_log_debug=0;

 u32 g_test_addr0=0;

 u32 g_test_addr1=0;

+u32 g_test_addr2=IRAM_TEMPCOMP_DAC;

+u32 g_test_addr3=IRAM_TEMPCOMP_RFDTEMP;

+

+s32 g_tsc_print_log_debug=0;

 

 /*

 1cnt is 20s

@@ -52,9 +58,6 @@
 unsigned int tsc_record_flag= 0; 

 module_param(tsc_record_flag, uint, 0644);

 

-extern int ts_temp_value_table[TS_ADC_TEMP_NUMBER][TS_ADC_TEMP_VOLTAGE_NUMBER];

-extern volatile u32 ts_adc_flag;

-

 int g_ts_data_info[PROBE_NUM][PROBE_INFO] = {0};

 

 static struct mutex tsc_mutexId;

@@ -65,6 +68,51 @@
 

 struct kobject *zx_tsc_kobj;

 

+extern int ts_temp_value_table[TS_ADC_TEMP_NUMBER][TS_ADC_TEMP_VOLTAGE_NUMBER];

+extern volatile u32 ts_adc_flag;

+

+int  ts_temp_value_tableRfd[TS_ADC_TEMP_NUMBER][TS_ADC_TEMP_VOLTAGE_NUMBER]={

+{

+ -45,-44,-43,-42,-41,		

+ -40,-39,-38,-37,-36, -35,-34,-33,-32,-31,		

+ -30,-29,-28,-27,-26, -25,-24,-23,-22,-21,		

+ -20,-19,-18,-17,-16, -15,-14,-13,-12,-11,		

+ -10,-9,-8,-7,-6, -5,-4,-3,-2,-1,	

+ 0,1,2,3,4,5,6,7,8,9,

+ 10,11,12,13,14,15,16,17,18,19,

+ 20,21,22,23,24,25,26,27,28,29,	

+ 30,31,32,33,34,35,36,37,38,39,

+ 40,41,42,43,44,45,46,47,48,49,

+ 50,51,52,53,54,55,56,57,58,59,

+ 60,61,62,63,64,65,66,67,68,69,

+ 70,71,72,73,74,75,76,77,78,79,

+ 80,81,82,83,84,85,86,87,88,89,

+ 90,91,92,93,94,95,96,97,98,99,

+ 100,101,102,103,104,105,106,107,108,109,

+ 110,111,112,113,114,115,116,117,118,119,

+ 120,121,122,123,124,125},

+

+{

+7598,7592,7586,7579,7572,

+7564,7556,7547,7537,7527,7516,7505,7493,7480,7466,

+7451,7436,7420,7402,7384,7365,7344,7323,7300,7277,

+7252,7225,7198,7169,7139,7107,7074,7040,7004,6967,

+6928,6888,6846,6803,6758,6712,6664,6615,6564,6512,

+6458,6403,6347,6290,6231,6171,6110,6048,5984,5920,

+5855,5790,5723,5656,5588,5520,5452,5383,5314,5245,

+5176,5107,5038,4969,4901,4833,4765,4698,4632,4566,

+4501,4438,4376,4313,4251,4188,4131,4073,4016,3958,

+3901,3849,3797,3745,3693,3641,3595,3549,3502,3456,

+3410,3370,3330,3289,3249,3209,3174,3139,3104,3069,

+3034,3004,2974,2943,2913,2883,2857,2832,2806,2781,

+2755,2733,2711,2690,2668,2646,2627,2609,2590,2572,

+2553,2537,2521,2506,2490,2474,2461,2447,2434,2420,

+2407,2396,2385,2373,2362,2351,2341,2332,2322,2313,

+2303,2295,2287,2278,2270,2262,2255,2248,2241,2234,

+2227,2221,2215,2210,2204,2198,2193,2188,2183,2178,

+2173,2169,2164,2160,2155,2151 }

+};

+

 #define zte_tsc_attr(_name) \

 static struct kobj_attribute _name##_attr = 	\

 {                           \

@@ -100,7 +148,7 @@
 #ifndef USE_CPPS_KO

 extern UINT32 zOss_NvItemRead(UINT32 NvItemID, UINT8 * NvItemData, UINT32 NvItemLen);

 #endif

-static int tsc_adcRf_read(void);

+//static int tsc_adcRf_read(void);

 

 void tsc_get_tempPercent(unsigned int *percent)

 {

@@ -178,7 +226,7 @@
 	 for(i=0;i<PROBE_MAX; i++)

 		 tsc_tempValue[i]= zx_read_reg(TSCTRL_TEMPADC1 + 0x4 * i);

  

-	tsc_tempValue[PROBE_ADCRF]= tsc_adcRf_read();

+	//tsc_tempValue[PROBE_ADCRF]= tsc_adcRf_read();  //test

 	return tsc_tempValue;

  }

 

@@ -316,16 +364,21 @@
 

  * Others:	//not use

 ********************************************************************************/

-static void tsc_get_probe_adcvalue(u32 adcValue, int *temp) 

+static void tsc_get_probe_adcvalue(u32 adcValue, int *temp, int is_adcRfd) 

 {

 	u32 index = 0;

-

-	index= tsc_nearest(ts_temp_value_table[TS_TEMP_VOLTAGE_TABLE_NUMBER],adcValue,TS_TEMP_NUMBER_SMALLEST,TS_TEMP_NUMBER_BIGGEST-1);

-	*temp= ts_temp_value_table[TS_TEMP_VALUE_TABLE_NUMBER][index];

+	if(is_adcRfd){	

+		index= tsc_nearest(ts_temp_value_tableRfd[TS_TEMP_VOLTAGE_TABLE_NUMBER],adcValue,TS_TEMP_NUMBER_SMALLEST,TS_TEMP_NUMBER_BIGGEST-1);

+		*temp= ts_temp_value_tableRfd[TS_TEMP_VALUE_TABLE_NUMBER][index];

+	}

+	else

+	{

+		index= tsc_nearest(ts_temp_value_table[TS_TEMP_VOLTAGE_TABLE_NUMBER],adcValue,TS_TEMP_NUMBER_SMALLEST,TS_TEMP_NUMBER_BIGGEST-1);

+		*temp= ts_temp_value_table[TS_TEMP_VALUE_TABLE_NUMBER][index];

+	}

+		

 }

 

-#define ADCRF_SEARCH_TEMP		1

-

 static u32 tsc_dac_read(u32 addr)

 {

 	u32	dac;

@@ -338,7 +391,7 @@
 

 	return dac;

 }

-

+#if 0

 static int tsc_adcRf_read(void)

 {

 	u32	adcRfValue;

@@ -349,35 +402,37 @@
 

 	return tempRf;

 }

-

+#endif

 static void tsc_temp_detect(void * arg)

 {

 	u32 adc1Value = 0;

-	u32 adc2Value = 0;

-

 	int temp1 = 0;

+	u32 adc2Value = 0;

 	int temp2 = 0;

-

-#if ADCRF_SEARCH_TEMP

 	u32 adcRfValue = 0;	

 	int tempRf = 0;

-#endif

+	u32 adcRfdValue = 0;	

+	int tempRfd = 0;

+

 

 	while(1) {

 		if(g_adc1_flag==1){

 			adc1Value = get_adc1_voltage();

-			tsc_get_probe_adcvalue(adc1Value,&temp1);

+			tsc_get_probe_adcvalue(adc1Value,&temp1, 0);

 		}

 		if(g_adc2_flag==1){

 			adc2Value = get_adc2_voltage();

-			tsc_get_probe_adcvalue(adc2Value,&temp2);

+			tsc_get_probe_adcvalue(adc2Value,&temp2, 0);

 		}

-#if ADCRF_SEARCH_TEMP	

 		if(g_adc3_flag==1){

 			adcRfValue = tsc_dac_read(IRAM_TEMPCOMP_DAC); 

-			tsc_get_probe_adcvalue(adcRfValue,&tempRf);

+			tsc_get_probe_adcvalue(adcRfValue,&tempRf, 0);

 		}

-#endif

+		if(TsNvData.AdcRFd_En==0xB2){	

+			adcRfdValue =(zx_read_reg(IRAM_TEMPCOMP_RFDDAC)&0xffff0000)>>16; 

+			tsc_get_probe_adcvalue(adcRfdValue,&tempRfd, 1);

+			//tempRfd = zx_read_reg(IRAM_TEMPCOMP_RFDTEMP)>>10; 

+		}

 

 		tsc_lock();

 

@@ -387,21 +442,33 @@
 		g_ts_data_info[PROBE_ADC2][TS_MEMBER_PROBE] = PROBE_ADC2;

 		g_ts_data_info[PROBE_ADC2][TS_MEMBER_TEMP] = temp2;

 		g_ts_data_info[PROBE_ADCRF][TS_MEMBER_PROBE] = PROBE_ADCRF;

-#if ADCRF_SEARCH_TEMP

 		g_ts_data_info[PROBE_ADCRF][TS_MEMBER_TEMP] =tempRf;	

-#else

 		/*zx_read_reg(IRAM_BASE_ADDR_SLAVE_AFC+0xc)>>10 is the temprature of rf*/

-		g_ts_data_info[PROBE_ADCRF][TS_MEMBER_TEMP] = zx_read_reg(IRAM_BASE_ADDR_SLAVE_AFC+0xc)>>10;	

-#endif

+		//g_ts_data_info[PROBE_ADCRF][TS_MEMBER_TEMP] = zx_read_reg(IRAM_TEMPCOMP_RFDTEMP)>>10;	

+

+		if(TsNvData.AdcRFd_En==0xB2){		

+			g_ts_data_info[PROBE_ADCRFd][TS_MEMBER_PROBE] = PROBE_ADCRFd;

+			g_ts_data_info[PROBE_ADCRFd][TS_MEMBER_TEMP] = tempRfd;

+		}	

+		

 		/*set tempvalue to iram to ap*/	

 		tsc_write_reg(TSCTRL_TEMPADC1,temp1);

 		tsc_write_reg(TSCTRL_TEMPADC2,temp2);

 		tsc_write_reg(TSCTRL_TEMPADCRF, g_ts_data_info[PROBE_ADCRF][TS_MEMBER_TEMP]);

+		tsc_write_reg(TSCTRL_TEMPADCRFd, g_ts_data_info[PROBE_ADCRFd][TS_MEMBER_TEMP]);

 

 		tsc_unlock();		

 

 		if(g_tsc_print_log_debug)

-			tsc_print_log("adc1/adc2 value adc1Value=%d,adc2Value=%d,adcRfValue=%d,temp1 = %d.temp2 = %d.temprf = %d.\n",adc1Value,adc2Value,adcRfValue,temp1,temp2, g_ts_data_info[PROBE_ADCRF][TS_MEMBER_TEMP]);

+		{

+			if(TsNvData.AdcRFd_En==0xB2){		

+				tsc_print_log(" adc1Value=%d,adc2Value=%d,adcRfValue=%d,adcRfdValue=%d,temp1 = %d.temp2 = %d.temprf = %d.temprfd = %d\n",

+				adc1Value,adc2Value,adcRfValue,adcRfdValue,temp1,temp2, g_ts_data_info[PROBE_ADCRF][TS_MEMBER_TEMP], g_ts_data_info[PROBE_ADCRFd][TS_MEMBER_TEMP] );

+			}else{

+				tsc_print_log("adc1Value=%d,adc2Value=%d,adcRfValue=%d,temp1 = %d.temp2 = %d.temprf = %d.\n",

+				adc1Value,adc2Value,adcRfValue,temp1,temp2, g_ts_data_info[PROBE_ADCRF][TS_MEMBER_TEMP] );

+			}

+		}

 

 		if((((tsc_record_time_cnt*TS_POLLING_TIME_S)%tsc_record_time)==0) && tsc_record_flag)

 		{

@@ -417,6 +484,10 @@
 				sc_debug_info_record(MODULE_ID_AP_TSC, "tempRf:%d\n", zx_read_reg(TSCTRL_TEMPADCRF) );

 				printk( "tempRf:%d\n", zx_read_reg(TSCTRL_TEMPADCRF));

 			}

+			if(TsNvData.AdcRFd_En==0xB2){			

+				sc_debug_info_record(MODULE_ID_AP_TSC, "tempRfd:%d\n", zx_read_reg(TSCTRL_TEMPADCRFd) );

+				printk( "tempRfd:%d\n", zx_read_reg(TSCTRL_TEMPADCRFd));

+			}	

 		}

 		tsc_record_time_cnt++;

 		

diff --git a/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc.h b/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc.h
old mode 100644
new mode 100755
index 2495258..6c78c59
--- a/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc.h
+++ b/ap/os/linux/linux-3.4.x/drivers/soc/zte/tsc/zx-tsc.h
@@ -21,8 +21,8 @@
 {
 	PROBE_ADC1 = 0,
 	PROBE_ADC2,
-	PROBE_ADCRF,	
-	PROBE_RESEV2,
+	PROBE_ADCRF,	//get rf temp
+	PROBE_ADCRFd,   //get dbb temp
 	PROBE_RESEV3,
 	PROBE_RESEV4,
 	
@@ -151,7 +151,7 @@
 #define  BIT_PROBE_ADC1  				(PROBE_ADC1*BITS_FOR_PROBES)
 #define  BIT_PROBE_ADC2  				(PROBE_ADC2*BITS_FOR_PROBES)
 #define  BIT_PROBE_ADCRF  				(PROBE_ADCRF*BITS_FOR_PROBES)
-#define  BIT_PROBE_RESEV2  				(PROBE_RESEV2*BITS_FOR_PROBES)
+#define  BIT_PROBE_ADCRFd   				(PROBE_ADCRFd*BITS_FOR_PROBES)
 #define  BIT_PROBE_RESEV3  				(PROBE_RESEV3*BITS_FOR_PROBES)
 #define  BIT_PROBE_RESEV4  				(PROBE_RESEV4*BITS_FOR_PROBES)
 
@@ -159,7 +159,7 @@
 #define  TSCTRL_TEMPADC1					(IRAM_TSC_BASE+0x100)  /*temp adc1*/
 #define  TSCTRL_TEMPADC2					(IRAM_TSC_BASE+0x104)  /*temp adc2*/
 #define  TSCTRL_TEMPADCRF					(IRAM_TSC_BASE+0x108)  /*temp adcrf*/
-#define  TSCTRL_TEMPREV2					(IRAM_TSC_BASE+0x10c)  /*temp rev2*/
+#define  TSCTRL_TEMPADCRFd					(IRAM_TSC_BASE+0x10c)  /*temp rev2*/
 #define  TSCTRL_TEMPREV3					(IRAM_TSC_BASE+0x110)  /*temp rev3*/
 #define  TSCTRL_TEMPREV4					(IRAM_TSC_BASE+0x114)  /*temp rev4*/
 #define  TSCTRL_DETECT_EN					(IRAM_TSC_BASE+0x118)  /*TsNvData.DetectEn*/
diff --git a/ap/os/linux/linux-3.4.x/drivers/staging/Kconfig b/ap/os/linux/linux-3.4.x/drivers/staging/Kconfig
index a774cd5..a17745c 100755
--- a/ap/os/linux/linux-3.4.x/drivers/staging/Kconfig
+++ b/ap/os/linux/linux-3.4.x/drivers/staging/Kconfig
@@ -141,5 +141,6 @@
 source "drivers/staging/voicebufferdrv/Kconfig"
 
 source "drivers/staging/audiomixdrv/Kconfig"
+source "drivers/staging/plat_test/Kconfig"
 
 endif # STAGING
diff --git a/ap/os/linux/linux-3.4.x/drivers/staging/Makefile b/ap/os/linux/linux-3.4.x/drivers/staging/Makefile
index 45d27c2..a935c69 100755
--- a/ap/os/linux/linux-3.4.x/drivers/staging/Makefile
+++ b/ap/os/linux/linux-3.4.x/drivers/staging/Makefile
@@ -63,4 +63,5 @@
 obj-$(CONFIG_AMR_DRV)		+= amrdrv/
 obj-$(CONFIG_VOICE_DRV)		+= voicedrv/
 obj-$(CONFIG_VOICE_BUFFER_DRV)		+= voicebufferdrv/
-obj-$(CONFIG_AUDIOMIX_DRV)		    += audiomixdrv/
\ No newline at end of file
+obj-$(CONFIG_AUDIOMIX_DRV)		    += audiomixdrv/
+obj-$(CONFIG_PLAT_TEST)         += plat_test/
diff --git a/ap/os/linux/linux-3.4.x/drivers/staging/android/binder.c b/ap/os/linux/linux-3.4.x/drivers/staging/android/binder.c
index aab6c15..52ecdeb 100755
--- a/ap/os/linux/linux-3.4.x/drivers/staging/android/binder.c
+++ b/ap/os/linux/linux-3.4.x/drivers/staging/android/binder.c
@@ -3298,11 +3298,6 @@
 	struct binder_proc *proc = filp->private_data;
 	debugfs_remove(proc->debugfs_entry);
 	binder_defer_work(proc, BINDER_DEFERRED_RELEASE);
-#ifdef CONFIG_ANDROID_BINDER_RPC	
-	if(proc == rpc_own_proc) {
-		binder_deinit_rpc();
-	}
-#endif	
 
 	return 0;
 }
@@ -3436,7 +3431,45 @@
 		     proc->pid, threads, nodes, incoming_refs, outgoing_refs,
 		     active_transactions, buffers, page_count);
 
-	kfree(proc);
+	
+#ifdef CONFIG_ANDROID_BINDER_RPC	
+	if(NULL != binder_get_rpcproc()) {
+		struct binder_proc *itr;
+		struct hlist_node *pos;
+
+		int count_proc = 0;
+		int count_thread = 0;
+		static int is_only_rpcproc = 0;
+		static int is_only_rpcthread = 0;
+
+		hlist_for_each_entry(itr, pos, &binder_procs, proc_node) {
+			count_proc ++;		  
+		}
+		if(1 == count_proc) {
+		  	is_only_rpcproc = 1;
+		}
+
+		if(rpc_own_proc == proc) {
+			for (n = rb_first(&proc->threads); n != NULL; n = rb_next(n)) {
+				count_thread ++;				  
+			}
+			if(0 == count_thread) {
+				is_only_rpcthread = 1;
+			}
+		} 	  
+		binder_debug(BINDER_DEBUG_OPEN_CLOSE,"%s %d:%d",__FUNCTION__,is_only_rpcproc,is_only_rpcthread);
+		/*Only rpcproc,deinit it*/
+		if(1 == is_only_rpcproc && 1 == is_only_rpcthread) {	
+			binder_unlock(__func__);
+			binder_deinit_rpc();
+			
+			is_only_rpcproc = 0;
+			is_only_rpcthread = 0;
+			binder_lock(__func__);
+		}
+	}
+#endif	
+	kfree(proc);	
 }
 
 static void binder_deferred_func(struct work_struct *work)
@@ -3466,6 +3499,13 @@
 			if (files)
 				proc->files = NULL;
 		}
+#ifdef CONFIG_ANDROID_BINDER_RPC
+		if(NULL == binder_get_rpcproc()) {
+			binder_debug(BINDER_DEBUG_OPEN_CLOSE,"%s forbidden work %d.rpc_proc have been released.",__FUNCTION__, defer);
+			binder_unlock(__func__);
+			return;
+		}
+#endif	
 
 		if (defer & BINDER_DEFERRED_FLUSH)
 			binder_deferred_flush(proc);
diff --git a/ap/os/linux/linux-3.4.x/drivers/staging/android/binder_rpc.c b/ap/os/linux/linux-3.4.x/drivers/staging/android/binder_rpc.c
index 1dc410e..877a5e4 100755
--- a/ap/os/linux/linux-3.4.x/drivers/staging/android/binder_rpc.c
+++ b/ap/os/linux/linux-3.4.x/drivers/staging/android/binder_rpc.c
@@ -406,6 +406,7 @@
 

 		brpc_chn_recv_proc(&data);							

 	}

+	brpc_err("the rpmsg channel loop stop!\n");

 	

 	return 0;

 }

@@ -738,10 +739,10 @@
 	pbrpc_ctx->agent_thread.bstop = 1;

 	

 	if(pbrpc_ctx->prpc_file) {			

-		filp_close(pbrpc_ctx->prpc_file, current->files);		

+		filp_close(pbrpc_ctx->prpc_file, NULL);		

 

 		if(NULL != vma) {

-			do_munmap(current->mm, vma->vm_start, vma->vm_end - vma->vm_start);

+			do_munmap(vma->vm_mm, vma->vm_start, vma->vm_end - vma->vm_start);

 		}

 	}

 	

diff --git a/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/Kconfig b/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/Kconfig
new file mode 100755
index 0000000..685c696
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/Kconfig
@@ -0,0 +1,5 @@
+config PLAT_TEST
+    tristate "PLAT TEST module"
+    default m
+    help
+      This is a simple Plat Test module.
diff --git a/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/Makefile b/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/Makefile
new file mode 100755
index 0000000..ffaf29a
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_PLAT_TEST)	+= plattest.o
diff --git a/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/plattest.c b/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/plattest.c
new file mode 100755
index 0000000..c7d9cf0
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/staging/plat_test/plattest.c
@@ -0,0 +1,59 @@
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/kthread.h>
+#include <linux/delay.h>
+
+static char *module_type = "default";
+
+module_param(module_type, charp, 0644);
+MODULE_PARM_DESC(module_type, "A custom string parameter");
+
+
+static void syslog_test(void)
+{
+	printk(KERN_EMERG   "syslogtest: this is KERN_EMERG   message\n");
+	printk(KERN_ALERT   "syslogtest: this is KERN_ALERT   message\n");
+	printk(KERN_CRIT    "syslogtest: this is KERN_CRIT    message\n");
+	printk(KERN_ERR     "syslogtest: this is KERN_ERR     message\n");
+	printk(KERN_WARNING "syslogtest: this is KERN_WARNING message\n");
+	printk(KERN_NOTICE  "syslogtest: this is KERN_NOTICE  message\n");
+	printk(KERN_INFO    "syslogtest: this is KERN_INFO    message\n");
+	printk(KERN_DEBUG   "syslogtest: this is KERN_DEBUG   message\n");
+}
+
+static int plattest_func(void) {
+	
+	if (!strncmp(module_type, "syslogtest", strlen("syslogtest")))
+	{
+		syslog_test();
+	}
+	else if (!strncmp(module_type, "default", strlen("default")))
+	{
+		printk(KERN_INFO "please set module_type value\n");
+	}
+
+    return 0;
+}
+
+static int __init plattest_module_init(void) {
+    printk(KERN_INFO "Plat Test enter\n");
+	plattest_func();	
+
+    return 0;
+}
+
+static void __exit plattest_module_exit(void) {
+	printk(KERN_INFO "Plat Test exit\n");
+}
+
+module_init(plattest_module_init);
+module_exit(plattest_module_exit);
+
+MODULE_AUTHOR("GUOW");
+MODULE_DESCRIPTION("plat test for sc");
+MODULE_LICENSE("GPL");
+
+
+
+
diff --git a/ap/os/linux/linux-3.4.x/drivers/usb/dwc_otg/dwc_otg_chg_identify.c b/ap/os/linux/linux-3.4.x/drivers/usb/dwc_otg/dwc_otg_chg_identify.c
old mode 100644
new mode 100755
index a771aa7..82f129a
--- a/ap/os/linux/linux-3.4.x/drivers/usb/dwc_otg/dwc_otg_chg_identify.c
+++ b/ap/os/linux/linux-3.4.x/drivers/usb/dwc_otg/dwc_otg_chg_identify.c
@@ -181,7 +181,14 @@
 int detected_charger(void)
 {
 #ifdef CONFIG_DWC_DEVICE_GPIO_CHARGER
+
+//for mdl,enum usb when poweron,maybe no gpio detect	
+#ifndef _USE_VEHICLE_DC_REF
 	return 1;
+#else
+//others ,depends gpio detect
+	return usb_plugin;
+#endif
 #endif
 	if(detect_fn == NULL)
 		return 1;
@@ -1043,12 +1050,13 @@
 /*GPIOºÍÍⲿÖжϺŸù¾ÝÏîĿʵ¼ÊÇé¿öÐÞ¸Ä
  *´Ë´¦Îª²Î¿¼´úÂë
  */
+//xf.li@20230909 modify for usb hot-plug start
  #ifdef _USE_VEHICLE_DC_REF
-#define USB_GPIO ZX29_GPIO_54
-#define USB_GPIO_FUNC_GPIO GPIO54_GPIO54
-#define USB_GPIO_FUNC_EXT_INT GPIO54_EXT_INT7
-#define USB_DT_INT  PCU_EX7_INT
- 
+#define USB_GPIO ZX29_GPIO_125
+#define USB_GPIO_FUNC_GPIO GPIO125_GPIO125
+#define USB_GPIO_FUNC_EXT_INT GPIO125_EXT_INT14
+#define USB_DT_INT  PCU_EX14_INT
+//xf.li@20230909 modify for usb hot-plug end
  #else
 #define USB_GPIO ZX29_GPIO_52
 #define USB_GPIO_FUNC_GPIO GPIO52_GPIO52
diff --git a/ap/os/linux/linux-3.4.x/drivers/usb/gadget/usb_netlink.c b/ap/os/linux/linux-3.4.x/drivers/usb/gadget/usb_netlink.c
index b2f470f..15de73e 100755
--- a/ap/os/linux/linux-3.4.x/drivers/usb/gadget/usb_netlink.c
+++ b/ap/os/linux/linux-3.4.x/drivers/usb/gadget/usb_netlink.c
@@ -35,6 +35,7 @@
 	int switch_mode = 0;

 	int simulate_plug = 0;

 	struct work_struct switch_usbmode;

+extern void usb_plug_notify_ap(e_usb_rpmsg_cmd_type plug_type);

 

 #endif

 

@@ -823,6 +824,9 @@
 			strcpy(buf,"USBEVENT=usb_device_in");

 			action = KOBJ_ADD;

 			usb_plug = 1;

+#ifdef _USE_VEHICLE_DC			

+			usb_plug_notify_ap(USB_RPMSG_USB_PLUG_IN);

+#endif

 			usb_record_dbginfo(USB_DEV_PLUGIN, 0, 0);

 			break;

 

@@ -832,6 +836,9 @@
 			strcpy(buf,"USBEVENT=usb_device_out");

 			action = KOBJ_REMOVE;

 			usb_plug = 0;

+#ifdef _USE_VEHICLE_DC

+			usb_plug_notify_ap(USB_RPMSG_USB_PLUG_OUT);

+#endif

 			usb_record_dbginfo(USB_DEV_PLUGOUT, 0, 0);

 			break;

 		case USB_CHARGER_PLUGIN:

diff --git a/ap/os/linux/linux-3.4.x/drivers/usb/gadget/usb_rpmsg_server.c b/ap/os/linux/linux-3.4.x/drivers/usb/gadget/usb_rpmsg_server.c
old mode 100644
new mode 100755
index 8bd048b..702cbbf
--- a/ap/os/linux/linux-3.4.x/drivers/usb/gadget/usb_rpmsg_server.c
+++ b/ap/os/linux/linux-3.4.x/drivers/usb/gadget/usb_rpmsg_server.c
@@ -87,6 +87,15 @@
 }
 EXPORT_SYMBOL_GPL(usb_rpmsg_notify_ap);
 
+void usb_plug_notify_ap(e_usb_rpmsg_cmd_type plug_type)
+{
+	usb_rpmsg_cmd notify; 
+	memset(&notify, 0, sizeof(notify));
+	notify.cmd = plug_type;
+	printk("----usb_plug_notify_ap, type:%d\n", plug_type);
+	usb_rpmsg_notify_ap(&notify, 0);
+}
+EXPORT_SYMBOL_GPL(usb_plug_notify_ap);
 
 int usb_dispatch_cmd(char * buf, int len)
 {
diff --git a/ap/os/linux/linux-3.4.x/drivers/volte_kernel/Kconfig b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/Kconfig
new file mode 100755
index 0000000..6dc1656
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/Kconfig
@@ -0,0 +1,10 @@
+#
+# Multifunction miscellaneous devices
+#
+
+
+config VOLTE_KERNEL
+	tristate "volte kernel"
+	help
+	  This volte kernel is just samble.
+default m
diff --git a/ap/os/linux/linux-3.4.x/drivers/volte_kernel/Makefile b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/Makefile
new file mode 100755
index 0000000..f82a251
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for volte kernel devices
+#
+
+#CURRENT_PATH := $(shell pwd)
+EXTRA_CFLAGS += -I drivers/volte_kernel
+echo "yanming_002 = $(EXTRA_CFLAGS)"
+obj-$(CONFIG_VOLTE_KERNEL)	+= volte_kernel.o volte_kernel_test.o
\ No newline at end of file
diff --git a/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.c b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.c
new file mode 100755
index 0000000..d772054
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.c
@@ -0,0 +1,288 @@
+//Ò»¡¢´úÂëʵÏֲο¼¡£

+//1¡¢ÒýÓÃÍ·Îļþ

+#include <linux/module.h>

+#include <linux/kernel.h>

+#include <linux/volte_drv.h>

+#include <linux/syscalls.h>

+#include <linux/statfs.h>

+#include <linux/fs.h>

+#include <linux/uaccess.h>

+

+#include <volte_kernel.h>

+

+#define VOLTE_KERNEL_DEV_INVALID_ID (-1)

+

+

+#define VOLTE_KERNEL_DEV_NAME  "/dev/volte_device"

+

+

+int volte_kernel_devfd = VOLTE_KERNEL_DEV_INVALID_ID;

+

+#define DRV_SUCCESS 0

+#define DRV_ERROR (-1)

+

+int rx_count = 0;

+int tx_count = 0;

+int volte_kernel_buf_lenth = 0;

+SINT32 zDrvVolte_kernel_Open(T_ZDrvVolte_Cfg *cfgParam) 

+{

+        int ret;

+       mm_segment_t old_fs = get_fs();

+

+	set_fs(KERNEL_DS);

+	volte_kernel_devfd = kernel_sys_open(VOLTE_KERNEL_DEV_NAME, O_RDWR,0);

+	printk("zDrvVolte_Open volte_tx_rx_devfd is %d\n",volte_kernel_devfd);

+

+	if(volte_kernel_devfd < 0)

+	{

+		printk("zDrvVolte_Open kernel_sys_open failed!\n");

+		set_fs(old_fs);

+		return DRV_ERROR;

+	}

+	ret = kernel_sys_ioctl(volte_kernel_devfd, VOLTE_IOCTL_SET_CFG, cfgParam);

+

+	if(ret < 0)

+	{

+		printk("zDrvVolte_Open sys_ioctl failed!ret is %d\n",ret);

+		goto err;

+	}

+

+	volte_kernel_buf_lenth = cfgParam->samples_per_frame *  cfgParam->bits_per_sample / 8;

+	set_fs(old_fs);

+	//VOLTE_LOG(4, (THIS_FILE, "zte audio %s open success!", VOLTE_DEV_NAME));

+	return DRV_SUCCESS;

+err:

+	kernel_sys_close(volte_kernel_devfd);

+	set_fs(old_fs);

+	volte_kernel_devfd = VOLTE_KERNEL_DEV_INVALID_ID;

+	volte_kernel_buf_lenth = 0;

+	return DRV_ERROR;

+

+}

+EXPORT_SYMBOL(zDrvVolte_kernel_Open);

+

+

+

+

+

+

+

+

+

+

+SINT32 zDrvVolte_kernel_Close(VOID) 

+{

+	if(volte_kernel_devfd == VOLTE_KERNEL_DEV_INVALID_ID)

+	{

+		//printk(1, (THIS_FILE, "zte audio %s zDrvVolte_Close invalid dev!", VOLTE_DEV_NAME));

+		return DRV_ERROR;

+	}

+	mm_segment_t old_fs = get_fs();

+

+	set_fs(KERNEL_DS);

+	kernel_sys_close(volte_kernel_devfd);

+

+	volte_kernel_devfd = VOLTE_KERNEL_DEV_INVALID_ID;

+	volte_kernel_buf_lenth = 0;

+	//VOLTE_LOG(4, (THIS_FILE, "zte audio %s zDrvVolte_Close success!", VOLTE_DEV_NAME));

+	set_fs(old_fs);

+

+	return DRV_SUCCESS;

+}

+EXPORT_SYMBOL(zDrvVolte_kernel_Close);

+

+//4

+

+

+

+

+//5¡¢¶Á¿ªÊ¼ºÍÍ£Ö¹º¯Êý²Î¿¼£»

+SINT32 zDrvVolte_kernel_ReadStart(VOID) 

+{

+	if(volte_kernel_devfd == VOLTE_KERNEL_DEV_INVALID_ID)

+	{

+		printk("zDrvVolte_ReadStart fail\n");

+		return DRV_ERROR;

+	}

+	mm_segment_t old_fs = get_fs();

+

+	set_fs(KERNEL_DS);

+	if(kernel_sys_ioctl(volte_kernel_devfd, VOLTE_IOCTL_READ_START, 0) < 0)

+	{

+		printk("zDrvVolte_ReadStart ioctl fail\n");

+			set_fs(old_fs);

+

+		return DRV_ERROR;

+	} 

+		set_fs(old_fs);

+

+	//VOLTE_LOG(4, (THIS_FILE, "zte audio %s zDrvVolte_ReadStart success!", VOLTE_DEV_NAME));

+	return DRV_SUCCESS;

+}

+

+EXPORT_SYMBOL(zDrvVolte_kernel_ReadStart);

+

+SINT32 zDrvVolte_kernel_ReadStop(VOID) 

+{

+	if(volte_kernel_devfd == VOLTE_KERNEL_DEV_INVALID_ID)

+	{

+		printk("zDrvVolte_ReadStop fail\n");

+		return DRV_ERROR;

+	}

+	mm_segment_t old_fs = get_fs();

+

+	set_fs(KERNEL_DS);

+	if(kernel_sys_ioctl(volte_kernel_devfd, VOLTE_IOCTL_READ_STOP, 0) < 0)

+	{

+		printk("zDrvVolte_ReadStop ioctl fail\n");

+			set_fs(old_fs);

+

+		return DRV_ERROR;

+	}   

+	set_fs(old_fs);

+

+	//VOLTE_LOG(4, (THIS_FILE, "zte audio %s zDrvVolte_ReadStop success!", VOLTE_DEV_NAME));

+	return DRV_SUCCESS;

+}

+EXPORT_SYMBOL(zDrvVolte_kernel_ReadStop);

+

+

+//6¡¢Ð´¿ªÊ¼ºÍÍ£Ö¹º¯Êý²Î¿¼£»

+SINT32 zDrvVolte_kernel_WriteStart(VOID) 

+{

+	if(volte_kernel_devfd == VOLTE_KERNEL_DEV_INVALID_ID)

+	{

+		printk("zDrvVolte_WriteStart fail\n");

+		return DRV_ERROR;

+	}

+		mm_segment_t old_fs = get_fs();

+

+	set_fs(KERNEL_DS);

+	if(kernel_sys_ioctl(volte_kernel_devfd, VOLTE_IOCTL_WRITE_START, 0) < 0)

+	{

+		printk("zDrvVolte_WriteStart ioctl fail\n");

+		set_fs(old_fs);

+

+		return DRV_ERROR;

+	}  

+

+		set_fs(old_fs);

+

+	//VOLTE_LOG(4, (THIS_FILE, "zte audio %s zDrvVolte_WriteStart success!", VOLTE_DEV_NAME));

+	return DRV_SUCCESS;

+}

+EXPORT_SYMBOL(zDrvVolte_kernel_WriteStart);

+

+SINT32 zDrvVolte_kernel_WriteStop(VOID) 

+{

+	if(volte_kernel_devfd == VOLTE_KERNEL_DEV_INVALID_ID)

+	{

+		printk("zDrvVolte_WriteStop fail\n");

+		return DRV_ERROR;

+	}

+	mm_segment_t old_fs = get_fs();

+

+	set_fs(KERNEL_DS);

+	if(kernel_sys_ioctl(volte_kernel_devfd, VOLTE_IOCTL_WRITE_STOP, 0) < 0)

+	{

+		printk("zDrvVolte_WriteStop ioctl fail\n");

+			set_fs(old_fs);

+

+		return DRV_ERROR;

+	}  

+	set_fs(old_fs);

+

+	//VOLTE_LOG(4, (THIS_FILE, "zte audio %s zDrvVolte_WriteStop success!", VOLTE_DEV_NAME));

+	return DRV_SUCCESS;

+}

+EXPORT_SYMBOL(zDrvVolte_kernel_WriteStop);

+

+//7¡¢¶Á¡¢Ð´º¯Êý²Î¿¼£»

+SINT32 zDrvVolte_kernel_ReadOneFrame(UINT8 *pBuf)

+{

+

+	int read_bytes = 0;

+	if(volte_kernel_devfd == VOLTE_KERNEL_DEV_INVALID_ID)

+	{

+		printk("zDrvVolte_ReadOneFrame fail\n");

+		return DRV_ERROR;

+	}

+	mm_segment_t old_fs = get_fs();

+

+	set_fs(KERNEL_DS);

+	read_bytes = kernel_sys_read(volte_kernel_devfd, pBuf, volte_kernel_buf_lenth);

+	if(read_bytes <= 0)

+	{

+		printk("zDrvVolte_ReadOneFrame read_bytes fail\n");

+		set_fs(old_fs);

+

+		return DRV_ERROR;

+	}

+	else{

+		//printk("zDrvVolte_ReadOneFrame first read_bytes is %d\n",read_bytes);

+

+              rx_count ++;

+	       if(rx_count == 40) {

+		   	printk("zDrvVolte_ReadOneFrame read_bytes is %d\n",read_bytes);

+		   rx_count = 0;

+	       }

+		set_fs(old_fs);

+

+		return DRV_SUCCESS;

+		}

+}

+

+EXPORT_SYMBOL(zDrvVolte_kernel_ReadOneFrame);

+

+

+SINT32 zDrvVolte_kernel_WriteOneFrame(UINT8 *pBuf) 

+{

+

+	if(volte_kernel_devfd == VOLTE_KERNEL_DEV_INVALID_ID)

+	{

+		printk("zDrvVolte_WriteOneFrame fail\n");

+		return DRV_ERROR;

+	}

+		mm_segment_t old_fs = get_fs();

+

+	       set_fs(KERNEL_DS);

+

+		if(kernel_sys_write(volte_kernel_devfd, pBuf, volte_kernel_buf_lenth) <=0)

+		{

+		  	set_fs(old_fs);

+		       printk("zDrvVolte_WriteOneFrame write fail\n");

+			return DRV_ERROR;

+		}else{

+                        tx_count ++;

+	                 if(tx_count == 40) {

+	                  printk("zDrvVolte_WriteOneFrame success!!\n");

+		          tx_count = 0;}

+

+		        set_fs(old_fs);

+

+		        return DRV_SUCCESS;

+		}

+

+}

+

+EXPORT_SYMBOL(zDrvVolte_kernel_WriteOneFrame);

+

+#if 0

+¶þ¡¢½Ó¿Úµ÷ÓÃ˳Ðò

+

+ 1¡¢SINT32 zDrvVolte_Open(T_ZDrvVolte_Cfg *cfgParam)  //´ò¿ª»ñÈ¡×ÊÔ´

+

+¶ÁÊǰ´ÕÕ2.1¡¢3.1¡¢4.1µÄ˳µ÷Óã»                                                дÊǰ´ÕÕ2.2¡¢3.2¡¢4.2µÄ˳µ÷Óã»

+2.1¡¢ SINT32 zDrvVolte_ReadStart(VOID)  //¶ÁʹÄÜ                               2.2¡¢ SINT32 zDrvVolte_WriteStart(VOID)  //дʹÄÜ     

+

+3.1¡¢ SINT32 zDrvVolte_ReadOneFrame(UINT8 *pBuf)//¶ÁÊý¾Ý                       3.2¡¢SINT32 zDrvVolte_WriteOneFrame(UINT8 *pBuf) //дÊý¾Ý       

+

+4.1¡¢ SINT32 zDrvVolte_ReadStop(VOID) //¶ÁÊý¾Ý½áÊøµ÷Óà                         4.2¡¢SINT32 zDrvVolte_WriteStop(VOID) //дÊý¾Ý½áÊøµ÷Óà 

+

+

+5¡¢ SINT32 zDrvVolte_Close(VOID) //¹Ø±ÕÊÍ·Å×ÊÔ´

+

+

+×¢£ºÉÏÊöÊǸù¾Ývolteͨ»°ÊµÏÖ´úÂëÕûÀíµÄ±¾Æ½Ì¨VoIP¹¦ÄÜÄÚºËʵÏֲο¼´úÂ룬´òÓ¡º¯Êý¸ÄΪÄں˺¯Êý£¬·â×°º¯ÊýÃû×Ö¿Í»§¿ÉÒÔ¸ù¾ÝÐèÒªÐ޸ġ£

+

+#endif

diff --git a/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.h b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.h
new file mode 100755
index 0000000..066e9ba
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.h
@@ -0,0 +1,45 @@
+//Ò»¡¢´úÂëʵÏֲο¼¡£

+//1¡¢ÒýÓÃÍ·Îļþ

+#include <linux/module.h>

+#include <linux/kernel.h>

+#include <linux/volte_drv.h>

+#include <linux/syscalls.h>

+#include <linux/statfs.h>

+#include <linux/fs.h>

+#include <linux/uaccess.h>

+

+typedef long                SINT32;

+typedef unsigned char 	UINT8;

+

+extern SINT32 zDrvVolte_kernel_ReadStart(VOID);

+

+extern SINT32 zDrvVolte_kernel_Close(VOID); 

+

+

+extern SINT32 zDrvVolte_kernel_WriteOneFrame(UINT8 *pBuf); 

+extern SINT32  zDrvVolte_kernel_ReadOneFrame(UINT8 *pBuf);

+

+extern SINT32 zDrvVolte_kernel_Open(T_ZDrvVolte_Cfg *cfgParam); 

+

+

+extern SINT32 zDrvVolte_kernel_WriteStart(VOID);

+extern SINT32 zDrvVolte_kernel_WriteStop(VOID);

+

+extern long kernel_sys_read(unsigned int fd, char __user *buf, size_t count);

+extern long kernel_sys_write(unsigned int fd, char __user *buf, size_t count);

+extern long kernel_sys_close(unsigned int fd);

+
+extern long kernel_sys_open(const char __user *filename,

+				int flags, umode_t mode);

+

+extern long kernel_sys_ioctl(unsigned int fd, unsigned int cmd,

+				unsigned long arg);

+

+

+

+

+

+

+

+

+

diff --git a/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.mod.c b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.mod.c
new file mode 100755
index 0000000..4e2f0a3
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel.mod.c
@@ -0,0 +1,35 @@
+#include <linux/module.h>
+#include <linux/vermagic.h>
+#include <linux/compiler.h>
+
+MODULE_INFO(vermagic, VERMAGIC_STRING);
+
+struct module __this_module
+__attribute__((section(".gnu.linkonce.this_module"))) = {
+ .name = KBUILD_MODNAME,
+ .arch = MODULE_ARCH_INIT,
+};
+
+MODULE_INFO(intree, "Y");
+
+static const struct modversion_info ____versions[]
+__used
+__attribute__((section("__versions"))) = {
+	{ 0xc2457a1f, "module_layout" },
+	{ 0x27e1a049, "printk" },
+	{ 0x34573de1, "kernel_sys_close" },
+	{ 0x21cfd28e, "current_kernel_thread" },
+	{ 0xad2ab76f, "kernel_sys_read" },
+	{ 0x3758cf00, "kernel_sys_ioctl" },
+	{ 0x3f870871, "kernel_sys_open" },
+	{ 0xefd6cf06, "__aeabi_unwind_cpp_pr0" },
+	{ 0x5bd8b081, "kernel_sys_write" },
+};
+
+static const char __module_depends[]
+__used
+__attribute__((section(".modinfo"))) =
+"depends=";
+
+
+MODULE_INFO(srcversion, "9D36252CE97E8809ED86139");
diff --git a/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel_test.c b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel_test.c
new file mode 100755
index 0000000..e2d8783
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel_test.c
@@ -0,0 +1,249 @@
+/*

+ * ZTE ddr driver

+ *

+ * Copyright (C) 2013 ZTE Ltd.

+ * 	by tsp

+ *

+ */

+

+#include <linux/module.h>

+#include <linux/kernel.h>

+#include <linux/init.h>

+#include <linux/spinlock.h>

+#include <linux/interrupt.h>

+#include <linux/types.h>

+#include <linux/sched.h>

+#include <linux/io.h>

+#include <mach/iomap.h>

+#include <linux/slab.h>

+#include <linux/syscalls.h>

+#include <asm/uaccess.h>

+#include <linux/zx_soft_wdt.h>

+#include <linux/miscdevice.h>	/* For handling misc devices */

+#include <linux/soc/zte/rpm/rpmsg.h> /* For icp operation*/

+#include <linux/volte_drv.h>

+#include <volte_kernel.h>

+#include <linux/kthread.h>

+

+

+#define DRV_SUCCESS 0

+#define DRV_ERROR (-1)

+

+int quit_tx_rx = 1;

+

+

+int quit_rx = 1;

+int quit_tx = 1;

+static int volte_kernel_rx_thread_func(VOID)

+{

+    SINT32 status;

+    char buf[640];

+	printk("yanming volte_kernel_rx_thread_func enter\n");

+

+	#if 0

+   T_ZDrvVoice_Cfg cfg = {16000,1,320,16,0};

+

+    status = zDrvVolte_Rx_Open(&cfg);

+    if (status != 0) {

+    printk("yanming zDrvVolte_Rx_Open: failed!!!!!\n");

+    return;

+    }

+   

+

+    status = zDrvVolte_ReadStart();

+    if(status != DRV_SUCCESS) 

+    {

+        printk("yanming zDrvVolte_ReadStart fail\n");

+        return DRV_ERROR;

+    }

+	#endif

+

+       quit_rx = 0;

+

+	

+

+	while (!quit_rx) 

+	{

+

+		status = zDrvVolte_kernel_ReadOneFrame((UINT8*)buf);

+	

+		if(status != DRV_SUCCESS) 

+		{

+			printk("yanming zDrvVolte_ReadOneFrame fail\n");

+			continue;

+		}

+

+

+	}

+	return DRV_SUCCESS;

+}

+

+

+

+

+static int volte_kernel_tx_thread_func(VOID)

+{

+    SINT32 status;

+    char buf[640] = "";

+	printk("yanming volte_kernel_tx_thread_func enter\n");

+	#if 0

+    T_ZDrvVoice_Cfg cfg = {16000,1,320,16,0};

+

+    status = zDrvVolte_Tx_Open(&cfg);

+    if (status != 0) {

+    printk("yanming zDrvVolte_Tx_Open: failed!!!!!\n");

+    return;

+    }

+    

+    status = zDrvVolte_WriteStart();

+    if(status != DRV_SUCCESS) 

+    {

+        printk("yanming zDrvVolte_WriteStart fail\n");

+        return DRV_ERROR;

+    }

+	#endif

+

+       quit_tx = 0;

+

+	

+

+	while (!quit_tx) 

+	{

+

+		status = zDrvVolte_kernel_WriteOneFrame((UINT8*)buf);

+		if(status != DRV_SUCCESS) 

+		{

+			printk("yanming zDrvVolte_WriteOneFrame fail\n");

+			continue;

+		}

+

+	}

+	

+	return DRV_SUCCESS;

+}

+

+

+static int volte_kernel_tx_rx_thread_func(VOID)

+{

+    SINT32 status;

+    char buf_rx[640];

+    char buf_tx[640] = "";

+

+	#if 1

+  // T_ZDrvVoice_Cfg cfg = {16000,1,320,16,0};

+	    T_ZDrvVoice_Cfg cfg = {8000,1,80,16,0};

+

+

+    status = zDrvVolte_kernel_Open(&cfg);

+    if (status != 0) {

+    printk("yanming zDrvVolte_Open: failed!!!!!\n");

+    return;

+    }

+     //printk("zDrvVolte_kernel_Open\n");

+

+

+    status = zDrvVolte_kernel_ReadStart();

+

+    if(status != DRV_SUCCESS) 

+    {

+        printk("yanming zDrvVolte_ReadStart fail\n");

+        return DRV_ERROR;

+    }

+     //printk("zDrvVolte_kernel_ReadStart\n");

+

+	 status = zDrvVolte_kernel_WriteStart();

+

+    if(status != DRV_SUCCESS) 

+    {

+        printk("yanming zDrvVolte_WriteStart fail\n");

+        return DRV_ERROR;

+    }

+	     //printk("zDrvVolte_kernel_WriteStart\n");

+

+	#endif

+

+       quit_tx_rx = 0;

+

+	

+

+	while (!quit_tx_rx) 

+	{

+

+		status = zDrvVolte_kernel_ReadOneFrame((UINT8*)buf_rx);

+

+	

+		if(status != DRV_SUCCESS) 

+		{

+			printk("yanming zDrvVolte_ReadOneFrame fail\n");

+			//continue;

+		}

+             	   // printk("zDrvVolte_kernel_ReadOneFrame\n");

+

+		status = zDrvVolte_kernel_WriteOneFrame((UINT8*)buf_tx);

+

+	

+		if(status != DRV_SUCCESS) 

+		{

+			printk("yanming zDrvVolte_WriteOneFrame fail\n");

+			//continue;

+		}

+		      // printk("zDrvVolte_kernel_WriteOneFrame\n");

+

+

+

+	}

+	return DRV_SUCCESS;

+}

+

+static void volte_kernel_init (void)

+{

+	

+    

+	static struct task_struct	*handle_tx_rx_thread;

+

+	handle_tx_rx_thread  = kthread_run(volte_kernel_tx_rx_thread_func, 1, "volte_kernel_tx_rx_thread");

+#if 0

+	SINT32 status;

+

+    //T_ZDrvVoice_Cfg cfg = {16000,1,320,16,0};

+    T_ZDrvVoice_Cfg cfg = {8000,1,80,16,0};

+

+    status = zDrvVolte_kernel_Open(&cfg);

+    if (status != 0) {

+    printk("yanming zDrvVolte_kernel_Open: failed!!!!!\n");

+    return;

+    }

+    

+    status = zDrvVolte_kernel_WriteStart();

+    if(status != DRV_SUCCESS) 

+    {

+        printk("yanming zDrvVolte_kernel_WriteStart fail\n");

+        return DRV_ERROR;

+    }

+

+	status = zDrvVolte_kernel_ReadStart();

+    if(status != DRV_SUCCESS) 

+    {

+        printk("yanming zDrvVolte_kernel_ReadStart fail\n");

+        return DRV_ERROR;

+    }

+

+

+       kernel_thread(volte_kernel_tx_thread_func, NULL, CLONE_FS | CLONE_FILES | SIGCHLD);

+    	kernel_thread(volte_kernel_rx_thread_func, NULL, CLONE_FS | CLONE_FILES | SIGCHLD);

+		#endif

+

+	printk("volte_kernel_init end\n");

+

+

+}

+

+static void __exit volte_kernel_exit(void)

+{

+    //misc_deregister(&zx_ddr_miscdev);

+    printk("volte_kernel_exit\n");

+}

+

+

+module_init(volte_kernel_init);

+module_exit(volte_kernel_exit);

diff --git a/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel_test.mod.c b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel_test.mod.c
new file mode 100755
index 0000000..60f0143
--- /dev/null
+++ b/ap/os/linux/linux-3.4.x/drivers/volte_kernel/volte_kernel_test.mod.c
@@ -0,0 +1,42 @@
+#include <linux/module.h>
+#include <linux/vermagic.h>
+#include <linux/compiler.h>
+
+MODULE_INFO(vermagic, VERMAGIC_STRING);
+
+struct module __this_module
+__attribute__((section(".gnu.linkonce.this_module"))) = {
+ .name = KBUILD_MODNAME,
+ .init = init_module,
+#ifdef CONFIG_MODULE_UNLOAD
+ .exit = cleanup_module,
+#endif
+ .arch = MODULE_ARCH_INIT,
+};
+
+MODULE_INFO(intree, "Y");
+
+static const struct modversion_info ____versions[]
+__used
+__attribute__((section("__versions"))) = {
+	{ 0xc2457a1f, "module_layout" },
+	{ 0xefd6cf06, "__aeabi_unwind_cpp_pr0" },
+	{ 0x4901c8d8, "wake_up_process" },
+	{ 0x743d577, "kthread_create_on_node" },
+	{ 0x2e5810c6, "__aeabi_unwind_cpp_pr1" },
+	{ 0x76e0096e, "zDrvVolte_kernel_WriteOneFrame" },
+	{ 0xb6e05de4, "zDrvVolte_kernel_ReadOneFrame" },
+	{ 0x3654b2be, "zDrvVolte_kernel_WriteStart" },
+	{ 0x3c04b166, "zDrvVolte_kernel_ReadStart" },
+	{ 0x27e1a049, "printk" },
+	{ 0xbfbb048a, "zDrvVolte_kernel_Open" },
+	{ 0x5f754e5a, "memset" },
+};
+
+static const char __module_depends[]
+__used
+__attribute__((section(".modinfo"))) =
+"depends=volte_kernel";
+
+
+MODULE_INFO(srcversion, "8ED27AFF2D649F117F5B7FE");